#![allow(clippy::missing_safety_doc)]
#![allow(clippy::identity_op)]
#![allow(clippy::unnecessary_cast)]
#![allow(clippy::erasing_op)]
#[doc = "Power control"]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Pwr {
ptr: *mut u8,
}
unsafe impl Send for Pwr {}
unsafe impl Sync for Pwr {}
impl Pwr {
#[inline(always)]
pub const unsafe fn from_ptr(ptr: *mut ()) -> Self {
Self { ptr: ptr as _ }
}
#[inline(always)]
pub const fn as_ptr(&self) -> *mut () {
self.ptr as _
}
#[doc = "Power control register 1"]
#[inline(always)]
pub const fn cr1(self) -> crate::common::Reg<regs::Cr1, crate::common::RW> {
unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x0usize) as _) }
}
#[doc = "Power control register 2"]
#[inline(always)]
pub const fn cr2(self) -> crate::common::Reg<regs::Cr2, crate::common::RW> {
unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x04usize) as _) }
}
#[doc = "Power control register 3"]
#[inline(always)]
pub const fn cr3(self) -> crate::common::Reg<regs::Cr3, crate::common::RW> {
unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x08usize) as _) }
}
#[doc = "Power control register 4"]
#[inline(always)]
pub const fn cr4(self) -> crate::common::Reg<regs::Cr4, crate::common::RW> {
unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x0cusize) as _) }
}
#[doc = "Power status register 1"]
#[inline(always)]
pub const fn sr1(self) -> crate::common::Reg<regs::Sr1, crate::common::R> {
unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x10usize) as _) }
}
#[doc = "Power status register 2"]
#[inline(always)]
pub const fn sr2(self) -> crate::common::Reg<regs::Sr2, crate::common::R> {
unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x14usize) as _) }
}
#[doc = "Power status clear register"]
#[inline(always)]
pub const fn scr(self) -> crate::common::Reg<regs::Scr, crate::common::W> {
unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x18usize) as _) }
}
#[doc = "Power control register 5"]
#[inline(always)]
pub const fn cr5(self) -> crate::common::Reg<regs::Cr5, crate::common::RW> {
unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x1cusize) as _) }
}
#[doc = "Power Port A pull-up control register"]
#[inline(always)]
pub const fn pucra(self) -> crate::common::Reg<regs::Pxcr, crate::common::RW> {
unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x20usize) as _) }
}
#[doc = "Power Port A pull-down control register"]
#[inline(always)]
pub const fn pdcra(self) -> crate::common::Reg<regs::Pxcr, crate::common::RW> {
unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x24usize) as _) }
}
#[doc = "Power Port B pull-up control register"]
#[inline(always)]
pub const fn pucrb(self) -> crate::common::Reg<regs::Pxcr, crate::common::RW> {
unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x28usize) as _) }
}
#[doc = "Power Port B pull-down control register"]
#[inline(always)]
pub const fn pdcrb(self) -> crate::common::Reg<regs::Pxcr, crate::common::RW> {
unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x2cusize) as _) }
}
#[doc = "Power Port C pull-up control register"]
#[inline(always)]
pub const fn pucrc(self) -> crate::common::Reg<regs::Pxcr, crate::common::RW> {
unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x30usize) as _) }
}
#[doc = "Power Port C pull-down control register"]
#[inline(always)]
pub const fn pdcrc(self) -> crate::common::Reg<regs::Pxcr, crate::common::RW> {
unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x34usize) as _) }
}
#[doc = "Power Port D pull-up control register"]
#[inline(always)]
pub const fn pucrd(self) -> crate::common::Reg<regs::Pxcr, crate::common::RW> {
unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x38usize) as _) }
}
#[doc = "Power Port D pull-down control register"]
#[inline(always)]
pub const fn pdcrd(self) -> crate::common::Reg<regs::Pxcr, crate::common::RW> {
unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x3cusize) as _) }
}
#[doc = "Power Port E pull-up control register"]
#[inline(always)]
pub const fn pucre(self) -> crate::common::Reg<regs::Pxcr, crate::common::RW> {
unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x40usize) as _) }
}
#[doc = "Power Port E pull-down control register"]
#[inline(always)]
pub const fn pdcre(self) -> crate::common::Reg<regs::Pxcr, crate::common::RW> {
unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x44usize) as _) }
}
#[doc = "Power Port H pull-up control register"]
#[inline(always)]
pub const fn pucrh(self) -> crate::common::Reg<regs::Pxcr, crate::common::RW> {
unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x58usize) as _) }
}
#[doc = "Power Port H pull-down control register"]
#[inline(always)]
pub const fn pdcrh(self) -> crate::common::Reg<regs::Pxcr, crate::common::RW> {
unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x5cusize) as _) }
}
#[doc = "CPU2 Power control register 1"]
#[inline(always)]
pub const fn c2cr1(self) -> crate::common::Reg<regs::C2cr1, crate::common::RW> {
unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x80usize) as _) }
}
#[doc = "CPU2 Power control register 3"]
#[inline(always)]
pub const fn c2cr3(self) -> crate::common::Reg<regs::C2cr3, crate::common::RW> {
unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x84usize) as _) }
}
#[doc = "Power status clear register"]
#[inline(always)]
pub const fn extscr(self) -> crate::common::Reg<regs::Extscr, crate::common::RW> {
unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x88usize) as _) }
}
}
pub mod regs {
#[doc = "CPU2 Power control register 1"]
#[repr(transparent)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct C2cr1(pub u32);
impl C2cr1 {
#[doc = "Low-power mode selection for CPU2"]
#[inline(always)]
pub const fn lpms(&self) -> u8 {
let val = (self.0 >> 0usize) & 0x07;
val as u8
}
#[doc = "Low-power mode selection for CPU2"]
#[inline(always)]
pub fn set_lpms(&mut self, val: u8) {
self.0 = (self.0 & !(0x07 << 0usize)) | (((val as u32) & 0x07) << 0usize);
}
#[doc = "Flash power down mode during LPRun for CPU2"]
#[inline(always)]
pub const fn fpdr(&self) -> bool {
let val = (self.0 >> 4usize) & 0x01;
val != 0
}
#[doc = "Flash power down mode during LPRun for CPU2"]
#[inline(always)]
pub fn set_fpdr(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 4usize)) | (((val as u32) & 0x01) << 4usize);
}
#[doc = "Flash power down mode during LPSleep for CPU2"]
#[inline(always)]
pub const fn fpds(&self) -> bool {
let val = (self.0 >> 5usize) & 0x01;
val != 0
}
#[doc = "Flash power down mode during LPSleep for CPU2"]
#[inline(always)]
pub fn set_fpds(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize);
}
#[doc = "BLE external wakeup signal"]
#[inline(always)]
pub const fn bleewkup(&self) -> bool {
let val = (self.0 >> 14usize) & 0x01;
val != 0
}
#[doc = "BLE external wakeup signal"]
#[inline(always)]
pub fn set_bleewkup(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 14usize)) | (((val as u32) & 0x01) << 14usize);
}
#[doc = "802.15.4 external wakeup signal"]
#[inline(always)]
pub const fn _802ewkup(&self) -> bool {
let val = (self.0 >> 15usize) & 0x01;
val != 0
}
#[doc = "802.15.4 external wakeup signal"]
#[inline(always)]
pub fn set__802ewkup(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 15usize)) | (((val as u32) & 0x01) << 15usize);
}
}
impl Default for C2cr1 {
#[inline(always)]
fn default() -> C2cr1 {
C2cr1(0)
}
}
impl core::fmt::Debug for C2cr1 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("C2cr1")
.field("lpms", &self.lpms())
.field("fpdr", &self.fpdr())
.field("fpds", &self.fpds())
.field("bleewkup", &self.bleewkup())
.field("_802ewkup", &self._802ewkup())
.finish()
}
}
#[cfg(feature = "defmt")]
impl defmt::Format for C2cr1 {
fn format(&self, f: defmt::Formatter) {
defmt :: write ! (f , "C2cr1 {{ lpms: {=u8:?}, fpdr: {=bool:?}, fpds: {=bool:?}, bleewkup: {=bool:?}, _802ewkup: {=bool:?} }}" , self . lpms () , self . fpdr () , self . fpds () , self . bleewkup () , self . _802ewkup ())
}
}
#[doc = "CPU2 Power control register 3"]
#[repr(transparent)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct C2cr3(pub u32);
impl C2cr3 {
#[doc = "Enable Wakeup pin"]
#[inline(always)]
pub const fn ewup(&self, n: usize) -> bool {
assert!(n < 5usize);
let offs = 0usize + n * 1usize;
let val = (self.0 >> offs) & 0x01;
val != 0
}
#[doc = "Enable Wakeup pin"]
#[inline(always)]
pub fn set_ewup(&mut self, n: usize, val: bool) {
assert!(n < 5usize);
let offs = 0usize + n * 1usize;
self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs);
}
#[doc = "Enable BLE host wakeup interrupt for CPU2"]
#[inline(always)]
pub const fn eblewup(&self) -> bool {
let val = (self.0 >> 9usize) & 0x01;
val != 0
}
#[doc = "Enable BLE host wakeup interrupt for CPU2"]
#[inline(always)]
pub fn set_eblewup(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 9usize)) | (((val as u32) & 0x01) << 9usize);
}
#[doc = "Enable 802.15.4 host wakeup interrupt for CPU2"]
#[inline(always)]
pub const fn e802wup(&self) -> bool {
let val = (self.0 >> 10usize) & 0x01;
val != 0
}
#[doc = "Enable 802.15.4 host wakeup interrupt for CPU2"]
#[inline(always)]
pub fn set_e802wup(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 10usize)) | (((val as u32) & 0x01) << 10usize);
}
#[doc = "Apply pull-up and pull-down configuration for CPU2"]
#[inline(always)]
pub const fn apc(&self) -> bool {
let val = (self.0 >> 12usize) & 0x01;
val != 0
}
#[doc = "Apply pull-up and pull-down configuration for CPU2"]
#[inline(always)]
pub fn set_apc(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 12usize)) | (((val as u32) & 0x01) << 12usize);
}
#[doc = "Enable internal wakeup line for CPU2"]
#[inline(always)]
pub const fn eiwul(&self) -> bool {
let val = (self.0 >> 15usize) & 0x01;
val != 0
}
#[doc = "Enable internal wakeup line for CPU2"]
#[inline(always)]
pub fn set_eiwul(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 15usize)) | (((val as u32) & 0x01) << 15usize);
}
}
impl Default for C2cr3 {
#[inline(always)]
fn default() -> C2cr3 {
C2cr3(0)
}
}
impl core::fmt::Debug for C2cr3 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("C2cr3")
.field("ewup[0]", &self.ewup(0usize))
.field("ewup[1]", &self.ewup(1usize))
.field("ewup[2]", &self.ewup(2usize))
.field("ewup[3]", &self.ewup(3usize))
.field("ewup[4]", &self.ewup(4usize))
.field("eblewup", &self.eblewup())
.field("e802wup", &self.e802wup())
.field("apc", &self.apc())
.field("eiwul", &self.eiwul())
.finish()
}
}
#[cfg(feature = "defmt")]
impl defmt::Format for C2cr3 {
fn format(&self, f: defmt::Formatter) {
defmt :: write ! (f , "C2cr3 {{ ewup[0]: {=bool:?}, ewup[1]: {=bool:?}, ewup[2]: {=bool:?}, ewup[3]: {=bool:?}, ewup[4]: {=bool:?}, eblewup: {=bool:?}, e802wup: {=bool:?}, apc: {=bool:?}, eiwul: {=bool:?} }}" , self . ewup (0usize) , self . ewup (1usize) , self . ewup (2usize) , self . ewup (3usize) , self . ewup (4usize) , self . eblewup () , self . e802wup () , self . apc () , self . eiwul ())
}
}
#[doc = "Power control register 1"]
#[repr(transparent)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Cr1(pub u32);
impl Cr1 {
#[doc = "Low-power mode selection for CPU1"]
#[inline(always)]
pub const fn lpms(&self) -> u8 {
let val = (self.0 >> 0usize) & 0x07;
val as u8
}
#[doc = "Low-power mode selection for CPU1"]
#[inline(always)]
pub fn set_lpms(&mut self, val: u8) {
self.0 = (self.0 & !(0x07 << 0usize)) | (((val as u32) & 0x07) << 0usize);
}
#[doc = "Flash power down mode during LPRun for CPU1"]
#[inline(always)]
pub const fn fpdr(&self) -> bool {
let val = (self.0 >> 4usize) & 0x01;
val != 0
}
#[doc = "Flash power down mode during LPRun for CPU1"]
#[inline(always)]
pub fn set_fpdr(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 4usize)) | (((val as u32) & 0x01) << 4usize);
}
#[doc = "Flash power down mode during LPsSleep for CPU1"]
#[inline(always)]
pub const fn fpds(&self) -> bool {
let val = (self.0 >> 5usize) & 0x01;
val != 0
}
#[doc = "Flash power down mode during LPsSleep for CPU1"]
#[inline(always)]
pub fn set_fpds(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize);
}
#[doc = "Disable backup domain write protection"]
#[inline(always)]
pub const fn dbp(&self) -> bool {
let val = (self.0 >> 8usize) & 0x01;
val != 0
}
#[doc = "Disable backup domain write protection"]
#[inline(always)]
pub fn set_dbp(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize);
}
#[doc = "Low-power run"]
#[inline(always)]
pub const fn lpr(&self) -> bool {
let val = (self.0 >> 14usize) & 0x01;
val != 0
}
#[doc = "Low-power run"]
#[inline(always)]
pub fn set_lpr(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 14usize)) | (((val as u32) & 0x01) << 14usize);
}
}
impl Default for Cr1 {
#[inline(always)]
fn default() -> Cr1 {
Cr1(0)
}
}
impl core::fmt::Debug for Cr1 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("Cr1")
.field("lpms", &self.lpms())
.field("fpdr", &self.fpdr())
.field("fpds", &self.fpds())
.field("dbp", &self.dbp())
.field("lpr", &self.lpr())
.finish()
}
}
#[cfg(feature = "defmt")]
impl defmt::Format for Cr1 {
fn format(&self, f: defmt::Formatter) {
defmt::write!(
f,
"Cr1 {{ lpms: {=u8:?}, fpdr: {=bool:?}, fpds: {=bool:?}, dbp: {=bool:?}, lpr: {=bool:?} }}",
self.lpms(),
self.fpdr(),
self.fpds(),
self.dbp(),
self.lpr()
)
}
}
#[doc = "Power control register 2"]
#[repr(transparent)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Cr2(pub u32);
impl Cr2 {
#[doc = "Power voltage detector enable"]
#[inline(always)]
pub const fn pvde(&self) -> bool {
let val = (self.0 >> 0usize) & 0x01;
val != 0
}
#[doc = "Power voltage detector enable"]
#[inline(always)]
pub fn set_pvde(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize);
}
#[doc = "Power voltage detector level selection"]
#[inline(always)]
pub const fn pls(&self) -> u8 {
let val = (self.0 >> 1usize) & 0x07;
val as u8
}
#[doc = "Power voltage detector level selection"]
#[inline(always)]
pub fn set_pls(&mut self, val: u8) {
self.0 = (self.0 & !(0x07 << 1usize)) | (((val as u32) & 0x07) << 1usize);
}
}
impl Default for Cr2 {
#[inline(always)]
fn default() -> Cr2 {
Cr2(0)
}
}
impl core::fmt::Debug for Cr2 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("Cr2")
.field("pvde", &self.pvde())
.field("pls", &self.pls())
.finish()
}
}
#[cfg(feature = "defmt")]
impl defmt::Format for Cr2 {
fn format(&self, f: defmt::Formatter) {
defmt::write!(f, "Cr2 {{ pvde: {=bool:?}, pls: {=u8:?} }}", self.pvde(), self.pls())
}
}
#[doc = "Power control register 3"]
#[repr(transparent)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Cr3(pub u32);
impl Cr3 {
#[doc = "Enable Wakeup pin"]
#[inline(always)]
pub const fn ewup(&self, n: usize) -> bool {
assert!(n < 5usize);
let offs = 0usize + n * 1usize;
let val = (self.0 >> offs) & 0x01;
val != 0
}
#[doc = "Enable Wakeup pin"]
#[inline(always)]
pub fn set_ewup(&mut self, n: usize, val: bool) {
assert!(n < 5usize);
let offs = 0usize + n * 1usize;
self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs);
}
#[doc = "Enable BORH and Step Down counverter forced in Bypass interrups for CPU1"]
#[inline(always)]
pub const fn eborhsdfb(&self) -> bool {
let val = (self.0 >> 8usize) & 0x01;
val != 0
}
#[doc = "Enable BORH and Step Down counverter forced in Bypass interrups for CPU1"]
#[inline(always)]
pub fn set_eborhsdfb(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize);
}
#[doc = "SRAM2a retention in Standby mode"]
#[inline(always)]
pub const fn rrs(&self) -> bool {
let val = (self.0 >> 9usize) & 0x01;
val != 0
}
#[doc = "SRAM2a retention in Standby mode"]
#[inline(always)]
pub fn set_rrs(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 9usize)) | (((val as u32) & 0x01) << 9usize);
}
#[doc = "Apply pull-up and pull-down configuration"]
#[inline(always)]
pub const fn apc(&self) -> bool {
let val = (self.0 >> 10usize) & 0x01;
val != 0
}
#[doc = "Apply pull-up and pull-down configuration"]
#[inline(always)]
pub fn set_apc(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 10usize)) | (((val as u32) & 0x01) << 10usize);
}
#[doc = "Enable BLE end of activity interrupt for CPU1"]
#[inline(always)]
pub const fn eblea(&self) -> bool {
let val = (self.0 >> 11usize) & 0x01;
val != 0
}
#[doc = "Enable BLE end of activity interrupt for CPU1"]
#[inline(always)]
pub fn set_eblea(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 11usize)) | (((val as u32) & 0x01) << 11usize);
}
#[doc = "Enable critical radio phase end of activity interrupt for CPU1"]
#[inline(always)]
pub const fn ecrpe(&self) -> bool {
let val = (self.0 >> 12usize) & 0x01;
val != 0
}
#[doc = "Enable critical radio phase end of activity interrupt for CPU1"]
#[inline(always)]
pub fn set_ecrpe(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 12usize)) | (((val as u32) & 0x01) << 12usize);
}
#[doc = "Enable end of activity interrupt for CPU1"]
#[inline(always)]
pub const fn e802a(&self) -> bool {
let val = (self.0 >> 13usize) & 0x01;
val != 0
}
#[doc = "Enable end of activity interrupt for CPU1"]
#[inline(always)]
pub fn set_e802a(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 13usize)) | (((val as u32) & 0x01) << 13usize);
}
#[doc = "Enable CPU2 Hold interrupt for CPU1"]
#[inline(always)]
pub const fn ec2h(&self) -> bool {
let val = (self.0 >> 14usize) & 0x01;
val != 0
}
#[doc = "Enable CPU2 Hold interrupt for CPU1"]
#[inline(always)]
pub fn set_ec2h(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 14usize)) | (((val as u32) & 0x01) << 14usize);
}
#[doc = "Enable internal wakeup line for CPU1"]
#[inline(always)]
pub const fn eiwul(&self) -> bool {
let val = (self.0 >> 15usize) & 0x01;
val != 0
}
#[doc = "Enable internal wakeup line for CPU1"]
#[inline(always)]
pub fn set_eiwul(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 15usize)) | (((val as u32) & 0x01) << 15usize);
}
}
impl Default for Cr3 {
#[inline(always)]
fn default() -> Cr3 {
Cr3(0)
}
}
impl core::fmt::Debug for Cr3 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("Cr3")
.field("ewup[0]", &self.ewup(0usize))
.field("ewup[1]", &self.ewup(1usize))
.field("ewup[2]", &self.ewup(2usize))
.field("ewup[3]", &self.ewup(3usize))
.field("ewup[4]", &self.ewup(4usize))
.field("eborhsdfb", &self.eborhsdfb())
.field("rrs", &self.rrs())
.field("apc", &self.apc())
.field("eblea", &self.eblea())
.field("ecrpe", &self.ecrpe())
.field("e802a", &self.e802a())
.field("ec2h", &self.ec2h())
.field("eiwul", &self.eiwul())
.finish()
}
}
#[cfg(feature = "defmt")]
impl defmt::Format for Cr3 {
fn format(&self, f: defmt::Formatter) {
defmt :: write ! (f , "Cr3 {{ ewup[0]: {=bool:?}, ewup[1]: {=bool:?}, ewup[2]: {=bool:?}, ewup[3]: {=bool:?}, ewup[4]: {=bool:?}, eborhsdfb: {=bool:?}, rrs: {=bool:?}, apc: {=bool:?}, eblea: {=bool:?}, ecrpe: {=bool:?}, e802a: {=bool:?}, ec2h: {=bool:?}, eiwul: {=bool:?} }}" , self . ewup (0usize) , self . ewup (1usize) , self . ewup (2usize) , self . ewup (3usize) , self . ewup (4usize) , self . eborhsdfb () , self . rrs () , self . apc () , self . eblea () , self . ecrpe () , self . e802a () , self . ec2h () , self . eiwul ())
}
}
#[doc = "Power control register 4"]
#[repr(transparent)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Cr4(pub u32);
impl Cr4 {
#[doc = "Wakeup pin WKUP1 polarity"]
#[inline(always)]
pub const fn wp1(&self, n: usize) -> bool {
assert!(n < 5usize);
let offs = 0usize + n * 1usize;
let val = (self.0 >> offs) & 0x01;
val != 0
}
#[doc = "Wakeup pin WKUP1 polarity"]
#[inline(always)]
pub fn set_wp1(&mut self, n: usize, val: bool) {
assert!(n < 5usize);
let offs = 0usize + n * 1usize;
self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs);
}
#[doc = "VBAT battery charging enable"]
#[inline(always)]
pub const fn vbe(&self) -> bool {
let val = (self.0 >> 8usize) & 0x01;
val != 0
}
#[doc = "VBAT battery charging enable"]
#[inline(always)]
pub fn set_vbe(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize);
}
#[doc = "VBAT battery charging resistor selection"]
#[inline(always)]
pub const fn vbrs(&self) -> bool {
let val = (self.0 >> 9usize) & 0x01;
val != 0
}
#[doc = "VBAT battery charging resistor selection"]
#[inline(always)]
pub fn set_vbrs(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 9usize)) | (((val as u32) & 0x01) << 9usize);
}
#[doc = "BOOT CPU2 after reset or wakeup from Stop or Standby modes"]
#[inline(always)]
pub const fn c2boot(&self) -> bool {
let val = (self.0 >> 15usize) & 0x01;
val != 0
}
#[doc = "BOOT CPU2 after reset or wakeup from Stop or Standby modes"]
#[inline(always)]
pub fn set_c2boot(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 15usize)) | (((val as u32) & 0x01) << 15usize);
}
}
impl Default for Cr4 {
#[inline(always)]
fn default() -> Cr4 {
Cr4(0)
}
}
impl core::fmt::Debug for Cr4 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("Cr4")
.field("wp1[0]", &self.wp1(0usize))
.field("wp1[1]", &self.wp1(1usize))
.field("wp1[2]", &self.wp1(2usize))
.field("wp1[3]", &self.wp1(3usize))
.field("wp1[4]", &self.wp1(4usize))
.field("vbe", &self.vbe())
.field("vbrs", &self.vbrs())
.field("c2boot", &self.c2boot())
.finish()
}
}
#[cfg(feature = "defmt")]
impl defmt::Format for Cr4 {
fn format(&self, f: defmt::Formatter) {
defmt :: write ! (f , "Cr4 {{ wp1[0]: {=bool:?}, wp1[1]: {=bool:?}, wp1[2]: {=bool:?}, wp1[3]: {=bool:?}, wp1[4]: {=bool:?}, vbe: {=bool:?}, vbrs: {=bool:?}, c2boot: {=bool:?} }}" , self . wp1 (0usize) , self . wp1 (1usize) , self . wp1 (2usize) , self . wp1 (3usize) , self . wp1 (4usize) , self . vbe () , self . vbrs () , self . c2boot ())
}
}
#[doc = "Power control register 5"]
#[repr(transparent)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Cr5(pub u32);
impl Cr5 {
#[doc = "Step Down converter voltage output scaling"]
#[inline(always)]
pub const fn sdvos(&self) -> u8 {
let val = (self.0 >> 0usize) & 0x0f;
val as u8
}
#[doc = "Step Down converter voltage output scaling"]
#[inline(always)]
pub fn set_sdvos(&mut self, val: u8) {
self.0 = (self.0 & !(0x0f << 0usize)) | (((val as u32) & 0x0f) << 0usize);
}
#[doc = "Step Down converter supplt startup current selection"]
#[inline(always)]
pub const fn sdsc(&self) -> u8 {
let val = (self.0 >> 4usize) & 0x07;
val as u8
}
#[doc = "Step Down converter supplt startup current selection"]
#[inline(always)]
pub fn set_sdsc(&mut self, val: u8) {
self.0 = (self.0 & !(0x07 << 4usize)) | (((val as u32) & 0x07) << 4usize);
}
#[doc = "BORH configuration selection"]
#[inline(always)]
pub const fn borhc(&self) -> bool {
let val = (self.0 >> 8usize) & 0x01;
val != 0
}
#[doc = "BORH configuration selection"]
#[inline(always)]
pub fn set_borhc(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize);
}
#[doc = "VOS configuration selection (non user)"]
#[inline(always)]
pub const fn smpscfg(&self) -> bool {
let val = (self.0 >> 9usize) & 0x01;
val != 0
}
#[doc = "VOS configuration selection (non user)"]
#[inline(always)]
pub fn set_smpscfg(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 9usize)) | (((val as u32) & 0x01) << 9usize);
}
#[doc = "Enable Step Down converter Bypass mode enabled"]
#[inline(always)]
pub const fn sdben(&self) -> bool {
let val = (self.0 >> 14usize) & 0x01;
val != 0
}
#[doc = "Enable Step Down converter Bypass mode enabled"]
#[inline(always)]
pub fn set_sdben(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 14usize)) | (((val as u32) & 0x01) << 14usize);
}
#[doc = "Enable Step Down converter SMPS mode enabled"]
#[inline(always)]
pub const fn sdeb(&self) -> bool {
let val = (self.0 >> 15usize) & 0x01;
val != 0
}
#[doc = "Enable Step Down converter SMPS mode enabled"]
#[inline(always)]
pub fn set_sdeb(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 15usize)) | (((val as u32) & 0x01) << 15usize);
}
}
impl Default for Cr5 {
#[inline(always)]
fn default() -> Cr5 {
Cr5(0)
}
}
impl core::fmt::Debug for Cr5 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("Cr5")
.field("sdvos", &self.sdvos())
.field("sdsc", &self.sdsc())
.field("borhc", &self.borhc())
.field("smpscfg", &self.smpscfg())
.field("sdben", &self.sdben())
.field("sdeb", &self.sdeb())
.finish()
}
}
#[cfg(feature = "defmt")]
impl defmt::Format for Cr5 {
fn format(&self, f: defmt::Formatter) {
defmt :: write ! (f , "Cr5 {{ sdvos: {=u8:?}, sdsc: {=u8:?}, borhc: {=bool:?}, smpscfg: {=bool:?}, sdben: {=bool:?}, sdeb: {=bool:?} }}" , self . sdvos () , self . sdsc () , self . borhc () , self . smpscfg () , self . sdben () , self . sdeb ())
}
}
#[doc = "Power status clear register"]
#[repr(transparent)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Extscr(pub u32);
impl Extscr {
#[doc = "Clear CPU1 Stop Standby flags"]
#[inline(always)]
pub const fn c1cssf(&self) -> bool {
let val = (self.0 >> 0usize) & 0x01;
val != 0
}
#[doc = "Clear CPU1 Stop Standby flags"]
#[inline(always)]
pub fn set_c1cssf(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize);
}
#[doc = "Clear CPU2 Stop Standby flags"]
#[inline(always)]
pub const fn c2cssf(&self) -> bool {
let val = (self.0 >> 1usize) & 0x01;
val != 0
}
#[doc = "Clear CPU2 Stop Standby flags"]
#[inline(always)]
pub fn set_c2cssf(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize);
}
#[doc = "Clear Critical Radio system phase"]
#[inline(always)]
pub const fn ccrpf(&self) -> bool {
let val = (self.0 >> 2usize) & 0x01;
val != 0
}
#[doc = "Clear Critical Radio system phase"]
#[inline(always)]
pub fn set_ccrpf(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize);
}
#[doc = "System Standby flag for CPU1"]
#[inline(always)]
pub const fn c1sbf(&self) -> bool {
let val = (self.0 >> 8usize) & 0x01;
val != 0
}
#[doc = "System Standby flag for CPU1"]
#[inline(always)]
pub fn set_c1sbf(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize);
}
#[doc = "System Stop flag for CPU1"]
#[inline(always)]
pub const fn c1stopf(&self) -> bool {
let val = (self.0 >> 9usize) & 0x01;
val != 0
}
#[doc = "System Stop flag for CPU1"]
#[inline(always)]
pub fn set_c1stopf(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 9usize)) | (((val as u32) & 0x01) << 9usize);
}
#[doc = "System Standby flag for CPU2"]
#[inline(always)]
pub const fn c2sbf(&self) -> bool {
let val = (self.0 >> 10usize) & 0x01;
val != 0
}
#[doc = "System Standby flag for CPU2"]
#[inline(always)]
pub fn set_c2sbf(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 10usize)) | (((val as u32) & 0x01) << 10usize);
}
#[doc = "System Stop flag for CPU2"]
#[inline(always)]
pub const fn c2stopf(&self) -> bool {
let val = (self.0 >> 11usize) & 0x01;
val != 0
}
#[doc = "System Stop flag for CPU2"]
#[inline(always)]
pub fn set_c2stopf(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 11usize)) | (((val as u32) & 0x01) << 11usize);
}
#[doc = "Critical Radio system phase"]
#[inline(always)]
pub const fn crpf(&self) -> bool {
let val = (self.0 >> 13usize) & 0x01;
val != 0
}
#[doc = "Critical Radio system phase"]
#[inline(always)]
pub fn set_crpf(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 13usize)) | (((val as u32) & 0x01) << 13usize);
}
#[doc = "CPU1 deepsleep mode"]
#[inline(always)]
pub const fn c1ds(&self) -> bool {
let val = (self.0 >> 14usize) & 0x01;
val != 0
}
#[doc = "CPU1 deepsleep mode"]
#[inline(always)]
pub fn set_c1ds(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 14usize)) | (((val as u32) & 0x01) << 14usize);
}
#[doc = "CPU2 deepsleep mode"]
#[inline(always)]
pub const fn c2ds(&self) -> bool {
let val = (self.0 >> 15usize) & 0x01;
val != 0
}
#[doc = "CPU2 deepsleep mode"]
#[inline(always)]
pub fn set_c2ds(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 15usize)) | (((val as u32) & 0x01) << 15usize);
}
}
impl Default for Extscr {
#[inline(always)]
fn default() -> Extscr {
Extscr(0)
}
}
impl core::fmt::Debug for Extscr {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("Extscr")
.field("c1cssf", &self.c1cssf())
.field("c2cssf", &self.c2cssf())
.field("ccrpf", &self.ccrpf())
.field("c1sbf", &self.c1sbf())
.field("c1stopf", &self.c1stopf())
.field("c2sbf", &self.c2sbf())
.field("c2stopf", &self.c2stopf())
.field("crpf", &self.crpf())
.field("c1ds", &self.c1ds())
.field("c2ds", &self.c2ds())
.finish()
}
}
#[cfg(feature = "defmt")]
impl defmt::Format for Extscr {
fn format(&self, f: defmt::Formatter) {
defmt :: write ! (f , "Extscr {{ c1cssf: {=bool:?}, c2cssf: {=bool:?}, ccrpf: {=bool:?}, c1sbf: {=bool:?}, c1stopf: {=bool:?}, c2sbf: {=bool:?}, c2stopf: {=bool:?}, crpf: {=bool:?}, c1ds: {=bool:?}, c2ds: {=bool:?} }}" , self . c1cssf () , self . c2cssf () , self . ccrpf () , self . c1sbf () , self . c1stopf () , self . c2sbf () , self . c2stopf () , self . crpf () , self . c1ds () , self . c2ds ())
}
}
#[doc = "Power Port pull-up/down control register"]
#[repr(transparent)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Pxcr(pub u32);
impl Pxcr {
#[doc = "Port A pull-up/down bit y (y=0..15)"]
#[inline(always)]
pub const fn pd(&self, n: usize) -> bool {
assert!(n < 16usize);
let offs = 0usize + n * 1usize;
let val = (self.0 >> offs) & 0x01;
val != 0
}
#[doc = "Port A pull-up/down bit y (y=0..15)"]
#[inline(always)]
pub fn set_pd(&mut self, n: usize, val: bool) {
assert!(n < 16usize);
let offs = 0usize + n * 1usize;
self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs);
}
}
impl Default for Pxcr {
#[inline(always)]
fn default() -> Pxcr {
Pxcr(0)
}
}
impl core::fmt::Debug for Pxcr {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("Pxcr")
.field("pd[0]", &self.pd(0usize))
.field("pd[1]", &self.pd(1usize))
.field("pd[2]", &self.pd(2usize))
.field("pd[3]", &self.pd(3usize))
.field("pd[4]", &self.pd(4usize))
.field("pd[5]", &self.pd(5usize))
.field("pd[6]", &self.pd(6usize))
.field("pd[7]", &self.pd(7usize))
.field("pd[8]", &self.pd(8usize))
.field("pd[9]", &self.pd(9usize))
.field("pd[10]", &self.pd(10usize))
.field("pd[11]", &self.pd(11usize))
.field("pd[12]", &self.pd(12usize))
.field("pd[13]", &self.pd(13usize))
.field("pd[14]", &self.pd(14usize))
.field("pd[15]", &self.pd(15usize))
.finish()
}
}
#[cfg(feature = "defmt")]
impl defmt::Format for Pxcr {
fn format(&self, f: defmt::Formatter) {
defmt :: write ! (f , "Pxcr {{ pd[0]: {=bool:?}, pd[1]: {=bool:?}, pd[2]: {=bool:?}, pd[3]: {=bool:?}, pd[4]: {=bool:?}, pd[5]: {=bool:?}, pd[6]: {=bool:?}, pd[7]: {=bool:?}, pd[8]: {=bool:?}, pd[9]: {=bool:?}, pd[10]: {=bool:?}, pd[11]: {=bool:?}, pd[12]: {=bool:?}, pd[13]: {=bool:?}, pd[14]: {=bool:?}, pd[15]: {=bool:?} }}" , self . pd (0usize) , self . pd (1usize) , self . pd (2usize) , self . pd (3usize) , self . pd (4usize) , self . pd (5usize) , self . pd (6usize) , self . pd (7usize) , self . pd (8usize) , self . pd (9usize) , self . pd (10usize) , self . pd (11usize) , self . pd (12usize) , self . pd (13usize) , self . pd (14usize) , self . pd (15usize))
}
}
#[doc = "Power status clear register"]
#[repr(transparent)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Scr(pub u32);
impl Scr {
#[doc = "Clear wakeup flag 1"]
#[inline(always)]
pub const fn cwuf(&self, n: usize) -> bool {
assert!(n < 5usize);
let offs = 0usize + n * 1usize;
let val = (self.0 >> offs) & 0x01;
val != 0
}
#[doc = "Clear wakeup flag 1"]
#[inline(always)]
pub fn set_cwuf(&mut self, n: usize, val: bool) {
assert!(n < 5usize);
let offs = 0usize + n * 1usize;
self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs);
}
#[doc = "Clear SMPS Step Down converter forced in Bypass interrupt flag"]
#[inline(always)]
pub const fn csmpsfbf(&self) -> bool {
let val = (self.0 >> 7usize) & 0x01;
val != 0
}
#[doc = "Clear SMPS Step Down converter forced in Bypass interrupt flag"]
#[inline(always)]
pub fn set_csmpsfbf(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize);
}
#[doc = "Clear BORH interrupt flag"]
#[inline(always)]
pub const fn cborhf(&self) -> bool {
let val = (self.0 >> 8usize) & 0x01;
val != 0
}
#[doc = "Clear BORH interrupt flag"]
#[inline(always)]
pub fn set_cborhf(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize);
}
#[doc = "Clear BLE wakeup interrupt flag"]
#[inline(always)]
pub const fn cblewuf(&self) -> bool {
let val = (self.0 >> 9usize) & 0x01;
val != 0
}
#[doc = "Clear BLE wakeup interrupt flag"]
#[inline(always)]
pub fn set_cblewuf(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 9usize)) | (((val as u32) & 0x01) << 9usize);
}
#[doc = "Clear 802.15.4 wakeup interrupt flag"]
#[inline(always)]
pub const fn c802wuf(&self) -> bool {
let val = (self.0 >> 10usize) & 0x01;
val != 0
}
#[doc = "Clear 802.15.4 wakeup interrupt flag"]
#[inline(always)]
pub fn set_c802wuf(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 10usize)) | (((val as u32) & 0x01) << 10usize);
}
#[doc = "Clear critical radio phase end of activity interrupt flag"]
#[inline(always)]
pub const fn ccrpef(&self) -> bool {
let val = (self.0 >> 11usize) & 0x01;
val != 0
}
#[doc = "Clear critical radio phase end of activity interrupt flag"]
#[inline(always)]
pub fn set_ccrpef(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 11usize)) | (((val as u32) & 0x01) << 11usize);
}
#[doc = "Clear BLE end of activity interrupt flag"]
#[inline(always)]
pub const fn cbleaf(&self) -> bool {
let val = (self.0 >> 12usize) & 0x01;
val != 0
}
#[doc = "Clear BLE end of activity interrupt flag"]
#[inline(always)]
pub fn set_cbleaf(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 12usize)) | (((val as u32) & 0x01) << 12usize);
}
#[doc = "Clear 802.15.4 end of activity interrupt flag"]
#[inline(always)]
pub const fn c802af(&self) -> bool {
let val = (self.0 >> 13usize) & 0x01;
val != 0
}
#[doc = "Clear 802.15.4 end of activity interrupt flag"]
#[inline(always)]
pub fn set_c802af(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 13usize)) | (((val as u32) & 0x01) << 13usize);
}
#[doc = "Clear CPU2 Hold interrupt flag"]
#[inline(always)]
pub const fn cc2hf(&self) -> bool {
let val = (self.0 >> 14usize) & 0x01;
val != 0
}
#[doc = "Clear CPU2 Hold interrupt flag"]
#[inline(always)]
pub fn set_cc2hf(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 14usize)) | (((val as u32) & 0x01) << 14usize);
}
}
impl Default for Scr {
#[inline(always)]
fn default() -> Scr {
Scr(0)
}
}
impl core::fmt::Debug for Scr {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("Scr")
.field("cwuf[0]", &self.cwuf(0usize))
.field("cwuf[1]", &self.cwuf(1usize))
.field("cwuf[2]", &self.cwuf(2usize))
.field("cwuf[3]", &self.cwuf(3usize))
.field("cwuf[4]", &self.cwuf(4usize))
.field("csmpsfbf", &self.csmpsfbf())
.field("cborhf", &self.cborhf())
.field("cblewuf", &self.cblewuf())
.field("c802wuf", &self.c802wuf())
.field("ccrpef", &self.ccrpef())
.field("cbleaf", &self.cbleaf())
.field("c802af", &self.c802af())
.field("cc2hf", &self.cc2hf())
.finish()
}
}
#[cfg(feature = "defmt")]
impl defmt::Format for Scr {
fn format(&self, f: defmt::Formatter) {
defmt :: write ! (f , "Scr {{ cwuf[0]: {=bool:?}, cwuf[1]: {=bool:?}, cwuf[2]: {=bool:?}, cwuf[3]: {=bool:?}, cwuf[4]: {=bool:?}, csmpsfbf: {=bool:?}, cborhf: {=bool:?}, cblewuf: {=bool:?}, c802wuf: {=bool:?}, ccrpef: {=bool:?}, cbleaf: {=bool:?}, c802af: {=bool:?}, cc2hf: {=bool:?} }}" , self . cwuf (0usize) , self . cwuf (1usize) , self . cwuf (2usize) , self . cwuf (3usize) , self . cwuf (4usize) , self . csmpsfbf () , self . cborhf () , self . cblewuf () , self . c802wuf () , self . ccrpef () , self . cbleaf () , self . c802af () , self . cc2hf ())
}
}
#[doc = "Power status register 1"]
#[repr(transparent)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Sr1(pub u32);
impl Sr1 {
#[doc = "Wakeup flag 1"]
#[inline(always)]
pub const fn cwuf(&self, n: usize) -> bool {
assert!(n < 5usize);
let offs = 0usize + n * 1usize;
let val = (self.0 >> offs) & 0x01;
val != 0
}
#[doc = "Wakeup flag 1"]
#[inline(always)]
pub fn set_cwuf(&mut self, n: usize, val: bool) {
assert!(n < 5usize);
let offs = 0usize + n * 1usize;
self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs);
}
#[doc = "Step Down converter forced in Bypass interrupt flag"]
#[inline(always)]
pub const fn sdfbf(&self) -> bool {
let val = (self.0 >> 7usize) & 0x01;
val != 0
}
#[doc = "Step Down converter forced in Bypass interrupt flag"]
#[inline(always)]
pub fn set_sdfbf(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize);
}
#[doc = "BORH interrupt flag"]
#[inline(always)]
pub const fn borhf(&self) -> bool {
let val = (self.0 >> 8usize) & 0x01;
val != 0
}
#[doc = "BORH interrupt flag"]
#[inline(always)]
pub fn set_borhf(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize);
}
#[doc = "BLE wakeup interrupt flag"]
#[inline(always)]
pub const fn blewuf(&self) -> bool {
let val = (self.0 >> 9usize) & 0x01;
val != 0
}
#[doc = "BLE wakeup interrupt flag"]
#[inline(always)]
pub fn set_blewuf(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 9usize)) | (((val as u32) & 0x01) << 9usize);
}
#[doc = "802.15.4 wakeup interrupt flag"]
#[inline(always)]
pub const fn _802wuf(&self) -> bool {
let val = (self.0 >> 10usize) & 0x01;
val != 0
}
#[doc = "802.15.4 wakeup interrupt flag"]
#[inline(always)]
pub fn set__802wuf(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 10usize)) | (((val as u32) & 0x01) << 10usize);
}
#[doc = "Enable critical radio phase end of activity interrupt flag"]
#[inline(always)]
pub const fn crpef(&self) -> bool {
let val = (self.0 >> 11usize) & 0x01;
val != 0
}
#[doc = "Enable critical radio phase end of activity interrupt flag"]
#[inline(always)]
pub fn set_crpef(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 11usize)) | (((val as u32) & 0x01) << 11usize);
}
#[doc = "BLE end of activity interrupt flag"]
#[inline(always)]
pub const fn bleaf(&self) -> bool {
let val = (self.0 >> 12usize) & 0x01;
val != 0
}
#[doc = "BLE end of activity interrupt flag"]
#[inline(always)]
pub fn set_bleaf(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 12usize)) | (((val as u32) & 0x01) << 12usize);
}
#[doc = "802.15.4 end of activity interrupt flag"]
#[inline(always)]
pub const fn af802(&self) -> bool {
let val = (self.0 >> 13usize) & 0x01;
val != 0
}
#[doc = "802.15.4 end of activity interrupt flag"]
#[inline(always)]
pub fn set_af802(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 13usize)) | (((val as u32) & 0x01) << 13usize);
}
#[doc = "CPU2 Hold interrupt flag"]
#[inline(always)]
pub const fn c2hf(&self) -> bool {
let val = (self.0 >> 14usize) & 0x01;
val != 0
}
#[doc = "CPU2 Hold interrupt flag"]
#[inline(always)]
pub fn set_c2hf(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 14usize)) | (((val as u32) & 0x01) << 14usize);
}
#[doc = "Internal Wakeup interrupt flag"]
#[inline(always)]
pub const fn wufi(&self) -> bool {
let val = (self.0 >> 15usize) & 0x01;
val != 0
}
#[doc = "Internal Wakeup interrupt flag"]
#[inline(always)]
pub fn set_wufi(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 15usize)) | (((val as u32) & 0x01) << 15usize);
}
}
impl Default for Sr1 {
#[inline(always)]
fn default() -> Sr1 {
Sr1(0)
}
}
impl core::fmt::Debug for Sr1 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("Sr1")
.field("cwuf[0]", &self.cwuf(0usize))
.field("cwuf[1]", &self.cwuf(1usize))
.field("cwuf[2]", &self.cwuf(2usize))
.field("cwuf[3]", &self.cwuf(3usize))
.field("cwuf[4]", &self.cwuf(4usize))
.field("sdfbf", &self.sdfbf())
.field("borhf", &self.borhf())
.field("blewuf", &self.blewuf())
.field("_802wuf", &self._802wuf())
.field("crpef", &self.crpef())
.field("bleaf", &self.bleaf())
.field("af802", &self.af802())
.field("c2hf", &self.c2hf())
.field("wufi", &self.wufi())
.finish()
}
}
#[cfg(feature = "defmt")]
impl defmt::Format for Sr1 {
fn format(&self, f: defmt::Formatter) {
defmt :: write ! (f , "Sr1 {{ cwuf[0]: {=bool:?}, cwuf[1]: {=bool:?}, cwuf[2]: {=bool:?}, cwuf[3]: {=bool:?}, cwuf[4]: {=bool:?}, sdfbf: {=bool:?}, borhf: {=bool:?}, blewuf: {=bool:?}, _802wuf: {=bool:?}, crpef: {=bool:?}, bleaf: {=bool:?}, af802: {=bool:?}, c2hf: {=bool:?}, wufi: {=bool:?} }}" , self . cwuf (0usize) , self . cwuf (1usize) , self . cwuf (2usize) , self . cwuf (3usize) , self . cwuf (4usize) , self . sdfbf () , self . borhf () , self . blewuf () , self . _802wuf () , self . crpef () , self . bleaf () , self . af802 () , self . c2hf () , self . wufi ())
}
}
#[doc = "Power status register 2"]
#[repr(transparent)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Sr2(pub u32);
impl Sr2 {
#[doc = "Step Down converter Bypass mode flag"]
#[inline(always)]
pub const fn sdbf(&self) -> bool {
let val = (self.0 >> 0usize) & 0x01;
val != 0
}
#[doc = "Step Down converter Bypass mode flag"]
#[inline(always)]
pub fn set_sdbf(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize);
}
#[doc = "Step Down converter SMPS mode flag"]
#[inline(always)]
pub const fn sdsmpsf(&self) -> bool {
let val = (self.0 >> 1usize) & 0x01;
val != 0
}
#[doc = "Step Down converter SMPS mode flag"]
#[inline(always)]
pub fn set_sdsmpsf(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize);
}
#[doc = "Low-power regulator started"]
#[inline(always)]
pub const fn reglps(&self) -> bool {
let val = (self.0 >> 8usize) & 0x01;
val != 0
}
#[doc = "Low-power regulator started"]
#[inline(always)]
pub fn set_reglps(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize);
}
#[doc = "Low-power regulator flag"]
#[inline(always)]
pub const fn reglpf(&self) -> bool {
let val = (self.0 >> 9usize) & 0x01;
val != 0
}
#[doc = "Low-power regulator flag"]
#[inline(always)]
pub fn set_reglpf(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 9usize)) | (((val as u32) & 0x01) << 9usize);
}
#[doc = "Voltage scaling flag"]
#[inline(always)]
pub const fn vosf(&self) -> bool {
let val = (self.0 >> 10usize) & 0x01;
val != 0
}
#[doc = "Voltage scaling flag"]
#[inline(always)]
pub fn set_vosf(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 10usize)) | (((val as u32) & 0x01) << 10usize);
}
#[doc = "Power voltage detector output"]
#[inline(always)]
pub const fn pvdo(&self) -> bool {
let val = (self.0 >> 11usize) & 0x01;
val != 0
}
#[doc = "Power voltage detector output"]
#[inline(always)]
pub fn set_pvdo(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 11usize)) | (((val as u32) & 0x01) << 11usize);
}
#[doc = "Peripheral voltage monitoring output: VDDUSB vs. 1.2 V"]
#[inline(always)]
pub const fn pvmo1(&self) -> bool {
let val = (self.0 >> 12usize) & 0x01;
val != 0
}
#[doc = "Peripheral voltage monitoring output: VDDUSB vs. 1.2 V"]
#[inline(always)]
pub fn set_pvmo1(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 12usize)) | (((val as u32) & 0x01) << 12usize);
}
#[doc = "Peripheral voltage monitoring output: VDDA vs. 1.62 V"]
#[inline(always)]
pub const fn pvmo3(&self) -> bool {
let val = (self.0 >> 14usize) & 0x01;
val != 0
}
#[doc = "Peripheral voltage monitoring output: VDDA vs. 1.62 V"]
#[inline(always)]
pub fn set_pvmo3(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 14usize)) | (((val as u32) & 0x01) << 14usize);
}
}
impl Default for Sr2 {
#[inline(always)]
fn default() -> Sr2 {
Sr2(0)
}
}
impl core::fmt::Debug for Sr2 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("Sr2")
.field("sdbf", &self.sdbf())
.field("sdsmpsf", &self.sdsmpsf())
.field("reglps", &self.reglps())
.field("reglpf", &self.reglpf())
.field("vosf", &self.vosf())
.field("pvdo", &self.pvdo())
.field("pvmo1", &self.pvmo1())
.field("pvmo3", &self.pvmo3())
.finish()
}
}
#[cfg(feature = "defmt")]
impl defmt::Format for Sr2 {
fn format(&self, f: defmt::Formatter) {
defmt :: write ! (f , "Sr2 {{ sdbf: {=bool:?}, sdsmpsf: {=bool:?}, reglps: {=bool:?}, reglpf: {=bool:?}, vosf: {=bool:?}, pvdo: {=bool:?}, pvmo1: {=bool:?}, pvmo3: {=bool:?} }}" , self . sdbf () , self . sdsmpsf () , self . reglps () , self . reglpf () , self . vosf () , self . pvdo () , self . pvmo1 () , self . pvmo3 ())
}
}
}