[][src]Struct stm32l5::R

pub struct R<U, T> { /* fields omitted */ }

Register/field reader

Result of the read method of a register. Also it can be used in the modify method

Implementations

impl<U, T> R<U, T> where
    U: Copy
[src]

pub fn bits(&self) -> U[src]

Read raw bits from register/field

impl<FI> R<bool, FI>[src]

pub fn bit(&self) -> bool[src]

Value of the field as raw bits

pub fn bit_is_clear(&self) -> bool[src]

Returns true if the bit is clear (0)

pub fn bit_is_set(&self) -> bool[src]

Returns true if the bit is set (1)

impl R<u32, Reg<u32, _CH0CFGR1>>[src]

pub fn dfsdmen(&self) -> DFSDMEN_R[src]

Bit 31 - DFSDMEN

pub fn ckoutsrc(&self) -> CKOUTSRC_R[src]

Bit 30 - CKOUTSRC

pub fn ckoutdiv(&self) -> CKOUTDIV_R[src]

Bits 16:23 - CKOUTDIV

pub fn datpack(&self) -> DATPACK_R[src]

Bits 14:15 - DATPACK

pub fn datmpx(&self) -> DATMPX_R[src]

Bits 12:13 - DATMPX

pub fn chinsel(&self) -> CHINSEL_R[src]

Bit 8 - CHINSEL

pub fn chen(&self) -> CHEN_R[src]

Bit 7 - CHEN

pub fn ckaben(&self) -> CKABEN_R[src]

Bit 6 - CKABEN

pub fn scden(&self) -> SCDEN_R[src]

Bit 5 - SCDEN

pub fn spicksel(&self) -> SPICKSEL_R[src]

Bits 2:3 - SPICKSEL

pub fn sitp(&self) -> SITP_R[src]

Bits 0:1 - SITP

impl R<u32, Reg<u32, _CH0CFGR2>>[src]

pub fn offset(&self) -> OFFSET_R[src]

Bits 8:31 - OFFSET

pub fn dtrbs(&self) -> DTRBS_R[src]

Bits 3:7 - DTRBS

impl R<u32, Reg<u32, _CH0AWSCDR>>[src]

pub fn awford(&self) -> AWFORD_R[src]

Bits 22:23 - AWFORD

pub fn awfosr(&self) -> AWFOSR_R[src]

Bits 16:20 - AWFOSR

pub fn bkscd(&self) -> BKSCD_R[src]

Bits 12:15 - BKSCD

pub fn scdt(&self) -> SCDT_R[src]

Bits 0:7 - SCDT

impl R<u32, Reg<u32, _CH0WDATR>>[src]

pub fn wdata(&self) -> WDATA_R[src]

Bits 0:15 - WDATA

impl R<u32, Reg<u32, _CH0DATINR>>[src]

pub fn indat1(&self) -> INDAT1_R[src]

Bits 16:31 - INDAT1

pub fn indat0(&self) -> INDAT0_R[src]

Bits 0:15 - INDAT0

impl R<u32, Reg<u32, _CH1CFGR1>>[src]

pub fn datpack(&self) -> DATPACK_R[src]

Bits 14:15 - DATPACK

pub fn datmpx(&self) -> DATMPX_R[src]

Bits 12:13 - DATMPX

pub fn chinsel(&self) -> CHINSEL_R[src]

Bit 8 - CHINSEL

pub fn chen(&self) -> CHEN_R[src]

Bit 7 - CHEN

pub fn ckaben(&self) -> CKABEN_R[src]

Bit 6 - CKABEN

pub fn scden(&self) -> SCDEN_R[src]

Bit 5 - SCDEN

pub fn spicksel(&self) -> SPICKSEL_R[src]

Bits 2:3 - SPICKSEL

pub fn sitp(&self) -> SITP_R[src]

Bits 0:1 - SITP

pub fn ckoutdiv(&self) -> CKOUTDIV_R[src]

Bits 16:23 - Output serial clock divider

pub fn ckoutsrc(&self) -> CKOUTSRC_R[src]

Bit 30 - Output serial clock source selection

pub fn dfsdmen(&self) -> DFSDMEN_R[src]

Bit 31 - Global enable for DFSDM interface

impl R<u32, Reg<u32, _CH1CFGR2>>[src]

pub fn offset(&self) -> OFFSET_R[src]

Bits 8:31 - OFFSET

pub fn dtrbs(&self) -> DTRBS_R[src]

Bits 3:7 - DTRBS

impl R<u32, Reg<u32, _CH1AWSCDR>>[src]

pub fn awford(&self) -> AWFORD_R[src]

Bits 22:23 - AWFORD

pub fn awfosr(&self) -> AWFOSR_R[src]

Bits 16:20 - AWFOSR

pub fn bkscd(&self) -> BKSCD_R[src]

Bits 12:15 - BKSCD

pub fn scdt(&self) -> SCDT_R[src]

Bits 0:7 - SCDT

impl R<u32, Reg<u32, _CH1WDATR>>[src]

pub fn wdata(&self) -> WDATA_R[src]

Bits 0:15 - WDATA

impl R<u32, Reg<u32, _CH1DATINR>>[src]

pub fn indat1(&self) -> INDAT1_R[src]

Bits 16:31 - INDAT1

pub fn indat0(&self) -> INDAT0_R[src]

Bits 0:15 - INDAT0

impl R<u32, Reg<u32, _CH2CFGR1>>[src]

pub fn datpack(&self) -> DATPACK_R[src]

Bits 14:15 - DATPACK

pub fn datmpx(&self) -> DATMPX_R[src]

Bits 12:13 - DATMPX

pub fn chinsel(&self) -> CHINSEL_R[src]

Bit 8 - CHINSEL

pub fn chen(&self) -> CHEN_R[src]

Bit 7 - CHEN

pub fn ckaben(&self) -> CKABEN_R[src]

Bit 6 - CKABEN

pub fn scden(&self) -> SCDEN_R[src]

Bit 5 - SCDEN

pub fn spicksel(&self) -> SPICKSEL_R[src]

Bits 2:3 - SPICKSEL

pub fn sitp(&self) -> SITP_R[src]

Bits 0:1 - SITP

pub fn ckoutdiv(&self) -> CKOUTDIV_R[src]

Bits 16:23 - Output serial clock divider

pub fn ckoutsrc(&self) -> CKOUTSRC_R[src]

Bit 30 - Output serial clock source selection

pub fn dfsdmen(&self) -> DFSDMEN_R[src]

Bit 31 - Global enable for DFSDM interface

impl R<u32, Reg<u32, _CH2CFGR2>>[src]

pub fn offset(&self) -> OFFSET_R[src]

Bits 8:31 - OFFSET

pub fn dtrbs(&self) -> DTRBS_R[src]

Bits 3:7 - DTRBS

impl R<u32, Reg<u32, _CH2AWSCDR>>[src]

pub fn awford(&self) -> AWFORD_R[src]

Bits 22:23 - AWFORD

pub fn awfosr(&self) -> AWFOSR_R[src]

Bits 16:20 - AWFOSR

pub fn bkscd(&self) -> BKSCD_R[src]

Bits 12:15 - BKSCD

pub fn scdt(&self) -> SCDT_R[src]

Bits 0:7 - SCDT

impl R<u32, Reg<u32, _CH2WDATR>>[src]

pub fn wdata(&self) -> WDATA_R[src]

Bits 0:15 - WDATA

impl R<u32, Reg<u32, _CH2DATINR>>[src]

pub fn indat1(&self) -> INDAT1_R[src]

Bits 16:31 - INDAT1

pub fn indat0(&self) -> INDAT0_R[src]

Bits 0:15 - INDAT0

impl R<u32, Reg<u32, _CH3CFGR1>>[src]

pub fn datpack(&self) -> DATPACK_R[src]

Bits 14:15 - DATPACK

pub fn datmpx(&self) -> DATMPX_R[src]

Bits 12:13 - DATMPX

pub fn chinsel(&self) -> CHINSEL_R[src]

Bit 8 - CHINSEL

pub fn chen(&self) -> CHEN_R[src]

Bit 7 - CHEN

pub fn ckaben(&self) -> CKABEN_R[src]

Bit 6 - CKABEN

pub fn scden(&self) -> SCDEN_R[src]

Bit 5 - SCDEN

pub fn spicksel(&self) -> SPICKSEL_R[src]

Bits 2:3 - SPICKSEL

pub fn sitp(&self) -> SITP_R[src]

Bits 0:1 - SITP

pub fn ckoutdiv(&self) -> CKOUTDIV_R[src]

Bits 16:23 - Output serial clock divider

pub fn ckoutsrc(&self) -> CKOUTSRC_R[src]

Bit 30 - Output serial clock source selection

pub fn dfsdmen(&self) -> DFSDMEN_R[src]

Bit 31 - Global enable for DFSDM interface

impl R<u32, Reg<u32, _CH3CFGR2>>[src]

pub fn offset(&self) -> OFFSET_R[src]

Bits 8:31 - OFFSET

pub fn dtrbs(&self) -> DTRBS_R[src]

Bits 3:7 - DTRBS

impl R<u32, Reg<u32, _CH3AWSCDR>>[src]

pub fn awford(&self) -> AWFORD_R[src]

Bits 22:23 - AWFORD

pub fn awfosr(&self) -> AWFOSR_R[src]

Bits 16:20 - AWFOSR

pub fn bkscd(&self) -> BKSCD_R[src]

Bits 12:15 - BKSCD

pub fn scdt(&self) -> SCDT_R[src]

Bits 0:7 - SCDT

impl R<u32, Reg<u32, _CH3WDATR>>[src]

pub fn wdata(&self) -> WDATA_R[src]

Bits 0:15 - WDATA

impl R<u32, Reg<u32, _CH3DATINR>>[src]

pub fn indat1(&self) -> INDAT1_R[src]

Bits 16:31 - INDAT1

pub fn indat0(&self) -> INDAT0_R[src]

Bits 0:15 - INDAT0

impl R<u32, Reg<u32, _CH4CFGR1>>[src]

pub fn datpack(&self) -> DATPACK_R[src]

Bits 14:15 - DATPACK

pub fn datmpx(&self) -> DATMPX_R[src]

Bits 12:13 - DATMPX

pub fn chinsel(&self) -> CHINSEL_R[src]

Bit 8 - CHINSEL

pub fn chen(&self) -> CHEN_R[src]

Bit 7 - CHEN

pub fn ckaben(&self) -> CKABEN_R[src]

Bit 6 - CKABEN

pub fn scden(&self) -> SCDEN_R[src]

Bit 5 - SCDEN

pub fn spicksel(&self) -> SPICKSEL_R[src]

Bits 2:3 - SPICKSEL

pub fn sitp(&self) -> SITP_R[src]

Bits 0:1 - SITP

pub fn ckoutdiv(&self) -> CKOUTDIV_R[src]

Bits 16:23 - Output serial clock divider

pub fn ckoutsrc(&self) -> CKOUTSRC_R[src]

Bit 30 - Output serial clock source selection

pub fn dfsdmen(&self) -> DFSDMEN_R[src]

Bit 31 - Global enable for DFSDM interface

impl R<u32, Reg<u32, _CH4CFGR2>>[src]

pub fn offset(&self) -> OFFSET_R[src]

Bits 8:31 - OFFSET

pub fn dtrbs(&self) -> DTRBS_R[src]

Bits 3:7 - DTRBS

impl R<u32, Reg<u32, _CH4AWSCDR>>[src]

pub fn awford(&self) -> AWFORD_R[src]

Bits 22:23 - AWFORD

pub fn awfosr(&self) -> AWFOSR_R[src]

Bits 16:20 - AWFOSR

pub fn bkscd(&self) -> BKSCD_R[src]

Bits 12:15 - BKSCD

pub fn scdt(&self) -> SCDT_R[src]

Bits 0:7 - SCDT

impl R<u32, Reg<u32, _CH4WDATR>>[src]

pub fn wdata(&self) -> WDATA_R[src]

Bits 0:15 - WDATA

impl R<u32, Reg<u32, _CH4DATINR>>[src]

pub fn indat1(&self) -> INDAT1_R[src]

Bits 16:31 - INDAT1

pub fn indat0(&self) -> INDAT0_R[src]

Bits 0:15 - INDAT0

impl R<u32, Reg<u32, _CH5CFGR1>>[src]

pub fn datpack(&self) -> DATPACK_R[src]

Bits 14:15 - DATPACK

pub fn datmpx(&self) -> DATMPX_R[src]

Bits 12:13 - DATMPX

pub fn chinsel(&self) -> CHINSEL_R[src]

Bit 8 - CHINSEL

pub fn chen(&self) -> CHEN_R[src]

Bit 7 - CHEN

pub fn ckaben(&self) -> CKABEN_R[src]

Bit 6 - CKABEN

pub fn scden(&self) -> SCDEN_R[src]

Bit 5 - SCDEN

pub fn spicksel(&self) -> SPICKSEL_R[src]

Bits 2:3 - SPICKSEL

pub fn sitp(&self) -> SITP_R[src]

Bits 0:1 - SITP

pub fn ckoutdiv(&self) -> CKOUTDIV_R[src]

Bits 16:23 - Output serial clock divider

pub fn ckoutsrc(&self) -> CKOUTSRC_R[src]

Bit 30 - Output serial clock source selection

pub fn dfsdmen(&self) -> DFSDMEN_R[src]

Bit 31 - Global enable for DFSDM interface

impl R<u32, Reg<u32, _CH5CFGR2>>[src]

pub fn offset(&self) -> OFFSET_R[src]

Bits 8:31 - OFFSET

pub fn dtrbs(&self) -> DTRBS_R[src]

Bits 3:7 - DTRBS

impl R<u32, Reg<u32, _CH5AWSCDR>>[src]

pub fn awford(&self) -> AWFORD_R[src]

Bits 22:23 - AWFORD

pub fn awfosr(&self) -> AWFOSR_R[src]

Bits 16:20 - AWFOSR

pub fn bkscd(&self) -> BKSCD_R[src]

Bits 12:15 - BKSCD

pub fn scdt(&self) -> SCDT_R[src]

Bits 0:7 - SCDT

impl R<u32, Reg<u32, _CH5WDATR>>[src]

pub fn wdata(&self) -> WDATA_R[src]

Bits 0:15 - WDATA

impl R<u32, Reg<u32, _CH5DATINR>>[src]

pub fn indat1(&self) -> INDAT1_R[src]

Bits 16:31 - INDAT1

pub fn indat0(&self) -> INDAT0_R[src]

Bits 0:15 - INDAT0

impl R<u32, Reg<u32, _CH6CFGR1>>[src]

pub fn datpack(&self) -> DATPACK_R[src]

Bits 14:15 - DATPACK

pub fn datmpx(&self) -> DATMPX_R[src]

Bits 12:13 - DATMPX

pub fn chinsel(&self) -> CHINSEL_R[src]

Bit 8 - CHINSEL

pub fn chen(&self) -> CHEN_R[src]

Bit 7 - CHEN

pub fn ckaben(&self) -> CKABEN_R[src]

Bit 6 - CKABEN

pub fn scden(&self) -> SCDEN_R[src]

Bit 5 - SCDEN

pub fn spicksel(&self) -> SPICKSEL_R[src]

Bits 2:3 - SPICKSEL

pub fn sitp(&self) -> SITP_R[src]

Bits 0:1 - SITP

pub fn ckoutdiv(&self) -> CKOUTDIV_R[src]

Bits 16:23 - Output serial clock divider

pub fn ckoutsrc(&self) -> CKOUTSRC_R[src]

Bit 30 - Output serial clock source selection

pub fn dfsdmen(&self) -> DFSDMEN_R[src]

Bit 31 - Global enable for DFSDM interface

impl R<u32, Reg<u32, _CH6CFGR2>>[src]

pub fn offset(&self) -> OFFSET_R[src]

Bits 8:31 - OFFSET

pub fn dtrbs(&self) -> DTRBS_R[src]

Bits 3:7 - DTRBS

impl R<u32, Reg<u32, _CH6AWSCDR>>[src]

pub fn awford(&self) -> AWFORD_R[src]

Bits 22:23 - AWFORD

pub fn awfosr(&self) -> AWFOSR_R[src]

Bits 16:20 - AWFOSR

pub fn bkscd(&self) -> BKSCD_R[src]

Bits 12:15 - BKSCD

pub fn scdt(&self) -> SCDT_R[src]

Bits 0:7 - SCDT

impl R<u32, Reg<u32, _CH6WDATR>>[src]

pub fn wdata(&self) -> WDATA_R[src]

Bits 0:15 - WDATA

impl R<u32, Reg<u32, _CH6DATINR>>[src]

pub fn indat1(&self) -> INDAT1_R[src]

Bits 16:31 - INDAT1

pub fn indat0(&self) -> INDAT0_R[src]

Bits 0:15 - INDAT0

impl R<u32, Reg<u32, _CH7CFGR1>>[src]

pub fn datpack(&self) -> DATPACK_R[src]

Bits 14:15 - DATPACK

pub fn datmpx(&self) -> DATMPX_R[src]

Bits 12:13 - DATMPX

pub fn chinsel(&self) -> CHINSEL_R[src]

Bit 8 - CHINSEL

pub fn chen(&self) -> CHEN_R[src]

Bit 7 - CHEN

pub fn ckaben(&self) -> CKABEN_R[src]

Bit 6 - CKABEN

pub fn scden(&self) -> SCDEN_R[src]

Bit 5 - SCDEN

pub fn spicksel(&self) -> SPICKSEL_R[src]

Bits 2:3 - SPICKSEL

pub fn sitp(&self) -> SITP_R[src]

Bits 0:1 - SITP

pub fn ckoutdiv(&self) -> CKOUTDIV_R[src]

Bits 16:23 - Output serial clock divider

pub fn ckoutsrc(&self) -> CKOUTSRC_R[src]

Bit 30 - Output serial clock source selection

pub fn dfsdmen(&self) -> DFSDMEN_R[src]

Bit 31 - Global enable for DFSDM interface

impl R<u32, Reg<u32, _CH7CFGR2>>[src]

pub fn offset(&self) -> OFFSET_R[src]

Bits 8:31 - OFFSET

pub fn dtrbs(&self) -> DTRBS_R[src]

Bits 3:7 - DTRBS

impl R<u32, Reg<u32, _CH7AWSCDR>>[src]

pub fn awford(&self) -> AWFORD_R[src]

Bits 22:23 - AWFORD

pub fn awfosr(&self) -> AWFOSR_R[src]

Bits 16:20 - AWFOSR

pub fn bkscd(&self) -> BKSCD_R[src]

Bits 12:15 - BKSCD

pub fn scdt(&self) -> SCDT_R[src]

Bits 0:7 - SCDT

impl R<u32, Reg<u32, _CH7WDATR>>[src]

pub fn wdata(&self) -> WDATA_R[src]

Bits 0:15 - WDATA

impl R<u32, Reg<u32, _CH7DATINR>>[src]

pub fn indat1(&self) -> INDAT1_R[src]

Bits 16:31 - INDAT1

pub fn indat0(&self) -> INDAT0_R[src]

Bits 0:15 - INDAT0

impl R<u32, Reg<u32, _FLT0CR1>>[src]

pub fn awfsel(&self) -> AWFSEL_R[src]

Bit 30 - Analog watchdog fast mode select

pub fn fast(&self) -> FAST_R[src]

Bit 29 - Fast conversion mode selection for regular conversions

pub fn rch(&self) -> RCH_R[src]

Bits 24:26 - Regular channel selection

pub fn rdmaen(&self) -> RDMAEN_R[src]

Bit 21 - DMA channel enabled to read data for the regular conversion

pub fn rsync(&self) -> RSYNC_R[src]

Bit 19 - Launch regular conversion synchronously with DFSDM0

pub fn rcont(&self) -> RCONT_R[src]

Bit 18 - Continuous mode selection for regular conversions

pub fn rswstart(&self) -> RSWSTART_R[src]

Bit 17 - Software start of a conversion on the regular channel

pub fn jexten(&self) -> JEXTEN_R[src]

Bits 13:14 - Trigger enable and trigger edge selection for injected conversions

pub fn jextsel(&self) -> JEXTSEL_R[src]

Bits 8:10 - Trigger signal selection for launching injected conversions

pub fn jdmaen(&self) -> JDMAEN_R[src]

Bit 5 - DMA channel enabled to read data for the injected channel group

pub fn jscan(&self) -> JSCAN_R[src]

Bit 4 - Scanning conversion mode for injected conversions

pub fn jsync(&self) -> JSYNC_R[src]

Bit 3 - Launch an injected conversion synchronously with the DFSDM0 JSWSTART trigger

pub fn jswstart(&self) -> JSWSTART_R[src]

Bit 1 - Start a conversion of the injected group of channels

pub fn dfen(&self) -> DFEN_R[src]

Bit 0 - DFSDM enable

impl R<u32, Reg<u32, _FLT0CR2>>[src]

pub fn awdch(&self) -> AWDCH_R[src]

Bits 16:23 - Analog watchdog channel selection

pub fn exch(&self) -> EXCH_R[src]

Bits 8:15 - Extremes detector channel selection

pub fn ckabie(&self) -> CKABIE_R[src]

Bit 6 - Clock absence interrupt enable

pub fn scdie(&self) -> SCDIE_R[src]

Bit 5 - Short-circuit detector interrupt enable

pub fn awdie(&self) -> AWDIE_R[src]

Bit 4 - Analog watchdog interrupt enable

pub fn rovrie(&self) -> ROVRIE_R[src]

Bit 3 - Regular data overrun interrupt enable

pub fn jovrie(&self) -> JOVRIE_R[src]

Bit 2 - Injected data overrun interrupt enable

pub fn reocie(&self) -> REOCIE_R[src]

Bit 1 - Regular end of conversion interrupt enable

pub fn jeocie(&self) -> JEOCIE_R[src]

Bit 0 - Injected end of conversion interrupt enable

impl R<u32, Reg<u32, _FLT0ISR>>[src]

pub fn scdf(&self) -> SCDF_R[src]

Bits 24:31 - short-circuit detector flag

pub fn ckabf(&self) -> CKABF_R[src]

Bits 16:23 - Clock absence flag

pub fn rcip(&self) -> RCIP_R[src]

Bit 14 - Regular conversion in progress status

pub fn jcip(&self) -> JCIP_R[src]

Bit 13 - Injected conversion in progress status

pub fn awdf(&self) -> AWDF_R[src]

Bit 4 - Analog watchdog

pub fn rovrf(&self) -> ROVRF_R[src]

Bit 3 - Regular conversion overrun flag

pub fn jovrf(&self) -> JOVRF_R[src]

Bit 2 - Injected conversion overrun flag

pub fn reocf(&self) -> REOCF_R[src]

Bit 1 - End of regular conversion flag

pub fn jeocf(&self) -> JEOCF_R[src]

Bit 0 - End of injected conversion flag

impl R<u32, Reg<u32, _FLT0ICR>>[src]

pub fn clrscdf(&self) -> CLRSCDF_R[src]

Bits 24:31 - Clear the short-circuit detector flag

pub fn clrckabf(&self) -> CLRCKABF_R[src]

Bits 16:23 - Clear the clock absence flag

pub fn clrrovrf(&self) -> CLRROVRF_R[src]

Bit 3 - Clear the regular conversion overrun flag

pub fn clrjovrf(&self) -> CLRJOVRF_R[src]

Bit 2 - Clear the injected conversion overrun flag

impl R<u32, Reg<u32, _FLT0JCHGR>>[src]

pub fn jchg(&self) -> JCHG_R[src]

Bits 0:7 - Injected channel group selection

impl R<u32, Reg<u32, _FLT0FCR>>[src]

pub fn ford(&self) -> FORD_R[src]

Bits 29:31 - Sinc filter order

pub fn fosr(&self) -> FOSR_R[src]

Bits 16:25 - Sinc filter oversampling ratio (decimation rate)

pub fn iosr(&self) -> IOSR_R[src]

Bits 0:7 - Integrator oversampling ratio (averaging length)

impl R<u32, Reg<u32, _FLT0JDATAR>>[src]

pub fn jdata(&self) -> JDATA_R[src]

Bits 8:31 - Injected group conversion data

pub fn jdatach(&self) -> JDATACH_R[src]

Bits 0:2 - Injected channel most recently converted

impl R<u32, Reg<u32, _FLT0RDATAR>>[src]

pub fn rdata(&self) -> RDATA_R[src]

Bits 8:31 - Regular channel conversion data

pub fn rpend(&self) -> RPEND_R[src]

Bit 4 - Regular channel pending data

pub fn rdatach(&self) -> RDATACH_R[src]

Bits 0:2 - Regular channel most recently converted

impl R<u32, Reg<u32, _FLT0AWHTR>>[src]

pub fn awht(&self) -> AWHT_R[src]

Bits 8:31 - Analog watchdog high threshold

pub fn bkawh(&self) -> BKAWH_R[src]

Bits 0:3 - Break signal assignment to analog watchdog high threshold event

impl R<u32, Reg<u32, _FLT0AWLTR>>[src]

pub fn awlt(&self) -> AWLT_R[src]

Bits 8:31 - Analog watchdog low threshold

pub fn bkawl(&self) -> BKAWL_R[src]

Bits 0:3 - Break signal assignment to analog watchdog low threshold event

impl R<u32, Reg<u32, _FLT0AWSR>>[src]

pub fn awhtf(&self) -> AWHTF_R[src]

Bits 8:15 - Analog watchdog high threshold flag

pub fn awltf(&self) -> AWLTF_R[src]

Bits 0:7 - Analog watchdog low threshold flag

impl R<u32, Reg<u32, _FLT0AWCFR>>[src]

pub fn clrawhtf(&self) -> CLRAWHTF_R[src]

Bits 8:15 - Clear the analog watchdog high threshold flag

pub fn clrawltf(&self) -> CLRAWLTF_R[src]

Bits 0:7 - Clear the analog watchdog low threshold flag

impl R<u32, Reg<u32, _FLT0EXMAX>>[src]

pub fn exmax(&self) -> EXMAX_R[src]

Bits 8:31 - Extremes detector maximum value

pub fn exmaxch(&self) -> EXMAXCH_R[src]

Bits 0:2 - Extremes detector maximum data channel

impl R<u32, Reg<u32, _FLT0EXMIN>>[src]

pub fn exmin(&self) -> EXMIN_R[src]

Bits 8:31 - EXMIN

pub fn exminch(&self) -> EXMINCH_R[src]

Bits 0:2 - Extremes detector minimum data channel

impl R<u32, Reg<u32, _FLT0CNVTIMR>>[src]

pub fn cnvcnt(&self) -> CNVCNT_R[src]

Bits 4:31 - 28-bit timer counting conversion time t = CNVCNT[27:0] / fDFSDM_CKIN

impl R<u32, Reg<u32, _FLT1CR1>>[src]

pub fn awfsel(&self) -> AWFSEL_R[src]

Bit 30 - Analog watchdog fast mode select

pub fn fast(&self) -> FAST_R[src]

Bit 29 - Fast conversion mode selection for regular conversions

pub fn rch(&self) -> RCH_R[src]

Bits 24:26 - Regular channel selection

pub fn rdmaen(&self) -> RDMAEN_R[src]

Bit 21 - DMA channel enabled to read data for the regular conversion

pub fn rsync(&self) -> RSYNC_R[src]

Bit 19 - Launch regular conversion synchronously with DFSDM0

pub fn rcont(&self) -> RCONT_R[src]

Bit 18 - Continuous mode selection for regular conversions

pub fn rswstart(&self) -> RSWSTART_R[src]

Bit 17 - Software start of a conversion on the regular channel

pub fn jexten(&self) -> JEXTEN_R[src]

Bits 13:14 - Trigger enable and trigger edge selection for injected conversions

pub fn jextsel(&self) -> JEXTSEL_R[src]

Bits 8:10 - Trigger signal selection for launching injected conversions

pub fn jdmaen(&self) -> JDMAEN_R[src]

Bit 5 - DMA channel enabled to read data for the injected channel group

pub fn jscan(&self) -> JSCAN_R[src]

Bit 4 - Scanning conversion mode for injected conversions

pub fn jsync(&self) -> JSYNC_R[src]

Bit 3 - Launch an injected conversion synchronously with the DFSDM0 JSWSTART trigger

pub fn jswstart(&self) -> JSWSTART_R[src]

Bit 1 - Start a conversion of the injected group of channels

pub fn dfen(&self) -> DFEN_R[src]

Bit 0 - DFSDM enable

impl R<u32, Reg<u32, _FLT1CR2>>[src]

pub fn awdch(&self) -> AWDCH_R[src]

Bits 16:23 - Analog watchdog channel selection

pub fn exch(&self) -> EXCH_R[src]

Bits 8:15 - Extremes detector channel selection

pub fn ckabie(&self) -> CKABIE_R[src]

Bit 6 - Clock absence interrupt enable

pub fn scdie(&self) -> SCDIE_R[src]

Bit 5 - Short-circuit detector interrupt enable

pub fn awdie(&self) -> AWDIE_R[src]

Bit 4 - Analog watchdog interrupt enable

pub fn rovrie(&self) -> ROVRIE_R[src]

Bit 3 - Regular data overrun interrupt enable

pub fn jovrie(&self) -> JOVRIE_R[src]

Bit 2 - Injected data overrun interrupt enable

pub fn reocie(&self) -> REOCIE_R[src]

Bit 1 - Regular end of conversion interrupt enable

pub fn jeocie(&self) -> JEOCIE_R[src]

Bit 0 - Injected end of conversion interrupt enable

impl R<u32, Reg<u32, _FLT1ISR>>[src]

pub fn scdf(&self) -> SCDF_R[src]

Bits 24:31 - short-circuit detector flag

pub fn ckabf(&self) -> CKABF_R[src]

Bits 16:23 - Clock absence flag

pub fn rcip(&self) -> RCIP_R[src]

Bit 14 - Regular conversion in progress status

pub fn jcip(&self) -> JCIP_R[src]

Bit 13 - Injected conversion in progress status

pub fn awdf(&self) -> AWDF_R[src]

Bit 4 - Analog watchdog

pub fn rovrf(&self) -> ROVRF_R[src]

Bit 3 - Regular conversion overrun flag

pub fn jovrf(&self) -> JOVRF_R[src]

Bit 2 - Injected conversion overrun flag

pub fn reocf(&self) -> REOCF_R[src]

Bit 1 - End of regular conversion flag

pub fn jeocf(&self) -> JEOCF_R[src]

Bit 0 - End of injected conversion flag

impl R<u32, Reg<u32, _FLT1ICR>>[src]

pub fn clrscdf(&self) -> CLRSCDF_R[src]

Bits 24:31 - Clear the short-circuit detector flag

pub fn clrckabf(&self) -> CLRCKABF_R[src]

Bits 16:23 - Clear the clock absence flag

pub fn clrrovrf(&self) -> CLRROVRF_R[src]

Bit 3 - Clear the regular conversion overrun flag

pub fn clrjovrf(&self) -> CLRJOVRF_R[src]

Bit 2 - Clear the injected conversion overrun flag

impl R<u32, Reg<u32, _FLT1JCHGR>>[src]

pub fn jchg(&self) -> JCHG_R[src]

Bits 0:7 - Injected channel group selection

impl R<u32, Reg<u32, _FLT1FCR>>[src]

pub fn ford(&self) -> FORD_R[src]

Bits 29:31 - Sinc filter order

pub fn fosr(&self) -> FOSR_R[src]

Bits 16:25 - Sinc filter oversampling ratio (decimation rate)

pub fn iosr(&self) -> IOSR_R[src]

Bits 0:7 - Integrator oversampling ratio (averaging length)

impl R<u32, Reg<u32, _FLT1JDATAR>>[src]

pub fn jdata(&self) -> JDATA_R[src]

Bits 8:31 - Injected group conversion data

pub fn jdatach(&self) -> JDATACH_R[src]

Bits 0:2 - Injected channel most recently converted

impl R<u32, Reg<u32, _FLT1RDATAR>>[src]

pub fn rdata(&self) -> RDATA_R[src]

Bits 8:31 - Regular channel conversion data

pub fn rpend(&self) -> RPEND_R[src]

Bit 4 - Regular channel pending data

pub fn rdatach(&self) -> RDATACH_R[src]

Bits 0:2 - Regular channel most recently converted

impl R<u32, Reg<u32, _FLT1AWHTR>>[src]

pub fn awht(&self) -> AWHT_R[src]

Bits 8:31 - Analog watchdog high threshold

pub fn bkawh(&self) -> BKAWH_R[src]

Bits 0:3 - Break signal assignment to analog watchdog high threshold event

impl R<u32, Reg<u32, _FLT1AWLTR>>[src]

pub fn awlt(&self) -> AWLT_R[src]

Bits 8:31 - Analog watchdog low threshold

pub fn bkawl(&self) -> BKAWL_R[src]

Bits 0:3 - Break signal assignment to analog watchdog low threshold event

impl R<u32, Reg<u32, _FLT1AWSR>>[src]

pub fn awhtf(&self) -> AWHTF_R[src]

Bits 8:15 - Analog watchdog high threshold flag

pub fn awltf(&self) -> AWLTF_R[src]

Bits 0:7 - Analog watchdog low threshold flag

impl R<u32, Reg<u32, _FLT1AWCFR>>[src]

pub fn clrawhtf(&self) -> CLRAWHTF_R[src]

Bits 8:15 - Clear the analog watchdog high threshold flag

pub fn clrawltf(&self) -> CLRAWLTF_R[src]

Bits 0:7 - Clear the analog watchdog low threshold flag

impl R<u32, Reg<u32, _FLT1EXMAX>>[src]

pub fn exmax(&self) -> EXMAX_R[src]

Bits 8:31 - Extremes detector maximum value

pub fn exmaxch(&self) -> EXMAXCH_R[src]

Bits 0:2 - Extremes detector maximum data channel

impl R<u32, Reg<u32, _FLT1EXMIN>>[src]

pub fn exmin(&self) -> EXMIN_R[src]

Bits 8:31 - EXMIN

pub fn exminch(&self) -> EXMINCH_R[src]

Bits 0:2 - Extremes detector minimum data channel

impl R<u32, Reg<u32, _FLT1CNVTIMR>>[src]

pub fn cnvcnt(&self) -> CNVCNT_R[src]

Bits 4:31 - 28-bit timer counting conversion time t = CNVCNT[27:0] / fDFSDM_CKIN

impl R<u32, Reg<u32, _FLT2CR1>>[src]

pub fn awfsel(&self) -> AWFSEL_R[src]

Bit 30 - Analog watchdog fast mode select

pub fn fast(&self) -> FAST_R[src]

Bit 29 - Fast conversion mode selection for regular conversions

pub fn rch(&self) -> RCH_R[src]

Bits 24:26 - Regular channel selection

pub fn rdmaen(&self) -> RDMAEN_R[src]

Bit 21 - DMA channel enabled to read data for the regular conversion

pub fn rsync(&self) -> RSYNC_R[src]

Bit 19 - Launch regular conversion synchronously with DFSDM0

pub fn rcont(&self) -> RCONT_R[src]

Bit 18 - Continuous mode selection for regular conversions

pub fn rswstart(&self) -> RSWSTART_R[src]

Bit 17 - Software start of a conversion on the regular channel

pub fn jexten(&self) -> JEXTEN_R[src]

Bits 13:14 - Trigger enable and trigger edge selection for injected conversions

pub fn jextsel(&self) -> JEXTSEL_R[src]

Bits 8:10 - Trigger signal selection for launching injected conversions

pub fn jdmaen(&self) -> JDMAEN_R[src]

Bit 5 - DMA channel enabled to read data for the injected channel group

pub fn jscan(&self) -> JSCAN_R[src]

Bit 4 - Scanning conversion mode for injected conversions

pub fn jsync(&self) -> JSYNC_R[src]

Bit 3 - Launch an injected conversion synchronously with the DFSDM0 JSWSTART trigger

pub fn jswstart(&self) -> JSWSTART_R[src]

Bit 1 - Start a conversion of the injected group of channels

pub fn dfen(&self) -> DFEN_R[src]

Bit 0 - DFSDM enable

impl R<u32, Reg<u32, _FLT2CR2>>[src]

pub fn awdch(&self) -> AWDCH_R[src]

Bits 16:23 - Analog watchdog channel selection

pub fn exch(&self) -> EXCH_R[src]

Bits 8:15 - Extremes detector channel selection

pub fn ckabie(&self) -> CKABIE_R[src]

Bit 6 - Clock absence interrupt enable

pub fn scdie(&self) -> SCDIE_R[src]

Bit 5 - Short-circuit detector interrupt enable

pub fn awdie(&self) -> AWDIE_R[src]

Bit 4 - Analog watchdog interrupt enable

pub fn rovrie(&self) -> ROVRIE_R[src]

Bit 3 - Regular data overrun interrupt enable

pub fn jovrie(&self) -> JOVRIE_R[src]

Bit 2 - Injected data overrun interrupt enable

pub fn reocie(&self) -> REOCIE_R[src]

Bit 1 - Regular end of conversion interrupt enable

pub fn jeocie(&self) -> JEOCIE_R[src]

Bit 0 - Injected end of conversion interrupt enable

impl R<u32, Reg<u32, _FLT2ISR>>[src]

pub fn scdf(&self) -> SCDF_R[src]

Bits 24:31 - short-circuit detector flag

pub fn ckabf(&self) -> CKABF_R[src]

Bits 16:23 - Clock absence flag

pub fn rcip(&self) -> RCIP_R[src]

Bit 14 - Regular conversion in progress status

pub fn jcip(&self) -> JCIP_R[src]

Bit 13 - Injected conversion in progress status

pub fn awdf(&self) -> AWDF_R[src]

Bit 4 - Analog watchdog

pub fn rovrf(&self) -> ROVRF_R[src]

Bit 3 - Regular conversion overrun flag

pub fn jovrf(&self) -> JOVRF_R[src]

Bit 2 - Injected conversion overrun flag

pub fn reocf(&self) -> REOCF_R[src]

Bit 1 - End of regular conversion flag

pub fn jeocf(&self) -> JEOCF_R[src]

Bit 0 - End of injected conversion flag

impl R<u32, Reg<u32, _FLT2ICR>>[src]

pub fn clrscdf(&self) -> CLRSCDF_R[src]

Bits 24:31 - Clear the short-circuit detector flag

pub fn clrckabf(&self) -> CLRCKABF_R[src]

Bits 16:23 - Clear the clock absence flag

pub fn clrrovrf(&self) -> CLRROVRF_R[src]

Bit 3 - Clear the regular conversion overrun flag

pub fn clrjovrf(&self) -> CLRJOVRF_R[src]

Bit 2 - Clear the injected conversion overrun flag

impl R<u32, Reg<u32, _FLT2JCHGR>>[src]

pub fn jchg(&self) -> JCHG_R[src]

Bits 0:7 - Injected channel group selection

impl R<u32, Reg<u32, _FLT2FCR>>[src]

pub fn ford(&self) -> FORD_R[src]

Bits 29:31 - Sinc filter order

pub fn fosr(&self) -> FOSR_R[src]

Bits 16:25 - Sinc filter oversampling ratio (decimation rate)

pub fn iosr(&self) -> IOSR_R[src]

Bits 0:7 - Integrator oversampling ratio (averaging length)

impl R<u32, Reg<u32, _FLT2JDATAR>>[src]

pub fn jdata(&self) -> JDATA_R[src]

Bits 8:31 - Injected group conversion data

pub fn jdatach(&self) -> JDATACH_R[src]

Bits 0:2 - Injected channel most recently converted

impl R<u32, Reg<u32, _FLT2RDATAR>>[src]

pub fn rdata(&self) -> RDATA_R[src]

Bits 8:31 - Regular channel conversion data

pub fn rpend(&self) -> RPEND_R[src]

Bit 4 - Regular channel pending data

pub fn rdatach(&self) -> RDATACH_R[src]

Bits 0:2 - Regular channel most recently converted

impl R<u32, Reg<u32, _FLT2AWHTR>>[src]

pub fn awht(&self) -> AWHT_R[src]

Bits 8:31 - Analog watchdog high threshold

pub fn bkawh(&self) -> BKAWH_R[src]

Bits 0:3 - Break signal assignment to analog watchdog high threshold event

impl R<u32, Reg<u32, _FLT2AWLTR>>[src]

pub fn awlt(&self) -> AWLT_R[src]

Bits 8:31 - Analog watchdog low threshold

pub fn bkawl(&self) -> BKAWL_R[src]

Bits 0:3 - Break signal assignment to analog watchdog low threshold event

impl R<u32, Reg<u32, _FLT2AWSR>>[src]

pub fn awhtf(&self) -> AWHTF_R[src]

Bits 8:15 - Analog watchdog high threshold flag

pub fn awltf(&self) -> AWLTF_R[src]

Bits 0:7 - Analog watchdog low threshold flag

impl R<u32, Reg<u32, _FLT2AWCFR>>[src]

pub fn clrawhtf(&self) -> CLRAWHTF_R[src]

Bits 8:15 - Clear the analog watchdog high threshold flag

pub fn clrawltf(&self) -> CLRAWLTF_R[src]

Bits 0:7 - Clear the analog watchdog low threshold flag

impl R<u32, Reg<u32, _FLT2EXMAX>>[src]

pub fn exmax(&self) -> EXMAX_R[src]

Bits 8:31 - Extremes detector maximum value

pub fn exmaxch(&self) -> EXMAXCH_R[src]

Bits 0:2 - Extremes detector maximum data channel

impl R<u32, Reg<u32, _FLT2EXMIN>>[src]

pub fn exmin(&self) -> EXMIN_R[src]

Bits 8:31 - EXMIN

pub fn exminch(&self) -> EXMINCH_R[src]

Bits 0:2 - Extremes detector minimum data channel

impl R<u32, Reg<u32, _FLT2CNVTIMR>>[src]

pub fn cnvcnt(&self) -> CNVCNT_R[src]

Bits 4:31 - 28-bit timer counting conversion time t = CNVCNT[27:0] / fDFSDM_CKIN

impl R<u32, Reg<u32, _FLT3CR1>>[src]

pub fn awfsel(&self) -> AWFSEL_R[src]

Bit 30 - Analog watchdog fast mode select

pub fn fast(&self) -> FAST_R[src]

Bit 29 - Fast conversion mode selection for regular conversions

pub fn rch(&self) -> RCH_R[src]

Bits 24:26 - Regular channel selection

pub fn rdmaen(&self) -> RDMAEN_R[src]

Bit 21 - DMA channel enabled to read data for the regular conversion

pub fn rsync(&self) -> RSYNC_R[src]

Bit 19 - Launch regular conversion synchronously with DFSDM0

pub fn rcont(&self) -> RCONT_R[src]

Bit 18 - Continuous mode selection for regular conversions

pub fn rswstart(&self) -> RSWSTART_R[src]

Bit 17 - Software start of a conversion on the regular channel

pub fn jexten(&self) -> JEXTEN_R[src]

Bits 13:14 - Trigger enable and trigger edge selection for injected conversions

pub fn jextsel(&self) -> JEXTSEL_R[src]

Bits 8:10 - Trigger signal selection for launching injected conversions

pub fn jdmaen(&self) -> JDMAEN_R[src]

Bit 5 - DMA channel enabled to read data for the injected channel group

pub fn jscan(&self) -> JSCAN_R[src]

Bit 4 - Scanning conversion mode for injected conversions

pub fn jsync(&self) -> JSYNC_R[src]

Bit 3 - Launch an injected conversion synchronously with the DFSDM0 JSWSTART trigger

pub fn jswstart(&self) -> JSWSTART_R[src]

Bit 1 - Start a conversion of the injected group of channels

pub fn dfen(&self) -> DFEN_R[src]

Bit 0 - DFSDM enable

impl R<u32, Reg<u32, _FLT3CR2>>[src]

pub fn awdch(&self) -> AWDCH_R[src]

Bits 16:23 - Analog watchdog channel selection

pub fn exch(&self) -> EXCH_R[src]

Bits 8:15 - Extremes detector channel selection

pub fn ckabie(&self) -> CKABIE_R[src]

Bit 6 - Clock absence interrupt enable

pub fn scdie(&self) -> SCDIE_R[src]

Bit 5 - Short-circuit detector interrupt enable

pub fn awdie(&self) -> AWDIE_R[src]

Bit 4 - Analog watchdog interrupt enable

pub fn rovrie(&self) -> ROVRIE_R[src]

Bit 3 - Regular data overrun interrupt enable

pub fn jovrie(&self) -> JOVRIE_R[src]

Bit 2 - Injected data overrun interrupt enable

pub fn reocie(&self) -> REOCIE_R[src]

Bit 1 - Regular end of conversion interrupt enable

pub fn jeocie(&self) -> JEOCIE_R[src]

Bit 0 - Injected end of conversion interrupt enable

impl R<u32, Reg<u32, _FLT3ISR>>[src]

pub fn scdf(&self) -> SCDF_R[src]

Bits 24:31 - short-circuit detector flag

pub fn ckabf(&self) -> CKABF_R[src]

Bits 16:23 - Clock absence flag

pub fn rcip(&self) -> RCIP_R[src]

Bit 14 - Regular conversion in progress status

pub fn jcip(&self) -> JCIP_R[src]

Bit 13 - Injected conversion in progress status

pub fn awdf(&self) -> AWDF_R[src]

Bit 4 - Analog watchdog

pub fn rovrf(&self) -> ROVRF_R[src]

Bit 3 - Regular conversion overrun flag

pub fn jovrf(&self) -> JOVRF_R[src]

Bit 2 - Injected conversion overrun flag

pub fn reocf(&self) -> REOCF_R[src]

Bit 1 - End of regular conversion flag

pub fn jeocf(&self) -> JEOCF_R[src]

Bit 0 - End of injected conversion flag

impl R<u32, Reg<u32, _FLT3ICR>>[src]

pub fn clrscdf(&self) -> CLRSCDF_R[src]

Bits 24:31 - Clear the short-circuit detector flag

pub fn clrckabf(&self) -> CLRCKABF_R[src]

Bits 16:23 - Clear the clock absence flag

pub fn clrrovrf(&self) -> CLRROVRF_R[src]

Bit 3 - Clear the regular conversion overrun flag

pub fn clrjovrf(&self) -> CLRJOVRF_R[src]

Bit 2 - Clear the injected conversion overrun flag

impl R<u32, Reg<u32, _FLT3JCHGR>>[src]

pub fn jchg(&self) -> JCHG_R[src]

Bits 0:7 - Injected channel group selection

impl R<u32, Reg<u32, _FLT3FCR>>[src]

pub fn ford(&self) -> FORD_R[src]

Bits 29:31 - Sinc filter order

pub fn fosr(&self) -> FOSR_R[src]

Bits 16:25 - Sinc filter oversampling ratio (decimation rate)

pub fn iosr(&self) -> IOSR_R[src]

Bits 0:7 - Integrator oversampling ratio (averaging length)

impl R<u32, Reg<u32, _FLT3JDATAR>>[src]

pub fn jdata(&self) -> JDATA_R[src]

Bits 8:31 - Injected group conversion data

pub fn jdatach(&self) -> JDATACH_R[src]

Bits 0:2 - Injected channel most recently converted

impl R<u32, Reg<u32, _FLT3RDATAR>>[src]

pub fn rdata(&self) -> RDATA_R[src]

Bits 8:31 - Regular channel conversion data

pub fn rpend(&self) -> RPEND_R[src]

Bit 4 - Regular channel pending data

pub fn rdatach(&self) -> RDATACH_R[src]

Bits 0:2 - Regular channel most recently converted

impl R<u32, Reg<u32, _FLT3AWHTR>>[src]

pub fn awht(&self) -> AWHT_R[src]

Bits 8:31 - Analog watchdog high threshold

pub fn bkawh(&self) -> BKAWH_R[src]

Bits 0:3 - Break signal assignment to analog watchdog high threshold event

impl R<u32, Reg<u32, _FLT3AWLTR>>[src]

pub fn awlt(&self) -> AWLT_R[src]

Bits 8:31 - Analog watchdog low threshold

pub fn bkawl(&self) -> BKAWL_R[src]

Bits 0:3 - Break signal assignment to analog watchdog low threshold event

impl R<u32, Reg<u32, _FLT3AWSR>>[src]

pub fn awhtf(&self) -> AWHTF_R[src]

Bits 8:15 - Analog watchdog high threshold flag

pub fn awltf(&self) -> AWLTF_R[src]

Bits 0:7 - Analog watchdog low threshold flag

impl R<u32, Reg<u32, _FLT3AWCFR>>[src]

pub fn clrawhtf(&self) -> CLRAWHTF_R[src]

Bits 8:15 - Clear the analog watchdog high threshold flag

pub fn clrawltf(&self) -> CLRAWLTF_R[src]

Bits 0:7 - Clear the analog watchdog low threshold flag

impl R<u32, Reg<u32, _FLT3EXMAX>>[src]

pub fn exmax(&self) -> EXMAX_R[src]

Bits 8:31 - Extremes detector maximum value

pub fn exmaxch(&self) -> EXMAXCH_R[src]

Bits 0:2 - Extremes detector maximum data channel

impl R<u32, Reg<u32, _FLT3EXMIN>>[src]

pub fn exmin(&self) -> EXMIN_R[src]

Bits 8:31 - EXMIN

pub fn exminch(&self) -> EXMINCH_R[src]

Bits 0:2 - Extremes detector minimum data channel

impl R<u32, Reg<u32, _FLT3CNVTIMR>>[src]

pub fn cnvcnt(&self) -> CNVCNT_R[src]

Bits 4:31 - 28-bit timer counting conversion time t = CNVCNT[27:0] / fDFSDM_CKIN

impl R<u32, Reg<u32, _CH0DLYR>>[src]

pub fn plsskp(&self) -> PLSSKP_R[src]

Bits 0:5 - Pulses to skip for input data skipping function

impl R<u32, Reg<u32, _CH1DLYR>>[src]

pub fn plsskp(&self) -> PLSSKP_R[src]

Bits 0:5 - PLSSKP

impl R<u32, Reg<u32, _CH2DLYR>>[src]

pub fn plsskp(&self) -> PLSSKP_R[src]

Bits 0:5 - PLSSKP

impl R<u32, Reg<u32, _CH3DLYR>>[src]

pub fn plsskp(&self) -> PLSSKP_R[src]

Bits 0:5 - PLSSKP

impl R<u32, Reg<u32, _CH4DLYR>>[src]

pub fn plsskp(&self) -> PLSSKP_R[src]

Bits 0:5 - PLSSKP

impl R<u32, Reg<u32, _CH5DLYR>>[src]

pub fn plsskp(&self) -> PLSSKP_R[src]

Bits 0:5 - read-only

impl R<u32, Reg<u32, _CH6DLYR>>[src]

pub fn plsskp(&self) -> PLSSKP_R[src]

Bits 0:5 - PLSSKP

impl R<u32, Reg<u32, _CH7DLYR>>[src]

pub fn plsskp(&self) -> PLSSKP_R[src]

Bits 0:5 - PLSSKP

impl R<u32, Reg<u32, _C0CR>>[src]

pub fn sync_id(&self) -> SYNC_ID_R[src]

Bits 24:28 - SYNC_ID

pub fn nbreq(&self) -> NBREQ_R[src]

Bits 19:23 - Nb request

pub fn spol(&self) -> SPOL_R[src]

Bits 17:18 - Sync polarity

pub fn se(&self) -> SE_R[src]

Bit 16 - Synchronization enable

pub fn ege(&self) -> EGE_R[src]

Bit 9 - Event Generation Enable

pub fn soie(&self) -> SOIE_R[src]

Bit 8 - Synchronization Overrun Interrupt Enable

pub fn dmareq_id(&self) -> DMAREQ_ID_R[src]

Bits 0:6 - DMA Request ID

impl R<u32, Reg<u32, _C1CR>>[src]

pub fn sync_id(&self) -> SYNC_ID_R[src]

Bits 24:28 - SYNC_ID

pub fn nbreq(&self) -> NBREQ_R[src]

Bits 19:23 - Nb request

pub fn spol(&self) -> SPOL_R[src]

Bits 17:18 - Sync polarity

pub fn se(&self) -> SE_R[src]

Bit 16 - Synchronization enable

pub fn ege(&self) -> EGE_R[src]

Bit 9 - Event Generation Enable

pub fn soie(&self) -> SOIE_R[src]

Bit 8 - Synchronization Overrun Interrupt Enable

pub fn dmareq_id(&self) -> DMAREQ_ID_R[src]

Bits 0:6 - DMA Request ID

impl R<u32, Reg<u32, _C2CR>>[src]

pub fn sync_id(&self) -> SYNC_ID_R[src]

Bits 24:28 - SYNC_ID

pub fn nbreq(&self) -> NBREQ_R[src]

Bits 19:23 - Nb request

pub fn spol(&self) -> SPOL_R[src]

Bits 17:18 - Sync polarity

pub fn se(&self) -> SE_R[src]

Bit 16 - Synchronization enable

pub fn ege(&self) -> EGE_R[src]

Bit 9 - Event Generation Enable

pub fn soie(&self) -> SOIE_R[src]

Bit 8 - Synchronization Overrun Interrupt Enable

pub fn dmareq_id(&self) -> DMAREQ_ID_R[src]

Bits 0:6 - DMA Request ID

impl R<u32, Reg<u32, _C3CR>>[src]

pub fn sync_id(&self) -> SYNC_ID_R[src]

Bits 24:28 - SYNC_ID

pub fn nbreq(&self) -> NBREQ_R[src]

Bits 19:23 - Nb request

pub fn spol(&self) -> SPOL_R[src]

Bits 17:18 - Sync polarity

pub fn se(&self) -> SE_R[src]

Bit 16 - Synchronization enable

pub fn ege(&self) -> EGE_R[src]

Bit 9 - Event Generation Enable

pub fn soie(&self) -> SOIE_R[src]

Bit 8 - Synchronization Overrun Interrupt Enable

pub fn dmareq_id(&self) -> DMAREQ_ID_R[src]

Bits 0:6 - DMA Request ID

impl R<u32, Reg<u32, _C4CR>>[src]

pub fn sync_id(&self) -> SYNC_ID_R[src]

Bits 24:28 - SYNC_ID

pub fn nbreq(&self) -> NBREQ_R[src]

Bits 19:23 - Nb request

pub fn spol(&self) -> SPOL_R[src]

Bits 17:18 - Sync polarity

pub fn se(&self) -> SE_R[src]

Bit 16 - Synchronization enable

pub fn ege(&self) -> EGE_R[src]

Bit 9 - Event Generation Enable

pub fn soie(&self) -> SOIE_R[src]

Bit 8 - Synchronization Overrun Interrupt Enable

pub fn dmareq_id(&self) -> DMAREQ_ID_R[src]

Bits 0:6 - DMA Request ID

impl R<u32, Reg<u32, _C5CR>>[src]

pub fn sync_id(&self) -> SYNC_ID_R[src]

Bits 24:28 - SYNC_ID

pub fn nbreq(&self) -> NBREQ_R[src]

Bits 19:23 - Nb request

pub fn spol(&self) -> SPOL_R[src]

Bits 17:18 - Sync polarity

pub fn se(&self) -> SE_R[src]

Bit 16 - Synchronization enable

pub fn ege(&self) -> EGE_R[src]

Bit 9 - Event Generation Enable

pub fn oie(&self) -> OIE_R[src]

Bit 8 - Synchronization Overrun Interrupt Enable

pub fn dmareq_id(&self) -> DMAREQ_ID_R[src]

Bits 0:6 - DMA Request ID

impl R<u32, Reg<u32, _C6CR>>[src]

pub fn sync_id(&self) -> SYNC_ID_R[src]

Bits 24:28 - SYNC_ID

pub fn nbreq(&self) -> NBREQ_R[src]

Bits 19:23 - Nb request

pub fn spol(&self) -> SPOL_R[src]

Bits 17:18 - Sync polarity

pub fn se(&self) -> SE_R[src]

Bit 16 - Synchronization enable

pub fn ege(&self) -> EGE_R[src]

Bit 9 - Event Generation Enable

pub fn soie(&self) -> SOIE_R[src]

Bit 8 - Synchronization Overrun Interrupt Enable

pub fn dmareq_id(&self) -> DMAREQ_ID_R[src]

Bits 0:6 - DMA Request ID

impl R<u32, Reg<u32, _C7CR>>[src]

pub fn sync_id(&self) -> SYNC_ID_R[src]

Bits 24:28 - SYNC_ID

pub fn nbreq(&self) -> NBREQ_R[src]

Bits 19:23 - Nb request

pub fn spol(&self) -> SPOL_R[src]

Bits 17:18 - Sync polarity

pub fn se(&self) -> SE_R[src]

Bit 16 - Synchronization enable

pub fn ege(&self) -> EGE_R[src]

Bit 9 - Event Generation Enable

pub fn soie(&self) -> SOIE_R[src]

Bit 8 - Synchronization Overrun Interrupt Enable

pub fn dmareq_id(&self) -> DMAREQ_ID_R[src]

Bits 0:6 - DMA Request ID

impl R<u32, Reg<u32, _C8CR>>[src]

pub fn sync_id(&self) -> SYNC_ID_R[src]

Bits 24:28 - SYNC_ID

pub fn nbreq(&self) -> NBREQ_R[src]

Bits 19:23 - Nb request

pub fn spol(&self) -> SPOL_R[src]

Bits 17:18 - Sync polarity

pub fn se(&self) -> SE_R[src]

Bit 16 - Synchronization enable

pub fn ege(&self) -> EGE_R[src]

Bit 9 - Event Generation Enable

pub fn soie(&self) -> SOIE_R[src]

Bit 8 - Synchronization Overrun Interrupt Enable

pub fn dmareq_id(&self) -> DMAREQ_ID_R[src]

Bits 0:6 - DMA Request ID

impl R<u32, Reg<u32, _C9CR>>[src]

pub fn sync_id(&self) -> SYNC_ID_R[src]

Bits 24:28 - SYNC_ID

pub fn nbreq(&self) -> NBREQ_R[src]

Bits 19:23 - Nb request

pub fn spol(&self) -> SPOL_R[src]

Bits 17:18 - Sync polarity

pub fn se(&self) -> SE_R[src]

Bit 16 - Synchronization enable

pub fn ege(&self) -> EGE_R[src]

Bit 9 - Event Generation Enable

pub fn soie(&self) -> SOIE_R[src]

Bit 8 - Synchronization Overrun Interrupt Enable

pub fn dmareq_id(&self) -> DMAREQ_ID_R[src]

Bits 0:6 - DMA Request ID

impl R<u32, Reg<u32, _C10CR>>[src]

pub fn sync_id(&self) -> SYNC_ID_R[src]

Bits 24:28 - SYNC_ID

pub fn nbreq(&self) -> NBREQ_R[src]

Bits 19:23 - Nb request

pub fn spol(&self) -> SPOL_R[src]

Bits 17:18 - Sync polarity

pub fn se(&self) -> SE_R[src]

Bit 16 - Synchronization enable

pub fn ege(&self) -> EGE_R[src]

Bit 9 - Event Generation Enable

pub fn soie(&self) -> SOIE_R[src]

Bit 8 - Synchronization Overrun Interrupt Enable

pub fn dmareq_id(&self) -> DMAREQ_ID_R[src]

Bits 0:6 - DMA Request ID

impl R<u32, Reg<u32, _C11CR>>[src]

pub fn sync_id(&self) -> SYNC_ID_R[src]

Bits 24:28 - SYNC_ID

pub fn nbreq(&self) -> NBREQ_R[src]

Bits 19:23 - Nb request

pub fn spol(&self) -> SPOL_R[src]

Bits 17:18 - Sync polarity

pub fn se(&self) -> SE_R[src]

Bit 16 - Synchronization enable

pub fn ege(&self) -> EGE_R[src]

Bit 9 - Event Generation Enable

pub fn soie(&self) -> SOIE_R[src]

Bit 8 - Synchronization Overrun Interrupt Enable

pub fn dmareq_id(&self) -> DMAREQ_ID_R[src]

Bits 0:6 - DMA Request ID

impl R<u32, Reg<u32, _C12CR>>[src]

pub fn sync_id(&self) -> SYNC_ID_R[src]

Bits 24:28 - SYNC_ID

pub fn nbreq(&self) -> NBREQ_R[src]

Bits 19:23 - Nb request

pub fn spol(&self) -> SPOL_R[src]

Bits 17:18 - Sync polarity

pub fn se(&self) -> SE_R[src]

Bit 16 - Synchronization enable

pub fn ege(&self) -> EGE_R[src]

Bit 9 - Event Generation Enable

pub fn soie(&self) -> SOIE_R[src]

Bit 8 - Synchronization Overrun Interrupt Enable

pub fn dmareq_id(&self) -> DMAREQ_ID_R[src]

Bits 0:6 - DMA Request ID

impl R<u32, Reg<u32, _C13CR>>[src]

pub fn sync_id(&self) -> SYNC_ID_R[src]

Bits 24:28 - SYNC_ID

pub fn nbreq(&self) -> NBREQ_R[src]

Bits 19:23 - Nb request

pub fn spol(&self) -> SPOL_R[src]

Bits 17:18 - Sync polarity

pub fn se(&self) -> SE_R[src]

Bit 16 - Synchronization enable

pub fn ege(&self) -> EGE_R[src]

Bit 9 - Event Generation Enable

pub fn soie(&self) -> SOIE_R[src]

Bit 8 - Synchronization Overrun Interrupt Enable

pub fn dmareq_id(&self) -> DMAREQ_ID_R[src]

Bits 0:6 - DMA Request ID

impl R<u32, Reg<u32, _CSR>>[src]

pub fn sof0(&self) -> SOF0_R[src]

Bit 0 - Synchronization Overrun Flag 0

pub fn sof1(&self) -> SOF1_R[src]

Bit 1 - Synchronization Overrun Flag 1

pub fn sof2(&self) -> SOF2_R[src]

Bit 2 - Synchronization Overrun Flag 2

pub fn sof3(&self) -> SOF3_R[src]

Bit 3 - Synchronization Overrun Flag 3

pub fn sof4(&self) -> SOF4_R[src]

Bit 4 - Synchronization Overrun Flag 4

pub fn sof5(&self) -> SOF5_R[src]

Bit 5 - Synchronization Overrun Flag 5

pub fn sof6(&self) -> SOF6_R[src]

Bit 6 - Synchronization Overrun Flag 6

pub fn sof7(&self) -> SOF7_R[src]

Bit 7 - Synchronization Overrun Flag 7

pub fn sof8(&self) -> SOF8_R[src]

Bit 8 - Synchronization Overrun Flag 8

pub fn sof9(&self) -> SOF9_R[src]

Bit 9 - Synchronization Overrun Flag 9

pub fn sof10(&self) -> SOF10_R[src]

Bit 10 - Synchronization Overrun Flag 10

pub fn sof11(&self) -> SOF11_R[src]

Bit 11 - Synchronization Overrun Flag 11

pub fn sof12(&self) -> SOF12_R[src]

Bit 12 - Synchronization Overrun Flag 12

pub fn sof13(&self) -> SOF13_R[src]

Bit 13 - Synchronization Overrun Flag 13

pub fn sof14(&self) -> SOF14_R[src]

Bit 14 - Synchronization Overrun Flag 13

pub fn sof15(&self) -> SOF15_R[src]

Bit 15 - Synchronization Overrun Flag 13

impl R<u32, Reg<u32, _CCFR>>[src]

pub fn csof0(&self) -> CSOF0_R[src]

Bit 0 - Synchronization Clear Overrun Flag 0

pub fn csof1(&self) -> CSOF1_R[src]

Bit 1 - Synchronization Clear Overrun Flag 1

pub fn csof2(&self) -> CSOF2_R[src]

Bit 2 - Synchronization Clear Overrun Flag 2

pub fn csof3(&self) -> CSOF3_R[src]

Bit 3 - Synchronization Clear Overrun Flag 3

pub fn csof4(&self) -> CSOF4_R[src]

Bit 4 - Synchronization Clear Overrun Flag 4

pub fn csof5(&self) -> CSOF5_R[src]

Bit 5 - Synchronization Clear Overrun Flag 5

pub fn csof6(&self) -> CSOF6_R[src]

Bit 6 - Synchronization Clear Overrun Flag 6

pub fn csof7(&self) -> CSOF7_R[src]

Bit 7 - Synchronization Clear Overrun Flag 7

pub fn csof8(&self) -> CSOF8_R[src]

Bit 8 - Synchronization Clear Overrun Flag 8

pub fn csof9(&self) -> CSOF9_R[src]

Bit 9 - Synchronization Clear Overrun Flag 9

pub fn csof10(&self) -> CSOF10_R[src]

Bit 10 - Synchronization Clear Overrun Flag 10

pub fn csof11(&self) -> CSOF11_R[src]

Bit 11 - Synchronization Clear Overrun Flag 11

pub fn csof12(&self) -> CSOF12_R[src]

Bit 12 - Synchronization Clear Overrun Flag 12

pub fn csof13(&self) -> CSOF13_R[src]

Bit 13 - Synchronization Clear Overrun Flag 13

pub fn csof14(&self) -> CSOF14_R[src]

Bit 14 - Synchronization Clear Overrun Flag 13

pub fn csof15(&self) -> CSOF15_R[src]

Bit 15 - Synchronization Clear Overrun Flag 13

impl R<u32, Reg<u32, _RG0CR>>[src]

pub fn gnbreq(&self) -> GNBREQ_R[src]

Bits 19:23 - Number of Request

pub fn gpol(&self) -> GPOL_R[src]

Bits 17:18 - Generation Polarity

pub fn ge(&self) -> GE_R[src]

Bit 16 - Generation Enable

pub fn oie(&self) -> OIE_R[src]

Bit 8 - Overrun Interrupt Enable

pub fn sig_id(&self) -> SIG_ID_R[src]

Bits 0:4 - Signal ID

impl R<u32, Reg<u32, _RG1CR>>[src]

pub fn gnbreq(&self) -> GNBREQ_R[src]

Bits 19:23 - Number of Request

pub fn gpol(&self) -> GPOL_R[src]

Bits 17:18 - Generation Polarity

pub fn ge(&self) -> GE_R[src]

Bit 16 - Generation Enable

pub fn oie(&self) -> OIE_R[src]

Bit 8 - Overrun Interrupt Enable

pub fn sig_id(&self) -> SIG_ID_R[src]

Bits 0:4 - Signal ID

impl R<u32, Reg<u32, _RG2CR>>[src]

pub fn gnbreq(&self) -> GNBREQ_R[src]

Bits 19:23 - Number of Request

pub fn gpol(&self) -> GPOL_R[src]

Bits 17:18 - Generation Polarity

pub fn ge(&self) -> GE_R[src]

Bit 16 - Generation Enable

pub fn oie(&self) -> OIE_R[src]

Bit 8 - Overrun Interrupt Enable

pub fn sig_id(&self) -> SIG_ID_R[src]

Bits 0:4 - Signal ID

impl R<u32, Reg<u32, _RG3CR>>[src]

pub fn gnbreq(&self) -> GNBREQ_R[src]

Bits 19:23 - Number of Request

pub fn gpol(&self) -> GPOL_R[src]

Bits 17:18 - Generation Polarity

pub fn ge(&self) -> GE_R[src]

Bit 16 - Generation Enable

pub fn oie(&self) -> OIE_R[src]

Bit 8 - Overrun Interrupt Enable

pub fn sig_id(&self) -> SIG_ID_R[src]

Bits 0:4 - Signal ID

impl R<u32, Reg<u32, _RGSR>>[src]

pub fn of0(&self) -> OF0_R[src]

Bit 0 - Generator Overrun Flag 0

pub fn of1(&self) -> OF1_R[src]

Bit 1 - Generator Overrun Flag 1

pub fn of2(&self) -> OF2_R[src]

Bit 2 - Generator Overrun Flag 2

pub fn of3(&self) -> OF3_R[src]

Bit 3 - Generator Overrun Flag 3

impl R<u32, Reg<u32, _RGCFR>>[src]

pub fn csof0(&self) -> CSOF0_R[src]

Bit 0 - Generator Clear Overrun Flag 0

pub fn csof1(&self) -> CSOF1_R[src]

Bit 1 - Generator Clear Overrun Flag 1

pub fn csof2(&self) -> CSOF2_R[src]

Bit 2 - Generator Clear Overrun Flag 2

pub fn csof3(&self) -> CSOF3_R[src]

Bit 3 - Generator Clear Overrun Flag 3

impl R<u32, Reg<u32, _C14CR>>[src]

pub fn sync_id(&self) -> SYNC_ID_R[src]

Bits 24:28 - Synchronization identification

pub fn nbreq(&self) -> NBREQ_R[src]

Bits 19:23 - Number of DMA requests minus 1 to forward

pub fn spol(&self) -> SPOL_R[src]

Bits 17:18 - Synchronization polarity

pub fn se(&self) -> SE_R[src]

Bit 16 - Synchronization enable

pub fn ege(&self) -> EGE_R[src]

Bit 9 - Event generation enable

pub fn soie(&self) -> SOIE_R[src]

Bit 8 - Synchronization overrun interrupt enable

pub fn dmareq_id(&self) -> DMAREQ_ID_R[src]

Bits 0:6 - DMA request identification

impl R<u32, Reg<u32, _C15CR>>[src]

pub fn sync_id(&self) -> SYNC_ID_R[src]

Bits 24:28 - Synchronization identification

pub fn nbreq(&self) -> NBREQ_R[src]

Bits 19:23 - Number of DMA requests minus 1 to forward

pub fn spol(&self) -> SPOL_R[src]

Bits 17:18 - Synchronization polarity

pub fn se(&self) -> SE_R[src]

Bit 16 - Synchronization enable

pub fn ege(&self) -> EGE_R[src]

Bit 9 - Event generation enable

pub fn soie(&self) -> SOIE_R[src]

Bit 8 - Synchronization overrun interrupt enable

pub fn dmareq_id(&self) -> DMAREQ_ID_R[src]

Bits 0:6 - DMA request identification

impl R<u32, Reg<u32, _RTSR1>>[src]

pub fn rt0(&self) -> RT0_R[src]

Bit 0 - Rising trigger event configuration bit of configurable event input x

pub fn rt1(&self) -> RT1_R[src]

Bit 1 - Rising trigger event configuration bit of configurable event input x

pub fn rt2(&self) -> RT2_R[src]

Bit 2 - Rising trigger event configuration bit of configurable event input x

pub fn rt3(&self) -> RT3_R[src]

Bit 3 - Rising trigger event configuration bit of configurable event input x

pub fn rt4(&self) -> RT4_R[src]

Bit 4 - Rising trigger event configuration bit of configurable event input x

pub fn rt5(&self) -> RT5_R[src]

Bit 5 - Rising trigger event configuration bit of configurable event input x

pub fn rt6(&self) -> RT6_R[src]

Bit 6 - Rising trigger event configuration bit of configurable event input x

pub fn rt7(&self) -> RT7_R[src]

Bit 7 - Rising trigger event configuration bit of configurable event input x

pub fn rt8(&self) -> RT8_R[src]

Bit 8 - Rising trigger event configuration bit of configurable event input x

pub fn rt9(&self) -> RT9_R[src]

Bit 9 - Rising trigger event configuration bit of configurable event input x

pub fn rt10(&self) -> RT10_R[src]

Bit 10 - Rising trigger event configuration bit of configurable event input x

pub fn rt11(&self) -> RT11_R[src]

Bit 11 - Rising trigger event configuration bit of configurable event input x

pub fn rt12(&self) -> RT12_R[src]

Bit 12 - Rising trigger event configuration bit of configurable event input x

pub fn rt13(&self) -> RT13_R[src]

Bit 13 - Rising trigger event configuration bit of configurable event input x

pub fn rt14(&self) -> RT14_R[src]

Bit 14 - Rising trigger event configuration bit of configurable event input x

pub fn rt15(&self) -> RT15_R[src]

Bit 15 - Rising trigger event configuration bit of configurable event input x

pub fn rt16(&self) -> RT16_R[src]

Bit 16 - Rising trigger event configuration bit of configurable event input x

pub fn rt21(&self) -> RT21_R[src]

Bit 21 - Rising trigger event configuration bit of configurable event input x

pub fn rt22(&self) -> RT22_R[src]

Bit 22 - Rising trigger event configuration bit of configurable event input x

impl R<u32, Reg<u32, _FTSR1>>[src]

pub fn ft0(&self) -> FT0_R[src]

Bit 0 - Falling trigger event configuration bit of configurable event input x

pub fn ft1(&self) -> FT1_R[src]

Bit 1 - Falling trigger event configuration bit of configurable event input x

pub fn ft2(&self) -> FT2_R[src]

Bit 2 - Falling trigger event configuration bit of configurable event input x

pub fn ft3(&self) -> FT3_R[src]

Bit 3 - Falling trigger event configuration bit of configurable event input x

pub fn ft4(&self) -> FT4_R[src]

Bit 4 - Falling trigger event configuration bit of configurable event input x

pub fn ft5(&self) -> FT5_R[src]

Bit 5 - Falling trigger event configuration bit of configurable event input x

pub fn ft6(&self) -> FT6_R[src]

Bit 6 - Falling trigger event configuration bit of configurable event input x

pub fn ft7(&self) -> FT7_R[src]

Bit 7 - Falling trigger event configuration bit of configurable event input x

pub fn ft8(&self) -> FT8_R[src]

Bit 8 - Falling trigger event configuration bit of configurable event input x

pub fn ft9(&self) -> FT9_R[src]

Bit 9 - Falling trigger event configuration bit of configurable event input x

pub fn ft10(&self) -> FT10_R[src]

Bit 10 - Falling trigger event configuration bit of configurable event input x

pub fn ft11(&self) -> FT11_R[src]

Bit 11 - Falling trigger event configuration bit of configurable event input x

pub fn ft12(&self) -> FT12_R[src]

Bit 12 - Falling trigger event configuration bit of configurable event input x

pub fn ft13(&self) -> FT13_R[src]

Bit 13 - Falling trigger event configuration bit of configurable event input x

pub fn ft14(&self) -> FT14_R[src]

Bit 14 - Falling trigger event configuration bit of configurable event input x

pub fn ft15(&self) -> FT15_R[src]

Bit 15 - Falling trigger event configuration bit of configurable event input x

pub fn ft16(&self) -> FT16_R[src]

Bit 16 - Falling trigger event configuration bit of configurable event input x

pub fn ft21(&self) -> FT21_R[src]

Bit 21 - Falling trigger event configuration bit of configurable event input x

pub fn ft22(&self) -> FT22_R[src]

Bit 22 - Falling trigger event configuration bit of configurable event input x

impl R<u32, Reg<u32, _SWIER1>>[src]

pub fn swi0(&self) -> SWI0_R[src]

Bit 0 - Software interrupt on event x

pub fn swi1(&self) -> SWI1_R[src]

Bit 1 - Software interrupt on event x

pub fn swi2(&self) -> SWI2_R[src]

Bit 2 - Software interrupt on event x

pub fn swi3(&self) -> SWI3_R[src]

Bit 3 - Software interrupt on event x

pub fn swi4(&self) -> SWI4_R[src]

Bit 4 - Software interrupt on event x

pub fn swi5(&self) -> SWI5_R[src]

Bit 5 - Software interrupt on event x

pub fn swi6(&self) -> SWI6_R[src]

Bit 6 - Software interrupt on event x

pub fn swi7(&self) -> SWI7_R[src]

Bit 7 - Software interrupt on event x

pub fn swi8(&self) -> SWI8_R[src]

Bit 8 - Software interrupt on event x

pub fn swi9(&self) -> SWI9_R[src]

Bit 9 - Software interrupt on event x

pub fn swi10(&self) -> SWI10_R[src]

Bit 10 - Software interrupt on event x

pub fn swi11(&self) -> SWI11_R[src]

Bit 11 - Software interrupt on event x

pub fn swi12(&self) -> SWI12_R[src]

Bit 12 - Software interrupt on event x

pub fn swi13(&self) -> SWI13_R[src]

Bit 13 - Software interrupt on event x

pub fn swi14(&self) -> SWI14_R[src]

Bit 14 - Software interrupt on event x

pub fn swi15(&self) -> SWI15_R[src]

Bit 15 - Software interrupt on event x

pub fn swi16(&self) -> SWI16_R[src]

Bit 16 - Software interrupt on event x

pub fn swi21(&self) -> SWI21_R[src]

Bit 21 - Software interrupt on event x

pub fn swi22(&self) -> SWI22_R[src]

Bit 22 - Software interrupt on event x

impl R<u32, Reg<u32, _RPR1>>[src]

pub fn rpif0(&self) -> RPIF0_R[src]

Bit 0 - configurable event inputs x rising edge pending bit

pub fn rpif1(&self) -> RPIF1_R[src]

Bit 1 - configurable event inputs x rising edge pending bit

pub fn rpif2(&self) -> RPIF2_R[src]

Bit 2 - configurable event inputs x rising edge pending bit

pub fn rpif3(&self) -> RPIF3_R[src]

Bit 3 - configurable event inputs x rising edge pending bit

pub fn rpif4(&self) -> RPIF4_R[src]

Bit 4 - configurable event inputs x rising edge pending bit

pub fn rpif5(&self) -> RPIF5_R[src]

Bit 5 - configurable event inputs x rising edge pending bit

pub fn rpif6(&self) -> RPIF6_R[src]

Bit 6 - configurable event inputs x rising edge pending bit

pub fn rpif7(&self) -> RPIF7_R[src]

Bit 7 - configurable event inputs x rising edge pending bit

pub fn rpif8(&self) -> RPIF8_R[src]

Bit 8 - configurable event inputs x rising edge pending bit

pub fn rpif9(&self) -> RPIF9_R[src]

Bit 9 - configurable event inputs x rising edge pending bit

pub fn rpif10(&self) -> RPIF10_R[src]

Bit 10 - configurable event inputs x rising edge pending bit

pub fn rpif11(&self) -> RPIF11_R[src]

Bit 11 - configurable event inputs x rising edge pending bit

pub fn rpif12(&self) -> RPIF12_R[src]

Bit 12 - configurable event inputs x rising edge pending bit

pub fn rpif13(&self) -> RPIF13_R[src]

Bit 13 - configurable event inputs x rising edge pending bit

pub fn rpif14(&self) -> RPIF14_R[src]

Bit 14 - configurable event inputs x rising edge pending bit

pub fn rpif15(&self) -> RPIF15_R[src]

Bit 15 - configurable event inputs x rising edge pending bit

pub fn rpif16(&self) -> RPIF16_R[src]

Bit 16 - configurable event inputs x rising edge pending bit

pub fn rpif21(&self) -> RPIF21_R[src]

Bit 21 - configurable event inputs x rising edge pending bit

pub fn rpif22(&self) -> RPIF22_R[src]

Bit 22 - configurable event inputs x rising edge pending bit

impl R<u32, Reg<u32, _FPR1>>[src]

pub fn fpif0(&self) -> FPIF0_R[src]

Bit 0 - configurable event inputs x falling edge pending bit.

pub fn fpif1(&self) -> FPIF1_R[src]

Bit 1 - configurable event inputs x falling edge pending bit.

pub fn fpif2(&self) -> FPIF2_R[src]

Bit 2 - configurable event inputs x falling edge pending bit.

pub fn fpif3(&self) -> FPIF3_R[src]

Bit 3 - configurable event inputs x falling edge pending bit.

pub fn fpif4(&self) -> FPIF4_R[src]

Bit 4 - configurable event inputs x falling edge pending bit.

pub fn fpif5(&self) -> FPIF5_R[src]

Bit 5 - configurable event inputs x falling edge pending bit.

pub fn fpif6(&self) -> FPIF6_R[src]

Bit 6 - configurable event inputs x falling edge pending bit.

pub fn fpif7(&self) -> FPIF7_R[src]

Bit 7 - configurable event inputs x falling edge pending bit.

pub fn fpif8(&self) -> FPIF8_R[src]

Bit 8 - configurable event inputs x falling edge pending bit.

pub fn fpif9(&self) -> FPIF9_R[src]

Bit 9 - configurable event inputs x falling edge pending bit.

pub fn fpif10(&self) -> FPIF10_R[src]

Bit 10 - configurable event inputs x falling edge pending bit.

pub fn fpif11(&self) -> FPIF11_R[src]

Bit 11 - configurable event inputs x falling edge pending bit.

pub fn fpif12(&self) -> FPIF12_R[src]

Bit 12 - configurable event inputs x falling edge pending bit.

pub fn fpif13(&self) -> FPIF13_R[src]

Bit 13 - configurable event inputs x falling edge pending bit.

pub fn fpif14(&self) -> FPIF14_R[src]

Bit 14 - configurable event inputs x falling edge pending bit.

pub fn fpif15(&self) -> FPIF15_R[src]

Bit 15 - configurable event inputs x falling edge pending bit.

pub fn fpif16(&self) -> FPIF16_R[src]

Bit 16 - configurable event inputs x falling edge pending bit.

pub fn fpif21(&self) -> FPIF21_R[src]

Bit 21 - configurable event inputs x falling edge pending bit.

pub fn fpif22(&self) -> FPIF22_R[src]

Bit 22 - configurable event inputs x falling edge pending bit.

impl R<u32, Reg<u32, _SECCFGR1>>[src]

pub fn sec0(&self) -> SEC0_R[src]

Bit 0 - Security enable on event input x

pub fn sec1(&self) -> SEC1_R[src]

Bit 1 - Security enable on event input x

pub fn sec2(&self) -> SEC2_R[src]

Bit 2 - Security enable on event input x

pub fn sec3(&self) -> SEC3_R[src]

Bit 3 - Security enable on event input x

pub fn sec4(&self) -> SEC4_R[src]

Bit 4 - Security enable on event input x

pub fn sec5(&self) -> SEC5_R[src]

Bit 5 - Security enable on event input x

pub fn sec6(&self) -> SEC6_R[src]

Bit 6 - Security enable on event input x

pub fn sec7(&self) -> SEC7_R[src]

Bit 7 - Security enable on event input x

pub fn sec8(&self) -> SEC8_R[src]

Bit 8 - Security enable on event input x

pub fn sec9(&self) -> SEC9_R[src]

Bit 9 - Security enable on event input x

pub fn sec10(&self) -> SEC10_R[src]

Bit 10 - Security enable on event input x

pub fn sec11(&self) -> SEC11_R[src]

Bit 11 - Security enable on event input x

pub fn sec12(&self) -> SEC12_R[src]

Bit 12 - Security enable on event input x

pub fn sec13(&self) -> SEC13_R[src]

Bit 13 - Security enable on event input x

pub fn sec14(&self) -> SEC14_R[src]

Bit 14 - Security enable on event input x

pub fn sec15(&self) -> SEC15_R[src]

Bit 15 - Security enable on event input x

pub fn sec16(&self) -> SEC16_R[src]

Bit 16 - Security enable on event input x

pub fn sec17(&self) -> SEC17_R[src]

Bit 17 - Security enable on event input x

pub fn sec18(&self) -> SEC18_R[src]

Bit 18 - Security enable on event input x

pub fn sec19(&self) -> SEC19_R[src]

Bit 19 - Security enable on event input x

pub fn sec20(&self) -> SEC20_R[src]

Bit 20 - Security enable on event input x

pub fn sec21(&self) -> SEC21_R[src]

Bit 21 - Security enable on event input x

pub fn sec22(&self) -> SEC22_R[src]

Bit 22 - Security enable on event input x

pub fn sec23(&self) -> SEC23_R[src]

Bit 23 - Security enable on event input x

pub fn sec24(&self) -> SEC24_R[src]

Bit 24 - Security enable on event input x

pub fn sec25(&self) -> SEC25_R[src]

Bit 25 - Security enable on event input x

pub fn sec26(&self) -> SEC26_R[src]

Bit 26 - Security enable on event input x

pub fn sec27(&self) -> SEC27_R[src]

Bit 27 - Security enable on event input x

pub fn sec28(&self) -> SEC28_R[src]

Bit 28 - Security enable on event input x

pub fn sec29(&self) -> SEC29_R[src]

Bit 29 - Security enable on event input x

pub fn sec30(&self) -> SEC30_R[src]

Bit 30 - Security enable on event input x

pub fn sec31(&self) -> SEC31_R[src]

Bit 31 - Security enable on event input x

impl R<u32, Reg<u32, _PRIVCFGR1>>[src]

pub fn priv0(&self) -> PRIV0_R[src]

Bit 0 - Security enable on event input x

pub fn priv1(&self) -> PRIV1_R[src]

Bit 1 - Security enable on event input x

pub fn priv2(&self) -> PRIV2_R[src]

Bit 2 - Security enable on event input x

pub fn priv3(&self) -> PRIV3_R[src]

Bit 3 - Security enable on event input x

pub fn priv4(&self) -> PRIV4_R[src]

Bit 4 - Security enable on event input x

pub fn priv5(&self) -> PRIV5_R[src]

Bit 5 - Security enable on event input x

pub fn priv6(&self) -> PRIV6_R[src]

Bit 6 - Security enable on event input x

pub fn priv7(&self) -> PRIV7_R[src]

Bit 7 - Security enable on event input x

pub fn priv8(&self) -> PRIV8_R[src]

Bit 8 - Security enable on event input x

pub fn priv9(&self) -> PRIV9_R[src]

Bit 9 - Security enable on event input x

pub fn priv10(&self) -> PRIV10_R[src]

Bit 10 - Security enable on event input x

pub fn priv11(&self) -> PRIV11_R[src]

Bit 11 - Security enable on event input x

pub fn priv12(&self) -> PRIV12_R[src]

Bit 12 - Security enable on event input x

pub fn priv13(&self) -> PRIV13_R[src]

Bit 13 - Security enable on event input x

pub fn priv14(&self) -> PRIV14_R[src]

Bit 14 - Security enable on event input x

pub fn priv15(&self) -> PRIV15_R[src]

Bit 15 - Security enable on event input x

pub fn priv16(&self) -> PRIV16_R[src]

Bit 16 - Security enable on event input x

pub fn priv17(&self) -> PRIV17_R[src]

Bit 17 - Security enable on event input x

pub fn priv18(&self) -> PRIV18_R[src]

Bit 18 - Security enable on event input x

pub fn priv19(&self) -> PRIV19_R[src]

Bit 19 - Security enable on event input x

pub fn priv20(&self) -> PRIV20_R[src]

Bit 20 - Security enable on event input x

pub fn priv21(&self) -> PRIV21_R[src]

Bit 21 - Security enable on event input x

pub fn priv22(&self) -> PRIV22_R[src]

Bit 22 - Security enable on event input x

pub fn priv23(&self) -> PRIV23_R[src]

Bit 23 - Security enable on event input x

pub fn priv24(&self) -> PRIV24_R[src]

Bit 24 - Security enable on event input x

pub fn priv25(&self) -> PRIV25_R[src]

Bit 25 - Security enable on event input x

pub fn priv26(&self) -> PRIV26_R[src]

Bit 26 - Security enable on event input x

pub fn priv27(&self) -> PRIV27_R[src]

Bit 27 - Security enable on event input x

pub fn priv28(&self) -> PRIV28_R[src]

Bit 28 - Security enable on event input x

pub fn priv29(&self) -> PRIV29_R[src]

Bit 29 - Security enable on event input x

pub fn priv30(&self) -> PRIV30_R[src]

Bit 30 - Security enable on event input x

pub fn priv31(&self) -> PRIV31_R[src]

Bit 31 - Security enable on event input x

impl R<u32, Reg<u32, _RTSR2>>[src]

pub fn rt35(&self) -> RT35_R[src]

Bit 3 - Rising trigger event configuration bit of configurable event input x

pub fn rt36(&self) -> RT36_R[src]

Bit 4 - Rising trigger event configuration bit of configurable event input x

pub fn rt37(&self) -> RT37_R[src]

Bit 5 - Rising trigger event configuration bit of configurable event input x

pub fn rt38(&self) -> RT38_R[src]

Bit 6 - Rising trigger event configuration bit of configurable event input x

impl R<u32, Reg<u32, _FTSR2>>[src]

pub fn ft35(&self) -> FT35_R[src]

Bit 3 - FT35

pub fn ft36(&self) -> FT36_R[src]

Bit 4 - FT36

pub fn ft37(&self) -> FT37_R[src]

Bit 5 - FT37

pub fn ft38(&self) -> FT38_R[src]

Bit 6 - FT38

impl R<u32, Reg<u32, _SWIER2>>[src]

pub fn swi35(&self) -> SWI35_R[src]

Bit 3 - SWI35

pub fn swi36(&self) -> SWI36_R[src]

Bit 4 - SWI36

pub fn swi37(&self) -> SWI37_R[src]

Bit 5 - SWI37

pub fn swi38(&self) -> SWI38_R[src]

Bit 6 - SWI38

impl R<u32, Reg<u32, _RPR2>>[src]

pub fn rpif35(&self) -> RPIF35_R[src]

Bit 3 - RPIF35

pub fn rpif36(&self) -> RPIF36_R[src]

Bit 4 - RPIF36

pub fn rpif37(&self) -> RPIF37_R[src]

Bit 5 - RPIF37

pub fn rpif38(&self) -> RPIF38_R[src]

Bit 6 - RPIF38

impl R<u32, Reg<u32, _FPR2>>[src]

pub fn fpif35(&self) -> FPIF35_R[src]

Bit 3 - FPIF35

pub fn fpif36(&self) -> FPIF36_R[src]

Bit 4 - FPIF36

pub fn fpif37(&self) -> FPIF37_R[src]

Bit 5 - FPIF37

pub fn fpif38(&self) -> FPIF38_R[src]

Bit 6 - FPIF38

impl R<u32, Reg<u32, _SECCFGR2>>[src]

pub fn sec32(&self) -> SEC32_R[src]

Bit 0 - SEC32

pub fn sec33(&self) -> SEC33_R[src]

Bit 1 - SEC33

pub fn sec34(&self) -> SEC34_R[src]

Bit 2 - SEC34

pub fn sec35(&self) -> SEC35_R[src]

Bit 3 - SEC35

pub fn sec36(&self) -> SEC36_R[src]

Bit 4 - SEC36

pub fn sec37(&self) -> SEC37_R[src]

Bit 5 - SEC37

pub fn sec38(&self) -> SEC38_R[src]

Bit 6 - SEC38

pub fn sec39(&self) -> SEC39_R[src]

Bit 7 - SEC39

pub fn sec40(&self) -> SEC40_R[src]

Bit 8 - SEC40

pub fn sec41(&self) -> SEC41_R[src]

Bit 9 - SEC41

pub fn sec42(&self) -> SEC42_R[src]

Bit 10 - SEC42

impl R<u32, Reg<u32, _PRIVCFGR2>>[src]

pub fn priv32(&self) -> PRIV32_R[src]

Bit 0 - PRIV32

pub fn priv33(&self) -> PRIV33_R[src]

Bit 1 - PRIV33

pub fn priv34(&self) -> PRIV34_R[src]

Bit 2 - PRIV34

pub fn priv35(&self) -> PRIV35_R[src]

Bit 3 - PRIV35

pub fn priv36(&self) -> PRIV36_R[src]

Bit 4 - PRIV36

pub fn priv37(&self) -> PRIV37_R[src]

Bit 5 - PRIV37

pub fn priv38(&self) -> PRIV38_R[src]

Bit 6 - PRIV38

pub fn priv39(&self) -> PRIV39_R[src]

Bit 7 - PRIV39

pub fn priv40(&self) -> PRIV40_R[src]

Bit 8 - PRIV40

pub fn priv41(&self) -> PRIV41_R[src]

Bit 9 - PRIV41

pub fn priv42(&self) -> PRIV42_R[src]

Bit 10 - PRIV42

impl R<u32, Reg<u32, _EXTICR1>>[src]

pub fn exti0_7(&self) -> EXTI0_7_R[src]

Bits 0:7 - EXTIm GPIO port selection

pub fn exti8_15(&self) -> EXTI8_15_R[src]

Bits 8:15 - EXTIm+1 GPIO port selection

pub fn exti16_23(&self) -> EXTI16_23_R[src]

Bits 16:23 - EXTIm+2 GPIO port selection

pub fn exti24_31(&self) -> EXTI24_31_R[src]

Bits 24:31 - EXTIm+3 GPIO port selection

impl R<u32, Reg<u32, _EXTICR2>>[src]

pub fn exti0_7(&self) -> EXTI0_7_R[src]

Bits 0:7 - EXTIm GPIO port selection

pub fn exti8_15(&self) -> EXTI8_15_R[src]

Bits 8:15 - EXTIm+1 GPIO port selection

pub fn exti16_23(&self) -> EXTI16_23_R[src]

Bits 16:23 - EXTIm+2 GPIO port selection

pub fn exti24_31(&self) -> EXTI24_31_R[src]

Bits 24:31 - EXTIm+3 GPIO port selection

impl R<u32, Reg<u32, _EXTICR3>>[src]

pub fn exti0_7(&self) -> EXTI0_7_R[src]

Bits 0:7 - EXTIm GPIO port selection

pub fn exti8_15(&self) -> EXTI8_15_R[src]

Bits 8:15 - EXTIm+1 GPIO port selection

pub fn exti16_23(&self) -> EXTI16_23_R[src]

Bits 16:23 - EXTIm+2 GPIO port selection

pub fn exti24_31(&self) -> EXTI24_31_R[src]

Bits 24:31 - EXTIm+3 GPIO port selection

impl R<u32, Reg<u32, _EXTICR4>>[src]

pub fn exti0_7(&self) -> EXTI0_7_R[src]

Bits 0:7 - EXTIm GPIO port selection

pub fn exti8_15(&self) -> EXTI8_15_R[src]

Bits 8:15 - EXTIm+1 GPIO port selection

pub fn exti16_23(&self) -> EXTI16_23_R[src]

Bits 16:23 - EXTIm+2 GPIO port selection

pub fn exti24_31(&self) -> EXTI24_31_R[src]

Bits 24:31 - EXTIm+3 GPIO port selection

impl R<u32, Reg<u32, _LOCKRG>>[src]

pub fn lock(&self) -> LOCK_R[src]

Bit 0 - LOCK

impl R<u32, Reg<u32, _IMR1>>[src]

pub fn im0(&self) -> IM0_R[src]

Bit 0 - CPU wakeup with interrupt mask on event input

pub fn im1(&self) -> IM1_R[src]

Bit 1 - CPU wakeup with interrupt mask on event input

pub fn im2(&self) -> IM2_R[src]

Bit 2 - CPU wakeup with interrupt mask on event input

pub fn im3(&self) -> IM3_R[src]

Bit 3 - CPU wakeup with interrupt mask on event input

pub fn im4(&self) -> IM4_R[src]

Bit 4 - CPU wakeup with interrupt mask on event input

pub fn im5(&self) -> IM5_R[src]

Bit 5 - CPU wakeup with interrupt mask on event input

pub fn im6(&self) -> IM6_R[src]

Bit 6 - CPU wakeup with interrupt mask on event input

pub fn im7(&self) -> IM7_R[src]

Bit 7 - CPU wakeup with interrupt mask on event input

pub fn im8(&self) -> IM8_R[src]

Bit 8 - CPU wakeup with interrupt mask on event input

pub fn im9(&self) -> IM9_R[src]

Bit 9 - CPU wakeup with interrupt mask on event input

pub fn im10(&self) -> IM10_R[src]

Bit 10 - CPU wakeup with interrupt mask on event input

pub fn im11(&self) -> IM11_R[src]

Bit 11 - CPU wakeup with interrupt mask on event input

pub fn im12(&self) -> IM12_R[src]

Bit 12 - CPU wakeup with interrupt mask on event input

pub fn im13(&self) -> IM13_R[src]

Bit 13 - CPU wakeup with interrupt mask on event input

pub fn im14(&self) -> IM14_R[src]

Bit 14 - CPU wakeup with interrupt mask on event input

pub fn im15(&self) -> IM15_R[src]

Bit 15 - CPU wakeup with interrupt mask on event input

pub fn im16(&self) -> IM16_R[src]

Bit 16 - CPU wakeup with interrupt mask on event input

pub fn im17(&self) -> IM17_R[src]

Bit 17 - CPU wakeup with interrupt mask on event input

pub fn im18(&self) -> IM18_R[src]

Bit 18 - CPU wakeup with interrupt mask on event input

pub fn im19(&self) -> IM19_R[src]

Bit 19 - CPU wakeup with interrupt mask on event input

pub fn im20(&self) -> IM20_R[src]

Bit 20 - CPU wakeup with interrupt mask on event input

pub fn im21(&self) -> IM21_R[src]

Bit 21 - CPU wakeup with interrupt mask on event input

pub fn im22(&self) -> IM22_R[src]

Bit 22 - CPU wakeup with interrupt mask on event input

pub fn im23(&self) -> IM23_R[src]

Bit 23 - CPU wakeup with interrupt mask on event input

pub fn im24(&self) -> IM24_R[src]

Bit 24 - CPU wakeup with interrupt mask on event input

pub fn im25(&self) -> IM25_R[src]

Bit 25 - CPU wakeup with interrupt mask on event input

pub fn im26(&self) -> IM26_R[src]

Bit 26 - CPU wakeup with interrupt mask on event input

pub fn im27(&self) -> IM27_R[src]

Bit 27 - CPU wakeup with interrupt mask on event input

pub fn im28(&self) -> IM28_R[src]

Bit 28 - CPU wakeup with interrupt mask on event input

pub fn im29(&self) -> IM29_R[src]

Bit 29 - CPU wakeup with interrupt mask on event input

pub fn im30(&self) -> IM30_R[src]

Bit 30 - CPU wakeup with interrupt mask on event input

pub fn im31(&self) -> IM31_R[src]

Bit 31 - CPU wakeup with interrupt mask on event input

impl R<u32, Reg<u32, _EMR1>>[src]

pub fn em0(&self) -> EM0_R[src]

Bit 0 - CPU wakeup with interrupt mask on event input

pub fn em1(&self) -> EM1_R[src]

Bit 1 - CPU wakeup with interrupt mask on event input

pub fn em2(&self) -> EM2_R[src]

Bit 2 - CPU wakeup with interrupt mask on event input

pub fn em3(&self) -> EM3_R[src]

Bit 3 - CPU wakeup with interrupt mask on event input

pub fn em4(&self) -> EM4_R[src]

Bit 4 - CPU wakeup with interrupt mask on event input

pub fn em5(&self) -> EM5_R[src]

Bit 5 - CPU wakeup with interrupt mask on event input

pub fn em6(&self) -> EM6_R[src]

Bit 6 - CPU wakeup with interrupt mask on event input

pub fn em7(&self) -> EM7_R[src]

Bit 7 - CPU wakeup with interrupt mask on event input

pub fn em8(&self) -> EM8_R[src]

Bit 8 - CPU wakeup with interrupt mask on event input

pub fn em9(&self) -> EM9_R[src]

Bit 9 - CPU wakeup with interrupt mask on event input

pub fn em10(&self) -> EM10_R[src]

Bit 10 - CPU wakeup with interrupt mask on event input

pub fn em11(&self) -> EM11_R[src]

Bit 11 - CPU wakeup with interrupt mask on event input

pub fn em12(&self) -> EM12_R[src]

Bit 12 - CPU wakeup with interrupt mask on event input

pub fn em13(&self) -> EM13_R[src]

Bit 13 - CPU wakeup with interrupt mask on event input

pub fn em14(&self) -> EM14_R[src]

Bit 14 - CPU wakeup with interrupt mask on event input

pub fn em15(&self) -> EM15_R[src]

Bit 15 - CPU wakeup with interrupt mask on event input

pub fn em16(&self) -> EM16_R[src]

Bit 16 - CPU wakeup with interrupt mask on event input

pub fn em17(&self) -> EM17_R[src]

Bit 17 - CPU wakeup with interrupt mask on event input

pub fn em18(&self) -> EM18_R[src]

Bit 18 - CPU wakeup with interrupt mask on event input

pub fn em19(&self) -> EM19_R[src]

Bit 19 - CPU wakeup with interrupt mask on event input

pub fn em20(&self) -> EM20_R[src]

Bit 20 - CPU wakeup with interrupt mask on event input

pub fn em21(&self) -> EM21_R[src]

Bit 21 - CPU wakeup with interrupt mask on event input

pub fn em22(&self) -> EM22_R[src]

Bit 22 - CPU wakeup with interrupt mask on event input

pub fn em23(&self) -> EM23_R[src]

Bit 23 - CPU wakeup with interrupt mask on event input

pub fn em24(&self) -> EM24_R[src]

Bit 24 - CPU wakeup with interrupt mask on event input

pub fn em25(&self) -> EM25_R[src]

Bit 25 - CPU wakeup with interrupt mask on event input

pub fn em26(&self) -> EM26_R[src]

Bit 26 - CPU wakeup with interrupt mask on event input

pub fn em27(&self) -> EM27_R[src]

Bit 27 - CPU wakeup with interrupt mask on event input

pub fn em28(&self) -> EM28_R[src]

Bit 28 - CPU wakeup with interrupt mask on event input

pub fn em29(&self) -> EM29_R[src]

Bit 29 - CPU wakeup with interrupt mask on event input

pub fn em30(&self) -> EM30_R[src]

Bit 30 - CPU wakeup with interrupt mask on event input

pub fn em31(&self) -> EM31_R[src]

Bit 31 - CPU wakeup with interrupt mask on event input

impl R<u32, Reg<u32, _IMR2>>[src]

pub fn im32(&self) -> IM32_R[src]

Bit 0 - CPU wakeup with interrupt mask on event input

pub fn im33(&self) -> IM33_R[src]

Bit 1 - CPU wakeup with interrupt mask on event input

pub fn im34(&self) -> IM34_R[src]

Bit 2 - CPU wakeup with interrupt mask on event input

pub fn im35(&self) -> IM35_R[src]

Bit 3 - CPU wakeup with interrupt mask on event input

pub fn im36(&self) -> IM36_R[src]

Bit 4 - CPU wakeup with interrupt mask on event input

pub fn im37(&self) -> IM37_R[src]

Bit 5 - CPU wakeup with interrupt mask on event input

pub fn im38(&self) -> IM38_R[src]

Bit 6 - CPU wakeup with interrupt mask on event input

pub fn im40(&self) -> IM40_R[src]

Bit 8 - CPU wakeup with interrupt mask on event input

pub fn im41(&self) -> IM41_R[src]

Bit 9 - CPU wakeup with interrupt mask on event input

pub fn im42(&self) -> IM42_R[src]

Bit 10 - CPU wakeup with interrupt mask on event input

impl R<u32, Reg<u32, _EMR2>>[src]

pub fn em32(&self) -> EM32_R[src]

Bit 0 - CPU wakeup with interrupt mask on event input

pub fn em33(&self) -> EM33_R[src]

Bit 1 - CPU wakeup with interrupt mask on event input

pub fn em34(&self) -> EM34_R[src]

Bit 2 - CPU wakeup with interrupt mask on event input

pub fn em35(&self) -> EM35_R[src]

Bit 3 - CPU wakeup with interrupt mask on event input

pub fn em36(&self) -> EM36_R[src]

Bit 4 - CPU wakeup with interrupt mask on event input

pub fn em37(&self) -> EM37_R[src]

Bit 5 - CPU wakeup with interrupt mask on event input

pub fn em38(&self) -> EM38_R[src]

Bit 6 - CPU wakeup with interrupt mask on event input

pub fn em40(&self) -> EM40_R[src]

Bit 8 - CPU wakeup with interrupt mask on event input

pub fn em41(&self) -> EM41_R[src]

Bit 9 - CPU wakeup with interrupt mask on event input

pub fn em42(&self) -> EM42_R[src]

Bit 10 - CPU wakeup with interrupt mask on event input

impl R<u32, Reg<u32, _ACR>>[src]

pub fn latency(&self) -> LATENCY_R[src]

Bits 0:3 - Latency

pub fn run_pd(&self) -> RUN_PD_R[src]

Bit 13 - Flash Power-down mode during Low-power run mode

pub fn sleep_pd(&self) -> SLEEP_PD_R[src]

Bit 14 - Flash Power-down mode during Low-power sleep mode

pub fn lven(&self) -> LVEN_R[src]

Bit 15 - LVEN

impl R<u32, Reg<u32, _NSSR>>[src]

pub fn nseop(&self) -> NSEOP_R[src]

Bit 0 - NSEOP

pub fn nsoperr(&self) -> NSOPERR_R[src]

Bit 1 - NSOPERR

pub fn nsprogerr(&self) -> NSPROGERR_R[src]

Bit 3 - NSPROGERR

pub fn nswrperr(&self) -> NSWRPERR_R[src]

Bit 4 - NSWRPERR

pub fn nspgaerr(&self) -> NSPGAERR_R[src]

Bit 5 - NSPGAERR

pub fn nssizerr(&self) -> NSSIZERR_R[src]

Bit 6 - NSSIZERR

pub fn nspgserr(&self) -> NSPGSERR_R[src]

Bit 7 - NSPGSERR

pub fn optwerr(&self) -> OPTWERR_R[src]

Bit 13 - OPTWERR

pub fn optverr(&self) -> OPTVERR_R[src]

Bit 15 - OPTVERR

pub fn nsbsy(&self) -> NSBSY_R[src]

Bit 16 - NSBusy

impl R<u32, Reg<u32, _SECSR>>[src]

pub fn seceop(&self) -> SECEOP_R[src]

Bit 0 - SECEOP

pub fn secoperr(&self) -> SECOPERR_R[src]

Bit 1 - SECOPERR

pub fn secprogerr(&self) -> SECPROGERR_R[src]

Bit 3 - SECPROGERR

pub fn secwrperr(&self) -> SECWRPERR_R[src]

Bit 4 - SECWRPERR

pub fn secpgaerr(&self) -> SECPGAERR_R[src]

Bit 5 - SECPGAERR

pub fn secsizerr(&self) -> SECSIZERR_R[src]

Bit 6 - SECSIZERR

pub fn secpgserr(&self) -> SECPGSERR_R[src]

Bit 7 - SECPGSERR

pub fn secrderr(&self) -> SECRDERR_R[src]

Bit 14 - Secure read protection error

pub fn secbsy(&self) -> SECBSY_R[src]

Bit 16 - SECBusy

impl R<u32, Reg<u32, _NSCR>>[src]

pub fn nspg(&self) -> NSPG_R[src]

Bit 0 - NSPG

pub fn nsper(&self) -> NSPER_R[src]

Bit 1 - NSPER

pub fn nsmer1(&self) -> NSMER1_R[src]

Bit 2 - NSMER1

pub fn nspnb(&self) -> NSPNB_R[src]

Bits 3:9 - NSPNB

pub fn nsbker(&self) -> NSBKER_R[src]

Bit 11 - NSBKER

pub fn nsmer2(&self) -> NSMER2_R[src]

Bit 15 - NSMER2

pub fn nsstrt(&self) -> NSSTRT_R[src]

Bit 16 - Options modification start

pub fn optstrt(&self) -> OPTSTRT_R[src]

Bit 17 - Options modification start

pub fn nseopie(&self) -> NSEOPIE_R[src]

Bit 24 - NSEOPIE

pub fn nserrie(&self) -> NSERRIE_R[src]

Bit 25 - NSERRIE

pub fn obl_launch(&self) -> OBL_LAUNCH_R[src]

Bit 27 - Force the option byte loading

pub fn optlock(&self) -> OPTLOCK_R[src]

Bit 30 - Options Lock

pub fn nslock(&self) -> NSLOCK_R[src]

Bit 31 - NSLOCK

impl R<u32, Reg<u32, _SECCR>>[src]

pub fn secpg(&self) -> SECPG_R[src]

Bit 0 - SECPG

pub fn secper(&self) -> SECPER_R[src]

Bit 1 - SECPER

pub fn secmer1(&self) -> SECMER1_R[src]

Bit 2 - SECMER1

pub fn secpnb(&self) -> SECPNB_R[src]

Bits 3:9 - SECPNB

pub fn secbker(&self) -> SECBKER_R[src]

Bit 11 - SECBKER

pub fn secmer2(&self) -> SECMER2_R[src]

Bit 15 - SECMER2

pub fn secstrt(&self) -> SECSTRT_R[src]

Bit 16 - SECSTRT

pub fn seceopie(&self) -> SECEOPIE_R[src]

Bit 24 - SECEOPIE

pub fn secerrie(&self) -> SECERRIE_R[src]

Bit 25 - SECERRIE

pub fn secrderrie(&self) -> SECRDERRIE_R[src]

Bit 26 - SECRDERRIE

pub fn secinv(&self) -> SECINV_R[src]

Bit 29 - SECINV

pub fn seclock(&self) -> SECLOCK_R[src]

Bit 31 - SECLOCK

impl R<u32, Reg<u32, _ECCR>>[src]

pub fn addr_ecc(&self) -> ADDR_ECC_R[src]

Bits 0:18 - ECC fail address

pub fn bk_ecc(&self) -> BK_ECC_R[src]

Bit 21 - BK_ECC

pub fn sysf_ecc(&self) -> SYSF_ECC_R[src]

Bit 22 - SYSF_ECC

pub fn eccie(&self) -> ECCIE_R[src]

Bit 24 - ECC correction interrupt enable

pub fn eccc2(&self) -> ECCC2_R[src]

Bit 28 - ECCC2

pub fn eccd2(&self) -> ECCD2_R[src]

Bit 29 - ECCD2

pub fn eccc(&self) -> ECCC_R[src]

Bit 30 - ECC correction

pub fn eccd(&self) -> ECCD_R[src]

Bit 31 - ECC detection

impl R<u32, Reg<u32, _OPTR>>[src]

pub fn rdp(&self) -> RDP_R[src]

Bits 0:7 - Read protection level

pub fn bor_lev(&self) -> BOR_LEV_R[src]

Bits 8:10 - BOR reset Level

pub fn n_rst_stop(&self) -> NRST_STOP_R[src]

Bit 12 - nRST_STOP

pub fn n_rst_stdby(&self) -> NRST_STDBY_R[src]

Bit 13 - nRST_STDBY

pub fn n_rst_shdw(&self) -> NRST_SHDW_R[src]

Bit 14 - nRST_SHDW

pub fn iwdg_sw(&self) -> IWDG_SW_R[src]

Bit 16 - Independent watchdog selection

pub fn iwdg_stop(&self) -> IWDG_STOP_R[src]

Bit 17 - Independent watchdog counter freeze in Stop mode

pub fn iwdg_stdby(&self) -> IWDG_STDBY_R[src]

Bit 18 - Independent watchdog counter freeze in Standby mode

pub fn wwdg_sw(&self) -> WWDG_SW_R[src]

Bit 19 - Window watchdog selection

pub fn swap_bank(&self) -> SWAP_BANK_R[src]

Bit 20 - SWAP_BANK

pub fn db256k(&self) -> DB256K_R[src]

Bit 21 - DB256K

pub fn dbank(&self) -> DBANK_R[src]

Bit 22 - DBANK

pub fn sram2_pe(&self) -> SRAM2_PE_R[src]

Bit 24 - SRAM2 parity check enable

pub fn sram2_rst(&self) -> SRAM2_RST_R[src]

Bit 25 - SRAM2 Erase when system reset

pub fn n_swboot0(&self) -> NSWBOOT0_R[src]

Bit 26 - nSWBOOT0

pub fn n_boot0(&self) -> NBOOT0_R[src]

Bit 27 - nBOOT0

pub fn pa15_pupen(&self) -> PA15_PUPEN_R[src]

Bit 28 - PA15_PUPEN

pub fn tzen(&self) -> TZEN_R[src]

Bit 31 - TZEN

impl R<u32, Reg<u32, _SECBOOTADD0R>>[src]

pub fn boot_lock(&self) -> BOOT_LOCK_R[src]

Bit 0 - BOOT_LOCK

impl R<u32, Reg<u32, _SECWM1R1>>[src]

pub fn secwm1_pstrt(&self) -> SECWM1_PSTRT_R[src]

Bits 0:6 - SECWM1_PSTRT

pub fn secwm1_pend(&self) -> SECWM1_PEND_R[src]

Bits 16:22 - SECWM1_PEND

impl R<u32, Reg<u32, _SECWM1R2>>[src]

pub fn pcrop1_pstrt(&self) -> PCROP1_PSTRT_R[src]

Bits 0:6 - PCROP1_PSTRT

pub fn pcrop1en(&self) -> PCROP1EN_R[src]

Bit 15 - PCROP1EN

pub fn hdp1_pend(&self) -> HDP1_PEND_R[src]

Bits 16:22 - HDP1_PEND

pub fn hdp1en(&self) -> HDP1EN_R[src]

Bit 31 - HDP1EN

impl R<u32, Reg<u32, _WRP1AR>>[src]

pub fn wrp1a_pstrt(&self) -> WRP1A_PSTRT_R[src]

Bits 0:6 - WRP1A_PSTRT

pub fn wrp1a_pend(&self) -> WRP1A_PEND_R[src]

Bits 16:22 - WRP1A_PEND

impl R<u32, Reg<u32, _WRP1BR>>[src]

pub fn wrp1b_pstrt(&self) -> WRP1B_PSTRT_R[src]

Bits 0:6 - WRP1B_PSTRT

pub fn wrp1b_pend(&self) -> WRP1B_PEND_R[src]

Bits 16:22 - WRP1B_PEND

impl R<u32, Reg<u32, _SECWM2R1>>[src]

pub fn secwm2_pstrt(&self) -> SECWM2_PSTRT_R[src]

Bits 0:6 - SECWM2_PSTRT

pub fn secwm2_pend(&self) -> SECWM2_PEND_R[src]

Bits 16:22 - SECWM2_PEND

impl R<u32, Reg<u32, _SECWM2R2>>[src]

pub fn pcrop2_pstrt(&self) -> PCROP2_PSTRT_R[src]

Bits 0:6 - PCROP2_PSTRT

pub fn pcrop2en(&self) -> PCROP2EN_R[src]

Bit 15 - PCROP2EN

pub fn hdp2_pend(&self) -> HDP2_PEND_R[src]

Bits 16:22 - HDP2_PEND

pub fn hdp2en(&self) -> HDP2EN_R[src]

Bit 31 - HDP2EN

impl R<u32, Reg<u32, _WRP2AR>>[src]

pub fn wrp2a_pstrt(&self) -> WRP2A_PSTRT_R[src]

Bits 0:6 - WRP2A_PSTRT

pub fn wrp2a_pend(&self) -> WRP2A_PEND_R[src]

Bits 16:22 - WRP2A_PEND

impl R<u32, Reg<u32, _WRP2BR>>[src]

pub fn wrp2b_pstrt(&self) -> WRP2B_PSTRT_R[src]

Bits 0:6 - WRP2B_PSTRT

pub fn wrp2b_pend(&self) -> WRP2B_PEND_R[src]

Bits 16:22 - WRP2B_PEND

impl R<u32, Reg<u32, _SECBB1R1>>[src]

pub fn secbb1(&self) -> SECBB1_R[src]

Bits 0:31 - SECBB1

impl R<u32, Reg<u32, _SECBB1R2>>[src]

pub fn secbb1(&self) -> SECBB1_R[src]

Bits 0:31 - SECBB1

impl R<u32, Reg<u32, _SECBB1R3>>[src]

pub fn secbb1(&self) -> SECBB1_R[src]

Bits 0:31 - SECBB1

impl R<u32, Reg<u32, _SECBB1R4>>[src]

pub fn secbb1(&self) -> SECBB1_R[src]

Bits 0:31 - SECBB1

impl R<u32, Reg<u32, _SECBB2R1>>[src]

pub fn secbb2(&self) -> SECBB2_R[src]

Bits 0:31 - SECBB2

impl R<u32, Reg<u32, _SECBB2R2>>[src]

pub fn secbb2(&self) -> SECBB2_R[src]

Bits 0:31 - SECBB2

impl R<u32, Reg<u32, _SECBB2R3>>[src]

pub fn secbb2(&self) -> SECBB2_R[src]

Bits 0:31 - SECBB2

impl R<u32, Reg<u32, _SECBB2R4>>[src]

pub fn secbb2(&self) -> SECBB2_R[src]

Bits 0:31 - SECBB2

impl R<u32, Reg<u32, _SECHDPCR>>[src]

pub fn hdp1_accdis(&self) -> HDP1_ACCDIS_R[src]

Bit 0 - HDP1_ACCDIS

pub fn hdp2_accdis(&self) -> HDP2_ACCDIS_R[src]

Bit 1 - HDP2_ACCDIS

impl R<u32, Reg<u32, _PRIVCFGR>>[src]

pub fn priv_(&self) -> PRIV_R[src]

Bit 0 - PRIV

impl R<u32, Reg<u32, _MODER>>[src]

pub fn moder15(&self) -> MODER15_R[src]

Bits 30:31 - Port x configuration bits (y = 0..15)

pub fn moder14(&self) -> MODER14_R[src]

Bits 28:29 - Port x configuration bits (y = 0..15)

pub fn moder13(&self) -> MODER13_R[src]

Bits 26:27 - Port x configuration bits (y = 0..15)

pub fn moder12(&self) -> MODER12_R[src]

Bits 24:25 - Port x configuration bits (y = 0..15)

pub fn moder11(&self) -> MODER11_R[src]

Bits 22:23 - Port x configuration bits (y = 0..15)

pub fn moder10(&self) -> MODER10_R[src]

Bits 20:21 - Port x configuration bits (y = 0..15)

pub fn moder9(&self) -> MODER9_R[src]

Bits 18:19 - Port x configuration bits (y = 0..15)

pub fn moder8(&self) -> MODER8_R[src]

Bits 16:17 - Port x configuration bits (y = 0..15)

pub fn moder7(&self) -> MODER7_R[src]

Bits 14:15 - Port x configuration bits (y = 0..15)

pub fn moder6(&self) -> MODER6_R[src]

Bits 12:13 - Port x configuration bits (y = 0..15)

pub fn moder5(&self) -> MODER5_R[src]

Bits 10:11 - Port x configuration bits (y = 0..15)

pub fn moder4(&self) -> MODER4_R[src]

Bits 8:9 - Port x configuration bits (y = 0..15)

pub fn moder3(&self) -> MODER3_R[src]

Bits 6:7 - Port x configuration bits (y = 0..15)

pub fn moder2(&self) -> MODER2_R[src]

Bits 4:5 - Port x configuration bits (y = 0..15)

pub fn moder1(&self) -> MODER1_R[src]

Bits 2:3 - Port x configuration bits (y = 0..15)

pub fn moder0(&self) -> MODER0_R[src]

Bits 0:1 - Port x configuration bits (y = 0..15)

impl R<u32, Reg<u32, _OTYPER>>[src]

pub fn ot15(&self) -> OT15_R[src]

Bit 15 - Port x configuration bits (y = 0..15)

pub fn ot14(&self) -> OT14_R[src]

Bit 14 - Port x configuration bits (y = 0..15)

pub fn ot13(&self) -> OT13_R[src]

Bit 13 - Port x configuration bits (y = 0..15)

pub fn ot12(&self) -> OT12_R[src]

Bit 12 - Port x configuration bits (y = 0..15)

pub fn ot11(&self) -> OT11_R[src]

Bit 11 - Port x configuration bits (y = 0..15)

pub fn ot10(&self) -> OT10_R[src]

Bit 10 - Port x configuration bits (y = 0..15)

pub fn ot9(&self) -> OT9_R[src]

Bit 9 - Port x configuration bits (y = 0..15)

pub fn ot8(&self) -> OT8_R[src]

Bit 8 - Port x configuration bits (y = 0..15)

pub fn ot7(&self) -> OT7_R[src]

Bit 7 - Port x configuration bits (y = 0..15)

pub fn ot6(&self) -> OT6_R[src]

Bit 6 - Port x configuration bits (y = 0..15)

pub fn ot5(&self) -> OT5_R[src]

Bit 5 - Port x configuration bits (y = 0..15)

pub fn ot4(&self) -> OT4_R[src]

Bit 4 - Port x configuration bits (y = 0..15)

pub fn ot3(&self) -> OT3_R[src]

Bit 3 - Port x configuration bits (y = 0..15)

pub fn ot2(&self) -> OT2_R[src]

Bit 2 - Port x configuration bits (y = 0..15)

pub fn ot1(&self) -> OT1_R[src]

Bit 1 - Port x configuration bits (y = 0..15)

pub fn ot0(&self) -> OT0_R[src]

Bit 0 - Port x configuration bits (y = 0..15)

impl R<u32, Reg<u32, _OSPEEDR>>[src]

pub fn ospeedr15(&self) -> OSPEEDR15_R[src]

Bits 30:31 - Port x configuration bits (y = 0..15)

pub fn ospeedr14(&self) -> OSPEEDR14_R[src]

Bits 28:29 - Port x configuration bits (y = 0..15)

pub fn ospeedr13(&self) -> OSPEEDR13_R[src]

Bits 26:27 - Port x configuration bits (y = 0..15)

pub fn ospeedr12(&self) -> OSPEEDR12_R[src]

Bits 24:25 - Port x configuration bits (y = 0..15)

pub fn ospeedr11(&self) -> OSPEEDR11_R[src]

Bits 22:23 - Port x configuration bits (y = 0..15)

pub fn ospeedr10(&self) -> OSPEEDR10_R[src]

Bits 20:21 - Port x configuration bits (y = 0..15)

pub fn ospeedr9(&self) -> OSPEEDR9_R[src]

Bits 18:19 - Port x configuration bits (y = 0..15)

pub fn ospeedr8(&self) -> OSPEEDR8_R[src]

Bits 16:17 - Port x configuration bits (y = 0..15)

pub fn ospeedr7(&self) -> OSPEEDR7_R[src]

Bits 14:15 - Port x configuration bits (y = 0..15)

pub fn ospeedr6(&self) -> OSPEEDR6_R[src]

Bits 12:13 - Port x configuration bits (y = 0..15)

pub fn ospeedr5(&self) -> OSPEEDR5_R[src]

Bits 10:11 - Port x configuration bits (y = 0..15)

pub fn ospeedr4(&self) -> OSPEEDR4_R[src]

Bits 8:9 - Port x configuration bits (y = 0..15)

pub fn ospeedr3(&self) -> OSPEEDR3_R[src]

Bits 6:7 - Port x configuration bits (y = 0..15)

pub fn ospeedr2(&self) -> OSPEEDR2_R[src]

Bits 4:5 - Port x configuration bits (y = 0..15)

pub fn ospeedr1(&self) -> OSPEEDR1_R[src]

Bits 2:3 - Port x configuration bits (y = 0..15)

pub fn ospeedr0(&self) -> OSPEEDR0_R[src]

Bits 0:1 - Port x configuration bits (y = 0..15)

impl R<u32, Reg<u32, _PUPDR>>[src]

pub fn pupdr15(&self) -> PUPDR15_R[src]

Bits 30:31 - Port x configuration bits (y = 0..15)

pub fn pupdr14(&self) -> PUPDR14_R[src]

Bits 28:29 - Port x configuration bits (y = 0..15)

pub fn pupdr13(&self) -> PUPDR13_R[src]

Bits 26:27 - Port x configuration bits (y = 0..15)

pub fn pupdr12(&self) -> PUPDR12_R[src]

Bits 24:25 - Port x configuration bits (y = 0..15)

pub fn pupdr11(&self) -> PUPDR11_R[src]

Bits 22:23 - Port x configuration bits (y = 0..15)

pub fn pupdr10(&self) -> PUPDR10_R[src]

Bits 20:21 - Port x configuration bits (y = 0..15)

pub fn pupdr9(&self) -> PUPDR9_R[src]

Bits 18:19 - Port x configuration bits (y = 0..15)

pub fn pupdr8(&self) -> PUPDR8_R[src]

Bits 16:17 - Port x configuration bits (y = 0..15)

pub fn pupdr7(&self) -> PUPDR7_R[src]

Bits 14:15 - Port x configuration bits (y = 0..15)

pub fn pupdr6(&self) -> PUPDR6_R[src]

Bits 12:13 - Port x configuration bits (y = 0..15)

pub fn pupdr5(&self) -> PUPDR5_R[src]

Bits 10:11 - Port x configuration bits (y = 0..15)

pub fn pupdr4(&self) -> PUPDR4_R[src]

Bits 8:9 - Port x configuration bits (y = 0..15)

pub fn pupdr3(&self) -> PUPDR3_R[src]

Bits 6:7 - Port x configuration bits (y = 0..15)

pub fn pupdr2(&self) -> PUPDR2_R[src]

Bits 4:5 - Port x configuration bits (y = 0..15)

pub fn pupdr1(&self) -> PUPDR1_R[src]

Bits 2:3 - Port x configuration bits (y = 0..15)

pub fn pupdr0(&self) -> PUPDR0_R[src]

Bits 0:1 - Port x configuration bits (y = 0..15)

impl R<u32, Reg<u32, _IDR>>[src]

pub fn idr15(&self) -> IDR15_R[src]

Bit 15 - Port input data (y = 0..15)

pub fn idr14(&self) -> IDR14_R[src]

Bit 14 - Port input data (y = 0..15)

pub fn idr13(&self) -> IDR13_R[src]

Bit 13 - Port input data (y = 0..15)

pub fn idr12(&self) -> IDR12_R[src]

Bit 12 - Port input data (y = 0..15)

pub fn idr11(&self) -> IDR11_R[src]

Bit 11 - Port input data (y = 0..15)

pub fn idr10(&self) -> IDR10_R[src]

Bit 10 - Port input data (y = 0..15)

pub fn idr9(&self) -> IDR9_R[src]

Bit 9 - Port input data (y = 0..15)

pub fn idr8(&self) -> IDR8_R[src]

Bit 8 - Port input data (y = 0..15)

pub fn idr7(&self) -> IDR7_R[src]

Bit 7 - Port input data (y = 0..15)

pub fn idr6(&self) -> IDR6_R[src]

Bit 6 - Port input data (y = 0..15)

pub fn idr5(&self) -> IDR5_R[src]

Bit 5 - Port input data (y = 0..15)

pub fn idr4(&self) -> IDR4_R[src]

Bit 4 - Port input data (y = 0..15)

pub fn idr3(&self) -> IDR3_R[src]

Bit 3 - Port input data (y = 0..15)

pub fn idr2(&self) -> IDR2_R[src]

Bit 2 - Port input data (y = 0..15)

pub fn idr1(&self) -> IDR1_R[src]

Bit 1 - Port input data (y = 0..15)

pub fn idr0(&self) -> IDR0_R[src]

Bit 0 - Port input data (y = 0..15)

impl R<u32, Reg<u32, _ODR>>[src]

pub fn odr15(&self) -> ODR15_R[src]

Bit 15 - Port output data (y = 0..15)

pub fn odr14(&self) -> ODR14_R[src]

Bit 14 - Port output data (y = 0..15)

pub fn odr13(&self) -> ODR13_R[src]

Bit 13 - Port output data (y = 0..15)

pub fn odr12(&self) -> ODR12_R[src]

Bit 12 - Port output data (y = 0..15)

pub fn odr11(&self) -> ODR11_R[src]

Bit 11 - Port output data (y = 0..15)

pub fn odr10(&self) -> ODR10_R[src]

Bit 10 - Port output data (y = 0..15)

pub fn odr9(&self) -> ODR9_R[src]

Bit 9 - Port output data (y = 0..15)

pub fn odr8(&self) -> ODR8_R[src]

Bit 8 - Port output data (y = 0..15)

pub fn odr7(&self) -> ODR7_R[src]

Bit 7 - Port output data (y = 0..15)

pub fn odr6(&self) -> ODR6_R[src]

Bit 6 - Port output data (y = 0..15)

pub fn odr5(&self) -> ODR5_R[src]

Bit 5 - Port output data (y = 0..15)

pub fn odr4(&self) -> ODR4_R[src]

Bit 4 - Port output data (y = 0..15)

pub fn odr3(&self) -> ODR3_R[src]

Bit 3 - Port output data (y = 0..15)

pub fn odr2(&self) -> ODR2_R[src]

Bit 2 - Port output data (y = 0..15)

pub fn odr1(&self) -> ODR1_R[src]

Bit 1 - Port output data (y = 0..15)

pub fn odr0(&self) -> ODR0_R[src]

Bit 0 - Port output data (y = 0..15)

impl R<u32, Reg<u32, _LCKR>>[src]

pub fn lckk(&self) -> LCKK_R[src]

Bit 16 - Port x lock bit y (y= 0..15)

pub fn lck15(&self) -> LCK15_R[src]

Bit 15 - Port x lock bit y (y= 0..15)

pub fn lck14(&self) -> LCK14_R[src]

Bit 14 - Port x lock bit y (y= 0..15)

pub fn lck13(&self) -> LCK13_R[src]

Bit 13 - Port x lock bit y (y= 0..15)

pub fn lck12(&self) -> LCK12_R[src]

Bit 12 - Port x lock bit y (y= 0..15)

pub fn lck11(&self) -> LCK11_R[src]

Bit 11 - Port x lock bit y (y= 0..15)

pub fn lck10(&self) -> LCK10_R[src]

Bit 10 - Port x lock bit y (y= 0..15)

pub fn lck9(&self) -> LCK9_R[src]

Bit 9 - Port x lock bit y (y= 0..15)

pub fn lck8(&self) -> LCK8_R[src]

Bit 8 - Port x lock bit y (y= 0..15)

pub fn lck7(&self) -> LCK7_R[src]

Bit 7 - Port x lock bit y (y= 0..15)

pub fn lck6(&self) -> LCK6_R[src]

Bit 6 - Port x lock bit y (y= 0..15)

pub fn lck5(&self) -> LCK5_R[src]

Bit 5 - Port x lock bit y (y= 0..15)

pub fn lck4(&self) -> LCK4_R[src]

Bit 4 - Port x lock bit y (y= 0..15)

pub fn lck3(&self) -> LCK3_R[src]

Bit 3 - Port x lock bit y (y= 0..15)

pub fn lck2(&self) -> LCK2_R[src]

Bit 2 - Port x lock bit y (y= 0..15)

pub fn lck1(&self) -> LCK1_R[src]

Bit 1 - Port x lock bit y (y= 0..15)

pub fn lck0(&self) -> LCK0_R[src]

Bit 0 - Port x lock bit y (y= 0..15)

impl R<u32, Reg<u32, _AFRL>>[src]

pub fn afsel7(&self) -> AFSEL7_R[src]

Bits 28:31 - Alternate function selection for port x bit y (y = 0..7)

pub fn afsel6(&self) -> AFSEL6_R[src]

Bits 24:27 - Alternate function selection for port x bit y (y = 0..7)

pub fn afsel5(&self) -> AFSEL5_R[src]

Bits 20:23 - Alternate function selection for port x bit y (y = 0..7)

pub fn afsel4(&self) -> AFSEL4_R[src]

Bits 16:19 - Alternate function selection for port x bit y (y = 0..7)

pub fn afsel3(&self) -> AFSEL3_R[src]

Bits 12:15 - Alternate function selection for port x bit y (y = 0..7)

pub fn afsel2(&self) -> AFSEL2_R[src]

Bits 8:11 - Alternate function selection for port x bit y (y = 0..7)

pub fn afsel1(&self) -> AFSEL1_R[src]

Bits 4:7 - Alternate function selection for port x bit y (y = 0..7)

pub fn afsel0(&self) -> AFSEL0_R[src]

Bits 0:3 - Alternate function selection for port x bit y (y = 0..7)

impl R<u32, Reg<u32, _AFRH>>[src]

pub fn afsel15(&self) -> AFSEL15_R[src]

Bits 28:31 - Alternate function selection for port x bit y (y = 8..15)

pub fn afsel14(&self) -> AFSEL14_R[src]

Bits 24:27 - Alternate function selection for port x bit y (y = 8..15)

pub fn afsel13(&self) -> AFSEL13_R[src]

Bits 20:23 - Alternate function selection for port x bit y (y = 8..15)

pub fn afsel12(&self) -> AFSEL12_R[src]

Bits 16:19 - Alternate function selection for port x bit y (y = 8..15)

pub fn afsel11(&self) -> AFSEL11_R[src]

Bits 12:15 - Alternate function selection for port x bit y (y = 8..15)

pub fn afsel10(&self) -> AFSEL10_R[src]

Bits 8:11 - Alternate function selection for port x bit y (y = 8..15)

pub fn afsel9(&self) -> AFSEL9_R[src]

Bits 4:7 - Alternate function selection for port x bit y (y = 8..15)

pub fn afsel8(&self) -> AFSEL8_R[src]

Bits 0:3 - Alternate function selection for port x bit y (y = 8..15)

impl R<u32, Reg<u32, _MODER>>[src]

pub fn moder15(&self) -> MODER15_R[src]

Bits 30:31 - Port x configuration bits (y = 0..15)

pub fn moder14(&self) -> MODER14_R[src]

Bits 28:29 - Port x configuration bits (y = 0..15)

pub fn moder13(&self) -> MODER13_R[src]

Bits 26:27 - Port x configuration bits (y = 0..15)

pub fn moder12(&self) -> MODER12_R[src]

Bits 24:25 - Port x configuration bits (y = 0..15)

pub fn moder11(&self) -> MODER11_R[src]

Bits 22:23 - Port x configuration bits (y = 0..15)

pub fn moder10(&self) -> MODER10_R[src]

Bits 20:21 - Port x configuration bits (y = 0..15)

pub fn moder9(&self) -> MODER9_R[src]

Bits 18:19 - Port x configuration bits (y = 0..15)

pub fn moder8(&self) -> MODER8_R[src]

Bits 16:17 - Port x configuration bits (y = 0..15)

pub fn moder7(&self) -> MODER7_R[src]

Bits 14:15 - Port x configuration bits (y = 0..15)

pub fn moder6(&self) -> MODER6_R[src]

Bits 12:13 - Port x configuration bits (y = 0..15)

pub fn moder5(&self) -> MODER5_R[src]

Bits 10:11 - Port x configuration bits (y = 0..15)

pub fn moder4(&self) -> MODER4_R[src]

Bits 8:9 - Port x configuration bits (y = 0..15)

pub fn moder3(&self) -> MODER3_R[src]

Bits 6:7 - Port x configuration bits (y = 0..15)

pub fn moder2(&self) -> MODER2_R[src]

Bits 4:5 - Port x configuration bits (y = 0..15)

pub fn moder1(&self) -> MODER1_R[src]

Bits 2:3 - Port x configuration bits (y = 0..15)

pub fn moder0(&self) -> MODER0_R[src]

Bits 0:1 - Port x configuration bits (y = 0..15)

impl R<u32, Reg<u32, _OTYPER>>[src]

pub fn ot15(&self) -> OT15_R[src]

Bit 15 - Port x configuration bits (y = 0..15)

pub fn ot14(&self) -> OT14_R[src]

Bit 14 - Port x configuration bits (y = 0..15)

pub fn ot13(&self) -> OT13_R[src]

Bit 13 - Port x configuration bits (y = 0..15)

pub fn ot12(&self) -> OT12_R[src]

Bit 12 - Port x configuration bits (y = 0..15)

pub fn ot11(&self) -> OT11_R[src]

Bit 11 - Port x configuration bits (y = 0..15)

pub fn ot10(&self) -> OT10_R[src]

Bit 10 - Port x configuration bits (y = 0..15)

pub fn ot9(&self) -> OT9_R[src]

Bit 9 - Port x configuration bits (y = 0..15)

pub fn ot8(&self) -> OT8_R[src]

Bit 8 - Port x configuration bits (y = 0..15)

pub fn ot7(&self) -> OT7_R[src]

Bit 7 - Port x configuration bits (y = 0..15)

pub fn ot6(&self) -> OT6_R[src]

Bit 6 - Port x configuration bits (y = 0..15)

pub fn ot5(&self) -> OT5_R[src]

Bit 5 - Port x configuration bits (y = 0..15)

pub fn ot4(&self) -> OT4_R[src]

Bit 4 - Port x configuration bits (y = 0..15)

pub fn ot3(&self) -> OT3_R[src]

Bit 3 - Port x configuration bits (y = 0..15)

pub fn ot2(&self) -> OT2_R[src]

Bit 2 - Port x configuration bits (y = 0..15)

pub fn ot1(&self) -> OT1_R[src]

Bit 1 - Port x configuration bits (y = 0..15)

pub fn ot0(&self) -> OT0_R[src]

Bit 0 - Port x configuration bits (y = 0..15)

impl R<u32, Reg<u32, _OSPEEDR>>[src]

pub fn ospeedr15(&self) -> OSPEEDR15_R[src]

Bits 30:31 - Port x configuration bits (y = 0..15)

pub fn ospeedr14(&self) -> OSPEEDR14_R[src]

Bits 28:29 - Port x configuration bits (y = 0..15)

pub fn ospeedr13(&self) -> OSPEEDR13_R[src]

Bits 26:27 - Port x configuration bits (y = 0..15)

pub fn ospeedr12(&self) -> OSPEEDR12_R[src]

Bits 24:25 - Port x configuration bits (y = 0..15)

pub fn ospeedr11(&self) -> OSPEEDR11_R[src]

Bits 22:23 - Port x configuration bits (y = 0..15)

pub fn ospeedr10(&self) -> OSPEEDR10_R[src]

Bits 20:21 - Port x configuration bits (y = 0..15)

pub fn ospeedr9(&self) -> OSPEEDR9_R[src]

Bits 18:19 - Port x configuration bits (y = 0..15)

pub fn ospeedr8(&self) -> OSPEEDR8_R[src]

Bits 16:17 - Port x configuration bits (y = 0..15)

pub fn ospeedr7(&self) -> OSPEEDR7_R[src]

Bits 14:15 - Port x configuration bits (y = 0..15)

pub fn ospeedr6(&self) -> OSPEEDR6_R[src]

Bits 12:13 - Port x configuration bits (y = 0..15)

pub fn ospeedr5(&self) -> OSPEEDR5_R[src]

Bits 10:11 - Port x configuration bits (y = 0..15)

pub fn ospeedr4(&self) -> OSPEEDR4_R[src]

Bits 8:9 - Port x configuration bits (y = 0..15)

pub fn ospeedr3(&self) -> OSPEEDR3_R[src]

Bits 6:7 - Port x configuration bits (y = 0..15)

pub fn ospeedr2(&self) -> OSPEEDR2_R[src]

Bits 4:5 - Port x configuration bits (y = 0..15)

pub fn ospeedr1(&self) -> OSPEEDR1_R[src]

Bits 2:3 - Port x configuration bits (y = 0..15)

pub fn ospeedr0(&self) -> OSPEEDR0_R[src]

Bits 0:1 - Port x configuration bits (y = 0..15)

impl R<u32, Reg<u32, _PUPDR>>[src]

pub fn pupdr15(&self) -> PUPDR15_R[src]

Bits 30:31 - Port x configuration bits (y = 0..15)

pub fn pupdr14(&self) -> PUPDR14_R[src]

Bits 28:29 - Port x configuration bits (y = 0..15)

pub fn pupdr13(&self) -> PUPDR13_R[src]

Bits 26:27 - Port x configuration bits (y = 0..15)

pub fn pupdr12(&self) -> PUPDR12_R[src]

Bits 24:25 - Port x configuration bits (y = 0..15)

pub fn pupdr11(&self) -> PUPDR11_R[src]

Bits 22:23 - Port x configuration bits (y = 0..15)

pub fn pupdr10(&self) -> PUPDR10_R[src]

Bits 20:21 - Port x configuration bits (y = 0..15)

pub fn pupdr9(&self) -> PUPDR9_R[src]

Bits 18:19 - Port x configuration bits (y = 0..15)

pub fn pupdr8(&self) -> PUPDR8_R[src]

Bits 16:17 - Port x configuration bits (y = 0..15)

pub fn pupdr7(&self) -> PUPDR7_R[src]

Bits 14:15 - Port x configuration bits (y = 0..15)

pub fn pupdr6(&self) -> PUPDR6_R[src]

Bits 12:13 - Port x configuration bits (y = 0..15)

pub fn pupdr5(&self) -> PUPDR5_R[src]

Bits 10:11 - Port x configuration bits (y = 0..15)

pub fn pupdr4(&self) -> PUPDR4_R[src]

Bits 8:9 - Port x configuration bits (y = 0..15)

pub fn pupdr3(&self) -> PUPDR3_R[src]

Bits 6:7 - Port x configuration bits (y = 0..15)

pub fn pupdr2(&self) -> PUPDR2_R[src]

Bits 4:5 - Port x configuration bits (y = 0..15)

pub fn pupdr1(&self) -> PUPDR1_R[src]

Bits 2:3 - Port x configuration bits (y = 0..15)

pub fn pupdr0(&self) -> PUPDR0_R[src]

Bits 0:1 - Port x configuration bits (y = 0..15)

impl R<u32, Reg<u32, _IDR>>[src]

pub fn idr15(&self) -> IDR15_R[src]

Bit 15 - Port input data (y = 0..15)

pub fn idr14(&self) -> IDR14_R[src]

Bit 14 - Port input data (y = 0..15)

pub fn idr13(&self) -> IDR13_R[src]

Bit 13 - Port input data (y = 0..15)

pub fn idr12(&self) -> IDR12_R[src]

Bit 12 - Port input data (y = 0..15)

pub fn idr11(&self) -> IDR11_R[src]

Bit 11 - Port input data (y = 0..15)

pub fn idr10(&self) -> IDR10_R[src]

Bit 10 - Port input data (y = 0..15)

pub fn idr9(&self) -> IDR9_R[src]

Bit 9 - Port input data (y = 0..15)

pub fn idr8(&self) -> IDR8_R[src]

Bit 8 - Port input data (y = 0..15)

pub fn idr7(&self) -> IDR7_R[src]

Bit 7 - Port input data (y = 0..15)

pub fn idr6(&self) -> IDR6_R[src]

Bit 6 - Port input data (y = 0..15)

pub fn idr5(&self) -> IDR5_R[src]

Bit 5 - Port input data (y = 0..15)

pub fn idr4(&self) -> IDR4_R[src]

Bit 4 - Port input data (y = 0..15)

pub fn idr3(&self) -> IDR3_R[src]

Bit 3 - Port input data (y = 0..15)

pub fn idr2(&self) -> IDR2_R[src]

Bit 2 - Port input data (y = 0..15)

pub fn idr1(&self) -> IDR1_R[src]

Bit 1 - Port input data (y = 0..15)

pub fn idr0(&self) -> IDR0_R[src]

Bit 0 - Port input data (y = 0..15)

impl R<u32, Reg<u32, _ODR>>[src]

pub fn odr15(&self) -> ODR15_R[src]

Bit 15 - Port output data (y = 0..15)

pub fn odr14(&self) -> ODR14_R[src]

Bit 14 - Port output data (y = 0..15)

pub fn odr13(&self) -> ODR13_R[src]

Bit 13 - Port output data (y = 0..15)

pub fn odr12(&self) -> ODR12_R[src]

Bit 12 - Port output data (y = 0..15)

pub fn odr11(&self) -> ODR11_R[src]

Bit 11 - Port output data (y = 0..15)

pub fn odr10(&self) -> ODR10_R[src]

Bit 10 - Port output data (y = 0..15)

pub fn odr9(&self) -> ODR9_R[src]

Bit 9 - Port output data (y = 0..15)

pub fn odr8(&self) -> ODR8_R[src]

Bit 8 - Port output data (y = 0..15)

pub fn odr7(&self) -> ODR7_R[src]

Bit 7 - Port output data (y = 0..15)

pub fn odr6(&self) -> ODR6_R[src]

Bit 6 - Port output data (y = 0..15)

pub fn odr5(&self) -> ODR5_R[src]

Bit 5 - Port output data (y = 0..15)

pub fn odr4(&self) -> ODR4_R[src]

Bit 4 - Port output data (y = 0..15)

pub fn odr3(&self) -> ODR3_R[src]

Bit 3 - Port output data (y = 0..15)

pub fn odr2(&self) -> ODR2_R[src]

Bit 2 - Port output data (y = 0..15)

pub fn odr1(&self) -> ODR1_R[src]

Bit 1 - Port output data (y = 0..15)

pub fn odr0(&self) -> ODR0_R[src]

Bit 0 - Port output data (y = 0..15)

impl R<u32, Reg<u32, _LCKR>>[src]

pub fn lckk(&self) -> LCKK_R[src]

Bit 16 - Port x lock bit y (y= 0..15)

pub fn lck15(&self) -> LCK15_R[src]

Bit 15 - Port x lock bit y (y= 0..15)

pub fn lck14(&self) -> LCK14_R[src]

Bit 14 - Port x lock bit y (y= 0..15)

pub fn lck13(&self) -> LCK13_R[src]

Bit 13 - Port x lock bit y (y= 0..15)

pub fn lck12(&self) -> LCK12_R[src]

Bit 12 - Port x lock bit y (y= 0..15)

pub fn lck11(&self) -> LCK11_R[src]

Bit 11 - Port x lock bit y (y= 0..15)

pub fn lck10(&self) -> LCK10_R[src]

Bit 10 - Port x lock bit y (y= 0..15)

pub fn lck9(&self) -> LCK9_R[src]

Bit 9 - Port x lock bit y (y= 0..15)

pub fn lck8(&self) -> LCK8_R[src]

Bit 8 - Port x lock bit y (y= 0..15)

pub fn lck7(&self) -> LCK7_R[src]

Bit 7 - Port x lock bit y (y= 0..15)

pub fn lck6(&self) -> LCK6_R[src]

Bit 6 - Port x lock bit y (y= 0..15)

pub fn lck5(&self) -> LCK5_R[src]

Bit 5 - Port x lock bit y (y= 0..15)

pub fn lck4(&self) -> LCK4_R[src]

Bit 4 - Port x lock bit y (y= 0..15)

pub fn lck3(&self) -> LCK3_R[src]

Bit 3 - Port x lock bit y (y= 0..15)

pub fn lck2(&self) -> LCK2_R[src]

Bit 2 - Port x lock bit y (y= 0..15)

pub fn lck1(&self) -> LCK1_R[src]

Bit 1 - Port x lock bit y (y= 0..15)

pub fn lck0(&self) -> LCK0_R[src]

Bit 0 - Port x lock bit y (y= 0..15)

impl R<u32, Reg<u32, _AFRL>>[src]

pub fn afsel7(&self) -> AFSEL7_R[src]

Bits 28:31 - Alternate function selection for port x bit y (y = 0..7)

pub fn afsel6(&self) -> AFSEL6_R[src]

Bits 24:27 - Alternate function selection for port x bit y (y = 0..7)

pub fn afsel5(&self) -> AFSEL5_R[src]

Bits 20:23 - Alternate function selection for port x bit y (y = 0..7)

pub fn afsel4(&self) -> AFSEL4_R[src]

Bits 16:19 - Alternate function selection for port x bit y (y = 0..7)

pub fn afsel3(&self) -> AFSEL3_R[src]

Bits 12:15 - Alternate function selection for port x bit y (y = 0..7)

pub fn afsel2(&self) -> AFSEL2_R[src]

Bits 8:11 - Alternate function selection for port x bit y (y = 0..7)

pub fn afsel1(&self) -> AFSEL1_R[src]

Bits 4:7 - Alternate function selection for port x bit y (y = 0..7)

pub fn afsel0(&self) -> AFSEL0_R[src]

Bits 0:3 - Alternate function selection for port x bit y (y = 0..7)

impl R<u32, Reg<u32, _AFRH>>[src]

pub fn afsel15(&self) -> AFSEL15_R[src]

Bits 28:31 - Alternate function selection for port x bit y (y = 8..15)

pub fn afsel14(&self) -> AFSEL14_R[src]

Bits 24:27 - Alternate function selection for port x bit y (y = 8..15)

pub fn afsel13(&self) -> AFSEL13_R[src]

Bits 20:23 - Alternate function selection for port x bit y (y = 8..15)

pub fn afsel12(&self) -> AFSEL12_R[src]

Bits 16:19 - Alternate function selection for port x bit y (y = 8..15)

pub fn afsel11(&self) -> AFSEL11_R[src]

Bits 12:15 - Alternate function selection for port x bit y (y = 8..15)

pub fn afsel10(&self) -> AFSEL10_R[src]

Bits 8:11 - Alternate function selection for port x bit y (y = 8..15)

pub fn afsel9(&self) -> AFSEL9_R[src]

Bits 4:7 - Alternate function selection for port x bit y (y = 8..15)

pub fn afsel8(&self) -> AFSEL8_R[src]

Bits 0:3 - Alternate function selection for port x bit y (y = 8..15)

impl R<u32, Reg<u32, _MODER>>[src]

pub fn moder15(&self) -> MODER15_R[src]

Bits 30:31 - Port x configuration bits (y = 0..15)

pub fn moder14(&self) -> MODER14_R[src]

Bits 28:29 - Port x configuration bits (y = 0..15)

pub fn moder13(&self) -> MODER13_R[src]

Bits 26:27 - Port x configuration bits (y = 0..15)

pub fn moder12(&self) -> MODER12_R[src]

Bits 24:25 - Port x configuration bits (y = 0..15)

pub fn moder11(&self) -> MODER11_R[src]

Bits 22:23 - Port x configuration bits (y = 0..15)

pub fn moder10(&self) -> MODER10_R[src]

Bits 20:21 - Port x configuration bits (y = 0..15)

pub fn moder9(&self) -> MODER9_R[src]

Bits 18:19 - Port x configuration bits (y = 0..15)

pub fn moder8(&self) -> MODER8_R[src]

Bits 16:17 - Port x configuration bits (y = 0..15)

pub fn moder7(&self) -> MODER7_R[src]

Bits 14:15 - Port x configuration bits (y = 0..15)

pub fn moder6(&self) -> MODER6_R[src]

Bits 12:13 - Port x configuration bits (y = 0..15)

pub fn moder5(&self) -> MODER5_R[src]

Bits 10:11 - Port x configuration bits (y = 0..15)

pub fn moder4(&self) -> MODER4_R[src]

Bits 8:9 - Port x configuration bits (y = 0..15)

pub fn moder3(&self) -> MODER3_R[src]

Bits 6:7 - Port x configuration bits (y = 0..15)

pub fn moder2(&self) -> MODER2_R[src]

Bits 4:5 - Port x configuration bits (y = 0..15)

pub fn moder1(&self) -> MODER1_R[src]

Bits 2:3 - Port x configuration bits (y = 0..15)

pub fn moder0(&self) -> MODER0_R[src]

Bits 0:1 - Port x configuration bits (y = 0..15)

impl R<u32, Reg<u32, _OTYPER>>[src]

pub fn ot15(&self) -> OT15_R[src]

Bit 15 - Port x configuration bits (y = 0..15)

pub fn ot14(&self) -> OT14_R[src]

Bit 14 - Port x configuration bits (y = 0..15)

pub fn ot13(&self) -> OT13_R[src]

Bit 13 - Port x configuration bits (y = 0..15)

pub fn ot12(&self) -> OT12_R[src]

Bit 12 - Port x configuration bits (y = 0..15)

pub fn ot11(&self) -> OT11_R[src]

Bit 11 - Port x configuration bits (y = 0..15)

pub fn ot10(&self) -> OT10_R[src]

Bit 10 - Port x configuration bits (y = 0..15)

pub fn ot9(&self) -> OT9_R[src]

Bit 9 - Port x configuration bits (y = 0..15)

pub fn ot8(&self) -> OT8_R[src]

Bit 8 - Port x configuration bits (y = 0..15)

pub fn ot7(&self) -> OT7_R[src]

Bit 7 - Port x configuration bits (y = 0..15)

pub fn ot6(&self) -> OT6_R[src]

Bit 6 - Port x configuration bits (y = 0..15)

pub fn ot5(&self) -> OT5_R[src]

Bit 5 - Port x configuration bits (y = 0..15)

pub fn ot4(&self) -> OT4_R[src]

Bit 4 - Port x configuration bits (y = 0..15)

pub fn ot3(&self) -> OT3_R[src]

Bit 3 - Port x configuration bits (y = 0..15)

pub fn ot2(&self) -> OT2_R[src]

Bit 2 - Port x configuration bits (y = 0..15)

pub fn ot1(&self) -> OT1_R[src]

Bit 1 - Port x configuration bits (y = 0..15)

pub fn ot0(&self) -> OT0_R[src]

Bit 0 - Port x configuration bits (y = 0..15)

impl R<u32, Reg<u32, _OSPEEDR>>[src]

pub fn ospeedr15(&self) -> OSPEEDR15_R[src]

Bits 30:31 - Port x configuration bits (y = 0..15)

pub fn ospeedr14(&self) -> OSPEEDR14_R[src]

Bits 28:29 - Port x configuration bits (y = 0..15)

pub fn ospeedr13(&self) -> OSPEEDR13_R[src]

Bits 26:27 - Port x configuration bits (y = 0..15)

pub fn ospeedr12(&self) -> OSPEEDR12_R[src]

Bits 24:25 - Port x configuration bits (y = 0..15)

pub fn ospeedr11(&self) -> OSPEEDR11_R[src]

Bits 22:23 - Port x configuration bits (y = 0..15)

pub fn ospeedr10(&self) -> OSPEEDR10_R[src]

Bits 20:21 - Port x configuration bits (y = 0..15)

pub fn ospeedr9(&self) -> OSPEEDR9_R[src]

Bits 18:19 - Port x configuration bits (y = 0..15)

pub fn ospeedr8(&self) -> OSPEEDR8_R[src]

Bits 16:17 - Port x configuration bits (y = 0..15)

pub fn ospeedr7(&self) -> OSPEEDR7_R[src]

Bits 14:15 - Port x configuration bits (y = 0..15)

pub fn ospeedr6(&self) -> OSPEEDR6_R[src]

Bits 12:13 - Port x configuration bits (y = 0..15)

pub fn ospeedr5(&self) -> OSPEEDR5_R[src]

Bits 10:11 - Port x configuration bits (y = 0..15)

pub fn ospeedr4(&self) -> OSPEEDR4_R[src]

Bits 8:9 - Port x configuration bits (y = 0..15)

pub fn ospeedr3(&self) -> OSPEEDR3_R[src]

Bits 6:7 - Port x configuration bits (y = 0..15)

pub fn ospeedr2(&self) -> OSPEEDR2_R[src]

Bits 4:5 - Port x configuration bits (y = 0..15)

pub fn ospeedr1(&self) -> OSPEEDR1_R[src]

Bits 2:3 - Port x configuration bits (y = 0..15)

pub fn ospeedr0(&self) -> OSPEEDR0_R[src]

Bits 0:1 - Port x configuration bits (y = 0..15)

impl R<u32, Reg<u32, _PUPDR>>[src]

pub fn pupdr15(&self) -> PUPDR15_R[src]

Bits 30:31 - Port x configuration bits (y = 0..15)

pub fn pupdr14(&self) -> PUPDR14_R[src]

Bits 28:29 - Port x configuration bits (y = 0..15)

pub fn pupdr13(&self) -> PUPDR13_R[src]

Bits 26:27 - Port x configuration bits (y = 0..15)

pub fn pupdr12(&self) -> PUPDR12_R[src]

Bits 24:25 - Port x configuration bits (y = 0..15)

pub fn pupdr11(&self) -> PUPDR11_R[src]

Bits 22:23 - Port x configuration bits (y = 0..15)

pub fn pupdr10(&self) -> PUPDR10_R[src]

Bits 20:21 - Port x configuration bits (y = 0..15)

pub fn pupdr9(&self) -> PUPDR9_R[src]

Bits 18:19 - Port x configuration bits (y = 0..15)

pub fn pupdr8(&self) -> PUPDR8_R[src]

Bits 16:17 - Port x configuration bits (y = 0..15)

pub fn pupdr7(&self) -> PUPDR7_R[src]

Bits 14:15 - Port x configuration bits (y = 0..15)

pub fn pupdr6(&self) -> PUPDR6_R[src]

Bits 12:13 - Port x configuration bits (y = 0..15)

pub fn pupdr5(&self) -> PUPDR5_R[src]

Bits 10:11 - Port x configuration bits (y = 0..15)

pub fn pupdr4(&self) -> PUPDR4_R[src]

Bits 8:9 - Port x configuration bits (y = 0..15)

pub fn pupdr3(&self) -> PUPDR3_R[src]

Bits 6:7 - Port x configuration bits (y = 0..15)

pub fn pupdr2(&self) -> PUPDR2_R[src]

Bits 4:5 - Port x configuration bits (y = 0..15)

pub fn pupdr1(&self) -> PUPDR1_R[src]

Bits 2:3 - Port x configuration bits (y = 0..15)

pub fn pupdr0(&self) -> PUPDR0_R[src]

Bits 0:1 - Port x configuration bits (y = 0..15)

impl R<u32, Reg<u32, _IDR>>[src]

pub fn idr15(&self) -> IDR15_R[src]

Bit 15 - Port input data (y = 0..15)

pub fn idr14(&self) -> IDR14_R[src]

Bit 14 - Port input data (y = 0..15)

pub fn idr13(&self) -> IDR13_R[src]

Bit 13 - Port input data (y = 0..15)

pub fn idr12(&self) -> IDR12_R[src]

Bit 12 - Port input data (y = 0..15)

pub fn idr11(&self) -> IDR11_R[src]

Bit 11 - Port input data (y = 0..15)

pub fn idr10(&self) -> IDR10_R[src]

Bit 10 - Port input data (y = 0..15)

pub fn idr9(&self) -> IDR9_R[src]

Bit 9 - Port input data (y = 0..15)

pub fn idr8(&self) -> IDR8_R[src]

Bit 8 - Port input data (y = 0..15)

pub fn idr7(&self) -> IDR7_R[src]

Bit 7 - Port input data (y = 0..15)

pub fn idr6(&self) -> IDR6_R[src]

Bit 6 - Port input data (y = 0..15)

pub fn idr5(&self) -> IDR5_R[src]

Bit 5 - Port input data (y = 0..15)

pub fn idr4(&self) -> IDR4_R[src]

Bit 4 - Port input data (y = 0..15)

pub fn idr3(&self) -> IDR3_R[src]

Bit 3 - Port input data (y = 0..15)

pub fn idr2(&self) -> IDR2_R[src]

Bit 2 - Port input data (y = 0..15)

pub fn idr1(&self) -> IDR1_R[src]

Bit 1 - Port input data (y = 0..15)

pub fn idr0(&self) -> IDR0_R[src]

Bit 0 - Port input data (y = 0..15)

impl R<u32, Reg<u32, _ODR>>[src]

pub fn odr15(&self) -> ODR15_R[src]

Bit 15 - Port output data (y = 0..15)

pub fn odr14(&self) -> ODR14_R[src]

Bit 14 - Port output data (y = 0..15)

pub fn odr13(&self) -> ODR13_R[src]

Bit 13 - Port output data (y = 0..15)

pub fn odr12(&self) -> ODR12_R[src]

Bit 12 - Port output data (y = 0..15)

pub fn odr11(&self) -> ODR11_R[src]

Bit 11 - Port output data (y = 0..15)

pub fn odr10(&self) -> ODR10_R[src]

Bit 10 - Port output data (y = 0..15)

pub fn odr9(&self) -> ODR9_R[src]

Bit 9 - Port output data (y = 0..15)

pub fn odr8(&self) -> ODR8_R[src]

Bit 8 - Port output data (y = 0..15)

pub fn odr7(&self) -> ODR7_R[src]

Bit 7 - Port output data (y = 0..15)

pub fn odr6(&self) -> ODR6_R[src]

Bit 6 - Port output data (y = 0..15)

pub fn odr5(&self) -> ODR5_R[src]

Bit 5 - Port output data (y = 0..15)

pub fn odr4(&self) -> ODR4_R[src]

Bit 4 - Port output data (y = 0..15)

pub fn odr3(&self) -> ODR3_R[src]

Bit 3 - Port output data (y = 0..15)

pub fn odr2(&self) -> ODR2_R[src]

Bit 2 - Port output data (y = 0..15)

pub fn odr1(&self) -> ODR1_R[src]

Bit 1 - Port output data (y = 0..15)

pub fn odr0(&self) -> ODR0_R[src]

Bit 0 - Port output data (y = 0..15)

impl R<u32, Reg<u32, _LCKR>>[src]

pub fn lckk(&self) -> LCKK_R[src]

Bit 16 - Port x lock bit y (y= 0..15)

pub fn lck15(&self) -> LCK15_R[src]

Bit 15 - Port x lock bit y (y= 0..15)

pub fn lck14(&self) -> LCK14_R[src]

Bit 14 - Port x lock bit y (y= 0..15)

pub fn lck13(&self) -> LCK13_R[src]

Bit 13 - Port x lock bit y (y= 0..15)

pub fn lck12(&self) -> LCK12_R[src]

Bit 12 - Port x lock bit y (y= 0..15)

pub fn lck11(&self) -> LCK11_R[src]

Bit 11 - Port x lock bit y (y= 0..15)

pub fn lck10(&self) -> LCK10_R[src]

Bit 10 - Port x lock bit y (y= 0..15)

pub fn lck9(&self) -> LCK9_R[src]

Bit 9 - Port x lock bit y (y= 0..15)

pub fn lck8(&self) -> LCK8_R[src]

Bit 8 - Port x lock bit y (y= 0..15)

pub fn lck7(&self) -> LCK7_R[src]

Bit 7 - Port x lock bit y (y= 0..15)

pub fn lck6(&self) -> LCK6_R[src]

Bit 6 - Port x lock bit y (y= 0..15)

pub fn lck5(&self) -> LCK5_R[src]

Bit 5 - Port x lock bit y (y= 0..15)

pub fn lck4(&self) -> LCK4_R[src]

Bit 4 - Port x lock bit y (y= 0..15)

pub fn lck3(&self) -> LCK3_R[src]

Bit 3 - Port x lock bit y (y= 0..15)

pub fn lck2(&self) -> LCK2_R[src]

Bit 2 - Port x lock bit y (y= 0..15)

pub fn lck1(&self) -> LCK1_R[src]

Bit 1 - Port x lock bit y (y= 0..15)

pub fn lck0(&self) -> LCK0_R[src]

Bit 0 - Port x lock bit y (y= 0..15)

impl R<u32, Reg<u32, _AFRL>>[src]

pub fn afsel7(&self) -> AFSEL7_R[src]

Bits 28:31 - Alternate function selection for port x bit y (y = 0..7)

pub fn afsel6(&self) -> AFSEL6_R[src]

Bits 24:27 - Alternate function selection for port x bit y (y = 0..7)

pub fn afsel5(&self) -> AFSEL5_R[src]

Bits 20:23 - Alternate function selection for port x bit y (y = 0..7)

pub fn afsel4(&self) -> AFSEL4_R[src]

Bits 16:19 - Alternate function selection for port x bit y (y = 0..7)

pub fn afsel3(&self) -> AFSEL3_R[src]

Bits 12:15 - Alternate function selection for port x bit y (y = 0..7)

pub fn afsel2(&self) -> AFSEL2_R[src]

Bits 8:11 - Alternate function selection for port x bit y (y = 0..7)

pub fn afsel1(&self) -> AFSEL1_R[src]

Bits 4:7 - Alternate function selection for port x bit y (y = 0..7)

pub fn afsel0(&self) -> AFSEL0_R[src]

Bits 0:3 - Alternate function selection for port x bit y (y = 0..7)

impl R<u32, Reg<u32, _AFRH>>[src]

pub fn afsel15(&self) -> AFSEL15_R[src]

Bits 28:31 - Alternate function selection for port x bit y (y = 8..15)

pub fn afsel14(&self) -> AFSEL14_R[src]

Bits 24:27 - Alternate function selection for port x bit y (y = 8..15)

pub fn afsel13(&self) -> AFSEL13_R[src]

Bits 20:23 - Alternate function selection for port x bit y (y = 8..15)

pub fn afsel12(&self) -> AFSEL12_R[src]

Bits 16:19 - Alternate function selection for port x bit y (y = 8..15)

pub fn afsel11(&self) -> AFSEL11_R[src]

Bits 12:15 - Alternate function selection for port x bit y (y = 8..15)

pub fn afsel10(&self) -> AFSEL10_R[src]

Bits 8:11 - Alternate function selection for port x bit y (y = 8..15)

pub fn afsel9(&self) -> AFSEL9_R[src]

Bits 4:7 - Alternate function selection for port x bit y (y = 8..15)

pub fn afsel8(&self) -> AFSEL8_R[src]

Bits 0:3 - Alternate function selection for port x bit y (y = 8..15)

impl R<u32, Reg<u32, _MODER>>[src]

pub fn moder15(&self) -> MODER15_R[src]

Bits 30:31 - Port x configuration bits (y = 0..15)

pub fn moder14(&self) -> MODER14_R[src]

Bits 28:29 - Port x configuration bits (y = 0..15)

pub fn moder13(&self) -> MODER13_R[src]

Bits 26:27 - Port x configuration bits (y = 0..15)

pub fn moder12(&self) -> MODER12_R[src]

Bits 24:25 - Port x configuration bits (y = 0..15)

pub fn moder11(&self) -> MODER11_R[src]

Bits 22:23 - Port x configuration bits (y = 0..15)

pub fn moder10(&self) -> MODER10_R[src]

Bits 20:21 - Port x configuration bits (y = 0..15)

pub fn moder9(&self) -> MODER9_R[src]

Bits 18:19 - Port x configuration bits (y = 0..15)

pub fn moder8(&self) -> MODER8_R[src]

Bits 16:17 - Port x configuration bits (y = 0..15)

pub fn moder7(&self) -> MODER7_R[src]

Bits 14:15 - Port x configuration bits (y = 0..15)

pub fn moder6(&self) -> MODER6_R[src]

Bits 12:13 - Port x configuration bits (y = 0..15)

pub fn moder5(&self) -> MODER5_R[src]

Bits 10:11 - Port x configuration bits (y = 0..15)

pub fn moder4(&self) -> MODER4_R[src]

Bits 8:9 - Port x configuration bits (y = 0..15)

pub fn moder3(&self) -> MODER3_R[src]

Bits 6:7 - Port x configuration bits (y = 0..15)

pub fn moder2(&self) -> MODER2_R[src]

Bits 4:5 - Port x configuration bits (y = 0..15)

pub fn moder1(&self) -> MODER1_R[src]

Bits 2:3 - Port x configuration bits (y = 0..15)

pub fn moder0(&self) -> MODER0_R[src]

Bits 0:1 - Port x configuration bits (y = 0..15)

impl R<u32, Reg<u32, _OTYPER>>[src]

pub fn ot15(&self) -> OT15_R[src]

Bit 15 - Port x configuration bits (y = 0..15)

pub fn ot14(&self) -> OT14_R[src]

Bit 14 - Port x configuration bits (y = 0..15)

pub fn ot13(&self) -> OT13_R[src]

Bit 13 - Port x configuration bits (y = 0..15)

pub fn ot12(&self) -> OT12_R[src]

Bit 12 - Port x configuration bits (y = 0..15)

pub fn ot11(&self) -> OT11_R[src]

Bit 11 - Port x configuration bits (y = 0..15)

pub fn ot10(&self) -> OT10_R[src]

Bit 10 - Port x configuration bits (y = 0..15)

pub fn ot9(&self) -> OT9_R[src]

Bit 9 - Port x configuration bits (y = 0..15)

pub fn ot8(&self) -> OT8_R[src]

Bit 8 - Port x configuration bits (y = 0..15)

pub fn ot7(&self) -> OT7_R[src]

Bit 7 - Port x configuration bits (y = 0..15)

pub fn ot6(&self) -> OT6_R[src]

Bit 6 - Port x configuration bits (y = 0..15)

pub fn ot5(&self) -> OT5_R[src]

Bit 5 - Port x configuration bits (y = 0..15)

pub fn ot4(&self) -> OT4_R[src]

Bit 4 - Port x configuration bits (y = 0..15)

pub fn ot3(&self) -> OT3_R[src]

Bit 3 - Port x configuration bits (y = 0..15)

pub fn ot2(&self) -> OT2_R[src]

Bit 2 - Port x configuration bits (y = 0..15)

pub fn ot1(&self) -> OT1_R[src]

Bit 1 - Port x configuration bits (y = 0..15)

pub fn ot0(&self) -> OT0_R[src]

Bit 0 - Port x configuration bits (y = 0..15)

impl R<u32, Reg<u32, _OSPEEDR>>[src]

pub fn ospeedr15(&self) -> OSPEEDR15_R[src]

Bits 30:31 - Port x configuration bits (y = 0..15)

pub fn ospeedr14(&self) -> OSPEEDR14_R[src]

Bits 28:29 - Port x configuration bits (y = 0..15)

pub fn ospeedr13(&self) -> OSPEEDR13_R[src]

Bits 26:27 - Port x configuration bits (y = 0..15)

pub fn ospeedr12(&self) -> OSPEEDR12_R[src]

Bits 24:25 - Port x configuration bits (y = 0..15)

pub fn ospeedr11(&self) -> OSPEEDR11_R[src]

Bits 22:23 - Port x configuration bits (y = 0..15)

pub fn ospeedr10(&self) -> OSPEEDR10_R[src]

Bits 20:21 - Port x configuration bits (y = 0..15)

pub fn ospeedr9(&self) -> OSPEEDR9_R[src]

Bits 18:19 - Port x configuration bits (y = 0..15)

pub fn ospeedr8(&self) -> OSPEEDR8_R[src]

Bits 16:17 - Port x configuration bits (y = 0..15)

pub fn ospeedr7(&self) -> OSPEEDR7_R[src]

Bits 14:15 - Port x configuration bits (y = 0..15)

pub fn ospeedr6(&self) -> OSPEEDR6_R[src]

Bits 12:13 - Port x configuration bits (y = 0..15)

pub fn ospeedr5(&self) -> OSPEEDR5_R[src]

Bits 10:11 - Port x configuration bits (y = 0..15)

pub fn ospeedr4(&self) -> OSPEEDR4_R[src]

Bits 8:9 - Port x configuration bits (y = 0..15)

pub fn ospeedr3(&self) -> OSPEEDR3_R[src]

Bits 6:7 - Port x configuration bits (y = 0..15)

pub fn ospeedr2(&self) -> OSPEEDR2_R[src]

Bits 4:5 - Port x configuration bits (y = 0..15)

pub fn ospeedr1(&self) -> OSPEEDR1_R[src]

Bits 2:3 - Port x configuration bits (y = 0..15)

pub fn ospeedr0(&self) -> OSPEEDR0_R[src]

Bits 0:1 - Port x configuration bits (y = 0..15)

impl R<u32, Reg<u32, _PUPDR>>[src]

pub fn pupdr15(&self) -> PUPDR15_R[src]

Bits 30:31 - Port x configuration bits (y = 0..15)

pub fn pupdr14(&self) -> PUPDR14_R[src]

Bits 28:29 - Port x configuration bits (y = 0..15)

pub fn pupdr13(&self) -> PUPDR13_R[src]

Bits 26:27 - Port x configuration bits (y = 0..15)

pub fn pupdr12(&self) -> PUPDR12_R[src]

Bits 24:25 - Port x configuration bits (y = 0..15)

pub fn pupdr11(&self) -> PUPDR11_R[src]

Bits 22:23 - Port x configuration bits (y = 0..15)

pub fn pupdr10(&self) -> PUPDR10_R[src]

Bits 20:21 - Port x configuration bits (y = 0..15)

pub fn pupdr9(&self) -> PUPDR9_R[src]

Bits 18:19 - Port x configuration bits (y = 0..15)

pub fn pupdr8(&self) -> PUPDR8_R[src]

Bits 16:17 - Port x configuration bits (y = 0..15)

pub fn pupdr7(&self) -> PUPDR7_R[src]

Bits 14:15 - Port x configuration bits (y = 0..15)

pub fn pupdr6(&self) -> PUPDR6_R[src]

Bits 12:13 - Port x configuration bits (y = 0..15)

pub fn pupdr5(&self) -> PUPDR5_R[src]

Bits 10:11 - Port x configuration bits (y = 0..15)

pub fn pupdr4(&self) -> PUPDR4_R[src]

Bits 8:9 - Port x configuration bits (y = 0..15)

pub fn pupdr3(&self) -> PUPDR3_R[src]

Bits 6:7 - Port x configuration bits (y = 0..15)

pub fn pupdr2(&self) -> PUPDR2_R[src]

Bits 4:5 - Port x configuration bits (y = 0..15)

pub fn pupdr1(&self) -> PUPDR1_R[src]

Bits 2:3 - Port x configuration bits (y = 0..15)

pub fn pupdr0(&self) -> PUPDR0_R[src]

Bits 0:1 - Port x configuration bits (y = 0..15)

impl R<u32, Reg<u32, _IDR>>[src]

pub fn idr15(&self) -> IDR15_R[src]

Bit 15 - Port input data (y = 0..15)

pub fn idr14(&self) -> IDR14_R[src]

Bit 14 - Port input data (y = 0..15)

pub fn idr13(&self) -> IDR13_R[src]

Bit 13 - Port input data (y = 0..15)

pub fn idr12(&self) -> IDR12_R[src]

Bit 12 - Port input data (y = 0..15)

pub fn idr11(&self) -> IDR11_R[src]

Bit 11 - Port input data (y = 0..15)

pub fn idr10(&self) -> IDR10_R[src]

Bit 10 - Port input data (y = 0..15)

pub fn idr9(&self) -> IDR9_R[src]

Bit 9 - Port input data (y = 0..15)

pub fn idr8(&self) -> IDR8_R[src]

Bit 8 - Port input data (y = 0..15)

pub fn idr7(&self) -> IDR7_R[src]

Bit 7 - Port input data (y = 0..15)

pub fn idr6(&self) -> IDR6_R[src]

Bit 6 - Port input data (y = 0..15)

pub fn idr5(&self) -> IDR5_R[src]

Bit 5 - Port input data (y = 0..15)

pub fn idr4(&self) -> IDR4_R[src]

Bit 4 - Port input data (y = 0..15)

pub fn idr3(&self) -> IDR3_R[src]

Bit 3 - Port input data (y = 0..15)

pub fn idr2(&self) -> IDR2_R[src]

Bit 2 - Port input data (y = 0..15)

pub fn idr1(&self) -> IDR1_R[src]

Bit 1 - Port input data (y = 0..15)

pub fn idr0(&self) -> IDR0_R[src]

Bit 0 - Port input data (y = 0..15)

impl R<u32, Reg<u32, _ODR>>[src]

pub fn odr15(&self) -> ODR15_R[src]

Bit 15 - Port output data (y = 0..15)

pub fn odr14(&self) -> ODR14_R[src]

Bit 14 - Port output data (y = 0..15)

pub fn odr13(&self) -> ODR13_R[src]

Bit 13 - Port output data (y = 0..15)

pub fn odr12(&self) -> ODR12_R[src]

Bit 12 - Port output data (y = 0..15)

pub fn odr11(&self) -> ODR11_R[src]

Bit 11 - Port output data (y = 0..15)

pub fn odr10(&self) -> ODR10_R[src]

Bit 10 - Port output data (y = 0..15)

pub fn odr9(&self) -> ODR9_R[src]

Bit 9 - Port output data (y = 0..15)

pub fn odr8(&self) -> ODR8_R[src]

Bit 8 - Port output data (y = 0..15)

pub fn odr7(&self) -> ODR7_R[src]

Bit 7 - Port output data (y = 0..15)

pub fn odr6(&self) -> ODR6_R[src]

Bit 6 - Port output data (y = 0..15)

pub fn odr5(&self) -> ODR5_R[src]

Bit 5 - Port output data (y = 0..15)

pub fn odr4(&self) -> ODR4_R[src]

Bit 4 - Port output data (y = 0..15)

pub fn odr3(&self) -> ODR3_R[src]

Bit 3 - Port output data (y = 0..15)

pub fn odr2(&self) -> ODR2_R[src]

Bit 2 - Port output data (y = 0..15)

pub fn odr1(&self) -> ODR1_R[src]

Bit 1 - Port output data (y = 0..15)

pub fn odr0(&self) -> ODR0_R[src]

Bit 0 - Port output data (y = 0..15)

impl R<u32, Reg<u32, _LCKR>>[src]

pub fn lckk(&self) -> LCKK_R[src]

Bit 16 - Port x lock bit y (y= 0..15)

pub fn lck15(&self) -> LCK15_R[src]

Bit 15 - Port x lock bit y (y= 0..15)

pub fn lck14(&self) -> LCK14_R[src]

Bit 14 - Port x lock bit y (y= 0..15)

pub fn lck13(&self) -> LCK13_R[src]

Bit 13 - Port x lock bit y (y= 0..15)

pub fn lck12(&self) -> LCK12_R[src]

Bit 12 - Port x lock bit y (y= 0..15)

pub fn lck11(&self) -> LCK11_R[src]

Bit 11 - Port x lock bit y (y= 0..15)

pub fn lck10(&self) -> LCK10_R[src]

Bit 10 - Port x lock bit y (y= 0..15)

pub fn lck9(&self) -> LCK9_R[src]

Bit 9 - Port x lock bit y (y= 0..15)

pub fn lck8(&self) -> LCK8_R[src]

Bit 8 - Port x lock bit y (y= 0..15)

pub fn lck7(&self) -> LCK7_R[src]

Bit 7 - Port x lock bit y (y= 0..15)

pub fn lck6(&self) -> LCK6_R[src]

Bit 6 - Port x lock bit y (y= 0..15)

pub fn lck5(&self) -> LCK5_R[src]

Bit 5 - Port x lock bit y (y= 0..15)

pub fn lck4(&self) -> LCK4_R[src]

Bit 4 - Port x lock bit y (y= 0..15)

pub fn lck3(&self) -> LCK3_R[src]

Bit 3 - Port x lock bit y (y= 0..15)

pub fn lck2(&self) -> LCK2_R[src]

Bit 2 - Port x lock bit y (y= 0..15)

pub fn lck1(&self) -> LCK1_R[src]

Bit 1 - Port x lock bit y (y= 0..15)

pub fn lck0(&self) -> LCK0_R[src]

Bit 0 - Port x lock bit y (y= 0..15)

impl R<u32, Reg<u32, _AFRL>>[src]

pub fn afsel7(&self) -> AFSEL7_R[src]

Bits 28:31 - Alternate function selection for port x bit y (y = 0..7)

pub fn afsel6(&self) -> AFSEL6_R[src]

Bits 24:27 - Alternate function selection for port x bit y (y = 0..7)

pub fn afsel5(&self) -> AFSEL5_R[src]

Bits 20:23 - Alternate function selection for port x bit y (y = 0..7)

pub fn afsel4(&self) -> AFSEL4_R[src]

Bits 16:19 - Alternate function selection for port x bit y (y = 0..7)

pub fn afsel3(&self) -> AFSEL3_R[src]

Bits 12:15 - Alternate function selection for port x bit y (y = 0..7)

pub fn afsel2(&self) -> AFSEL2_R[src]

Bits 8:11 - Alternate function selection for port x bit y (y = 0..7)

pub fn afsel1(&self) -> AFSEL1_R[src]

Bits 4:7 - Alternate function selection for port x bit y (y = 0..7)

pub fn afsel0(&self) -> AFSEL0_R[src]

Bits 0:3 - Alternate function selection for port x bit y (y = 0..7)

impl R<u32, Reg<u32, _AFRH>>[src]

pub fn afsel15(&self) -> AFSEL15_R[src]

Bits 28:31 - Alternate function selection for port x bit y (y = 8..15)

pub fn afsel14(&self) -> AFSEL14_R[src]

Bits 24:27 - Alternate function selection for port x bit y (y = 8..15)

pub fn afsel13(&self) -> AFSEL13_R[src]

Bits 20:23 - Alternate function selection for port x bit y (y = 8..15)

pub fn afsel12(&self) -> AFSEL12_R[src]

Bits 16:19 - Alternate function selection for port x bit y (y = 8..15)

pub fn afsel11(&self) -> AFSEL11_R[src]

Bits 12:15 - Alternate function selection for port x bit y (y = 8..15)

pub fn afsel10(&self) -> AFSEL10_R[src]

Bits 8:11 - Alternate function selection for port x bit y (y = 8..15)

pub fn afsel9(&self) -> AFSEL9_R[src]

Bits 4:7 - Alternate function selection for port x bit y (y = 8..15)

pub fn afsel8(&self) -> AFSEL8_R[src]

Bits 0:3 - Alternate function selection for port x bit y (y = 8..15)

impl R<u32, Reg<u32, _CR1>>[src]

pub fn tamp1e(&self) -> TAMP1E_R[src]

Bit 0 - TAMP1E

pub fn tamp2e(&self) -> TAMP2E_R[src]

Bit 1 - TAMP2E

pub fn tamp3e(&self) -> TAMP3E_R[src]

Bit 2 - TAMP3E

pub fn tamp4e(&self) -> TAMP4E_R[src]

Bit 3 - TAMP4E

pub fn tamp5e(&self) -> TAMP5E_R[src]

Bit 4 - TAMP5E

pub fn tamp6e(&self) -> TAMP6E_R[src]

Bit 5 - TAMP6E

pub fn tamp7e(&self) -> TAMP7E_R[src]

Bit 6 - TAMP7E

pub fn tamp8e(&self) -> TAMP8E_R[src]

Bit 7 - TAMP8E

pub fn itamp1e(&self) -> ITAMP1E_R[src]

Bit 16 - ITAMP1E

pub fn itamp2e(&self) -> ITAMP2E_R[src]

Bit 17 - ITAMP2E

pub fn itamp3e(&self) -> ITAMP3E_R[src]

Bit 18 - ITAMP3E

pub fn itamp5e(&self) -> ITAMP5E_R[src]

Bit 20 - ITAMP5E

pub fn itamp8e(&self) -> ITAMP8E_R[src]

Bit 23 - ITAMP5E

impl R<u32, Reg<u32, _CR2>>[src]

pub fn tamp1noer(&self) -> TAMP1NOER_R[src]

Bit 0 - TAMP1NOER

pub fn tamp2noer(&self) -> TAMP2NOER_R[src]

Bit 1 - TAMP2NOER

pub fn tamp3noer(&self) -> TAMP3NOER_R[src]

Bit 2 - TAMP3NOER

pub fn tamp4noer(&self) -> TAMP4NOER_R[src]

Bit 3 - TAMP4NOER

pub fn tamp5noer(&self) -> TAMP5NOER_R[src]

Bit 4 - TAMP5NOER

pub fn tamp6noer(&self) -> TAMP6NOER_R[src]

Bit 5 - TAMP6NOER

pub fn tamp7noer(&self) -> TAMP7NOER_R[src]

Bit 6 - TAMP7NOER

pub fn tamp8noer(&self) -> TAMP8NOER_R[src]

Bit 7 - TAMP8NOER

pub fn tamp1msk(&self) -> TAMP1MSK_R[src]

Bit 16 - TAMP1MSK

pub fn tamp2msk(&self) -> TAMP2MSK_R[src]

Bit 17 - TAMP2MSK

pub fn tamp3msk(&self) -> TAMP3MSK_R[src]

Bit 18 - TAMP3MSK

pub fn bkerase(&self) -> BKERASE_R[src]

Bit 23 - BKERASE

pub fn tamp1trg(&self) -> TAMP1TRG_R[src]

Bit 24 - TAMP1TRG

pub fn tamp2trg(&self) -> TAMP2TRG_R[src]

Bit 25 - TAMP2TRG

pub fn tamp3trg(&self) -> TAMP3TRG_R[src]

Bit 26 - TAMP3TRG

pub fn tamp4trg(&self) -> TAMP4TRG_R[src]

Bit 27 - TAMP4TRG

pub fn tamp5trg(&self) -> TAMP5TRG_R[src]

Bit 28 - TAMP5TRG

pub fn tamp6trg(&self) -> TAMP6TRG_R[src]

Bit 29 - TAMP6TRG

pub fn tamp7trg(&self) -> TAMP7TRG_R[src]

Bit 30 - TAMP7TRG

pub fn tamp8trg(&self) -> TAMP8TRG_R[src]

Bit 31 - TAMP8TRG

impl R<u32, Reg<u32, _CR3>>[src]

pub fn itamp1noer(&self) -> ITAMP1NOER_R[src]

Bit 0 - ITAMP1NOER

pub fn itamp2noer(&self) -> ITAMP2NOER_R[src]

Bit 1 - ITAMP2NOER

pub fn itamp3noer(&self) -> ITAMP3NOER_R[src]

Bit 2 - ITAMP3NOER

pub fn itamp5noer(&self) -> ITAMP5NOER_R[src]

Bit 4 - ITAMP5NOER

pub fn itamp8noer(&self) -> ITAMP8NOER_R[src]

Bit 7 - ITAMP8NOER

impl R<u32, Reg<u32, _FLTCR>>[src]

pub fn tampfreq(&self) -> TAMPFREQ_R[src]

Bits 0:2 - TAMPFREQ

pub fn tampflt(&self) -> TAMPFLT_R[src]

Bits 3:4 - TAMPFLT

pub fn tampprch(&self) -> TAMPPRCH_R[src]

Bits 5:6 - TAMPPRCH

pub fn tamppudis(&self) -> TAMPPUDIS_R[src]

Bit 7 - TAMPPUDIS

impl R<u32, Reg<u32, _ATCR1>>[src]

pub fn tamp1am(&self) -> TAMP1AM_R[src]

Bit 0 - TAMP1AM

pub fn tamp2am(&self) -> TAMP2AM_R[src]

Bit 1 - TAMP2AM

pub fn tamp3am(&self) -> TAMP3AM_R[src]

Bit 2 - TAMP3AM

pub fn tamp4am(&self) -> TAMP4AM_R[src]

Bit 3 - TAMP4AM

pub fn tamp5am(&self) -> TAMP5AM_R[src]

Bit 4 - TAMP5AM

pub fn tamp6am(&self) -> TAMP6AM_R[src]

Bit 5 - TAMP6AM

pub fn tamp7am(&self) -> TAMP7AM_R[src]

Bit 6 - TAMP7AM

pub fn tamp8am(&self) -> TAMP8AM_R[src]

Bit 7 - TAMP8AM

pub fn atosel1(&self) -> ATOSEL1_R[src]

Bits 8:9 - ATOSEL1

pub fn atosel2(&self) -> ATOSEL2_R[src]

Bits 10:11 - ATOSEL2

pub fn atosel3(&self) -> ATOSEL3_R[src]

Bits 12:13 - ATOSEL3

pub fn atosel4(&self) -> ATOSEL4_R[src]

Bits 14:15 - ATOSEL4

pub fn atcksel(&self) -> ATCKSEL_R[src]

Bits 16:17 - ATCKSEL

pub fn atper(&self) -> ATPER_R[src]

Bits 24:25 - ATPER

pub fn atoshare(&self) -> ATOSHARE_R[src]

Bit 30 - ATOSHARE

pub fn flten(&self) -> FLTEN_R[src]

Bit 31 - FLTEN

impl R<u32, Reg<u32, _ATOR>>[src]

pub fn prng(&self) -> PRNG_R[src]

Bits 0:7 - Pseudo-random generator value

pub fn seedf(&self) -> SEEDF_R[src]

Bit 14 - Seed running flag

pub fn inits(&self) -> INITS_R[src]

Bit 15 - Active tamper initialization status

impl R<u32, Reg<u32, _ATCR2>>[src]

pub fn atosel1(&self) -> ATOSEL1_R[src]

Bits 8:10 - ATOSEL1

pub fn atosel2(&self) -> ATOSEL2_R[src]

Bits 11:13 - ATOSEL2

pub fn atosel3(&self) -> ATOSEL3_R[src]

Bits 14:16 - ATOSEL3

pub fn atosel4(&self) -> ATOSEL4_R[src]

Bits 17:19 - ATOSEL4

pub fn atosel5(&self) -> ATOSEL5_R[src]

Bits 20:22 - ATOSEL5

pub fn atosel6(&self) -> ATOSEL6_R[src]

Bits 23:25 - ATOSEL6

pub fn atosel7(&self) -> ATOSEL7_R[src]

Bits 26:28 - ATOSEL7

pub fn atosel8(&self) -> ATOSEL8_R[src]

Bits 29:31 - ATOSEL8

impl R<u32, Reg<u32, _SMCR>>[src]

pub fn bkprwdprot(&self) -> BKPRWDPROT_R[src]

Bits 0:7 - Backup registers read/write protection offset

pub fn bkpwdprot(&self) -> BKPWDPROT_R[src]

Bits 16:23 - Backup registers write protection offset

pub fn tampdprot(&self) -> TAMPDPROT_R[src]

Bit 31 - Tamper protection

impl R<u32, Reg<u32, _PRIVCR>>[src]

pub fn bkprwpriv(&self) -> BKPRWPRIV_R[src]

Bit 29 - Backup registers zone 1 privilege protection

pub fn bkpwpriv(&self) -> BKPWPRIV_R[src]

Bit 30 - Backup registers zone 2 privilege protection

pub fn tamppriv(&self) -> TAMPPRIV_R[src]

Bit 31 - Tamper privilege protection

impl R<u32, Reg<u32, _IER>>[src]

pub fn tamp1ie(&self) -> TAMP1IE_R[src]

Bit 0 - TAMP1IE

pub fn tamp2ie(&self) -> TAMP2IE_R[src]

Bit 1 - TAMP2IE

pub fn tamp3ie(&self) -> TAMP3IE_R[src]

Bit 2 - TAMP3IE

pub fn tamp4ie(&self) -> TAMP4IE_R[src]

Bit 3 - TAMP4IE

pub fn tamp5ie(&self) -> TAMP5IE_R[src]

Bit 4 - TAMP5IE

pub fn tamp6ie(&self) -> TAMP6IE_R[src]

Bit 5 - TAMP6IE

pub fn tamp7ie(&self) -> TAMP7IE_R[src]

Bit 6 - TAMP7IE

pub fn tamp8ie(&self) -> TAMP8IE_R[src]

Bit 7 - TAMP8IE

pub fn itamp1ie(&self) -> ITAMP1IE_R[src]

Bit 16 - ITAMP1IE

pub fn itamp2ie(&self) -> ITAMP2IE_R[src]

Bit 17 - ITAMP2IE

pub fn itamp3ie(&self) -> ITAMP3IE_R[src]

Bit 18 - ITAMP3IE

pub fn itamp5ie(&self) -> ITAMP5IE_R[src]

Bit 20 - ITAMP5IE

pub fn itamp8ie(&self) -> ITAMP8IE_R[src]

Bit 23 - ITAMP8IE

impl R<u32, Reg<u32, _SR>>[src]

pub fn tamp1f(&self) -> TAMP1F_R[src]

Bit 0 - TAMP1F

pub fn tamp2f(&self) -> TAMP2F_R[src]

Bit 1 - TAMP2F

pub fn tamp3f(&self) -> TAMP3F_R[src]

Bit 2 - TAMP3F

pub fn tamp4f(&self) -> TAMP4F_R[src]

Bit 3 - TAMP4F

pub fn tamp5f(&self) -> TAMP5F_R[src]

Bit 4 - TAMP5F

pub fn tamp6f(&self) -> TAMP6F_R[src]

Bit 5 - TAMP6F

pub fn tamp7f(&self) -> TAMP7F_R[src]

Bit 6 - TAMP7F

pub fn tamp8f(&self) -> TAMP8F_R[src]

Bit 7 - TAMP8F

pub fn itamp1f(&self) -> ITAMP1F_R[src]

Bit 16 - ITAMP1F

pub fn itamp2f(&self) -> ITAMP2F_R[src]

Bit 17 - ITAMP2F

pub fn itamp3f(&self) -> ITAMP3F_R[src]

Bit 18 - ITAMP3F

pub fn itamp5f(&self) -> ITAMP5F_R[src]

Bit 20 - ITAMP5F

pub fn itamp8f(&self) -> ITAMP8F_R[src]

Bit 23 - ITAMP8F

impl R<u32, Reg<u32, _MISR>>[src]

pub fn tamp1mf(&self) -> TAMP1MF_R[src]

Bit 0 - TAMP1MF:

pub fn tamp2mf(&self) -> TAMP2MF_R[src]

Bit 1 - TAMP2MF

pub fn tamp3mf(&self) -> TAMP3MF_R[src]

Bit 2 - TAMP3MF

pub fn tamp4mf(&self) -> TAMP4MF_R[src]

Bit 3 - TAMP4MF

pub fn tamp5mf(&self) -> TAMP5MF_R[src]

Bit 4 - TAMP5MF

pub fn tamp6mf(&self) -> TAMP6MF_R[src]

Bit 5 - TAMP6MF

pub fn tamp7mf(&self) -> TAMP7MF_R[src]

Bit 6 - TAMP7MF:

pub fn tamp8mf(&self) -> TAMP8MF_R[src]

Bit 7 - TAMP8MF

pub fn itamp1mf(&self) -> ITAMP1MF_R[src]

Bit 16 - ITAMP1MF

pub fn itamp2mf(&self) -> ITAMP2MF_R[src]

Bit 17 - ITAMP2MF

pub fn itamp3mf(&self) -> ITAMP3MF_R[src]

Bit 18 - ITAMP3MF

pub fn itamp5mf(&self) -> ITAMP5MF_R[src]

Bit 20 - ITAMP5MF

pub fn itamp8mf(&self) -> ITAMP8MF_R[src]

Bit 23 - ITAMP8MF

impl R<u32, Reg<u32, _SMISR>>[src]

pub fn tamp1mf(&self) -> TAMP1MF_R[src]

Bit 0 - TAMP1MF:

pub fn tamp2mf(&self) -> TAMP2MF_R[src]

Bit 1 - TAMP2MF

pub fn tamp3mf(&self) -> TAMP3MF_R[src]

Bit 2 - TAMP3MF

pub fn tamp4mf(&self) -> TAMP4MF_R[src]

Bit 3 - TAMP4MF

pub fn tamp5mf(&self) -> TAMP5MF_R[src]

Bit 4 - TAMP5MF

pub fn tamp6mf(&self) -> TAMP6MF_R[src]

Bit 5 - TAMP6MF

pub fn tamp7mf(&self) -> TAMP7MF_R[src]

Bit 6 - TAMP7MF:

pub fn tamp8mf(&self) -> TAMP8MF_R[src]

Bit 7 - TAMP8MF

pub fn itamp1mf(&self) -> ITAMP1MF_R[src]

Bit 16 - ITAMP1MF

pub fn itamp2mf(&self) -> ITAMP2MF_R[src]

Bit 17 - ITAMP2MF

pub fn itamp3mf(&self) -> ITAMP3MF_R[src]

Bit 18 - ITAMP3MF

pub fn itamp5mf(&self) -> ITAMP5MF_R[src]

Bit 20 - ITAMP5MF

pub fn itamp8mf(&self) -> ITAMP8MF_R[src]

Bit 23 - ITAMP8MF

impl R<u32, Reg<u32, _COUNTR>>[src]

pub fn count(&self) -> COUNT_R[src]

Bits 0:31 - COUNT

impl R<u32, Reg<u32, _CFGR>>[src]

pub fn tmonen(&self) -> TMONEN_R[src]

Bit 1 - TMONEN

pub fn vmonen(&self) -> VMONEN_R[src]

Bit 2 - VMONEN

pub fn wutmonen(&self) -> WUTMONEN_R[src]

Bit 3 - WUTMONEN

impl R<u32, Reg<u32, _BKP0R>>[src]

pub fn bkp(&self) -> BKP_R[src]

Bits 0:31 - BKP

impl R<u32, Reg<u32, _BKP1R>>[src]

pub fn bkp(&self) -> BKP_R[src]

Bits 0:31 - BKP

impl R<u32, Reg<u32, _BKP2R>>[src]

pub fn bkp(&self) -> BKP_R[src]

Bits 0:31 - BKP

impl R<u32, Reg<u32, _BKP3R>>[src]

pub fn bkp(&self) -> BKP_R[src]

Bits 0:31 - BKP

impl R<u32, Reg<u32, _BKP4R>>[src]

pub fn bkp(&self) -> BKP_R[src]

Bits 0:31 - BKP

impl R<u32, Reg<u32, _BKP5R>>[src]

pub fn bkp(&self) -> BKP_R[src]

Bits 0:31 - BKP

impl R<u32, Reg<u32, _BKP6R>>[src]

pub fn bkp(&self) -> BKP_R[src]

Bits 0:31 - BKP

impl R<u32, Reg<u32, _BKP7R>>[src]

pub fn bkp(&self) -> BKP_R[src]

Bits 0:31 - BKP

impl R<u32, Reg<u32, _BKP8R>>[src]

pub fn bkp(&self) -> BKP_R[src]

Bits 0:31 - BKP

impl R<u32, Reg<u32, _BKP9R>>[src]

pub fn bkp(&self) -> BKP_R[src]

Bits 0:31 - BKP

impl R<u32, Reg<u32, _BKP10R>>[src]

pub fn bkp(&self) -> BKP_R[src]

Bits 0:31 - BKP

impl R<u32, Reg<u32, _BKP11R>>[src]

pub fn bkp(&self) -> BKP_R[src]

Bits 0:31 - BKP

impl R<u32, Reg<u32, _BKP12R>>[src]

pub fn bkp(&self) -> BKP_R[src]

Bits 0:31 - BKP

impl R<u32, Reg<u32, _BKP13R>>[src]

pub fn bkp(&self) -> BKP_R[src]

Bits 0:31 - BKP

impl R<u32, Reg<u32, _BKP14R>>[src]

pub fn bkp(&self) -> BKP_R[src]

Bits 0:31 - BKP

impl R<u32, Reg<u32, _BKP15R>>[src]

pub fn bkp(&self) -> BKP_R[src]

Bits 0:31 - BKP

impl R<u32, Reg<u32, _BKP16R>>[src]

pub fn bkp(&self) -> BKP_R[src]

Bits 0:31 - BKP

impl R<u32, Reg<u32, _BKP17R>>[src]

pub fn bkp(&self) -> BKP_R[src]

Bits 0:31 - BKP

impl R<u32, Reg<u32, _BKP18R>>[src]

pub fn bkp(&self) -> BKP_R[src]

Bits 0:31 - BKP

impl R<u32, Reg<u32, _BKP19R>>[src]

pub fn bkp(&self) -> BKP_R[src]

Bits 0:31 - BKP

impl R<u32, Reg<u32, _BKP20R>>[src]

pub fn bkp(&self) -> BKP_R[src]

Bits 0:31 - BKP

impl R<u32, Reg<u32, _BKP21R>>[src]

pub fn bkp(&self) -> BKP_R[src]

Bits 0:31 - BKP

impl R<u32, Reg<u32, _BKP22R>>[src]

pub fn bkp(&self) -> BKP_R[src]

Bits 0:31 - BKP

impl R<u32, Reg<u32, _BKP23R>>[src]

pub fn bkp(&self) -> BKP_R[src]

Bits 0:31 - BKP

impl R<u32, Reg<u32, _BKP24R>>[src]

pub fn bkp(&self) -> BKP_R[src]

Bits 0:31 - BKP

impl R<u32, Reg<u32, _BKP25R>>[src]

pub fn bkp(&self) -> BKP_R[src]

Bits 0:31 - BKP

impl R<u32, Reg<u32, _BKP26R>>[src]

pub fn bkp(&self) -> BKP_R[src]

Bits 0:31 - BKP

impl R<u32, Reg<u32, _BKP27R>>[src]

pub fn bkp(&self) -> BKP_R[src]

Bits 0:31 - BKP

impl R<u32, Reg<u32, _BKP28R>>[src]

pub fn bkp(&self) -> BKP_R[src]

Bits 0:31 - BKP

impl R<u32, Reg<u32, _BKP29R>>[src]

pub fn bkp(&self) -> BKP_R[src]

Bits 0:31 - BKP

impl R<u32, Reg<u32, _BKP30R>>[src]

pub fn bkp(&self) -> BKP_R[src]

Bits 0:31 - BKP

impl R<u32, Reg<u32, _BKP31R>>[src]

pub fn bkp(&self) -> BKP_R[src]

Bits 0:31 - BKP

impl R<u32, Reg<u32, _CR1>>[src]

pub fn pe(&self) -> PE_R[src]

Bit 0 - Peripheral enable

pub fn txie(&self) -> TXIE_R[src]

Bit 1 - TX Interrupt enable

pub fn rxie(&self) -> RXIE_R[src]

Bit 2 - RX Interrupt enable

pub fn addrie(&self) -> ADDRIE_R[src]

Bit 3 - Address match interrupt enable (slave only)

pub fn nackie(&self) -> NACKIE_R[src]

Bit 4 - Not acknowledge received interrupt enable

pub fn stopie(&self) -> STOPIE_R[src]

Bit 5 - STOP detection Interrupt enable

pub fn tcie(&self) -> TCIE_R[src]

Bit 6 - Transfer Complete interrupt enable

pub fn errie(&self) -> ERRIE_R[src]

Bit 7 - Error interrupts enable

pub fn dnf(&self) -> DNF_R[src]

Bits 8:11 - Digital noise filter

pub fn anfoff(&self) -> ANFOFF_R[src]

Bit 12 - Analog noise filter OFF

pub fn txdmaen(&self) -> TXDMAEN_R[src]

Bit 14 - DMA transmission requests enable

pub fn rxdmaen(&self) -> RXDMAEN_R[src]

Bit 15 - DMA reception requests enable

pub fn sbc(&self) -> SBC_R[src]

Bit 16 - Slave byte control

pub fn nostretch(&self) -> NOSTRETCH_R[src]

Bit 17 - Clock stretching disable

pub fn wupen(&self) -> WUPEN_R[src]

Bit 18 - Wakeup from STOP enable

pub fn gcen(&self) -> GCEN_R[src]

Bit 19 - General call enable

pub fn smbhen(&self) -> SMBHEN_R[src]

Bit 20 - SMBus Host address enable

pub fn smbden(&self) -> SMBDEN_R[src]

Bit 21 - SMBus Device Default address enable

pub fn alerten(&self) -> ALERTEN_R[src]

Bit 22 - SMBUS alert enable

pub fn pecen(&self) -> PECEN_R[src]

Bit 23 - PEC enable

impl R<u32, Reg<u32, _CR2>>[src]

pub fn pecbyte(&self) -> PECBYTE_R[src]

Bit 26 - Packet error checking byte

pub fn autoend(&self) -> AUTOEND_R[src]

Bit 25 - Automatic end mode (master mode)

pub fn reload(&self) -> RELOAD_R[src]

Bit 24 - NBYTES reload mode

pub fn nbytes(&self) -> NBYTES_R[src]

Bits 16:23 - Number of bytes

pub fn nack(&self) -> NACK_R[src]

Bit 15 - NACK generation (slave mode)

pub fn stop(&self) -> STOP_R[src]

Bit 14 - Stop generation (master mode)

pub fn start(&self) -> START_R[src]

Bit 13 - Start generation

pub fn head10r(&self) -> HEAD10R_R[src]

Bit 12 - 10-bit address header only read direction (master receiver mode)

pub fn add10(&self) -> ADD10_R[src]

Bit 11 - 10-bit addressing mode (master mode)

pub fn rd_wrn(&self) -> RD_WRN_R[src]

Bit 10 - Transfer direction (master mode)

pub fn sadd(&self) -> SADD_R[src]

Bits 0:9 - Slave address bit (master mode)

impl R<u32, Reg<u32, _OAR1>>[src]

pub fn oa1(&self) -> OA1_R[src]

Bits 0:9 - Interface address

pub fn oa1mode(&self) -> OA1MODE_R[src]

Bit 10 - Own Address 1 10-bit mode

pub fn oa1en(&self) -> OA1EN_R[src]

Bit 15 - Own Address 1 enable

impl R<u32, Reg<u32, _OAR2>>[src]

pub fn oa2(&self) -> OA2_R[src]

Bits 1:7 - Interface address

pub fn oa2msk(&self) -> OA2MSK_R[src]

Bits 8:10 - Own Address 2 masks

pub fn oa2en(&self) -> OA2EN_R[src]

Bit 15 - Own Address 2 enable

impl R<u32, Reg<u32, _TIMINGR>>[src]

pub fn scll(&self) -> SCLL_R[src]

Bits 0:7 - SCL low period (master mode)

pub fn sclh(&self) -> SCLH_R[src]

Bits 8:15 - SCL high period (master mode)

pub fn sdadel(&self) -> SDADEL_R[src]

Bits 16:19 - Data hold time

pub fn scldel(&self) -> SCLDEL_R[src]

Bits 20:23 - Data setup time

pub fn presc(&self) -> PRESC_R[src]

Bits 28:31 - Timing prescaler

impl R<u32, Reg<u32, _TIMEOUTR>>[src]

pub fn timeouta(&self) -> TIMEOUTA_R[src]

Bits 0:11 - Bus timeout A

pub fn tidle(&self) -> TIDLE_R[src]

Bit 12 - Idle clock timeout detection

pub fn timouten(&self) -> TIMOUTEN_R[src]

Bit 15 - Clock timeout enable

pub fn timeoutb(&self) -> TIMEOUTB_R[src]

Bits 16:27 - Bus timeout B

pub fn texten(&self) -> TEXTEN_R[src]

Bit 31 - Extended clock timeout enable

impl R<u32, Reg<u32, _ISR>>[src]

pub fn addcode(&self) -> ADDCODE_R[src]

Bits 17:23 - Address match code (Slave mode)

pub fn dir(&self) -> DIR_R[src]

Bit 16 - Transfer direction (Slave mode)

pub fn busy(&self) -> BUSY_R[src]

Bit 15 - Bus busy

pub fn alert(&self) -> ALERT_R[src]

Bit 13 - SMBus alert

pub fn timeout(&self) -> TIMEOUT_R[src]

Bit 12 - Timeout or t_low detection flag

pub fn pecerr(&self) -> PECERR_R[src]

Bit 11 - PEC Error in reception

pub fn ovr(&self) -> OVR_R[src]

Bit 10 - Overrun/Underrun (slave mode)

pub fn arlo(&self) -> ARLO_R[src]

Bit 9 - Arbitration lost

pub fn berr(&self) -> BERR_R[src]

Bit 8 - Bus error

pub fn tcr(&self) -> TCR_R[src]

Bit 7 - Transfer Complete Reload

pub fn tc(&self) -> TC_R[src]

Bit 6 - Transfer Complete (master mode)

pub fn stopf(&self) -> STOPF_R[src]

Bit 5 - Stop detection flag

pub fn nackf(&self) -> NACKF_R[src]

Bit 4 - Not acknowledge received flag

pub fn addr(&self) -> ADDR_R[src]

Bit 3 - Address matched (slave mode)

pub fn rxne(&self) -> RXNE_R[src]

Bit 2 - Receive data register not empty (receivers)

pub fn txis(&self) -> TXIS_R[src]

Bit 1 - Transmit interrupt status (transmitters)

pub fn txe(&self) -> TXE_R[src]

Bit 0 - Transmit data register empty (transmitters)

impl R<u32, Reg<u32, _PECR>>[src]

pub fn pec(&self) -> PEC_R[src]

Bits 0:7 - Packet error checking register

impl R<u32, Reg<u32, _RXDR>>[src]

pub fn rxdata(&self) -> RXDATA_R[src]

Bits 0:7 - 8-bit receive data

impl R<u32, Reg<u32, _TXDR>>[src]

pub fn txdata(&self) -> TXDATA_R[src]

Bits 0:7 - 8-bit transmit data

impl R<u32, Reg<u32, _ICACHE_CR>>[src]

pub fn en(&self) -> EN_R[src]

Bit 0 - EN

pub fn cacheinv(&self) -> CACHEINV_R[src]

Bit 1 - CACHEINV

pub fn waysel(&self) -> WAYSEL_R[src]

Bit 2 - WAYSEL

pub fn hitmen(&self) -> HITMEN_R[src]

Bit 16 - HITMEN

pub fn missmen(&self) -> MISSMEN_R[src]

Bit 17 - MISSMEN

pub fn hitmrst(&self) -> HITMRST_R[src]

Bit 18 - HITMRST

pub fn missmrst(&self) -> MISSMRST_R[src]

Bit 19 - MISSMRST

impl R<u32, Reg<u32, _ICACHE_SR>>[src]

pub fn busyf(&self) -> BUSYF_R[src]

Bit 0 - BUSYF

pub fn bsyendf(&self) -> BSYENDF_R[src]

Bit 1 - BSYENDF

pub fn errf(&self) -> ERRF_R[src]

Bit 2 - ERRF

impl R<u32, Reg<u32, _ICACHE_IER>>[src]

pub fn bsyendie(&self) -> BSYENDIE_R[src]

Bit 1 - BSYENDIE

pub fn errie(&self) -> ERRIE_R[src]

Bit 2 - ERRIE

impl R<u32, Reg<u32, _ICACHE_HMONR>>[src]

pub fn hitmon(&self) -> HITMON_R[src]

Bits 0:31 - HITMON

impl R<u32, Reg<u32, _ICACHE_MMONR>>[src]

pub fn missmon(&self) -> MISSMON_R[src]

Bits 0:15 - MISSMON

impl R<u32, Reg<u32, _ICACHE_CRR0>>[src]

pub fn baseaddr(&self) -> BASEADDR_R[src]

Bits 0:7 - BASEADDR

pub fn rsize(&self) -> RSIZE_R[src]

Bits 9:11 - RSIZE

pub fn ren(&self) -> REN_R[src]

Bit 15 - REN

pub fn remapaddr(&self) -> REMAPADDR_R[src]

Bits 16:26 - REMAPADDR

pub fn mstsel(&self) -> MSTSEL_R[src]

Bit 28 - MSTSEL

pub fn hburst(&self) -> HBURST_R[src]

Bit 31 - HBURST

impl R<u32, Reg<u32, _ICACHE_CRR1>>[src]

pub fn baseaddr(&self) -> BASEADDR_R[src]

Bits 0:7 - BASEADDR

pub fn rsize(&self) -> RSIZE_R[src]

Bits 9:11 - RSIZE

pub fn ren(&self) -> REN_R[src]

Bit 15 - REN

pub fn remapaddr(&self) -> REMAPADDR_R[src]

Bits 16:26 - REMAPADDR

pub fn mstsel(&self) -> MSTSEL_R[src]

Bit 28 - MSTSEL

pub fn hburst(&self) -> HBURST_R[src]

Bit 31 - HBURST

impl R<u32, Reg<u32, _ICACHE_CRR2>>[src]

pub fn baseaddr(&self) -> BASEADDR_R[src]

Bits 0:7 - BASEADDR

pub fn rsize(&self) -> RSIZE_R[src]

Bits 9:11 - RSIZE

pub fn ren(&self) -> REN_R[src]

Bit 15 - REN

pub fn remapaddr(&self) -> REMAPADDR_R[src]

Bits 16:26 - REMAPADDR

pub fn mstsel(&self) -> MSTSEL_R[src]

Bit 28 - MSTSEL

pub fn hburst(&self) -> HBURST_R[src]

Bit 31 - HBURST

impl R<u32, Reg<u32, _ICACHE_CRR3>>[src]

pub fn baseaddr(&self) -> BASEADDR_R[src]

Bits 0:7 - BASEADDR

pub fn rsize(&self) -> RSIZE_R[src]

Bits 9:11 - RSIZE

pub fn ren(&self) -> REN_R[src]

Bit 15 - REN

pub fn remapaddr(&self) -> REMAPADDR_R[src]

Bits 16:26 - REMAPADDR

pub fn mstsel(&self) -> MSTSEL_R[src]

Bit 28 - MSTSEL

pub fn hburst(&self) -> HBURST_R[src]

Bit 31 - HBURST

impl R<u32, Reg<u32, _PR>>[src]

pub fn pr(&self) -> PR_R[src]

Bits 0:2 - Prescaler divider

impl R<u32, Reg<u32, _RLR>>[src]

pub fn rl(&self) -> RL_R[src]

Bits 0:11 - Watchdog counter reload value

impl R<u32, Reg<u32, _SR>>[src]

pub fn wvu(&self) -> WVU_R[src]

Bit 2 - Watchdog counter window value update

pub fn rvu(&self) -> RVU_R[src]

Bit 1 - Watchdog counter reload value update

pub fn pvu(&self) -> PVU_R[src]

Bit 0 - Watchdog prescaler value update

impl R<u32, Reg<u32, _WINR>>[src]

pub fn win(&self) -> WIN_R[src]

Bits 0:11 - Watchdog counter window value

impl R<u32, Reg<u32, _ISR>>[src]

pub fn down(&self) -> DOWN_R[src]

Bit 6 - Counter direction change up to down

pub fn up(&self) -> UP_R[src]

Bit 5 - Counter direction change down to up

pub fn arrok(&self) -> ARROK_R[src]

Bit 4 - Autoreload register update OK

pub fn cmpok(&self) -> CMPOK_R[src]

Bit 3 - Compare register update OK

pub fn exttrig(&self) -> EXTTRIG_R[src]

Bit 2 - External trigger edge event

pub fn arrm(&self) -> ARRM_R[src]

Bit 1 - Autoreload match

pub fn cmpm(&self) -> CMPM_R[src]

Bit 0 - Compare match

pub fn ue(&self) -> UE_R[src]

Bit 7 - LPTIM update event occurred

pub fn repok(&self) -> REPOK_R[src]

Bit 8 - Repetition register update Ok

impl R<u32, Reg<u32, _IER>>[src]

pub fn downie(&self) -> DOWNIE_R[src]

Bit 6 - Direction change to down Interrupt Enable

pub fn upie(&self) -> UPIE_R[src]

Bit 5 - Direction change to UP Interrupt Enable

pub fn arrokie(&self) -> ARROKIE_R[src]

Bit 4 - Autoreload register update OK Interrupt Enable

pub fn cmpokie(&self) -> CMPOKIE_R[src]

Bit 3 - Compare register update OK Interrupt Enable

pub fn exttrigie(&self) -> EXTTRIGIE_R[src]

Bit 2 - External trigger valid edge Interrupt Enable

pub fn arrmie(&self) -> ARRMIE_R[src]

Bit 1 - Autoreload match Interrupt Enable

pub fn cmpmie(&self) -> CMPMIE_R[src]

Bit 0 - Compare match Interrupt Enable

pub fn ueie(&self) -> UEIE_R[src]

Bit 7 - Update event interrupt enable

pub fn repokie(&self) -> REPOKIE_R[src]

Bit 8 - REPOKIE

impl R<u32, Reg<u32, _CFGR>>[src]

pub fn enc(&self) -> ENC_R[src]

Bit 24 - Encoder mode enable

pub fn countmode(&self) -> COUNTMODE_R[src]

Bit 23 - counter mode enabled

pub fn preload(&self) -> PRELOAD_R[src]

Bit 22 - Registers update mode

pub fn wavpol(&self) -> WAVPOL_R[src]

Bit 21 - Waveform shape polarity

pub fn wave(&self) -> WAVE_R[src]

Bit 20 - Waveform shape

pub fn timout(&self) -> TIMOUT_R[src]

Bit 19 - Timeout enable

pub fn trigen(&self) -> TRIGEN_R[src]

Bits 17:18 - Trigger enable and polarity

pub fn trigsel(&self) -> TRIGSEL_R[src]

Bits 13:15 - Trigger selector

pub fn presc(&self) -> PRESC_R[src]

Bits 9:11 - Clock prescaler

pub fn trgflt(&self) -> TRGFLT_R[src]

Bits 6:7 - Configurable digital filter for trigger

pub fn ckflt(&self) -> CKFLT_R[src]

Bits 3:4 - Configurable digital filter for external clock

pub fn ckpol(&self) -> CKPOL_R[src]

Bits 1:2 - Clock Polarity

pub fn cksel(&self) -> CKSEL_R[src]

Bit 0 - Clock selector

impl R<u32, Reg<u32, _CR>>[src]

pub fn cntstrt(&self) -> CNTSTRT_R[src]

Bit 2 - Timer start in continuous mode

pub fn sngstrt(&self) -> SNGSTRT_R[src]

Bit 1 - LPTIM start in single mode

pub fn enable(&self) -> ENABLE_R[src]

Bit 0 - LPTIM Enable

pub fn countrst(&self) -> COUNTRST_R[src]

Bit 4 - Counter reset

pub fn rstare(&self) -> RSTARE_R[src]

Bit 3 - Reset after read enable

impl R<u32, Reg<u32, _CMP>>[src]

pub fn cmp(&self) -> CMP_R[src]

Bits 0:15 - Compare value

impl R<u32, Reg<u32, _ARR>>[src]

pub fn arr(&self) -> ARR_R[src]

Bits 0:15 - Auto reload value

impl R<u32, Reg<u32, _CNT>>[src]

pub fn cnt(&self) -> CNT_R[src]

Bits 0:15 - Counter value

impl R<u32, Reg<u32, _OR>>[src]

pub fn or_0(&self) -> OR_0_R[src]

Bit 0 - Option register bit 0

pub fn or_1(&self) -> OR_1_R[src]

Bit 1 - Option register bit 1

impl R<u32, Reg<u32, _RCR>>[src]

pub fn rep(&self) -> REP_R[src]

Bits 0:7 - Repetition register value

impl R<u32, Reg<u32, _MPCBB1_CR>>[src]

pub fn lck(&self) -> LCK_R[src]

Bit 0 - LCK

pub fn invsecstate(&self) -> INVSECSTATE_R[src]

Bit 30 - INVSECSTATE

pub fn srwiladis(&self) -> SRWILADIS_R[src]

Bit 31 - SRWILADIS

impl R<u32, Reg<u32, _MPCBB1_LCKVTR1>>[src]

pub fn lcksb0(&self) -> LCKSB0_R[src]

Bit 0 - LCKSB0

pub fn lcksb1(&self) -> LCKSB1_R[src]

Bit 1 - LCKSB1

pub fn lcksb2(&self) -> LCKSB2_R[src]

Bit 2 - LCKSB2

pub fn lcksb3(&self) -> LCKSB3_R[src]

Bit 3 - LCKSB3

pub fn lcksb4(&self) -> LCKSB4_R[src]

Bit 4 - LCKSB4

pub fn lcksb5(&self) -> LCKSB5_R[src]

Bit 5 - LCKSB5

pub fn lcksb6(&self) -> LCKSB6_R[src]

Bit 6 - LCKSB6

pub fn lcksb7(&self) -> LCKSB7_R[src]

Bit 7 - LCKSB7

pub fn lcksb8(&self) -> LCKSB8_R[src]

Bit 8 - LCKSB8

pub fn lcksb9(&self) -> LCKSB9_R[src]

Bit 9 - LCKSB9

pub fn lcksb10(&self) -> LCKSB10_R[src]

Bit 10 - LCKSB10

pub fn lcksb11(&self) -> LCKSB11_R[src]

Bit 11 - LCKSB11

pub fn lcksb12(&self) -> LCKSB12_R[src]

Bit 12 - LCKSB12

pub fn lcksb13(&self) -> LCKSB13_R[src]

Bit 13 - LCKSB13

pub fn lcksb14(&self) -> LCKSB14_R[src]

Bit 14 - LCKSB14

pub fn lcksb15(&self) -> LCKSB15_R[src]

Bit 15 - LCKSB15

pub fn lcksb16(&self) -> LCKSB16_R[src]

Bit 16 - LCKSB16

pub fn lcksb17(&self) -> LCKSB17_R[src]

Bit 17 - LCKSB17

pub fn lcksb18(&self) -> LCKSB18_R[src]

Bit 18 - LCKSB18

pub fn lcksb19(&self) -> LCKSB19_R[src]

Bit 19 - LCKSB19

pub fn lcksb20(&self) -> LCKSB20_R[src]

Bit 20 - LCKSB20

pub fn lcksb21(&self) -> LCKSB21_R[src]

Bit 21 - LCKSB21

pub fn lcksb22(&self) -> LCKSB22_R[src]

Bit 22 - LCKSB22

pub fn lcksb23(&self) -> LCKSB23_R[src]

Bit 23 - LCKSB23

pub fn lcksb24(&self) -> LCKSB24_R[src]

Bit 24 - LCKSB24

pub fn lcksb25(&self) -> LCKSB25_R[src]

Bit 25 - LCKSB25

pub fn lcksb26(&self) -> LCKSB26_R[src]

Bit 26 - LCKSB26

pub fn lcksb27(&self) -> LCKSB27_R[src]

Bit 27 - LCKSB27

pub fn lcksb28(&self) -> LCKSB28_R[src]

Bit 28 - LCKSB28

pub fn lcksb29(&self) -> LCKSB29_R[src]

Bit 29 - LCKSB29

pub fn lcksb30(&self) -> LCKSB30_R[src]

Bit 30 - LCKSB30

pub fn lcksb31(&self) -> LCKSB31_R[src]

Bit 31 - LCKSB31

impl R<u32, Reg<u32, _MPCBB1_LCKVTR2>>[src]

pub fn lcksb32(&self) -> LCKSB32_R[src]

Bit 0 - LCKSB32

pub fn lcksb33(&self) -> LCKSB33_R[src]

Bit 1 - LCKSB33

pub fn lcksb34(&self) -> LCKSB34_R[src]

Bit 2 - LCKSB34

pub fn lcksb35(&self) -> LCKSB35_R[src]

Bit 3 - LCKSB35

pub fn lcksb36(&self) -> LCKSB36_R[src]

Bit 4 - LCKSB36

pub fn lcksb37(&self) -> LCKSB37_R[src]

Bit 5 - LCKSB37

pub fn lcksb38(&self) -> LCKSB38_R[src]

Bit 6 - LCKSB38

pub fn lcksb39(&self) -> LCKSB39_R[src]

Bit 7 - LCKSB39

pub fn lcksb40(&self) -> LCKSB40_R[src]

Bit 8 - LCKSB40

pub fn lcksb41(&self) -> LCKSB41_R[src]

Bit 9 - LCKSB41

pub fn lcksb42(&self) -> LCKSB42_R[src]

Bit 10 - LCKSB42

pub fn lcksb43(&self) -> LCKSB43_R[src]

Bit 11 - LCKSB43

pub fn lcksb44(&self) -> LCKSB44_R[src]

Bit 12 - LCKSB44

pub fn lcksb45(&self) -> LCKSB45_R[src]

Bit 13 - LCKSB45

pub fn lcksb46(&self) -> LCKSB46_R[src]

Bit 14 - LCKSB46

pub fn lcksb47(&self) -> LCKSB47_R[src]

Bit 15 - LCKSB47

pub fn lcksb48(&self) -> LCKSB48_R[src]

Bit 16 - LCKSB48

pub fn lcksb49(&self) -> LCKSB49_R[src]

Bit 17 - LCKSB49

pub fn lcksb50(&self) -> LCKSB50_R[src]

Bit 18 - LCKSB50

pub fn lcksb51(&self) -> LCKSB51_R[src]

Bit 19 - LCKSB51

pub fn lcksb52(&self) -> LCKSB52_R[src]

Bit 20 - LCKSB52

pub fn lcksb53(&self) -> LCKSB53_R[src]

Bit 21 - LCKSB53

pub fn lcksb54(&self) -> LCKSB54_R[src]

Bit 22 - LCKSB54

pub fn lcksb55(&self) -> LCKSB55_R[src]

Bit 23 - LCKSB55

pub fn lcksb56(&self) -> LCKSB56_R[src]

Bit 24 - LCKSB56

pub fn lcksb57(&self) -> LCKSB57_R[src]

Bit 25 - LCKSB57

pub fn lcksb58(&self) -> LCKSB58_R[src]

Bit 26 - LCKSB58

pub fn lcksb59(&self) -> LCKSB59_R[src]

Bit 27 - LCKSB59

pub fn lcksb60(&self) -> LCKSB60_R[src]

Bit 28 - LCKSB60

pub fn lcksb61(&self) -> LCKSB61_R[src]

Bit 29 - LCKSB61

pub fn lcksb62(&self) -> LCKSB62_R[src]

Bit 30 - LCKSB62

pub fn lcksb63(&self) -> LCKSB63_R[src]

Bit 31 - LCKSB63

impl R<u32, Reg<u32, _MPCBB1_VCTR0>>[src]

pub fn b0(&self) -> B0_R[src]

Bit 0 - B0

pub fn b1(&self) -> B1_R[src]

Bit 1 - B1

pub fn b2(&self) -> B2_R[src]

Bit 2 - B2

pub fn b3(&self) -> B3_R[src]

Bit 3 - B3

pub fn b4(&self) -> B4_R[src]

Bit 4 - B4

pub fn b5(&self) -> B5_R[src]

Bit 5 - B5

pub fn b6(&self) -> B6_R[src]

Bit 6 - B6

pub fn b7(&self) -> B7_R[src]

Bit 7 - B7

pub fn b8(&self) -> B8_R[src]

Bit 8 - B8

pub fn b9(&self) -> B9_R[src]

Bit 9 - B9

pub fn b10(&self) -> B10_R[src]

Bit 10 - B10

pub fn b11(&self) -> B11_R[src]

Bit 11 - B11

pub fn b12(&self) -> B12_R[src]

Bit 12 - B12

pub fn b13(&self) -> B13_R[src]

Bit 13 - B13

pub fn b14(&self) -> B14_R[src]

Bit 14 - B14

pub fn b15(&self) -> B15_R[src]

Bit 15 - B15

pub fn b16(&self) -> B16_R[src]

Bit 16 - B16

pub fn b17(&self) -> B17_R[src]

Bit 17 - B17

pub fn b18(&self) -> B18_R[src]

Bit 18 - B18

pub fn b19(&self) -> B19_R[src]

Bit 19 - B19

pub fn b20(&self) -> B20_R[src]

Bit 20 - B20

pub fn b21(&self) -> B21_R[src]

Bit 21 - B21

pub fn b22(&self) -> B22_R[src]

Bit 22 - B22

pub fn b23(&self) -> B23_R[src]

Bit 23 - B23

pub fn b24(&self) -> B24_R[src]

Bit 24 - B24

pub fn b25(&self) -> B25_R[src]

Bit 25 - B25

pub fn b26(&self) -> B26_R[src]

Bit 26 - B26

pub fn b27(&self) -> B27_R[src]

Bit 27 - B27

pub fn b28(&self) -> B28_R[src]

Bit 28 - B28

pub fn b29(&self) -> B29_R[src]

Bit 29 - B29

pub fn b30(&self) -> B30_R[src]

Bit 30 - B30

pub fn b31(&self) -> B31_R[src]

Bit 31 - B31

impl R<u32, Reg<u32, _MPCBB1_VCTR1>>[src]

pub fn b32(&self) -> B32_R[src]

Bit 0 - B32

pub fn b33(&self) -> B33_R[src]

Bit 1 - B33

pub fn b34(&self) -> B34_R[src]

Bit 2 - B34

pub fn b35(&self) -> B35_R[src]

Bit 3 - B35

pub fn b36(&self) -> B36_R[src]

Bit 4 - B36

pub fn b37(&self) -> B37_R[src]

Bit 5 - B37

pub fn b38(&self) -> B38_R[src]

Bit 6 - B38

pub fn b39(&self) -> B39_R[src]

Bit 7 - B39

pub fn b40(&self) -> B40_R[src]

Bit 8 - B40

pub fn b41(&self) -> B41_R[src]

Bit 9 - B41

pub fn b42(&self) -> B42_R[src]

Bit 10 - B42

pub fn b43(&self) -> B43_R[src]

Bit 11 - B43

pub fn b44(&self) -> B44_R[src]

Bit 12 - B44

pub fn b45(&self) -> B45_R[src]

Bit 13 - B45

pub fn b46(&self) -> B46_R[src]

Bit 14 - B46

pub fn b47(&self) -> B47_R[src]

Bit 15 - B47

pub fn b48(&self) -> B48_R[src]

Bit 16 - B48

pub fn b49(&self) -> B49_R[src]

Bit 17 - B49

pub fn b50(&self) -> B50_R[src]

Bit 18 - B50

pub fn b51(&self) -> B51_R[src]

Bit 19 - B51

pub fn b52(&self) -> B52_R[src]

Bit 20 - B52

pub fn b53(&self) -> B53_R[src]

Bit 21 - B53

pub fn b54(&self) -> B54_R[src]

Bit 22 - B54

pub fn b55(&self) -> B55_R[src]

Bit 23 - B55

pub fn b56(&self) -> B56_R[src]

Bit 24 - B56

pub fn b57(&self) -> B57_R[src]

Bit 25 - B57

pub fn b58(&self) -> B58_R[src]

Bit 26 - B58

pub fn b59(&self) -> B59_R[src]

Bit 27 - B59

pub fn b60(&self) -> B60_R[src]

Bit 28 - B60

pub fn b61(&self) -> B61_R[src]

Bit 29 - B61

pub fn b62(&self) -> B62_R[src]

Bit 30 - B62

pub fn b63(&self) -> B63_R[src]

Bit 31 - B63

impl R<u32, Reg<u32, _MPCBB1_VCTR2>>[src]

pub fn b64(&self) -> B64_R[src]

Bit 0 - B64

pub fn b65(&self) -> B65_R[src]

Bit 1 - B65

pub fn b66(&self) -> B66_R[src]

Bit 2 - B66

pub fn b67(&self) -> B67_R[src]

Bit 3 - B67

pub fn b68(&self) -> B68_R[src]

Bit 4 - B68

pub fn b69(&self) -> B69_R[src]

Bit 5 - B69

pub fn b70(&self) -> B70_R[src]

Bit 6 - B70

pub fn b71(&self) -> B71_R[src]

Bit 7 - B71

pub fn b72(&self) -> B72_R[src]

Bit 8 - B72

pub fn b73(&self) -> B73_R[src]

Bit 9 - B73

pub fn b74(&self) -> B74_R[src]

Bit 10 - B74

pub fn b75(&self) -> B75_R[src]

Bit 11 - B75

pub fn b76(&self) -> B76_R[src]

Bit 12 - B76

pub fn b77(&self) -> B77_R[src]

Bit 13 - B77

pub fn b78(&self) -> B78_R[src]

Bit 14 - B78

pub fn b79(&self) -> B79_R[src]

Bit 15 - B79

pub fn b80(&self) -> B80_R[src]

Bit 16 - B80

pub fn b81(&self) -> B81_R[src]

Bit 17 - B81

pub fn b82(&self) -> B82_R[src]

Bit 18 - B82

pub fn b83(&self) -> B83_R[src]

Bit 19 - B83

pub fn b84(&self) -> B84_R[src]

Bit 20 - B84

pub fn b85(&self) -> B85_R[src]

Bit 21 - B85

pub fn b86(&self) -> B86_R[src]

Bit 22 - B86

pub fn b87(&self) -> B87_R[src]

Bit 23 - B87

pub fn b88(&self) -> B88_R[src]

Bit 24 - B88

pub fn b89(&self) -> B89_R[src]

Bit 25 - B89

pub fn b90(&self) -> B90_R[src]

Bit 26 - B90

pub fn b91(&self) -> B91_R[src]

Bit 27 - B91

pub fn b92(&self) -> B92_R[src]

Bit 28 - B92

pub fn b93(&self) -> B93_R[src]

Bit 29 - B93

pub fn b94(&self) -> B94_R[src]

Bit 30 - B94

pub fn b95(&self) -> B95_R[src]

Bit 31 - B95

impl R<u32, Reg<u32, _MPCBB1_VCTR3>>[src]

pub fn b96(&self) -> B96_R[src]

Bit 0 - B96

pub fn b97(&self) -> B97_R[src]

Bit 1 - B97

pub fn b98(&self) -> B98_R[src]

Bit 2 - B98

pub fn b99(&self) -> B99_R[src]

Bit 3 - B99

pub fn b100(&self) -> B100_R[src]

Bit 4 - B100

pub fn b101(&self) -> B101_R[src]

Bit 5 - B101

pub fn b102(&self) -> B102_R[src]

Bit 6 - B102

pub fn b103(&self) -> B103_R[src]

Bit 7 - B103

pub fn b104(&self) -> B104_R[src]

Bit 8 - B104

pub fn b105(&self) -> B105_R[src]

Bit 9 - B105

pub fn b106(&self) -> B106_R[src]

Bit 10 - B106

pub fn b107(&self) -> B107_R[src]

Bit 11 - B107

pub fn b108(&self) -> B108_R[src]

Bit 12 - B108

pub fn b109(&self) -> B109_R[src]

Bit 13 - B109

pub fn b110(&self) -> B110_R[src]

Bit 14 - B110

pub fn b111(&self) -> B111_R[src]

Bit 15 - B111

pub fn b112(&self) -> B112_R[src]

Bit 16 - B112

pub fn b113(&self) -> B113_R[src]

Bit 17 - B113

pub fn b114(&self) -> B114_R[src]

Bit 18 - B114

pub fn b115(&self) -> B115_R[src]

Bit 19 - B115

pub fn b116(&self) -> B116_R[src]

Bit 20 - B116

pub fn b117(&self) -> B117_R[src]

Bit 21 - B117

pub fn b118(&self) -> B118_R[src]

Bit 22 - B118

pub fn b119(&self) -> B119_R[src]

Bit 23 - B119

pub fn b120(&self) -> B120_R[src]

Bit 24 - B120

pub fn b121(&self) -> B121_R[src]

Bit 25 - B121

pub fn b122(&self) -> B122_R[src]

Bit 26 - B122

pub fn b123(&self) -> B123_R[src]

Bit 27 - B123

pub fn b124(&self) -> B124_R[src]

Bit 28 - B124

pub fn b125(&self) -> B125_R[src]

Bit 29 - B125

pub fn b126(&self) -> B126_R[src]

Bit 30 - B126

pub fn b127(&self) -> B127_R[src]

Bit 31 - B127

impl R<u32, Reg<u32, _MPCBB1_VCTR4>>[src]

pub fn b128(&self) -> B128_R[src]

Bit 0 - B128

pub fn b129(&self) -> B129_R[src]

Bit 1 - B129

pub fn b130(&self) -> B130_R[src]

Bit 2 - B130

pub fn b131(&self) -> B131_R[src]

Bit 3 - B131

pub fn b132(&self) -> B132_R[src]

Bit 4 - B132

pub fn b133(&self) -> B133_R[src]

Bit 5 - B133

pub fn b134(&self) -> B134_R[src]

Bit 6 - B134

pub fn b135(&self) -> B135_R[src]

Bit 7 - B135

pub fn b136(&self) -> B136_R[src]

Bit 8 - B136

pub fn b137(&self) -> B137_R[src]

Bit 9 - B137

pub fn b138(&self) -> B138_R[src]

Bit 10 - B138

pub fn b139(&self) -> B139_R[src]

Bit 11 - B139

pub fn b140(&self) -> B140_R[src]

Bit 12 - B140

pub fn b141(&self) -> B141_R[src]

Bit 13 - B141

pub fn b142(&self) -> B142_R[src]

Bit 14 - B142

pub fn b143(&self) -> B143_R[src]

Bit 15 - B143

pub fn b144(&self) -> B144_R[src]

Bit 16 - B144

pub fn b145(&self) -> B145_R[src]

Bit 17 - B145

pub fn b146(&self) -> B146_R[src]

Bit 18 - B146

pub fn b147(&self) -> B147_R[src]

Bit 19 - B147

pub fn b148(&self) -> B148_R[src]

Bit 20 - B148

pub fn b149(&self) -> B149_R[src]

Bit 21 - B149

pub fn b150(&self) -> B150_R[src]

Bit 22 - B150

pub fn b151(&self) -> B151_R[src]

Bit 23 - B151

pub fn b152(&self) -> B152_R[src]

Bit 24 - B152

pub fn b153(&self) -> B153_R[src]

Bit 25 - B153

pub fn b154(&self) -> B154_R[src]

Bit 26 - B154

pub fn b155(&self) -> B155_R[src]

Bit 27 - B155

pub fn b156(&self) -> B156_R[src]

Bit 28 - B156

pub fn b157(&self) -> B157_R[src]

Bit 29 - B157

pub fn b158(&self) -> B158_R[src]

Bit 30 - B158

pub fn b159(&self) -> B159_R[src]

Bit 31 - B159

impl R<u32, Reg<u32, _MPCBB1_VCTR5>>[src]

pub fn b160(&self) -> B160_R[src]

Bit 0 - B160

pub fn b161(&self) -> B161_R[src]

Bit 1 - B161

pub fn b162(&self) -> B162_R[src]

Bit 2 - B162

pub fn b163(&self) -> B163_R[src]

Bit 3 - B163

pub fn b164(&self) -> B164_R[src]

Bit 4 - B164

pub fn b165(&self) -> B165_R[src]

Bit 5 - B165

pub fn b166(&self) -> B166_R[src]

Bit 6 - B166

pub fn b167(&self) -> B167_R[src]

Bit 7 - B167

pub fn b168(&self) -> B168_R[src]

Bit 8 - B168

pub fn b169(&self) -> B169_R[src]

Bit 9 - B169

pub fn b170(&self) -> B170_R[src]

Bit 10 - B170

pub fn b171(&self) -> B171_R[src]

Bit 11 - B171

pub fn b172(&self) -> B172_R[src]

Bit 12 - B172

pub fn b173(&self) -> B173_R[src]

Bit 13 - B173

pub fn b174(&self) -> B174_R[src]

Bit 14 - B174

pub fn b175(&self) -> B175_R[src]

Bit 15 - B175

pub fn b176(&self) -> B176_R[src]

Bit 16 - B176

pub fn b177(&self) -> B177_R[src]

Bit 17 - B177

pub fn b178(&self) -> B178_R[src]

Bit 18 - B178

pub fn b179(&self) -> B179_R[src]

Bit 19 - B179

pub fn b180(&self) -> B180_R[src]

Bit 20 - B180

pub fn b181(&self) -> B181_R[src]

Bit 21 - B181

pub fn b182(&self) -> B182_R[src]

Bit 22 - B182

pub fn b183(&self) -> B183_R[src]

Bit 23 - B183

pub fn b184(&self) -> B184_R[src]

Bit 24 - B184

pub fn b185(&self) -> B185_R[src]

Bit 25 - B185

pub fn b186(&self) -> B186_R[src]

Bit 26 - B186

pub fn b187(&self) -> B187_R[src]

Bit 27 - B187

pub fn b188(&self) -> B188_R[src]

Bit 28 - B188

pub fn b189(&self) -> B189_R[src]

Bit 29 - B189

pub fn b190(&self) -> B190_R[src]

Bit 30 - B190

pub fn b191(&self) -> B191_R[src]

Bit 31 - B191

impl R<u32, Reg<u32, _MPCBB1_VCTR6>>[src]

pub fn b192(&self) -> B192_R[src]

Bit 0 - B192

pub fn b193(&self) -> B193_R[src]

Bit 1 - B193

pub fn b194(&self) -> B194_R[src]

Bit 2 - B194

pub fn b195(&self) -> B195_R[src]

Bit 3 - B195

pub fn b196(&self) -> B196_R[src]

Bit 4 - B196

pub fn b197(&self) -> B197_R[src]

Bit 5 - B197

pub fn b198(&self) -> B198_R[src]

Bit 6 - B198

pub fn b199(&self) -> B199_R[src]

Bit 7 - B199

pub fn b200(&self) -> B200_R[src]

Bit 8 - B200

pub fn b201(&self) -> B201_R[src]

Bit 9 - B201

pub fn b202(&self) -> B202_R[src]

Bit 10 - B202

pub fn b203(&self) -> B203_R[src]

Bit 11 - B203

pub fn b204(&self) -> B204_R[src]

Bit 12 - B204

pub fn b205(&self) -> B205_R[src]

Bit 13 - B205

pub fn b206(&self) -> B206_R[src]

Bit 14 - B206

pub fn b207(&self) -> B207_R[src]

Bit 15 - B207

pub fn b208(&self) -> B208_R[src]

Bit 16 - B208

pub fn b209(&self) -> B209_R[src]

Bit 17 - B209

pub fn b210(&self) -> B210_R[src]

Bit 18 - B210

pub fn b211(&self) -> B211_R[src]

Bit 19 - B211

pub fn b212(&self) -> B212_R[src]

Bit 20 - B212

pub fn b213(&self) -> B213_R[src]

Bit 21 - B213

pub fn b214(&self) -> B214_R[src]

Bit 22 - B214

pub fn b215(&self) -> B215_R[src]

Bit 23 - B215

pub fn b216(&self) -> B216_R[src]

Bit 24 - B216

pub fn b217(&self) -> B217_R[src]

Bit 25 - B217

pub fn b218(&self) -> B218_R[src]

Bit 26 - B218

pub fn b219(&self) -> B219_R[src]

Bit 27 - B219

pub fn b220(&self) -> B220_R[src]

Bit 28 - B220

pub fn b221(&self) -> B221_R[src]

Bit 29 - B221

pub fn b222(&self) -> B222_R[src]

Bit 30 - B222

pub fn b223(&self) -> B223_R[src]

Bit 31 - B223

impl R<u32, Reg<u32, _MPCBB1_VCTR7>>[src]

pub fn b224(&self) -> B224_R[src]

Bit 0 - B224

pub fn b225(&self) -> B225_R[src]

Bit 1 - B225

pub fn b226(&self) -> B226_R[src]

Bit 2 - B226

pub fn b227(&self) -> B227_R[src]

Bit 3 - B227

pub fn b228(&self) -> B228_R[src]

Bit 4 - B228

pub fn b229(&self) -> B229_R[src]

Bit 5 - B229

pub fn b230(&self) -> B230_R[src]

Bit 6 - B230

pub fn b231(&self) -> B231_R[src]

Bit 7 - B231

pub fn b232(&self) -> B232_R[src]

Bit 8 - B232

pub fn b233(&self) -> B233_R[src]

Bit 9 - B233

pub fn b234(&self) -> B234_R[src]

Bit 10 - B234

pub fn b235(&self) -> B235_R[src]

Bit 11 - B235

pub fn b236(&self) -> B236_R[src]

Bit 12 - B236

pub fn b237(&self) -> B237_R[src]

Bit 13 - B237

pub fn b238(&self) -> B238_R[src]

Bit 14 - B238

pub fn b239(&self) -> B239_R[src]

Bit 15 - B239

pub fn b240(&self) -> B240_R[src]

Bit 16 - B240

pub fn b241(&self) -> B241_R[src]

Bit 17 - B241

pub fn b242(&self) -> B242_R[src]

Bit 18 - B242

pub fn b243(&self) -> B243_R[src]

Bit 19 - B243

pub fn b244(&self) -> B244_R[src]

Bit 20 - B244

pub fn b245(&self) -> B245_R[src]

Bit 21 - B245

pub fn b246(&self) -> B246_R[src]

Bit 22 - B246

pub fn b247(&self) -> B247_R[src]

Bit 23 - B247

pub fn b248(&self) -> B248_R[src]

Bit 24 - B248

pub fn b249(&self) -> B249_R[src]

Bit 25 - B249

pub fn b250(&self) -> B250_R[src]

Bit 26 - B250

pub fn b251(&self) -> B251_R[src]

Bit 27 - B251

pub fn b252(&self) -> B252_R[src]

Bit 28 - B252

pub fn b253(&self) -> B253_R[src]

Bit 29 - B253

pub fn b254(&self) -> B254_R[src]

Bit 30 - B254

pub fn b255(&self) -> B255_R[src]

Bit 31 - B255

impl R<u32, Reg<u32, _MPCBB1_VCTR8>>[src]

pub fn b256(&self) -> B256_R[src]

Bit 0 - B256

pub fn b257(&self) -> B257_R[src]

Bit 1 - B257

pub fn b258(&self) -> B258_R[src]

Bit 2 - B258

pub fn b259(&self) -> B259_R[src]

Bit 3 - B259

pub fn b260(&self) -> B260_R[src]

Bit 4 - B260

pub fn b261(&self) -> B261_R[src]

Bit 5 - B261

pub fn b262(&self) -> B262_R[src]

Bit 6 - B262

pub fn b263(&self) -> B263_R[src]

Bit 7 - B263

pub fn b264(&self) -> B264_R[src]

Bit 8 - B264

pub fn b265(&self) -> B265_R[src]

Bit 9 - B265

pub fn b266(&self) -> B266_R[src]

Bit 10 - B266

pub fn b267(&self) -> B267_R[src]

Bit 11 - B267

pub fn b268(&self) -> B268_R[src]

Bit 12 - B268

pub fn b269(&self) -> B269_R[src]

Bit 13 - B269

pub fn b270(&self) -> B270_R[src]

Bit 14 - B270

pub fn b271(&self) -> B271_R[src]

Bit 15 - B271

pub fn b272(&self) -> B272_R[src]

Bit 16 - B272

pub fn b273(&self) -> B273_R[src]

Bit 17 - B273

pub fn b274(&self) -> B274_R[src]

Bit 18 - B274

pub fn b275(&self) -> B275_R[src]

Bit 19 - B275

pub fn b276(&self) -> B276_R[src]

Bit 20 - B276

pub fn b277(&self) -> B277_R[src]

Bit 21 - B277

pub fn b278(&self) -> B278_R[src]

Bit 22 - B278

pub fn b279(&self) -> B279_R[src]

Bit 23 - B279

pub fn b280(&self) -> B280_R[src]

Bit 24 - B280

pub fn b281(&self) -> B281_R[src]

Bit 25 - B281

pub fn b282(&self) -> B282_R[src]

Bit 26 - B282

pub fn b283(&self) -> B283_R[src]

Bit 27 - B283

pub fn b284(&self) -> B284_R[src]

Bit 28 - B284

pub fn b285(&self) -> B285_R[src]

Bit 29 - B285

pub fn b286(&self) -> B286_R[src]

Bit 30 - B286

pub fn b287(&self) -> B287_R[src]

Bit 31 - B287

impl R<u32, Reg<u32, _MPCBB1_VCTR9>>[src]

pub fn b288(&self) -> B288_R[src]

Bit 0 - B288

pub fn b289(&self) -> B289_R[src]

Bit 1 - B289

pub fn b290(&self) -> B290_R[src]

Bit 2 - B290

pub fn b291(&self) -> B291_R[src]

Bit 3 - B291

pub fn b292(&self) -> B292_R[src]

Bit 4 - B292

pub fn b293(&self) -> B293_R[src]

Bit 5 - B293

pub fn b294(&self) -> B294_R[src]

Bit 6 - B294

pub fn b295(&self) -> B295_R[src]

Bit 7 - B295

pub fn b296(&self) -> B296_R[src]

Bit 8 - B296

pub fn b297(&self) -> B297_R[src]

Bit 9 - B297

pub fn b298(&self) -> B298_R[src]

Bit 10 - B298

pub fn b299(&self) -> B299_R[src]

Bit 11 - B299

pub fn b300(&self) -> B300_R[src]

Bit 12 - B300

pub fn b301(&self) -> B301_R[src]

Bit 13 - B301

pub fn b302(&self) -> B302_R[src]

Bit 14 - B302

pub fn b303(&self) -> B303_R[src]

Bit 15 - B303

pub fn b304(&self) -> B304_R[src]

Bit 16 - B304

pub fn b305(&self) -> B305_R[src]

Bit 17 - B305

pub fn b306(&self) -> B306_R[src]

Bit 18 - B306

pub fn b307(&self) -> B307_R[src]

Bit 19 - B307

pub fn b308(&self) -> B308_R[src]

Bit 20 - B308

pub fn b309(&self) -> B309_R[src]

Bit 21 - B309

pub fn b310(&self) -> B310_R[src]

Bit 22 - B310

pub fn b311(&self) -> B311_R[src]

Bit 23 - B311

pub fn b312(&self) -> B312_R[src]

Bit 24 - B312

pub fn b313(&self) -> B313_R[src]

Bit 25 - B313

pub fn b314(&self) -> B314_R[src]

Bit 26 - B314

pub fn b315(&self) -> B315_R[src]

Bit 27 - B315

pub fn b316(&self) -> B316_R[src]

Bit 28 - B316

pub fn b317(&self) -> B317_R[src]

Bit 29 - B317

pub fn b318(&self) -> B318_R[src]

Bit 30 - B318

pub fn b319(&self) -> B319_R[src]

Bit 31 - B319

impl R<u32, Reg<u32, _MPCBB1_VCTR10>>[src]

pub fn b320(&self) -> B320_R[src]

Bit 0 - B320

pub fn b321(&self) -> B321_R[src]

Bit 1 - B321

pub fn b322(&self) -> B322_R[src]

Bit 2 - B322

pub fn b323(&self) -> B323_R[src]

Bit 3 - B323

pub fn b324(&self) -> B324_R[src]

Bit 4 - B324

pub fn b325(&self) -> B325_R[src]

Bit 5 - B325

pub fn b326(&self) -> B326_R[src]

Bit 6 - B326

pub fn b327(&self) -> B327_R[src]

Bit 7 - B327

pub fn b328(&self) -> B328_R[src]

Bit 8 - B328

pub fn b329(&self) -> B329_R[src]

Bit 9 - B329

pub fn b330(&self) -> B330_R[src]

Bit 10 - B330

pub fn b331(&self) -> B331_R[src]

Bit 11 - B331

pub fn b332(&self) -> B332_R[src]

Bit 12 - B332

pub fn b333(&self) -> B333_R[src]

Bit 13 - B333

pub fn b334(&self) -> B334_R[src]

Bit 14 - B334

pub fn b335(&self) -> B335_R[src]

Bit 15 - B335

pub fn b336(&self) -> B336_R[src]

Bit 16 - B336

pub fn b337(&self) -> B337_R[src]

Bit 17 - B337

pub fn b338(&self) -> B338_R[src]

Bit 18 - B338

pub fn b339(&self) -> B339_R[src]

Bit 19 - B339

pub fn b340(&self) -> B340_R[src]

Bit 20 - B340

pub fn b341(&self) -> B341_R[src]

Bit 21 - B341

pub fn b342(&self) -> B342_R[src]

Bit 22 - B342

pub fn b343(&self) -> B343_R[src]

Bit 23 - B343

pub fn b344(&self) -> B344_R[src]

Bit 24 - B344

pub fn b345(&self) -> B345_R[src]

Bit 25 - B345

pub fn b346(&self) -> B346_R[src]

Bit 26 - B346

pub fn b347(&self) -> B347_R[src]

Bit 27 - B347

pub fn b348(&self) -> B348_R[src]

Bit 28 - B348

pub fn b349(&self) -> B349_R[src]

Bit 29 - B349

pub fn b350(&self) -> B350_R[src]

Bit 30 - B350

pub fn b351(&self) -> B351_R[src]

Bit 31 - B351

impl R<u32, Reg<u32, _MPCBB1_VCTR11>>[src]

pub fn b352(&self) -> B352_R[src]

Bit 0 - B352

pub fn b353(&self) -> B353_R[src]

Bit 1 - B353

pub fn b354(&self) -> B354_R[src]

Bit 2 - B354

pub fn b355(&self) -> B355_R[src]

Bit 3 - B355

pub fn b356(&self) -> B356_R[src]

Bit 4 - B356

pub fn b357(&self) -> B357_R[src]

Bit 5 - B357

pub fn b358(&self) -> B358_R[src]

Bit 6 - B358

pub fn b359(&self) -> B359_R[src]

Bit 7 - B359

pub fn b360(&self) -> B360_R[src]

Bit 8 - B360

pub fn b361(&self) -> B361_R[src]

Bit 9 - B361

pub fn b362(&self) -> B362_R[src]

Bit 10 - B362

pub fn b363(&self) -> B363_R[src]

Bit 11 - B363

pub fn b364(&self) -> B364_R[src]

Bit 12 - B364

pub fn b365(&self) -> B365_R[src]

Bit 13 - B365

pub fn b366(&self) -> B366_R[src]

Bit 14 - B366

pub fn b367(&self) -> B367_R[src]

Bit 15 - B367

pub fn b368(&self) -> B368_R[src]

Bit 16 - B368

pub fn b369(&self) -> B369_R[src]

Bit 17 - B369

pub fn b370(&self) -> B370_R[src]

Bit 18 - B370

pub fn b371(&self) -> B371_R[src]

Bit 19 - B371

pub fn b372(&self) -> B372_R[src]

Bit 20 - B372

pub fn b373(&self) -> B373_R[src]

Bit 21 - B373

pub fn b374(&self) -> B374_R[src]

Bit 22 - B374

pub fn b375(&self) -> B375_R[src]

Bit 23 - B375

pub fn b376(&self) -> B376_R[src]

Bit 24 - B376

pub fn b377(&self) -> B377_R[src]

Bit 25 - B377

pub fn b378(&self) -> B378_R[src]

Bit 26 - B378

pub fn b379(&self) -> B379_R[src]

Bit 27 - B379

pub fn b380(&self) -> B380_R[src]

Bit 28 - B380

pub fn b381(&self) -> B381_R[src]

Bit 29 - B381

pub fn b382(&self) -> B382_R[src]

Bit 30 - B382

pub fn b383(&self) -> B383_R[src]

Bit 31 - B383

impl R<u32, Reg<u32, _MPCBB1_VCTR12>>[src]

pub fn b384(&self) -> B384_R[src]

Bit 0 - B384

pub fn b385(&self) -> B385_R[src]

Bit 1 - B385

pub fn b386(&self) -> B386_R[src]

Bit 2 - B386

pub fn b387(&self) -> B387_R[src]

Bit 3 - B387

pub fn b388(&self) -> B388_R[src]

Bit 4 - B388

pub fn b389(&self) -> B389_R[src]

Bit 5 - B389

pub fn b390(&self) -> B390_R[src]

Bit 6 - B390

pub fn b391(&self) -> B391_R[src]

Bit 7 - B391

pub fn b392(&self) -> B392_R[src]

Bit 8 - B392

pub fn b393(&self) -> B393_R[src]

Bit 9 - B393

pub fn b394(&self) -> B394_R[src]

Bit 10 - B394

pub fn b395(&self) -> B395_R[src]

Bit 11 - B395

pub fn b396(&self) -> B396_R[src]

Bit 12 - B396

pub fn b397(&self) -> B397_R[src]

Bit 13 - B397

pub fn b398(&self) -> B398_R[src]

Bit 14 - B398

pub fn b399(&self) -> B399_R[src]

Bit 15 - B399

pub fn b400(&self) -> B400_R[src]

Bit 16 - B400

pub fn b401(&self) -> B401_R[src]

Bit 17 - B401

pub fn b402(&self) -> B402_R[src]

Bit 18 - B402

pub fn b403(&self) -> B403_R[src]

Bit 19 - B403

pub fn b404(&self) -> B404_R[src]

Bit 20 - B404

pub fn b405(&self) -> B405_R[src]

Bit 21 - B405

pub fn b406(&self) -> B406_R[src]

Bit 22 - B406

pub fn b407(&self) -> B407_R[src]

Bit 23 - B407

pub fn b408(&self) -> B408_R[src]

Bit 24 - B408

pub fn b409(&self) -> B409_R[src]

Bit 25 - B409

pub fn b410(&self) -> B410_R[src]

Bit 26 - B410

pub fn b411(&self) -> B411_R[src]

Bit 27 - B411

pub fn b412(&self) -> B412_R[src]

Bit 28 - B412

pub fn b413(&self) -> B413_R[src]

Bit 29 - B413

pub fn b414(&self) -> B414_R[src]

Bit 30 - B414

pub fn b415(&self) -> B415_R[src]

Bit 31 - B415

impl R<u32, Reg<u32, _MPCBB1_VCTR13>>[src]

pub fn b416(&self) -> B416_R[src]

Bit 0 - B416

pub fn b417(&self) -> B417_R[src]

Bit 1 - B417

pub fn b418(&self) -> B418_R[src]

Bit 2 - B418

pub fn b419(&self) -> B419_R[src]

Bit 3 - B419

pub fn b420(&self) -> B420_R[src]

Bit 4 - B420

pub fn b421(&self) -> B421_R[src]

Bit 5 - B421

pub fn b422(&self) -> B422_R[src]

Bit 6 - B422

pub fn b423(&self) -> B423_R[src]

Bit 7 - B423

pub fn b424(&self) -> B424_R[src]

Bit 8 - B424

pub fn b425(&self) -> B425_R[src]

Bit 9 - B425

pub fn b426(&self) -> B426_R[src]

Bit 10 - B426

pub fn b427(&self) -> B427_R[src]

Bit 11 - B427

pub fn b428(&self) -> B428_R[src]

Bit 12 - B428

pub fn b429(&self) -> B429_R[src]

Bit 13 - B429

pub fn b430(&self) -> B430_R[src]

Bit 14 - B430

pub fn b431(&self) -> B431_R[src]

Bit 15 - B431

pub fn b432(&self) -> B432_R[src]

Bit 16 - B432

pub fn b433(&self) -> B433_R[src]

Bit 17 - B433

pub fn b434(&self) -> B434_R[src]

Bit 18 - B434

pub fn b435(&self) -> B435_R[src]

Bit 19 - B435

pub fn b436(&self) -> B436_R[src]

Bit 20 - B436

pub fn b437(&self) -> B437_R[src]

Bit 21 - B437

pub fn b438(&self) -> B438_R[src]

Bit 22 - B438

pub fn b439(&self) -> B439_R[src]

Bit 23 - B439

pub fn b440(&self) -> B440_R[src]

Bit 24 - B440

pub fn b441(&self) -> B441_R[src]

Bit 25 - B441

pub fn b442(&self) -> B442_R[src]

Bit 26 - B442

pub fn b443(&self) -> B443_R[src]

Bit 27 - B443

pub fn b444(&self) -> B444_R[src]

Bit 28 - B444

pub fn b445(&self) -> B445_R[src]

Bit 29 - B445

pub fn b446(&self) -> B446_R[src]

Bit 30 - B446

pub fn b447(&self) -> B447_R[src]

Bit 31 - B447

impl R<u32, Reg<u32, _MPCBB1_VCTR14>>[src]

pub fn b448(&self) -> B448_R[src]

Bit 0 - B448

pub fn b449(&self) -> B449_R[src]

Bit 1 - B449

pub fn b450(&self) -> B450_R[src]

Bit 2 - B450

pub fn b451(&self) -> B451_R[src]

Bit 3 - B451

pub fn b452(&self) -> B452_R[src]

Bit 4 - B452

pub fn b453(&self) -> B453_R[src]

Bit 5 - B453

pub fn b454(&self) -> B454_R[src]

Bit 6 - B454

pub fn b455(&self) -> B455_R[src]

Bit 7 - B455

pub fn b456(&self) -> B456_R[src]

Bit 8 - B456

pub fn b457(&self) -> B457_R[src]

Bit 9 - B457

pub fn b458(&self) -> B458_R[src]

Bit 10 - B458

pub fn b459(&self) -> B459_R[src]

Bit 11 - B459

pub fn b460(&self) -> B460_R[src]

Bit 12 - B460

pub fn b461(&self) -> B461_R[src]

Bit 13 - B461

pub fn b462(&self) -> B462_R[src]

Bit 14 - B462

pub fn b463(&self) -> B463_R[src]

Bit 15 - B463

pub fn b464(&self) -> B464_R[src]

Bit 16 - B464

pub fn b465(&self) -> B465_R[src]

Bit 17 - B465

pub fn b466(&self) -> B466_R[src]

Bit 18 - B466

pub fn b467(&self) -> B467_R[src]

Bit 19 - B467

pub fn b468(&self) -> B468_R[src]

Bit 20 - B468

pub fn b469(&self) -> B469_R[src]

Bit 21 - B469

pub fn b470(&self) -> B470_R[src]

Bit 22 - B470

pub fn b471(&self) -> B471_R[src]

Bit 23 - B471

pub fn b472(&self) -> B472_R[src]

Bit 24 - B472

pub fn b473(&self) -> B473_R[src]

Bit 25 - B473

pub fn b474(&self) -> B474_R[src]

Bit 26 - B474

pub fn b475(&self) -> B475_R[src]

Bit 27 - B475

pub fn b476(&self) -> B476_R[src]

Bit 28 - B476

pub fn b477(&self) -> B477_R[src]

Bit 29 - B477

pub fn b478(&self) -> B478_R[src]

Bit 30 - B478

pub fn b479(&self) -> B479_R[src]

Bit 31 - B479

impl R<u32, Reg<u32, _MPCBB1_VCTR15>>[src]

pub fn b480(&self) -> B480_R[src]

Bit 0 - B480

pub fn b481(&self) -> B481_R[src]

Bit 1 - B481

pub fn b482(&self) -> B482_R[src]

Bit 2 - B482

pub fn b483(&self) -> B483_R[src]

Bit 3 - B483

pub fn b484(&self) -> B484_R[src]

Bit 4 - B484

pub fn b485(&self) -> B485_R[src]

Bit 5 - B485

pub fn b486(&self) -> B486_R[src]

Bit 6 - B486

pub fn b487(&self) -> B487_R[src]

Bit 7 - B487

pub fn b488(&self) -> B488_R[src]

Bit 8 - B488

pub fn b489(&self) -> B489_R[src]

Bit 9 - B489

pub fn b490(&self) -> B490_R[src]

Bit 10 - B490

pub fn b491(&self) -> B491_R[src]

Bit 11 - B491

pub fn b492(&self) -> B492_R[src]

Bit 12 - B492

pub fn b493(&self) -> B493_R[src]

Bit 13 - B493

pub fn b494(&self) -> B494_R[src]

Bit 14 - B494

pub fn b495(&self) -> B495_R[src]

Bit 15 - B495

pub fn b496(&self) -> B496_R[src]

Bit 16 - B496

pub fn b497(&self) -> B497_R[src]

Bit 17 - B497

pub fn b498(&self) -> B498_R[src]

Bit 18 - B498

pub fn b499(&self) -> B499_R[src]

Bit 19 - B499

pub fn b500(&self) -> B500_R[src]

Bit 20 - B500

pub fn b501(&self) -> B501_R[src]

Bit 21 - B501

pub fn b502(&self) -> B502_R[src]

Bit 22 - B502

pub fn b503(&self) -> B503_R[src]

Bit 23 - B503

pub fn b504(&self) -> B504_R[src]

Bit 24 - B504

pub fn b505(&self) -> B505_R[src]

Bit 25 - B505

pub fn b506(&self) -> B506_R[src]

Bit 26 - B506

pub fn b507(&self) -> B507_R[src]

Bit 27 - B507

pub fn b508(&self) -> B508_R[src]

Bit 28 - B508

pub fn b509(&self) -> B509_R[src]

Bit 29 - B509

pub fn b510(&self) -> B510_R[src]

Bit 30 - B510

pub fn b511(&self) -> B511_R[src]

Bit 31 - B511

impl R<u32, Reg<u32, _MPCBB1_VCTR16>>[src]

pub fn b512(&self) -> B512_R[src]

Bit 0 - B512

pub fn b513(&self) -> B513_R[src]

Bit 1 - B513

pub fn b514(&self) -> B514_R[src]

Bit 2 - B514

pub fn b515(&self) -> B515_R[src]

Bit 3 - B515

pub fn b516(&self) -> B516_R[src]

Bit 4 - B516

pub fn b517(&self) -> B517_R[src]

Bit 5 - B517

pub fn b518(&self) -> B518_R[src]

Bit 6 - B518

pub fn b519(&self) -> B519_R[src]

Bit 7 - B519

pub fn b520(&self) -> B520_R[src]

Bit 8 - B520

pub fn b521(&self) -> B521_R[src]

Bit 9 - B521

pub fn b522(&self) -> B522_R[src]

Bit 10 - B522

pub fn b523(&self) -> B523_R[src]

Bit 11 - B523

pub fn b524(&self) -> B524_R[src]

Bit 12 - B524

pub fn b525(&self) -> B525_R[src]

Bit 13 - B525

pub fn b526(&self) -> B526_R[src]

Bit 14 - B526

pub fn b527(&self) -> B527_R[src]

Bit 15 - B527

pub fn b528(&self) -> B528_R[src]

Bit 16 - B528

pub fn b529(&self) -> B529_R[src]

Bit 17 - B529

pub fn b530(&self) -> B530_R[src]

Bit 18 - B530

pub fn b531(&self) -> B531_R[src]

Bit 19 - B531

pub fn b532(&self) -> B532_R[src]

Bit 20 - B532

pub fn b533(&self) -> B533_R[src]

Bit 21 - B533

pub fn b534(&self) -> B534_R[src]

Bit 22 - B534

pub fn b535(&self) -> B535_R[src]

Bit 23 - B535

pub fn b536(&self) -> B536_R[src]

Bit 24 - B536

pub fn b537(&self) -> B537_R[src]

Bit 25 - B537

pub fn b538(&self) -> B538_R[src]

Bit 26 - B538

pub fn b539(&self) -> B539_R[src]

Bit 27 - B539

pub fn b540(&self) -> B540_R[src]

Bit 28 - B540

pub fn b541(&self) -> B541_R[src]

Bit 29 - B541

pub fn b542(&self) -> B542_R[src]

Bit 30 - B542

pub fn b543(&self) -> B543_R[src]

Bit 31 - B543

impl R<u32, Reg<u32, _MPCBB1_VCTR17>>[src]

pub fn b544(&self) -> B544_R[src]

Bit 0 - B544

pub fn b545(&self) -> B545_R[src]

Bit 1 - B545

pub fn b546(&self) -> B546_R[src]

Bit 2 - B546

pub fn b547(&self) -> B547_R[src]

Bit 3 - B547

pub fn b548(&self) -> B548_R[src]

Bit 4 - B548

pub fn b549(&self) -> B549_R[src]

Bit 5 - B549

pub fn b550(&self) -> B550_R[src]

Bit 6 - B550

pub fn b551(&self) -> B551_R[src]

Bit 7 - B551

pub fn b552(&self) -> B552_R[src]

Bit 8 - B552

pub fn b553(&self) -> B553_R[src]

Bit 9 - B553

pub fn b554(&self) -> B554_R[src]

Bit 10 - B554

pub fn b555(&self) -> B555_R[src]

Bit 11 - B555

pub fn b556(&self) -> B556_R[src]

Bit 12 - B556

pub fn b557(&self) -> B557_R[src]

Bit 13 - B557

pub fn b558(&self) -> B558_R[src]

Bit 14 - B558

pub fn b559(&self) -> B559_R[src]

Bit 15 - B559

pub fn b560(&self) -> B560_R[src]

Bit 16 - B560

pub fn b561(&self) -> B561_R[src]

Bit 17 - B561

pub fn b562(&self) -> B562_R[src]

Bit 18 - B562

pub fn b563(&self) -> B563_R[src]

Bit 19 - B563

pub fn b564(&self) -> B564_R[src]

Bit 20 - B564

pub fn b565(&self) -> B565_R[src]

Bit 21 - B565

pub fn b566(&self) -> B566_R[src]

Bit 22 - B566

pub fn b567(&self) -> B567_R[src]

Bit 23 - B567

pub fn b568(&self) -> B568_R[src]

Bit 24 - B568

pub fn b569(&self) -> B569_R[src]

Bit 25 - B569

pub fn b570(&self) -> B570_R[src]

Bit 26 - B570

pub fn b571(&self) -> B571_R[src]

Bit 27 - B571

pub fn b572(&self) -> B572_R[src]

Bit 28 - B572

pub fn b573(&self) -> B573_R[src]

Bit 29 - B573

pub fn b574(&self) -> B574_R[src]

Bit 30 - B574

pub fn b575(&self) -> B575_R[src]

Bit 31 - B575

impl R<u32, Reg<u32, _MPCBB1_VCTR18>>[src]

pub fn b576(&self) -> B576_R[src]

Bit 0 - B576

pub fn b577(&self) -> B577_R[src]

Bit 1 - B577

pub fn b578(&self) -> B578_R[src]

Bit 2 - B578

pub fn b579(&self) -> B579_R[src]

Bit 3 - B579

pub fn b580(&self) -> B580_R[src]

Bit 4 - B580

pub fn b581(&self) -> B581_R[src]

Bit 5 - B581

pub fn b582(&self) -> B582_R[src]

Bit 6 - B582

pub fn b583(&self) -> B583_R[src]

Bit 7 - B583

pub fn b584(&self) -> B584_R[src]

Bit 8 - B584

pub fn b585(&self) -> B585_R[src]

Bit 9 - B585

pub fn b586(&self) -> B586_R[src]

Bit 10 - B586

pub fn b587(&self) -> B587_R[src]

Bit 11 - B587

pub fn b588(&self) -> B588_R[src]

Bit 12 - B588

pub fn b589(&self) -> B589_R[src]

Bit 13 - B589

pub fn b590(&self) -> B590_R[src]

Bit 14 - B590

pub fn b591(&self) -> B591_R[src]

Bit 15 - B591

pub fn b592(&self) -> B592_R[src]

Bit 16 - B592

pub fn b593(&self) -> B593_R[src]

Bit 17 - B593

pub fn b594(&self) -> B594_R[src]

Bit 18 - B594

pub fn b595(&self) -> B595_R[src]

Bit 19 - B595

pub fn b596(&self) -> B596_R[src]

Bit 20 - B596

pub fn b597(&self) -> B597_R[src]

Bit 21 - B597

pub fn b598(&self) -> B598_R[src]

Bit 22 - B598

pub fn b599(&self) -> B599_R[src]

Bit 23 - B599

pub fn b600(&self) -> B600_R[src]

Bit 24 - B600

pub fn b601(&self) -> B601_R[src]

Bit 25 - B601

pub fn b602(&self) -> B602_R[src]

Bit 26 - B602

pub fn b603(&self) -> B603_R[src]

Bit 27 - B603

pub fn b604(&self) -> B604_R[src]

Bit 28 - B604

pub fn b605(&self) -> B605_R[src]

Bit 29 - B605

pub fn b606(&self) -> B606_R[src]

Bit 30 - B606

pub fn b607(&self) -> B607_R[src]

Bit 31 - B607

impl R<u32, Reg<u32, _MPCBB1_VCTR19>>[src]

pub fn b608(&self) -> B608_R[src]

Bit 0 - B608

pub fn b609(&self) -> B609_R[src]

Bit 1 - B609

pub fn b610(&self) -> B610_R[src]

Bit 2 - B610

pub fn b611(&self) -> B611_R[src]

Bit 3 - B611

pub fn b612(&self) -> B612_R[src]

Bit 4 - B612

pub fn b613(&self) -> B613_R[src]

Bit 5 - B613

pub fn b614(&self) -> B614_R[src]

Bit 6 - B614

pub fn b615(&self) -> B615_R[src]

Bit 7 - B615

pub fn b616(&self) -> B616_R[src]

Bit 8 - B616

pub fn b617(&self) -> B617_R[src]

Bit 9 - B617

pub fn b618(&self) -> B618_R[src]

Bit 10 - B618

pub fn b619(&self) -> B619_R[src]

Bit 11 - B619

pub fn b620(&self) -> B620_R[src]

Bit 12 - B620

pub fn b621(&self) -> B621_R[src]

Bit 13 - B621

pub fn b622(&self) -> B622_R[src]

Bit 14 - B622

pub fn b623(&self) -> B623_R[src]

Bit 15 - B623

pub fn b624(&self) -> B624_R[src]

Bit 16 - B624

pub fn b625(&self) -> B625_R[src]

Bit 17 - B625

pub fn b626(&self) -> B626_R[src]

Bit 18 - B626

pub fn b627(&self) -> B627_R[src]

Bit 19 - B627

pub fn b628(&self) -> B628_R[src]

Bit 20 - B628

pub fn b629(&self) -> B629_R[src]

Bit 21 - B629

pub fn b630(&self) -> B630_R[src]

Bit 22 - B630

pub fn b631(&self) -> B631_R[src]

Bit 23 - B631

pub fn b632(&self) -> B632_R[src]

Bit 24 - B632

pub fn b633(&self) -> B633_R[src]

Bit 25 - B633

pub fn b634(&self) -> B634_R[src]

Bit 26 - B634

pub fn b635(&self) -> B635_R[src]

Bit 27 - B635

pub fn b636(&self) -> B636_R[src]

Bit 28 - B636

pub fn b637(&self) -> B637_R[src]

Bit 29 - B637

pub fn b638(&self) -> B638_R[src]

Bit 30 - B638

pub fn b639(&self) -> B639_R[src]

Bit 31 - B639

impl R<u32, Reg<u32, _MPCBB1_VCTR20>>[src]

pub fn b640(&self) -> B640_R[src]

Bit 0 - B640

pub fn b641(&self) -> B641_R[src]

Bit 1 - B641

pub fn b642(&self) -> B642_R[src]

Bit 2 - B642

pub fn b643(&self) -> B643_R[src]

Bit 3 - B643

pub fn b644(&self) -> B644_R[src]

Bit 4 - B644

pub fn b645(&self) -> B645_R[src]

Bit 5 - B645

pub fn b646(&self) -> B646_R[src]

Bit 6 - B646

pub fn b647(&self) -> B647_R[src]

Bit 7 - B647

pub fn b648(&self) -> B648_R[src]

Bit 8 - B648

pub fn b649(&self) -> B649_R[src]

Bit 9 - B649

pub fn b650(&self) -> B650_R[src]

Bit 10 - B650

pub fn b651(&self) -> B651_R[src]

Bit 11 - B651

pub fn b652(&self) -> B652_R[src]

Bit 12 - B652

pub fn b653(&self) -> B653_R[src]

Bit 13 - B653

pub fn b654(&self) -> B654_R[src]

Bit 14 - B654

pub fn b655(&self) -> B655_R[src]

Bit 15 - B655

pub fn b656(&self) -> B656_R[src]

Bit 16 - B656

pub fn b657(&self) -> B657_R[src]

Bit 17 - B657

pub fn b658(&self) -> B658_R[src]

Bit 18 - B658

pub fn b659(&self) -> B659_R[src]

Bit 19 - B659

pub fn b660(&self) -> B660_R[src]

Bit 20 - B660

pub fn b661(&self) -> B661_R[src]

Bit 21 - B661

pub fn b662(&self) -> B662_R[src]

Bit 22 - B662

pub fn b663(&self) -> B663_R[src]

Bit 23 - B663

pub fn b664(&self) -> B664_R[src]

Bit 24 - B664

pub fn b665(&self) -> B665_R[src]

Bit 25 - B665

pub fn b666(&self) -> B666_R[src]

Bit 26 - B666

pub fn b667(&self) -> B667_R[src]

Bit 27 - B667

pub fn b668(&self) -> B668_R[src]

Bit 28 - B668

pub fn b669(&self) -> B669_R[src]

Bit 29 - B669

pub fn b670(&self) -> B670_R[src]

Bit 30 - B670

pub fn b671(&self) -> B671_R[src]

Bit 31 - B671

impl R<u32, Reg<u32, _MPCBB1_VCTR21>>[src]

pub fn b672(&self) -> B672_R[src]

Bit 0 - B672

pub fn b673(&self) -> B673_R[src]

Bit 1 - B673

pub fn b674(&self) -> B674_R[src]

Bit 2 - B674

pub fn b675(&self) -> B675_R[src]

Bit 3 - B675

pub fn b676(&self) -> B676_R[src]

Bit 4 - B676

pub fn b677(&self) -> B677_R[src]

Bit 5 - B677

pub fn b678(&self) -> B678_R[src]

Bit 6 - B678

pub fn b679(&self) -> B679_R[src]

Bit 7 - B679

pub fn b680(&self) -> B680_R[src]

Bit 8 - B680

pub fn b681(&self) -> B681_R[src]

Bit 9 - B681

pub fn b682(&self) -> B682_R[src]

Bit 10 - B682

pub fn b683(&self) -> B683_R[src]

Bit 11 - B683

pub fn b684(&self) -> B684_R[src]

Bit 12 - B684

pub fn b685(&self) -> B685_R[src]

Bit 13 - B685

pub fn b686(&self) -> B686_R[src]

Bit 14 - B686

pub fn b687(&self) -> B687_R[src]

Bit 15 - B687

pub fn b688(&self) -> B688_R[src]

Bit 16 - B688

pub fn b689(&self) -> B689_R[src]

Bit 17 - B689

pub fn b690(&self) -> B690_R[src]

Bit 18 - B690

pub fn b691(&self) -> B691_R[src]

Bit 19 - B691

pub fn b692(&self) -> B692_R[src]

Bit 20 - B692

pub fn b693(&self) -> B693_R[src]

Bit 21 - B693

pub fn b694(&self) -> B694_R[src]

Bit 22 - B694

pub fn b695(&self) -> B695_R[src]

Bit 23 - B695

pub fn b696(&self) -> B696_R[src]

Bit 24 - B696

pub fn b697(&self) -> B697_R[src]

Bit 25 - B697

pub fn b698(&self) -> B698_R[src]

Bit 26 - B698

pub fn b699(&self) -> B699_R[src]

Bit 27 - B699

pub fn b700(&self) -> B700_R[src]

Bit 28 - B700

pub fn b701(&self) -> B701_R[src]

Bit 29 - B701

pub fn b702(&self) -> B702_R[src]

Bit 30 - B702

pub fn b703(&self) -> B703_R[src]

Bit 31 - B703

impl R<u32, Reg<u32, _MPCBB1_VCTR22>>[src]

pub fn b704(&self) -> B704_R[src]

Bit 0 - B704

pub fn b705(&self) -> B705_R[src]

Bit 1 - B705

pub fn b706(&self) -> B706_R[src]

Bit 2 - B706

pub fn b707(&self) -> B707_R[src]

Bit 3 - B707

pub fn b708(&self) -> B708_R[src]

Bit 4 - B708

pub fn b709(&self) -> B709_R[src]

Bit 5 - B709

pub fn b710(&self) -> B710_R[src]

Bit 6 - B710

pub fn b711(&self) -> B711_R[src]

Bit 7 - B711

pub fn b712(&self) -> B712_R[src]

Bit 8 - B712

pub fn b713(&self) -> B713_R[src]

Bit 9 - B713

pub fn b714(&self) -> B714_R[src]

Bit 10 - B714

pub fn b715(&self) -> B715_R[src]

Bit 11 - B715

pub fn b716(&self) -> B716_R[src]

Bit 12 - B716

pub fn b717(&self) -> B717_R[src]

Bit 13 - B717

pub fn b718(&self) -> B718_R[src]

Bit 14 - B718

pub fn b719(&self) -> B719_R[src]

Bit 15 - B719

pub fn b720(&self) -> B720_R[src]

Bit 16 - B720

pub fn b721(&self) -> B721_R[src]

Bit 17 - B721

pub fn b722(&self) -> B722_R[src]

Bit 18 - B722

pub fn b723(&self) -> B723_R[src]

Bit 19 - B723

pub fn b724(&self) -> B724_R[src]

Bit 20 - B724

pub fn b725(&self) -> B725_R[src]

Bit 21 - B725

pub fn b726(&self) -> B726_R[src]

Bit 22 - B726

pub fn b727(&self) -> B727_R[src]

Bit 23 - B727

pub fn b728(&self) -> B728_R[src]

Bit 24 - B728

pub fn b729(&self) -> B729_R[src]

Bit 25 - B729

pub fn b730(&self) -> B730_R[src]

Bit 26 - B730

pub fn b731(&self) -> B731_R[src]

Bit 27 - B731

pub fn b732(&self) -> B732_R[src]

Bit 28 - B732

pub fn b733(&self) -> B733_R[src]

Bit 29 - B733

pub fn b734(&self) -> B734_R[src]

Bit 30 - B734

pub fn b735(&self) -> B735_R[src]

Bit 31 - B735

impl R<u32, Reg<u32, _MPCBB1_VCTR23>>[src]

pub fn b736(&self) -> B736_R[src]

Bit 0 - B736

pub fn b737(&self) -> B737_R[src]

Bit 1 - B737

pub fn b738(&self) -> B738_R[src]

Bit 2 - B738

pub fn b739(&self) -> B739_R[src]

Bit 3 - B739

pub fn b740(&self) -> B740_R[src]

Bit 4 - B740

pub fn b741(&self) -> B741_R[src]

Bit 5 - B741

pub fn b742(&self) -> B742_R[src]

Bit 6 - B742

pub fn b743(&self) -> B743_R[src]

Bit 7 - B743

pub fn b744(&self) -> B744_R[src]

Bit 8 - B744

pub fn b745(&self) -> B745_R[src]

Bit 9 - B745

pub fn b746(&self) -> B746_R[src]

Bit 10 - B746

pub fn b747(&self) -> B747_R[src]

Bit 11 - B747

pub fn b748(&self) -> B748_R[src]

Bit 12 - B748

pub fn b749(&self) -> B749_R[src]

Bit 13 - B749

pub fn b750(&self) -> B750_R[src]

Bit 14 - B750

pub fn b751(&self) -> B751_R[src]

Bit 15 - B751

pub fn b752(&self) -> B752_R[src]

Bit 16 - B752

pub fn b753(&self) -> B753_R[src]

Bit 17 - B753

pub fn b754(&self) -> B754_R[src]

Bit 18 - B754

pub fn b755(&self) -> B755_R[src]

Bit 19 - B755

pub fn b756(&self) -> B756_R[src]

Bit 20 - B756

pub fn b757(&self) -> B757_R[src]

Bit 21 - B757

pub fn b758(&self) -> B758_R[src]

Bit 22 - B758

pub fn b759(&self) -> B759_R[src]

Bit 23 - B759

pub fn b760(&self) -> B760_R[src]

Bit 24 - B760

pub fn b761(&self) -> B761_R[src]

Bit 25 - B761

pub fn b762(&self) -> B762_R[src]

Bit 26 - B762

pub fn b763(&self) -> B763_R[src]

Bit 27 - B763

pub fn b764(&self) -> B764_R[src]

Bit 28 - B764

pub fn b765(&self) -> B765_R[src]

Bit 29 - B765

pub fn b766(&self) -> B766_R[src]

Bit 30 - B766

pub fn b767(&self) -> B767_R[src]

Bit 31 - B767

impl R<u32, Reg<u32, _MPCBB1_VCTR24>>[src]

pub fn b768(&self) -> B768_R[src]

Bit 0 - B768

pub fn b769(&self) -> B769_R[src]

Bit 1 - B769

pub fn b770(&self) -> B770_R[src]

Bit 2 - B770

pub fn b771(&self) -> B771_R[src]

Bit 3 - B771

pub fn b772(&self) -> B772_R[src]

Bit 4 - B772

pub fn b773(&self) -> B773_R[src]

Bit 5 - B773

pub fn b774(&self) -> B774_R[src]

Bit 6 - B774

pub fn b775(&self) -> B775_R[src]

Bit 7 - B775

pub fn b776(&self) -> B776_R[src]

Bit 8 - B776

pub fn b777(&self) -> B777_R[src]

Bit 9 - B777

pub fn b778(&self) -> B778_R[src]

Bit 10 - B778

pub fn b779(&self) -> B779_R[src]

Bit 11 - B779

pub fn b780(&self) -> B780_R[src]

Bit 12 - B780

pub fn b781(&self) -> B781_R[src]

Bit 13 - B781

pub fn b782(&self) -> B782_R[src]

Bit 14 - B782

pub fn b783(&self) -> B783_R[src]

Bit 15 - B783

pub fn b784(&self) -> B784_R[src]

Bit 16 - B784

pub fn b785(&self) -> B785_R[src]

Bit 17 - B785

pub fn b786(&self) -> B786_R[src]

Bit 18 - B786

pub fn b787(&self) -> B787_R[src]

Bit 19 - B787

pub fn b788(&self) -> B788_R[src]

Bit 20 - B788

pub fn b789(&self) -> B789_R[src]

Bit 21 - B789

pub fn b790(&self) -> B790_R[src]

Bit 22 - B790

pub fn b791(&self) -> B791_R[src]

Bit 23 - B791

pub fn b792(&self) -> B792_R[src]

Bit 24 - B792

pub fn b793(&self) -> B793_R[src]

Bit 25 - B793

pub fn b794(&self) -> B794_R[src]

Bit 26 - B794

pub fn b795(&self) -> B795_R[src]

Bit 27 - B795

pub fn b796(&self) -> B796_R[src]

Bit 28 - B796

pub fn b797(&self) -> B797_R[src]

Bit 29 - B797

pub fn b798(&self) -> B798_R[src]

Bit 30 - B798

pub fn b799(&self) -> B799_R[src]

Bit 31 - B799

impl R<u32, Reg<u32, _MPCBB1_VCTR25>>[src]

pub fn b800(&self) -> B800_R[src]

Bit 0 - B800

pub fn b801(&self) -> B801_R[src]

Bit 1 - B801

pub fn b802(&self) -> B802_R[src]

Bit 2 - B802

pub fn b803(&self) -> B803_R[src]

Bit 3 - B803

pub fn b804(&self) -> B804_R[src]

Bit 4 - B804

pub fn b805(&self) -> B805_R[src]

Bit 5 - B805

pub fn b806(&self) -> B806_R[src]

Bit 6 - B806

pub fn b807(&self) -> B807_R[src]

Bit 7 - B807

pub fn b808(&self) -> B808_R[src]

Bit 8 - B808

pub fn b809(&self) -> B809_R[src]

Bit 9 - B809

pub fn b810(&self) -> B810_R[src]

Bit 10 - B810

pub fn b811(&self) -> B811_R[src]

Bit 11 - B811

pub fn b812(&self) -> B812_R[src]

Bit 12 - B812

pub fn b813(&self) -> B813_R[src]

Bit 13 - B813

pub fn b814(&self) -> B814_R[src]

Bit 14 - B814

pub fn b815(&self) -> B815_R[src]

Bit 15 - B815

pub fn b816(&self) -> B816_R[src]

Bit 16 - B816

pub fn b817(&self) -> B817_R[src]

Bit 17 - B817

pub fn b818(&self) -> B818_R[src]

Bit 18 - B818

pub fn b819(&self) -> B819_R[src]

Bit 19 - B819

pub fn b820(&self) -> B820_R[src]

Bit 20 - B820

pub fn b821(&self) -> B821_R[src]

Bit 21 - B821

pub fn b822(&self) -> B822_R[src]

Bit 22 - B822

pub fn b823(&self) -> B823_R[src]

Bit 23 - B823

pub fn b824(&self) -> B824_R[src]

Bit 24 - B824

pub fn b825(&self) -> B825_R[src]

Bit 25 - B825

pub fn b826(&self) -> B826_R[src]

Bit 26 - B826

pub fn b827(&self) -> B827_R[src]

Bit 27 - B827

pub fn b828(&self) -> B828_R[src]

Bit 28 - B828

pub fn b829(&self) -> B829_R[src]

Bit 29 - B829

pub fn b830(&self) -> B830_R[src]

Bit 30 - B830

pub fn b831(&self) -> B831_R[src]

Bit 31 - B831

impl R<u32, Reg<u32, _MPCBB1_VCTR26>>[src]

pub fn b832(&self) -> B832_R[src]

Bit 0 - B832

pub fn b833(&self) -> B833_R[src]

Bit 1 - B833

pub fn b834(&self) -> B834_R[src]

Bit 2 - B834

pub fn b835(&self) -> B835_R[src]

Bit 3 - B835

pub fn b836(&self) -> B836_R[src]

Bit 4 - B836

pub fn b837(&self) -> B837_R[src]

Bit 5 - B837

pub fn b838(&self) -> B838_R[src]

Bit 6 - B838

pub fn b839(&self) -> B839_R[src]

Bit 7 - B839

pub fn b840(&self) -> B840_R[src]

Bit 8 - B840

pub fn b841(&self) -> B841_R[src]

Bit 9 - B841

pub fn b842(&self) -> B842_R[src]

Bit 10 - B842

pub fn b843(&self) -> B843_R[src]

Bit 11 - B843

pub fn b844(&self) -> B844_R[src]

Bit 12 - B844

pub fn b845(&self) -> B845_R[src]

Bit 13 - B845

pub fn b846(&self) -> B846_R[src]

Bit 14 - B846

pub fn b847(&self) -> B847_R[src]

Bit 15 - B847

pub fn b848(&self) -> B848_R[src]

Bit 16 - B848

pub fn b849(&self) -> B849_R[src]

Bit 17 - B849

pub fn b850(&self) -> B850_R[src]

Bit 18 - B850

pub fn b851(&self) -> B851_R[src]

Bit 19 - B851

pub fn b852(&self) -> B852_R[src]

Bit 20 - B852

pub fn b853(&self) -> B853_R[src]

Bit 21 - B853

pub fn b854(&self) -> B854_R[src]

Bit 22 - B854

pub fn b855(&self) -> B855_R[src]

Bit 23 - B855

pub fn b856(&self) -> B856_R[src]

Bit 24 - B856

pub fn b857(&self) -> B857_R[src]

Bit 25 - B857

pub fn b858(&self) -> B858_R[src]

Bit 26 - B858

pub fn b859(&self) -> B859_R[src]

Bit 27 - B859

pub fn b860(&self) -> B860_R[src]

Bit 28 - B860

pub fn b861(&self) -> B861_R[src]

Bit 29 - B861

pub fn b862(&self) -> B862_R[src]

Bit 30 - B862

pub fn b863(&self) -> B863_R[src]

Bit 31 - B863

impl R<u32, Reg<u32, _MPCBB1_VCTR27>>[src]

pub fn b864(&self) -> B864_R[src]

Bit 0 - B864

pub fn b865(&self) -> B865_R[src]

Bit 1 - B865

pub fn b866(&self) -> B866_R[src]

Bit 2 - B866

pub fn b867(&self) -> B867_R[src]

Bit 3 - B867

pub fn b868(&self) -> B868_R[src]

Bit 4 - B868

pub fn b869(&self) -> B869_R[src]

Bit 5 - B869

pub fn b870(&self) -> B870_R[src]

Bit 6 - B870

pub fn b871(&self) -> B871_R[src]

Bit 7 - B871

pub fn b872(&self) -> B872_R[src]

Bit 8 - B872

pub fn b873(&self) -> B873_R[src]

Bit 9 - B873

pub fn b874(&self) -> B874_R[src]

Bit 10 - B874

pub fn b875(&self) -> B875_R[src]

Bit 11 - B875

pub fn b876(&self) -> B876_R[src]

Bit 12 - B876

pub fn b877(&self) -> B877_R[src]

Bit 13 - B877

pub fn b878(&self) -> B878_R[src]

Bit 14 - B878

pub fn b879(&self) -> B879_R[src]

Bit 15 - B879

pub fn b880(&self) -> B880_R[src]

Bit 16 - B880

pub fn b881(&self) -> B881_R[src]

Bit 17 - B881

pub fn b882(&self) -> B882_R[src]

Bit 18 - B882

pub fn b883(&self) -> B883_R[src]

Bit 19 - B883

pub fn b884(&self) -> B884_R[src]

Bit 20 - B884

pub fn b885(&self) -> B885_R[src]

Bit 21 - B885

pub fn b886(&self) -> B886_R[src]

Bit 22 - B886

pub fn b887(&self) -> B887_R[src]

Bit 23 - B887

pub fn b888(&self) -> B888_R[src]

Bit 24 - B888

pub fn b889(&self) -> B889_R[src]

Bit 25 - B889

pub fn b890(&self) -> B890_R[src]

Bit 26 - B890

pub fn b891(&self) -> B891_R[src]

Bit 27 - B891

pub fn b892(&self) -> B892_R[src]

Bit 28 - B892

pub fn b893(&self) -> B893_R[src]

Bit 29 - B893

pub fn b894(&self) -> B894_R[src]

Bit 30 - B894

pub fn b895(&self) -> B895_R[src]

Bit 31 - B895

impl R<u32, Reg<u32, _MPCBB1_VCTR28>>[src]

pub fn b896(&self) -> B896_R[src]

Bit 0 - B896

pub fn b897(&self) -> B897_R[src]

Bit 1 - B897

pub fn b898(&self) -> B898_R[src]

Bit 2 - B898

pub fn b899(&self) -> B899_R[src]

Bit 3 - B899

pub fn b900(&self) -> B900_R[src]

Bit 4 - B900

pub fn b901(&self) -> B901_R[src]

Bit 5 - B901

pub fn b902(&self) -> B902_R[src]

Bit 6 - B902

pub fn b903(&self) -> B903_R[src]

Bit 7 - B903

pub fn b904(&self) -> B904_R[src]

Bit 8 - B904

pub fn b905(&self) -> B905_R[src]

Bit 9 - B905

pub fn b906(&self) -> B906_R[src]

Bit 10 - B906

pub fn b907(&self) -> B907_R[src]

Bit 11 - B907

pub fn b908(&self) -> B908_R[src]

Bit 12 - B908

pub fn b909(&self) -> B909_R[src]

Bit 13 - B909

pub fn b910(&self) -> B910_R[src]

Bit 14 - B910

pub fn b911(&self) -> B911_R[src]

Bit 15 - B911

pub fn b912(&self) -> B912_R[src]

Bit 16 - B912

pub fn b913(&self) -> B913_R[src]

Bit 17 - B913

pub fn b914(&self) -> B914_R[src]

Bit 18 - B914

pub fn b915(&self) -> B915_R[src]

Bit 19 - B915

pub fn b916(&self) -> B916_R[src]

Bit 20 - B916

pub fn b917(&self) -> B917_R[src]

Bit 21 - B917

pub fn b918(&self) -> B918_R[src]

Bit 22 - B918

pub fn b919(&self) -> B919_R[src]

Bit 23 - B919

pub fn b920(&self) -> B920_R[src]

Bit 24 - B920

pub fn b921(&self) -> B921_R[src]

Bit 25 - B921

pub fn b922(&self) -> B922_R[src]

Bit 26 - B922

pub fn b923(&self) -> B923_R[src]

Bit 27 - B923

pub fn b924(&self) -> B924_R[src]

Bit 28 - B924

pub fn b925(&self) -> B925_R[src]

Bit 29 - B925

pub fn b926(&self) -> B926_R[src]

Bit 30 - B926

pub fn b927(&self) -> B927_R[src]

Bit 31 - B927

impl R<u32, Reg<u32, _MPCBB1_VCTR29>>[src]

pub fn b928(&self) -> B928_R[src]

Bit 0 - B928

pub fn b929(&self) -> B929_R[src]

Bit 1 - B929

pub fn b930(&self) -> B930_R[src]

Bit 2 - B930

pub fn b931(&self) -> B931_R[src]

Bit 3 - B931

pub fn b932(&self) -> B932_R[src]

Bit 4 - B932

pub fn b933(&self) -> B933_R[src]

Bit 5 - B933

pub fn b934(&self) -> B934_R[src]

Bit 6 - B934

pub fn b935(&self) -> B935_R[src]

Bit 7 - B935

pub fn b936(&self) -> B936_R[src]

Bit 8 - B936

pub fn b937(&self) -> B937_R[src]

Bit 9 - B937

pub fn b938(&self) -> B938_R[src]

Bit 10 - B938

pub fn b939(&self) -> B939_R[src]

Bit 11 - B939

pub fn b940(&self) -> B940_R[src]

Bit 12 - B940

pub fn b941(&self) -> B941_R[src]

Bit 13 - B941

pub fn b942(&self) -> B942_R[src]

Bit 14 - B942

pub fn b943(&self) -> B943_R[src]

Bit 15 - B943

pub fn b944(&self) -> B944_R[src]

Bit 16 - B944

pub fn b945(&self) -> B945_R[src]

Bit 17 - B945

pub fn b946(&self) -> B946_R[src]

Bit 18 - B946

pub fn b947(&self) -> B947_R[src]

Bit 19 - B947

pub fn b948(&self) -> B948_R[src]

Bit 20 - B948

pub fn b949(&self) -> B949_R[src]

Bit 21 - B949

pub fn b950(&self) -> B950_R[src]

Bit 22 - B950

pub fn b951(&self) -> B951_R[src]

Bit 23 - B951

pub fn b952(&self) -> B952_R[src]

Bit 24 - B952

pub fn b953(&self) -> B953_R[src]

Bit 25 - B953

pub fn b954(&self) -> B954_R[src]

Bit 26 - B954

pub fn b955(&self) -> B955_R[src]

Bit 27 - B955

pub fn b956(&self) -> B956_R[src]

Bit 28 - B956

pub fn b957(&self) -> B957_R[src]

Bit 29 - B957

pub fn b958(&self) -> B958_R[src]

Bit 30 - B958

pub fn b959(&self) -> B959_R[src]

Bit 31 - B959

impl R<u32, Reg<u32, _MPCBB1_VCTR30>>[src]

pub fn b960(&self) -> B960_R[src]

Bit 0 - B960

pub fn b961(&self) -> B961_R[src]

Bit 1 - B961

pub fn b962(&self) -> B962_R[src]

Bit 2 - B962

pub fn b963(&self) -> B963_R[src]

Bit 3 - B963

pub fn b964(&self) -> B964_R[src]

Bit 4 - B964

pub fn b965(&self) -> B965_R[src]

Bit 5 - B965

pub fn b966(&self) -> B966_R[src]

Bit 6 - B966

pub fn b967(&self) -> B967_R[src]

Bit 7 - B967

pub fn b968(&self) -> B968_R[src]

Bit 8 - B968

pub fn b969(&self) -> B969_R[src]

Bit 9 - B969

pub fn b970(&self) -> B970_R[src]

Bit 10 - B970

pub fn b971(&self) -> B971_R[src]

Bit 11 - B971

pub fn b972(&self) -> B972_R[src]

Bit 12 - B972

pub fn b973(&self) -> B973_R[src]

Bit 13 - B973

pub fn b974(&self) -> B974_R[src]

Bit 14 - B974

pub fn b975(&self) -> B975_R[src]

Bit 15 - B975

pub fn b976(&self) -> B976_R[src]

Bit 16 - B976

pub fn b977(&self) -> B977_R[src]

Bit 17 - B977

pub fn b978(&self) -> B978_R[src]

Bit 18 - B978

pub fn b979(&self) -> B979_R[src]

Bit 19 - B979

pub fn b980(&self) -> B980_R[src]

Bit 20 - B980

pub fn b981(&self) -> B981_R[src]

Bit 21 - B981

pub fn b982(&self) -> B982_R[src]

Bit 22 - B982

pub fn b983(&self) -> B983_R[src]

Bit 23 - B983

pub fn b984(&self) -> B984_R[src]

Bit 24 - B984

pub fn b985(&self) -> B985_R[src]

Bit 25 - B985

pub fn b986(&self) -> B986_R[src]

Bit 26 - B986

pub fn b987(&self) -> B987_R[src]

Bit 27 - B987

pub fn b988(&self) -> B988_R[src]

Bit 28 - B988

pub fn b989(&self) -> B989_R[src]

Bit 29 - B989

pub fn b990(&self) -> B990_R[src]

Bit 30 - B990

pub fn b991(&self) -> B991_R[src]

Bit 31 - B991

impl R<u32, Reg<u32, _MPCBB1_VCTR31>>[src]

pub fn b992(&self) -> B992_R[src]

Bit 0 - B992

pub fn b993(&self) -> B993_R[src]

Bit 1 - B993

pub fn b994(&self) -> B994_R[src]

Bit 2 - B994

pub fn b995(&self) -> B995_R[src]

Bit 3 - B995

pub fn b996(&self) -> B996_R[src]

Bit 4 - B996

pub fn b997(&self) -> B997_R[src]

Bit 5 - B997

pub fn b998(&self) -> B998_R[src]

Bit 6 - B998

pub fn b999(&self) -> B999_R[src]

Bit 7 - B999

pub fn b1000(&self) -> B1000_R[src]

Bit 8 - B1000

pub fn b1001(&self) -> B1001_R[src]

Bit 9 - B1001

pub fn b1002(&self) -> B1002_R[src]

Bit 10 - B1002

pub fn b1003(&self) -> B1003_R[src]

Bit 11 - B1003

pub fn b1004(&self) -> B1004_R[src]

Bit 12 - B1004

pub fn b1005(&self) -> B1005_R[src]

Bit 13 - B1005

pub fn b1006(&self) -> B1006_R[src]

Bit 14 - B1006

pub fn b1007(&self) -> B1007_R[src]

Bit 15 - B1007

pub fn b1008(&self) -> B1008_R[src]

Bit 16 - B1008

pub fn b1009(&self) -> B1009_R[src]

Bit 17 - B1009

pub fn b1010(&self) -> B1010_R[src]

Bit 18 - B1010

pub fn b1011(&self) -> B1011_R[src]

Bit 19 - B1011

pub fn b1012(&self) -> B1012_R[src]

Bit 20 - B1012

pub fn b1013(&self) -> B1013_R[src]

Bit 21 - B1013

pub fn b1014(&self) -> B1014_R[src]

Bit 22 - B1014

pub fn b1015(&self) -> B1015_R[src]

Bit 23 - B1015

pub fn b1016(&self) -> B1016_R[src]

Bit 24 - B1016

pub fn b1017(&self) -> B1017_R[src]

Bit 25 - B1017

pub fn b1018(&self) -> B1018_R[src]

Bit 26 - B1018

pub fn b1019(&self) -> B1019_R[src]

Bit 27 - B1019

pub fn b1020(&self) -> B1020_R[src]

Bit 28 - B1020

pub fn b1021(&self) -> B1021_R[src]

Bit 29 - B1021

pub fn b1022(&self) -> B1022_R[src]

Bit 30 - B1022

pub fn b1023(&self) -> B1023_R[src]

Bit 31 - B1023

impl R<u32, Reg<u32, _MPCBB1_VCTR32>>[src]

pub fn b1024(&self) -> B1024_R[src]

Bit 0 - B1024

pub fn b1025(&self) -> B1025_R[src]

Bit 1 - B1025

pub fn b1026(&self) -> B1026_R[src]

Bit 2 - B1026

pub fn b1027(&self) -> B1027_R[src]

Bit 3 - B1027

pub fn b1028(&self) -> B1028_R[src]

Bit 4 - B1028

pub fn b1029(&self) -> B1029_R[src]

Bit 5 - B1029

pub fn b1030(&self) -> B1030_R[src]

Bit 6 - B1030

pub fn b1031(&self) -> B1031_R[src]

Bit 7 - B1031

pub fn b1032(&self) -> B1032_R[src]

Bit 8 - B1032

pub fn b1033(&self) -> B1033_R[src]

Bit 9 - B1033

pub fn b1034(&self) -> B1034_R[src]

Bit 10 - B1034

pub fn b1035(&self) -> B1035_R[src]

Bit 11 - B1035

pub fn b1036(&self) -> B1036_R[src]

Bit 12 - B1036

pub fn b1037(&self) -> B1037_R[src]

Bit 13 - B1037

pub fn b1038(&self) -> B1038_R[src]

Bit 14 - B1038

pub fn b1039(&self) -> B1039_R[src]

Bit 15 - B1039

pub fn b1040(&self) -> B1040_R[src]

Bit 16 - B1040

pub fn b1041(&self) -> B1041_R[src]

Bit 17 - B1041

pub fn b1042(&self) -> B1042_R[src]

Bit 18 - B1042

pub fn b1043(&self) -> B1043_R[src]

Bit 19 - B1043

pub fn b1044(&self) -> B1044_R[src]

Bit 20 - B1044

pub fn b1045(&self) -> B1045_R[src]

Bit 21 - B1045

pub fn b1046(&self) -> B1046_R[src]

Bit 22 - B1046

pub fn b1047(&self) -> B1047_R[src]

Bit 23 - B1047

pub fn b1048(&self) -> B1048_R[src]

Bit 24 - B1048

pub fn b1049(&self) -> B1049_R[src]

Bit 25 - B1049

pub fn b1050(&self) -> B1050_R[src]

Bit 26 - B1050

pub fn b1051(&self) -> B1051_R[src]

Bit 27 - B1051

pub fn b1052(&self) -> B1052_R[src]

Bit 28 - B1052

pub fn b1053(&self) -> B1053_R[src]

Bit 29 - B1053

pub fn b1054(&self) -> B1054_R[src]

Bit 30 - B1054

pub fn b1055(&self) -> B1055_R[src]

Bit 31 - B1055

impl R<u32, Reg<u32, _MPCBB1_VCTR33>>[src]

pub fn b1056(&self) -> B1056_R[src]

Bit 0 - B1056

pub fn b1057(&self) -> B1057_R[src]

Bit 1 - B1057

pub fn b1058(&self) -> B1058_R[src]

Bit 2 - B1058

pub fn b1059(&self) -> B1059_R[src]

Bit 3 - B1059

pub fn b1060(&self) -> B1060_R[src]

Bit 4 - B1060

pub fn b1061(&self) -> B1061_R[src]

Bit 5 - B1061

pub fn b1062(&self) -> B1062_R[src]

Bit 6 - B1062

pub fn b1063(&self) -> B1063_R[src]

Bit 7 - B1063

pub fn b1064(&self) -> B1064_R[src]

Bit 8 - B1064

pub fn b1065(&self) -> B1065_R[src]

Bit 9 - B1065

pub fn b1066(&self) -> B1066_R[src]

Bit 10 - B1066

pub fn b1067(&self) -> B1067_R[src]

Bit 11 - B1067

pub fn b1068(&self) -> B1068_R[src]

Bit 12 - B1068

pub fn b1069(&self) -> B1069_R[src]

Bit 13 - B1069

pub fn b1070(&self) -> B1070_R[src]

Bit 14 - B1070

pub fn b1071(&self) -> B1071_R[src]

Bit 15 - B1071

pub fn b1072(&self) -> B1072_R[src]

Bit 16 - B1072

pub fn b1073(&self) -> B1073_R[src]

Bit 17 - B1073

pub fn b1074(&self) -> B1074_R[src]

Bit 18 - B1074

pub fn b1075(&self) -> B1075_R[src]

Bit 19 - B1075

pub fn b1076(&self) -> B1076_R[src]

Bit 20 - B1076

pub fn b1077(&self) -> B1077_R[src]

Bit 21 - B1077

pub fn b1078(&self) -> B1078_R[src]

Bit 22 - B1078

pub fn b1079(&self) -> B1079_R[src]

Bit 23 - B1079

pub fn b1080(&self) -> B1080_R[src]

Bit 24 - B1080

pub fn b1081(&self) -> B1081_R[src]

Bit 25 - B1081

pub fn b1082(&self) -> B1082_R[src]

Bit 26 - B1082

pub fn b1083(&self) -> B1083_R[src]

Bit 27 - B1083

pub fn b1084(&self) -> B1084_R[src]

Bit 28 - B1084

pub fn b1085(&self) -> B1085_R[src]

Bit 29 - B1085

pub fn b1086(&self) -> B1086_R[src]

Bit 30 - B1086

pub fn b1087(&self) -> B1087_R[src]

Bit 31 - B1087

impl R<u32, Reg<u32, _MPCBB1_VCTR34>>[src]

pub fn b1088(&self) -> B1088_R[src]

Bit 0 - B1088

pub fn b1089(&self) -> B1089_R[src]

Bit 1 - B1089

pub fn b1090(&self) -> B1090_R[src]

Bit 2 - B1090

pub fn b1091(&self) -> B1091_R[src]

Bit 3 - B1091

pub fn b1092(&self) -> B1092_R[src]

Bit 4 - B1092

pub fn b1093(&self) -> B1093_R[src]

Bit 5 - B1093

pub fn b1094(&self) -> B1094_R[src]

Bit 6 - B1094

pub fn b1095(&self) -> B1095_R[src]

Bit 7 - B1095

pub fn b1096(&self) -> B1096_R[src]

Bit 8 - B1096

pub fn b1097(&self) -> B1097_R[src]

Bit 9 - B1097

pub fn b1098(&self) -> B1098_R[src]

Bit 10 - B1098

pub fn b1099(&self) -> B1099_R[src]

Bit 11 - B1099

pub fn b1100(&self) -> B1100_R[src]

Bit 12 - B1100

pub fn b1101(&self) -> B1101_R[src]

Bit 13 - B1101

pub fn b1102(&self) -> B1102_R[src]

Bit 14 - B1102

pub fn b1103(&self) -> B1103_R[src]

Bit 15 - B1103

pub fn b1104(&self) -> B1104_R[src]

Bit 16 - B1104

pub fn b1105(&self) -> B1105_R[src]

Bit 17 - B1105

pub fn b1106(&self) -> B1106_R[src]

Bit 18 - B1106

pub fn b1107(&self) -> B1107_R[src]

Bit 19 - B1107

pub fn b1108(&self) -> B1108_R[src]

Bit 20 - B1108

pub fn b1109(&self) -> B1109_R[src]

Bit 21 - B1109

pub fn b1110(&self) -> B1110_R[src]

Bit 22 - B1110

pub fn b1111(&self) -> B1111_R[src]

Bit 23 - B1111

pub fn b1112(&self) -> B1112_R[src]

Bit 24 - B1112

pub fn b1113(&self) -> B1113_R[src]

Bit 25 - B1113

pub fn b1114(&self) -> B1114_R[src]

Bit 26 - B1114

pub fn b1115(&self) -> B1115_R[src]

Bit 27 - B1115

pub fn b1116(&self) -> B1116_R[src]

Bit 28 - B1116

pub fn b1117(&self) -> B1117_R[src]

Bit 29 - B1117

pub fn b1118(&self) -> B1118_R[src]

Bit 30 - B1118

pub fn b1119(&self) -> B1119_R[src]

Bit 31 - B1119

impl R<u32, Reg<u32, _MPCBB1_VCTR35>>[src]

pub fn b1120(&self) -> B1120_R[src]

Bit 0 - B1120

pub fn b1121(&self) -> B1121_R[src]

Bit 1 - B1121

pub fn b1122(&self) -> B1122_R[src]

Bit 2 - B1122

pub fn b1123(&self) -> B1123_R[src]

Bit 3 - B1123

pub fn b1124(&self) -> B1124_R[src]

Bit 4 - B1124

pub fn b1125(&self) -> B1125_R[src]

Bit 5 - B1125

pub fn b1126(&self) -> B1126_R[src]

Bit 6 - B1126

pub fn b1127(&self) -> B1127_R[src]

Bit 7 - B1127

pub fn b1128(&self) -> B1128_R[src]

Bit 8 - B1128

pub fn b1129(&self) -> B1129_R[src]

Bit 9 - B1129

pub fn b1130(&self) -> B1130_R[src]

Bit 10 - B1130

pub fn b1131(&self) -> B1131_R[src]

Bit 11 - B1131

pub fn b1132(&self) -> B1132_R[src]

Bit 12 - B1132

pub fn b1133(&self) -> B1133_R[src]

Bit 13 - B1133

pub fn b1134(&self) -> B1134_R[src]

Bit 14 - B1134

pub fn b1135(&self) -> B1135_R[src]

Bit 15 - B1135

pub fn b1136(&self) -> B1136_R[src]

Bit 16 - B1136

pub fn b1137(&self) -> B1137_R[src]

Bit 17 - B1137

pub fn b1138(&self) -> B1138_R[src]

Bit 18 - B1138

pub fn b1139(&self) -> B1139_R[src]

Bit 19 - B1139

pub fn b1140(&self) -> B1140_R[src]

Bit 20 - B1140

pub fn b1141(&self) -> B1141_R[src]

Bit 21 - B1141

pub fn b1142(&self) -> B1142_R[src]

Bit 22 - B1142

pub fn b1143(&self) -> B1143_R[src]

Bit 23 - B1143

pub fn b1144(&self) -> B1144_R[src]

Bit 24 - B1144

pub fn b1145(&self) -> B1145_R[src]

Bit 25 - B1145

pub fn b1146(&self) -> B1146_R[src]

Bit 26 - B1146

pub fn b1147(&self) -> B1147_R[src]

Bit 27 - B1147

pub fn b1148(&self) -> B1148_R[src]

Bit 28 - B1148

pub fn b1149(&self) -> B1149_R[src]

Bit 29 - B1149

pub fn b1150(&self) -> B1150_R[src]

Bit 30 - B1150

pub fn b1151(&self) -> B1151_R[src]

Bit 31 - B1151

impl R<u32, Reg<u32, _MPCBB1_VCTR36>>[src]

pub fn b1152(&self) -> B1152_R[src]

Bit 0 - B1152

pub fn b1153(&self) -> B1153_R[src]

Bit 1 - B1153

pub fn b1154(&self) -> B1154_R[src]

Bit 2 - B1154

pub fn b1155(&self) -> B1155_R[src]

Bit 3 - B1155

pub fn b1156(&self) -> B1156_R[src]

Bit 4 - B1156

pub fn b1157(&self) -> B1157_R[src]

Bit 5 - B1157

pub fn b1158(&self) -> B1158_R[src]

Bit 6 - B1158

pub fn b1159(&self) -> B1159_R[src]

Bit 7 - B1159

pub fn b1160(&self) -> B1160_R[src]

Bit 8 - B1160

pub fn b1161(&self) -> B1161_R[src]

Bit 9 - B1161

pub fn b1162(&self) -> B1162_R[src]

Bit 10 - B1162

pub fn b1163(&self) -> B1163_R[src]

Bit 11 - B1163

pub fn b1164(&self) -> B1164_R[src]

Bit 12 - B1164

pub fn b1165(&self) -> B1165_R[src]

Bit 13 - B1165

pub fn b1166(&self) -> B1166_R[src]

Bit 14 - B1166

pub fn b1167(&self) -> B1167_R[src]

Bit 15 - B1167

pub fn b1168(&self) -> B1168_R[src]

Bit 16 - B1168

pub fn b1169(&self) -> B1169_R[src]

Bit 17 - B1169

pub fn b1170(&self) -> B1170_R[src]

Bit 18 - B1170

pub fn b1171(&self) -> B1171_R[src]

Bit 19 - B1171

pub fn b1172(&self) -> B1172_R[src]

Bit 20 - B1172

pub fn b1173(&self) -> B1173_R[src]

Bit 21 - B1173

pub fn b1174(&self) -> B1174_R[src]

Bit 22 - B1174

pub fn b1175(&self) -> B1175_R[src]

Bit 23 - B1175

pub fn b1176(&self) -> B1176_R[src]

Bit 24 - B1176

pub fn b1177(&self) -> B1177_R[src]

Bit 25 - B1177

pub fn b1178(&self) -> B1178_R[src]

Bit 26 - B1178

pub fn b1179(&self) -> B1179_R[src]

Bit 27 - B1179

pub fn b1180(&self) -> B1180_R[src]

Bit 28 - B1180

pub fn b1181(&self) -> B1181_R[src]

Bit 29 - B1181

pub fn b1182(&self) -> B1182_R[src]

Bit 30 - B1182

pub fn b1183(&self) -> B1183_R[src]

Bit 31 - B1183

impl R<u32, Reg<u32, _MPCBB1_VCTR37>>[src]

pub fn b1184(&self) -> B1184_R[src]

Bit 0 - B1184

pub fn b1185(&self) -> B1185_R[src]

Bit 1 - B1185

pub fn b1186(&self) -> B1186_R[src]

Bit 2 - B1186

pub fn b1187(&self) -> B1187_R[src]

Bit 3 - B1187

pub fn b1188(&self) -> B1188_R[src]

Bit 4 - B1188

pub fn b1189(&self) -> B1189_R[src]

Bit 5 - B1189

pub fn b1190(&self) -> B1190_R[src]

Bit 6 - B1190

pub fn b1191(&self) -> B1191_R[src]

Bit 7 - B1191

pub fn b1192(&self) -> B1192_R[src]

Bit 8 - B1192

pub fn b1193(&self) -> B1193_R[src]

Bit 9 - B1193

pub fn b1194(&self) -> B1194_R[src]

Bit 10 - B1194

pub fn b1195(&self) -> B1195_R[src]

Bit 11 - B1195

pub fn b1196(&self) -> B1196_R[src]

Bit 12 - B1196

pub fn b1197(&self) -> B1197_R[src]

Bit 13 - B1197

pub fn b1198(&self) -> B1198_R[src]

Bit 14 - B1198

pub fn b1199(&self) -> B1199_R[src]

Bit 15 - B1199

pub fn b1200(&self) -> B1200_R[src]

Bit 16 - B1200

pub fn b1201(&self) -> B1201_R[src]

Bit 17 - B1201

pub fn b1202(&self) -> B1202_R[src]

Bit 18 - B1202

pub fn b1203(&self) -> B1203_R[src]

Bit 19 - B1203

pub fn b1204(&self) -> B1204_R[src]

Bit 20 - B1204

pub fn b1205(&self) -> B1205_R[src]

Bit 21 - B1205

pub fn b1206(&self) -> B1206_R[src]

Bit 22 - B1206

pub fn b1207(&self) -> B1207_R[src]

Bit 23 - B1207

pub fn b1208(&self) -> B1208_R[src]

Bit 24 - B1208

pub fn b1209(&self) -> B1209_R[src]

Bit 25 - B1209

pub fn b1210(&self) -> B1210_R[src]

Bit 26 - B1210

pub fn b1211(&self) -> B1211_R[src]

Bit 27 - B1211

pub fn b1212(&self) -> B1212_R[src]

Bit 28 - B1212

pub fn b1213(&self) -> B1213_R[src]

Bit 29 - B1213

pub fn b1214(&self) -> B1214_R[src]

Bit 30 - B1214

pub fn b1215(&self) -> B1215_R[src]

Bit 31 - B1215

impl R<u32, Reg<u32, _MPCBB1_VCTR38>>[src]

pub fn b1216(&self) -> B1216_R[src]

Bit 0 - B1216

pub fn b1217(&self) -> B1217_R[src]

Bit 1 - B1217

pub fn b1218(&self) -> B1218_R[src]

Bit 2 - B1218

pub fn b1219(&self) -> B1219_R[src]

Bit 3 - B1219

pub fn b1220(&self) -> B1220_R[src]

Bit 4 - B1220

pub fn b1221(&self) -> B1221_R[src]

Bit 5 - B1221

pub fn b1222(&self) -> B1222_R[src]

Bit 6 - B1222

pub fn b1223(&self) -> B1223_R[src]

Bit 7 - B1223

pub fn b1224(&self) -> B1224_R[src]

Bit 8 - B1224

pub fn b1225(&self) -> B1225_R[src]

Bit 9 - B1225

pub fn b1226(&self) -> B1226_R[src]

Bit 10 - B1226

pub fn b1227(&self) -> B1227_R[src]

Bit 11 - B1227

pub fn b1228(&self) -> B1228_R[src]

Bit 12 - B1228

pub fn b1229(&self) -> B1229_R[src]

Bit 13 - B1229

pub fn b1230(&self) -> B1230_R[src]

Bit 14 - B1230

pub fn b1231(&self) -> B1231_R[src]

Bit 15 - B1231

pub fn b1232(&self) -> B1232_R[src]

Bit 16 - B1232

pub fn b1233(&self) -> B1233_R[src]

Bit 17 - B1233

pub fn b1234(&self) -> B1234_R[src]

Bit 18 - B1234

pub fn b1235(&self) -> B1235_R[src]

Bit 19 - B1235

pub fn b1236(&self) -> B1236_R[src]

Bit 20 - B1236

pub fn b1237(&self) -> B1237_R[src]

Bit 21 - B1237

pub fn b1238(&self) -> B1238_R[src]

Bit 22 - B1238

pub fn b1239(&self) -> B1239_R[src]

Bit 23 - B1239

pub fn b1240(&self) -> B1240_R[src]

Bit 24 - B1240

pub fn b1241(&self) -> B1241_R[src]

Bit 25 - B1241

pub fn b1242(&self) -> B1242_R[src]

Bit 26 - B1242

pub fn b1243(&self) -> B1243_R[src]

Bit 27 - B1243

pub fn b1244(&self) -> B1244_R[src]

Bit 28 - B1244

pub fn b1245(&self) -> B1245_R[src]

Bit 29 - B1245

pub fn b1246(&self) -> B1246_R[src]

Bit 30 - B1246

pub fn b1247(&self) -> B1247_R[src]

Bit 31 - B1247

impl R<u32, Reg<u32, _MPCBB1_VCTR39>>[src]

pub fn b1248(&self) -> B1248_R[src]

Bit 0 - B1248

pub fn b1249(&self) -> B1249_R[src]

Bit 1 - B1249

pub fn b1250(&self) -> B1250_R[src]

Bit 2 - B1250

pub fn b1251(&self) -> B1251_R[src]

Bit 3 - B1251

pub fn b1252(&self) -> B1252_R[src]

Bit 4 - B1252

pub fn b1253(&self) -> B1253_R[src]

Bit 5 - B1253

pub fn b1254(&self) -> B1254_R[src]

Bit 6 - B1254

pub fn b1255(&self) -> B1255_R[src]

Bit 7 - B1255

pub fn b1256(&self) -> B1256_R[src]

Bit 8 - B1256

pub fn b1257(&self) -> B1257_R[src]

Bit 9 - B1257

pub fn b1258(&self) -> B1258_R[src]

Bit 10 - B1258

pub fn b1259(&self) -> B1259_R[src]

Bit 11 - B1259

pub fn b1260(&self) -> B1260_R[src]

Bit 12 - B1260

pub fn b1261(&self) -> B1261_R[src]

Bit 13 - B1261

pub fn b1262(&self) -> B1262_R[src]

Bit 14 - B1262

pub fn b1263(&self) -> B1263_R[src]

Bit 15 - B1263

pub fn b1264(&self) -> B1264_R[src]

Bit 16 - B1264

pub fn b1265(&self) -> B1265_R[src]

Bit 17 - B1265

pub fn b1266(&self) -> B1266_R[src]

Bit 18 - B1266

pub fn b1267(&self) -> B1267_R[src]

Bit 19 - B1267

pub fn b1268(&self) -> B1268_R[src]

Bit 20 - B1268

pub fn b1269(&self) -> B1269_R[src]

Bit 21 - B1269

pub fn b1270(&self) -> B1270_R[src]

Bit 22 - B1270

pub fn b1271(&self) -> B1271_R[src]

Bit 23 - B1271

pub fn b1272(&self) -> B1272_R[src]

Bit 24 - B1272

pub fn b1273(&self) -> B1273_R[src]

Bit 25 - B1273

pub fn b1274(&self) -> B1274_R[src]

Bit 26 - B1274

pub fn b1275(&self) -> B1275_R[src]

Bit 27 - B1275

pub fn b1276(&self) -> B1276_R[src]

Bit 28 - B1276

pub fn b1277(&self) -> B1277_R[src]

Bit 29 - B1277

pub fn b1278(&self) -> B1278_R[src]

Bit 30 - B1278

pub fn b1279(&self) -> B1279_R[src]

Bit 31 - B1279

impl R<u32, Reg<u32, _MPCBB1_VCTR40>>[src]

pub fn b1280(&self) -> B1280_R[src]

Bit 0 - B1280

pub fn b1281(&self) -> B1281_R[src]

Bit 1 - B1281

pub fn b1282(&self) -> B1282_R[src]

Bit 2 - B1282

pub fn b1283(&self) -> B1283_R[src]

Bit 3 - B1283

pub fn b1284(&self) -> B1284_R[src]

Bit 4 - B1284

pub fn b1285(&self) -> B1285_R[src]

Bit 5 - B1285

pub fn b1286(&self) -> B1286_R[src]

Bit 6 - B1286

pub fn b1287(&self) -> B1287_R[src]

Bit 7 - B1287

pub fn b1288(&self) -> B1288_R[src]

Bit 8 - B1288

pub fn b1289(&self) -> B1289_R[src]

Bit 9 - B1289

pub fn b1290(&self) -> B1290_R[src]

Bit 10 - B1290

pub fn b1291(&self) -> B1291_R[src]

Bit 11 - B1291

pub fn b1292(&self) -> B1292_R[src]

Bit 12 - B1292

pub fn b1293(&self) -> B1293_R[src]

Bit 13 - B1293

pub fn b1294(&self) -> B1294_R[src]

Bit 14 - B1294

pub fn b1295(&self) -> B1295_R[src]

Bit 15 - B1295

pub fn b1296(&self) -> B1296_R[src]

Bit 16 - B1296

pub fn b1297(&self) -> B1297_R[src]

Bit 17 - B1297

pub fn b1298(&self) -> B1298_R[src]

Bit 18 - B1298

pub fn b1299(&self) -> B1299_R[src]

Bit 19 - B1299

pub fn b1300(&self) -> B1300_R[src]

Bit 20 - B1300

pub fn b1301(&self) -> B1301_R[src]

Bit 21 - B1301

pub fn b1302(&self) -> B1302_R[src]

Bit 22 - B1302

pub fn b1303(&self) -> B1303_R[src]

Bit 23 - B1303

pub fn b1304(&self) -> B1304_R[src]

Bit 24 - B1304

pub fn b1305(&self) -> B1305_R[src]

Bit 25 - B1305

pub fn b1306(&self) -> B1306_R[src]

Bit 26 - B1306

pub fn b1307(&self) -> B1307_R[src]

Bit 27 - B1307

pub fn b1308(&self) -> B1308_R[src]

Bit 28 - B1308

pub fn b1309(&self) -> B1309_R[src]

Bit 29 - B1309

pub fn b1310(&self) -> B1310_R[src]

Bit 30 - B1310

pub fn b1311(&self) -> B1311_R[src]

Bit 31 - B1311

impl R<u32, Reg<u32, _MPCBB1_VCTR41>>[src]

pub fn b1312(&self) -> B1312_R[src]

Bit 0 - B1312

pub fn b1313(&self) -> B1313_R[src]

Bit 1 - B1313

pub fn b1314(&self) -> B1314_R[src]

Bit 2 - B1314

pub fn b1315(&self) -> B1315_R[src]

Bit 3 - B1315

pub fn b1316(&self) -> B1316_R[src]

Bit 4 - B1316

pub fn b1317(&self) -> B1317_R[src]

Bit 5 - B1317

pub fn b1318(&self) -> B1318_R[src]

Bit 6 - B1318

pub fn b1319(&self) -> B1319_R[src]

Bit 7 - B1319

pub fn b1320(&self) -> B1320_R[src]

Bit 8 - B1320

pub fn b1321(&self) -> B1321_R[src]

Bit 9 - B1321

pub fn b1322(&self) -> B1322_R[src]

Bit 10 - B1322

pub fn b1323(&self) -> B1323_R[src]

Bit 11 - B1323

pub fn b1324(&self) -> B1324_R[src]

Bit 12 - B1324

pub fn b1325(&self) -> B1325_R[src]

Bit 13 - B1325

pub fn b1326(&self) -> B1326_R[src]

Bit 14 - B1326

pub fn b1327(&self) -> B1327_R[src]

Bit 15 - B1327

pub fn b1328(&self) -> B1328_R[src]

Bit 16 - B1328

pub fn b1329(&self) -> B1329_R[src]

Bit 17 - B1329

pub fn b1330(&self) -> B1330_R[src]

Bit 18 - B1330

pub fn b1331(&self) -> B1331_R[src]

Bit 19 - B1331

pub fn b1332(&self) -> B1332_R[src]

Bit 20 - B1332

pub fn b1333(&self) -> B1333_R[src]

Bit 21 - B1333

pub fn b1334(&self) -> B1334_R[src]

Bit 22 - B1334

pub fn b1335(&self) -> B1335_R[src]

Bit 23 - B1335

pub fn b1336(&self) -> B1336_R[src]

Bit 24 - B1336

pub fn b1337(&self) -> B1337_R[src]

Bit 25 - B1337

pub fn b1338(&self) -> B1338_R[src]

Bit 26 - B1338

pub fn b1339(&self) -> B1339_R[src]

Bit 27 - B1339

pub fn b1340(&self) -> B1340_R[src]

Bit 28 - B1340

pub fn b1341(&self) -> B1341_R[src]

Bit 29 - B1341

pub fn b1342(&self) -> B1342_R[src]

Bit 30 - B1342

pub fn b1343(&self) -> B1343_R[src]

Bit 31 - B1343

impl R<u32, Reg<u32, _MPCBB1_VCTR42>>[src]

pub fn b1344(&self) -> B1344_R[src]

Bit 0 - B1344

pub fn b1345(&self) -> B1345_R[src]

Bit 1 - B1345

pub fn b1346(&self) -> B1346_R[src]

Bit 2 - B1346

pub fn b1347(&self) -> B1347_R[src]

Bit 3 - B1347

pub fn b1348(&self) -> B1348_R[src]

Bit 4 - B1348

pub fn b1349(&self) -> B1349_R[src]

Bit 5 - B1349

pub fn b1350(&self) -> B1350_R[src]

Bit 6 - B1350

pub fn b1351(&self) -> B1351_R[src]

Bit 7 - B1351

pub fn b1352(&self) -> B1352_R[src]

Bit 8 - B1352

pub fn b1353(&self) -> B1353_R[src]

Bit 9 - B1353

pub fn b1354(&self) -> B1354_R[src]

Bit 10 - B1354

pub fn b1355(&self) -> B1355_R[src]

Bit 11 - B1355

pub fn b1356(&self) -> B1356_R[src]

Bit 12 - B1356

pub fn b1357(&self) -> B1357_R[src]

Bit 13 - B1357

pub fn b1358(&self) -> B1358_R[src]

Bit 14 - B1358

pub fn b1359(&self) -> B1359_R[src]

Bit 15 - B1359

pub fn b1360(&self) -> B1360_R[src]

Bit 16 - B1360

pub fn b1361(&self) -> B1361_R[src]

Bit 17 - B1361

pub fn b1362(&self) -> B1362_R[src]

Bit 18 - B1362

pub fn b1363(&self) -> B1363_R[src]

Bit 19 - B1363

pub fn b1364(&self) -> B1364_R[src]

Bit 20 - B1364

pub fn b1365(&self) -> B1365_R[src]

Bit 21 - B1365

pub fn b1366(&self) -> B1366_R[src]

Bit 22 - B1366

pub fn b1367(&self) -> B1367_R[src]

Bit 23 - B1367

pub fn b1368(&self) -> B1368_R[src]

Bit 24 - B1368

pub fn b1369(&self) -> B1369_R[src]

Bit 25 - B1369

pub fn b1370(&self) -> B1370_R[src]

Bit 26 - B1370

pub fn b1371(&self) -> B1371_R[src]

Bit 27 - B1371

pub fn b1372(&self) -> B1372_R[src]

Bit 28 - B1372

pub fn b1373(&self) -> B1373_R[src]

Bit 29 - B1373

pub fn b1374(&self) -> B1374_R[src]

Bit 30 - B1374

pub fn b1375(&self) -> B1375_R[src]

Bit 31 - B1375

impl R<u32, Reg<u32, _MPCBB1_VCTR43>>[src]

pub fn b1376(&self) -> B1376_R[src]

Bit 0 - B1376

pub fn b1377(&self) -> B1377_R[src]

Bit 1 - B1377

pub fn b1378(&self) -> B1378_R[src]

Bit 2 - B1378

pub fn b1379(&self) -> B1379_R[src]

Bit 3 - B1379

pub fn b1380(&self) -> B1380_R[src]

Bit 4 - B1380

pub fn b1381(&self) -> B1381_R[src]

Bit 5 - B1381

pub fn b1382(&self) -> B1382_R[src]

Bit 6 - B1382

pub fn b1383(&self) -> B1383_R[src]

Bit 7 - B1383

pub fn b1384(&self) -> B1384_R[src]

Bit 8 - B1384

pub fn b1385(&self) -> B1385_R[src]

Bit 9 - B1385

pub fn b1386(&self) -> B1386_R[src]

Bit 10 - B1386

pub fn b1387(&self) -> B1387_R[src]

Bit 11 - B1387

pub fn b1388(&self) -> B1388_R[src]

Bit 12 - B1388

pub fn b1389(&self) -> B1389_R[src]

Bit 13 - B1389

pub fn b1390(&self) -> B1390_R[src]

Bit 14 - B1390

pub fn b1391(&self) -> B1391_R[src]

Bit 15 - B1391

pub fn b1392(&self) -> B1392_R[src]

Bit 16 - B1392

pub fn b1393(&self) -> B1393_R[src]

Bit 17 - B1393

pub fn b1394(&self) -> B1394_R[src]

Bit 18 - B1394

pub fn b1395(&self) -> B1395_R[src]

Bit 19 - B1395

pub fn b1396(&self) -> B1396_R[src]

Bit 20 - B1396

pub fn b1397(&self) -> B1397_R[src]

Bit 21 - B1397

pub fn b1398(&self) -> B1398_R[src]

Bit 22 - B1398

pub fn b1399(&self) -> B1399_R[src]

Bit 23 - B1399

pub fn b1400(&self) -> B1400_R[src]

Bit 24 - B1400

pub fn b1401(&self) -> B1401_R[src]

Bit 25 - B1401

pub fn b1402(&self) -> B1402_R[src]

Bit 26 - B1402

pub fn b1403(&self) -> B1403_R[src]

Bit 27 - B1403

pub fn b1404(&self) -> B1404_R[src]

Bit 28 - B1404

pub fn b1405(&self) -> B1405_R[src]

Bit 29 - B1405

pub fn b1406(&self) -> B1406_R[src]

Bit 30 - B1406

pub fn b1407(&self) -> B1407_R[src]

Bit 31 - B1407

impl R<u32, Reg<u32, _MPCBB1_VCTR44>>[src]

pub fn b1408(&self) -> B1408_R[src]

Bit 0 - B1408

pub fn b1409(&self) -> B1409_R[src]

Bit 1 - B1409

pub fn b1410(&self) -> B1410_R[src]

Bit 2 - B1410

pub fn b1411(&self) -> B1411_R[src]

Bit 3 - B1411

pub fn b1412(&self) -> B1412_R[src]

Bit 4 - B1412

pub fn b1413(&self) -> B1413_R[src]

Bit 5 - B1413

pub fn b1414(&self) -> B1414_R[src]

Bit 6 - B1414

pub fn b1415(&self) -> B1415_R[src]

Bit 7 - B1415

pub fn b1416(&self) -> B1416_R[src]

Bit 8 - B1416

pub fn b1417(&self) -> B1417_R[src]

Bit 9 - B1417

pub fn b1418(&self) -> B1418_R[src]

Bit 10 - B1418

pub fn b1419(&self) -> B1419_R[src]

Bit 11 - B1419

pub fn b1420(&self) -> B1420_R[src]

Bit 12 - B1420

pub fn b1421(&self) -> B1421_R[src]

Bit 13 - B1421

pub fn b1422(&self) -> B1422_R[src]

Bit 14 - B1422

pub fn b1423(&self) -> B1423_R[src]

Bit 15 - B1423

pub fn b1424(&self) -> B1424_R[src]

Bit 16 - B1424

pub fn b1425(&self) -> B1425_R[src]

Bit 17 - B1425

pub fn b1426(&self) -> B1426_R[src]

Bit 18 - B1426

pub fn b1427(&self) -> B1427_R[src]

Bit 19 - B1427

pub fn b1428(&self) -> B1428_R[src]

Bit 20 - B1428

pub fn b1429(&self) -> B1429_R[src]

Bit 21 - B1429

pub fn b1430(&self) -> B1430_R[src]

Bit 22 - B1430

pub fn b1431(&self) -> B1431_R[src]

Bit 23 - B1431

pub fn b1432(&self) -> B1432_R[src]

Bit 24 - B1432

pub fn b1433(&self) -> B1433_R[src]

Bit 25 - B1433

pub fn b1434(&self) -> B1434_R[src]

Bit 26 - B1434

pub fn b1435(&self) -> B1435_R[src]

Bit 27 - B1435

pub fn b1436(&self) -> B1436_R[src]

Bit 28 - B1436

pub fn b1437(&self) -> B1437_R[src]

Bit 29 - B1437

pub fn b1438(&self) -> B1438_R[src]

Bit 30 - B1438

pub fn b1439(&self) -> B1439_R[src]

Bit 31 - B1439

impl R<u32, Reg<u32, _MPCBB1_VCTR45>>[src]

pub fn b1440(&self) -> B1440_R[src]

Bit 0 - B1440

pub fn b1441(&self) -> B1441_R[src]

Bit 1 - B1441

pub fn b1442(&self) -> B1442_R[src]

Bit 2 - B1442

pub fn b1443(&self) -> B1443_R[src]

Bit 3 - B1443

pub fn b1444(&self) -> B1444_R[src]

Bit 4 - B1444

pub fn b1445(&self) -> B1445_R[src]

Bit 5 - B1445

pub fn b1446(&self) -> B1446_R[src]

Bit 6 - B1446

pub fn b1447(&self) -> B1447_R[src]

Bit 7 - B1447

pub fn b1448(&self) -> B1448_R[src]

Bit 8 - B1448

pub fn b1449(&self) -> B1449_R[src]

Bit 9 - B1449

pub fn b1450(&self) -> B1450_R[src]

Bit 10 - B1450

pub fn b1451(&self) -> B1451_R[src]

Bit 11 - B1451

pub fn b1452(&self) -> B1452_R[src]

Bit 12 - B1452

pub fn b1453(&self) -> B1453_R[src]

Bit 13 - B1453

pub fn b1454(&self) -> B1454_R[src]

Bit 14 - B1454

pub fn b1455(&self) -> B1455_R[src]

Bit 15 - B1455

pub fn b1456(&self) -> B1456_R[src]

Bit 16 - B1456

pub fn b1457(&self) -> B1457_R[src]

Bit 17 - B1457

pub fn b1458(&self) -> B1458_R[src]

Bit 18 - B1458

pub fn b1459(&self) -> B1459_R[src]

Bit 19 - B1459

pub fn b1460(&self) -> B1460_R[src]

Bit 20 - B1460

pub fn b1461(&self) -> B1461_R[src]

Bit 21 - B1461

pub fn b1462(&self) -> B1462_R[src]

Bit 22 - B1462

pub fn b1463(&self) -> B1463_R[src]

Bit 23 - B1463

pub fn b1464(&self) -> B1464_R[src]

Bit 24 - B1464

pub fn b1465(&self) -> B1465_R[src]

Bit 25 - B1465

pub fn b1466(&self) -> B1466_R[src]

Bit 26 - B1466

pub fn b1467(&self) -> B1467_R[src]

Bit 27 - B1467

pub fn b1468(&self) -> B1468_R[src]

Bit 28 - B1468

pub fn b1469(&self) -> B1469_R[src]

Bit 29 - B1469

pub fn b1470(&self) -> B1470_R[src]

Bit 30 - B1470

pub fn b1471(&self) -> B1471_R[src]

Bit 31 - B1471

impl R<u32, Reg<u32, _MPCBB1_VCTR46>>[src]

pub fn b1472(&self) -> B1472_R[src]

Bit 0 - B1472

pub fn b1473(&self) -> B1473_R[src]

Bit 1 - B1473

pub fn b1474(&self) -> B1474_R[src]

Bit 2 - B1474

pub fn b1475(&self) -> B1475_R[src]

Bit 3 - B1475

pub fn b1476(&self) -> B1476_R[src]

Bit 4 - B1476

pub fn b1477(&self) -> B1477_R[src]

Bit 5 - B1477

pub fn b1478(&self) -> B1478_R[src]

Bit 6 - B1478

pub fn b1479(&self) -> B1479_R[src]

Bit 7 - B1479

pub fn b1480(&self) -> B1480_R[src]

Bit 8 - B1480

pub fn b1481(&self) -> B1481_R[src]

Bit 9 - B1481

pub fn b1482(&self) -> B1482_R[src]

Bit 10 - B1482

pub fn b1483(&self) -> B1483_R[src]

Bit 11 - B1483

pub fn b1484(&self) -> B1484_R[src]

Bit 12 - B1484

pub fn b1485(&self) -> B1485_R[src]

Bit 13 - B1485

pub fn b1486(&self) -> B1486_R[src]

Bit 14 - B1486

pub fn b1487(&self) -> B1487_R[src]

Bit 15 - B1487

pub fn b1488(&self) -> B1488_R[src]

Bit 16 - B1488

pub fn b1489(&self) -> B1489_R[src]

Bit 17 - B1489

pub fn b1490(&self) -> B1490_R[src]

Bit 18 - B1490

pub fn b1491(&self) -> B1491_R[src]

Bit 19 - B1491

pub fn b1492(&self) -> B1492_R[src]

Bit 20 - B1492

pub fn b1493(&self) -> B1493_R[src]

Bit 21 - B1493

pub fn b1494(&self) -> B1494_R[src]

Bit 22 - B1494

pub fn b1495(&self) -> B1495_R[src]

Bit 23 - B1495

pub fn b1496(&self) -> B1496_R[src]

Bit 24 - B1496

pub fn b1497(&self) -> B1497_R[src]

Bit 25 - B1497

pub fn b1498(&self) -> B1498_R[src]

Bit 26 - B1498

pub fn b1499(&self) -> B1499_R[src]

Bit 27 - B1499

pub fn b1500(&self) -> B1500_R[src]

Bit 28 - B1500

pub fn b1501(&self) -> B1501_R[src]

Bit 29 - B1501

pub fn b1502(&self) -> B1502_R[src]

Bit 30 - B1502

pub fn b1503(&self) -> B1503_R[src]

Bit 31 - B1503

impl R<u32, Reg<u32, _MPCBB1_VCTR47>>[src]

pub fn b1504(&self) -> B1504_R[src]

Bit 0 - B1504

pub fn b1505(&self) -> B1505_R[src]

Bit 1 - B1505

pub fn b1506(&self) -> B1506_R[src]

Bit 2 - B1506

pub fn b1507(&self) -> B1507_R[src]

Bit 3 - B1507

pub fn b1508(&self) -> B1508_R[src]

Bit 4 - B1508

pub fn b1509(&self) -> B1509_R[src]

Bit 5 - B1509

pub fn b1510(&self) -> B1510_R[src]

Bit 6 - B1510

pub fn b1511(&self) -> B1511_R[src]

Bit 7 - B1511

pub fn b1512(&self) -> B1512_R[src]

Bit 8 - B1512

pub fn b1513(&self) -> B1513_R[src]

Bit 9 - B1513

pub fn b1514(&self) -> B1514_R[src]

Bit 10 - B1514

pub fn b1515(&self) -> B1515_R[src]

Bit 11 - B1515

pub fn b1516(&self) -> B1516_R[src]

Bit 12 - B1516

pub fn b1517(&self) -> B1517_R[src]

Bit 13 - B1517

pub fn b1518(&self) -> B1518_R[src]

Bit 14 - B1518

pub fn b1519(&self) -> B1519_R[src]

Bit 15 - B1519

pub fn b1520(&self) -> B1520_R[src]

Bit 16 - B1520

pub fn b1521(&self) -> B1521_R[src]

Bit 17 - B1521

pub fn b1522(&self) -> B1522_R[src]

Bit 18 - B1522

pub fn b1523(&self) -> B1523_R[src]

Bit 19 - B1523

pub fn b1524(&self) -> B1524_R[src]

Bit 20 - B1524

pub fn b1525(&self) -> B1525_R[src]

Bit 21 - B1525

pub fn b1526(&self) -> B1526_R[src]

Bit 22 - B1526

pub fn b1527(&self) -> B1527_R[src]

Bit 23 - B1527

pub fn b1528(&self) -> B1528_R[src]

Bit 24 - B1528

pub fn b1529(&self) -> B1529_R[src]

Bit 25 - B1529

pub fn b1530(&self) -> B1530_R[src]

Bit 26 - B1530

pub fn b1531(&self) -> B1531_R[src]

Bit 27 - B1531

pub fn b1532(&self) -> B1532_R[src]

Bit 28 - B1532

pub fn b1533(&self) -> B1533_R[src]

Bit 29 - B1533

pub fn b1534(&self) -> B1534_R[src]

Bit 30 - B1534

pub fn b1535(&self) -> B1535_R[src]

Bit 31 - B1535

impl R<u32, Reg<u32, _MPCBB1_VCTR48>>[src]

pub fn b1536(&self) -> B1536_R[src]

Bit 0 - B1536

pub fn b1537(&self) -> B1537_R[src]

Bit 1 - B1537

pub fn b1538(&self) -> B1538_R[src]

Bit 2 - B1538

pub fn b1539(&self) -> B1539_R[src]

Bit 3 - B1539

pub fn b1540(&self) -> B1540_R[src]

Bit 4 - B1540

pub fn b1541(&self) -> B1541_R[src]

Bit 5 - B1541

pub fn b1542(&self) -> B1542_R[src]

Bit 6 - B1542

pub fn b1543(&self) -> B1543_R[src]

Bit 7 - B1543

pub fn b1544(&self) -> B1544_R[src]

Bit 8 - B1544

pub fn b1545(&self) -> B1545_R[src]

Bit 9 - B1545

pub fn b1546(&self) -> B1546_R[src]

Bit 10 - B1546

pub fn b1547(&self) -> B1547_R[src]

Bit 11 - B1547

pub fn b1548(&self) -> B1548_R[src]

Bit 12 - B1548

pub fn b1549(&self) -> B1549_R[src]

Bit 13 - B1549

pub fn b1550(&self) -> B1550_R[src]

Bit 14 - B1550

pub fn b1551(&self) -> B1551_R[src]

Bit 15 - B1551

pub fn b1552(&self) -> B1552_R[src]

Bit 16 - B1552

pub fn b1553(&self) -> B1553_R[src]

Bit 17 - B1553

pub fn b1554(&self) -> B1554_R[src]

Bit 18 - B1554

pub fn b1555(&self) -> B1555_R[src]

Bit 19 - B1555

pub fn b1556(&self) -> B1556_R[src]

Bit 20 - B1556

pub fn b1557(&self) -> B1557_R[src]

Bit 21 - B1557

pub fn b1558(&self) -> B1558_R[src]

Bit 22 - B1558

pub fn b1559(&self) -> B1559_R[src]

Bit 23 - B1559

pub fn b1560(&self) -> B1560_R[src]

Bit 24 - B1560

pub fn b1561(&self) -> B1561_R[src]

Bit 25 - B1561

pub fn b1562(&self) -> B1562_R[src]

Bit 26 - B1562

pub fn b1563(&self) -> B1563_R[src]

Bit 27 - B1563

pub fn b1564(&self) -> B1564_R[src]

Bit 28 - B1564

pub fn b1565(&self) -> B1565_R[src]

Bit 29 - B1565

pub fn b1566(&self) -> B1566_R[src]

Bit 30 - B1566

pub fn b1567(&self) -> B1567_R[src]

Bit 31 - B1567

impl R<u32, Reg<u32, _MPCBB1_VCTR49>>[src]

pub fn b1568(&self) -> B1568_R[src]

Bit 0 - B1568

pub fn b1569(&self) -> B1569_R[src]

Bit 1 - B1569

pub fn b1570(&self) -> B1570_R[src]

Bit 2 - B1570

pub fn b1571(&self) -> B1571_R[src]

Bit 3 - B1571

pub fn b1572(&self) -> B1572_R[src]

Bit 4 - B1572

pub fn b1573(&self) -> B1573_R[src]

Bit 5 - B1573

pub fn b1574(&self) -> B1574_R[src]

Bit 6 - B1574

pub fn b1575(&self) -> B1575_R[src]

Bit 7 - B1575

pub fn b1576(&self) -> B1576_R[src]

Bit 8 - B1576

pub fn b1577(&self) -> B1577_R[src]

Bit 9 - B1577

pub fn b1578(&self) -> B1578_R[src]

Bit 10 - B1578

pub fn b1579(&self) -> B1579_R[src]

Bit 11 - B1579

pub fn b1580(&self) -> B1580_R[src]

Bit 12 - B1580

pub fn b1581(&self) -> B1581_R[src]

Bit 13 - B1581

pub fn b1582(&self) -> B1582_R[src]

Bit 14 - B1582

pub fn b1583(&self) -> B1583_R[src]

Bit 15 - B1583

pub fn b1584(&self) -> B1584_R[src]

Bit 16 - B1584

pub fn b1585(&self) -> B1585_R[src]

Bit 17 - B1585

pub fn b1586(&self) -> B1586_R[src]

Bit 18 - B1586

pub fn b1587(&self) -> B1587_R[src]

Bit 19 - B1587

pub fn b1588(&self) -> B1588_R[src]

Bit 20 - B1588

pub fn b1589(&self) -> B1589_R[src]

Bit 21 - B1589

pub fn b1590(&self) -> B1590_R[src]

Bit 22 - B1590

pub fn b1591(&self) -> B1591_R[src]

Bit 23 - B1591

pub fn b1592(&self) -> B1592_R[src]

Bit 24 - B1592

pub fn b1593(&self) -> B1593_R[src]

Bit 25 - B1593

pub fn b1594(&self) -> B1594_R[src]

Bit 26 - B1594

pub fn b1595(&self) -> B1595_R[src]

Bit 27 - B1595

pub fn b1596(&self) -> B1596_R[src]

Bit 28 - B1596

pub fn b1597(&self) -> B1597_R[src]

Bit 29 - B1597

pub fn b1598(&self) -> B1598_R[src]

Bit 30 - B1598

pub fn b1599(&self) -> B1599_R[src]

Bit 31 - B1599

impl R<u32, Reg<u32, _MPCBB1_VCTR50>>[src]

pub fn b1600(&self) -> B1600_R[src]

Bit 0 - B1600

pub fn b1601(&self) -> B1601_R[src]

Bit 1 - B1601

pub fn b1602(&self) -> B1602_R[src]

Bit 2 - B1602

pub fn b1603(&self) -> B1603_R[src]

Bit 3 - B1603

pub fn b1604(&self) -> B1604_R[src]

Bit 4 - B1604

pub fn b1605(&self) -> B1605_R[src]

Bit 5 - B1605

pub fn b1606(&self) -> B1606_R[src]

Bit 6 - B1606

pub fn b1607(&self) -> B1607_R[src]

Bit 7 - B1607

pub fn b1608(&self) -> B1608_R[src]

Bit 8 - B1608

pub fn b1609(&self) -> B1609_R[src]

Bit 9 - B1609

pub fn b1610(&self) -> B1610_R[src]

Bit 10 - B1610

pub fn b1611(&self) -> B1611_R[src]

Bit 11 - B1611

pub fn b1612(&self) -> B1612_R[src]

Bit 12 - B1612

pub fn b1613(&self) -> B1613_R[src]

Bit 13 - B1613

pub fn b1614(&self) -> B1614_R[src]

Bit 14 - B1614

pub fn b1615(&self) -> B1615_R[src]

Bit 15 - B1615

pub fn b1616(&self) -> B1616_R[src]

Bit 16 - B1616

pub fn b1617(&self) -> B1617_R[src]

Bit 17 - B1617

pub fn b1618(&self) -> B1618_R[src]

Bit 18 - B1618

pub fn b1619(&self) -> B1619_R[src]

Bit 19 - B1619

pub fn b1620(&self) -> B1620_R[src]

Bit 20 - B1620

pub fn b1621(&self) -> B1621_R[src]

Bit 21 - B1621

pub fn b1622(&self) -> B1622_R[src]

Bit 22 - B1622

pub fn b1623(&self) -> B1623_R[src]

Bit 23 - B1623

pub fn b1624(&self) -> B1624_R[src]

Bit 24 - B1624

pub fn b1625(&self) -> B1625_R[src]

Bit 25 - B1625

pub fn b1626(&self) -> B1626_R[src]

Bit 26 - B1626

pub fn b1627(&self) -> B1627_R[src]

Bit 27 - B1627

pub fn b1628(&self) -> B1628_R[src]

Bit 28 - B1628

pub fn b1629(&self) -> B1629_R[src]

Bit 29 - B1629

pub fn b1630(&self) -> B1630_R[src]

Bit 30 - B1630

pub fn b1631(&self) -> B1631_R[src]

Bit 31 - B1631

impl R<u32, Reg<u32, _MPCBB1_VCTR51>>[src]

pub fn b1632(&self) -> B1632_R[src]

Bit 0 - B1632

pub fn b1633(&self) -> B1633_R[src]

Bit 1 - B1633

pub fn b1634(&self) -> B1634_R[src]

Bit 2 - B1634

pub fn b1635(&self) -> B1635_R[src]

Bit 3 - B1635

pub fn b1636(&self) -> B1636_R[src]

Bit 4 - B1636

pub fn b1637(&self) -> B1637_R[src]

Bit 5 - B1637

pub fn b1638(&self) -> B1638_R[src]

Bit 6 - B1638

pub fn b1639(&self) -> B1639_R[src]

Bit 7 - B1639

pub fn b1640(&self) -> B1640_R[src]

Bit 8 - B1640

pub fn b1641(&self) -> B1641_R[src]

Bit 9 - B1641

pub fn b1642(&self) -> B1642_R[src]

Bit 10 - B1642

pub fn b1643(&self) -> B1643_R[src]

Bit 11 - B1643

pub fn b1644(&self) -> B1644_R[src]

Bit 12 - B1644

pub fn b1645(&self) -> B1645_R[src]

Bit 13 - B1645

pub fn b1646(&self) -> B1646_R[src]

Bit 14 - B1646

pub fn b1647(&self) -> B1647_R[src]

Bit 15 - B1647

pub fn b1648(&self) -> B1648_R[src]

Bit 16 - B1648

pub fn b1649(&self) -> B1649_R[src]

Bit 17 - B1649

pub fn b1650(&self) -> B1650_R[src]

Bit 18 - B1650

pub fn b1651(&self) -> B1651_R[src]

Bit 19 - B1651

pub fn b1652(&self) -> B1652_R[src]

Bit 20 - B1652

pub fn b1653(&self) -> B1653_R[src]

Bit 21 - B1653

pub fn b1654(&self) -> B1654_R[src]

Bit 22 - B1654

pub fn b1655(&self) -> B1655_R[src]

Bit 23 - B1655

pub fn b1656(&self) -> B1656_R[src]

Bit 24 - B1656

pub fn b1657(&self) -> B1657_R[src]

Bit 25 - B1657

pub fn b1658(&self) -> B1658_R[src]

Bit 26 - B1658

pub fn b1659(&self) -> B1659_R[src]

Bit 27 - B1659

pub fn b1660(&self) -> B1660_R[src]

Bit 28 - B1660

pub fn b1661(&self) -> B1661_R[src]

Bit 29 - B1661

pub fn b1662(&self) -> B1662_R[src]

Bit 30 - B1662

pub fn b1663(&self) -> B1663_R[src]

Bit 31 - B1663

impl R<u32, Reg<u32, _MPCBB1_VCTR52>>[src]

pub fn b1664(&self) -> B1664_R[src]

Bit 0 - B1664

pub fn b1665(&self) -> B1665_R[src]

Bit 1 - B1665

pub fn b1666(&self) -> B1666_R[src]

Bit 2 - B1666

pub fn b1667(&self) -> B1667_R[src]

Bit 3 - B1667

pub fn b1668(&self) -> B1668_R[src]

Bit 4 - B1668

pub fn b1669(&self) -> B1669_R[src]

Bit 5 - B1669

pub fn b1670(&self) -> B1670_R[src]

Bit 6 - B1670

pub fn b1671(&self) -> B1671_R[src]

Bit 7 - B1671

pub fn b1672(&self) -> B1672_R[src]

Bit 8 - B1672

pub fn b1673(&self) -> B1673_R[src]

Bit 9 - B1673

pub fn b1674(&self) -> B1674_R[src]

Bit 10 - B1674

pub fn b1675(&self) -> B1675_R[src]

Bit 11 - B1675

pub fn b1676(&self) -> B1676_R[src]

Bit 12 - B1676

pub fn b1677(&self) -> B1677_R[src]

Bit 13 - B1677

pub fn b1678(&self) -> B1678_R[src]

Bit 14 - B1678

pub fn b1679(&self) -> B1679_R[src]

Bit 15 - B1679

pub fn b1680(&self) -> B1680_R[src]

Bit 16 - B1680

pub fn b1681(&self) -> B1681_R[src]

Bit 17 - B1681

pub fn b1682(&self) -> B1682_R[src]

Bit 18 - B1682

pub fn b1683(&self) -> B1683_R[src]

Bit 19 - B1683

pub fn b1684(&self) -> B1684_R[src]

Bit 20 - B1684

pub fn b1685(&self) -> B1685_R[src]

Bit 21 - B1685

pub fn b1686(&self) -> B1686_R[src]

Bit 22 - B1686

pub fn b1687(&self) -> B1687_R[src]

Bit 23 - B1687

pub fn b1688(&self) -> B1688_R[src]

Bit 24 - B1688

pub fn b1689(&self) -> B1689_R[src]

Bit 25 - B1689

pub fn b1690(&self) -> B1690_R[src]

Bit 26 - B1690

pub fn b1691(&self) -> B1691_R[src]

Bit 27 - B1691

pub fn b1692(&self) -> B1692_R[src]

Bit 28 - B1692

pub fn b1693(&self) -> B1693_R[src]

Bit 29 - B1693

pub fn b1694(&self) -> B1694_R[src]

Bit 30 - B1694

pub fn b1695(&self) -> B1695_R[src]

Bit 31 - B1695

impl R<u32, Reg<u32, _MPCBB1_VCTR53>>[src]

pub fn b1696(&self) -> B1696_R[src]

Bit 0 - B1696

pub fn b1697(&self) -> B1697_R[src]

Bit 1 - B1697

pub fn b1698(&self) -> B1698_R[src]

Bit 2 - B1698

pub fn b1699(&self) -> B1699_R[src]

Bit 3 - B1699

pub fn b1700(&self) -> B1700_R[src]

Bit 4 - B1700

pub fn b1701(&self) -> B1701_R[src]

Bit 5 - B1701

pub fn b1702(&self) -> B1702_R[src]

Bit 6 - B1702

pub fn b1703(&self) -> B1703_R[src]

Bit 7 - B1703

pub fn b1704(&self) -> B1704_R[src]

Bit 8 - B1704

pub fn b1705(&self) -> B1705_R[src]

Bit 9 - B1705

pub fn b1706(&self) -> B1706_R[src]

Bit 10 - B1706

pub fn b1707(&self) -> B1707_R[src]

Bit 11 - B1707

pub fn b1708(&self) -> B1708_R[src]

Bit 12 - B1708

pub fn b1709(&self) -> B1709_R[src]

Bit 13 - B1709

pub fn b1710(&self) -> B1710_R[src]

Bit 14 - B1710

pub fn b1711(&self) -> B1711_R[src]

Bit 15 - B1711

pub fn b1712(&self) -> B1712_R[src]

Bit 16 - B1712

pub fn b1713(&self) -> B1713_R[src]

Bit 17 - B1713

pub fn b1714(&self) -> B1714_R[src]

Bit 18 - B1714

pub fn b1715(&self) -> B1715_R[src]

Bit 19 - B1715

pub fn b1716(&self) -> B1716_R[src]

Bit 20 - B1716

pub fn b1717(&self) -> B1717_R[src]

Bit 21 - B1717

pub fn b1718(&self) -> B1718_R[src]

Bit 22 - B1718

pub fn b1719(&self) -> B1719_R[src]

Bit 23 - B1719

pub fn b1720(&self) -> B1720_R[src]

Bit 24 - B1720

pub fn b1721(&self) -> B1721_R[src]

Bit 25 - B1721

pub fn b1722(&self) -> B1722_R[src]

Bit 26 - B1722

pub fn b1723(&self) -> B1723_R[src]

Bit 27 - B1723

pub fn b1724(&self) -> B1724_R[src]

Bit 28 - B1724

pub fn b1725(&self) -> B1725_R[src]

Bit 29 - B1725

pub fn b1726(&self) -> B1726_R[src]

Bit 30 - B1726

pub fn b1727(&self) -> B1727_R[src]

Bit 31 - B1727

impl R<u32, Reg<u32, _MPCBB1_VCTR54>>[src]

pub fn b1728(&self) -> B1728_R[src]

Bit 0 - B1728

pub fn b1729(&self) -> B1729_R[src]

Bit 1 - B1729

pub fn b1730(&self) -> B1730_R[src]

Bit 2 - B1730

pub fn b1731(&self) -> B1731_R[src]

Bit 3 - B1731

pub fn b1732(&self) -> B1732_R[src]

Bit 4 - B1732

pub fn b1733(&self) -> B1733_R[src]

Bit 5 - B1733

pub fn b1734(&self) -> B1734_R[src]

Bit 6 - B1734

pub fn b1735(&self) -> B1735_R[src]

Bit 7 - B1735

pub fn b1736(&self) -> B1736_R[src]

Bit 8 - B1736

pub fn b1737(&self) -> B1737_R[src]

Bit 9 - B1737

pub fn b1738(&self) -> B1738_R[src]

Bit 10 - B1738

pub fn b1739(&self) -> B1739_R[src]

Bit 11 - B1739

pub fn b1740(&self) -> B1740_R[src]

Bit 12 - B1740

pub fn b1741(&self) -> B1741_R[src]

Bit 13 - B1741

pub fn b1742(&self) -> B1742_R[src]

Bit 14 - B1742

pub fn b1743(&self) -> B1743_R[src]

Bit 15 - B1743

pub fn b1744(&self) -> B1744_R[src]

Bit 16 - B1744

pub fn b1745(&self) -> B1745_R[src]

Bit 17 - B1745

pub fn b1746(&self) -> B1746_R[src]

Bit 18 - B1746

pub fn b1747(&self) -> B1747_R[src]

Bit 19 - B1747

pub fn b1748(&self) -> B1748_R[src]

Bit 20 - B1748

pub fn b1749(&self) -> B1749_R[src]

Bit 21 - B1749

pub fn b1750(&self) -> B1750_R[src]

Bit 22 - B1750

pub fn b1751(&self) -> B1751_R[src]

Bit 23 - B1751

pub fn b1752(&self) -> B1752_R[src]

Bit 24 - B1752

pub fn b1753(&self) -> B1753_R[src]

Bit 25 - B1753

pub fn b1754(&self) -> B1754_R[src]

Bit 26 - B1754

pub fn b1755(&self) -> B1755_R[src]

Bit 27 - B1755

pub fn b1756(&self) -> B1756_R[src]

Bit 28 - B1756

pub fn b1757(&self) -> B1757_R[src]

Bit 29 - B1757

pub fn b1758(&self) -> B1758_R[src]

Bit 30 - B1758

pub fn b1759(&self) -> B1759_R[src]

Bit 31 - B1759

impl R<u32, Reg<u32, _MPCBB1_VCTR55>>[src]

pub fn b1760(&self) -> B1760_R[src]

Bit 0 - B1760

pub fn b1761(&self) -> B1761_R[src]

Bit 1 - B1761

pub fn b1762(&self) -> B1762_R[src]

Bit 2 - B1762

pub fn b1763(&self) -> B1763_R[src]

Bit 3 - B1763

pub fn b1764(&self) -> B1764_R[src]

Bit 4 - B1764

pub fn b1765(&self) -> B1765_R[src]

Bit 5 - B1765

pub fn b1766(&self) -> B1766_R[src]

Bit 6 - B1766

pub fn b1767(&self) -> B1767_R[src]

Bit 7 - B1767

pub fn b1768(&self) -> B1768_R[src]

Bit 8 - B1768

pub fn b1769(&self) -> B1769_R[src]

Bit 9 - B1769

pub fn b1770(&self) -> B1770_R[src]

Bit 10 - B1770

pub fn b1771(&self) -> B1771_R[src]

Bit 11 - B1771

pub fn b1772(&self) -> B1772_R[src]

Bit 12 - B1772

pub fn b1773(&self) -> B1773_R[src]

Bit 13 - B1773

pub fn b1774(&self) -> B1774_R[src]

Bit 14 - B1774

pub fn b1775(&self) -> B1775_R[src]

Bit 15 - B1775

pub fn b1776(&self) -> B1776_R[src]

Bit 16 - B1776

pub fn b1777(&self) -> B1777_R[src]

Bit 17 - B1777

pub fn b1778(&self) -> B1778_R[src]

Bit 18 - B1778

pub fn b1779(&self) -> B1779_R[src]

Bit 19 - B1779

pub fn b1780(&self) -> B1780_R[src]

Bit 20 - B1780

pub fn b1781(&self) -> B1781_R[src]

Bit 21 - B1781

pub fn b1782(&self) -> B1782_R[src]

Bit 22 - B1782

pub fn b1783(&self) -> B1783_R[src]

Bit 23 - B1783

pub fn b1784(&self) -> B1784_R[src]

Bit 24 - B1784

pub fn b1785(&self) -> B1785_R[src]

Bit 25 - B1785

pub fn b1786(&self) -> B1786_R[src]

Bit 26 - B1786

pub fn b1787(&self) -> B1787_R[src]

Bit 27 - B1787

pub fn b1788(&self) -> B1788_R[src]

Bit 28 - B1788

pub fn b1789(&self) -> B1789_R[src]

Bit 29 - B1789

pub fn b1790(&self) -> B1790_R[src]

Bit 30 - B1790

pub fn b1791(&self) -> B1791_R[src]

Bit 31 - B1791

impl R<u32, Reg<u32, _MPCBB1_VCTR56>>[src]

pub fn b1792(&self) -> B1792_R[src]

Bit 0 - B1792

pub fn b1793(&self) -> B1793_R[src]

Bit 1 - B1793

pub fn b1794(&self) -> B1794_R[src]

Bit 2 - B1794

pub fn b1795(&self) -> B1795_R[src]

Bit 3 - B1795

pub fn b1796(&self) -> B1796_R[src]

Bit 4 - B1796

pub fn b1797(&self) -> B1797_R[src]

Bit 5 - B1797

pub fn b1798(&self) -> B1798_R[src]

Bit 6 - B1798

pub fn b1799(&self) -> B1799_R[src]

Bit 7 - B1799

pub fn b1800(&self) -> B1800_R[src]

Bit 8 - B1800

pub fn b1801(&self) -> B1801_R[src]

Bit 9 - B1801

pub fn b1802(&self) -> B1802_R[src]

Bit 10 - B1802

pub fn b1803(&self) -> B1803_R[src]

Bit 11 - B1803

pub fn b1804(&self) -> B1804_R[src]

Bit 12 - B1804

pub fn b1805(&self) -> B1805_R[src]

Bit 13 - B1805

pub fn b1806(&self) -> B1806_R[src]

Bit 14 - B1806

pub fn b1807(&self) -> B1807_R[src]

Bit 15 - B1807

pub fn b1808(&self) -> B1808_R[src]

Bit 16 - B1808

pub fn b1809(&self) -> B1809_R[src]

Bit 17 - B1809

pub fn b1810(&self) -> B1810_R[src]

Bit 18 - B1810

pub fn b1811(&self) -> B1811_R[src]

Bit 19 - B1811

pub fn b1812(&self) -> B1812_R[src]

Bit 20 - B1812

pub fn b1813(&self) -> B1813_R[src]

Bit 21 - B1813

pub fn b1814(&self) -> B1814_R[src]

Bit 22 - B1814

pub fn b1815(&self) -> B1815_R[src]

Bit 23 - B1815

pub fn b1816(&self) -> B1816_R[src]

Bit 24 - B1816

pub fn b1817(&self) -> B1817_R[src]

Bit 25 - B1817

pub fn b1818(&self) -> B1818_R[src]

Bit 26 - B1818

pub fn b1819(&self) -> B1819_R[src]

Bit 27 - B1819

pub fn b1820(&self) -> B1820_R[src]

Bit 28 - B1820

pub fn b1821(&self) -> B1821_R[src]

Bit 29 - B1821

pub fn b1822(&self) -> B1822_R[src]

Bit 30 - B1822

pub fn b1823(&self) -> B1823_R[src]

Bit 31 - B1823

impl R<u32, Reg<u32, _MPCBB1_VCTR57>>[src]

pub fn b1824(&self) -> B1824_R[src]

Bit 0 - B1824

pub fn b1825(&self) -> B1825_R[src]

Bit 1 - B1825

pub fn b1826(&self) -> B1826_R[src]

Bit 2 - B1826

pub fn b1827(&self) -> B1827_R[src]

Bit 3 - B1827

pub fn b1828(&self) -> B1828_R[src]

Bit 4 - B1828

pub fn b1829(&self) -> B1829_R[src]

Bit 5 - B1829

pub fn b1830(&self) -> B1830_R[src]

Bit 6 - B1830

pub fn b1831(&self) -> B1831_R[src]

Bit 7 - B1831

pub fn b1832(&self) -> B1832_R[src]

Bit 8 - B1832

pub fn b1833(&self) -> B1833_R[src]

Bit 9 - B1833

pub fn b1834(&self) -> B1834_R[src]

Bit 10 - B1834

pub fn b1835(&self) -> B1835_R[src]

Bit 11 - B1835

pub fn b1836(&self) -> B1836_R[src]

Bit 12 - B1836

pub fn b1837(&self) -> B1837_R[src]

Bit 13 - B1837

pub fn b1838(&self) -> B1838_R[src]

Bit 14 - B1838

pub fn b1839(&self) -> B1839_R[src]

Bit 15 - B1839

pub fn b1840(&self) -> B1840_R[src]

Bit 16 - B1840

pub fn b1841(&self) -> B1841_R[src]

Bit 17 - B1841

pub fn b1842(&self) -> B1842_R[src]

Bit 18 - B1842

pub fn b1843(&self) -> B1843_R[src]

Bit 19 - B1843

pub fn b1844(&self) -> B1844_R[src]

Bit 20 - B1844

pub fn b1845(&self) -> B1845_R[src]

Bit 21 - B1845

pub fn b1846(&self) -> B1846_R[src]

Bit 22 - B1846

pub fn b1847(&self) -> B1847_R[src]

Bit 23 - B1847

pub fn b1848(&self) -> B1848_R[src]

Bit 24 - B1848

pub fn b1849(&self) -> B1849_R[src]

Bit 25 - B1849

pub fn b1850(&self) -> B1850_R[src]

Bit 26 - B1850

pub fn b1851(&self) -> B1851_R[src]

Bit 27 - B1851

pub fn b1852(&self) -> B1852_R[src]

Bit 28 - B1852

pub fn b1853(&self) -> B1853_R[src]

Bit 29 - B1853

pub fn b1854(&self) -> B1854_R[src]

Bit 30 - B1854

pub fn b1855(&self) -> B1855_R[src]

Bit 31 - B1855

impl R<u32, Reg<u32, _MPCBB1_VCTR58>>[src]

pub fn b1856(&self) -> B1856_R[src]

Bit 0 - B1856

pub fn b1857(&self) -> B1857_R[src]

Bit 1 - B1857

pub fn b1858(&self) -> B1858_R[src]

Bit 2 - B1858

pub fn b1859(&self) -> B1859_R[src]

Bit 3 - B1859

pub fn b1860(&self) -> B1860_R[src]

Bit 4 - B1860

pub fn b1861(&self) -> B1861_R[src]

Bit 5 - B1861

pub fn b1862(&self) -> B1862_R[src]

Bit 6 - B1862

pub fn b1863(&self) -> B1863_R[src]

Bit 7 - B1863

pub fn b1864(&self) -> B1864_R[src]

Bit 8 - B1864

pub fn b1865(&self) -> B1865_R[src]

Bit 9 - B1865

pub fn b1866(&self) -> B1866_R[src]

Bit 10 - B1866

pub fn b1867(&self) -> B1867_R[src]

Bit 11 - B1867

pub fn b1868(&self) -> B1868_R[src]

Bit 12 - B1868

pub fn b1869(&self) -> B1869_R[src]

Bit 13 - B1869

pub fn b1870(&self) -> B1870_R[src]

Bit 14 - B1870

pub fn b1871(&self) -> B1871_R[src]

Bit 15 - B1871

pub fn b1872(&self) -> B1872_R[src]

Bit 16 - B1872

pub fn b1873(&self) -> B1873_R[src]

Bit 17 - B1873

pub fn b1874(&self) -> B1874_R[src]

Bit 18 - B1874

pub fn b1875(&self) -> B1875_R[src]

Bit 19 - B1875

pub fn b1876(&self) -> B1876_R[src]

Bit 20 - B1876

pub fn b1877(&self) -> B1877_R[src]

Bit 21 - B1877

pub fn b1878(&self) -> B1878_R[src]

Bit 22 - B1878

pub fn b1879(&self) -> B1879_R[src]

Bit 23 - B1879

pub fn b1880(&self) -> B1880_R[src]

Bit 24 - B1880

pub fn b1881(&self) -> B1881_R[src]

Bit 25 - B1881

pub fn b1882(&self) -> B1882_R[src]

Bit 26 - B1882

pub fn b1883(&self) -> B1883_R[src]

Bit 27 - B1883

pub fn b1884(&self) -> B1884_R[src]

Bit 28 - B1884

pub fn b1885(&self) -> B1885_R[src]

Bit 29 - B1885

pub fn b1886(&self) -> B1886_R[src]

Bit 30 - B1886

pub fn b1887(&self) -> B1887_R[src]

Bit 31 - B1887

impl R<u32, Reg<u32, _MPCBB1_VCTR59>>[src]

pub fn b1888(&self) -> B1888_R[src]

Bit 0 - B1888

pub fn b1889(&self) -> B1889_R[src]

Bit 1 - B1889

pub fn b1890(&self) -> B1890_R[src]

Bit 2 - B1890

pub fn b1891(&self) -> B1891_R[src]

Bit 3 - B1891

pub fn b1892(&self) -> B1892_R[src]

Bit 4 - B1892

pub fn b1893(&self) -> B1893_R[src]

Bit 5 - B1893

pub fn b1894(&self) -> B1894_R[src]

Bit 6 - B1894

pub fn b1895(&self) -> B1895_R[src]

Bit 7 - B1895

pub fn b1896(&self) -> B1896_R[src]

Bit 8 - B1896

pub fn b1897(&self) -> B1897_R[src]

Bit 9 - B1897

pub fn b1898(&self) -> B1898_R[src]

Bit 10 - B1898

pub fn b1899(&self) -> B1899_R[src]

Bit 11 - B1899

pub fn b1900(&self) -> B1900_R[src]

Bit 12 - B1900

pub fn b1901(&self) -> B1901_R[src]

Bit 13 - B1901

pub fn b1902(&self) -> B1902_R[src]

Bit 14 - B1902

pub fn b1903(&self) -> B1903_R[src]

Bit 15 - B1903

pub fn b1904(&self) -> B1904_R[src]

Bit 16 - B1904

pub fn b1905(&self) -> B1905_R[src]

Bit 17 - B1905

pub fn b1906(&self) -> B1906_R[src]

Bit 18 - B1906

pub fn b1907(&self) -> B1907_R[src]

Bit 19 - B1907

pub fn b1908(&self) -> B1908_R[src]

Bit 20 - B1908

pub fn b1909(&self) -> B1909_R[src]

Bit 21 - B1909

pub fn b1910(&self) -> B1910_R[src]

Bit 22 - B1910

pub fn b1911(&self) -> B1911_R[src]

Bit 23 - B1911

pub fn b1912(&self) -> B1912_R[src]

Bit 24 - B1912

pub fn b1913(&self) -> B1913_R[src]

Bit 25 - B1913

pub fn b1914(&self) -> B1914_R[src]

Bit 26 - B1914

pub fn b1915(&self) -> B1915_R[src]

Bit 27 - B1915

pub fn b1916(&self) -> B1916_R[src]

Bit 28 - B1916

pub fn b1917(&self) -> B1917_R[src]

Bit 29 - B1917

pub fn b1918(&self) -> B1918_R[src]

Bit 30 - B1918

pub fn b1919(&self) -> B1919_R[src]

Bit 31 - B1919

impl R<u32, Reg<u32, _MPCBB1_VCTR60>>[src]

pub fn b1920(&self) -> B1920_R[src]

Bit 0 - B1920

pub fn b1921(&self) -> B1921_R[src]

Bit 1 - B1921

pub fn b1922(&self) -> B1922_R[src]

Bit 2 - B1922

pub fn b1923(&self) -> B1923_R[src]

Bit 3 - B1923

pub fn b1924(&self) -> B1924_R[src]

Bit 4 - B1924

pub fn b1925(&self) -> B1925_R[src]

Bit 5 - B1925

pub fn b1926(&self) -> B1926_R[src]

Bit 6 - B1926

pub fn b1927(&self) -> B1927_R[src]

Bit 7 - B1927

pub fn b1928(&self) -> B1928_R[src]

Bit 8 - B1928

pub fn b1929(&self) -> B1929_R[src]

Bit 9 - B1929

pub fn b1930(&self) -> B1930_R[src]

Bit 10 - B1930

pub fn b1931(&self) -> B1931_R[src]

Bit 11 - B1931

pub fn b1932(&self) -> B1932_R[src]

Bit 12 - B1932

pub fn b1933(&self) -> B1933_R[src]

Bit 13 - B1933

pub fn b1934(&self) -> B1934_R[src]

Bit 14 - B1934

pub fn b1935(&self) -> B1935_R[src]

Bit 15 - B1935

pub fn b1936(&self) -> B1936_R[src]

Bit 16 - B1936

pub fn b1937(&self) -> B1937_R[src]

Bit 17 - B1937

pub fn b1938(&self) -> B1938_R[src]

Bit 18 - B1938

pub fn b1939(&self) -> B1939_R[src]

Bit 19 - B1939

pub fn b1940(&self) -> B1940_R[src]

Bit 20 - B1940

pub fn b1941(&self) -> B1941_R[src]

Bit 21 - B1941

pub fn b1942(&self) -> B1942_R[src]

Bit 22 - B1942

pub fn b1943(&self) -> B1943_R[src]

Bit 23 - B1943

pub fn b1944(&self) -> B1944_R[src]

Bit 24 - B1944

pub fn b1945(&self) -> B1945_R[src]

Bit 25 - B1945

pub fn b1946(&self) -> B1946_R[src]

Bit 26 - B1946

pub fn b1947(&self) -> B1947_R[src]

Bit 27 - B1947

pub fn b1948(&self) -> B1948_R[src]

Bit 28 - B1948

pub fn b1949(&self) -> B1949_R[src]

Bit 29 - B1949

pub fn b1950(&self) -> B1950_R[src]

Bit 30 - B1950

pub fn b1951(&self) -> B1951_R[src]

Bit 31 - B1951

impl R<u32, Reg<u32, _MPCBB1_VCTR61>>[src]

pub fn b1952(&self) -> B1952_R[src]

Bit 0 - B1952

pub fn b1953(&self) -> B1953_R[src]

Bit 1 - B1953

pub fn b1954(&self) -> B1954_R[src]

Bit 2 - B1954

pub fn b1955(&self) -> B1955_R[src]

Bit 3 - B1955

pub fn b1956(&self) -> B1956_R[src]

Bit 4 - B1956

pub fn b1957(&self) -> B1957_R[src]

Bit 5 - B1957

pub fn b1958(&self) -> B1958_R[src]

Bit 6 - B1958

pub fn b1959(&self) -> B1959_R[src]

Bit 7 - B1959

pub fn b1960(&self) -> B1960_R[src]

Bit 8 - B1960

pub fn b1961(&self) -> B1961_R[src]

Bit 9 - B1961

pub fn b1962(&self) -> B1962_R[src]

Bit 10 - B1962

pub fn b1963(&self) -> B1963_R[src]

Bit 11 - B1963

pub fn b1964(&self) -> B1964_R[src]

Bit 12 - B1964

pub fn b1965(&self) -> B1965_R[src]

Bit 13 - B1965

pub fn b1966(&self) -> B1966_R[src]

Bit 14 - B1966

pub fn b1967(&self) -> B1967_R[src]

Bit 15 - B1967

pub fn b1968(&self) -> B1968_R[src]

Bit 16 - B1968

pub fn b1969(&self) -> B1969_R[src]

Bit 17 - B1969

pub fn b1970(&self) -> B1970_R[src]

Bit 18 - B1970

pub fn b1971(&self) -> B1971_R[src]

Bit 19 - B1971

pub fn b1972(&self) -> B1972_R[src]

Bit 20 - B1972

pub fn b1973(&self) -> B1973_R[src]

Bit 21 - B1973

pub fn b1974(&self) -> B1974_R[src]

Bit 22 - B1974

pub fn b1975(&self) -> B1975_R[src]

Bit 23 - B1975

pub fn b1976(&self) -> B1976_R[src]

Bit 24 - B1976

pub fn b1977(&self) -> B1977_R[src]

Bit 25 - B1977

pub fn b1978(&self) -> B1978_R[src]

Bit 26 - B1978

pub fn b1979(&self) -> B1979_R[src]

Bit 27 - B1979

pub fn b1980(&self) -> B1980_R[src]

Bit 28 - B1980

pub fn b1981(&self) -> B1981_R[src]

Bit 29 - B1981

pub fn b1982(&self) -> B1982_R[src]

Bit 30 - B1982

pub fn b1983(&self) -> B1983_R[src]

Bit 31 - B1983

impl R<u32, Reg<u32, _MPCBB1_VCTR62>>[src]

pub fn b1984(&self) -> B1984_R[src]

Bit 0 - B1984

pub fn b1985(&self) -> B1985_R[src]

Bit 1 - B1985

pub fn b1986(&self) -> B1986_R[src]

Bit 2 - B1986

pub fn b1987(&self) -> B1987_R[src]

Bit 3 - B1987

pub fn b1988(&self) -> B1988_R[src]

Bit 4 - B1988

pub fn b1989(&self) -> B1989_R[src]

Bit 5 - B1989

pub fn b1990(&self) -> B1990_R[src]

Bit 6 - B1990

pub fn b1991(&self) -> B1991_R[src]

Bit 7 - B1991

pub fn b1992(&self) -> B1992_R[src]

Bit 8 - B1992

pub fn b1993(&self) -> B1993_R[src]

Bit 9 - B1993

pub fn b1994(&self) -> B1994_R[src]

Bit 10 - B1994

pub fn b1995(&self) -> B1995_R[src]

Bit 11 - B1995

pub fn b1996(&self) -> B1996_R[src]

Bit 12 - B1996

pub fn b1997(&self) -> B1997_R[src]

Bit 13 - B1997

pub fn b1998(&self) -> B1998_R[src]

Bit 14 - B1998

pub fn b1999(&self) -> B1999_R[src]

Bit 15 - B1999

pub fn b2000(&self) -> B2000_R[src]

Bit 16 - B2000

pub fn b2001(&self) -> B2001_R[src]

Bit 17 - B2001

pub fn b2002(&self) -> B2002_R[src]

Bit 18 - B2002

pub fn b2003(&self) -> B2003_R[src]

Bit 19 - B2003

pub fn b2004(&self) -> B2004_R[src]

Bit 20 - B2004

pub fn b2005(&self) -> B2005_R[src]

Bit 21 - B2005

pub fn b2006(&self) -> B2006_R[src]

Bit 22 - B2006

pub fn b2007(&self) -> B2007_R[src]

Bit 23 - B2007

pub fn b2008(&self) -> B2008_R[src]

Bit 24 - B2008

pub fn b2009(&self) -> B2009_R[src]

Bit 25 - B2009

pub fn b2010(&self) -> B2010_R[src]

Bit 26 - B2010

pub fn b2011(&self) -> B2011_R[src]

Bit 27 - B2011

pub fn b2012(&self) -> B2012_R[src]

Bit 28 - B2012

pub fn b2013(&self) -> B2013_R[src]

Bit 29 - B2013

pub fn b2014(&self) -> B2014_R[src]

Bit 30 - B2014

pub fn b2015(&self) -> B2015_R[src]

Bit 31 - B2015

impl R<u32, Reg<u32, _MPCBB1_VCTR63>>[src]

pub fn b2016(&self) -> B2016_R[src]

Bit 0 - B2016

pub fn b2017(&self) -> B2017_R[src]

Bit 1 - B2017

pub fn b2018(&self) -> B2018_R[src]

Bit 2 - B2018

pub fn b2019(&self) -> B2019_R[src]

Bit 3 - B2019

pub fn b2020(&self) -> B2020_R[src]

Bit 4 - B2020

pub fn b2021(&self) -> B2021_R[src]

Bit 5 - B2021

pub fn b2022(&self) -> B2022_R[src]

Bit 6 - B2022

pub fn b2023(&self) -> B2023_R[src]

Bit 7 - B2023

pub fn b2024(&self) -> B2024_R[src]

Bit 8 - B2024

pub fn b2025(&self) -> B2025_R[src]

Bit 9 - B2025

pub fn b2026(&self) -> B2026_R[src]

Bit 10 - B2026

pub fn b2027(&self) -> B2027_R[src]

Bit 11 - B2027

pub fn b2028(&self) -> B2028_R[src]

Bit 12 - B2028

pub fn b2029(&self) -> B2029_R[src]

Bit 13 - B2029

pub fn b2030(&self) -> B2030_R[src]

Bit 14 - B2030

pub fn b2031(&self) -> B2031_R[src]

Bit 15 - B2031

pub fn b2032(&self) -> B2032_R[src]

Bit 16 - B2032

pub fn b2033(&self) -> B2033_R[src]

Bit 17 - B2033

pub fn b2034(&self) -> B2034_R[src]

Bit 18 - B2034

pub fn b2035(&self) -> B2035_R[src]

Bit 19 - B2035

pub fn b2036(&self) -> B2036_R[src]

Bit 20 - B2036

pub fn b2037(&self) -> B2037_R[src]

Bit 21 - B2037

pub fn b2038(&self) -> B2038_R[src]

Bit 22 - B2038

pub fn b2039(&self) -> B2039_R[src]

Bit 23 - B2039

pub fn b2040(&self) -> B2040_R[src]

Bit 24 - B2040

pub fn b2041(&self) -> B2041_R[src]

Bit 25 - B2041

pub fn b2042(&self) -> B2042_R[src]

Bit 26 - B2042

pub fn b2043(&self) -> B2043_R[src]

Bit 27 - B2043

pub fn b2044(&self) -> B2044_R[src]

Bit 28 - B2044

pub fn b2045(&self) -> B2045_R[src]

Bit 29 - B2045

pub fn b2046(&self) -> B2046_R[src]

Bit 30 - B2046

pub fn b2047(&self) -> B2047_R[src]

Bit 31 - B2047

impl R<u32, Reg<u32, _MPCBB2_CR>>[src]

pub fn lck(&self) -> LCK_R[src]

Bit 0 - LCK

pub fn invsecstate(&self) -> INVSECSTATE_R[src]

Bit 30 - INVSECSTATE

pub fn srwiladis(&self) -> SRWILADIS_R[src]

Bit 31 - SRWILADIS

impl R<u32, Reg<u32, _MPCBB2_LCKVTR1>>[src]

pub fn lcksb0(&self) -> LCKSB0_R[src]

Bit 0 - LCKSB0

pub fn lcksb1(&self) -> LCKSB1_R[src]

Bit 1 - LCKSB1

pub fn lcksb2(&self) -> LCKSB2_R[src]

Bit 2 - LCKSB2

pub fn lcksb3(&self) -> LCKSB3_R[src]

Bit 3 - LCKSB3

pub fn lcksb4(&self) -> LCKSB4_R[src]

Bit 4 - LCKSB4

pub fn lcksb5(&self) -> LCKSB5_R[src]

Bit 5 - LCKSB5

pub fn lcksb6(&self) -> LCKSB6_R[src]

Bit 6 - LCKSB6

pub fn lcksb7(&self) -> LCKSB7_R[src]

Bit 7 - LCKSB7

pub fn lcksb8(&self) -> LCKSB8_R[src]

Bit 8 - LCKSB8

pub fn lcksb9(&self) -> LCKSB9_R[src]

Bit 9 - LCKSB9

pub fn lcksb10(&self) -> LCKSB10_R[src]

Bit 10 - LCKSB10

pub fn lcksb11(&self) -> LCKSB11_R[src]

Bit 11 - LCKSB11

pub fn lcksb12(&self) -> LCKSB12_R[src]

Bit 12 - LCKSB12

pub fn lcksb13(&self) -> LCKSB13_R[src]

Bit 13 - LCKSB13

pub fn lcksb14(&self) -> LCKSB14_R[src]

Bit 14 - LCKSB14

pub fn lcksb15(&self) -> LCKSB15_R[src]

Bit 15 - LCKSB15

pub fn lcksb16(&self) -> LCKSB16_R[src]

Bit 16 - LCKSB16

pub fn lcksb17(&self) -> LCKSB17_R[src]

Bit 17 - LCKSB17

pub fn lcksb18(&self) -> LCKSB18_R[src]

Bit 18 - LCKSB18

pub fn lcksb19(&self) -> LCKSB19_R[src]

Bit 19 - LCKSB19

pub fn lcksb20(&self) -> LCKSB20_R[src]

Bit 20 - LCKSB20

pub fn lcksb21(&self) -> LCKSB21_R[src]

Bit 21 - LCKSB21

pub fn lcksb22(&self) -> LCKSB22_R[src]

Bit 22 - LCKSB22

pub fn lcksb23(&self) -> LCKSB23_R[src]

Bit 23 - LCKSB23

pub fn lcksb24(&self) -> LCKSB24_R[src]

Bit 24 - LCKSB24

pub fn lcksb25(&self) -> LCKSB25_R[src]

Bit 25 - LCKSB25

pub fn lcksb26(&self) -> LCKSB26_R[src]

Bit 26 - LCKSB26

pub fn lcksb27(&self) -> LCKSB27_R[src]

Bit 27 - LCKSB27

pub fn lcksb28(&self) -> LCKSB28_R[src]

Bit 28 - LCKSB28

pub fn lcksb29(&self) -> LCKSB29_R[src]

Bit 29 - LCKSB29

pub fn lcksb30(&self) -> LCKSB30_R[src]

Bit 30 - LCKSB30

pub fn lcksb31(&self) -> LCKSB31_R[src]

Bit 31 - LCKSB31

impl R<u32, Reg<u32, _MPCBB2_LCKVTR2>>[src]

pub fn lcksb32(&self) -> LCKSB32_R[src]

Bit 0 - LCKSB32

pub fn lcksb33(&self) -> LCKSB33_R[src]

Bit 1 - LCKSB33

pub fn lcksb34(&self) -> LCKSB34_R[src]

Bit 2 - LCKSB34

pub fn lcksb35(&self) -> LCKSB35_R[src]

Bit 3 - LCKSB35

pub fn lcksb36(&self) -> LCKSB36_R[src]

Bit 4 - LCKSB36

pub fn lcksb37(&self) -> LCKSB37_R[src]

Bit 5 - LCKSB37

pub fn lcksb38(&self) -> LCKSB38_R[src]

Bit 6 - LCKSB38

pub fn lcksb39(&self) -> LCKSB39_R[src]

Bit 7 - LCKSB39

pub fn lcksb40(&self) -> LCKSB40_R[src]

Bit 8 - LCKSB40

pub fn lcksb41(&self) -> LCKSB41_R[src]

Bit 9 - LCKSB41

pub fn lcksb42(&self) -> LCKSB42_R[src]

Bit 10 - LCKSB42

pub fn lcksb43(&self) -> LCKSB43_R[src]

Bit 11 - LCKSB43

pub fn lcksb44(&self) -> LCKSB44_R[src]

Bit 12 - LCKSB44

pub fn lcksb45(&self) -> LCKSB45_R[src]

Bit 13 - LCKSB45

pub fn lcksb46(&self) -> LCKSB46_R[src]

Bit 14 - LCKSB46

pub fn lcksb47(&self) -> LCKSB47_R[src]

Bit 15 - LCKSB47

pub fn lcksb48(&self) -> LCKSB48_R[src]

Bit 16 - LCKSB48

pub fn lcksb49(&self) -> LCKSB49_R[src]

Bit 17 - LCKSB49

pub fn lcksb50(&self) -> LCKSB50_R[src]

Bit 18 - LCKSB50

pub fn lcksb51(&self) -> LCKSB51_R[src]

Bit 19 - LCKSB51

pub fn lcksb52(&self) -> LCKSB52_R[src]

Bit 20 - LCKSB52

pub fn lcksb53(&self) -> LCKSB53_R[src]

Bit 21 - LCKSB53

pub fn lcksb54(&self) -> LCKSB54_R[src]

Bit 22 - LCKSB54

pub fn lcksb55(&self) -> LCKSB55_R[src]

Bit 23 - LCKSB55

pub fn lcksb56(&self) -> LCKSB56_R[src]

Bit 24 - LCKSB56

pub fn lcksb57(&self) -> LCKSB57_R[src]

Bit 25 - LCKSB57

pub fn lcksb58(&self) -> LCKSB58_R[src]

Bit 26 - LCKSB58

pub fn lcksb59(&self) -> LCKSB59_R[src]

Bit 27 - LCKSB59

pub fn lcksb60(&self) -> LCKSB60_R[src]

Bit 28 - LCKSB60

pub fn lcksb61(&self) -> LCKSB61_R[src]

Bit 29 - LCKSB61

pub fn lcksb62(&self) -> LCKSB62_R[src]

Bit 30 - LCKSB62

pub fn lcksb63(&self) -> LCKSB63_R[src]

Bit 31 - LCKSB63

impl R<u32, Reg<u32, _MPCBB2_VCTR0>>[src]

pub fn b0(&self) -> B0_R[src]

Bit 0 - B0

pub fn b1(&self) -> B1_R[src]

Bit 1 - B1

pub fn b2(&self) -> B2_R[src]

Bit 2 - B2

pub fn b3(&self) -> B3_R[src]

Bit 3 - B3

pub fn b4(&self) -> B4_R[src]

Bit 4 - B4

pub fn b5(&self) -> B5_R[src]

Bit 5 - B5

pub fn b6(&self) -> B6_R[src]

Bit 6 - B6

pub fn b7(&self) -> B7_R[src]

Bit 7 - B7

pub fn b8(&self) -> B8_R[src]

Bit 8 - B8

pub fn b9(&self) -> B9_R[src]

Bit 9 - B9

pub fn b10(&self) -> B10_R[src]

Bit 10 - B10

pub fn b11(&self) -> B11_R[src]

Bit 11 - B11

pub fn b12(&self) -> B12_R[src]

Bit 12 - B12

pub fn b13(&self) -> B13_R[src]

Bit 13 - B13

pub fn b14(&self) -> B14_R[src]

Bit 14 - B14

pub fn b15(&self) -> B15_R[src]

Bit 15 - B15

pub fn b16(&self) -> B16_R[src]

Bit 16 - B16

pub fn b17(&self) -> B17_R[src]

Bit 17 - B17

pub fn b18(&self) -> B18_R[src]

Bit 18 - B18

pub fn b19(&self) -> B19_R[src]

Bit 19 - B19

pub fn b20(&self) -> B20_R[src]

Bit 20 - B20

pub fn b21(&self) -> B21_R[src]

Bit 21 - B21

pub fn b22(&self) -> B22_R[src]

Bit 22 - B22

pub fn b23(&self) -> B23_R[src]

Bit 23 - B23

pub fn b24(&self) -> B24_R[src]

Bit 24 - B24

pub fn b25(&self) -> B25_R[src]

Bit 25 - B25

pub fn b26(&self) -> B26_R[src]

Bit 26 - B26

pub fn b27(&self) -> B27_R[src]

Bit 27 - B27

pub fn b28(&self) -> B28_R[src]

Bit 28 - B28

pub fn b29(&self) -> B29_R[src]

Bit 29 - B29

pub fn b30(&self) -> B30_R[src]

Bit 30 - B30

pub fn b31(&self) -> B31_R[src]

Bit 31 - B31

impl R<u32, Reg<u32, _MPCBB2_VCTR1>>[src]

pub fn b32(&self) -> B32_R[src]

Bit 0 - B32

pub fn b33(&self) -> B33_R[src]

Bit 1 - B33

pub fn b34(&self) -> B34_R[src]

Bit 2 - B34

pub fn b35(&self) -> B35_R[src]

Bit 3 - B35

pub fn b36(&self) -> B36_R[src]

Bit 4 - B36

pub fn b37(&self) -> B37_R[src]

Bit 5 - B37

pub fn b38(&self) -> B38_R[src]

Bit 6 - B38

pub fn b39(&self) -> B39_R[src]

Bit 7 - B39

pub fn b40(&self) -> B40_R[src]

Bit 8 - B40

pub fn b41(&self) -> B41_R[src]

Bit 9 - B41

pub fn b42(&self) -> B42_R[src]

Bit 10 - B42

pub fn b43(&self) -> B43_R[src]

Bit 11 - B43

pub fn b44(&self) -> B44_R[src]

Bit 12 - B44

pub fn b45(&self) -> B45_R[src]

Bit 13 - B45

pub fn b46(&self) -> B46_R[src]

Bit 14 - B46

pub fn b47(&self) -> B47_R[src]

Bit 15 - B47

pub fn b48(&self) -> B48_R[src]

Bit 16 - B48

pub fn b49(&self) -> B49_R[src]

Bit 17 - B49

pub fn b50(&self) -> B50_R[src]

Bit 18 - B50

pub fn b51(&self) -> B51_R[src]

Bit 19 - B51

pub fn b52(&self) -> B52_R[src]

Bit 20 - B52

pub fn b53(&self) -> B53_R[src]

Bit 21 - B53

pub fn b54(&self) -> B54_R[src]

Bit 22 - B54

pub fn b55(&self) -> B55_R[src]

Bit 23 - B55

pub fn b56(&self) -> B56_R[src]

Bit 24 - B56

pub fn b57(&self) -> B57_R[src]

Bit 25 - B57

pub fn b58(&self) -> B58_R[src]

Bit 26 - B58

pub fn b59(&self) -> B59_R[src]

Bit 27 - B59

pub fn b60(&self) -> B60_R[src]

Bit 28 - B60

pub fn b61(&self) -> B61_R[src]

Bit 29 - B61

pub fn b62(&self) -> B62_R[src]

Bit 30 - B62

pub fn b63(&self) -> B63_R[src]

Bit 31 - B63

impl R<u32, Reg<u32, _MPCBB2_VCTR2>>[src]

pub fn b64(&self) -> B64_R[src]

Bit 0 - B64

pub fn b65(&self) -> B65_R[src]

Bit 1 - B65

pub fn b66(&self) -> B66_R[src]

Bit 2 - B66

pub fn b67(&self) -> B67_R[src]

Bit 3 - B67

pub fn b68(&self) -> B68_R[src]

Bit 4 - B68

pub fn b69(&self) -> B69_R[src]

Bit 5 - B69

pub fn b70(&self) -> B70_R[src]

Bit 6 - B70

pub fn b71(&self) -> B71_R[src]

Bit 7 - B71

pub fn b72(&self) -> B72_R[src]

Bit 8 - B72

pub fn b73(&self) -> B73_R[src]

Bit 9 - B73

pub fn b74(&self) -> B74_R[src]

Bit 10 - B74

pub fn b75(&self) -> B75_R[src]

Bit 11 - B75

pub fn b76(&self) -> B76_R[src]

Bit 12 - B76

pub fn b77(&self) -> B77_R[src]

Bit 13 - B77

pub fn b78(&self) -> B78_R[src]

Bit 14 - B78

pub fn b79(&self) -> B79_R[src]

Bit 15 - B79

pub fn b80(&self) -> B80_R[src]

Bit 16 - B80

pub fn b81(&self) -> B81_R[src]

Bit 17 - B81

pub fn b82(&self) -> B82_R[src]

Bit 18 - B82

pub fn b83(&self) -> B83_R[src]

Bit 19 - B83

pub fn b84(&self) -> B84_R[src]

Bit 20 - B84

pub fn b85(&self) -> B85_R[src]

Bit 21 - B85

pub fn b86(&self) -> B86_R[src]

Bit 22 - B86

pub fn b87(&self) -> B87_R[src]

Bit 23 - B87

pub fn b88(&self) -> B88_R[src]

Bit 24 - B88

pub fn b89(&self) -> B89_R[src]

Bit 25 - B89

pub fn b90(&self) -> B90_R[src]

Bit 26 - B90

pub fn b91(&self) -> B91_R[src]

Bit 27 - B91

pub fn b92(&self) -> B92_R[src]

Bit 28 - B92

pub fn b93(&self) -> B93_R[src]

Bit 29 - B93

pub fn b94(&self) -> B94_R[src]

Bit 30 - B94

pub fn b95(&self) -> B95_R[src]

Bit 31 - B95

impl R<u32, Reg<u32, _MPCBB2_VCTR3>>[src]

pub fn b96(&self) -> B96_R[src]

Bit 0 - B96

pub fn b97(&self) -> B97_R[src]

Bit 1 - B97

pub fn b98(&self) -> B98_R[src]

Bit 2 - B98

pub fn b99(&self) -> B99_R[src]

Bit 3 - B99

pub fn b100(&self) -> B100_R[src]

Bit 4 - B100

pub fn b101(&self) -> B101_R[src]

Bit 5 - B101

pub fn b102(&self) -> B102_R[src]

Bit 6 - B102

pub fn b103(&self) -> B103_R[src]

Bit 7 - B103

pub fn b104(&self) -> B104_R[src]

Bit 8 - B104

pub fn b105(&self) -> B105_R[src]

Bit 9 - B105

pub fn b106(&self) -> B106_R[src]

Bit 10 - B106

pub fn b107(&self) -> B107_R[src]

Bit 11 - B107

pub fn b108(&self) -> B108_R[src]

Bit 12 - B108

pub fn b109(&self) -> B109_R[src]

Bit 13 - B109

pub fn b110(&self) -> B110_R[src]

Bit 14 - B110

pub fn b111(&self) -> B111_R[src]

Bit 15 - B111

pub fn b112(&self) -> B112_R[src]

Bit 16 - B112

pub fn b113(&self) -> B113_R[src]

Bit 17 - B113

pub fn b114(&self) -> B114_R[src]

Bit 18 - B114

pub fn b115(&self) -> B115_R[src]

Bit 19 - B115

pub fn b116(&self) -> B116_R[src]

Bit 20 - B116

pub fn b117(&self) -> B117_R[src]

Bit 21 - B117

pub fn b118(&self) -> B118_R[src]

Bit 22 - B118

pub fn b119(&self) -> B119_R[src]

Bit 23 - B119

pub fn b120(&self) -> B120_R[src]

Bit 24 - B120

pub fn b121(&self) -> B121_R[src]

Bit 25 - B121

pub fn b122(&self) -> B122_R[src]

Bit 26 - B122

pub fn b123(&self) -> B123_R[src]

Bit 27 - B123

pub fn b124(&self) -> B124_R[src]

Bit 28 - B124

pub fn b125(&self) -> B125_R[src]

Bit 29 - B125

pub fn b126(&self) -> B126_R[src]

Bit 30 - B126

pub fn b127(&self) -> B127_R[src]

Bit 31 - B127

impl R<u32, Reg<u32, _MPCBB2_VCTR4>>[src]

pub fn b128(&self) -> B128_R[src]

Bit 0 - B128

pub fn b129(&self) -> B129_R[src]

Bit 1 - B129

pub fn b130(&self) -> B130_R[src]

Bit 2 - B130

pub fn b131(&self) -> B131_R[src]

Bit 3 - B131

pub fn b132(&self) -> B132_R[src]

Bit 4 - B132

pub fn b133(&self) -> B133_R[src]

Bit 5 - B133

pub fn b134(&self) -> B134_R[src]

Bit 6 - B134

pub fn b135(&self) -> B135_R[src]

Bit 7 - B135

pub fn b136(&self) -> B136_R[src]

Bit 8 - B136

pub fn b137(&self) -> B137_R[src]

Bit 9 - B137

pub fn b138(&self) -> B138_R[src]

Bit 10 - B138

pub fn b139(&self) -> B139_R[src]

Bit 11 - B139

pub fn b140(&self) -> B140_R[src]

Bit 12 - B140

pub fn b141(&self) -> B141_R[src]

Bit 13 - B141

pub fn b142(&self) -> B142_R[src]

Bit 14 - B142

pub fn b143(&self) -> B143_R[src]

Bit 15 - B143

pub fn b144(&self) -> B144_R[src]

Bit 16 - B144

pub fn b145(&self) -> B145_R[src]

Bit 17 - B145

pub fn b146(&self) -> B146_R[src]

Bit 18 - B146

pub fn b147(&self) -> B147_R[src]

Bit 19 - B147

pub fn b148(&self) -> B148_R[src]

Bit 20 - B148

pub fn b149(&self) -> B149_R[src]

Bit 21 - B149

pub fn b150(&self) -> B150_R[src]

Bit 22 - B150

pub fn b151(&self) -> B151_R[src]

Bit 23 - B151

pub fn b152(&self) -> B152_R[src]

Bit 24 - B152

pub fn b153(&self) -> B153_R[src]

Bit 25 - B153

pub fn b154(&self) -> B154_R[src]

Bit 26 - B154

pub fn b155(&self) -> B155_R[src]

Bit 27 - B155

pub fn b156(&self) -> B156_R[src]

Bit 28 - B156

pub fn b157(&self) -> B157_R[src]

Bit 29 - B157

pub fn b158(&self) -> B158_R[src]

Bit 30 - B158

pub fn b159(&self) -> B159_R[src]

Bit 31 - B159

impl R<u32, Reg<u32, _MPCBB2_VCTR5>>[src]

pub fn b160(&self) -> B160_R[src]

Bit 0 - B160

pub fn b161(&self) -> B161_R[src]

Bit 1 - B161

pub fn b162(&self) -> B162_R[src]

Bit 2 - B162

pub fn b163(&self) -> B163_R[src]

Bit 3 - B163

pub fn b164(&self) -> B164_R[src]

Bit 4 - B164

pub fn b165(&self) -> B165_R[src]

Bit 5 - B165

pub fn b166(&self) -> B166_R[src]

Bit 6 - B166

pub fn b167(&self) -> B167_R[src]

Bit 7 - B167

pub fn b168(&self) -> B168_R[src]

Bit 8 - B168

pub fn b169(&self) -> B169_R[src]

Bit 9 - B169

pub fn b170(&self) -> B170_R[src]

Bit 10 - B170

pub fn b171(&self) -> B171_R[src]

Bit 11 - B171

pub fn b172(&self) -> B172_R[src]

Bit 12 - B172

pub fn b173(&self) -> B173_R[src]

Bit 13 - B173

pub fn b174(&self) -> B174_R[src]

Bit 14 - B174

pub fn b175(&self) -> B175_R[src]

Bit 15 - B175

pub fn b176(&self) -> B176_R[src]

Bit 16 - B176

pub fn b177(&self) -> B177_R[src]

Bit 17 - B177

pub fn b178(&self) -> B178_R[src]

Bit 18 - B178

pub fn b179(&self) -> B179_R[src]

Bit 19 - B179

pub fn b180(&self) -> B180_R[src]

Bit 20 - B180

pub fn b181(&self) -> B181_R[src]

Bit 21 - B181

pub fn b182(&self) -> B182_R[src]

Bit 22 - B182

pub fn b183(&self) -> B183_R[src]

Bit 23 - B183

pub fn b184(&self) -> B184_R[src]

Bit 24 - B184

pub fn b185(&self) -> B185_R[src]

Bit 25 - B185

pub fn b186(&self) -> B186_R[src]

Bit 26 - B186

pub fn b187(&self) -> B187_R[src]

Bit 27 - B187

pub fn b188(&self) -> B188_R[src]

Bit 28 - B188

pub fn b189(&self) -> B189_R[src]

Bit 29 - B189

pub fn b190(&self) -> B190_R[src]

Bit 30 - B190

pub fn b191(&self) -> B191_R[src]

Bit 31 - B191

impl R<u32, Reg<u32, _MPCBB2_VCTR6>>[src]

pub fn b192(&self) -> B192_R[src]

Bit 0 - B192

pub fn b193(&self) -> B193_R[src]

Bit 1 - B193

pub fn b194(&self) -> B194_R[src]

Bit 2 - B194

pub fn b195(&self) -> B195_R[src]

Bit 3 - B195

pub fn b196(&self) -> B196_R[src]

Bit 4 - B196

pub fn b197(&self) -> B197_R[src]

Bit 5 - B197

pub fn b198(&self) -> B198_R[src]

Bit 6 - B198

pub fn b199(&self) -> B199_R[src]

Bit 7 - B199

pub fn b200(&self) -> B200_R[src]

Bit 8 - B200

pub fn b201(&self) -> B201_R[src]

Bit 9 - B201

pub fn b202(&self) -> B202_R[src]

Bit 10 - B202

pub fn b203(&self) -> B203_R[src]

Bit 11 - B203

pub fn b204(&self) -> B204_R[src]

Bit 12 - B204

pub fn b205(&self) -> B205_R[src]

Bit 13 - B205

pub fn b206(&self) -> B206_R[src]

Bit 14 - B206

pub fn b207(&self) -> B207_R[src]

Bit 15 - B207

pub fn b208(&self) -> B208_R[src]

Bit 16 - B208

pub fn b209(&self) -> B209_R[src]

Bit 17 - B209

pub fn b210(&self) -> B210_R[src]

Bit 18 - B210

pub fn b211(&self) -> B211_R[src]

Bit 19 - B211

pub fn b212(&self) -> B212_R[src]

Bit 20 - B212

pub fn b213(&self) -> B213_R[src]

Bit 21 - B213

pub fn b214(&self) -> B214_R[src]

Bit 22 - B214

pub fn b215(&self) -> B215_R[src]

Bit 23 - B215

pub fn b216(&self) -> B216_R[src]

Bit 24 - B216

pub fn b217(&self) -> B217_R[src]

Bit 25 - B217

pub fn b218(&self) -> B218_R[src]

Bit 26 - B218

pub fn b219(&self) -> B219_R[src]

Bit 27 - B219

pub fn b220(&self) -> B220_R[src]

Bit 28 - B220

pub fn b221(&self) -> B221_R[src]

Bit 29 - B221

pub fn b222(&self) -> B222_R[src]

Bit 30 - B222

pub fn b223(&self) -> B223_R[src]

Bit 31 - B223

impl R<u32, Reg<u32, _MPCBB2_VCTR7>>[src]

pub fn b224(&self) -> B224_R[src]

Bit 0 - B224

pub fn b225(&self) -> B225_R[src]

Bit 1 - B225

pub fn b226(&self) -> B226_R[src]

Bit 2 - B226

pub fn b227(&self) -> B227_R[src]

Bit 3 - B227

pub fn b228(&self) -> B228_R[src]

Bit 4 - B228

pub fn b229(&self) -> B229_R[src]

Bit 5 - B229

pub fn b230(&self) -> B230_R[src]

Bit 6 - B230

pub fn b231(&self) -> B231_R[src]

Bit 7 - B231

pub fn b232(&self) -> B232_R[src]

Bit 8 - B232

pub fn b233(&self) -> B233_R[src]

Bit 9 - B233

pub fn b234(&self) -> B234_R[src]

Bit 10 - B234

pub fn b235(&self) -> B235_R[src]

Bit 11 - B235

pub fn b236(&self) -> B236_R[src]

Bit 12 - B236

pub fn b237(&self) -> B237_R[src]

Bit 13 - B237

pub fn b238(&self) -> B238_R[src]

Bit 14 - B238

pub fn b239(&self) -> B239_R[src]

Bit 15 - B239

pub fn b240(&self) -> B240_R[src]

Bit 16 - B240

pub fn b241(&self) -> B241_R[src]

Bit 17 - B241

pub fn b242(&self) -> B242_R[src]

Bit 18 - B242

pub fn b243(&self) -> B243_R[src]

Bit 19 - B243

pub fn b244(&self) -> B244_R[src]

Bit 20 - B244

pub fn b245(&self) -> B245_R[src]

Bit 21 - B245

pub fn b246(&self) -> B246_R[src]

Bit 22 - B246

pub fn b247(&self) -> B247_R[src]

Bit 23 - B247

pub fn b248(&self) -> B248_R[src]

Bit 24 - B248

pub fn b249(&self) -> B249_R[src]

Bit 25 - B249

pub fn b250(&self) -> B250_R[src]

Bit 26 - B250

pub fn b251(&self) -> B251_R[src]

Bit 27 - B251

pub fn b252(&self) -> B252_R[src]

Bit 28 - B252

pub fn b253(&self) -> B253_R[src]

Bit 29 - B253

pub fn b254(&self) -> B254_R[src]

Bit 30 - B254

pub fn b255(&self) -> B255_R[src]

Bit 31 - B255

impl R<u32, Reg<u32, _MPCBB2_VCTR8>>[src]

pub fn b256(&self) -> B256_R[src]

Bit 0 - B256

pub fn b257(&self) -> B257_R[src]

Bit 1 - B257

pub fn b258(&self) -> B258_R[src]

Bit 2 - B258

pub fn b259(&self) -> B259_R[src]

Bit 3 - B259

pub fn b260(&self) -> B260_R[src]

Bit 4 - B260

pub fn b261(&self) -> B261_R[src]

Bit 5 - B261

pub fn b262(&self) -> B262_R[src]

Bit 6 - B262

pub fn b263(&self) -> B263_R[src]

Bit 7 - B263

pub fn b264(&self) -> B264_R[src]

Bit 8 - B264

pub fn b265(&self) -> B265_R[src]

Bit 9 - B265

pub fn b266(&self) -> B266_R[src]

Bit 10 - B266

pub fn b267(&self) -> B267_R[src]

Bit 11 - B267

pub fn b268(&self) -> B268_R[src]

Bit 12 - B268

pub fn b269(&self) -> B269_R[src]

Bit 13 - B269

pub fn b270(&self) -> B270_R[src]

Bit 14 - B270

pub fn b271(&self) -> B271_R[src]

Bit 15 - B271

pub fn b272(&self) -> B272_R[src]

Bit 16 - B272

pub fn b273(&self) -> B273_R[src]

Bit 17 - B273

pub fn b274(&self) -> B274_R[src]

Bit 18 - B274

pub fn b275(&self) -> B275_R[src]

Bit 19 - B275

pub fn b276(&self) -> B276_R[src]

Bit 20 - B276

pub fn b277(&self) -> B277_R[src]

Bit 21 - B277

pub fn b278(&self) -> B278_R[src]

Bit 22 - B278

pub fn b279(&self) -> B279_R[src]

Bit 23 - B279

pub fn b280(&self) -> B280_R[src]

Bit 24 - B280

pub fn b281(&self) -> B281_R[src]

Bit 25 - B281

pub fn b282(&self) -> B282_R[src]

Bit 26 - B282

pub fn b283(&self) -> B283_R[src]

Bit 27 - B283

pub fn b284(&self) -> B284_R[src]

Bit 28 - B284

pub fn b285(&self) -> B285_R[src]

Bit 29 - B285

pub fn b286(&self) -> B286_R[src]

Bit 30 - B286

pub fn b287(&self) -> B287_R[src]

Bit 31 - B287

impl R<u32, Reg<u32, _MPCBB2_VCTR9>>[src]

pub fn b288(&self) -> B288_R[src]

Bit 0 - B288

pub fn b289(&self) -> B289_R[src]

Bit 1 - B289

pub fn b290(&self) -> B290_R[src]

Bit 2 - B290

pub fn b291(&self) -> B291_R[src]

Bit 3 - B291

pub fn b292(&self) -> B292_R[src]

Bit 4 - B292

pub fn b293(&self) -> B293_R[src]

Bit 5 - B293

pub fn b294(&self) -> B294_R[src]

Bit 6 - B294

pub fn b295(&self) -> B295_R[src]

Bit 7 - B295

pub fn b296(&self) -> B296_R[src]

Bit 8 - B296

pub fn b297(&self) -> B297_R[src]

Bit 9 - B297

pub fn b298(&self) -> B298_R[src]

Bit 10 - B298

pub fn b299(&self) -> B299_R[src]

Bit 11 - B299

pub fn b300(&self) -> B300_R[src]

Bit 12 - B300

pub fn b301(&self) -> B301_R[src]

Bit 13 - B301

pub fn b302(&self) -> B302_R[src]

Bit 14 - B302

pub fn b303(&self) -> B303_R[src]

Bit 15 - B303

pub fn b304(&self) -> B304_R[src]

Bit 16 - B304

pub fn b305(&self) -> B305_R[src]

Bit 17 - B305

pub fn b306(&self) -> B306_R[src]

Bit 18 - B306

pub fn b307(&self) -> B307_R[src]

Bit 19 - B307

pub fn b308(&self) -> B308_R[src]

Bit 20 - B308

pub fn b309(&self) -> B309_R[src]

Bit 21 - B309

pub fn b310(&self) -> B310_R[src]

Bit 22 - B310

pub fn b311(&self) -> B311_R[src]

Bit 23 - B311

pub fn b312(&self) -> B312_R[src]

Bit 24 - B312

pub fn b313(&self) -> B313_R[src]

Bit 25 - B313

pub fn b314(&self) -> B314_R[src]

Bit 26 - B314

pub fn b315(&self) -> B315_R[src]

Bit 27 - B315

pub fn b316(&self) -> B316_R[src]

Bit 28 - B316

pub fn b317(&self) -> B317_R[src]

Bit 29 - B317

pub fn b318(&self) -> B318_R[src]

Bit 30 - B318

pub fn b319(&self) -> B319_R[src]

Bit 31 - B319

impl R<u32, Reg<u32, _MPCBB2_VCTR10>>[src]

pub fn b320(&self) -> B320_R[src]

Bit 0 - B320

pub fn b321(&self) -> B321_R[src]

Bit 1 - B321

pub fn b322(&self) -> B322_R[src]

Bit 2 - B322

pub fn b323(&self) -> B323_R[src]

Bit 3 - B323

pub fn b324(&self) -> B324_R[src]

Bit 4 - B324

pub fn b325(&self) -> B325_R[src]

Bit 5 - B325

pub fn b326(&self) -> B326_R[src]

Bit 6 - B326

pub fn b327(&self) -> B327_R[src]

Bit 7 - B327

pub fn b328(&self) -> B328_R[src]

Bit 8 - B328

pub fn b329(&self) -> B329_R[src]

Bit 9 - B329

pub fn b330(&self) -> B330_R[src]

Bit 10 - B330

pub fn b331(&self) -> B331_R[src]

Bit 11 - B331

pub fn b332(&self) -> B332_R[src]

Bit 12 - B332

pub fn b333(&self) -> B333_R[src]

Bit 13 - B333

pub fn b334(&self) -> B334_R[src]

Bit 14 - B334

pub fn b335(&self) -> B335_R[src]

Bit 15 - B335

pub fn b336(&self) -> B336_R[src]

Bit 16 - B336

pub fn b337(&self) -> B337_R[src]

Bit 17 - B337

pub fn b338(&self) -> B338_R[src]

Bit 18 - B338

pub fn b339(&self) -> B339_R[src]

Bit 19 - B339

pub fn b340(&self) -> B340_R[src]

Bit 20 - B340

pub fn b341(&self) -> B341_R[src]

Bit 21 - B341

pub fn b342(&self) -> B342_R[src]

Bit 22 - B342

pub fn b343(&self) -> B343_R[src]

Bit 23 - B343

pub fn b344(&self) -> B344_R[src]

Bit 24 - B344

pub fn b345(&self) -> B345_R[src]

Bit 25 - B345

pub fn b346(&self) -> B346_R[src]

Bit 26 - B346

pub fn b347(&self) -> B347_R[src]

Bit 27 - B347

pub fn b348(&self) -> B348_R[src]

Bit 28 - B348

pub fn b349(&self) -> B349_R[src]

Bit 29 - B349

pub fn b350(&self) -> B350_R[src]

Bit 30 - B350

pub fn b351(&self) -> B351_R[src]

Bit 31 - B351

impl R<u32, Reg<u32, _MPCBB2_VCTR11>>[src]

pub fn b352(&self) -> B352_R[src]

Bit 0 - B352

pub fn b353(&self) -> B353_R[src]

Bit 1 - B353

pub fn b354(&self) -> B354_R[src]

Bit 2 - B354

pub fn b355(&self) -> B355_R[src]

Bit 3 - B355

pub fn b356(&self) -> B356_R[src]

Bit 4 - B356

pub fn b357(&self) -> B357_R[src]

Bit 5 - B357

pub fn b358(&self) -> B358_R[src]

Bit 6 - B358

pub fn b359(&self) -> B359_R[src]

Bit 7 - B359

pub fn b360(&self) -> B360_R[src]

Bit 8 - B360

pub fn b361(&self) -> B361_R[src]

Bit 9 - B361

pub fn b362(&self) -> B362_R[src]

Bit 10 - B362

pub fn b363(&self) -> B363_R[src]

Bit 11 - B363

pub fn b364(&self) -> B364_R[src]

Bit 12 - B364

pub fn b365(&self) -> B365_R[src]

Bit 13 - B365

pub fn b366(&self) -> B366_R[src]

Bit 14 - B366

pub fn b367(&self) -> B367_R[src]

Bit 15 - B367

pub fn b368(&self) -> B368_R[src]

Bit 16 - B368

pub fn b369(&self) -> B369_R[src]

Bit 17 - B369

pub fn b370(&self) -> B370_R[src]

Bit 18 - B370

pub fn b371(&self) -> B371_R[src]

Bit 19 - B371

pub fn b372(&self) -> B372_R[src]

Bit 20 - B372

pub fn b373(&self) -> B373_R[src]

Bit 21 - B373

pub fn b374(&self) -> B374_R[src]

Bit 22 - B374

pub fn b375(&self) -> B375_R[src]

Bit 23 - B375

pub fn b376(&self) -> B376_R[src]

Bit 24 - B376

pub fn b377(&self) -> B377_R[src]

Bit 25 - B377

pub fn b378(&self) -> B378_R[src]

Bit 26 - B378

pub fn b379(&self) -> B379_R[src]

Bit 27 - B379

pub fn b380(&self) -> B380_R[src]

Bit 28 - B380

pub fn b381(&self) -> B381_R[src]

Bit 29 - B381

pub fn b382(&self) -> B382_R[src]

Bit 30 - B382

pub fn b383(&self) -> B383_R[src]

Bit 31 - B383

impl R<u32, Reg<u32, _MPCBB2_VCTR12>>[src]

pub fn b384(&self) -> B384_R[src]

Bit 0 - B384

pub fn b385(&self) -> B385_R[src]

Bit 1 - B385

pub fn b386(&self) -> B386_R[src]

Bit 2 - B386

pub fn b387(&self) -> B387_R[src]

Bit 3 - B387

pub fn b388(&self) -> B388_R[src]

Bit 4 - B388

pub fn b389(&self) -> B389_R[src]

Bit 5 - B389

pub fn b390(&self) -> B390_R[src]

Bit 6 - B390

pub fn b391(&self) -> B391_R[src]

Bit 7 - B391

pub fn b392(&self) -> B392_R[src]

Bit 8 - B392

pub fn b393(&self) -> B393_R[src]

Bit 9 - B393

pub fn b394(&self) -> B394_R[src]

Bit 10 - B394

pub fn b395(&self) -> B395_R[src]

Bit 11 - B395

pub fn b396(&self) -> B396_R[src]

Bit 12 - B396

pub fn b397(&self) -> B397_R[src]

Bit 13 - B397

pub fn b398(&self) -> B398_R[src]

Bit 14 - B398

pub fn b399(&self) -> B399_R[src]

Bit 15 - B399

pub fn b400(&self) -> B400_R[src]

Bit 16 - B400

pub fn b401(&self) -> B401_R[src]

Bit 17 - B401

pub fn b402(&self) -> B402_R[src]

Bit 18 - B402

pub fn b403(&self) -> B403_R[src]

Bit 19 - B403

pub fn b404(&self) -> B404_R[src]

Bit 20 - B404

pub fn b405(&self) -> B405_R[src]

Bit 21 - B405

pub fn b406(&self) -> B406_R[src]

Bit 22 - B406

pub fn b407(&self) -> B407_R[src]

Bit 23 - B407

pub fn b408(&self) -> B408_R[src]

Bit 24 - B408

pub fn b409(&self) -> B409_R[src]

Bit 25 - B409

pub fn b410(&self) -> B410_R[src]

Bit 26 - B410

pub fn b411(&self) -> B411_R[src]

Bit 27 - B411

pub fn b412(&self) -> B412_R[src]

Bit 28 - B412

pub fn b413(&self) -> B413_R[src]

Bit 29 - B413

pub fn b414(&self) -> B414_R[src]

Bit 30 - B414

pub fn b415(&self) -> B415_R[src]

Bit 31 - B415

impl R<u32, Reg<u32, _MPCBB2_VCTR13>>[src]

pub fn b416(&self) -> B416_R[src]

Bit 0 - B416

pub fn b417(&self) -> B417_R[src]

Bit 1 - B417

pub fn b418(&self) -> B418_R[src]

Bit 2 - B418

pub fn b419(&self) -> B419_R[src]

Bit 3 - B419

pub fn b420(&self) -> B420_R[src]

Bit 4 - B420

pub fn b421(&self) -> B421_R[src]

Bit 5 - B421

pub fn b422(&self) -> B422_R[src]

Bit 6 - B422

pub fn b423(&self) -> B423_R[src]

Bit 7 - B423

pub fn b424(&self) -> B424_R[src]

Bit 8 - B424

pub fn b425(&self) -> B425_R[src]

Bit 9 - B425

pub fn b426(&self) -> B426_R[src]

Bit 10 - B426

pub fn b427(&self) -> B427_R[src]

Bit 11 - B427

pub fn b428(&self) -> B428_R[src]

Bit 12 - B428

pub fn b429(&self) -> B429_R[src]

Bit 13 - B429

pub fn b430(&self) -> B430_R[src]

Bit 14 - B430

pub fn b431(&self) -> B431_R[src]

Bit 15 - B431

pub fn b432(&self) -> B432_R[src]

Bit 16 - B432

pub fn b433(&self) -> B433_R[src]

Bit 17 - B433

pub fn b434(&self) -> B434_R[src]

Bit 18 - B434

pub fn b435(&self) -> B435_R[src]

Bit 19 - B435

pub fn b436(&self) -> B436_R[src]

Bit 20 - B436

pub fn b437(&self) -> B437_R[src]

Bit 21 - B437

pub fn b438(&self) -> B438_R[src]

Bit 22 - B438

pub fn b439(&self) -> B439_R[src]

Bit 23 - B439

pub fn b440(&self) -> B440_R[src]

Bit 24 - B440

pub fn b441(&self) -> B441_R[src]

Bit 25 - B441

pub fn b442(&self) -> B442_R[src]

Bit 26 - B442

pub fn b443(&self) -> B443_R[src]

Bit 27 - B443

pub fn b444(&self) -> B444_R[src]

Bit 28 - B444

pub fn b445(&self) -> B445_R[src]

Bit 29 - B445

pub fn b446(&self) -> B446_R[src]

Bit 30 - B446

pub fn b447(&self) -> B447_R[src]

Bit 31 - B447

impl R<u32, Reg<u32, _MPCBB2_VCTR14>>[src]

pub fn b448(&self) -> B448_R[src]

Bit 0 - B448

pub fn b449(&self) -> B449_R[src]

Bit 1 - B449

pub fn b450(&self) -> B450_R[src]

Bit 2 - B450

pub fn b451(&self) -> B451_R[src]

Bit 3 - B451

pub fn b452(&self) -> B452_R[src]

Bit 4 - B452

pub fn b453(&self) -> B453_R[src]

Bit 5 - B453

pub fn b454(&self) -> B454_R[src]

Bit 6 - B454

pub fn b455(&self) -> B455_R[src]

Bit 7 - B455

pub fn b456(&self) -> B456_R[src]

Bit 8 - B456

pub fn b457(&self) -> B457_R[src]

Bit 9 - B457

pub fn b458(&self) -> B458_R[src]

Bit 10 - B458

pub fn b459(&self) -> B459_R[src]

Bit 11 - B459

pub fn b460(&self) -> B460_R[src]

Bit 12 - B460

pub fn b461(&self) -> B461_R[src]

Bit 13 - B461

pub fn b462(&self) -> B462_R[src]

Bit 14 - B462

pub fn b463(&self) -> B463_R[src]

Bit 15 - B463

pub fn b464(&self) -> B464_R[src]

Bit 16 - B464

pub fn b465(&self) -> B465_R[src]

Bit 17 - B465

pub fn b466(&self) -> B466_R[src]

Bit 18 - B466

pub fn b467(&self) -> B467_R[src]

Bit 19 - B467

pub fn b468(&self) -> B468_R[src]

Bit 20 - B468

pub fn b469(&self) -> B469_R[src]

Bit 21 - B469

pub fn b470(&self) -> B470_R[src]

Bit 22 - B470

pub fn b471(&self) -> B471_R[src]

Bit 23 - B471

pub fn b472(&self) -> B472_R[src]

Bit 24 - B472

pub fn b473(&self) -> B473_R[src]

Bit 25 - B473

pub fn b474(&self) -> B474_R[src]

Bit 26 - B474

pub fn b475(&self) -> B475_R[src]

Bit 27 - B475

pub fn b476(&self) -> B476_R[src]

Bit 28 - B476

pub fn b477(&self) -> B477_R[src]

Bit 29 - B477

pub fn b478(&self) -> B478_R[src]

Bit 30 - B478

pub fn b479(&self) -> B479_R[src]

Bit 31 - B479

impl R<u32, Reg<u32, _MPCBB2_VCTR15>>[src]

pub fn b480(&self) -> B480_R[src]

Bit 0 - B480

pub fn b481(&self) -> B481_R[src]

Bit 1 - B481

pub fn b482(&self) -> B482_R[src]

Bit 2 - B482

pub fn b483(&self) -> B483_R[src]

Bit 3 - B483

pub fn b484(&self) -> B484_R[src]

Bit 4 - B484

pub fn b485(&self) -> B485_R[src]

Bit 5 - B485

pub fn b486(&self) -> B486_R[src]

Bit 6 - B486

pub fn b487(&self) -> B487_R[src]

Bit 7 - B487

pub fn b488(&self) -> B488_R[src]

Bit 8 - B488

pub fn b489(&self) -> B489_R[src]

Bit 9 - B489

pub fn b490(&self) -> B490_R[src]

Bit 10 - B490

pub fn b491(&self) -> B491_R[src]

Bit 11 - B491

pub fn b492(&self) -> B492_R[src]

Bit 12 - B492

pub fn b493(&self) -> B493_R[src]

Bit 13 - B493

pub fn b494(&self) -> B494_R[src]

Bit 14 - B494

pub fn b495(&self) -> B495_R[src]

Bit 15 - B495

pub fn b496(&self) -> B496_R[src]

Bit 16 - B496

pub fn b497(&self) -> B497_R[src]

Bit 17 - B497

pub fn b498(&self) -> B498_R[src]

Bit 18 - B498

pub fn b499(&self) -> B499_R[src]

Bit 19 - B499

pub fn b500(&self) -> B500_R[src]

Bit 20 - B500

pub fn b501(&self) -> B501_R[src]

Bit 21 - B501

pub fn b502(&self) -> B502_R[src]

Bit 22 - B502

pub fn b503(&self) -> B503_R[src]

Bit 23 - B503

pub fn b504(&self) -> B504_R[src]

Bit 24 - B504

pub fn b505(&self) -> B505_R[src]

Bit 25 - B505

pub fn b506(&self) -> B506_R[src]

Bit 26 - B506

pub fn b507(&self) -> B507_R[src]

Bit 27 - B507

pub fn b508(&self) -> B508_R[src]

Bit 28 - B508

pub fn b509(&self) -> B509_R[src]

Bit 29 - B509

pub fn b510(&self) -> B510_R[src]

Bit 30 - B510

pub fn b511(&self) -> B511_R[src]

Bit 31 - B511

impl R<u32, Reg<u32, _MPCBB2_VCTR16>>[src]

pub fn b512(&self) -> B512_R[src]

Bit 0 - B512

pub fn b513(&self) -> B513_R[src]

Bit 1 - B513

pub fn b514(&self) -> B514_R[src]

Bit 2 - B514

pub fn b515(&self) -> B515_R[src]

Bit 3 - B515

pub fn b516(&self) -> B516_R[src]

Bit 4 - B516

pub fn b517(&self) -> B517_R[src]

Bit 5 - B517

pub fn b518(&self) -> B518_R[src]

Bit 6 - B518

pub fn b519(&self) -> B519_R[src]

Bit 7 - B519

pub fn b520(&self) -> B520_R[src]

Bit 8 - B520

pub fn b521(&self) -> B521_R[src]

Bit 9 - B521

pub fn b522(&self) -> B522_R[src]

Bit 10 - B522

pub fn b523(&self) -> B523_R[src]

Bit 11 - B523

pub fn b524(&self) -> B524_R[src]

Bit 12 - B524

pub fn b525(&self) -> B525_R[src]

Bit 13 - B525

pub fn b526(&self) -> B526_R[src]

Bit 14 - B526

pub fn b527(&self) -> B527_R[src]

Bit 15 - B527

pub fn b528(&self) -> B528_R[src]

Bit 16 - B528

pub fn b529(&self) -> B529_R[src]

Bit 17 - B529

pub fn b530(&self) -> B530_R[src]

Bit 18 - B530

pub fn b531(&self) -> B531_R[src]

Bit 19 - B531

pub fn b532(&self) -> B532_R[src]

Bit 20 - B532

pub fn b533(&self) -> B533_R[src]

Bit 21 - B533

pub fn b534(&self) -> B534_R[src]

Bit 22 - B534

pub fn b535(&self) -> B535_R[src]

Bit 23 - B535

pub fn b536(&self) -> B536_R[src]

Bit 24 - B536

pub fn b537(&self) -> B537_R[src]

Bit 25 - B537

pub fn b538(&self) -> B538_R[src]

Bit 26 - B538

pub fn b539(&self) -> B539_R[src]

Bit 27 - B539

pub fn b540(&self) -> B540_R[src]

Bit 28 - B540

pub fn b541(&self) -> B541_R[src]

Bit 29 - B541

pub fn b542(&self) -> B542_R[src]

Bit 30 - B542

pub fn b543(&self) -> B543_R[src]

Bit 31 - B543

impl R<u32, Reg<u32, _MPCBB2_VCTR17>>[src]

pub fn b544(&self) -> B544_R[src]

Bit 0 - B544

pub fn b545(&self) -> B545_R[src]

Bit 1 - B545

pub fn b546(&self) -> B546_R[src]

Bit 2 - B546

pub fn b547(&self) -> B547_R[src]

Bit 3 - B547

pub fn b548(&self) -> B548_R[src]

Bit 4 - B548

pub fn b549(&self) -> B549_R[src]

Bit 5 - B549

pub fn b550(&self) -> B550_R[src]

Bit 6 - B550

pub fn b551(&self) -> B551_R[src]

Bit 7 - B551

pub fn b552(&self) -> B552_R[src]

Bit 8 - B552

pub fn b553(&self) -> B553_R[src]

Bit 9 - B553

pub fn b554(&self) -> B554_R[src]

Bit 10 - B554

pub fn b555(&self) -> B555_R[src]

Bit 11 - B555

pub fn b556(&self) -> B556_R[src]

Bit 12 - B556

pub fn b557(&self) -> B557_R[src]

Bit 13 - B557

pub fn b558(&self) -> B558_R[src]

Bit 14 - B558

pub fn b559(&self) -> B559_R[src]

Bit 15 - B559

pub fn b560(&self) -> B560_R[src]

Bit 16 - B560

pub fn b561(&self) -> B561_R[src]

Bit 17 - B561

pub fn b562(&self) -> B562_R[src]

Bit 18 - B562

pub fn b563(&self) -> B563_R[src]

Bit 19 - B563

pub fn b564(&self) -> B564_R[src]

Bit 20 - B564

pub fn b565(&self) -> B565_R[src]

Bit 21 - B565

pub fn b566(&self) -> B566_R[src]

Bit 22 - B566

pub fn b567(&self) -> B567_R[src]

Bit 23 - B567

pub fn b568(&self) -> B568_R[src]

Bit 24 - B568

pub fn b569(&self) -> B569_R[src]

Bit 25 - B569

pub fn b570(&self) -> B570_R[src]

Bit 26 - B570

pub fn b571(&self) -> B571_R[src]

Bit 27 - B571

pub fn b572(&self) -> B572_R[src]

Bit 28 - B572

pub fn b573(&self) -> B573_R[src]

Bit 29 - B573

pub fn b574(&self) -> B574_R[src]

Bit 30 - B574

pub fn b575(&self) -> B575_R[src]

Bit 31 - B575

impl R<u32, Reg<u32, _MPCBB2_VCTR18>>[src]

pub fn b576(&self) -> B576_R[src]

Bit 0 - B576

pub fn b577(&self) -> B577_R[src]

Bit 1 - B577

pub fn b578(&self) -> B578_R[src]

Bit 2 - B578

pub fn b579(&self) -> B579_R[src]

Bit 3 - B579

pub fn b580(&self) -> B580_R[src]

Bit 4 - B580

pub fn b581(&self) -> B581_R[src]

Bit 5 - B581

pub fn b582(&self) -> B582_R[src]

Bit 6 - B582

pub fn b583(&self) -> B583_R[src]

Bit 7 - B583

pub fn b584(&self) -> B584_R[src]

Bit 8 - B584

pub fn b585(&self) -> B585_R[src]

Bit 9 - B585

pub fn b586(&self) -> B586_R[src]

Bit 10 - B586

pub fn b587(&self) -> B587_R[src]

Bit 11 - B587

pub fn b588(&self) -> B588_R[src]

Bit 12 - B588

pub fn b589(&self) -> B589_R[src]

Bit 13 - B589

pub fn b590(&self) -> B590_R[src]

Bit 14 - B590

pub fn b591(&self) -> B591_R[src]

Bit 15 - B591

pub fn b592(&self) -> B592_R[src]

Bit 16 - B592

pub fn b593(&self) -> B593_R[src]

Bit 17 - B593

pub fn b594(&self) -> B594_R[src]

Bit 18 - B594

pub fn b595(&self) -> B595_R[src]

Bit 19 - B595

pub fn b596(&self) -> B596_R[src]

Bit 20 - B596

pub fn b597(&self) -> B597_R[src]

Bit 21 - B597

pub fn b598(&self) -> B598_R[src]

Bit 22 - B598

pub fn b599(&self) -> B599_R[src]

Bit 23 - B599

pub fn b600(&self) -> B600_R[src]

Bit 24 - B600

pub fn b601(&self) -> B601_R[src]

Bit 25 - B601

pub fn b602(&self) -> B602_R[src]

Bit 26 - B602

pub fn b603(&self) -> B603_R[src]

Bit 27 - B603

pub fn b604(&self) -> B604_R[src]

Bit 28 - B604

pub fn b605(&self) -> B605_R[src]

Bit 29 - B605

pub fn b606(&self) -> B606_R[src]

Bit 30 - B606

pub fn b607(&self) -> B607_R[src]

Bit 31 - B607

impl R<u32, Reg<u32, _MPCBB2_VCTR19>>[src]

pub fn b608(&self) -> B608_R[src]

Bit 0 - B608

pub fn b609(&self) -> B609_R[src]

Bit 1 - B609

pub fn b610(&self) -> B610_R[src]

Bit 2 - B610

pub fn b611(&self) -> B611_R[src]

Bit 3 - B611

pub fn b612(&self) -> B612_R[src]

Bit 4 - B612

pub fn b613(&self) -> B613_R[src]

Bit 5 - B613

pub fn b614(&self) -> B614_R[src]

Bit 6 - B614

pub fn b615(&self) -> B615_R[src]

Bit 7 - B615

pub fn b616(&self) -> B616_R[src]

Bit 8 - B616

pub fn b617(&self) -> B617_R[src]

Bit 9 - B617

pub fn b618(&self) -> B618_R[src]

Bit 10 - B618

pub fn b619(&self) -> B619_R[src]

Bit 11 - B619

pub fn b620(&self) -> B620_R[src]

Bit 12 - B620

pub fn b621(&self) -> B621_R[src]

Bit 13 - B621

pub fn b622(&self) -> B622_R[src]

Bit 14 - B622

pub fn b623(&self) -> B623_R[src]

Bit 15 - B623

pub fn b624(&self) -> B624_R[src]

Bit 16 - B624

pub fn b625(&self) -> B625_R[src]

Bit 17 - B625

pub fn b626(&self) -> B626_R[src]

Bit 18 - B626

pub fn b627(&self) -> B627_R[src]

Bit 19 - B627

pub fn b628(&self) -> B628_R[src]

Bit 20 - B628

pub fn b629(&self) -> B629_R[src]

Bit 21 - B629

pub fn b630(&self) -> B630_R[src]

Bit 22 - B630

pub fn b631(&self) -> B631_R[src]

Bit 23 - B631

pub fn b632(&self) -> B632_R[src]

Bit 24 - B632

pub fn b633(&self) -> B633_R[src]

Bit 25 - B633

pub fn b634(&self) -> B634_R[src]

Bit 26 - B634

pub fn b635(&self) -> B635_R[src]

Bit 27 - B635

pub fn b636(&self) -> B636_R[src]

Bit 28 - B636

pub fn b637(&self) -> B637_R[src]

Bit 29 - B637

pub fn b638(&self) -> B638_R[src]

Bit 30 - B638

pub fn b639(&self) -> B639_R[src]

Bit 31 - B639

impl R<u32, Reg<u32, _MPCBB2_VCTR20>>[src]

pub fn b640(&self) -> B640_R[src]

Bit 0 - B640

pub fn b641(&self) -> B641_R[src]

Bit 1 - B641

pub fn b642(&self) -> B642_R[src]

Bit 2 - B642

pub fn b643(&self) -> B643_R[src]

Bit 3 - B643

pub fn b644(&self) -> B644_R[src]

Bit 4 - B644

pub fn b645(&self) -> B645_R[src]

Bit 5 - B645

pub fn b646(&self) -> B646_R[src]

Bit 6 - B646

pub fn b647(&self) -> B647_R[src]

Bit 7 - B647

pub fn b648(&self) -> B648_R[src]

Bit 8 - B648

pub fn b649(&self) -> B649_R[src]

Bit 9 - B649

pub fn b650(&self) -> B650_R[src]

Bit 10 - B650

pub fn b651(&self) -> B651_R[src]

Bit 11 - B651

pub fn b652(&self) -> B652_R[src]

Bit 12 - B652

pub fn b653(&self) -> B653_R[src]

Bit 13 - B653

pub fn b654(&self) -> B654_R[src]

Bit 14 - B654

pub fn b655(&self) -> B655_R[src]

Bit 15 - B655

pub fn b656(&self) -> B656_R[src]

Bit 16 - B656

pub fn b657(&self) -> B657_R[src]

Bit 17 - B657

pub fn b658(&self) -> B658_R[src]

Bit 18 - B658

pub fn b659(&self) -> B659_R[src]

Bit 19 - B659

pub fn b660(&self) -> B660_R[src]

Bit 20 - B660

pub fn b661(&self) -> B661_R[src]

Bit 21 - B661

pub fn b662(&self) -> B662_R[src]

Bit 22 - B662

pub fn b663(&self) -> B663_R[src]

Bit 23 - B663

pub fn b664(&self) -> B664_R[src]

Bit 24 - B664

pub fn b665(&self) -> B665_R[src]

Bit 25 - B665

pub fn b666(&self) -> B666_R[src]

Bit 26 - B666

pub fn b667(&self) -> B667_R[src]

Bit 27 - B667

pub fn b668(&self) -> B668_R[src]

Bit 28 - B668

pub fn b669(&self) -> B669_R[src]

Bit 29 - B669

pub fn b670(&self) -> B670_R[src]

Bit 30 - B670

pub fn b671(&self) -> B671_R[src]

Bit 31 - B671

impl R<u32, Reg<u32, _MPCBB2_VCTR21>>[src]

pub fn b672(&self) -> B672_R[src]

Bit 0 - B672

pub fn b673(&self) -> B673_R[src]

Bit 1 - B673

pub fn b674(&self) -> B674_R[src]

Bit 2 - B674

pub fn b675(&self) -> B675_R[src]

Bit 3 - B675

pub fn b676(&self) -> B676_R[src]

Bit 4 - B676

pub fn b677(&self) -> B677_R[src]

Bit 5 - B677

pub fn b678(&self) -> B678_R[src]

Bit 6 - B678

pub fn b679(&self) -> B679_R[src]

Bit 7 - B679

pub fn b680(&self) -> B680_R[src]

Bit 8 - B680

pub fn b681(&self) -> B681_R[src]

Bit 9 - B681

pub fn b682(&self) -> B682_R[src]

Bit 10 - B682

pub fn b683(&self) -> B683_R[src]

Bit 11 - B683

pub fn b684(&self) -> B684_R[src]

Bit 12 - B684

pub fn b685(&self) -> B685_R[src]

Bit 13 - B685

pub fn b686(&self) -> B686_R[src]

Bit 14 - B686

pub fn b687(&self) -> B687_R[src]

Bit 15 - B687

pub fn b688(&self) -> B688_R[src]

Bit 16 - B688

pub fn b689(&self) -> B689_R[src]

Bit 17 - B689

pub fn b690(&self) -> B690_R[src]

Bit 18 - B690

pub fn b691(&self) -> B691_R[src]

Bit 19 - B691

pub fn b692(&self) -> B692_R[src]

Bit 20 - B692

pub fn b693(&self) -> B693_R[src]

Bit 21 - B693

pub fn b694(&self) -> B694_R[src]

Bit 22 - B694

pub fn b695(&self) -> B695_R[src]

Bit 23 - B695

pub fn b696(&self) -> B696_R[src]

Bit 24 - B696

pub fn b697(&self) -> B697_R[src]

Bit 25 - B697

pub fn b698(&self) -> B698_R[src]

Bit 26 - B698

pub fn b699(&self) -> B699_R[src]

Bit 27 - B699

pub fn b700(&self) -> B700_R[src]

Bit 28 - B700

pub fn b701(&self) -> B701_R[src]

Bit 29 - B701

pub fn b702(&self) -> B702_R[src]

Bit 30 - B702

pub fn b703(&self) -> B703_R[src]

Bit 31 - B703

impl R<u32, Reg<u32, _MPCBB2_VCTR22>>[src]

pub fn b704(&self) -> B704_R[src]

Bit 0 - B704

pub fn b705(&self) -> B705_R[src]

Bit 1 - B705

pub fn b706(&self) -> B706_R[src]

Bit 2 - B706

pub fn b707(&self) -> B707_R[src]

Bit 3 - B707

pub fn b708(&self) -> B708_R[src]

Bit 4 - B708

pub fn b709(&self) -> B709_R[src]

Bit 5 - B709

pub fn b710(&self) -> B710_R[src]

Bit 6 - B710

pub fn b711(&self) -> B711_R[src]

Bit 7 - B711

pub fn b712(&self) -> B712_R[src]

Bit 8 - B712

pub fn b713(&self) -> B713_R[src]

Bit 9 - B713

pub fn b714(&self) -> B714_R[src]

Bit 10 - B714

pub fn b715(&self) -> B715_R[src]

Bit 11 - B715

pub fn b716(&self) -> B716_R[src]

Bit 12 - B716

pub fn b717(&self) -> B717_R[src]

Bit 13 - B717

pub fn b718(&self) -> B718_R[src]

Bit 14 - B718

pub fn b719(&self) -> B719_R[src]

Bit 15 - B719

pub fn b720(&self) -> B720_R[src]

Bit 16 - B720

pub fn b721(&self) -> B721_R[src]

Bit 17 - B721

pub fn b722(&self) -> B722_R[src]

Bit 18 - B722

pub fn b723(&self) -> B723_R[src]

Bit 19 - B723

pub fn b724(&self) -> B724_R[src]

Bit 20 - B724

pub fn b725(&self) -> B725_R[src]

Bit 21 - B725

pub fn b726(&self) -> B726_R[src]

Bit 22 - B726

pub fn b727(&self) -> B727_R[src]

Bit 23 - B727

pub fn b728(&self) -> B728_R[src]

Bit 24 - B728

pub fn b729(&self) -> B729_R[src]

Bit 25 - B729

pub fn b730(&self) -> B730_R[src]

Bit 26 - B730

pub fn b731(&self) -> B731_R[src]

Bit 27 - B731

pub fn b732(&self) -> B732_R[src]

Bit 28 - B732

pub fn b733(&self) -> B733_R[src]

Bit 29 - B733

pub fn b734(&self) -> B734_R[src]

Bit 30 - B734

pub fn b735(&self) -> B735_R[src]

Bit 31 - B735

impl R<u32, Reg<u32, _MPCBB2_VCTR23>>[src]

pub fn b736(&self) -> B736_R[src]

Bit 0 - B736

pub fn b737(&self) -> B737_R[src]

Bit 1 - B737

pub fn b738(&self) -> B738_R[src]

Bit 2 - B738

pub fn b739(&self) -> B739_R[src]

Bit 3 - B739

pub fn b740(&self) -> B740_R[src]

Bit 4 - B740

pub fn b741(&self) -> B741_R[src]

Bit 5 - B741

pub fn b742(&self) -> B742_R[src]

Bit 6 - B742

pub fn b743(&self) -> B743_R[src]

Bit 7 - B743

pub fn b744(&self) -> B744_R[src]

Bit 8 - B744

pub fn b745(&self) -> B745_R[src]

Bit 9 - B745

pub fn b746(&self) -> B746_R[src]

Bit 10 - B746

pub fn b747(&self) -> B747_R[src]

Bit 11 - B747

pub fn b748(&self) -> B748_R[src]

Bit 12 - B748

pub fn b749(&self) -> B749_R[src]

Bit 13 - B749

pub fn b750(&self) -> B750_R[src]

Bit 14 - B750

pub fn b751(&self) -> B751_R[src]

Bit 15 - B751

pub fn b752(&self) -> B752_R[src]

Bit 16 - B752

pub fn b753(&self) -> B753_R[src]

Bit 17 - B753

pub fn b754(&self) -> B754_R[src]

Bit 18 - B754

pub fn b755(&self) -> B755_R[src]

Bit 19 - B755

pub fn b756(&self) -> B756_R[src]

Bit 20 - B756

pub fn b757(&self) -> B757_R[src]

Bit 21 - B757

pub fn b758(&self) -> B758_R[src]

Bit 22 - B758

pub fn b759(&self) -> B759_R[src]

Bit 23 - B759

pub fn b760(&self) -> B760_R[src]

Bit 24 - B760

pub fn b761(&self) -> B761_R[src]

Bit 25 - B761

pub fn b762(&self) -> B762_R[src]

Bit 26 - B762

pub fn b763(&self) -> B763_R[src]

Bit 27 - B763

pub fn b764(&self) -> B764_R[src]

Bit 28 - B764

pub fn b765(&self) -> B765_R[src]

Bit 29 - B765

pub fn b766(&self) -> B766_R[src]

Bit 30 - B766

pub fn b767(&self) -> B767_R[src]

Bit 31 - B767

impl R<u32, Reg<u32, _MPCBB2_VCTR24>>[src]

pub fn b768(&self) -> B768_R[src]

Bit 0 - B768

pub fn b769(&self) -> B769_R[src]

Bit 1 - B769

pub fn b770(&self) -> B770_R[src]

Bit 2 - B770

pub fn b771(&self) -> B771_R[src]

Bit 3 - B771

pub fn b772(&self) -> B772_R[src]

Bit 4 - B772

pub fn b773(&self) -> B773_R[src]

Bit 5 - B773

pub fn b774(&self) -> B774_R[src]

Bit 6 - B774

pub fn b775(&self) -> B775_R[src]

Bit 7 - B775

pub fn b776(&self) -> B776_R[src]

Bit 8 - B776

pub fn b777(&self) -> B777_R[src]

Bit 9 - B777

pub fn b778(&self) -> B778_R[src]

Bit 10 - B778

pub fn b779(&self) -> B779_R[src]

Bit 11 - B779

pub fn b780(&self) -> B780_R[src]

Bit 12 - B780

pub fn b781(&self) -> B781_R[src]

Bit 13 - B781

pub fn b782(&self) -> B782_R[src]

Bit 14 - B782

pub fn b783(&self) -> B783_R[src]

Bit 15 - B783

pub fn b784(&self) -> B784_R[src]

Bit 16 - B784

pub fn b785(&self) -> B785_R[src]

Bit 17 - B785

pub fn b786(&self) -> B786_R[src]

Bit 18 - B786

pub fn b787(&self) -> B787_R[src]

Bit 19 - B787

pub fn b788(&self) -> B788_R[src]

Bit 20 - B788

pub fn b789(&self) -> B789_R[src]

Bit 21 - B789

pub fn b790(&self) -> B790_R[src]

Bit 22 - B790

pub fn b791(&self) -> B791_R[src]

Bit 23 - B791

pub fn b792(&self) -> B792_R[src]

Bit 24 - B792

pub fn b793(&self) -> B793_R[src]

Bit 25 - B793

pub fn b794(&self) -> B794_R[src]

Bit 26 - B794

pub fn b795(&self) -> B795_R[src]

Bit 27 - B795

pub fn b796(&self) -> B796_R[src]

Bit 28 - B796

pub fn b797(&self) -> B797_R[src]

Bit 29 - B797

pub fn b798(&self) -> B798_R[src]

Bit 30 - B798

pub fn b799(&self) -> B799_R[src]

Bit 31 - B799

impl R<u32, Reg<u32, _MPCBB2_VCTR25>>[src]

pub fn b800(&self) -> B800_R[src]

Bit 0 - B800

pub fn b801(&self) -> B801_R[src]

Bit 1 - B801

pub fn b802(&self) -> B802_R[src]

Bit 2 - B802

pub fn b803(&self) -> B803_R[src]

Bit 3 - B803

pub fn b804(&self) -> B804_R[src]

Bit 4 - B804

pub fn b805(&self) -> B805_R[src]

Bit 5 - B805

pub fn b806(&self) -> B806_R[src]

Bit 6 - B806

pub fn b807(&self) -> B807_R[src]

Bit 7 - B807

pub fn b808(&self) -> B808_R[src]

Bit 8 - B808

pub fn b809(&self) -> B809_R[src]

Bit 9 - B809

pub fn b810(&self) -> B810_R[src]

Bit 10 - B810

pub fn b811(&self) -> B811_R[src]

Bit 11 - B811

pub fn b812(&self) -> B812_R[src]

Bit 12 - B812

pub fn b813(&self) -> B813_R[src]

Bit 13 - B813

pub fn b814(&self) -> B814_R[src]

Bit 14 - B814

pub fn b815(&self) -> B815_R[src]

Bit 15 - B815

pub fn b816(&self) -> B816_R[src]

Bit 16 - B816

pub fn b817(&self) -> B817_R[src]

Bit 17 - B817

pub fn b818(&self) -> B818_R[src]

Bit 18 - B818

pub fn b819(&self) -> B819_R[src]

Bit 19 - B819

pub fn b820(&self) -> B820_R[src]

Bit 20 - B820

pub fn b821(&self) -> B821_R[src]

Bit 21 - B821

pub fn b822(&self) -> B822_R[src]

Bit 22 - B822

pub fn b823(&self) -> B823_R[src]

Bit 23 - B823

pub fn b824(&self) -> B824_R[src]

Bit 24 - B824

pub fn b825(&self) -> B825_R[src]

Bit 25 - B825

pub fn b826(&self) -> B826_R[src]

Bit 26 - B826

pub fn b827(&self) -> B827_R[src]

Bit 27 - B827

pub fn b828(&self) -> B828_R[src]

Bit 28 - B828

pub fn b829(&self) -> B829_R[src]

Bit 29 - B829

pub fn b830(&self) -> B830_R[src]

Bit 30 - B830

pub fn b831(&self) -> B831_R[src]

Bit 31 - B831

impl R<u32, Reg<u32, _MPCBB2_VCTR26>>[src]

pub fn b832(&self) -> B832_R[src]

Bit 0 - B832

pub fn b833(&self) -> B833_R[src]

Bit 1 - B833

pub fn b834(&self) -> B834_R[src]

Bit 2 - B834

pub fn b835(&self) -> B835_R[src]

Bit 3 - B835

pub fn b836(&self) -> B836_R[src]

Bit 4 - B836

pub fn b837(&self) -> B837_R[src]

Bit 5 - B837

pub fn b838(&self) -> B838_R[src]

Bit 6 - B838

pub fn b839(&self) -> B839_R[src]

Bit 7 - B839

pub fn b840(&self) -> B840_R[src]

Bit 8 - B840

pub fn b841(&self) -> B841_R[src]

Bit 9 - B841

pub fn b842(&self) -> B842_R[src]

Bit 10 - B842

pub fn b843(&self) -> B843_R[src]

Bit 11 - B843

pub fn b844(&self) -> B844_R[src]

Bit 12 - B844

pub fn b845(&self) -> B845_R[src]

Bit 13 - B845

pub fn b846(&self) -> B846_R[src]

Bit 14 - B846

pub fn b847(&self) -> B847_R[src]

Bit 15 - B847

pub fn b848(&self) -> B848_R[src]

Bit 16 - B848

pub fn b849(&self) -> B849_R[src]

Bit 17 - B849

pub fn b850(&self) -> B850_R[src]

Bit 18 - B850

pub fn b851(&self) -> B851_R[src]

Bit 19 - B851

pub fn b852(&self) -> B852_R[src]

Bit 20 - B852

pub fn b853(&self) -> B853_R[src]

Bit 21 - B853

pub fn b854(&self) -> B854_R[src]

Bit 22 - B854

pub fn b855(&self) -> B855_R[src]

Bit 23 - B855

pub fn b856(&self) -> B856_R[src]

Bit 24 - B856

pub fn b857(&self) -> B857_R[src]

Bit 25 - B857

pub fn b858(&self) -> B858_R[src]

Bit 26 - B858

pub fn b859(&self) -> B859_R[src]

Bit 27 - B859

pub fn b860(&self) -> B860_R[src]

Bit 28 - B860

pub fn b861(&self) -> B861_R[src]

Bit 29 - B861

pub fn b862(&self) -> B862_R[src]

Bit 30 - B862

pub fn b863(&self) -> B863_R[src]

Bit 31 - B863

impl R<u32, Reg<u32, _MPCBB2_VCTR27>>[src]

pub fn b864(&self) -> B864_R[src]

Bit 0 - B864

pub fn b865(&self) -> B865_R[src]

Bit 1 - B865

pub fn b866(&self) -> B866_R[src]

Bit 2 - B866

pub fn b867(&self) -> B867_R[src]

Bit 3 - B867

pub fn b868(&self) -> B868_R[src]

Bit 4 - B868

pub fn b869(&self) -> B869_R[src]

Bit 5 - B869

pub fn b870(&self) -> B870_R[src]

Bit 6 - B870

pub fn b871(&self) -> B871_R[src]

Bit 7 - B871

pub fn b872(&self) -> B872_R[src]

Bit 8 - B872

pub fn b873(&self) -> B873_R[src]

Bit 9 - B873

pub fn b874(&self) -> B874_R[src]

Bit 10 - B874

pub fn b875(&self) -> B875_R[src]

Bit 11 - B875

pub fn b876(&self) -> B876_R[src]

Bit 12 - B876

pub fn b877(&self) -> B877_R[src]

Bit 13 - B877

pub fn b878(&self) -> B878_R[src]

Bit 14 - B878

pub fn b879(&self) -> B879_R[src]

Bit 15 - B879

pub fn b880(&self) -> B880_R[src]

Bit 16 - B880

pub fn b881(&self) -> B881_R[src]

Bit 17 - B881

pub fn b882(&self) -> B882_R[src]

Bit 18 - B882

pub fn b883(&self) -> B883_R[src]

Bit 19 - B883

pub fn b884(&self) -> B884_R[src]

Bit 20 - B884

pub fn b885(&self) -> B885_R[src]

Bit 21 - B885

pub fn b886(&self) -> B886_R[src]

Bit 22 - B886

pub fn b887(&self) -> B887_R[src]

Bit 23 - B887

pub fn b888(&self) -> B888_R[src]

Bit 24 - B888

pub fn b889(&self) -> B889_R[src]

Bit 25 - B889

pub fn b890(&self) -> B890_R[src]

Bit 26 - B890

pub fn b891(&self) -> B891_R[src]

Bit 27 - B891

pub fn b892(&self) -> B892_R[src]

Bit 28 - B892

pub fn b893(&self) -> B893_R[src]

Bit 29 - B893

pub fn b894(&self) -> B894_R[src]

Bit 30 - B894

pub fn b895(&self) -> B895_R[src]

Bit 31 - B895

impl R<u32, Reg<u32, _MPCBB2_VCTR28>>[src]

pub fn b896(&self) -> B896_R[src]

Bit 0 - B896

pub fn b897(&self) -> B897_R[src]

Bit 1 - B897

pub fn b898(&self) -> B898_R[src]

Bit 2 - B898

pub fn b899(&self) -> B899_R[src]

Bit 3 - B899

pub fn b900(&self) -> B900_R[src]

Bit 4 - B900

pub fn b901(&self) -> B901_R[src]

Bit 5 - B901

pub fn b902(&self) -> B902_R[src]

Bit 6 - B902

pub fn b903(&self) -> B903_R[src]

Bit 7 - B903

pub fn b904(&self) -> B904_R[src]

Bit 8 - B904

pub fn b905(&self) -> B905_R[src]

Bit 9 - B905

pub fn b906(&self) -> B906_R[src]

Bit 10 - B906

pub fn b907(&self) -> B907_R[src]

Bit 11 - B907

pub fn b908(&self) -> B908_R[src]

Bit 12 - B908

pub fn b909(&self) -> B909_R[src]

Bit 13 - B909

pub fn b910(&self) -> B910_R[src]

Bit 14 - B910

pub fn b911(&self) -> B911_R[src]

Bit 15 - B911

pub fn b912(&self) -> B912_R[src]

Bit 16 - B912

pub fn b913(&self) -> B913_R[src]

Bit 17 - B913

pub fn b914(&self) -> B914_R[src]

Bit 18 - B914

pub fn b915(&self) -> B915_R[src]

Bit 19 - B915

pub fn b916(&self) -> B916_R[src]

Bit 20 - B916

pub fn b917(&self) -> B917_R[src]

Bit 21 - B917

pub fn b918(&self) -> B918_R[src]

Bit 22 - B918

pub fn b919(&self) -> B919_R[src]

Bit 23 - B919

pub fn b920(&self) -> B920_R[src]

Bit 24 - B920

pub fn b921(&self) -> B921_R[src]

Bit 25 - B921

pub fn b922(&self) -> B922_R[src]

Bit 26 - B922

pub fn b923(&self) -> B923_R[src]

Bit 27 - B923

pub fn b924(&self) -> B924_R[src]

Bit 28 - B924

pub fn b925(&self) -> B925_R[src]

Bit 29 - B925

pub fn b926(&self) -> B926_R[src]

Bit 30 - B926

pub fn b927(&self) -> B927_R[src]

Bit 31 - B927

impl R<u32, Reg<u32, _MPCBB2_VCTR29>>[src]

pub fn b928(&self) -> B928_R[src]

Bit 0 - B928

pub fn b929(&self) -> B929_R[src]

Bit 1 - B929

pub fn b930(&self) -> B930_R[src]

Bit 2 - B930

pub fn b931(&self) -> B931_R[src]

Bit 3 - B931

pub fn b932(&self) -> B932_R[src]

Bit 4 - B932

pub fn b933(&self) -> B933_R[src]

Bit 5 - B933

pub fn b934(&self) -> B934_R[src]

Bit 6 - B934

pub fn b935(&self) -> B935_R[src]

Bit 7 - B935

pub fn b936(&self) -> B936_R[src]

Bit 8 - B936

pub fn b937(&self) -> B937_R[src]

Bit 9 - B937

pub fn b938(&self) -> B938_R[src]

Bit 10 - B938

pub fn b939(&self) -> B939_R[src]

Bit 11 - B939

pub fn b940(&self) -> B940_R[src]

Bit 12 - B940

pub fn b941(&self) -> B941_R[src]

Bit 13 - B941

pub fn b942(&self) -> B942_R[src]

Bit 14 - B942

pub fn b943(&self) -> B943_R[src]

Bit 15 - B943

pub fn b944(&self) -> B944_R[src]

Bit 16 - B944

pub fn b945(&self) -> B945_R[src]

Bit 17 - B945

pub fn b946(&self) -> B946_R[src]

Bit 18 - B946

pub fn b947(&self) -> B947_R[src]

Bit 19 - B947

pub fn b948(&self) -> B948_R[src]

Bit 20 - B948

pub fn b949(&self) -> B949_R[src]

Bit 21 - B949

pub fn b950(&self) -> B950_R[src]

Bit 22 - B950

pub fn b951(&self) -> B951_R[src]

Bit 23 - B951

pub fn b952(&self) -> B952_R[src]

Bit 24 - B952

pub fn b953(&self) -> B953_R[src]

Bit 25 - B953

pub fn b954(&self) -> B954_R[src]

Bit 26 - B954

pub fn b955(&self) -> B955_R[src]

Bit 27 - B955

pub fn b956(&self) -> B956_R[src]

Bit 28 - B956

pub fn b957(&self) -> B957_R[src]

Bit 29 - B957

pub fn b958(&self) -> B958_R[src]

Bit 30 - B958

pub fn b959(&self) -> B959_R[src]

Bit 31 - B959

impl R<u32, Reg<u32, _MPCBB2_VCTR30>>[src]

pub fn b960(&self) -> B960_R[src]

Bit 0 - B960

pub fn b961(&self) -> B961_R[src]

Bit 1 - B961

pub fn b962(&self) -> B962_R[src]

Bit 2 - B962

pub fn b963(&self) -> B963_R[src]

Bit 3 - B963

pub fn b964(&self) -> B964_R[src]

Bit 4 - B964

pub fn b965(&self) -> B965_R[src]

Bit 5 - B965

pub fn b966(&self) -> B966_R[src]

Bit 6 - B966

pub fn b967(&self) -> B967_R[src]

Bit 7 - B967

pub fn b968(&self) -> B968_R[src]

Bit 8 - B968

pub fn b969(&self) -> B969_R[src]

Bit 9 - B969

pub fn b970(&self) -> B970_R[src]

Bit 10 - B970

pub fn b971(&self) -> B971_R[src]

Bit 11 - B971

pub fn b972(&self) -> B972_R[src]

Bit 12 - B972

pub fn b973(&self) -> B973_R[src]

Bit 13 - B973

pub fn b974(&self) -> B974_R[src]

Bit 14 - B974

pub fn b975(&self) -> B975_R[src]

Bit 15 - B975

pub fn b976(&self) -> B976_R[src]

Bit 16 - B976

pub fn b977(&self) -> B977_R[src]

Bit 17 - B977

pub fn b978(&self) -> B978_R[src]

Bit 18 - B978

pub fn b979(&self) -> B979_R[src]

Bit 19 - B979

pub fn b980(&self) -> B980_R[src]

Bit 20 - B980

pub fn b981(&self) -> B981_R[src]

Bit 21 - B981

pub fn b982(&self) -> B982_R[src]

Bit 22 - B982

pub fn b983(&self) -> B983_R[src]

Bit 23 - B983

pub fn b984(&self) -> B984_R[src]

Bit 24 - B984

pub fn b985(&self) -> B985_R[src]

Bit 25 - B985

pub fn b986(&self) -> B986_R[src]

Bit 26 - B986

pub fn b987(&self) -> B987_R[src]

Bit 27 - B987

pub fn b988(&self) -> B988_R[src]

Bit 28 - B988

pub fn b989(&self) -> B989_R[src]

Bit 29 - B989

pub fn b990(&self) -> B990_R[src]

Bit 30 - B990

pub fn b991(&self) -> B991_R[src]

Bit 31 - B991

impl R<u32, Reg<u32, _MPCBB2_VCTR31>>[src]

pub fn b992(&self) -> B992_R[src]

Bit 0 - B992

pub fn b993(&self) -> B993_R[src]

Bit 1 - B993

pub fn b994(&self) -> B994_R[src]

Bit 2 - B994

pub fn b995(&self) -> B995_R[src]

Bit 3 - B995

pub fn b996(&self) -> B996_R[src]

Bit 4 - B996

pub fn b997(&self) -> B997_R[src]

Bit 5 - B997

pub fn b998(&self) -> B998_R[src]

Bit 6 - B998

pub fn b999(&self) -> B999_R[src]

Bit 7 - B999

pub fn b1000(&self) -> B1000_R[src]

Bit 8 - B1000

pub fn b1001(&self) -> B1001_R[src]

Bit 9 - B1001

pub fn b1002(&self) -> B1002_R[src]

Bit 10 - B1002

pub fn b1003(&self) -> B1003_R[src]

Bit 11 - B1003

pub fn b1004(&self) -> B1004_R[src]

Bit 12 - B1004

pub fn b1005(&self) -> B1005_R[src]

Bit 13 - B1005

pub fn b1006(&self) -> B1006_R[src]

Bit 14 - B1006

pub fn b1007(&self) -> B1007_R[src]

Bit 15 - B1007

pub fn b1008(&self) -> B1008_R[src]

Bit 16 - B1008

pub fn b1009(&self) -> B1009_R[src]

Bit 17 - B1009

pub fn b1010(&self) -> B1010_R[src]

Bit 18 - B1010

pub fn b1011(&self) -> B1011_R[src]

Bit 19 - B1011

pub fn b1012(&self) -> B1012_R[src]

Bit 20 - B1012

pub fn b1013(&self) -> B1013_R[src]

Bit 21 - B1013

pub fn b1014(&self) -> B1014_R[src]

Bit 22 - B1014

pub fn b1015(&self) -> B1015_R[src]

Bit 23 - B1015

pub fn b1016(&self) -> B1016_R[src]

Bit 24 - B1016

pub fn b1017(&self) -> B1017_R[src]

Bit 25 - B1017

pub fn b1018(&self) -> B1018_R[src]

Bit 26 - B1018

pub fn b1019(&self) -> B1019_R[src]

Bit 27 - B1019

pub fn b1020(&self) -> B1020_R[src]

Bit 28 - B1020

pub fn b1021(&self) -> B1021_R[src]

Bit 29 - B1021

pub fn b1022(&self) -> B1022_R[src]

Bit 30 - B1022

pub fn b1023(&self) -> B1023_R[src]

Bit 31 - B1023

impl R<u32, Reg<u32, _MPCBB2_VCTR32>>[src]

pub fn b1024(&self) -> B1024_R[src]

Bit 0 - B1024

pub fn b1025(&self) -> B1025_R[src]

Bit 1 - B1025

pub fn b1026(&self) -> B1026_R[src]

Bit 2 - B1026

pub fn b1027(&self) -> B1027_R[src]

Bit 3 - B1027

pub fn b1028(&self) -> B1028_R[src]

Bit 4 - B1028

pub fn b1029(&self) -> B1029_R[src]

Bit 5 - B1029

pub fn b1030(&self) -> B1030_R[src]

Bit 6 - B1030

pub fn b1031(&self) -> B1031_R[src]

Bit 7 - B1031

pub fn b1032(&self) -> B1032_R[src]

Bit 8 - B1032

pub fn b1033(&self) -> B1033_R[src]

Bit 9 - B1033

pub fn b1034(&self) -> B1034_R[src]

Bit 10 - B1034

pub fn b1035(&self) -> B1035_R[src]

Bit 11 - B1035

pub fn b1036(&self) -> B1036_R[src]

Bit 12 - B1036

pub fn b1037(&self) -> B1037_R[src]

Bit 13 - B1037

pub fn b1038(&self) -> B1038_R[src]

Bit 14 - B1038

pub fn b1039(&self) -> B1039_R[src]

Bit 15 - B1039

pub fn b1040(&self) -> B1040_R[src]

Bit 16 - B1040

pub fn b1041(&self) -> B1041_R[src]

Bit 17 - B1041

pub fn b1042(&self) -> B1042_R[src]

Bit 18 - B1042

pub fn b1043(&self) -> B1043_R[src]

Bit 19 - B1043

pub fn b1044(&self) -> B1044_R[src]

Bit 20 - B1044

pub fn b1045(&self) -> B1045_R[src]

Bit 21 - B1045

pub fn b1046(&self) -> B1046_R[src]

Bit 22 - B1046

pub fn b1047(&self) -> B1047_R[src]

Bit 23 - B1047

pub fn b1048(&self) -> B1048_R[src]

Bit 24 - B1048

pub fn b1049(&self) -> B1049_R[src]

Bit 25 - B1049

pub fn b1050(&self) -> B1050_R[src]

Bit 26 - B1050

pub fn b1051(&self) -> B1051_R[src]

Bit 27 - B1051

pub fn b1052(&self) -> B1052_R[src]

Bit 28 - B1052

pub fn b1053(&self) -> B1053_R[src]

Bit 29 - B1053

pub fn b1054(&self) -> B1054_R[src]

Bit 30 - B1054

pub fn b1055(&self) -> B1055_R[src]

Bit 31 - B1055

impl R<u32, Reg<u32, _MPCBB2_VCTR33>>[src]

pub fn b1056(&self) -> B1056_R[src]

Bit 0 - B1056

pub fn b1057(&self) -> B1057_R[src]

Bit 1 - B1057

pub fn b1058(&self) -> B1058_R[src]

Bit 2 - B1058

pub fn b1059(&self) -> B1059_R[src]

Bit 3 - B1059

pub fn b1060(&self) -> B1060_R[src]

Bit 4 - B1060

pub fn b1061(&self) -> B1061_R[src]

Bit 5 - B1061

pub fn b1062(&self) -> B1062_R[src]

Bit 6 - B1062

pub fn b1063(&self) -> B1063_R[src]

Bit 7 - B1063

pub fn b1064(&self) -> B1064_R[src]

Bit 8 - B1064

pub fn b1065(&self) -> B1065_R[src]

Bit 9 - B1065

pub fn b1066(&self) -> B1066_R[src]

Bit 10 - B1066

pub fn b1067(&self) -> B1067_R[src]

Bit 11 - B1067

pub fn b1068(&self) -> B1068_R[src]

Bit 12 - B1068

pub fn b1069(&self) -> B1069_R[src]

Bit 13 - B1069

pub fn b1070(&self) -> B1070_R[src]

Bit 14 - B1070

pub fn b1071(&self) -> B1071_R[src]

Bit 15 - B1071

pub fn b1072(&self) -> B1072_R[src]

Bit 16 - B1072

pub fn b1073(&self) -> B1073_R[src]

Bit 17 - B1073

pub fn b1074(&self) -> B1074_R[src]

Bit 18 - B1074

pub fn b1075(&self) -> B1075_R[src]

Bit 19 - B1075

pub fn b1076(&self) -> B1076_R[src]

Bit 20 - B1076

pub fn b1077(&self) -> B1077_R[src]

Bit 21 - B1077

pub fn b1078(&self) -> B1078_R[src]

Bit 22 - B1078

pub fn b1079(&self) -> B1079_R[src]

Bit 23 - B1079

pub fn b1080(&self) -> B1080_R[src]

Bit 24 - B1080

pub fn b1081(&self) -> B1081_R[src]

Bit 25 - B1081

pub fn b1082(&self) -> B1082_R[src]

Bit 26 - B1082

pub fn b1083(&self) -> B1083_R[src]

Bit 27 - B1083

pub fn b1084(&self) -> B1084_R[src]

Bit 28 - B1084

pub fn b1085(&self) -> B1085_R[src]

Bit 29 - B1085

pub fn b1086(&self) -> B1086_R[src]

Bit 30 - B1086

pub fn b1087(&self) -> B1087_R[src]

Bit 31 - B1087

impl R<u32, Reg<u32, _MPCBB2_VCTR34>>[src]

pub fn b1088(&self) -> B1088_R[src]

Bit 0 - B1088

pub fn b1089(&self) -> B1089_R[src]

Bit 1 - B1089

pub fn b1090(&self) -> B1090_R[src]

Bit 2 - B1090

pub fn b1091(&self) -> B1091_R[src]

Bit 3 - B1091

pub fn b1092(&self) -> B1092_R[src]

Bit 4 - B1092

pub fn b1093(&self) -> B1093_R[src]

Bit 5 - B1093

pub fn b1094(&self) -> B1094_R[src]

Bit 6 - B1094

pub fn b1095(&self) -> B1095_R[src]

Bit 7 - B1095

pub fn b1096(&self) -> B1096_R[src]

Bit 8 - B1096

pub fn b1097(&self) -> B1097_R[src]

Bit 9 - B1097

pub fn b1098(&self) -> B1098_R[src]

Bit 10 - B1098

pub fn b1099(&self) -> B1099_R[src]

Bit 11 - B1099

pub fn b1100(&self) -> B1100_R[src]

Bit 12 - B1100

pub fn b1101(&self) -> B1101_R[src]

Bit 13 - B1101

pub fn b1102(&self) -> B1102_R[src]

Bit 14 - B1102

pub fn b1103(&self) -> B1103_R[src]

Bit 15 - B1103

pub fn b1104(&self) -> B1104_R[src]

Bit 16 - B1104

pub fn b1105(&self) -> B1105_R[src]

Bit 17 - B1105

pub fn b1106(&self) -> B1106_R[src]

Bit 18 - B1106

pub fn b1107(&self) -> B1107_R[src]

Bit 19 - B1107

pub fn b1108(&self) -> B1108_R[src]

Bit 20 - B1108

pub fn b1109(&self) -> B1109_R[src]

Bit 21 - B1109

pub fn b1110(&self) -> B1110_R[src]

Bit 22 - B1110

pub fn b1111(&self) -> B1111_R[src]

Bit 23 - B1111

pub fn b1112(&self) -> B1112_R[src]

Bit 24 - B1112

pub fn b1113(&self) -> B1113_R[src]

Bit 25 - B1113

pub fn b1114(&self) -> B1114_R[src]

Bit 26 - B1114

pub fn b1115(&self) -> B1115_R[src]

Bit 27 - B1115

pub fn b1116(&self) -> B1116_R[src]

Bit 28 - B1116

pub fn b1117(&self) -> B1117_R[src]

Bit 29 - B1117

pub fn b1118(&self) -> B1118_R[src]

Bit 30 - B1118

pub fn b1119(&self) -> B1119_R[src]

Bit 31 - B1119

impl R<u32, Reg<u32, _MPCBB2_VCTR35>>[src]

pub fn b1120(&self) -> B1120_R[src]

Bit 0 - B1120

pub fn b1121(&self) -> B1121_R[src]

Bit 1 - B1121

pub fn b1122(&self) -> B1122_R[src]

Bit 2 - B1122

pub fn b1123(&self) -> B1123_R[src]

Bit 3 - B1123

pub fn b1124(&self) -> B1124_R[src]

Bit 4 - B1124

pub fn b1125(&self) -> B1125_R[src]

Bit 5 - B1125

pub fn b1126(&self) -> B1126_R[src]

Bit 6 - B1126

pub fn b1127(&self) -> B1127_R[src]

Bit 7 - B1127

pub fn b1128(&self) -> B1128_R[src]

Bit 8 - B1128

pub fn b1129(&self) -> B1129_R[src]

Bit 9 - B1129

pub fn b1130(&self) -> B1130_R[src]

Bit 10 - B1130

pub fn b1131(&self) -> B1131_R[src]

Bit 11 - B1131

pub fn b1132(&self) -> B1132_R[src]

Bit 12 - B1132

pub fn b1133(&self) -> B1133_R[src]

Bit 13 - B1133

pub fn b1134(&self) -> B1134_R[src]

Bit 14 - B1134

pub fn b1135(&self) -> B1135_R[src]

Bit 15 - B1135

pub fn b1136(&self) -> B1136_R[src]

Bit 16 - B1136

pub fn b1137(&self) -> B1137_R[src]

Bit 17 - B1137

pub fn b1138(&self) -> B1138_R[src]

Bit 18 - B1138

pub fn b1139(&self) -> B1139_R[src]

Bit 19 - B1139

pub fn b1140(&self) -> B1140_R[src]

Bit 20 - B1140

pub fn b1141(&self) -> B1141_R[src]

Bit 21 - B1141

pub fn b1142(&self) -> B1142_R[src]

Bit 22 - B1142

pub fn b1143(&self) -> B1143_R[src]

Bit 23 - B1143

pub fn b1144(&self) -> B1144_R[src]

Bit 24 - B1144

pub fn b1145(&self) -> B1145_R[src]

Bit 25 - B1145

pub fn b1146(&self) -> B1146_R[src]

Bit 26 - B1146

pub fn b1147(&self) -> B1147_R[src]

Bit 27 - B1147

pub fn b1148(&self) -> B1148_R[src]

Bit 28 - B1148

pub fn b1149(&self) -> B1149_R[src]

Bit 29 - B1149

pub fn b1150(&self) -> B1150_R[src]

Bit 30 - B1150

pub fn b1151(&self) -> B1151_R[src]

Bit 31 - B1151

impl R<u32, Reg<u32, _MPCBB2_VCTR36>>[src]

pub fn b1152(&self) -> B1152_R[src]

Bit 0 - B1152

pub fn b1153(&self) -> B1153_R[src]

Bit 1 - B1153

pub fn b1154(&self) -> B1154_R[src]

Bit 2 - B1154

pub fn b1155(&self) -> B1155_R[src]

Bit 3 - B1155

pub fn b1156(&self) -> B1156_R[src]

Bit 4 - B1156

pub fn b1157(&self) -> B1157_R[src]

Bit 5 - B1157

pub fn b1158(&self) -> B1158_R[src]

Bit 6 - B1158

pub fn b1159(&self) -> B1159_R[src]

Bit 7 - B1159

pub fn b1160(&self) -> B1160_R[src]

Bit 8 - B1160

pub fn b1161(&self) -> B1161_R[src]

Bit 9 - B1161

pub fn b1162(&self) -> B1162_R[src]

Bit 10 - B1162

pub fn b1163(&self) -> B1163_R[src]

Bit 11 - B1163

pub fn b1164(&self) -> B1164_R[src]

Bit 12 - B1164

pub fn b1165(&self) -> B1165_R[src]

Bit 13 - B1165

pub fn b1166(&self) -> B1166_R[src]

Bit 14 - B1166

pub fn b1167(&self) -> B1167_R[src]

Bit 15 - B1167

pub fn b1168(&self) -> B1168_R[src]

Bit 16 - B1168

pub fn b1169(&self) -> B1169_R[src]

Bit 17 - B1169

pub fn b1170(&self) -> B1170_R[src]

Bit 18 - B1170

pub fn b1171(&self) -> B1171_R[src]

Bit 19 - B1171

pub fn b1172(&self) -> B1172_R[src]

Bit 20 - B1172

pub fn b1173(&self) -> B1173_R[src]

Bit 21 - B1173

pub fn b1174(&self) -> B1174_R[src]

Bit 22 - B1174

pub fn b1175(&self) -> B1175_R[src]

Bit 23 - B1175

pub fn b1176(&self) -> B1176_R[src]

Bit 24 - B1176

pub fn b1177(&self) -> B1177_R[src]

Bit 25 - B1177

pub fn b1178(&self) -> B1178_R[src]

Bit 26 - B1178

pub fn b1179(&self) -> B1179_R[src]

Bit 27 - B1179

pub fn b1180(&self) -> B1180_R[src]

Bit 28 - B1180

pub fn b1181(&self) -> B1181_R[src]

Bit 29 - B1181

pub fn b1182(&self) -> B1182_R[src]

Bit 30 - B1182

pub fn b1183(&self) -> B1183_R[src]

Bit 31 - B1183

impl R<u32, Reg<u32, _MPCBB2_VCTR37>>[src]

pub fn b1184(&self) -> B1184_R[src]

Bit 0 - B1184

pub fn b1185(&self) -> B1185_R[src]

Bit 1 - B1185

pub fn b1186(&self) -> B1186_R[src]

Bit 2 - B1186

pub fn b1187(&self) -> B1187_R[src]

Bit 3 - B1187

pub fn b1188(&self) -> B1188_R[src]

Bit 4 - B1188

pub fn b1189(&self) -> B1189_R[src]

Bit 5 - B1189

pub fn b1190(&self) -> B1190_R[src]

Bit 6 - B1190

pub fn b1191(&self) -> B1191_R[src]

Bit 7 - B1191

pub fn b1192(&self) -> B1192_R[src]

Bit 8 - B1192

pub fn b1193(&self) -> B1193_R[src]

Bit 9 - B1193

pub fn b1194(&self) -> B1194_R[src]

Bit 10 - B1194

pub fn b1195(&self) -> B1195_R[src]

Bit 11 - B1195

pub fn b1196(&self) -> B1196_R[src]

Bit 12 - B1196

pub fn b1197(&self) -> B1197_R[src]

Bit 13 - B1197

pub fn b1198(&self) -> B1198_R[src]

Bit 14 - B1198

pub fn b1199(&self) -> B1199_R[src]

Bit 15 - B1199

pub fn b1200(&self) -> B1200_R[src]

Bit 16 - B1200

pub fn b1201(&self) -> B1201_R[src]

Bit 17 - B1201

pub fn b1202(&self) -> B1202_R[src]

Bit 18 - B1202

pub fn b1203(&self) -> B1203_R[src]

Bit 19 - B1203

pub fn b1204(&self) -> B1204_R[src]

Bit 20 - B1204

pub fn b1205(&self) -> B1205_R[src]

Bit 21 - B1205

pub fn b1206(&self) -> B1206_R[src]

Bit 22 - B1206

pub fn b1207(&self) -> B1207_R[src]

Bit 23 - B1207

pub fn b1208(&self) -> B1208_R[src]

Bit 24 - B1208

pub fn b1209(&self) -> B1209_R[src]

Bit 25 - B1209

pub fn b1210(&self) -> B1210_R[src]

Bit 26 - B1210

pub fn b1211(&self) -> B1211_R[src]

Bit 27 - B1211

pub fn b1212(&self) -> B1212_R[src]

Bit 28 - B1212

pub fn b1213(&self) -> B1213_R[src]

Bit 29 - B1213

pub fn b1214(&self) -> B1214_R[src]

Bit 30 - B1214

pub fn b1215(&self) -> B1215_R[src]

Bit 31 - B1215

impl R<u32, Reg<u32, _MPCBB2_VCTR38>>[src]

pub fn b1216(&self) -> B1216_R[src]

Bit 0 - B1216

pub fn b1217(&self) -> B1217_R[src]

Bit 1 - B1217

pub fn b1218(&self) -> B1218_R[src]

Bit 2 - B1218

pub fn b1219(&self) -> B1219_R[src]

Bit 3 - B1219

pub fn b1220(&self) -> B1220_R[src]

Bit 4 - B1220

pub fn b1221(&self) -> B1221_R[src]

Bit 5 - B1221

pub fn b1222(&self) -> B1222_R[src]

Bit 6 - B1222

pub fn b1223(&self) -> B1223_R[src]

Bit 7 - B1223

pub fn b1224(&self) -> B1224_R[src]

Bit 8 - B1224

pub fn b1225(&self) -> B1225_R[src]

Bit 9 - B1225

pub fn b1226(&self) -> B1226_R[src]

Bit 10 - B1226

pub fn b1227(&self) -> B1227_R[src]

Bit 11 - B1227

pub fn b1228(&self) -> B1228_R[src]

Bit 12 - B1228

pub fn b1229(&self) -> B1229_R[src]

Bit 13 - B1229

pub fn b1230(&self) -> B1230_R[src]

Bit 14 - B1230

pub fn b1231(&self) -> B1231_R[src]

Bit 15 - B1231

pub fn b1232(&self) -> B1232_R[src]

Bit 16 - B1232

pub fn b1233(&self) -> B1233_R[src]

Bit 17 - B1233

pub fn b1234(&self) -> B1234_R[src]

Bit 18 - B1234

pub fn b1235(&self) -> B1235_R[src]

Bit 19 - B1235

pub fn b1236(&self) -> B1236_R[src]

Bit 20 - B1236

pub fn b1237(&self) -> B1237_R[src]

Bit 21 - B1237

pub fn b1238(&self) -> B1238_R[src]

Bit 22 - B1238

pub fn b1239(&self) -> B1239_R[src]

Bit 23 - B1239

pub fn b1240(&self) -> B1240_R[src]

Bit 24 - B1240

pub fn b1241(&self) -> B1241_R[src]

Bit 25 - B1241

pub fn b1242(&self) -> B1242_R[src]

Bit 26 - B1242

pub fn b1243(&self) -> B1243_R[src]

Bit 27 - B1243

pub fn b1244(&self) -> B1244_R[src]

Bit 28 - B1244

pub fn b1245(&self) -> B1245_R[src]

Bit 29 - B1245

pub fn b1246(&self) -> B1246_R[src]

Bit 30 - B1246

pub fn b1247(&self) -> B1247_R[src]

Bit 31 - B1247

impl R<u32, Reg<u32, _MPCBB2_VCTR39>>[src]

pub fn b1248(&self) -> B1248_R[src]

Bit 0 - B1248

pub fn b1249(&self) -> B1249_R[src]

Bit 1 - B1249

pub fn b1250(&self) -> B1250_R[src]

Bit 2 - B1250

pub fn b1251(&self) -> B1251_R[src]

Bit 3 - B1251

pub fn b1252(&self) -> B1252_R[src]

Bit 4 - B1252

pub fn b1253(&self) -> B1253_R[src]

Bit 5 - B1253

pub fn b1254(&self) -> B1254_R[src]

Bit 6 - B1254

pub fn b1255(&self) -> B1255_R[src]

Bit 7 - B1255

pub fn b1256(&self) -> B1256_R[src]

Bit 8 - B1256

pub fn b1257(&self) -> B1257_R[src]

Bit 9 - B1257

pub fn b1258(&self) -> B1258_R[src]

Bit 10 - B1258

pub fn b1259(&self) -> B1259_R[src]

Bit 11 - B1259

pub fn b1260(&self) -> B1260_R[src]

Bit 12 - B1260

pub fn b1261(&self) -> B1261_R[src]

Bit 13 - B1261

pub fn b1262(&self) -> B1262_R[src]

Bit 14 - B1262

pub fn b1263(&self) -> B1263_R[src]

Bit 15 - B1263

pub fn b1264(&self) -> B1264_R[src]

Bit 16 - B1264

pub fn b1265(&self) -> B1265_R[src]

Bit 17 - B1265

pub fn b1266(&self) -> B1266_R[src]

Bit 18 - B1266

pub fn b1267(&self) -> B1267_R[src]

Bit 19 - B1267

pub fn b1268(&self) -> B1268_R[src]

Bit 20 - B1268

pub fn b1269(&self) -> B1269_R[src]

Bit 21 - B1269

pub fn b1270(&self) -> B1270_R[src]

Bit 22 - B1270

pub fn b1271(&self) -> B1271_R[src]

Bit 23 - B1271

pub fn b1272(&self) -> B1272_R[src]

Bit 24 - B1272

pub fn b1273(&self) -> B1273_R[src]

Bit 25 - B1273

pub fn b1274(&self) -> B1274_R[src]

Bit 26 - B1274

pub fn b1275(&self) -> B1275_R[src]

Bit 27 - B1275

pub fn b1276(&self) -> B1276_R[src]

Bit 28 - B1276

pub fn b1277(&self) -> B1277_R[src]

Bit 29 - B1277

pub fn b1278(&self) -> B1278_R[src]

Bit 30 - B1278

pub fn b1279(&self) -> B1279_R[src]

Bit 31 - B1279

impl R<u32, Reg<u32, _MPCBB2_VCTR40>>[src]

pub fn b1280(&self) -> B1280_R[src]

Bit 0 - B1280

pub fn b1281(&self) -> B1281_R[src]

Bit 1 - B1281

pub fn b1282(&self) -> B1282_R[src]

Bit 2 - B1282

pub fn b1283(&self) -> B1283_R[src]

Bit 3 - B1283

pub fn b1284(&self) -> B1284_R[src]

Bit 4 - B1284

pub fn b1285(&self) -> B1285_R[src]

Bit 5 - B1285

pub fn b1286(&self) -> B1286_R[src]

Bit 6 - B1286

pub fn b1287(&self) -> B1287_R[src]

Bit 7 - B1287

pub fn b1288(&self) -> B1288_R[src]

Bit 8 - B1288

pub fn b1289(&self) -> B1289_R[src]

Bit 9 - B1289

pub fn b1290(&self) -> B1290_R[src]

Bit 10 - B1290

pub fn b1291(&self) -> B1291_R[src]

Bit 11 - B1291

pub fn b1292(&self) -> B1292_R[src]

Bit 12 - B1292

pub fn b1293(&self) -> B1293_R[src]

Bit 13 - B1293

pub fn b1294(&self) -> B1294_R[src]

Bit 14 - B1294

pub fn b1295(&self) -> B1295_R[src]

Bit 15 - B1295

pub fn b1296(&self) -> B1296_R[src]

Bit 16 - B1296

pub fn b1297(&self) -> B1297_R[src]

Bit 17 - B1297

pub fn b1298(&self) -> B1298_R[src]

Bit 18 - B1298

pub fn b1299(&self) -> B1299_R[src]

Bit 19 - B1299

pub fn b1300(&self) -> B1300_R[src]

Bit 20 - B1300

pub fn b1301(&self) -> B1301_R[src]

Bit 21 - B1301

pub fn b1302(&self) -> B1302_R[src]

Bit 22 - B1302

pub fn b1303(&self) -> B1303_R[src]

Bit 23 - B1303

pub fn b1304(&self) -> B1304_R[src]

Bit 24 - B1304

pub fn b1305(&self) -> B1305_R[src]

Bit 25 - B1305

pub fn b1306(&self) -> B1306_R[src]

Bit 26 - B1306

pub fn b1307(&self) -> B1307_R[src]

Bit 27 - B1307

pub fn b1308(&self) -> B1308_R[src]

Bit 28 - B1308

pub fn b1309(&self) -> B1309_R[src]

Bit 29 - B1309

pub fn b1310(&self) -> B1310_R[src]

Bit 30 - B1310

pub fn b1311(&self) -> B1311_R[src]

Bit 31 - B1311

impl R<u32, Reg<u32, _MPCBB2_VCTR41>>[src]

pub fn b1312(&self) -> B1312_R[src]

Bit 0 - B1312

pub fn b1313(&self) -> B1313_R[src]

Bit 1 - B1313

pub fn b1314(&self) -> B1314_R[src]

Bit 2 - B1314

pub fn b1315(&self) -> B1315_R[src]

Bit 3 - B1315

pub fn b1316(&self) -> B1316_R[src]

Bit 4 - B1316

pub fn b1317(&self) -> B1317_R[src]

Bit 5 - B1317

pub fn b1318(&self) -> B1318_R[src]

Bit 6 - B1318

pub fn b1319(&self) -> B1319_R[src]

Bit 7 - B1319

pub fn b1320(&self) -> B1320_R[src]

Bit 8 - B1320

pub fn b1321(&self) -> B1321_R[src]

Bit 9 - B1321

pub fn b1322(&self) -> B1322_R[src]

Bit 10 - B1322

pub fn b1323(&self) -> B1323_R[src]

Bit 11 - B1323

pub fn b1324(&self) -> B1324_R[src]

Bit 12 - B1324

pub fn b1325(&self) -> B1325_R[src]

Bit 13 - B1325

pub fn b1326(&self) -> B1326_R[src]

Bit 14 - B1326

pub fn b1327(&self) -> B1327_R[src]

Bit 15 - B1327

pub fn b1328(&self) -> B1328_R[src]

Bit 16 - B1328

pub fn b1329(&self) -> B1329_R[src]

Bit 17 - B1329

pub fn b1330(&self) -> B1330_R[src]

Bit 18 - B1330

pub fn b1331(&self) -> B1331_R[src]

Bit 19 - B1331

pub fn b1332(&self) -> B1332_R[src]

Bit 20 - B1332

pub fn b1333(&self) -> B1333_R[src]

Bit 21 - B1333

pub fn b1334(&self) -> B1334_R[src]

Bit 22 - B1334

pub fn b1335(&self) -> B1335_R[src]

Bit 23 - B1335

pub fn b1336(&self) -> B1336_R[src]

Bit 24 - B1336

pub fn b1337(&self) -> B1337_R[src]

Bit 25 - B1337

pub fn b1338(&self) -> B1338_R[src]

Bit 26 - B1338

pub fn b1339(&self) -> B1339_R[src]

Bit 27 - B1339

pub fn b1340(&self) -> B1340_R[src]

Bit 28 - B1340

pub fn b1341(&self) -> B1341_R[src]

Bit 29 - B1341

pub fn b1342(&self) -> B1342_R[src]

Bit 30 - B1342

pub fn b1343(&self) -> B1343_R[src]

Bit 31 - B1343

impl R<u32, Reg<u32, _MPCBB2_VCTR42>>[src]

pub fn b1344(&self) -> B1344_R[src]

Bit 0 - B1344

pub fn b1345(&self) -> B1345_R[src]

Bit 1 - B1345

pub fn b1346(&self) -> B1346_R[src]

Bit 2 - B1346

pub fn b1347(&self) -> B1347_R[src]

Bit 3 - B1347

pub fn b1348(&self) -> B1348_R[src]

Bit 4 - B1348

pub fn b1349(&self) -> B1349_R[src]

Bit 5 - B1349

pub fn b1350(&self) -> B1350_R[src]

Bit 6 - B1350

pub fn b1351(&self) -> B1351_R[src]

Bit 7 - B1351

pub fn b1352(&self) -> B1352_R[src]

Bit 8 - B1352

pub fn b1353(&self) -> B1353_R[src]

Bit 9 - B1353

pub fn b1354(&self) -> B1354_R[src]

Bit 10 - B1354

pub fn b1355(&self) -> B1355_R[src]

Bit 11 - B1355

pub fn b1356(&self) -> B1356_R[src]

Bit 12 - B1356

pub fn b1357(&self) -> B1357_R[src]

Bit 13 - B1357

pub fn b1358(&self) -> B1358_R[src]

Bit 14 - B1358

pub fn b1359(&self) -> B1359_R[src]

Bit 15 - B1359

pub fn b1360(&self) -> B1360_R[src]

Bit 16 - B1360

pub fn b1361(&self) -> B1361_R[src]

Bit 17 - B1361

pub fn b1362(&self) -> B1362_R[src]

Bit 18 - B1362

pub fn b1363(&self) -> B1363_R[src]

Bit 19 - B1363

pub fn b1364(&self) -> B1364_R[src]

Bit 20 - B1364

pub fn b1365(&self) -> B1365_R[src]

Bit 21 - B1365

pub fn b1366(&self) -> B1366_R[src]

Bit 22 - B1366

pub fn b1367(&self) -> B1367_R[src]

Bit 23 - B1367

pub fn b1368(&self) -> B1368_R[src]

Bit 24 - B1368

pub fn b1369(&self) -> B1369_R[src]

Bit 25 - B1369

pub fn b1370(&self) -> B1370_R[src]

Bit 26 - B1370

pub fn b1371(&self) -> B1371_R[src]

Bit 27 - B1371

pub fn b1372(&self) -> B1372_R[src]

Bit 28 - B1372

pub fn b1373(&self) -> B1373_R[src]

Bit 29 - B1373

pub fn b1374(&self) -> B1374_R[src]

Bit 30 - B1374

pub fn b1375(&self) -> B1375_R[src]

Bit 31 - B1375

impl R<u32, Reg<u32, _MPCBB2_VCTR43>>[src]

pub fn b1376(&self) -> B1376_R[src]

Bit 0 - B1376

pub fn b1377(&self) -> B1377_R[src]

Bit 1 - B1377

pub fn b1378(&self) -> B1378_R[src]

Bit 2 - B1378

pub fn b1379(&self) -> B1379_R[src]

Bit 3 - B1379

pub fn b1380(&self) -> B1380_R[src]

Bit 4 - B1380

pub fn b1381(&self) -> B1381_R[src]

Bit 5 - B1381

pub fn b1382(&self) -> B1382_R[src]

Bit 6 - B1382

pub fn b1383(&self) -> B1383_R[src]

Bit 7 - B1383

pub fn b1384(&self) -> B1384_R[src]

Bit 8 - B1384

pub fn b1385(&self) -> B1385_R[src]

Bit 9 - B1385

pub fn b1386(&self) -> B1386_R[src]

Bit 10 - B1386

pub fn b1387(&self) -> B1387_R[src]

Bit 11 - B1387

pub fn b1388(&self) -> B1388_R[src]

Bit 12 - B1388

pub fn b1389(&self) -> B1389_R[src]

Bit 13 - B1389

pub fn b1390(&self) -> B1390_R[src]

Bit 14 - B1390

pub fn b1391(&self) -> B1391_R[src]

Bit 15 - B1391

pub fn b1392(&self) -> B1392_R[src]

Bit 16 - B1392

pub fn b1393(&self) -> B1393_R[src]

Bit 17 - B1393

pub fn b1394(&self) -> B1394_R[src]

Bit 18 - B1394

pub fn b1395(&self) -> B1395_R[src]

Bit 19 - B1395

pub fn b1396(&self) -> B1396_R[src]

Bit 20 - B1396

pub fn b1397(&self) -> B1397_R[src]

Bit 21 - B1397

pub fn b1398(&self) -> B1398_R[src]

Bit 22 - B1398

pub fn b1399(&self) -> B1399_R[src]

Bit 23 - B1399

pub fn b1400(&self) -> B1400_R[src]

Bit 24 - B1400

pub fn b1401(&self) -> B1401_R[src]

Bit 25 - B1401

pub fn b1402(&self) -> B1402_R[src]

Bit 26 - B1402

pub fn b1403(&self) -> B1403_R[src]

Bit 27 - B1403

pub fn b1404(&self) -> B1404_R[src]

Bit 28 - B1404

pub fn b1405(&self) -> B1405_R[src]

Bit 29 - B1405

pub fn b1406(&self) -> B1406_R[src]

Bit 30 - B1406

pub fn b1407(&self) -> B1407_R[src]

Bit 31 - B1407

impl R<u32, Reg<u32, _MPCBB2_VCTR44>>[src]

pub fn b1408(&self) -> B1408_R[src]

Bit 0 - B1408

pub fn b1409(&self) -> B1409_R[src]

Bit 1 - B1409

pub fn b1410(&self) -> B1410_R[src]

Bit 2 - B1410

pub fn b1411(&self) -> B1411_R[src]

Bit 3 - B1411

pub fn b1412(&self) -> B1412_R[src]

Bit 4 - B1412

pub fn b1413(&self) -> B1413_R[src]

Bit 5 - B1413

pub fn b1414(&self) -> B1414_R[src]

Bit 6 - B1414

pub fn b1415(&self) -> B1415_R[src]

Bit 7 - B1415

pub fn b1416(&self) -> B1416_R[src]

Bit 8 - B1416

pub fn b1417(&self) -> B1417_R[src]

Bit 9 - B1417

pub fn b1418(&self) -> B1418_R[src]

Bit 10 - B1418

pub fn b1419(&self) -> B1419_R[src]

Bit 11 - B1419

pub fn b1420(&self) -> B1420_R[src]

Bit 12 - B1420

pub fn b1421(&self) -> B1421_R[src]

Bit 13 - B1421

pub fn b1422(&self) -> B1422_R[src]

Bit 14 - B1422

pub fn b1423(&self) -> B1423_R[src]

Bit 15 - B1423

pub fn b1424(&self) -> B1424_R[src]

Bit 16 - B1424

pub fn b1425(&self) -> B1425_R[src]

Bit 17 - B1425

pub fn b1426(&self) -> B1426_R[src]

Bit 18 - B1426

pub fn b1427(&self) -> B1427_R[src]

Bit 19 - B1427

pub fn b1428(&self) -> B1428_R[src]

Bit 20 - B1428

pub fn b1429(&self) -> B1429_R[src]

Bit 21 - B1429

pub fn b1430(&self) -> B1430_R[src]

Bit 22 - B1430

pub fn b1431(&self) -> B1431_R[src]

Bit 23 - B1431

pub fn b1432(&self) -> B1432_R[src]

Bit 24 - B1432

pub fn b1433(&self) -> B1433_R[src]

Bit 25 - B1433

pub fn b1434(&self) -> B1434_R[src]

Bit 26 - B1434

pub fn b1435(&self) -> B1435_R[src]

Bit 27 - B1435

pub fn b1436(&self) -> B1436_R[src]

Bit 28 - B1436

pub fn b1437(&self) -> B1437_R[src]

Bit 29 - B1437

pub fn b1438(&self) -> B1438_R[src]

Bit 30 - B1438

pub fn b1439(&self) -> B1439_R[src]

Bit 31 - B1439

impl R<u32, Reg<u32, _MPCBB2_VCTR45>>[src]

pub fn b1440(&self) -> B1440_R[src]

Bit 0 - B1440

pub fn b1441(&self) -> B1441_R[src]

Bit 1 - B1441

pub fn b1442(&self) -> B1442_R[src]

Bit 2 - B1442

pub fn b1443(&self) -> B1443_R[src]

Bit 3 - B1443

pub fn b1444(&self) -> B1444_R[src]

Bit 4 - B1444

pub fn b1445(&self) -> B1445_R[src]

Bit 5 - B1445

pub fn b1446(&self) -> B1446_R[src]

Bit 6 - B1446

pub fn b1447(&self) -> B1447_R[src]

Bit 7 - B1447

pub fn b1448(&self) -> B1448_R[src]

Bit 8 - B1448

pub fn b1449(&self) -> B1449_R[src]

Bit 9 - B1449

pub fn b1450(&self) -> B1450_R[src]

Bit 10 - B1450

pub fn b1451(&self) -> B1451_R[src]

Bit 11 - B1451

pub fn b1452(&self) -> B1452_R[src]

Bit 12 - B1452

pub fn b1453(&self) -> B1453_R[src]

Bit 13 - B1453

pub fn b1454(&self) -> B1454_R[src]

Bit 14 - B1454

pub fn b1455(&self) -> B1455_R[src]

Bit 15 - B1455

pub fn b1456(&self) -> B1456_R[src]

Bit 16 - B1456

pub fn b1457(&self) -> B1457_R[src]

Bit 17 - B1457

pub fn b1458(&self) -> B1458_R[src]

Bit 18 - B1458

pub fn b1459(&self) -> B1459_R[src]

Bit 19 - B1459

pub fn b1460(&self) -> B1460_R[src]

Bit 20 - B1460

pub fn b1461(&self) -> B1461_R[src]

Bit 21 - B1461

pub fn b1462(&self) -> B1462_R[src]

Bit 22 - B1462

pub fn b1463(&self) -> B1463_R[src]

Bit 23 - B1463

pub fn b1464(&self) -> B1464_R[src]

Bit 24 - B1464

pub fn b1465(&self) -> B1465_R[src]

Bit 25 - B1465

pub fn b1466(&self) -> B1466_R[src]

Bit 26 - B1466

pub fn b1467(&self) -> B1467_R[src]

Bit 27 - B1467

pub fn b1468(&self) -> B1468_R[src]

Bit 28 - B1468

pub fn b1469(&self) -> B1469_R[src]

Bit 29 - B1469

pub fn b1470(&self) -> B1470_R[src]

Bit 30 - B1470

pub fn b1471(&self) -> B1471_R[src]

Bit 31 - B1471

impl R<u32, Reg<u32, _MPCBB2_VCTR46>>[src]

pub fn b1472(&self) -> B1472_R[src]

Bit 0 - B1472

pub fn b1473(&self) -> B1473_R[src]

Bit 1 - B1473

pub fn b1474(&self) -> B1474_R[src]

Bit 2 - B1474

pub fn b1475(&self) -> B1475_R[src]

Bit 3 - B1475

pub fn b1476(&self) -> B1476_R[src]

Bit 4 - B1476

pub fn b1477(&self) -> B1477_R[src]

Bit 5 - B1477

pub fn b1478(&self) -> B1478_R[src]

Bit 6 - B1478

pub fn b1479(&self) -> B1479_R[src]

Bit 7 - B1479

pub fn b1480(&self) -> B1480_R[src]

Bit 8 - B1480

pub fn b1481(&self) -> B1481_R[src]

Bit 9 - B1481

pub fn b1482(&self) -> B1482_R[src]

Bit 10 - B1482

pub fn b1483(&self) -> B1483_R[src]

Bit 11 - B1483

pub fn b1484(&self) -> B1484_R[src]

Bit 12 - B1484

pub fn b1485(&self) -> B1485_R[src]

Bit 13 - B1485

pub fn b1486(&self) -> B1486_R[src]

Bit 14 - B1486

pub fn b1487(&self) -> B1487_R[src]

Bit 15 - B1487

pub fn b1488(&self) -> B1488_R[src]

Bit 16 - B1488

pub fn b1489(&self) -> B1489_R[src]

Bit 17 - B1489

pub fn b1490(&self) -> B1490_R[src]

Bit 18 - B1490

pub fn b1491(&self) -> B1491_R[src]

Bit 19 - B1491

pub fn b1492(&self) -> B1492_R[src]

Bit 20 - B1492

pub fn b1493(&self) -> B1493_R[src]

Bit 21 - B1493

pub fn b1494(&self) -> B1494_R[src]

Bit 22 - B1494

pub fn b1495(&self) -> B1495_R[src]

Bit 23 - B1495

pub fn b1496(&self) -> B1496_R[src]

Bit 24 - B1496

pub fn b1497(&self) -> B1497_R[src]

Bit 25 - B1497

pub fn b1498(&self) -> B1498_R[src]

Bit 26 - B1498

pub fn b1499(&self) -> B1499_R[src]

Bit 27 - B1499

pub fn b1500(&self) -> B1500_R[src]

Bit 28 - B1500

pub fn b1501(&self) -> B1501_R[src]

Bit 29 - B1501

pub fn b1502(&self) -> B1502_R[src]

Bit 30 - B1502

pub fn b1503(&self) -> B1503_R[src]

Bit 31 - B1503

impl R<u32, Reg<u32, _MPCBB2_VCTR47>>[src]

pub fn b1504(&self) -> B1504_R[src]

Bit 0 - B1504

pub fn b1505(&self) -> B1505_R[src]

Bit 1 - B1505

pub fn b1506(&self) -> B1506_R[src]

Bit 2 - B1506

pub fn b1507(&self) -> B1507_R[src]

Bit 3 - B1507

pub fn b1508(&self) -> B1508_R[src]

Bit 4 - B1508

pub fn b1509(&self) -> B1509_R[src]

Bit 5 - B1509

pub fn b1510(&self) -> B1510_R[src]

Bit 6 - B1510

pub fn b1511(&self) -> B1511_R[src]

Bit 7 - B1511

pub fn b1512(&self) -> B1512_R[src]

Bit 8 - B1512

pub fn b1513(&self) -> B1513_R[src]

Bit 9 - B1513

pub fn b1514(&self) -> B1514_R[src]

Bit 10 - B1514

pub fn b1515(&self) -> B1515_R[src]

Bit 11 - B1515

pub fn b1516(&self) -> B1516_R[src]

Bit 12 - B1516

pub fn b1517(&self) -> B1517_R[src]

Bit 13 - B1517

pub fn b1518(&self) -> B1518_R[src]

Bit 14 - B1518

pub fn b1519(&self) -> B1519_R[src]

Bit 15 - B1519

pub fn b1520(&self) -> B1520_R[src]

Bit 16 - B1520

pub fn b1521(&self) -> B1521_R[src]

Bit 17 - B1521

pub fn b1522(&self) -> B1522_R[src]

Bit 18 - B1522

pub fn b1523(&self) -> B1523_R[src]

Bit 19 - B1523

pub fn b1524(&self) -> B1524_R[src]

Bit 20 - B1524

pub fn b1525(&self) -> B1525_R[src]

Bit 21 - B1525

pub fn b1526(&self) -> B1526_R[src]

Bit 22 - B1526

pub fn b1527(&self) -> B1527_R[src]

Bit 23 - B1527

pub fn b1528(&self) -> B1528_R[src]

Bit 24 - B1528

pub fn b1529(&self) -> B1529_R[src]

Bit 25 - B1529

pub fn b1530(&self) -> B1530_R[src]

Bit 26 - B1530

pub fn b1531(&self) -> B1531_R[src]

Bit 27 - B1531

pub fn b1532(&self) -> B1532_R[src]

Bit 28 - B1532

pub fn b1533(&self) -> B1533_R[src]

Bit 29 - B1533

pub fn b1534(&self) -> B1534_R[src]

Bit 30 - B1534

pub fn b1535(&self) -> B1535_R[src]

Bit 31 - B1535

impl R<u32, Reg<u32, _MPCBB2_VCTR48>>[src]

pub fn b1536(&self) -> B1536_R[src]

Bit 0 - B1536

pub fn b1537(&self) -> B1537_R[src]

Bit 1 - B1537

pub fn b1538(&self) -> B1538_R[src]

Bit 2 - B1538

pub fn b1539(&self) -> B1539_R[src]

Bit 3 - B1539

pub fn b1540(&self) -> B1540_R[src]

Bit 4 - B1540

pub fn b1541(&self) -> B1541_R[src]

Bit 5 - B1541

pub fn b1542(&self) -> B1542_R[src]

Bit 6 - B1542

pub fn b1543(&self) -> B1543_R[src]

Bit 7 - B1543

pub fn b1544(&self) -> B1544_R[src]

Bit 8 - B1544

pub fn b1545(&self) -> B1545_R[src]

Bit 9 - B1545

pub fn b1546(&self) -> B1546_R[src]

Bit 10 - B1546

pub fn b1547(&self) -> B1547_R[src]

Bit 11 - B1547

pub fn b1548(&self) -> B1548_R[src]

Bit 12 - B1548

pub fn b1549(&self) -> B1549_R[src]

Bit 13 - B1549

pub fn b1550(&self) -> B1550_R[src]

Bit 14 - B1550

pub fn b1551(&self) -> B1551_R[src]

Bit 15 - B1551

pub fn b1552(&self) -> B1552_R[src]

Bit 16 - B1552

pub fn b1553(&self) -> B1553_R[src]

Bit 17 - B1553

pub fn b1554(&self) -> B1554_R[src]

Bit 18 - B1554

pub fn b1555(&self) -> B1555_R[src]

Bit 19 - B1555

pub fn b1556(&self) -> B1556_R[src]

Bit 20 - B1556

pub fn b1557(&self) -> B1557_R[src]

Bit 21 - B1557

pub fn b1558(&self) -> B1558_R[src]

Bit 22 - B1558

pub fn b1559(&self) -> B1559_R[src]

Bit 23 - B1559

pub fn b1560(&self) -> B1560_R[src]

Bit 24 - B1560

pub fn b1561(&self) -> B1561_R[src]

Bit 25 - B1561

pub fn b1562(&self) -> B1562_R[src]

Bit 26 - B1562

pub fn b1563(&self) -> B1563_R[src]

Bit 27 - B1563

pub fn b1564(&self) -> B1564_R[src]

Bit 28 - B1564

pub fn b1565(&self) -> B1565_R[src]

Bit 29 - B1565

pub fn b1566(&self) -> B1566_R[src]

Bit 30 - B1566

pub fn b1567(&self) -> B1567_R[src]

Bit 31 - B1567

impl R<u32, Reg<u32, _MPCBB2_VCTR49>>[src]

pub fn b1568(&self) -> B1568_R[src]

Bit 0 - B1568

pub fn b1569(&self) -> B1569_R[src]

Bit 1 - B1569

pub fn b1570(&self) -> B1570_R[src]

Bit 2 - B1570

pub fn b1571(&self) -> B1571_R[src]

Bit 3 - B1571

pub fn b1572(&self) -> B1572_R[src]

Bit 4 - B1572

pub fn b1573(&self) -> B1573_R[src]

Bit 5 - B1573

pub fn b1574(&self) -> B1574_R[src]

Bit 6 - B1574

pub fn b1575(&self) -> B1575_R[src]

Bit 7 - B1575

pub fn b1576(&self) -> B1576_R[src]

Bit 8 - B1576

pub fn b1577(&self) -> B1577_R[src]

Bit 9 - B1577

pub fn b1578(&self) -> B1578_R[src]

Bit 10 - B1578

pub fn b1579(&self) -> B1579_R[src]

Bit 11 - B1579

pub fn b1580(&self) -> B1580_R[src]

Bit 12 - B1580

pub fn b1581(&self) -> B1581_R[src]

Bit 13 - B1581

pub fn b1582(&self) -> B1582_R[src]

Bit 14 - B1582

pub fn b1583(&self) -> B1583_R[src]

Bit 15 - B1583

pub fn b1584(&self) -> B1584_R[src]

Bit 16 - B1584

pub fn b1585(&self) -> B1585_R[src]

Bit 17 - B1585

pub fn b1586(&self) -> B1586_R[src]

Bit 18 - B1586

pub fn b1587(&self) -> B1587_R[src]

Bit 19 - B1587

pub fn b1588(&self) -> B1588_R[src]

Bit 20 - B1588

pub fn b1589(&self) -> B1589_R[src]

Bit 21 - B1589

pub fn b1590(&self) -> B1590_R[src]

Bit 22 - B1590

pub fn b1591(&self) -> B1591_R[src]

Bit 23 - B1591

pub fn b1592(&self) -> B1592_R[src]

Bit 24 - B1592

pub fn b1593(&self) -> B1593_R[src]

Bit 25 - B1593

pub fn b1594(&self) -> B1594_R[src]

Bit 26 - B1594

pub fn b1595(&self) -> B1595_R[src]

Bit 27 - B1595

pub fn b1596(&self) -> B1596_R[src]

Bit 28 - B1596

pub fn b1597(&self) -> B1597_R[src]

Bit 29 - B1597

pub fn b1598(&self) -> B1598_R[src]

Bit 30 - B1598

pub fn b1599(&self) -> B1599_R[src]

Bit 31 - B1599

impl R<u32, Reg<u32, _MPCBB2_VCTR50>>[src]

pub fn b1600(&self) -> B1600_R[src]

Bit 0 - B1600

pub fn b1601(&self) -> B1601_R[src]

Bit 1 - B1601

pub fn b1602(&self) -> B1602_R[src]

Bit 2 - B1602

pub fn b1603(&self) -> B1603_R[src]

Bit 3 - B1603

pub fn b1604(&self) -> B1604_R[src]

Bit 4 - B1604

pub fn b1605(&self) -> B1605_R[src]

Bit 5 - B1605

pub fn b1606(&self) -> B1606_R[src]

Bit 6 - B1606

pub fn b1607(&self) -> B1607_R[src]

Bit 7 - B1607

pub fn b1608(&self) -> B1608_R[src]

Bit 8 - B1608

pub fn b1609(&self) -> B1609_R[src]

Bit 9 - B1609

pub fn b1610(&self) -> B1610_R[src]

Bit 10 - B1610

pub fn b1611(&self) -> B1611_R[src]

Bit 11 - B1611

pub fn b1612(&self) -> B1612_R[src]

Bit 12 - B1612

pub fn b1613(&self) -> B1613_R[src]

Bit 13 - B1613

pub fn b1614(&self) -> B1614_R[src]

Bit 14 - B1614

pub fn b1615(&self) -> B1615_R[src]

Bit 15 - B1615

pub fn b1616(&self) -> B1616_R[src]

Bit 16 - B1616

pub fn b1617(&self) -> B1617_R[src]

Bit 17 - B1617

pub fn b1618(&self) -> B1618_R[src]

Bit 18 - B1618

pub fn b1619(&self) -> B1619_R[src]

Bit 19 - B1619

pub fn b1620(&self) -> B1620_R[src]

Bit 20 - B1620

pub fn b1621(&self) -> B1621_R[src]

Bit 21 - B1621

pub fn b1622(&self) -> B1622_R[src]

Bit 22 - B1622

pub fn b1623(&self) -> B1623_R[src]

Bit 23 - B1623

pub fn b1624(&self) -> B1624_R[src]

Bit 24 - B1624

pub fn b1625(&self) -> B1625_R[src]

Bit 25 - B1625

pub fn b1626(&self) -> B1626_R[src]

Bit 26 - B1626

pub fn b1627(&self) -> B1627_R[src]

Bit 27 - B1627

pub fn b1628(&self) -> B1628_R[src]

Bit 28 - B1628

pub fn b1629(&self) -> B1629_R[src]

Bit 29 - B1629

pub fn b1630(&self) -> B1630_R[src]

Bit 30 - B1630

pub fn b1631(&self) -> B1631_R[src]

Bit 31 - B1631

impl R<u32, Reg<u32, _MPCBB2_VCTR51>>[src]

pub fn b1632(&self) -> B1632_R[src]

Bit 0 - B1632

pub fn b1633(&self) -> B1633_R[src]

Bit 1 - B1633

pub fn b1634(&self) -> B1634_R[src]

Bit 2 - B1634

pub fn b1635(&self) -> B1635_R[src]

Bit 3 - B1635

pub fn b1636(&self) -> B1636_R[src]

Bit 4 - B1636

pub fn b1637(&self) -> B1637_R[src]

Bit 5 - B1637

pub fn b1638(&self) -> B1638_R[src]

Bit 6 - B1638

pub fn b1639(&self) -> B1639_R[src]

Bit 7 - B1639

pub fn b1640(&self) -> B1640_R[src]

Bit 8 - B1640

pub fn b1641(&self) -> B1641_R[src]

Bit 9 - B1641

pub fn b1642(&self) -> B1642_R[src]

Bit 10 - B1642

pub fn b1643(&self) -> B1643_R[src]

Bit 11 - B1643

pub fn b1644(&self) -> B1644_R[src]

Bit 12 - B1644

pub fn b1645(&self) -> B1645_R[src]

Bit 13 - B1645

pub fn b1646(&self) -> B1646_R[src]

Bit 14 - B1646

pub fn b1647(&self) -> B1647_R[src]

Bit 15 - B1647

pub fn b1648(&self) -> B1648_R[src]

Bit 16 - B1648

pub fn b1649(&self) -> B1649_R[src]

Bit 17 - B1649

pub fn b1650(&self) -> B1650_R[src]

Bit 18 - B1650

pub fn b1651(&self) -> B1651_R[src]

Bit 19 - B1651

pub fn b1652(&self) -> B1652_R[src]

Bit 20 - B1652

pub fn b1653(&self) -> B1653_R[src]

Bit 21 - B1653

pub fn b1654(&self) -> B1654_R[src]

Bit 22 - B1654

pub fn b1655(&self) -> B1655_R[src]

Bit 23 - B1655

pub fn b1656(&self) -> B1656_R[src]

Bit 24 - B1656

pub fn b1657(&self) -> B1657_R[src]

Bit 25 - B1657

pub fn b1658(&self) -> B1658_R[src]

Bit 26 - B1658

pub fn b1659(&self) -> B1659_R[src]

Bit 27 - B1659

pub fn b1660(&self) -> B1660_R[src]

Bit 28 - B1660

pub fn b1661(&self) -> B1661_R[src]

Bit 29 - B1661

pub fn b1662(&self) -> B1662_R[src]

Bit 30 - B1662

pub fn b1663(&self) -> B1663_R[src]

Bit 31 - B1663

impl R<u32, Reg<u32, _MPCBB2_VCTR52>>[src]

pub fn b1664(&self) -> B1664_R[src]

Bit 0 - B1664

pub fn b1665(&self) -> B1665_R[src]

Bit 1 - B1665

pub fn b1666(&self) -> B1666_R[src]

Bit 2 - B1666

pub fn b1667(&self) -> B1667_R[src]

Bit 3 - B1667

pub fn b1668(&self) -> B1668_R[src]

Bit 4 - B1668

pub fn b1669(&self) -> B1669_R[src]

Bit 5 - B1669

pub fn b1670(&self) -> B1670_R[src]

Bit 6 - B1670

pub fn b1671(&self) -> B1671_R[src]

Bit 7 - B1671

pub fn b1672(&self) -> B1672_R[src]

Bit 8 - B1672

pub fn b1673(&self) -> B1673_R[src]

Bit 9 - B1673

pub fn b1674(&self) -> B1674_R[src]

Bit 10 - B1674

pub fn b1675(&self) -> B1675_R[src]

Bit 11 - B1675

pub fn b1676(&self) -> B1676_R[src]

Bit 12 - B1676

pub fn b1677(&self) -> B1677_R[src]

Bit 13 - B1677

pub fn b1678(&self) -> B1678_R[src]

Bit 14 - B1678

pub fn b1679(&self) -> B1679_R[src]

Bit 15 - B1679

pub fn b1680(&self) -> B1680_R[src]

Bit 16 - B1680

pub fn b1681(&self) -> B1681_R[src]

Bit 17 - B1681

pub fn b1682(&self) -> B1682_R[src]

Bit 18 - B1682

pub fn b1683(&self) -> B1683_R[src]

Bit 19 - B1683

pub fn b1684(&self) -> B1684_R[src]

Bit 20 - B1684

pub fn b1685(&self) -> B1685_R[src]

Bit 21 - B1685

pub fn b1686(&self) -> B1686_R[src]

Bit 22 - B1686

pub fn b1687(&self) -> B1687_R[src]

Bit 23 - B1687

pub fn b1688(&self) -> B1688_R[src]

Bit 24 - B1688

pub fn b1689(&self) -> B1689_R[src]

Bit 25 - B1689

pub fn b1690(&self) -> B1690_R[src]

Bit 26 - B1690

pub fn b1691(&self) -> B1691_R[src]

Bit 27 - B1691

pub fn b1692(&self) -> B1692_R[src]

Bit 28 - B1692

pub fn b1693(&self) -> B1693_R[src]

Bit 29 - B1693

pub fn b1694(&self) -> B1694_R[src]

Bit 30 - B1694

pub fn b1695(&self) -> B1695_R[src]

Bit 31 - B1695

impl R<u32, Reg<u32, _MPCBB2_VCTR53>>[src]

pub fn b1696(&self) -> B1696_R[src]

Bit 0 - B1696

pub fn b1697(&self) -> B1697_R[src]

Bit 1 - B1697

pub fn b1698(&self) -> B1698_R[src]

Bit 2 - B1698

pub fn b1699(&self) -> B1699_R[src]

Bit 3 - B1699

pub fn b1700(&self) -> B1700_R[src]

Bit 4 - B1700

pub fn b1701(&self) -> B1701_R[src]

Bit 5 - B1701

pub fn b1702(&self) -> B1702_R[src]

Bit 6 - B1702

pub fn b1703(&self) -> B1703_R[src]

Bit 7 - B1703

pub fn b1704(&self) -> B1704_R[src]

Bit 8 - B1704

pub fn b1705(&self) -> B1705_R[src]

Bit 9 - B1705

pub fn b1706(&self) -> B1706_R[src]

Bit 10 - B1706

pub fn b1707(&self) -> B1707_R[src]

Bit 11 - B1707

pub fn b1708(&self) -> B1708_R[src]

Bit 12 - B1708

pub fn b1709(&self) -> B1709_R[src]

Bit 13 - B1709

pub fn b1710(&self) -> B1710_R[src]

Bit 14 - B1710

pub fn b1711(&self) -> B1711_R[src]

Bit 15 - B1711

pub fn b1712(&self) -> B1712_R[src]

Bit 16 - B1712

pub fn b1713(&self) -> B1713_R[src]

Bit 17 - B1713

pub fn b1714(&self) -> B1714_R[src]

Bit 18 - B1714

pub fn b1715(&self) -> B1715_R[src]

Bit 19 - B1715

pub fn b1716(&self) -> B1716_R[src]

Bit 20 - B1716

pub fn b1717(&self) -> B1717_R[src]

Bit 21 - B1717

pub fn b1718(&self) -> B1718_R[src]

Bit 22 - B1718

pub fn b1719(&self) -> B1719_R[src]

Bit 23 - B1719

pub fn b1720(&self) -> B1720_R[src]

Bit 24 - B1720

pub fn b1721(&self) -> B1721_R[src]

Bit 25 - B1721

pub fn b1722(&self) -> B1722_R[src]

Bit 26 - B1722

pub fn b1723(&self) -> B1723_R[src]

Bit 27 - B1723

pub fn b1724(&self) -> B1724_R[src]

Bit 28 - B1724

pub fn b1725(&self) -> B1725_R[src]

Bit 29 - B1725

pub fn b1726(&self) -> B1726_R[src]

Bit 30 - B1726

pub fn b1727(&self) -> B1727_R[src]

Bit 31 - B1727

impl R<u32, Reg<u32, _MPCBB2_VCTR54>>[src]

pub fn b1728(&self) -> B1728_R[src]

Bit 0 - B1728

pub fn b1729(&self) -> B1729_R[src]

Bit 1 - B1729

pub fn b1730(&self) -> B1730_R[src]

Bit 2 - B1730

pub fn b1731(&self) -> B1731_R[src]

Bit 3 - B1731

pub fn b1732(&self) -> B1732_R[src]

Bit 4 - B1732

pub fn b1733(&self) -> B1733_R[src]

Bit 5 - B1733

pub fn b1734(&self) -> B1734_R[src]

Bit 6 - B1734

pub fn b1735(&self) -> B1735_R[src]

Bit 7 - B1735

pub fn b1736(&self) -> B1736_R[src]

Bit 8 - B1736

pub fn b1737(&self) -> B1737_R[src]

Bit 9 - B1737

pub fn b1738(&self) -> B1738_R[src]

Bit 10 - B1738

pub fn b1739(&self) -> B1739_R[src]

Bit 11 - B1739

pub fn b1740(&self) -> B1740_R[src]

Bit 12 - B1740

pub fn b1741(&self) -> B1741_R[src]

Bit 13 - B1741

pub fn b1742(&self) -> B1742_R[src]

Bit 14 - B1742

pub fn b1743(&self) -> B1743_R[src]

Bit 15 - B1743

pub fn b1744(&self) -> B1744_R[src]

Bit 16 - B1744

pub fn b1745(&self) -> B1745_R[src]

Bit 17 - B1745

pub fn b1746(&self) -> B1746_R[src]

Bit 18 - B1746

pub fn b1747(&self) -> B1747_R[src]

Bit 19 - B1747

pub fn b1748(&self) -> B1748_R[src]

Bit 20 - B1748

pub fn b1749(&self) -> B1749_R[src]

Bit 21 - B1749

pub fn b1750(&self) -> B1750_R[src]

Bit 22 - B1750

pub fn b1751(&self) -> B1751_R[src]

Bit 23 - B1751

pub fn b1752(&self) -> B1752_R[src]

Bit 24 - B1752

pub fn b1753(&self) -> B1753_R[src]

Bit 25 - B1753

pub fn b1754(&self) -> B1754_R[src]

Bit 26 - B1754

pub fn b1755(&self) -> B1755_R[src]

Bit 27 - B1755

pub fn b1756(&self) -> B1756_R[src]

Bit 28 - B1756

pub fn b1757(&self) -> B1757_R[src]

Bit 29 - B1757

pub fn b1758(&self) -> B1758_R[src]

Bit 30 - B1758

pub fn b1759(&self) -> B1759_R[src]

Bit 31 - B1759

impl R<u32, Reg<u32, _MPCBB2_VCTR55>>[src]

pub fn b1760(&self) -> B1760_R[src]

Bit 0 - B1760

pub fn b1761(&self) -> B1761_R[src]

Bit 1 - B1761

pub fn b1762(&self) -> B1762_R[src]

Bit 2 - B1762

pub fn b1763(&self) -> B1763_R[src]

Bit 3 - B1763

pub fn b1764(&self) -> B1764_R[src]

Bit 4 - B1764

pub fn b1765(&self) -> B1765_R[src]

Bit 5 - B1765

pub fn b1766(&self) -> B1766_R[src]

Bit 6 - B1766

pub fn b1767(&self) -> B1767_R[src]

Bit 7 - B1767

pub fn b1768(&self) -> B1768_R[src]

Bit 8 - B1768

pub fn b1769(&self) -> B1769_R[src]

Bit 9 - B1769

pub fn b1770(&self) -> B1770_R[src]

Bit 10 - B1770

pub fn b1771(&self) -> B1771_R[src]

Bit 11 - B1771

pub fn b1772(&self) -> B1772_R[src]

Bit 12 - B1772

pub fn b1773(&self) -> B1773_R[src]

Bit 13 - B1773

pub fn b1774(&self) -> B1774_R[src]

Bit 14 - B1774

pub fn b1775(&self) -> B1775_R[src]

Bit 15 - B1775

pub fn b1776(&self) -> B1776_R[src]

Bit 16 - B1776

pub fn b1777(&self) -> B1777_R[src]

Bit 17 - B1777

pub fn b1778(&self) -> B1778_R[src]

Bit 18 - B1778

pub fn b1779(&self) -> B1779_R[src]

Bit 19 - B1779

pub fn b1780(&self) -> B1780_R[src]

Bit 20 - B1780

pub fn b1781(&self) -> B1781_R[src]

Bit 21 - B1781

pub fn b1782(&self) -> B1782_R[src]

Bit 22 - B1782

pub fn b1783(&self) -> B1783_R[src]

Bit 23 - B1783

pub fn b1784(&self) -> B1784_R[src]

Bit 24 - B1784

pub fn b1785(&self) -> B1785_R[src]

Bit 25 - B1785

pub fn b1786(&self) -> B1786_R[src]

Bit 26 - B1786

pub fn b1787(&self) -> B1787_R[src]

Bit 27 - B1787

pub fn b1788(&self) -> B1788_R[src]

Bit 28 - B1788

pub fn b1789(&self) -> B1789_R[src]

Bit 29 - B1789

pub fn b1790(&self) -> B1790_R[src]

Bit 30 - B1790

pub fn b1791(&self) -> B1791_R[src]

Bit 31 - B1791

impl R<u32, Reg<u32, _MPCBB2_VCTR56>>[src]

pub fn b1792(&self) -> B1792_R[src]

Bit 0 - B1792

pub fn b1793(&self) -> B1793_R[src]

Bit 1 - B1793

pub fn b1794(&self) -> B1794_R[src]

Bit 2 - B1794

pub fn b1795(&self) -> B1795_R[src]

Bit 3 - B1795

pub fn b1796(&self) -> B1796_R[src]

Bit 4 - B1796

pub fn b1797(&self) -> B1797_R[src]

Bit 5 - B1797

pub fn b1798(&self) -> B1798_R[src]

Bit 6 - B1798

pub fn b1799(&self) -> B1799_R[src]

Bit 7 - B1799

pub fn b1800(&self) -> B1800_R[src]

Bit 8 - B1800

pub fn b1801(&self) -> B1801_R[src]

Bit 9 - B1801

pub fn b1802(&self) -> B1802_R[src]

Bit 10 - B1802

pub fn b1803(&self) -> B1803_R[src]

Bit 11 - B1803

pub fn b1804(&self) -> B1804_R[src]

Bit 12 - B1804

pub fn b1805(&self) -> B1805_R[src]

Bit 13 - B1805

pub fn b1806(&self) -> B1806_R[src]

Bit 14 - B1806

pub fn b1807(&self) -> B1807_R[src]

Bit 15 - B1807

pub fn b1808(&self) -> B1808_R[src]

Bit 16 - B1808

pub fn b1809(&self) -> B1809_R[src]

Bit 17 - B1809

pub fn b1810(&self) -> B1810_R[src]

Bit 18 - B1810

pub fn b1811(&self) -> B1811_R[src]

Bit 19 - B1811

pub fn b1812(&self) -> B1812_R[src]

Bit 20 - B1812

pub fn b1813(&self) -> B1813_R[src]

Bit 21 - B1813

pub fn b1814(&self) -> B1814_R[src]

Bit 22 - B1814

pub fn b1815(&self) -> B1815_R[src]

Bit 23 - B1815

pub fn b1816(&self) -> B1816_R[src]

Bit 24 - B1816

pub fn b1817(&self) -> B1817_R[src]

Bit 25 - B1817

pub fn b1818(&self) -> B1818_R[src]

Bit 26 - B1818

pub fn b1819(&self) -> B1819_R[src]

Bit 27 - B1819

pub fn b1820(&self) -> B1820_R[src]

Bit 28 - B1820

pub fn b1821(&self) -> B1821_R[src]

Bit 29 - B1821

pub fn b1822(&self) -> B1822_R[src]

Bit 30 - B1822

pub fn b1823(&self) -> B1823_R[src]

Bit 31 - B1823

impl R<u32, Reg<u32, _MPCBB2_VCTR57>>[src]

pub fn b1824(&self) -> B1824_R[src]

Bit 0 - B1824

pub fn b1825(&self) -> B1825_R[src]

Bit 1 - B1825

pub fn b1826(&self) -> B1826_R[src]

Bit 2 - B1826

pub fn b1827(&self) -> B1827_R[src]

Bit 3 - B1827

pub fn b1828(&self) -> B1828_R[src]

Bit 4 - B1828

pub fn b1829(&self) -> B1829_R[src]

Bit 5 - B1829

pub fn b1830(&self) -> B1830_R[src]

Bit 6 - B1830

pub fn b1831(&self) -> B1831_R[src]

Bit 7 - B1831

pub fn b1832(&self) -> B1832_R[src]

Bit 8 - B1832

pub fn b1833(&self) -> B1833_R[src]

Bit 9 - B1833

pub fn b1834(&self) -> B1834_R[src]

Bit 10 - B1834

pub fn b1835(&self) -> B1835_R[src]

Bit 11 - B1835

pub fn b1836(&self) -> B1836_R[src]

Bit 12 - B1836

pub fn b1837(&self) -> B1837_R[src]

Bit 13 - B1837

pub fn b1838(&self) -> B1838_R[src]

Bit 14 - B1838

pub fn b1839(&self) -> B1839_R[src]

Bit 15 - B1839

pub fn b1840(&self) -> B1840_R[src]

Bit 16 - B1840

pub fn b1841(&self) -> B1841_R[src]

Bit 17 - B1841

pub fn b1842(&self) -> B1842_R[src]

Bit 18 - B1842

pub fn b1843(&self) -> B1843_R[src]

Bit 19 - B1843

pub fn b1844(&self) -> B1844_R[src]

Bit 20 - B1844

pub fn b1845(&self) -> B1845_R[src]

Bit 21 - B1845

pub fn b1846(&self) -> B1846_R[src]

Bit 22 - B1846

pub fn b1847(&self) -> B1847_R[src]

Bit 23 - B1847

pub fn b1848(&self) -> B1848_R[src]

Bit 24 - B1848

pub fn b1849(&self) -> B1849_R[src]

Bit 25 - B1849

pub fn b1850(&self) -> B1850_R[src]

Bit 26 - B1850

pub fn b1851(&self) -> B1851_R[src]

Bit 27 - B1851

pub fn b1852(&self) -> B1852_R[src]

Bit 28 - B1852

pub fn b1853(&self) -> B1853_R[src]

Bit 29 - B1853

pub fn b1854(&self) -> B1854_R[src]

Bit 30 - B1854

pub fn b1855(&self) -> B1855_R[src]

Bit 31 - B1855

impl R<u32, Reg<u32, _MPCBB2_VCTR58>>[src]

pub fn b1856(&self) -> B1856_R[src]

Bit 0 - B1856

pub fn b1857(&self) -> B1857_R[src]

Bit 1 - B1857

pub fn b1858(&self) -> B1858_R[src]

Bit 2 - B1858

pub fn b1859(&self) -> B1859_R[src]

Bit 3 - B1859

pub fn b1860(&self) -> B1860_R[src]

Bit 4 - B1860

pub fn b1861(&self) -> B1861_R[src]

Bit 5 - B1861

pub fn b1862(&self) -> B1862_R[src]

Bit 6 - B1862

pub fn b1863(&self) -> B1863_R[src]

Bit 7 - B1863

pub fn b1864(&self) -> B1864_R[src]

Bit 8 - B1864

pub fn b1865(&self) -> B1865_R[src]

Bit 9 - B1865

pub fn b1866(&self) -> B1866_R[src]

Bit 10 - B1866

pub fn b1867(&self) -> B1867_R[src]

Bit 11 - B1867

pub fn b1868(&self) -> B1868_R[src]

Bit 12 - B1868

pub fn b1869(&self) -> B1869_R[src]

Bit 13 - B1869

pub fn b1870(&self) -> B1870_R[src]

Bit 14 - B1870

pub fn b1871(&self) -> B1871_R[src]

Bit 15 - B1871

pub fn b1872(&self) -> B1872_R[src]

Bit 16 - B1872

pub fn b1873(&self) -> B1873_R[src]

Bit 17 - B1873

pub fn b1874(&self) -> B1874_R[src]

Bit 18 - B1874

pub fn b1875(&self) -> B1875_R[src]

Bit 19 - B1875

pub fn b1876(&self) -> B1876_R[src]

Bit 20 - B1876

pub fn b1877(&self) -> B1877_R[src]

Bit 21 - B1877

pub fn b1878(&self) -> B1878_R[src]

Bit 22 - B1878

pub fn b1879(&self) -> B1879_R[src]

Bit 23 - B1879

pub fn b1880(&self) -> B1880_R[src]

Bit 24 - B1880

pub fn b1881(&self) -> B1881_R[src]

Bit 25 - B1881

pub fn b1882(&self) -> B1882_R[src]

Bit 26 - B1882

pub fn b1883(&self) -> B1883_R[src]

Bit 27 - B1883

pub fn b1884(&self) -> B1884_R[src]

Bit 28 - B1884

pub fn b1885(&self) -> B1885_R[src]

Bit 29 - B1885

pub fn b1886(&self) -> B1886_R[src]

Bit 30 - B1886

pub fn b1887(&self) -> B1887_R[src]

Bit 31 - B1887

impl R<u32, Reg<u32, _MPCBB2_VCTR59>>[src]

pub fn b1888(&self) -> B1888_R[src]

Bit 0 - B1888

pub fn b1889(&self) -> B1889_R[src]

Bit 1 - B1889

pub fn b1890(&self) -> B1890_R[src]

Bit 2 - B1890

pub fn b1891(&self) -> B1891_R[src]

Bit 3 - B1891

pub fn b1892(&self) -> B1892_R[src]

Bit 4 - B1892

pub fn b1893(&self) -> B1893_R[src]

Bit 5 - B1893

pub fn b1894(&self) -> B1894_R[src]

Bit 6 - B1894

pub fn b1895(&self) -> B1895_R[src]

Bit 7 - B1895

pub fn b1896(&self) -> B1896_R[src]

Bit 8 - B1896

pub fn b1897(&self) -> B1897_R[src]

Bit 9 - B1897

pub fn b1898(&self) -> B1898_R[src]

Bit 10 - B1898

pub fn b1899(&self) -> B1899_R[src]

Bit 11 - B1899

pub fn b1900(&self) -> B1900_R[src]

Bit 12 - B1900

pub fn b1901(&self) -> B1901_R[src]

Bit 13 - B1901

pub fn b1902(&self) -> B1902_R[src]

Bit 14 - B1902

pub fn b1903(&self) -> B1903_R[src]

Bit 15 - B1903

pub fn b1904(&self) -> B1904_R[src]

Bit 16 - B1904

pub fn b1905(&self) -> B1905_R[src]

Bit 17 - B1905

pub fn b1906(&self) -> B1906_R[src]

Bit 18 - B1906

pub fn b1907(&self) -> B1907_R[src]

Bit 19 - B1907

pub fn b1908(&self) -> B1908_R[src]

Bit 20 - B1908

pub fn b1909(&self) -> B1909_R[src]

Bit 21 - B1909

pub fn b1910(&self) -> B1910_R[src]

Bit 22 - B1910

pub fn b1911(&self) -> B1911_R[src]

Bit 23 - B1911

pub fn b1912(&self) -> B1912_R[src]

Bit 24 - B1912

pub fn b1913(&self) -> B1913_R[src]

Bit 25 - B1913

pub fn b1914(&self) -> B1914_R[src]

Bit 26 - B1914

pub fn b1915(&self) -> B1915_R[src]

Bit 27 - B1915

pub fn b1916(&self) -> B1916_R[src]

Bit 28 - B1916

pub fn b1917(&self) -> B1917_R[src]

Bit 29 - B1917

pub fn b1918(&self) -> B1918_R[src]

Bit 30 - B1918

pub fn b1919(&self) -> B1919_R[src]

Bit 31 - B1919

impl R<u32, Reg<u32, _MPCBB2_VCTR60>>[src]

pub fn b1920(&self) -> B1920_R[src]

Bit 0 - B1920

pub fn b1921(&self) -> B1921_R[src]

Bit 1 - B1921

pub fn b1922(&self) -> B1922_R[src]

Bit 2 - B1922

pub fn b1923(&self) -> B1923_R[src]

Bit 3 - B1923

pub fn b1924(&self) -> B1924_R[src]

Bit 4 - B1924

pub fn b1925(&self) -> B1925_R[src]

Bit 5 - B1925

pub fn b1926(&self) -> B1926_R[src]

Bit 6 - B1926

pub fn b1927(&self) -> B1927_R[src]

Bit 7 - B1927

pub fn b1928(&self) -> B1928_R[src]

Bit 8 - B1928

pub fn b1929(&self) -> B1929_R[src]

Bit 9 - B1929

pub fn b1930(&self) -> B1930_R[src]

Bit 10 - B1930

pub fn b1931(&self) -> B1931_R[src]

Bit 11 - B1931

pub fn b1932(&self) -> B1932_R[src]

Bit 12 - B1932

pub fn b1933(&self) -> B1933_R[src]

Bit 13 - B1933

pub fn b1934(&self) -> B1934_R[src]

Bit 14 - B1934

pub fn b1935(&self) -> B1935_R[src]

Bit 15 - B1935

pub fn b1936(&self) -> B1936_R[src]

Bit 16 - B1936

pub fn b1937(&self) -> B1937_R[src]

Bit 17 - B1937

pub fn b1938(&self) -> B1938_R[src]

Bit 18 - B1938

pub fn b1939(&self) -> B1939_R[src]

Bit 19 - B1939

pub fn b1940(&self) -> B1940_R[src]

Bit 20 - B1940

pub fn b1941(&self) -> B1941_R[src]

Bit 21 - B1941

pub fn b1942(&self) -> B1942_R[src]

Bit 22 - B1942

pub fn b1943(&self) -> B1943_R[src]

Bit 23 - B1943

pub fn b1944(&self) -> B1944_R[src]

Bit 24 - B1944

pub fn b1945(&self) -> B1945_R[src]

Bit 25 - B1945

pub fn b1946(&self) -> B1946_R[src]

Bit 26 - B1946

pub fn b1947(&self) -> B1947_R[src]

Bit 27 - B1947

pub fn b1948(&self) -> B1948_R[src]

Bit 28 - B1948

pub fn b1949(&self) -> B1949_R[src]

Bit 29 - B1949

pub fn b1950(&self) -> B1950_R[src]

Bit 30 - B1950

pub fn b1951(&self) -> B1951_R[src]

Bit 31 - B1951

impl R<u32, Reg<u32, _MPCBB2_VCTR61>>[src]

pub fn b1952(&self) -> B1952_R[src]

Bit 0 - B1952

pub fn b1953(&self) -> B1953_R[src]

Bit 1 - B1953

pub fn b1954(&self) -> B1954_R[src]

Bit 2 - B1954

pub fn b1955(&self) -> B1955_R[src]

Bit 3 - B1955

pub fn b1956(&self) -> B1956_R[src]

Bit 4 - B1956

pub fn b1957(&self) -> B1957_R[src]

Bit 5 - B1957

pub fn b1958(&self) -> B1958_R[src]

Bit 6 - B1958

pub fn b1959(&self) -> B1959_R[src]

Bit 7 - B1959

pub fn b1960(&self) -> B1960_R[src]

Bit 8 - B1960

pub fn b1961(&self) -> B1961_R[src]

Bit 9 - B1961

pub fn b1962(&self) -> B1962_R[src]

Bit 10 - B1962

pub fn b1963(&self) -> B1963_R[src]

Bit 11 - B1963

pub fn b1964(&self) -> B1964_R[src]

Bit 12 - B1964

pub fn b1965(&self) -> B1965_R[src]

Bit 13 - B1965

pub fn b1966(&self) -> B1966_R[src]

Bit 14 - B1966

pub fn b1967(&self) -> B1967_R[src]

Bit 15 - B1967

pub fn b1968(&self) -> B1968_R[src]

Bit 16 - B1968

pub fn b1969(&self) -> B1969_R[src]

Bit 17 - B1969

pub fn b1970(&self) -> B1970_R[src]

Bit 18 - B1970

pub fn b1971(&self) -> B1971_R[src]

Bit 19 - B1971

pub fn b1972(&self) -> B1972_R[src]

Bit 20 - B1972

pub fn b1973(&self) -> B1973_R[src]

Bit 21 - B1973

pub fn b1974(&self) -> B1974_R[src]

Bit 22 - B1974

pub fn b1975(&self) -> B1975_R[src]

Bit 23 - B1975

pub fn b1976(&self) -> B1976_R[src]

Bit 24 - B1976

pub fn b1977(&self) -> B1977_R[src]

Bit 25 - B1977

pub fn b1978(&self) -> B1978_R[src]

Bit 26 - B1978

pub fn b1979(&self) -> B1979_R[src]

Bit 27 - B1979

pub fn b1980(&self) -> B1980_R[src]

Bit 28 - B1980

pub fn b1981(&self) -> B1981_R[src]

Bit 29 - B1981

pub fn b1982(&self) -> B1982_R[src]

Bit 30 - B1982

pub fn b1983(&self) -> B1983_R[src]

Bit 31 - B1983

impl R<u32, Reg<u32, _MPCBB2_VCTR62>>[src]

pub fn b1984(&self) -> B1984_R[src]

Bit 0 - B1984

pub fn b1985(&self) -> B1985_R[src]

Bit 1 - B1985

pub fn b1986(&self) -> B1986_R[src]

Bit 2 - B1986

pub fn b1987(&self) -> B1987_R[src]

Bit 3 - B1987

pub fn b1988(&self) -> B1988_R[src]

Bit 4 - B1988

pub fn b1989(&self) -> B1989_R[src]

Bit 5 - B1989

pub fn b1990(&self) -> B1990_R[src]

Bit 6 - B1990

pub fn b1991(&self) -> B1991_R[src]

Bit 7 - B1991

pub fn b1992(&self) -> B1992_R[src]

Bit 8 - B1992

pub fn b1993(&self) -> B1993_R[src]

Bit 9 - B1993

pub fn b1994(&self) -> B1994_R[src]

Bit 10 - B1994

pub fn b1995(&self) -> B1995_R[src]

Bit 11 - B1995

pub fn b1996(&self) -> B1996_R[src]

Bit 12 - B1996

pub fn b1997(&self) -> B1997_R[src]

Bit 13 - B1997

pub fn b1998(&self) -> B1998_R[src]

Bit 14 - B1998

pub fn b1999(&self) -> B1999_R[src]

Bit 15 - B1999

pub fn b2000(&self) -> B2000_R[src]

Bit 16 - B2000

pub fn b2001(&self) -> B2001_R[src]

Bit 17 - B2001

pub fn b2002(&self) -> B2002_R[src]

Bit 18 - B2002

pub fn b2003(&self) -> B2003_R[src]

Bit 19 - B2003

pub fn b2004(&self) -> B2004_R[src]

Bit 20 - B2004

pub fn b2005(&self) -> B2005_R[src]

Bit 21 - B2005

pub fn b2006(&self) -> B2006_R[src]

Bit 22 - B2006

pub fn b2007(&self) -> B2007_R[src]

Bit 23 - B2007

pub fn b2008(&self) -> B2008_R[src]

Bit 24 - B2008

pub fn b2009(&self) -> B2009_R[src]

Bit 25 - B2009

pub fn b2010(&self) -> B2010_R[src]

Bit 26 - B2010

pub fn b2011(&self) -> B2011_R[src]

Bit 27 - B2011

pub fn b2012(&self) -> B2012_R[src]

Bit 28 - B2012

pub fn b2013(&self) -> B2013_R[src]

Bit 29 - B2013

pub fn b2014(&self) -> B2014_R[src]

Bit 30 - B2014

pub fn b2015(&self) -> B2015_R[src]

Bit 31 - B2015

impl R<u32, Reg<u32, _MPCBB2_VCTR63>>[src]

pub fn b2016(&self) -> B2016_R[src]

Bit 0 - B2016

pub fn b2017(&self) -> B2017_R[src]

Bit 1 - B2017

pub fn b2018(&self) -> B2018_R[src]

Bit 2 - B2018

pub fn b2019(&self) -> B2019_R[src]

Bit 3 - B2019

pub fn b2020(&self) -> B2020_R[src]

Bit 4 - B2020

pub fn b2021(&self) -> B2021_R[src]

Bit 5 - B2021

pub fn b2022(&self) -> B2022_R[src]

Bit 6 - B2022

pub fn b2023(&self) -> B2023_R[src]

Bit 7 - B2023

pub fn b2024(&self) -> B2024_R[src]

Bit 8 - B2024

pub fn b2025(&self) -> B2025_R[src]

Bit 9 - B2025

pub fn b2026(&self) -> B2026_R[src]

Bit 10 - B2026

pub fn b2027(&self) -> B2027_R[src]

Bit 11 - B2027

pub fn b2028(&self) -> B2028_R[src]

Bit 12 - B2028

pub fn b2029(&self) -> B2029_R[src]

Bit 13 - B2029

pub fn b2030(&self) -> B2030_R[src]

Bit 14 - B2030

pub fn b2031(&self) -> B2031_R[src]

Bit 15 - B2031

pub fn b2032(&self) -> B2032_R[src]

Bit 16 - B2032

pub fn b2033(&self) -> B2033_R[src]

Bit 17 - B2033

pub fn b2034(&self) -> B2034_R[src]

Bit 18 - B2034

pub fn b2035(&self) -> B2035_R[src]

Bit 19 - B2035

pub fn b2036(&self) -> B2036_R[src]

Bit 20 - B2036

pub fn b2037(&self) -> B2037_R[src]

Bit 21 - B2037

pub fn b2038(&self) -> B2038_R[src]

Bit 22 - B2038

pub fn b2039(&self) -> B2039_R[src]

Bit 23 - B2039

pub fn b2040(&self) -> B2040_R[src]

Bit 24 - B2040

pub fn b2041(&self) -> B2041_R[src]

Bit 25 - B2041

pub fn b2042(&self) -> B2042_R[src]

Bit 26 - B2042

pub fn b2043(&self) -> B2043_R[src]

Bit 27 - B2043

pub fn b2044(&self) -> B2044_R[src]

Bit 28 - B2044

pub fn b2045(&self) -> B2045_R[src]

Bit 29 - B2045

pub fn b2046(&self) -> B2046_R[src]

Bit 30 - B2046

pub fn b2047(&self) -> B2047_R[src]

Bit 31 - B2047

impl R<u32, Reg<u32, _CR1>>[src]

pub fn lpr(&self) -> LPR_R[src]

Bit 14 - Low-power run

pub fn vos(&self) -> VOS_R[src]

Bits 9:10 - Voltage scaling range selection

pub fn dbp(&self) -> DBP_R[src]

Bit 8 - Disable backup domain write protection

pub fn lpms(&self) -> LPMS_R[src]

Bits 0:2 - Low-power mode selection

impl R<u32, Reg<u32, _CR2>>[src]

pub fn usv(&self) -> USV_R[src]

Bit 10 - VDDUSB USB supply valid

pub fn iosv(&self) -> IOSV_R[src]

Bit 9 - VDDIO2 Independent I/Os supply valid

pub fn pvme4(&self) -> PVME4_R[src]

Bit 7 - Peripheral voltage monitoring 4 enable: VDDA vs. 2.2V

pub fn pvme3(&self) -> PVME3_R[src]

Bit 6 - Peripheral voltage monitoring 3 enable: VDDA vs. 1.62V

pub fn pvme2(&self) -> PVME2_R[src]

Bit 5 - Peripheral voltage monitoring 2 enable: VDDIO2 vs. 0.9V

pub fn pvme1(&self) -> PVME1_R[src]

Bit 4 - Peripheral voltage monitoring 1 enable: VDDUSB vs. 1.2V

pub fn pls(&self) -> PLS_R[src]

Bits 1:3 - Power voltage detector level selection

pub fn pvde(&self) -> PVDE_R[src]

Bit 0 - Power voltage detector enable

impl R<u32, Reg<u32, _CR3>>[src]

pub fn ucpd_dbdis(&self) -> UCPD_DBDIS_R[src]

Bit 14 - UCPD_DBDIS

pub fn ucpd_stdby(&self) -> UCPD_STDBY_R[src]

Bit 13 - UCPD_STDBY

pub fn ulpmen(&self) -> ULPMEN_R[src]

Bit 11 - ULPMEN

pub fn apc(&self) -> APC_R[src]

Bit 10 - Apply pull-up and pull-down configuration

pub fn rrs(&self) -> RRS_R[src]

Bits 8:9 - SRAM2 retention in Standby mode

pub fn ewup5(&self) -> EWUP5_R[src]

Bit 4 - Enable Wakeup pin WKUP5

pub fn ewup4(&self) -> EWUP4_R[src]

Bit 3 - Enable Wakeup pin WKUP4

pub fn ewup3(&self) -> EWUP3_R[src]

Bit 2 - Enable Wakeup pin WKUP3

pub fn ewup2(&self) -> EWUP2_R[src]

Bit 1 - Enable Wakeup pin WKUP2

pub fn ewup1(&self) -> EWUP1_R[src]

Bit 0 - Enable Wakeup pin WKUP1

impl R<u32, Reg<u32, _CR4>>[src]

pub fn smpslpen(&self) -> SMPSLPEN_R[src]

Bit 15 - SMPSLPEN

pub fn smpsfsten(&self) -> SMPSFSTEN_R[src]

Bit 14 - SMPSFSTEN

pub fn extsmpsen(&self) -> EXTSMPSEN_R[src]

Bit 13 - EXTSMPSEN

pub fn smpsbyp(&self) -> SMPSBYP_R[src]

Bit 12 - SMPSBYP

pub fn vbrs(&self) -> VBRS_R[src]

Bit 9 - VBAT battery charging resistor selection

pub fn vbe(&self) -> VBE_R[src]

Bit 8 - VBAT battery charging enable

pub fn wupp5(&self) -> WUPP5_R[src]

Bit 4 - Wakeup pin WKUP5 polarity

pub fn wupp4(&self) -> WUPP4_R[src]

Bit 3 - Wakeup pin WKUP4 polarity

pub fn wupp3(&self) -> WUPP3_R[src]

Bit 2 - Wakeup pin WKUP3 polarity

pub fn wupp2(&self) -> WUPP2_R[src]

Bit 1 - Wakeup pin WKUP2 polarity

pub fn wupp1(&self) -> WUPP1_R[src]

Bit 0 - Wakeup pin WKUP1 polarity

impl R<u32, Reg<u32, _SR1>>[src]

pub fn smpshprdy(&self) -> SMPSHPRDY_R[src]

Bit 15 - SMPSHPRDY

pub fn extsmpsrdy(&self) -> EXTSMPSRDY_R[src]

Bit 13 - EXTSMPSRDY

pub fn smpsbyprdy(&self) -> SMPSBYPRDY_R[src]

Bit 12 - SMPSBYPRDY

pub fn sbf(&self) -> SBF_R[src]

Bit 8 - Standby flag

pub fn wuf5(&self) -> WUF5_R[src]

Bit 4 - Wakeup flag 5

pub fn wuf4(&self) -> WUF4_R[src]

Bit 3 - Wakeup flag 4

pub fn wuf3(&self) -> WUF3_R[src]

Bit 2 - Wakeup flag 3

pub fn wuf2(&self) -> WUF2_R[src]

Bit 1 - Wakeup flag 2

pub fn wuf1(&self) -> WUF1_R[src]

Bit 0 - Wakeup flag 1

impl R<u32, Reg<u32, _SR2>>[src]

pub fn pvmo4(&self) -> PVMO4_R[src]

Bit 15 - Peripheral voltage monitoring output: VDDA vs. 2.2 V

pub fn pvmo3(&self) -> PVMO3_R[src]

Bit 14 - Peripheral voltage monitoring output: VDDA vs. 1.62 V

pub fn pvmo2(&self) -> PVMO2_R[src]

Bit 13 - Peripheral voltage monitoring output: VDDIO2 vs. 0.9 V

pub fn pvmo1(&self) -> PVMO1_R[src]

Bit 12 - Peripheral voltage monitoring output: VDDUSB vs. 1.2 V

pub fn pvdo(&self) -> PVDO_R[src]

Bit 11 - Power voltage detector output

pub fn vosf(&self) -> VOSF_R[src]

Bit 10 - Voltage scaling flag

pub fn reglpf(&self) -> REGLPF_R[src]

Bit 9 - Low-power regulator flag

pub fn reglps(&self) -> REGLPS_R[src]

Bit 8 - Low-power regulator started

impl R<u32, Reg<u32, _PUCRA>>[src]

pub fn pu15(&self) -> PU15_R[src]

Bit 15 - Port A pull-up bit y (y=0..15)

pub fn pu14(&self) -> PU14_R[src]

Bit 14 - Port A pull-up bit y (y=0..15)

pub fn pu13(&self) -> PU13_R[src]

Bit 13 - Port A pull-up bit y (y=0..15)

pub fn pu12(&self) -> PU12_R[src]

Bit 12 - Port A pull-up bit y (y=0..15)

pub fn pu11(&self) -> PU11_R[src]

Bit 11 - Port A pull-up bit y (y=0..15)

pub fn pu10(&self) -> PU10_R[src]

Bit 10 - Port A pull-up bit y (y=0..15)

pub fn pu9(&self) -> PU9_R[src]

Bit 9 - Port A pull-up bit y (y=0..15)

pub fn pu8(&self) -> PU8_R[src]

Bit 8 - Port A pull-up bit y (y=0..15)

pub fn pu7(&self) -> PU7_R[src]

Bit 7 - Port A pull-up bit y (y=0..15)

pub fn pu6(&self) -> PU6_R[src]

Bit 6 - Port A pull-up bit y (y=0..15)

pub fn pu5(&self) -> PU5_R[src]

Bit 5 - Port A pull-up bit y (y=0..15)

pub fn pu4(&self) -> PU4_R[src]

Bit 4 - Port A pull-up bit y (y=0..15)

pub fn pu3(&self) -> PU3_R[src]

Bit 3 - Port A pull-up bit y (y=0..15)

pub fn pu2(&self) -> PU2_R[src]

Bit 2 - Port A pull-up bit y (y=0..15)

pub fn pu1(&self) -> PU1_R[src]

Bit 1 - Port A pull-up bit y (y=0..15)

pub fn pu0(&self) -> PU0_R[src]

Bit 0 - Port A pull-up bit y (y=0..15)

impl R<u32, Reg<u32, _PDCRA>>[src]

pub fn pd15(&self) -> PD15_R[src]

Bit 15 - Port A pull-down bit y (y=0..15)

pub fn pd14(&self) -> PD14_R[src]

Bit 14 - Port A pull-down bit y (y=0..15)

pub fn pd13(&self) -> PD13_R[src]

Bit 13 - Port A pull-down bit y (y=0..15)

pub fn pd12(&self) -> PD12_R[src]

Bit 12 - Port A pull-down bit y (y=0..15)

pub fn pd11(&self) -> PD11_R[src]

Bit 11 - Port A pull-down bit y (y=0..15)

pub fn pd10(&self) -> PD10_R[src]

Bit 10 - Port A pull-down bit y (y=0..15)

pub fn pd9(&self) -> PD9_R[src]

Bit 9 - Port A pull-down bit y (y=0..15)

pub fn pd8(&self) -> PD8_R[src]

Bit 8 - Port A pull-down bit y (y=0..15)

pub fn pd7(&self) -> PD7_R[src]

Bit 7 - Port A pull-down bit y (y=0..15)

pub fn pd6(&self) -> PD6_R[src]

Bit 6 - Port A pull-down bit y (y=0..15)

pub fn pd5(&self) -> PD5_R[src]

Bit 5 - Port A pull-down bit y (y=0..15)

pub fn pd4(&self) -> PD4_R[src]

Bit 4 - Port A pull-down bit y (y=0..15)

pub fn pd3(&self) -> PD3_R[src]

Bit 3 - Port A pull-down bit y (y=0..15)

pub fn pd2(&self) -> PD2_R[src]

Bit 2 - Port A pull-down bit y (y=0..15)

pub fn pd1(&self) -> PD1_R[src]

Bit 1 - Port A pull-down bit y (y=0..15)

pub fn pd0(&self) -> PD0_R[src]

Bit 0 - Port A pull-down bit y (y=0..15)

impl R<u32, Reg<u32, _PUCRB>>[src]

pub fn pu15(&self) -> PU15_R[src]

Bit 15 - Port B pull-up bit y (y=0..15)

pub fn pu14(&self) -> PU14_R[src]

Bit 14 - Port B pull-up bit y (y=0..15)

pub fn pu13(&self) -> PU13_R[src]

Bit 13 - Port B pull-up bit y (y=0..15)

pub fn pu12(&self) -> PU12_R[src]

Bit 12 - Port B pull-up bit y (y=0..15)

pub fn pu11(&self) -> PU11_R[src]

Bit 11 - Port B pull-up bit y (y=0..15)

pub fn pu10(&self) -> PU10_R[src]

Bit 10 - Port B pull-up bit y (y=0..15)

pub fn pu9(&self) -> PU9_R[src]

Bit 9 - Port B pull-up bit y (y=0..15)

pub fn pu8(&self) -> PU8_R[src]

Bit 8 - Port B pull-up bit y (y=0..15)

pub fn pu7(&self) -> PU7_R[src]

Bit 7 - Port B pull-up bit y (y=0..15)

pub fn pu6(&self) -> PU6_R[src]

Bit 6 - Port B pull-up bit y (y=0..15)

pub fn pu5(&self) -> PU5_R[src]

Bit 5 - Port B pull-up bit y (y=0..15)

pub fn pu4(&self) -> PU4_R[src]

Bit 4 - Port B pull-up bit y (y=0..15)

pub fn pu3(&self) -> PU3_R[src]

Bit 3 - Port B pull-up bit y (y=0..15)

pub fn pu2(&self) -> PU2_R[src]

Bit 2 - Port B pull-up bit y (y=0..15)

pub fn pu1(&self) -> PU1_R[src]

Bit 1 - Port B pull-up bit y (y=0..15)

pub fn pu0(&self) -> PU0_R[src]

Bit 0 - Port B pull-up bit y (y=0..15)

impl R<u32, Reg<u32, _PDCRB>>[src]

pub fn pd15(&self) -> PD15_R[src]

Bit 15 - Port B pull-down bit y (y=0..15)

pub fn pd14(&self) -> PD14_R[src]

Bit 14 - Port B pull-down bit y (y=0..15)

pub fn pd13(&self) -> PD13_R[src]

Bit 13 - Port B pull-down bit y (y=0..15)

pub fn pd12(&self) -> PD12_R[src]

Bit 12 - Port B pull-down bit y (y=0..15)

pub fn pd11(&self) -> PD11_R[src]

Bit 11 - Port B pull-down bit y (y=0..15)

pub fn pd10(&self) -> PD10_R[src]

Bit 10 - Port B pull-down bit y (y=0..15)

pub fn pd9(&self) -> PD9_R[src]

Bit 9 - Port B pull-down bit y (y=0..15)

pub fn pd8(&self) -> PD8_R[src]

Bit 8 - Port B pull-down bit y (y=0..15)

pub fn pd7(&self) -> PD7_R[src]

Bit 7 - Port B pull-down bit y (y=0..15)

pub fn pd6(&self) -> PD6_R[src]

Bit 6 - Port B pull-down bit y (y=0..15)

pub fn pd5(&self) -> PD5_R[src]

Bit 5 - Port B pull-down bit y (y=0..15)

pub fn pd4(&self) -> PD4_R[src]

Bit 4 - Port B pull-down bit y (y=0..15)

pub fn pd3(&self) -> PD3_R[src]

Bit 3 - Port B pull-down bit y (y=0..15)

pub fn pd2(&self) -> PD2_R[src]

Bit 2 - Port B pull-down bit y (y=0..15)

pub fn pd1(&self) -> PD1_R[src]

Bit 1 - Port B pull-down bit y (y=0..15)

pub fn pd0(&self) -> PD0_R[src]

Bit 0 - Port B pull-down bit y (y=0..15)

impl R<u32, Reg<u32, _PUCRC>>[src]

pub fn pu15(&self) -> PU15_R[src]

Bit 15 - Port C pull-up bit y (y=0..15)

pub fn pu14(&self) -> PU14_R[src]

Bit 14 - Port C pull-up bit y (y=0..15)

pub fn pu13(&self) -> PU13_R[src]

Bit 13 - Port C pull-up bit y (y=0..15)

pub fn pu12(&self) -> PU12_R[src]

Bit 12 - Port C pull-up bit y (y=0..15)

pub fn pu11(&self) -> PU11_R[src]

Bit 11 - Port C pull-up bit y (y=0..15)

pub fn pu10(&self) -> PU10_R[src]

Bit 10 - Port C pull-up bit y (y=0..15)

pub fn pu9(&self) -> PU9_R[src]

Bit 9 - Port C pull-up bit y (y=0..15)

pub fn pu8(&self) -> PU8_R[src]

Bit 8 - Port C pull-up bit y (y=0..15)

pub fn pu7(&self) -> PU7_R[src]

Bit 7 - Port C pull-up bit y (y=0..15)

pub fn pu6(&self) -> PU6_R[src]

Bit 6 - Port C pull-up bit y (y=0..15)

pub fn pu5(&self) -> PU5_R[src]

Bit 5 - Port C pull-up bit y (y=0..15)

pub fn pu4(&self) -> PU4_R[src]

Bit 4 - Port C pull-up bit y (y=0..15)

pub fn pu3(&self) -> PU3_R[src]

Bit 3 - Port C pull-up bit y (y=0..15)

pub fn pu2(&self) -> PU2_R[src]

Bit 2 - Port C pull-up bit y (y=0..15)

pub fn pu1(&self) -> PU1_R[src]

Bit 1 - Port C pull-up bit y (y=0..15)

pub fn pu0(&self) -> PU0_R[src]

Bit 0 - Port C pull-up bit y (y=0..15)

impl R<u32, Reg<u32, _PDCRC>>[src]

pub fn pd15(&self) -> PD15_R[src]

Bit 15 - Port C pull-down bit y (y=0..15)

pub fn pd14(&self) -> PD14_R[src]

Bit 14 - Port C pull-down bit y (y=0..15)

pub fn pd13(&self) -> PD13_R[src]

Bit 13 - Port C pull-down bit y (y=0..15)

pub fn pd12(&self) -> PD12_R[src]

Bit 12 - Port C pull-down bit y (y=0..15)

pub fn pd11(&self) -> PD11_R[src]

Bit 11 - Port C pull-down bit y (y=0..15)

pub fn pd10(&self) -> PD10_R[src]

Bit 10 - Port C pull-down bit y (y=0..15)

pub fn pd9(&self) -> PD9_R[src]

Bit 9 - Port C pull-down bit y (y=0..15)

pub fn pd8(&self) -> PD8_R[src]

Bit 8 - Port C pull-down bit y (y=0..15)

pub fn pd7(&self) -> PD7_R[src]

Bit 7 - Port C pull-down bit y (y=0..15)

pub fn pd6(&self) -> PD6_R[src]

Bit 6 - Port C pull-down bit y (y=0..15)

pub fn pd5(&self) -> PD5_R[src]

Bit 5 - Port C pull-down bit y (y=0..15)

pub fn pd4(&self) -> PD4_R[src]

Bit 4 - Port C pull-down bit y (y=0..15)

pub fn pd3(&self) -> PD3_R[src]

Bit 3 - Port C pull-down bit y (y=0..15)

pub fn pd2(&self) -> PD2_R[src]

Bit 2 - Port C pull-down bit y (y=0..15)

pub fn pd1(&self) -> PD1_R[src]

Bit 1 - Port C pull-down bit y (y=0..15)

pub fn pd0(&self) -> PD0_R[src]

Bit 0 - Port C pull-down bit y (y=0..15)

impl R<u32, Reg<u32, _PUCRD>>[src]

pub fn pu15(&self) -> PU15_R[src]

Bit 15 - Port D pull-up bit y (y=0..15)

pub fn pu14(&self) -> PU14_R[src]

Bit 14 - Port D pull-up bit y (y=0..15)

pub fn pu13(&self) -> PU13_R[src]

Bit 13 - Port D pull-up bit y (y=0..15)

pub fn pu12(&self) -> PU12_R[src]

Bit 12 - Port D pull-up bit y (y=0..15)

pub fn pu11(&self) -> PU11_R[src]

Bit 11 - Port D pull-up bit y (y=0..15)

pub fn pu10(&self) -> PU10_R[src]

Bit 10 - Port D pull-up bit y (y=0..15)

pub fn pu9(&self) -> PU9_R[src]

Bit 9 - Port D pull-up bit y (y=0..15)

pub fn pu8(&self) -> PU8_R[src]

Bit 8 - Port D pull-up bit y (y=0..15)

pub fn pu7(&self) -> PU7_R[src]

Bit 7 - Port D pull-up bit y (y=0..15)

pub fn pu6(&self) -> PU6_R[src]

Bit 6 - Port D pull-up bit y (y=0..15)

pub fn pu5(&self) -> PU5_R[src]

Bit 5 - Port D pull-up bit y (y=0..15)

pub fn pu4(&self) -> PU4_R[src]

Bit 4 - Port D pull-up bit y (y=0..15)

pub fn pu3(&self) -> PU3_R[src]

Bit 3 - Port D pull-up bit y (y=0..15)

pub fn pu2(&self) -> PU2_R[src]

Bit 2 - Port D pull-up bit y (y=0..15)

pub fn pu1(&self) -> PU1_R[src]

Bit 1 - Port D pull-up bit y (y=0..15)

pub fn pu0(&self) -> PU0_R[src]

Bit 0 - Port D pull-up bit y (y=0..15)

impl R<u32, Reg<u32, _PDCRD>>[src]

pub fn pd15(&self) -> PD15_R[src]

Bit 15 - Port D pull-down bit y (y=0..15)

pub fn pd14(&self) -> PD14_R[src]

Bit 14 - Port D pull-down bit y (y=0..15)

pub fn pd13(&self) -> PD13_R[src]

Bit 13 - Port D pull-down bit y (y=0..15)

pub fn pd12(&self) -> PD12_R[src]

Bit 12 - Port D pull-down bit y (y=0..15)

pub fn pd11(&self) -> PD11_R[src]

Bit 11 - Port D pull-down bit y (y=0..15)

pub fn pd10(&self) -> PD10_R[src]

Bit 10 - Port D pull-down bit y (y=0..15)

pub fn pd9(&self) -> PD9_R[src]

Bit 9 - Port D pull-down bit y (y=0..15)

pub fn pd8(&self) -> PD8_R[src]

Bit 8 - Port D pull-down bit y (y=0..15)

pub fn pd7(&self) -> PD7_R[src]

Bit 7 - Port D pull-down bit y (y=0..15)

pub fn pd6(&self) -> PD6_R[src]

Bit 6 - Port D pull-down bit y (y=0..15)

pub fn pd5(&self) -> PD5_R[src]

Bit 5 - Port D pull-down bit y (y=0..15)

pub fn pd4(&self) -> PD4_R[src]

Bit 4 - Port D pull-down bit y (y=0..15)

pub fn pd3(&self) -> PD3_R[src]

Bit 3 - Port D pull-down bit y (y=0..15)

pub fn pd2(&self) -> PD2_R[src]

Bit 2 - Port D pull-down bit y (y=0..15)

pub fn pd1(&self) -> PD1_R[src]

Bit 1 - Port D pull-down bit y (y=0..15)

pub fn pd0(&self) -> PD0_R[src]

Bit 0 - Port D pull-down bit y (y=0..15)

impl R<u32, Reg<u32, _PUCRE>>[src]

pub fn pu15(&self) -> PU15_R[src]

Bit 15 - Port E pull-up bit y (y=0..15)

pub fn pu14(&self) -> PU14_R[src]

Bit 14 - Port E pull-up bit y (y=0..15)

pub fn pu13(&self) -> PU13_R[src]

Bit 13 - Port E pull-up bit y (y=0..15)

pub fn pu12(&self) -> PU12_R[src]

Bit 12 - Port E pull-up bit y (y=0..15)

pub fn pu11(&self) -> PU11_R[src]

Bit 11 - Port E pull-up bit y (y=0..15)

pub fn pu10(&self) -> PU10_R[src]

Bit 10 - Port E pull-up bit y (y=0..15)

pub fn pu9(&self) -> PU9_R[src]

Bit 9 - Port E pull-up bit y (y=0..15)

pub fn pu8(&self) -> PU8_R[src]

Bit 8 - Port E pull-up bit y (y=0..15)

pub fn pu7(&self) -> PU7_R[src]

Bit 7 - Port E pull-up bit y (y=0..15)

pub fn pu6(&self) -> PU6_R[src]

Bit 6 - Port E pull-up bit y (y=0..15)

pub fn pu5(&self) -> PU5_R[src]

Bit 5 - Port E pull-up bit y (y=0..15)

pub fn pu4(&self) -> PU4_R[src]

Bit 4 - Port E pull-up bit y (y=0..15)

pub fn pu3(&self) -> PU3_R[src]

Bit 3 - Port E pull-up bit y (y=0..15)

pub fn pu2(&self) -> PU2_R[src]

Bit 2 - Port E pull-up bit y (y=0..15)

pub fn pu1(&self) -> PU1_R[src]

Bit 1 - Port E pull-up bit y (y=0..15)

pub fn pu0(&self) -> PU0_R[src]

Bit 0 - Port E pull-up bit y (y=0..15)

impl R<u32, Reg<u32, _PDCRE>>[src]

pub fn pd15(&self) -> PD15_R[src]

Bit 15 - Port E pull-down bit y (y=0..15)

pub fn pd14(&self) -> PD14_R[src]

Bit 14 - Port E pull-down bit y (y=0..15)

pub fn pd13(&self) -> PD13_R[src]

Bit 13 - Port E pull-down bit y (y=0..15)

pub fn pd12(&self) -> PD12_R[src]

Bit 12 - Port E pull-down bit y (y=0..15)

pub fn pd11(&self) -> PD11_R[src]

Bit 11 - Port E pull-down bit y (y=0..15)

pub fn pd10(&self) -> PD10_R[src]

Bit 10 - Port E pull-down bit y (y=0..15)

pub fn pd9(&self) -> PD9_R[src]

Bit 9 - Port E pull-down bit y (y=0..15)

pub fn pd8(&self) -> PD8_R[src]

Bit 8 - Port E pull-down bit y (y=0..15)

pub fn pd7(&self) -> PD7_R[src]

Bit 7 - Port E pull-down bit y (y=0..15)

pub fn pd6(&self) -> PD6_R[src]

Bit 6 - Port E pull-down bit y (y=0..15)

pub fn pd5(&self) -> PD5_R[src]

Bit 5 - Port E pull-down bit y (y=0..15)

pub fn pd4(&self) -> PD4_R[src]

Bit 4 - Port E pull-down bit y (y=0..15)

pub fn pd3(&self) -> PD3_R[src]

Bit 3 - Port E pull-down bit y (y=0..15)

pub fn pd2(&self) -> PD2_R[src]

Bit 2 - Port E pull-down bit y (y=0..15)

pub fn pd1(&self) -> PD1_R[src]

Bit 1 - Port E pull-down bit y (y=0..15)

pub fn pd0(&self) -> PD0_R[src]

Bit 0 - Port E pull-down bit y (y=0..15)

impl R<u32, Reg<u32, _PUCRF>>[src]

pub fn pu15(&self) -> PU15_R[src]

Bit 15 - Port F pull-up bit y (y=0..15)

pub fn pu14(&self) -> PU14_R[src]

Bit 14 - Port F pull-up bit y (y=0..15)

pub fn pu13(&self) -> PU13_R[src]

Bit 13 - Port F pull-up bit y (y=0..15)

pub fn pu12(&self) -> PU12_R[src]

Bit 12 - Port F pull-up bit y (y=0..15)

pub fn pu11(&self) -> PU11_R[src]

Bit 11 - Port F pull-up bit y (y=0..15)

pub fn pu10(&self) -> PU10_R[src]

Bit 10 - Port F pull-up bit y (y=0..15)

pub fn pu9(&self) -> PU9_R[src]

Bit 9 - Port F pull-up bit y (y=0..15)

pub fn pu8(&self) -> PU8_R[src]

Bit 8 - Port F pull-up bit y (y=0..15)

pub fn pu7(&self) -> PU7_R[src]

Bit 7 - Port F pull-up bit y (y=0..15)

pub fn pu6(&self) -> PU6_R[src]

Bit 6 - Port F pull-up bit y (y=0..15)

pub fn pu5(&self) -> PU5_R[src]

Bit 5 - Port F pull-up bit y (y=0..15)

pub fn pu4(&self) -> PU4_R[src]

Bit 4 - Port F pull-up bit y (y=0..15)

pub fn pu3(&self) -> PU3_R[src]

Bit 3 - Port F pull-up bit y (y=0..15)

pub fn pu2(&self) -> PU2_R[src]

Bit 2 - Port F pull-up bit y (y=0..15)

pub fn pu1(&self) -> PU1_R[src]

Bit 1 - Port F pull-up bit y (y=0..15)

pub fn pu0(&self) -> PU0_R[src]

Bit 0 - Port F pull-up bit y (y=0..15)

impl R<u32, Reg<u32, _PDCRF>>[src]

pub fn pd15(&self) -> PD15_R[src]

Bit 15 - Port F pull-down bit y (y=0..15)

pub fn pd14(&self) -> PD14_R[src]

Bit 14 - Port F pull-down bit y (y=0..15)

pub fn pd13(&self) -> PD13_R[src]

Bit 13 - Port F pull-down bit y (y=0..15)

pub fn pd12(&self) -> PD12_R[src]

Bit 12 - Port F pull-down bit y (y=0..15)

pub fn pd11(&self) -> PD11_R[src]

Bit 11 - Port F pull-down bit y (y=0..15)

pub fn pd10(&self) -> PD10_R[src]

Bit 10 - Port F pull-down bit y (y=0..15)

pub fn pd9(&self) -> PD9_R[src]

Bit 9 - Port F pull-down bit y (y=0..15)

pub fn pd8(&self) -> PD8_R[src]

Bit 8 - Port F pull-down bit y (y=0..15)

pub fn pd7(&self) -> PD7_R[src]

Bit 7 - Port F pull-down bit y (y=0..15)

pub fn pd6(&self) -> PD6_R[src]

Bit 6 - Port F pull-down bit y (y=0..15)

pub fn pd5(&self) -> PD5_R[src]

Bit 5 - Port F pull-down bit y (y=0..15)

pub fn pd4(&self) -> PD4_R[src]

Bit 4 - Port F pull-down bit y (y=0..15)

pub fn pd3(&self) -> PD3_R[src]

Bit 3 - Port F pull-down bit y (y=0..15)

pub fn pd2(&self) -> PD2_R[src]

Bit 2 - Port F pull-down bit y (y=0..15)

pub fn pd1(&self) -> PD1_R[src]

Bit 1 - Port F pull-down bit y (y=0..15)

pub fn pd0(&self) -> PD0_R[src]

Bit 0 - Port F pull-down bit y (y=0..15)

impl R<u32, Reg<u32, _PUCRG>>[src]

pub fn pu15(&self) -> PU15_R[src]

Bit 15 - Port G pull-up bit y (y=0..15)

pub fn pu14(&self) -> PU14_R[src]

Bit 14 - Port G pull-up bit y (y=0..15)

pub fn pu13(&self) -> PU13_R[src]

Bit 13 - Port G pull-up bit y (y=0..15)

pub fn pu12(&self) -> PU12_R[src]

Bit 12 - Port G pull-up bit y (y=0..15)

pub fn pu11(&self) -> PU11_R[src]

Bit 11 - Port G pull-up bit y (y=0..15)

pub fn pu10(&self) -> PU10_R[src]

Bit 10 - Port G pull-up bit y (y=0..15)

pub fn pu9(&self) -> PU9_R[src]

Bit 9 - Port G pull-up bit y (y=0..15)

pub fn pu8(&self) -> PU8_R[src]

Bit 8 - Port G pull-up bit y (y=0..15)

pub fn pu7(&self) -> PU7_R[src]

Bit 7 - Port G pull-up bit y (y=0..15)

pub fn pu6(&self) -> PU6_R[src]

Bit 6 - Port G pull-up bit y (y=0..15)

pub fn pu5(&self) -> PU5_R[src]

Bit 5 - Port G pull-up bit y (y=0..15)

pub fn pu4(&self) -> PU4_R[src]

Bit 4 - Port G pull-up bit y (y=0..15)

pub fn pu3(&self) -> PU3_R[src]

Bit 3 - Port G pull-up bit y (y=0..15)

pub fn pu2(&self) -> PU2_R[src]

Bit 2 - Port G pull-up bit y (y=0..15)

pub fn pu1(&self) -> PU1_R[src]

Bit 1 - Port G pull-up bit y (y=0..15)

pub fn pu0(&self) -> PU0_R[src]

Bit 0 - Port G pull-up bit y (y=0..15)

impl R<u32, Reg<u32, _PDCRG>>[src]

pub fn pd15(&self) -> PD15_R[src]

Bit 15 - Port G pull-down bit y (y=0..15)

pub fn pd14(&self) -> PD14_R[src]

Bit 14 - Port G pull-down bit y (y=0..15)

pub fn pd13(&self) -> PD13_R[src]

Bit 13 - Port G pull-down bit y (y=0..15)

pub fn pd12(&self) -> PD12_R[src]

Bit 12 - Port G pull-down bit y (y=0..15)

pub fn pd11(&self) -> PD11_R[src]

Bit 11 - Port G pull-down bit y (y=0..15)

pub fn pd10(&self) -> PD10_R[src]

Bit 10 - Port G pull-down bit y (y=0..15)

pub fn pd9(&self) -> PD9_R[src]

Bit 9 - Port G pull-down bit y (y=0..15)

pub fn pd8(&self) -> PD8_R[src]

Bit 8 - Port G pull-down bit y (y=0..15)

pub fn pd7(&self) -> PD7_R[src]

Bit 7 - Port G pull-down bit y (y=0..15)

pub fn pd6(&self) -> PD6_R[src]

Bit 6 - Port G pull-down bit y (y=0..15)

pub fn pd5(&self) -> PD5_R[src]

Bit 5 - Port G pull-down bit y (y=0..15)

pub fn pd4(&self) -> PD4_R[src]

Bit 4 - Port G pull-down bit y (y=0..15)

pub fn pd3(&self) -> PD3_R[src]

Bit 3 - Port G pull-down bit y (y=0..15)

pub fn pd2(&self) -> PD2_R[src]

Bit 2 - Port G pull-down bit y (y=0..15)

pub fn pd1(&self) -> PD1_R[src]

Bit 1 - Port G pull-down bit y (y=0..15)

pub fn pd0(&self) -> PD0_R[src]

Bit 0 - Port G pull-down bit y (y=0..15)

impl R<u32, Reg<u32, _PUCRH>>[src]

pub fn pu15(&self) -> PU15_R[src]

Bit 15 - Port G pull-up bit y (y=0..15)

pub fn pu14(&self) -> PU14_R[src]

Bit 14 - Port G pull-up bit y (y=0..15)

pub fn pu13(&self) -> PU13_R[src]

Bit 13 - Port G pull-up bit y (y=0..15)

pub fn pu12(&self) -> PU12_R[src]

Bit 12 - Port G pull-up bit y (y=0..15)

pub fn pu11(&self) -> PU11_R[src]

Bit 11 - Port G pull-up bit y (y=0..15)

pub fn pu10(&self) -> PU10_R[src]

Bit 10 - Port G pull-up bit y (y=0..15)

pub fn pu9(&self) -> PU9_R[src]

Bit 9 - Port G pull-up bit y (y=0..15)

pub fn pu8(&self) -> PU8_R[src]

Bit 8 - Port G pull-up bit y (y=0..15)

pub fn pu7(&self) -> PU7_R[src]

Bit 7 - Port G pull-up bit y (y=0..15)

pub fn pu6(&self) -> PU6_R[src]

Bit 6 - Port G pull-up bit y (y=0..15)

pub fn pu5(&self) -> PU5_R[src]

Bit 5 - Port G pull-up bit y (y=0..15)

pub fn pu4(&self) -> PU4_R[src]

Bit 4 - Port G pull-up bit y (y=0..15)

pub fn pu3(&self) -> PU3_R[src]

Bit 3 - Port G pull-up bit y (y=0..15)

pub fn pu2(&self) -> PU2_R[src]

Bit 2 - Port G pull-up bit y (y=0..15)

pub fn pu1(&self) -> PU1_R[src]

Bit 1 - Port G pull-up bit y (y=0..15)

pub fn pu0(&self) -> PU0_R[src]

Bit 0 - Port G pull-up bit y (y=0..15)

impl R<u32, Reg<u32, _PDCRH>>[src]

pub fn pd15(&self) -> PD15_R[src]

Bit 15 - Port G pull-down bit y (y=0..15)

pub fn pd14(&self) -> PD14_R[src]

Bit 14 - Port G pull-down bit y (y=0..15)

pub fn pd13(&self) -> PD13_R[src]

Bit 13 - Port G pull-down bit y (y=0..15)

pub fn pd12(&self) -> PD12_R[src]

Bit 12 - Port G pull-down bit y (y=0..15)

pub fn pd11(&self) -> PD11_R[src]

Bit 11 - Port G pull-down bit y (y=0..15)

pub fn pd10(&self) -> PD10_R[src]

Bit 10 - Port G pull-down bit y (y=0..15)

pub fn pd9(&self) -> PD9_R[src]

Bit 9 - Port G pull-down bit y (y=0..15)

pub fn pd8(&self) -> PD8_R[src]

Bit 8 - Port G pull-down bit y (y=0..15)

pub fn pd7(&self) -> PD7_R[src]

Bit 7 - Port G pull-down bit y (y=0..15)

pub fn pd6(&self) -> PD6_R[src]

Bit 6 - Port G pull-down bit y (y=0..15)

pub fn pd5(&self) -> PD5_R[src]

Bit 5 - Port G pull-down bit y (y=0..15)

pub fn pd4(&self) -> PD4_R[src]

Bit 4 - Port G pull-down bit y (y=0..15)

pub fn pd3(&self) -> PD3_R[src]

Bit 3 - Port G pull-down bit y (y=0..15)

pub fn pd2(&self) -> PD2_R[src]

Bit 2 - Port G pull-down bit y (y=0..15)

pub fn pd1(&self) -> PD1_R[src]

Bit 1 - Port G pull-down bit y (y=0..15)

pub fn pd0(&self) -> PD0_R[src]

Bit 0 - Port G pull-down bit y (y=0..15)

impl R<u32, Reg<u32, _SECCFGR>>[src]

pub fn apcsec(&self) -> APCSEC_R[src]

Bit 11 - APCSEC

pub fn vbsec(&self) -> VBSEC_R[src]

Bit 10 - VBSEC

pub fn vdmsec(&self) -> VDMSEC_R[src]

Bit 9 - VDMSEC

pub fn lpmsec(&self) -> LPMSEC_R[src]

Bit 8 - LPMSEC

pub fn wup5sec(&self) -> WUP5SEC_R[src]

Bit 4 - WKUP5 pin security

pub fn wup4sec(&self) -> WUP4SEC_R[src]

Bit 3 - WKUP4 pin security

pub fn wup3sec(&self) -> WUP3SEC_R[src]

Bit 2 - WKUP3 pin security

pub fn wup2sec(&self) -> WUP2SEC_R[src]

Bit 1 - WKUP2 pin security

pub fn wup1sec(&self) -> WUP1SEC_R[src]

Bit 0 - WKUP1 pin security

impl R<u32, Reg<u32, _PRIVCFGR>>[src]

pub fn priv_(&self) -> PRIV_R[src]

Bit 0 - PRIV

impl R<u32, Reg<u32, _CR>>[src]

pub fn priv_(&self) -> PRIV_R[src]

Bit 31 - PRIV

pub fn pllsai2rdy(&self) -> PLLSAI2RDY_R[src]

Bit 29 - SAI2 PLL clock ready flag

pub fn pllsai2on(&self) -> PLLSAI2ON_R[src]

Bit 28 - SAI2 PLL enable

pub fn pllsai1rdy(&self) -> PLLSAI1RDY_R[src]

Bit 27 - SAI1 PLL clock ready flag

pub fn pllsai1on(&self) -> PLLSAI1ON_R[src]

Bit 26 - SAI1 PLL enable

pub fn pllrdy(&self) -> PLLRDY_R[src]

Bit 25 - Main PLL clock ready flag

pub fn pllon(&self) -> PLLON_R[src]

Bit 24 - Main PLL enable

pub fn hsebyp(&self) -> HSEBYP_R[src]

Bit 18 - HSE crystal oscillator bypass

pub fn hserdy(&self) -> HSERDY_R[src]

Bit 17 - HSE clock ready flag

pub fn hseon(&self) -> HSEON_R[src]

Bit 16 - HSE clock enable

pub fn hsiasfs(&self) -> HSIASFS_R[src]

Bit 11 - HSI automatic start from Stop

pub fn hsirdy(&self) -> HSIRDY_R[src]

Bit 10 - HSI clock ready flag

pub fn hsikeron(&self) -> HSIKERON_R[src]

Bit 9 - HSI always enable for peripheral kernels

pub fn hsion(&self) -> HSION_R[src]

Bit 8 - HSI clock enable

pub fn msirange(&self) -> MSIRANGE_R[src]

Bits 4:7 - MSI clock ranges

pub fn msipllen(&self) -> MSIPLLEN_R[src]

Bit 2 - MSI clock PLL enable

pub fn msirdy(&self) -> MSIRDY_R[src]

Bit 1 - MSI clock ready flag

pub fn msion(&self) -> MSION_R[src]

Bit 0 - MSI clock enable

impl R<u32, Reg<u32, _ICSCR>>[src]

pub fn hsitrim(&self) -> HSITRIM_R[src]

Bits 24:30 - HSI clock trimming

pub fn hsical(&self) -> HSICAL_R[src]

Bits 16:23 - HSI clock calibration

pub fn msitrim(&self) -> MSITRIM_R[src]

Bits 8:15 - MSI clock trimming

pub fn msical(&self) -> MSICAL_R[src]

Bits 0:7 - MSI clock calibration

impl R<u32, Reg<u32, _CFGR>>[src]

pub fn mcopre(&self) -> MCOPRE_R[src]

Bits 28:30 - Microcontroller clock output prescaler

pub fn mcosel(&self) -> MCOSEL_R[src]

Bits 24:27 - Microcontroller clock output

pub fn stopwuck(&self) -> STOPWUCK_R[src]

Bit 15 - Wakeup from Stop and CSS backup clock selection

pub fn ppre2(&self) -> PPRE2_R[src]

Bits 11:13 - APB high-speed prescaler (APB2)

pub fn ppre1(&self) -> PPRE1_R[src]

Bits 8:10 - PB low-speed prescaler (APB1)

pub fn hpre(&self) -> HPRE_R[src]

Bits 4:7 - AHB prescaler

pub fn sws(&self) -> SWS_R[src]

Bits 2:3 - System clock switch status

pub fn sw(&self) -> SW_R[src]

Bits 0:1 - System clock switch

impl R<u32, Reg<u32, _PLLCFGR>>[src]

pub fn pllpdiv(&self) -> PLLPDIV_R[src]

Bits 27:31 - Main PLL division factor for PLLSAI2CLK

pub fn pllr(&self) -> PLLR_R[src]

Bits 25:26 - Main PLL division factor for PLLCLK (system clock)

pub fn pllren(&self) -> PLLREN_R[src]

Bit 24 - Main PLL PLLCLK output enable

pub fn pllq(&self) -> PLLQ_R[src]

Bits 21:22 - Main PLL division factor for PLLUSB1CLK(48 MHz clock)

pub fn pllqen(&self) -> PLLQEN_R[src]

Bit 20 - Main PLL PLLUSB1CLK output enable

pub fn pllp(&self) -> PLLP_R[src]

Bit 17 - Main PLL division factor for PLLSAI3CLK (SAI1 and SAI2 clock)

pub fn pllpen(&self) -> PLLPEN_R[src]

Bit 16 - Main PLL PLLSAI3CLK output enable

pub fn plln(&self) -> PLLN_R[src]

Bits 8:14 - Main PLL multiplication factor for VCO

pub fn pllm(&self) -> PLLM_R[src]

Bits 4:7 - Division factor for the main PLL and audio PLL (PLLSAI1 and PLLSAI2) input clock

pub fn pllsrc(&self) -> PLLSRC_R[src]

Bits 0:1 - Main PLL, PLLSAI1 and PLLSAI2 entry clock source

impl R<u32, Reg<u32, _PLLSAI1CFGR>>[src]

pub fn pllsai1pdiv(&self) -> PLLSAI1PDIV_R[src]

Bits 27:31 - PLLSAI1 division factor for PLLSAI1CLK

pub fn pllsai1r(&self) -> PLLSAI1R_R[src]

Bits 25:26 - PLLSAI1 division factor for PLLADC1CLK (ADC clock)

pub fn pllsai1ren(&self) -> PLLSAI1REN_R[src]

Bit 24 - PLLSAI1 PLLADC1CLK output enable

pub fn pllsai1q(&self) -> PLLSAI1Q_R[src]

Bits 21:22 - SAI1PLL division factor for PLLUSB2CLK (48 MHz clock)

pub fn pllsai1qen(&self) -> PLLSAI1QEN_R[src]

Bit 20 - SAI1PLL PLLUSB2CLK output enable

pub fn pllsai1p(&self) -> PLLSAI1P_R[src]

Bit 17 - SAI1PLL division factor for PLLSAI1CLK (SAI1 or SAI2 clock)

pub fn pllsai1pen(&self) -> PLLSAI1PEN_R[src]

Bit 16 - SAI1PLL PLLSAI1CLK output enable

pub fn pllsai1n(&self) -> PLLSAI1N_R[src]

Bits 8:14 - SAI1PLL multiplication factor for VCO

pub fn pllsai1m(&self) -> PLLSAI1M_R[src]

Bits 4:7 - Division factor for PLLSAI1 input clock

pub fn pllsai1src(&self) -> PLLSAI1SRC_R[src]

Bits 0:1 - PLLSAI1SRC

impl R<u32, Reg<u32, _PLLSAI2CFGR>>[src]

pub fn pllsai2pdiv(&self) -> PLLSAI2PDIV_R[src]

Bits 27:31 - PLLSAI2 division factor for PLLSAI2CLK

pub fn pllsai2p(&self) -> PLLSAI2P_R[src]

Bit 17 - SAI1PLL division factor for PLLSAI2CLK (SAI1 or SAI2 clock)

pub fn pllsai2pen(&self) -> PLLSAI2PEN_R[src]

Bit 16 - SAI2PLL PLLSAI2CLK output enable

pub fn pllsai2n(&self) -> PLLSAI2N_R[src]

Bits 8:14 - SAI2PLL multiplication factor for VCO

pub fn pllsai2m(&self) -> PLLSAI2M_R[src]

Bits 4:7 - Division factor for PLLSAI2 input clock

pub fn pllsai2src(&self) -> PLLSAI2SRC_R[src]

Bits 0:1 - PLLSAI2SRC

impl R<u32, Reg<u32, _CIER>>[src]

pub fn lsirdyie(&self) -> LSIRDYIE_R[src]

Bit 0 - LSI ready interrupt enable

pub fn lserdyie(&self) -> LSERDYIE_R[src]

Bit 1 - LSE ready interrupt enable

pub fn msirdyie(&self) -> MSIRDYIE_R[src]

Bit 2 - MSI ready interrupt enable

pub fn hsirdyie(&self) -> HSIRDYIE_R[src]

Bit 3 - HSI ready interrupt enable

pub fn hserdyie(&self) -> HSERDYIE_R[src]

Bit 4 - HSE ready interrupt enable

pub fn pllrdyie(&self) -> PLLRDYIE_R[src]

Bit 5 - PLL ready interrupt enable

pub fn pllsai1rdyie(&self) -> PLLSAI1RDYIE_R[src]

Bit 6 - PLLSAI1 ready interrupt enable

pub fn pllsai2rdyie(&self) -> PLLSAI2RDYIE_R[src]

Bit 7 - PLLSAI2 ready interrupt enable

pub fn lsecssie(&self) -> LSECSSIE_R[src]

Bit 9 - LSE clock security system interrupt enable

pub fn hsi48rdyie(&self) -> HSI48RDYIE_R[src]

Bit 10 - HSI48 ready interrupt enable

impl R<u32, Reg<u32, _CIFR>>[src]

pub fn lsirdyf(&self) -> LSIRDYF_R[src]

Bit 0 - LSI ready interrupt flag

pub fn lserdyf(&self) -> LSERDYF_R[src]

Bit 1 - LSE ready interrupt flag

pub fn msirdyf(&self) -> MSIRDYF_R[src]

Bit 2 - MSI ready interrupt flag

pub fn hsirdyf(&self) -> HSIRDYF_R[src]

Bit 3 - HSI ready interrupt flag

pub fn hserdyf(&self) -> HSERDYF_R[src]

Bit 4 - HSE ready interrupt flag

pub fn pllrdyf(&self) -> PLLRDYF_R[src]

Bit 5 - PLL ready interrupt flag

pub fn pllsai1rdyf(&self) -> PLLSAI1RDYF_R[src]

Bit 6 - PLLSAI1 ready interrupt flag

pub fn pllsai2rdyf(&self) -> PLLSAI2RDYF_R[src]

Bit 7 - PLLSAI2 ready interrupt flag

pub fn cssf(&self) -> CSSF_R[src]

Bit 8 - Clock security system interrupt flag

pub fn lsecssf(&self) -> LSECSSF_R[src]

Bit 9 - LSE Clock security system interrupt flag

pub fn hsi48rdyf(&self) -> HSI48RDYF_R[src]

Bit 10 - HSI48 ready interrupt flag

impl R<u32, Reg<u32, _AHB1RSTR>>[src]

pub fn dma1rst(&self) -> DMA1RST_R[src]

Bit 0 - DMA1 reset

pub fn dma2rst(&self) -> DMA2RST_R[src]

Bit 1 - DMA2 reset

pub fn dmamux1rst(&self) -> DMAMUX1RST_R[src]

Bit 2 - DMAMUXRST

pub fn flashrst(&self) -> FLASHRST_R[src]

Bit 8 - Flash memory interface reset

pub fn crcrst(&self) -> CRCRST_R[src]

Bit 12 - CRC reset

pub fn tscrst(&self) -> TSCRST_R[src]

Bit 16 - Touch Sensing Controller reset

pub fn gtzcrst(&self) -> GTZCRST_R[src]

Bit 22 - GTZC reset

impl R<u32, Reg<u32, _AHB2RSTR>>[src]

pub fn gpioarst(&self) -> GPIOARST_R[src]

Bit 0 - IO port A reset

pub fn gpiobrst(&self) -> GPIOBRST_R[src]

Bit 1 - IO port B reset

pub fn gpiocrst(&self) -> GPIOCRST_R[src]

Bit 2 - IO port C reset

pub fn gpiodrst(&self) -> GPIODRST_R[src]

Bit 3 - IO port D reset

pub fn gpioerst(&self) -> GPIOERST_R[src]

Bit 4 - IO port E reset

pub fn gpiofrst(&self) -> GPIOFRST_R[src]

Bit 5 - IO port F reset

pub fn gpiogrst(&self) -> GPIOGRST_R[src]

Bit 6 - IO port G reset

pub fn gpiohrst(&self) -> GPIOHRST_R[src]

Bit 7 - IO port H reset

pub fn adcrst(&self) -> ADCRST_R[src]

Bit 13 - ADC reset

pub fn aesrst(&self) -> AESRST_R[src]

Bit 16 - AES hardware accelerator reset

pub fn hashrst(&self) -> HASHRST_R[src]

Bit 17 - Hash reset

pub fn rngrst(&self) -> RNGRST_R[src]

Bit 18 - Random number generator reset

pub fn pkarst(&self) -> PKARST_R[src]

Bit 19 - PKARST

pub fn otfdec1rst(&self) -> OTFDEC1RST_R[src]

Bit 21 - OTFDEC1RST

pub fn sdmmc1rst(&self) -> SDMMC1RST_R[src]

Bit 22 - SDMMC1 reset

impl R<u32, Reg<u32, _AHB3RSTR>>[src]

pub fn fmcrst(&self) -> FMCRST_R[src]

Bit 0 - Flexible memory controller reset

pub fn ospi1rst(&self) -> OSPI1RST_R[src]

Bit 8 - OSPI1RST

impl R<u32, Reg<u32, _APB1RSTR1>>[src]

pub fn lptim1rst(&self) -> LPTIM1RST_R[src]

Bit 31 - Low Power Timer 1 reset

pub fn opamprst(&self) -> OPAMPRST_R[src]

Bit 30 - OPAMP interface reset

pub fn dac1rst(&self) -> DAC1RST_R[src]

Bit 29 - DAC1 interface reset

pub fn pwrrst(&self) -> PWRRST_R[src]

Bit 28 - Power interface reset

pub fn crsrst(&self) -> CRSRST_R[src]

Bit 24 - CRS reset

pub fn i2c3rst(&self) -> I2C3RST_R[src]

Bit 23 - I2C3 reset

pub fn i2c2rst(&self) -> I2C2RST_R[src]

Bit 22 - I2C2 reset

pub fn i2c1rst(&self) -> I2C1RST_R[src]

Bit 21 - I2C1 reset

pub fn uart5rst(&self) -> UART5RST_R[src]

Bit 20 - UART5 reset

pub fn uart4rst(&self) -> UART4RST_R[src]

Bit 19 - UART4 reset

pub fn usart3rst(&self) -> USART3RST_R[src]

Bit 18 - USART3 reset

pub fn usart2rst(&self) -> USART2RST_R[src]

Bit 17 - USART2 reset

pub fn spi3rst(&self) -> SPI3RST_R[src]

Bit 15 - SPI3 reset

pub fn spi2rst(&self) -> SPI2RST_R[src]

Bit 14 - SPI2 reset

pub fn tim7rst(&self) -> TIM7RST_R[src]

Bit 5 - TIM7 timer reset

pub fn tim6rst(&self) -> TIM6RST_R[src]

Bit 4 - TIM6 timer reset

pub fn tim5rst(&self) -> TIM5RST_R[src]

Bit 3 - TIM5 timer reset

pub fn tim4rst(&self) -> TIM4RST_R[src]

Bit 2 - TIM3 timer reset

pub fn tim3rst(&self) -> TIM3RST_R[src]

Bit 1 - TIM3 timer reset

pub fn tim2rst(&self) -> TIM2RST_R[src]

Bit 0 - TIM2 timer reset

impl R<u32, Reg<u32, _APB1RSTR2>>[src]

pub fn lpuart1rst(&self) -> LPUART1RST_R[src]

Bit 0 - Low-power UART 1 reset

pub fn i2c4rst(&self) -> I2C4RST_R[src]

Bit 1 - I2C4 reset

pub fn lptim2rst(&self) -> LPTIM2RST_R[src]

Bit 5 - Low-power timer 2 reset

pub fn lptim3rst(&self) -> LPTIM3RST_R[src]

Bit 6 - LPTIM3RST

pub fn fdcan1rst(&self) -> FDCAN1RST_R[src]

Bit 9 - FDCAN1RST

pub fn usbfsrst(&self) -> USBFSRST_R[src]

Bit 21 - USBFSRST

pub fn ucpd1rst(&self) -> UCPD1RST_R[src]

Bit 23 - UCPD1RST

impl R<u32, Reg<u32, _APB2RSTR>>[src]

pub fn syscfgrst(&self) -> SYSCFGRST_R[src]

Bit 0 - System configuration (SYSCFG) reset

pub fn tim1rst(&self) -> TIM1RST_R[src]

Bit 11 - TIM1 timer reset

pub fn spi1rst(&self) -> SPI1RST_R[src]

Bit 12 - SPI1 reset

pub fn tim8rst(&self) -> TIM8RST_R[src]

Bit 13 - TIM8 timer reset

pub fn usart1rst(&self) -> USART1RST_R[src]

Bit 14 - USART1 reset

pub fn tim15rst(&self) -> TIM15RST_R[src]

Bit 16 - TIM15 timer reset

pub fn tim16rst(&self) -> TIM16RST_R[src]

Bit 17 - TIM16 timer reset

pub fn tim17rst(&self) -> TIM17RST_R[src]

Bit 18 - TIM17 timer reset

pub fn sai1rst(&self) -> SAI1RST_R[src]

Bit 21 - Serial audio interface 1 (SAI1) reset

pub fn sai2rst(&self) -> SAI2RST_R[src]

Bit 22 - Serial audio interface 2 (SAI2) reset

pub fn dfsdm1rst(&self) -> DFSDM1RST_R[src]

Bit 24 - Digital filters for sigma-delata modulators (DFSDM) reset

impl R<u32, Reg<u32, _AHB1ENR>>[src]

pub fn dma1en(&self) -> DMA1EN_R[src]

Bit 0 - DMA1 clock enable

pub fn dma2en(&self) -> DMA2EN_R[src]

Bit 1 - DMA2 clock enable

pub fn dmamux1en(&self) -> DMAMUX1EN_R[src]

Bit 2 - DMAMUX clock enable

pub fn flashen(&self) -> FLASHEN_R[src]

Bit 8 - Flash memory interface clock enable

pub fn crcen(&self) -> CRCEN_R[src]

Bit 12 - CRC clock enable

pub fn tscen(&self) -> TSCEN_R[src]

Bit 16 - Touch Sensing Controller clock enable

pub fn gtzcen(&self) -> GTZCEN_R[src]

Bit 22 - GTZCEN

impl R<u32, Reg<u32, _AHB2ENR>>[src]

pub fn gpioaen(&self) -> GPIOAEN_R[src]

Bit 0 - IO port A clock enable

pub fn gpioben(&self) -> GPIOBEN_R[src]

Bit 1 - IO port B clock enable

pub fn gpiocen(&self) -> GPIOCEN_R[src]

Bit 2 - IO port C clock enable

pub fn gpioden(&self) -> GPIODEN_R[src]

Bit 3 - IO port D clock enable

pub fn gpioeen(&self) -> GPIOEEN_R[src]

Bit 4 - IO port E clock enable

pub fn gpiofen(&self) -> GPIOFEN_R[src]

Bit 5 - IO port F clock enable

pub fn gpiogen(&self) -> GPIOGEN_R[src]

Bit 6 - IO port G clock enable

pub fn gpiohen(&self) -> GPIOHEN_R[src]

Bit 7 - IO port H clock enable

pub fn adcen(&self) -> ADCEN_R[src]

Bit 13 - ADC clock enable

pub fn aesen(&self) -> AESEN_R[src]

Bit 16 - AES accelerator clock enable

pub fn hashen(&self) -> HASHEN_R[src]

Bit 17 - HASH clock enable

pub fn rngen(&self) -> RNGEN_R[src]

Bit 18 - Random Number Generator clock enable

pub fn pkaen(&self) -> PKAEN_R[src]

Bit 19 - PKAEN

pub fn otfdec1en(&self) -> OTFDEC1EN_R[src]

Bit 21 - OTFDEC1EN

pub fn sdmmc1en(&self) -> SDMMC1EN_R[src]

Bit 22 - SDMMC1 clock enable

impl R<u32, Reg<u32, _AHB3ENR>>[src]

pub fn fmcen(&self) -> FMCEN_R[src]

Bit 0 - Flexible memory controller clock enable

pub fn ospi1en(&self) -> OSPI1EN_R[src]

Bit 8 - OSPI1EN

impl R<u32, Reg<u32, _APB1ENR1>>[src]

pub fn tim2en(&self) -> TIM2EN_R[src]

Bit 0 - TIM2 timer clock enable

pub fn tim3en(&self) -> TIM3EN_R[src]

Bit 1 - TIM3 timer clock enable

pub fn tim4en(&self) -> TIM4EN_R[src]

Bit 2 - TIM4 timer clock enable

pub fn tim5en(&self) -> TIM5EN_R[src]

Bit 3 - TIM5 timer clock enable

pub fn tim6en(&self) -> TIM6EN_R[src]

Bit 4 - TIM6 timer clock enable

pub fn tim7en(&self) -> TIM7EN_R[src]

Bit 5 - TIM7 timer clock enable

pub fn rtcapben(&self) -> RTCAPBEN_R[src]

Bit 10 - RTC APB clock enable

pub fn wwdgen(&self) -> WWDGEN_R[src]

Bit 11 - Window watchdog clock enable

pub fn spi2en(&self) -> SPI2EN_R[src]

Bit 14 - SPI2 clock enable

pub fn sp3en(&self) -> SP3EN_R[src]

Bit 15 - SPI3 clock enable

pub fn usart2en(&self) -> USART2EN_R[src]

Bit 17 - USART2 clock enable

pub fn usart3en(&self) -> USART3EN_R[src]

Bit 18 - USART3 clock enable

pub fn uart4en(&self) -> UART4EN_R[src]

Bit 19 - UART4 clock enable

pub fn uart5en(&self) -> UART5EN_R[src]

Bit 20 - UART5 clock enable

pub fn i2c1en(&self) -> I2C1EN_R[src]

Bit 21 - I2C1 clock enable

pub fn i2c2en(&self) -> I2C2EN_R[src]

Bit 22 - I2C2 clock enable

pub fn i2c3en(&self) -> I2C3EN_R[src]

Bit 23 - I2C3 clock enable

pub fn crsen(&self) -> CRSEN_R[src]

Bit 24 - Clock Recovery System clock enable

pub fn pwren(&self) -> PWREN_R[src]

Bit 28 - Power interface clock enable

pub fn dac1en(&self) -> DAC1EN_R[src]

Bit 29 - DAC1 interface clock enable

pub fn opampen(&self) -> OPAMPEN_R[src]

Bit 30 - OPAMP interface clock enable

pub fn lptim1en(&self) -> LPTIM1EN_R[src]

Bit 31 - Low power timer 1 clock enable

impl R<u32, Reg<u32, _APB1ENR2>>[src]

pub fn lpuart1en(&self) -> LPUART1EN_R[src]

Bit 0 - Low power UART 1 clock enable

pub fn i2c4en(&self) -> I2C4EN_R[src]

Bit 1 - I2C4 clock enable

pub fn lptim2en(&self) -> LPTIM2EN_R[src]

Bit 5 - LPTIM2EN

pub fn lptim3en(&self) -> LPTIM3EN_R[src]

Bit 6 - LPTIM3EN

pub fn fdcan1en(&self) -> FDCAN1EN_R[src]

Bit 9 - FDCAN1EN

pub fn usbfsen(&self) -> USBFSEN_R[src]

Bit 21 - USBFSEN

pub fn ucpd1en(&self) -> UCPD1EN_R[src]

Bit 23 - UCPD1EN

impl R<u32, Reg<u32, _APB2ENR>>[src]

pub fn syscfgen(&self) -> SYSCFGEN_R[src]

Bit 0 - SYSCFG clock enable

pub fn tim1en(&self) -> TIM1EN_R[src]

Bit 11 - TIM1 timer clock enable

pub fn spi1en(&self) -> SPI1EN_R[src]

Bit 12 - SPI1 clock enable

pub fn tim8en(&self) -> TIM8EN_R[src]

Bit 13 - TIM8 timer clock enable

pub fn usart1en(&self) -> USART1EN_R[src]

Bit 14 - USART1clock enable

pub fn tim15en(&self) -> TIM15EN_R[src]

Bit 16 - TIM15 timer clock enable

pub fn tim16en(&self) -> TIM16EN_R[src]

Bit 17 - TIM16 timer clock enable

pub fn tim17en(&self) -> TIM17EN_R[src]

Bit 18 - TIM17 timer clock enable

pub fn sai1en(&self) -> SAI1EN_R[src]

Bit 21 - SAI1 clock enable

pub fn sai2en(&self) -> SAI2EN_R[src]

Bit 22 - SAI2 clock enable

pub fn dfsdm1en(&self) -> DFSDM1EN_R[src]

Bit 24 - DFSDM timer clock enable

impl R<u32, Reg<u32, _AHB1SMENR>>[src]

pub fn dma1smen(&self) -> DMA1SMEN_R[src]

Bit 0 - DMA1 clocks enable during Sleep and Stop modes

pub fn dma2smen(&self) -> DMA2SMEN_R[src]

Bit 1 - DMA2 clocks enable during Sleep and Stop modes

pub fn dmamux1smen(&self) -> DMAMUX1SMEN_R[src]

Bit 2 - DMAMUX clock enable during Sleep and Stop modes

pub fn flashsmen(&self) -> FLASHSMEN_R[src]

Bit 8 - Flash memory interface clocks enable during Sleep and Stop modes

pub fn sram1smen(&self) -> SRAM1SMEN_R[src]

Bit 9 - SRAM1 interface clocks enable during Sleep and Stop modes

pub fn crcsmen(&self) -> CRCSMEN_R[src]

Bit 12 - CRCSMEN

pub fn tscsmen(&self) -> TSCSMEN_R[src]

Bit 16 - Touch Sensing Controller clocks enable during Sleep and Stop modes

pub fn gtzcsmen(&self) -> GTZCSMEN_R[src]

Bit 22 - GTZCSMEN

pub fn icachesmen(&self) -> ICACHESMEN_R[src]

Bit 23 - ICACHESMEN

impl R<u32, Reg<u32, _AHB2SMENR>>[src]

pub fn gpioasmen(&self) -> GPIOASMEN_R[src]

Bit 0 - IO port A clocks enable during Sleep and Stop modes

pub fn gpiobsmen(&self) -> GPIOBSMEN_R[src]

Bit 1 - IO port B clocks enable during Sleep and Stop modes

pub fn gpiocsmen(&self) -> GPIOCSMEN_R[src]

Bit 2 - IO port C clocks enable during Sleep and Stop modes

pub fn gpiodsmen(&self) -> GPIODSMEN_R[src]

Bit 3 - IO port D clocks enable during Sleep and Stop modes

pub fn gpioesmen(&self) -> GPIOESMEN_R[src]

Bit 4 - IO port E clocks enable during Sleep and Stop modes

pub fn gpiofsmen(&self) -> GPIOFSMEN_R[src]

Bit 5 - IO port F clocks enable during Sleep and Stop modes

pub fn gpiogsmen(&self) -> GPIOGSMEN_R[src]

Bit 6 - IO port G clocks enable during Sleep and Stop modes

pub fn gpiohsmen(&self) -> GPIOHSMEN_R[src]

Bit 7 - IO port H clocks enable during Sleep and Stop modes

pub fn sram2smen(&self) -> SRAM2SMEN_R[src]

Bit 9 - SRAM2 interface clocks enable during Sleep and Stop modes

pub fn adcfssmen(&self) -> ADCFSSMEN_R[src]

Bit 13 - ADC clocks enable during Sleep and Stop modes

pub fn aessmen(&self) -> AESSMEN_R[src]

Bit 16 - AES accelerator clocks enable during Sleep and Stop modes

pub fn hashsmen(&self) -> HASHSMEN_R[src]

Bit 17 - HASH clock enable during Sleep and Stop modes

pub fn rngsmen(&self) -> RNGSMEN_R[src]

Bit 18 - Random Number Generator clocks enable during Sleep and Stop modes

pub fn pkasmen(&self) -> PKASMEN_R[src]

Bit 19 - PKASMEN

pub fn otfdec1smen(&self) -> OTFDEC1SMEN_R[src]

Bit 21 - OTFDEC1SMEN

pub fn sdmmc1smen(&self) -> SDMMC1SMEN_R[src]

Bit 22 - SDMMC1 clocks enable during Sleep and Stop modes

impl R<u32, Reg<u32, _AHB3SMENR>>[src]

pub fn fmcsmen(&self) -> FMCSMEN_R[src]

Bit 0 - Flexible memory controller clocks enable during Sleep and Stop modes

pub fn ospi1smen(&self) -> OSPI1SMEN_R[src]

Bit 8 - OSPI1SMEN

impl R<u32, Reg<u32, _APB1SMENR1>>[src]

pub fn tim2smen(&self) -> TIM2SMEN_R[src]

Bit 0 - TIM2 timer clocks enable during Sleep and Stop modes

pub fn tim3smen(&self) -> TIM3SMEN_R[src]

Bit 1 - TIM3 timer clocks enable during Sleep and Stop modes

pub fn tim4smen(&self) -> TIM4SMEN_R[src]

Bit 2 - TIM4 timer clocks enable during Sleep and Stop modes

pub fn tim5smen(&self) -> TIM5SMEN_R[src]

Bit 3 - TIM5 timer clocks enable during Sleep and Stop modes

pub fn tim6smen(&self) -> TIM6SMEN_R[src]

Bit 4 - TIM6 timer clocks enable during Sleep and Stop modes

pub fn tim7smen(&self) -> TIM7SMEN_R[src]

Bit 5 - TIM7 timer clocks enable during Sleep and Stop modes

pub fn rtcapbsmen(&self) -> RTCAPBSMEN_R[src]

Bit 10 - RTC APB clock enable during Sleep and Stop modes

pub fn wwdgsmen(&self) -> WWDGSMEN_R[src]

Bit 11 - Window watchdog clocks enable during Sleep and Stop modes

pub fn spi2smen(&self) -> SPI2SMEN_R[src]

Bit 14 - SPI2 clocks enable during Sleep and Stop modes

pub fn sp3smen(&self) -> SP3SMEN_R[src]

Bit 15 - SPI3 clocks enable during Sleep and Stop modes

pub fn usart2smen(&self) -> USART2SMEN_R[src]

Bit 17 - USART2 clocks enable during Sleep and Stop modes

pub fn usart3smen(&self) -> USART3SMEN_R[src]

Bit 18 - USART3 clocks enable during Sleep and Stop modes

pub fn uart4smen(&self) -> UART4SMEN_R[src]

Bit 19 - UART4 clocks enable during Sleep and Stop modes

pub fn uart5smen(&self) -> UART5SMEN_R[src]

Bit 20 - UART5 clocks enable during Sleep and Stop modes

pub fn i2c1smen(&self) -> I2C1SMEN_R[src]

Bit 21 - I2C1 clocks enable during Sleep and Stop modes

pub fn i2c2smen(&self) -> I2C2SMEN_R[src]

Bit 22 - I2C2 clocks enable during Sleep and Stop modes

pub fn i2c3smen(&self) -> I2C3SMEN_R[src]

Bit 23 - I2C3 clocks enable during Sleep and Stop modes

pub fn crssmen(&self) -> CRSSMEN_R[src]

Bit 24 - CRS clock enable during Sleep and Stop modes

pub fn pwrsmen(&self) -> PWRSMEN_R[src]

Bit 28 - Power interface clocks enable during Sleep and Stop modes

pub fn dac1smen(&self) -> DAC1SMEN_R[src]

Bit 29 - DAC1 interface clocks enable during Sleep and Stop modes

pub fn opampsmen(&self) -> OPAMPSMEN_R[src]

Bit 30 - OPAMP interface clocks enable during Sleep and Stop modes

pub fn lptim1smen(&self) -> LPTIM1SMEN_R[src]

Bit 31 - Low power timer 1 clocks enable during Sleep and Stop modes

impl R<u32, Reg<u32, _APB1SMENR2>>[src]

pub fn lpuart1smen(&self) -> LPUART1SMEN_R[src]

Bit 0 - Low power UART 1 clocks enable during Sleep and Stop modes

pub fn i2c4smen(&self) -> I2C4SMEN_R[src]

Bit 1 - I2C4 clocks enable during Sleep and Stop modes

pub fn lptim2smen(&self) -> LPTIM2SMEN_R[src]

Bit 5 - LPTIM2SMEN

pub fn lptim3smen(&self) -> LPTIM3SMEN_R[src]

Bit 6 - LPTIM3SMEN

pub fn fdcan1smen(&self) -> FDCAN1SMEN_R[src]

Bit 9 - FDCAN1SMEN

pub fn usbfssmen(&self) -> USBFSSMEN_R[src]

Bit 21 - USBFSSMEN

pub fn ucpd1smen(&self) -> UCPD1SMEN_R[src]

Bit 23 - UCPD1SMEN

impl R<u32, Reg<u32, _APB2SMENR>>[src]

pub fn syscfgsmen(&self) -> SYSCFGSMEN_R[src]

Bit 0 - SYSCFG clocks enable during Sleep and Stop modes

pub fn tim1smen(&self) -> TIM1SMEN_R[src]

Bit 11 - TIM1 timer clocks enable during Sleep and Stop modes

pub fn spi1smen(&self) -> SPI1SMEN_R[src]

Bit 12 - SPI1 clocks enable during Sleep and Stop modes

pub fn tim8smen(&self) -> TIM8SMEN_R[src]

Bit 13 - TIM8 timer clocks enable during Sleep and Stop modes

pub fn usart1smen(&self) -> USART1SMEN_R[src]

Bit 14 - USART1clocks enable during Sleep and Stop modes

pub fn tim15smen(&self) -> TIM15SMEN_R[src]

Bit 16 - TIM15 timer clocks enable during Sleep and Stop modes

pub fn tim16smen(&self) -> TIM16SMEN_R[src]

Bit 17 - TIM16 timer clocks enable during Sleep and Stop modes

pub fn tim17smen(&self) -> TIM17SMEN_R[src]

Bit 18 - TIM17 timer clocks enable during Sleep and Stop modes

pub fn sai1smen(&self) -> SAI1SMEN_R[src]

Bit 21 - SAI1 clocks enable during Sleep and Stop modes

pub fn sai2smen(&self) -> SAI2SMEN_R[src]

Bit 22 - SAI2 clocks enable during Sleep and Stop modes

pub fn dfsdm1smen(&self) -> DFSDM1SMEN_R[src]

Bit 24 - DFSDM timer clocks enable during Sleep and Stop modes

impl R<u32, Reg<u32, _CCIPR1>>[src]

pub fn adcsel(&self) -> ADCSEL_R[src]

Bits 28:29 - ADCs clock source selection

pub fn clk48msel(&self) -> CLK48MSEL_R[src]

Bits 26:27 - 48 MHz clock source selection

pub fn fdcansel(&self) -> FDCANSEL_R[src]

Bits 24:25 - FDCAN clock source selection

pub fn lptim3sel(&self) -> LPTIM3SEL_R[src]

Bits 22:23 - Low-power timer 3 clock source selection

pub fn lptim2sel(&self) -> LPTIM2SEL_R[src]

Bits 20:21 - Low power timer 2 clock source selection

pub fn lptim1sel(&self) -> LPTIM1SEL_R[src]

Bits 18:19 - Low power timer 1 clock source selection

pub fn i2c3sel(&self) -> I2C3SEL_R[src]

Bits 16:17 - I2C3 clock source selection

pub fn i2c2sel(&self) -> I2C2SEL_R[src]

Bits 14:15 - I2C2 clock source selection

pub fn i2c1sel(&self) -> I2C1SEL_R[src]

Bits 12:13 - I2C1 clock source selection

pub fn lpuart1sel(&self) -> LPUART1SEL_R[src]

Bits 10:11 - LPUART1 clock source selection

pub fn uart5sel(&self) -> UART5SEL_R[src]

Bits 8:9 - UART5 clock source selection

pub fn uart4sel(&self) -> UART4SEL_R[src]

Bits 6:7 - UART4 clock source selection

pub fn usart3sel(&self) -> USART3SEL_R[src]

Bits 4:5 - USART3 clock source selection

pub fn usart2sel(&self) -> USART2SEL_R[src]

Bits 2:3 - USART2 clock source selection

pub fn usart1sel(&self) -> USART1SEL_R[src]

Bits 0:1 - USART1 clock source selection

impl R<u32, Reg<u32, _BDCR>>[src]

pub fn lscosel(&self) -> LSCOSEL_R[src]

Bit 25 - Low speed clock output selection

pub fn lscoen(&self) -> LSCOEN_R[src]

Bit 24 - Low speed clock output enable

pub fn bdrst(&self) -> BDRST_R[src]

Bit 16 - Backup domain software reset

pub fn rtcen(&self) -> RTCEN_R[src]

Bit 15 - RTC clock enable

pub fn lsesysrdy(&self) -> LSESYSRDY_R[src]

Bit 11 - LSESYSRDY

pub fn rtcsel(&self) -> RTCSEL_R[src]

Bits 8:9 - RTC clock source selection

pub fn lsesysen(&self) -> LSESYSEN_R[src]

Bit 7 - LSESYSEN

pub fn lsecssd(&self) -> LSECSSD_R[src]

Bit 6 - LSECSSD

pub fn lsecsson(&self) -> LSECSSON_R[src]

Bit 5 - LSECSSON

pub fn lsedrv(&self) -> LSEDRV_R[src]

Bits 3:4 - SE oscillator drive capability

pub fn lsebyp(&self) -> LSEBYP_R[src]

Bit 2 - LSE oscillator bypass

pub fn lserdy(&self) -> LSERDY_R[src]

Bit 1 - LSE oscillator ready

pub fn lseon(&self) -> LSEON_R[src]

Bit 0 - LSE oscillator enable

impl R<u32, Reg<u32, _CSR>>[src]

pub fn lpwrstf(&self) -> LPWRSTF_R[src]

Bit 31 - Low-power reset flag

pub fn wwdgrstf(&self) -> WWDGRSTF_R[src]

Bit 30 - Window watchdog reset flag

pub fn iwwdgrstf(&self) -> IWWDGRSTF_R[src]

Bit 29 - Independent window watchdog reset flag

pub fn sftrstf(&self) -> SFTRSTF_R[src]

Bit 28 - Software reset flag

pub fn borrstf(&self) -> BORRSTF_R[src]

Bit 27 - BOR flag

pub fn pinrstf(&self) -> PINRSTF_R[src]

Bit 26 - Pin reset flag

pub fn oblrstf(&self) -> OBLRSTF_R[src]

Bit 25 - Option byte loader reset flag

pub fn rmvf(&self) -> RMVF_R[src]

Bit 23 - Remove reset flag

pub fn msisrange(&self) -> MSISRANGE_R[src]

Bits 8:11 - SI range after Standby mode

pub fn lsiprediv(&self) -> LSIPREDIV_R[src]

Bit 4 - LSIPREDIV

pub fn lsirdy(&self) -> LSIRDY_R[src]

Bit 1 - LSI oscillator ready

pub fn lsion(&self) -> LSION_R[src]

Bit 0 - LSI oscillator enable

impl R<u32, Reg<u32, _CRRCR>>[src]

pub fn hsi48on(&self) -> HSI48ON_R[src]

Bit 0 - HSI48 clock enable

pub fn hsi48rdy(&self) -> HSI48RDY_R[src]

Bit 1 - HSI48 clock ready flag

pub fn hsi48cal(&self) -> HSI48CAL_R[src]

Bits 7:15 - HSI48 clock calibration

impl R<u32, Reg<u32, _CCIPR2>>[src]

pub fn i2c4sel(&self) -> I2C4SEL_R[src]

Bits 0:1 - I2C4 clock source selection

pub fn dfsdmsel(&self) -> DFSDMSEL_R[src]

Bit 2 - Digital filter for sigma delta modulator kernel clock source selection

pub fn adfsdmsel(&self) -> ADFSDMSEL_R[src]

Bits 3:4 - Digital filter for sigma delta modulator audio clock source selection

pub fn sai1sel(&self) -> SAI1SEL_R[src]

Bits 5:7 - SAI1 clock source selection

pub fn sai2sel(&self) -> SAI2SEL_R[src]

Bits 8:10 - SAI2 clock source selection

pub fn sdmmcsel(&self) -> SDMMCSEL_R[src]

Bit 14 - SDMMC clock selection

pub fn ospisel(&self) -> OSPISEL_R[src]

Bits 20:21 - Octospi clock source selection

impl R<u32, Reg<u32, _SECCFGR>>[src]

pub fn hsisec(&self) -> HSISEC_R[src]

Bit 0 - HSISEC

pub fn hsesec(&self) -> HSESEC_R[src]

Bit 1 - HSESEC

pub fn msisec(&self) -> MSISEC_R[src]

Bit 2 - MSISEC

pub fn lsisec(&self) -> LSISEC_R[src]

Bit 3 - LSISEC

pub fn lsesec(&self) -> LSESEC_R[src]

Bit 4 - LSESEC

pub fn sysclksec(&self) -> SYSCLKSEC_R[src]

Bit 5 - SYSCLKSEC

pub fn prescsec(&self) -> PRESCSEC_R[src]

Bit 6 - PRESCSEC

pub fn pllsec(&self) -> PLLSEC_R[src]

Bit 7 - PLLSEC

pub fn pllsai1sec(&self) -> PLLSAI1SEC_R[src]

Bit 8 - PLLSAI1SEC

pub fn pllsai2sec(&self) -> PLLSAI2SEC_R[src]

Bit 9 - PLLSAI2SEC

pub fn clk48msec(&self) -> CLK48MSEC_R[src]

Bit 10 - CLK48MSEC

pub fn hsi48sec(&self) -> HSI48SEC_R[src]

Bit 11 - HSI48SEC

pub fn rmvfsec(&self) -> RMVFSEC_R[src]

Bit 12 - RMVFSEC

impl R<u32, Reg<u32, _SECSR>>[src]

pub fn rmvfsecf(&self) -> RMVFSECF_R[src]

Bit 12 - RMVFSECF

pub fn hsi48secf(&self) -> HSI48SECF_R[src]

Bit 11 - HSI48SECF

pub fn clk48msecf(&self) -> CLK48MSECF_R[src]

Bit 10 - CLK48MSECF

pub fn pllsai2secf(&self) -> PLLSAI2SECF_R[src]

Bit 9 - PLLSAI2SECF

pub fn pllsai1secf(&self) -> PLLSAI1SECF_R[src]

Bit 8 - PLLSAI1SECF

pub fn pllsecf(&self) -> PLLSECF_R[src]

Bit 7 - PLLSECF

pub fn prescsecf(&self) -> PRESCSECF_R[src]

Bit 6 - PRESCSECF

pub fn sysclksecf(&self) -> SYSCLKSECF_R[src]

Bit 5 - SYSCLKSECF

pub fn lsesecf(&self) -> LSESECF_R[src]

Bit 4 - LSESECF

pub fn lsisecf(&self) -> LSISECF_R[src]

Bit 3 - LSISECF

pub fn msisecf(&self) -> MSISECF_R[src]

Bit 2 - MSISECF

pub fn hsesecf(&self) -> HSESECF_R[src]

Bit 1 - HSESECF

pub fn hsisecf(&self) -> HSISECF_R[src]

Bit 0 - HSISECF

impl R<u32, Reg<u32, _AHB1SECSR>>[src]

pub fn icachesecf(&self) -> ICACHESECF_R[src]

Bit 23 - ICACHESECF

pub fn gtzcsecf(&self) -> GTZCSECF_R[src]

Bit 22 - GTZCSECF

pub fn tscsecf(&self) -> TSCSECF_R[src]

Bit 16 - TSCSECF

pub fn crcsecf(&self) -> CRCSECF_R[src]

Bit 12 - CRCSECF

pub fn sram1secf(&self) -> SRAM1SECF_R[src]

Bit 9 - SRAM1SECF

pub fn flashsecf(&self) -> FLASHSECF_R[src]

Bit 8 - FLASHSECF

pub fn dmamux1secf(&self) -> DMAMUX1SECF_R[src]

Bit 2 - DMAMUX1SECF

pub fn dma2secf(&self) -> DMA2SECF_R[src]

Bit 1 - DMA2SECF

pub fn dma1secf(&self) -> DMA1SECF_R[src]

Bit 0 - DMA1SECF

impl R<u32, Reg<u32, _AHB2SECSR>>[src]

pub fn sdmmc1secf(&self) -> SDMMC1SECF_R[src]

Bit 22 - SDMMC1SECF

pub fn otfdec1secf(&self) -> OTFDEC1SECF_R[src]

Bit 21 - OTFDEC1SECF

pub fn sram2secf(&self) -> SRAM2SECF_R[src]

Bit 9 - SRAM2SECF

pub fn gpiohsecf(&self) -> GPIOHSECF_R[src]

Bit 7 - GPIOHSECF

pub fn gpiogsecf(&self) -> GPIOGSECF_R[src]

Bit 6 - GPIOGSECF

pub fn gpiofsecf(&self) -> GPIOFSECF_R[src]

Bit 5 - GPIOFSECF

pub fn gpioesecf(&self) -> GPIOESECF_R[src]

Bit 4 - GPIOESECF

pub fn gpiodsecf(&self) -> GPIODSECF_R[src]

Bit 3 - GPIODSECF

pub fn gpiocsecf(&self) -> GPIOCSECF_R[src]

Bit 2 - GPIOCSECF

pub fn gpiobsecf(&self) -> GPIOBSECF_R[src]

Bit 1 - GPIOBSECF

pub fn gpioasecf(&self) -> GPIOASECF_R[src]

Bit 0 - GPIOASECF

impl R<u32, Reg<u32, _AHB3SECSR>>[src]

pub fn ospi1secf(&self) -> OSPI1SECF_R[src]

Bit 8 - OSPI1SECF

pub fn fsmcsecf(&self) -> FSMCSECF_R[src]

Bit 0 - FSMCSECF

impl R<u32, Reg<u32, _APB1SECSR1>>[src]

pub fn lptim1secf(&self) -> LPTIM1SECF_R[src]

Bit 31 - LPTIM1SECF

pub fn opampsecf(&self) -> OPAMPSECF_R[src]

Bit 30 - OPAMPSECF

pub fn dacsecf(&self) -> DACSECF_R[src]

Bit 29 - DACSECF

pub fn pwrsecf(&self) -> PWRSECF_R[src]

Bit 28 - PWRSECF

pub fn crssecf(&self) -> CRSSECF_R[src]

Bit 24 - CRSSECF

pub fn i2c3secf(&self) -> I2C3SECF_R[src]

Bit 23 - I2C3SECF

pub fn i2c2secf(&self) -> I2C2SECF_R[src]

Bit 22 - I2C2SECF

pub fn i2c1secf(&self) -> I2C1SECF_R[src]

Bit 21 - I2C1SECF

pub fn uart5secf(&self) -> UART5SECF_R[src]

Bit 20 - UART5SECF

pub fn uart4secf(&self) -> UART4SECF_R[src]

Bit 19 - UART4SECF

pub fn uart3secf(&self) -> UART3SECF_R[src]

Bit 18 - UART3SECF

pub fn uart2secf(&self) -> UART2SECF_R[src]

Bit 17 - UART2SECF

pub fn spi3secf(&self) -> SPI3SECF_R[src]

Bit 15 - SPI3SECF

pub fn spi2secf(&self) -> SPI2SECF_R[src]

Bit 14 - SPI2SECF

pub fn wwdgsecf(&self) -> WWDGSECF_R[src]

Bit 11 - WWDGSECF

pub fn rtcapbsecf(&self) -> RTCAPBSECF_R[src]

Bit 10 - RTCAPBSECF

pub fn tim7secf(&self) -> TIM7SECF_R[src]

Bit 5 - TIM7SECF

pub fn tim6secf(&self) -> TIM6SECF_R[src]

Bit 4 - TIM6SECF

pub fn tim5secf(&self) -> TIM5SECF_R[src]

Bit 3 - TIM5SECF

pub fn tim4secf(&self) -> TIM4SECF_R[src]

Bit 2 - TIM4SECF

pub fn tim3secf(&self) -> TIM3SECF_R[src]

Bit 1 - TIM3SECF

pub fn tim2secf(&self) -> TIM2SECF_R[src]

Bit 0 - TIM2SECF

impl R<u32, Reg<u32, _APB1SECSR2>>[src]

pub fn ucpd1secf(&self) -> UCPD1SECF_R[src]

Bit 23 - UCPD1SECF

pub fn usbfssecf(&self) -> USBFSSECF_R[src]

Bit 21 - USBFSSECF

pub fn fdcan1secf(&self) -> FDCAN1SECF_R[src]

Bit 9 - FDCAN1SECF

pub fn lptim3secf(&self) -> LPTIM3SECF_R[src]

Bit 6 - LPTIM3SECF

pub fn lptim2secf(&self) -> LPTIM2SECF_R[src]

Bit 5 - LPTIM2SECF

pub fn i2c4secf(&self) -> I2C4SECF_R[src]

Bit 1 - I2C4SECF

pub fn lpuart1secf(&self) -> LPUART1SECF_R[src]

Bit 0 - LPUART1SECF

impl R<u32, Reg<u32, _APB2SECSR>>[src]

pub fn dfsdm1secf(&self) -> DFSDM1SECF_R[src]

Bit 24 - DFSDM1SECF

pub fn sai2secf(&self) -> SAI2SECF_R[src]

Bit 22 - SAI2SECF

pub fn sai1secf(&self) -> SAI1SECF_R[src]

Bit 21 - SAI1SECF

pub fn tim17secf(&self) -> TIM17SECF_R[src]

Bit 18 - TIM17SECF

pub fn tim16secf(&self) -> TIM16SECF_R[src]

Bit 17 - TIM16SECF

pub fn tim15secf(&self) -> TIM15SECF_R[src]

Bit 16 - TIM15SECF

pub fn usart1secf(&self) -> USART1SECF_R[src]

Bit 14 - USART1SECF

pub fn tim8secf(&self) -> TIM8SECF_R[src]

Bit 13 - TIM8SECF

pub fn spi1secf(&self) -> SPI1SECF_R[src]

Bit 12 - SPI1SECF

pub fn tim1secf(&self) -> TIM1SECF_R[src]

Bit 11 - TIM1SECF

pub fn syscfgsecf(&self) -> SYSCFGSECF_R[src]

Bit 0 - SYSCFGSECF

impl R<u32, Reg<u32, _TR>>[src]

pub fn pm(&self) -> PM_R[src]

Bit 22 - AM/PM notation

pub fn ht(&self) -> HT_R[src]

Bits 20:21 - Hour tens in BCD format

pub fn hu(&self) -> HU_R[src]

Bits 16:19 - Hour units in BCD format

pub fn mnt(&self) -> MNT_R[src]

Bits 12:14 - Minute tens in BCD format

pub fn mnu(&self) -> MNU_R[src]

Bits 8:11 - Minute units in BCD format

pub fn st(&self) -> ST_R[src]

Bits 4:6 - Second tens in BCD format

pub fn su(&self) -> SU_R[src]

Bits 0:3 - Second units in BCD format

impl R<u32, Reg<u32, _DR>>[src]

pub fn yt(&self) -> YT_R[src]

Bits 20:23 - Year tens in BCD format

pub fn yu(&self) -> YU_R[src]

Bits 16:19 - Year units in BCD format

pub fn wdu(&self) -> WDU_R[src]

Bits 13:15 - Week day units

pub fn mt(&self) -> MT_R[src]

Bit 12 - Month tens in BCD format

pub fn mu(&self) -> MU_R[src]

Bits 8:11 - Month units in BCD format

pub fn dt(&self) -> DT_R[src]

Bits 4:5 - Date tens in BCD format

pub fn du(&self) -> DU_R[src]

Bits 0:3 - Date units in BCD format

impl R<u32, Reg<u32, _SSR>>[src]

pub fn ss(&self) -> SS_R[src]

Bits 0:15 - SS

impl R<u32, Reg<u32, _ICSR>>[src]

pub fn alrawf(&self) -> ALRAWF_R[src]

Bit 0 - Alarm A write flag

pub fn alrbwf(&self) -> ALRBWF_R[src]

Bit 1 - Alarm B write flag

pub fn wutwf(&self) -> WUTWF_R[src]

Bit 2 - Wakeup timer write flag

pub fn shpf(&self) -> SHPF_R[src]

Bit 3 - Shift operation pending

pub fn inits(&self) -> INITS_R[src]

Bit 4 - Initialization status flag

pub fn rsf(&self) -> RSF_R[src]

Bit 5 - Registers synchronization flag

pub fn initf(&self) -> INITF_R[src]

Bit 6 - Initialization flag

pub fn init(&self) -> INIT_R[src]

Bit 7 - Initialization mode

pub fn recalpf(&self) -> RECALPF_R[src]

Bit 16 - Recalibration pending Flag

impl R<u32, Reg<u32, _PRER>>[src]

pub fn prediv_a(&self) -> PREDIV_A_R[src]

Bits 16:22 - Asynchronous prescaler factor

pub fn prediv_s(&self) -> PREDIV_S_R[src]

Bits 0:14 - Synchronous prescaler factor

impl R<u32, Reg<u32, _WUTR>>[src]

pub fn wut(&self) -> WUT_R[src]

Bits 0:15 - Wakeup auto-reload value bits

pub fn wutoclr(&self) -> WUTOCLR_R[src]

Bits 16:31 - WUTOCLR

impl R<u32, Reg<u32, _CR>>[src]

pub fn wucksel(&self) -> WUCKSEL_R[src]

Bits 0:2 - WUCKSEL

pub fn tsedge(&self) -> TSEDGE_R[src]

Bit 3 - TSEDGE

pub fn refckon(&self) -> REFCKON_R[src]

Bit 4 - REFCKON

pub fn bypshad(&self) -> BYPSHAD_R[src]

Bit 5 - BYPSHAD

pub fn fmt(&self) -> FMT_R[src]

Bit 6 - FMT

pub fn alrae(&self) -> ALRAE_R[src]

Bit 8 - ALRAE

pub fn alrbe(&self) -> ALRBE_R[src]

Bit 9 - ALRBE

pub fn wute(&self) -> WUTE_R[src]

Bit 10 - WUTE

pub fn tse(&self) -> TSE_R[src]

Bit 11 - TSE

pub fn alraie(&self) -> ALRAIE_R[src]

Bit 12 - ALRAIE

pub fn alrbie(&self) -> ALRBIE_R[src]

Bit 13 - ALRBIE

pub fn wutie(&self) -> WUTIE_R[src]

Bit 14 - WUTIE

pub fn tsie(&self) -> TSIE_R[src]

Bit 15 - TSIE

pub fn add1h(&self) -> ADD1H_R[src]

Bit 16 - ADD1H

pub fn sub1h(&self) -> SUB1H_R[src]

Bit 17 - SUB1H

pub fn bkp(&self) -> BKP_R[src]

Bit 18 - BKP

pub fn cosel(&self) -> COSEL_R[src]

Bit 19 - COSEL

pub fn pol(&self) -> POL_R[src]

Bit 20 - POL

pub fn osel(&self) -> OSEL_R[src]

Bits 21:22 - OSEL

pub fn coe(&self) -> COE_R[src]

Bit 23 - COE

pub fn itse(&self) -> ITSE_R[src]

Bit 24 - ITSE

pub fn tampts(&self) -> TAMPTS_R[src]

Bit 25 - TAMPTS

pub fn tampoe(&self) -> TAMPOE_R[src]

Bit 26 - TAMPOE

pub fn tampalrm_pu(&self) -> TAMPALRM_PU_R[src]

Bit 29 - TAMPALRM_PU

pub fn tampalrm_type(&self) -> TAMPALRM_TYPE_R[src]

Bit 30 - TAMPALRM_TYPE

pub fn out2en(&self) -> OUT2EN_R[src]

Bit 31 - OUT2EN

impl R<u32, Reg<u32, _PRIVCR>>[src]

pub fn priv_(&self) -> PRIV_R[src]

Bit 15 - PRIV

pub fn initpriv(&self) -> INITPRIV_R[src]

Bit 14 - INITPRIV

pub fn calpriv(&self) -> CALPRIV_R[src]

Bit 13 - CALPRIV

pub fn tspriv(&self) -> TSPRIV_R[src]

Bit 3 - TSPRIV

pub fn wutpriv(&self) -> WUTPRIV_R[src]

Bit 2 - WUTPRIV

pub fn alrbpriv(&self) -> ALRBPRIV_R[src]

Bit 1 - ALRBPRIV

pub fn alrapriv(&self) -> ALRAPRIV_R[src]

Bit 0 - ALRAPRIV

impl R<u32, Reg<u32, _SMCR>>[src]

pub fn decprot(&self) -> DECPROT_R[src]

Bit 15 - DECPROT

pub fn initdprot(&self) -> INITDPROT_R[src]

Bit 14 - INITDPROT

pub fn caldprot(&self) -> CALDPROT_R[src]

Bit 13 - CALDPROT

pub fn tsdprot(&self) -> TSDPROT_R[src]

Bit 3 - TSDPROT

pub fn wutdprot(&self) -> WUTDPROT_R[src]

Bit 2 - WUTDPROT

pub fn alrbdprot(&self) -> ALRBDPROT_R[src]

Bit 1 - ALRBDPROT

pub fn alradprot(&self) -> ALRADPROT_R[src]

Bit 0 - ALRADPROT

impl R<u32, Reg<u32, _CALR>>[src]

pub fn calp(&self) -> CALP_R[src]

Bit 15 - Increase frequency of RTC by 488.5 ppm

pub fn calw8(&self) -> CALW8_R[src]

Bit 14 - Use an 8-second calibration cycle period

pub fn calw16(&self) -> CALW16_R[src]

Bit 13 - Use a 16-second calibration cycle period

pub fn lpcal(&self) -> LPCAL_R[src]

Bit 12 - LPCAL

pub fn calm(&self) -> CALM_R[src]

Bits 0:8 - Calibration minus

impl R<u32, Reg<u32, _TSTR>>[src]

pub fn su(&self) -> SU_R[src]

Bits 0:3 - Second units in BCD format

pub fn st(&self) -> ST_R[src]

Bits 4:6 - Second tens in BCD format

pub fn mnu(&self) -> MNU_R[src]

Bits 8:11 - Minute units in BCD format

pub fn mnt(&self) -> MNT_R[src]

Bits 12:14 - Minute tens in BCD format

pub fn hu(&self) -> HU_R[src]

Bits 16:19 - Hour units in BCD format

pub fn ht(&self) -> HT_R[src]

Bits 20:21 - Hour tens in BCD format

pub fn pm(&self) -> PM_R[src]

Bit 22 - AM/PM notation

impl R<u32, Reg<u32, _TSDR>>[src]

pub fn wdu(&self) -> WDU_R[src]

Bits 13:15 - Week day units

pub fn mt(&self) -> MT_R[src]

Bit 12 - Month tens in BCD format

pub fn mu(&self) -> MU_R[src]

Bits 8:11 - Month units in BCD format

pub fn dt(&self) -> DT_R[src]

Bits 4:5 - Date tens in BCD format

pub fn du(&self) -> DU_R[src]

Bits 0:3 - Date units in BCD format

impl R<u32, Reg<u32, _TSSSR>>[src]

pub fn ss(&self) -> SS_R[src]

Bits 0:15 - Sub second value

impl R<u32, Reg<u32, _ALRMAR>>[src]

pub fn msk4(&self) -> MSK4_R[src]

Bit 31 - Alarm A date mask

pub fn wdsel(&self) -> WDSEL_R[src]

Bit 30 - Week day selection

pub fn dt(&self) -> DT_R[src]

Bits 28:29 - Date tens in BCD format

pub fn du(&self) -> DU_R[src]

Bits 24:27 - Date units or day in BCD format

pub fn msk3(&self) -> MSK3_R[src]

Bit 23 - Alarm A hours mask

pub fn pm(&self) -> PM_R[src]

Bit 22 - AM/PM notation

pub fn ht(&self) -> HT_R[src]

Bits 20:21 - Hour tens in BCD format

pub fn hu(&self) -> HU_R[src]

Bits 16:19 - Hour units in BCD format

pub fn msk2(&self) -> MSK2_R[src]

Bit 15 - Alarm A minutes mask

pub fn mnt(&self) -> MNT_R[src]

Bits 12:14 - Minute tens in BCD format

pub fn mnu(&self) -> MNU_R[src]

Bits 8:11 - Minute units in BCD format

pub fn msk1(&self) -> MSK1_R[src]

Bit 7 - Alarm A seconds mask

pub fn st(&self) -> ST_R[src]

Bits 4:6 - Second tens in BCD format

pub fn su(&self) -> SU_R[src]

Bits 0:3 - Second units in BCD format

impl R<u32, Reg<u32, _ALRMASSR>>[src]

pub fn maskss(&self) -> MASKSS_R[src]

Bits 24:27 - Mask the most-significant bits starting at this bit

pub fn ss(&self) -> SS_R[src]

Bits 0:14 - Sub seconds value

impl R<u32, Reg<u32, _ALRMBR>>[src]

pub fn msk4(&self) -> MSK4_R[src]

Bit 31 - Alarm B date mask

pub fn wdsel(&self) -> WDSEL_R[src]

Bit 30 - Week day selection

pub fn dt(&self) -> DT_R[src]

Bits 28:29 - Date tens in BCD format

pub fn du(&self) -> DU_R[src]

Bits 24:27 - Date units or day in BCD format

pub fn msk3(&self) -> MSK3_R[src]

Bit 23 - Alarm B hours mask

pub fn pm(&self) -> PM_R[src]

Bit 22 - AM/PM notation

pub fn ht(&self) -> HT_R[src]

Bits 20:21 - Hour tens in BCD format

pub fn hu(&self) -> HU_R[src]

Bits 16:19 - Hour units in BCD format

pub fn msk2(&self) -> MSK2_R[src]

Bit 15 - Alarm B minutes mask

pub fn mnt(&self) -> MNT_R[src]

Bits 12:14 - Minute tens in BCD format

pub fn mnu(&self) -> MNU_R[src]

Bits 8:11 - Minute units in BCD format

pub fn msk1(&self) -> MSK1_R[src]

Bit 7 - Alarm B seconds mask

pub fn st(&self) -> ST_R[src]

Bits 4:6 - Second tens in BCD format

pub fn su(&self) -> SU_R[src]

Bits 0:3 - Second units in BCD format

impl R<u32, Reg<u32, _ALRMBSSR>>[src]

pub fn maskss(&self) -> MASKSS_R[src]

Bits 24:27 - Mask the most-significant bits starting at this bit

pub fn ss(&self) -> SS_R[src]

Bits 0:14 - Sub seconds value

impl R<u32, Reg<u32, _SR>>[src]

pub fn alraf(&self) -> ALRAF_R[src]

Bit 0 - ALRAF

pub fn alrbf(&self) -> ALRBF_R[src]

Bit 1 - ALRBF

pub fn wutf(&self) -> WUTF_R[src]

Bit 2 - WUTF

pub fn tsf(&self) -> TSF_R[src]

Bit 3 - TSF

pub fn tsovf(&self) -> TSOVF_R[src]

Bit 4 - TSOVF

pub fn itsf(&self) -> ITSF_R[src]

Bit 5 - ITSF

impl R<u32, Reg<u32, _MISR>>[src]

pub fn alramf(&self) -> ALRAMF_R[src]

Bit 0 - ALRAMF

pub fn alrbmf(&self) -> ALRBMF_R[src]

Bit 1 - ALRBMF

pub fn wutmf(&self) -> WUTMF_R[src]

Bit 2 - WUTMF

pub fn tsmf(&self) -> TSMF_R[src]

Bit 3 - TSMF

pub fn tsovmf(&self) -> TSOVMF_R[src]

Bit 4 - TSOVMF

pub fn itsmf(&self) -> ITSMF_R[src]

Bit 5 - ITSMF

impl R<u32, Reg<u32, _SMISR>>[src]

pub fn alramf(&self) -> ALRAMF_R[src]

Bit 0 - ALRAMF

pub fn alrbmf(&self) -> ALRBMF_R[src]

Bit 1 - ALRBMF

pub fn wutmf(&self) -> WUTMF_R[src]

Bit 2 - WUTMF

pub fn tsmf(&self) -> TSMF_R[src]

Bit 3 - TSMF

pub fn tsovmf(&self) -> TSOVMF_R[src]

Bit 4 - TSOVMF

pub fn itsmf(&self) -> ITSMF_R[src]

Bit 5 - ITSMF

impl R<u32, Reg<u32, _BCR1>>[src]

pub fn mcjdiv(&self) -> MCJDIV_R[src]

Bits 20:23 - Master clock divider

pub fn nodiv(&self) -> NODIV_R[src]

Bit 19 - No divider

pub fn dmaen(&self) -> DMAEN_R[src]

Bit 17 - DMA enable

pub fn saiben(&self) -> SAIBEN_R[src]

Bit 16 - Audio block B enable

pub fn out_dri(&self) -> OUTDRI_R[src]

Bit 13 - Output drive

pub fn mono(&self) -> MONO_R[src]

Bit 12 - Mono mode

pub fn syncen(&self) -> SYNCEN_R[src]

Bits 10:11 - Synchronization enable

pub fn ckstr(&self) -> CKSTR_R[src]

Bit 9 - Clock strobing edge

pub fn lsbfirst(&self) -> LSBFIRST_R[src]

Bit 8 - Least significant bit first

pub fn ds(&self) -> DS_R[src]

Bits 5:7 - Data size

pub fn prtcfg(&self) -> PRTCFG_R[src]

Bits 2:3 - Protocol configuration

pub fn mode(&self) -> MODE_R[src]

Bits 0:1 - Audio block mode

pub fn osr(&self) -> OSR_R[src]

Bit 26 - Oversampling ratio for master clock

impl R<u32, Reg<u32, _BCR2>>[src]

pub fn comp(&self) -> COMP_R[src]

Bits 14:15 - Companding mode

pub fn cpl(&self) -> CPL_R[src]

Bit 13 - Complement bit

pub fn mutecn(&self) -> MUTECN_R[src]

Bits 7:12 - Mute counter

pub fn muteval(&self) -> MUTEVAL_R[src]

Bit 6 - Mute value

pub fn mute(&self) -> MUTE_R[src]

Bit 5 - Mute

pub fn tris(&self) -> TRIS_R[src]

Bit 4 - Tristate management on data line

pub fn fflus(&self) -> FFLUS_R[src]

Bit 3 - FIFO flush

pub fn fth(&self) -> FTH_R[src]

Bits 0:2 - FIFO threshold

impl R<u32, Reg<u32, _BFRCR>>[src]

pub fn fsoff(&self) -> FSOFF_R[src]

Bit 18 - Frame synchronization offset

pub fn fspol(&self) -> FSPOL_R[src]

Bit 17 - Frame synchronization polarity

pub fn fsdef(&self) -> FSDEF_R[src]

Bit 16 - Frame synchronization definition

pub fn fsall(&self) -> FSALL_R[src]

Bits 8:14 - Frame synchronization active level length

pub fn frl(&self) -> FRL_R[src]

Bits 0:7 - Frame length

impl R<u32, Reg<u32, _BSLOTR>>[src]

pub fn sloten(&self) -> SLOTEN_R[src]

Bits 16:31 - Slot enable

pub fn nbslot(&self) -> NBSLOT_R[src]

Bits 8:11 - Number of slots in an audio frame

pub fn slotsz(&self) -> SLOTSZ_R[src]

Bits 6:7 - Slot size

pub fn fboff(&self) -> FBOFF_R[src]

Bits 0:4 - First bit offset

impl R<u32, Reg<u32, _BIM>>[src]

pub fn lfsdetie(&self) -> LFSDETIE_R[src]

Bit 6 - Late frame synchronization detection interrupt enable

pub fn afsdetie(&self) -> AFSDETIE_R[src]

Bit 5 - Anticipated frame synchronization detection interrupt enable

pub fn cnrdyie(&self) -> CNRDYIE_R[src]

Bit 4 - Codec not ready interrupt enable

pub fn freqie(&self) -> FREQIE_R[src]

Bit 3 - FIFO request interrupt enable

pub fn wckcfg(&self) -> WCKCFG_R[src]

Bit 2 - Wrong clock configuration interrupt enable

pub fn mutedet(&self) -> MUTEDET_R[src]

Bit 1 - Mute detection interrupt enable

pub fn ovrudrie(&self) -> OVRUDRIE_R[src]

Bit 0 - Overrun/underrun interrupt enable

impl R<u32, Reg<u32, _BSR>>[src]

pub fn flvl(&self) -> FLVL_R[src]

Bits 16:18 - FIFO level threshold

pub fn lfsdet(&self) -> LFSDET_R[src]

Bit 6 - Late frame synchronization detection

pub fn afsdet(&self) -> AFSDET_R[src]

Bit 5 - Anticipated frame synchronization detection

pub fn cnrdy(&self) -> CNRDY_R[src]

Bit 4 - Codec not ready

pub fn freq(&self) -> FREQ_R[src]

Bit 3 - FIFO request

pub fn wckcfg(&self) -> WCKCFG_R[src]

Bit 2 - Wrong clock configuration flag

pub fn mutedet(&self) -> MUTEDET_R[src]

Bit 1 - Mute detection

pub fn ovrudr(&self) -> OVRUDR_R[src]

Bit 0 - Overrun / underrun

impl R<u32, Reg<u32, _BDR>>[src]

pub fn data(&self) -> DATA_R[src]

Bits 0:31 - Data

impl R<u32, Reg<u32, _ACR1>>[src]

pub fn mcjdiv(&self) -> MCJDIV_R[src]

Bits 20:23 - Master clock divider

pub fn nodiv(&self) -> NODIV_R[src]

Bit 19 - No divider

pub fn dmaen(&self) -> DMAEN_R[src]

Bit 17 - DMA enable

pub fn saiaen(&self) -> SAIAEN_R[src]

Bit 16 - Audio block A enable

pub fn out_dri(&self) -> OUTDRI_R[src]

Bit 13 - Output drive

pub fn mono(&self) -> MONO_R[src]

Bit 12 - Mono mode

pub fn syncen(&self) -> SYNCEN_R[src]

Bits 10:11 - Synchronization enable

pub fn ckstr(&self) -> CKSTR_R[src]

Bit 9 - Clock strobing edge

pub fn lsbfirst(&self) -> LSBFIRST_R[src]

Bit 8 - Least significant bit first

pub fn ds(&self) -> DS_R[src]

Bits 5:7 - Data size

pub fn prtcfg(&self) -> PRTCFG_R[src]

Bits 2:3 - Protocol configuration

pub fn mode(&self) -> MODE_R[src]

Bits 0:1 - Audio block mode

pub fn osr(&self) -> OSR_R[src]

Bit 26 - OSR

impl R<u32, Reg<u32, _ACR2>>[src]

pub fn comp(&self) -> COMP_R[src]

Bits 14:15 - Companding mode

pub fn cpl(&self) -> CPL_R[src]

Bit 13 - Complement bit

pub fn mutecn(&self) -> MUTECN_R[src]

Bits 7:12 - Mute counter

pub fn muteval(&self) -> MUTEVAL_R[src]

Bit 6 - Mute value

pub fn mute(&self) -> MUTE_R[src]

Bit 5 - Mute

pub fn tris(&self) -> TRIS_R[src]

Bit 4 - Tristate management on data line

pub fn fflus(&self) -> FFLUS_R[src]

Bit 3 - FIFO flush

pub fn fth(&self) -> FTH_R[src]

Bits 0:2 - FIFO threshold

impl R<u32, Reg<u32, _AFRCR>>[src]

pub fn fsoff(&self) -> FSOFF_R[src]

Bit 18 - Frame synchronization offset

pub fn fspol(&self) -> FSPOL_R[src]

Bit 17 - Frame synchronization polarity

pub fn fsdef(&self) -> FSDEF_R[src]

Bit 16 - Frame synchronization definition

pub fn fsall(&self) -> FSALL_R[src]

Bits 8:14 - Frame synchronization active level length

pub fn frl(&self) -> FRL_R[src]

Bits 0:7 - Frame length

impl R<u32, Reg<u32, _ASLOTR>>[src]

pub fn sloten(&self) -> SLOTEN_R[src]

Bits 16:31 - Slot enable

pub fn nbslot(&self) -> NBSLOT_R[src]

Bits 8:11 - Number of slots in an audio frame

pub fn slotsz(&self) -> SLOTSZ_R[src]

Bits 6:7 - Slot size

pub fn fboff(&self) -> FBOFF_R[src]

Bits 0:4 - First bit offset

impl R<u32, Reg<u32, _AIM>>[src]

pub fn lfsdet(&self) -> LFSDET_R[src]

Bit 6 - Late frame synchronization detection interrupt enable

pub fn afsdetie(&self) -> AFSDETIE_R[src]

Bit 5 - Anticipated frame synchronization detection interrupt enable

pub fn cnrdyie(&self) -> CNRDYIE_R[src]

Bit 4 - Codec not ready interrupt enable

pub fn freqie(&self) -> FREQIE_R[src]

Bit 3 - FIFO request interrupt enable

pub fn wckcfg(&self) -> WCKCFG_R[src]

Bit 2 - Wrong clock configuration interrupt enable

pub fn mutedet(&self) -> MUTEDET_R[src]

Bit 1 - Mute detection interrupt enable

pub fn ovrudrie(&self) -> OVRUDRIE_R[src]

Bit 0 - Overrun/underrun interrupt enable

impl R<u32, Reg<u32, _ASR>>[src]

pub fn flvl(&self) -> FLVL_R[src]

Bits 16:18 - FIFO level threshold

pub fn lfsdet(&self) -> LFSDET_R[src]

Bit 6 - Late frame synchronization detection

pub fn afsdet(&self) -> AFSDET_R[src]

Bit 5 - Anticipated frame synchronization detection

pub fn cnrdy(&self) -> CNRDY_R[src]

Bit 4 - Codec not ready

pub fn freq(&self) -> FREQ_R[src]

Bit 3 - FIFO request

pub fn wckcfg(&self) -> WCKCFG_R[src]

Bit 2 - Wrong clock configuration flag. This bit is read only

pub fn mutedet(&self) -> MUTEDET_R[src]

Bit 1 - Mute detection

pub fn ovrudr(&self) -> OVRUDR_R[src]

Bit 0 - Overrun / underrun

impl R<u32, Reg<u32, _ACLRFR>>[src]

pub fn lfsdet(&self) -> LFSDET_R[src]

Bit 6 - Clear late frame synchronization detection flag

pub fn cafsdet(&self) -> CAFSDET_R[src]

Bit 5 - Clear anticipated frame synchronization detection flag

pub fn cnrdy(&self) -> CNRDY_R[src]

Bit 4 - Clear codec not ready flag

pub fn wckcfg(&self) -> WCKCFG_R[src]

Bit 2 - Clear wrong clock configuration flag

pub fn mutedet(&self) -> MUTEDET_R[src]

Bit 1 - Mute detection flag

pub fn ovrudr(&self) -> OVRUDR_R[src]

Bit 0 - Clear overrun / underrun

impl R<u32, Reg<u32, _ADR>>[src]

pub fn data(&self) -> DATA_R[src]

Bits 0:31 - Data

impl R<u32, Reg<u32, _GCR>>[src]

pub fn syncin(&self) -> SYNCIN_R[src]

Bits 0:1 - Synchronization inputs

pub fn syncout(&self) -> SYNCOUT_R[src]

Bits 4:5 - Synchronization outputs

impl R<u32, Reg<u32, _PDMCR>>[src]

pub fn pdmen(&self) -> PDMEN_R[src]

Bit 0 - PDM enable

pub fn micnbr(&self) -> MICNBR_R[src]

Bits 4:5 - MICNBR

pub fn cken1(&self) -> CKEN1_R[src]

Bit 8 - Clock enable of bitstream clock number 1

pub fn cken2(&self) -> CKEN2_R[src]

Bit 9 - CKEN2

impl R<u32, Reg<u32, _PDMDLY>>[src]

pub fn dlym1l(&self) -> DLYM1L_R[src]

Bits 0:2 - Delay line adjust for first microphone of pair 1

pub fn dlym1r(&self) -> DLYM1R_R[src]

Bits 4:6 - Delay line adjust for second microphone of pair 1

pub fn dlym2l(&self) -> DLYM2L_R[src]

Bits 8:10 - Delay line for first microphone of pair 2

pub fn dlym2r(&self) -> DLYM2R_R[src]

Bits 12:14 - Delay line for second microphone of pair 2

pub fn dlym3l(&self) -> DLYM3L_R[src]

Bits 16:18 - DLYM3L

pub fn dlym3r(&self) -> DLYM3R_R[src]

Bits 20:22 - DLYM3R

pub fn dlym4l(&self) -> DLYM4L_R[src]

Bits 24:26 - DLYM4L

pub fn dlym4r(&self) -> DLYM4R_R[src]

Bits 28:30 - DLYM4R

impl R<u32, Reg<u32, _ISR>>[src]

pub fn teif7(&self) -> TEIF7_R[src]

Bit 27 - Channel x transfer error flag (x = 1 ..7)

pub fn htif7(&self) -> HTIF7_R[src]

Bit 26 - Channel x half transfer flag (x = 1 ..7)

pub fn tcif7(&self) -> TCIF7_R[src]

Bit 25 - Channel x transfer complete flag (x = 1 ..7)

pub fn gif7(&self) -> GIF7_R[src]

Bit 24 - Channel x global interrupt flag (x = 1 ..7)

pub fn teif6(&self) -> TEIF6_R[src]

Bit 23 - Channel x transfer error flag (x = 1 ..7)

pub fn htif6(&self) -> HTIF6_R[src]

Bit 22 - Channel x half transfer flag (x = 1 ..7)

pub fn tcif6(&self) -> TCIF6_R[src]

Bit 21 - Channel x transfer complete flag (x = 1 ..7)

pub fn gif6(&self) -> GIF6_R[src]

Bit 20 - Channel x global interrupt flag (x = 1 ..7)

pub fn teif5(&self) -> TEIF5_R[src]

Bit 19 - Channel x transfer error flag (x = 1 ..7)

pub fn htif5(&self) -> HTIF5_R[src]

Bit 18 - Channel x half transfer flag (x = 1 ..7)

pub fn tcif5(&self) -> TCIF5_R[src]

Bit 17 - Channel x transfer complete flag (x = 1 ..7)

pub fn gif5(&self) -> GIF5_R[src]

Bit 16 - Channel x global interrupt flag (x = 1 ..7)

pub fn teif4(&self) -> TEIF4_R[src]

Bit 15 - Channel x transfer error flag (x = 1 ..7)

pub fn htif4(&self) -> HTIF4_R[src]

Bit 14 - Channel x half transfer flag (x = 1 ..7)

pub fn tcif4(&self) -> TCIF4_R[src]

Bit 13 - Channel x transfer complete flag (x = 1 ..7)

pub fn gif4(&self) -> GIF4_R[src]

Bit 12 - Channel x global interrupt flag (x = 1 ..7)

pub fn teif3(&self) -> TEIF3_R[src]

Bit 11 - Channel x transfer error flag (x = 1 ..7)

pub fn htif3(&self) -> HTIF3_R[src]

Bit 10 - Channel x half transfer flag (x = 1 ..7)

pub fn tcif3(&self) -> TCIF3_R[src]

Bit 9 - Channel x transfer complete flag (x = 1 ..7)

pub fn gif3(&self) -> GIF3_R[src]

Bit 8 - Channel x global interrupt flag (x = 1 ..7)

pub fn teif2(&self) -> TEIF2_R[src]

Bit 7 - Channel x transfer error flag (x = 1 ..7)

pub fn htif2(&self) -> HTIF2_R[src]

Bit 6 - Channel x half transfer flag (x = 1 ..7)

pub fn tcif2(&self) -> TCIF2_R[src]

Bit 5 - Channel x transfer complete flag (x = 1 ..7)

pub fn gif2(&self) -> GIF2_R[src]

Bit 4 - Channel x global interrupt flag (x = 1 ..7)

pub fn teif1(&self) -> TEIF1_R[src]

Bit 3 - Channel x transfer error flag (x = 1 ..7)

pub fn htif1(&self) -> HTIF1_R[src]

Bit 2 - Channel x half transfer flag (x = 1 ..7)

pub fn tcif1(&self) -> TCIF1_R[src]

Bit 1 - Channel x transfer complete flag (x = 1 ..7)

pub fn gif1(&self) -> GIF1_R[src]

Bit 0 - Channel x global interrupt flag (x = 1 ..7)

pub fn gif8(&self) -> GIF8_R[src]

Bit 28 - global interrupt flag for channel 8

pub fn tcif8(&self) -> TCIF8_R[src]

Bit 29 - transfer complete (TC) flag for channel 8

pub fn htif8(&self) -> HTIF8_R[src]

Bit 30 - half transfer (HT) flag for channel 8

pub fn teif8(&self) -> TEIF8_R[src]

Bit 31 - transfer error (TE) flag for channel 8

impl R<u32, Reg<u32, _CCR1>>[src]

pub fn mem2mem(&self) -> MEM2MEM_R[src]

Bit 14 - Memory to memory mode

pub fn pl(&self) -> PL_R[src]

Bits 12:13 - Channel priority level

pub fn msize(&self) -> MSIZE_R[src]

Bits 10:11 - Memory size

pub fn psize(&self) -> PSIZE_R[src]

Bits 8:9 - Peripheral size

pub fn minc(&self) -> MINC_R[src]

Bit 7 - Memory increment mode

pub fn pinc(&self) -> PINC_R[src]

Bit 6 - Peripheral increment mode

pub fn circ(&self) -> CIRC_R[src]

Bit 5 - Circular mode

pub fn dir(&self) -> DIR_R[src]

Bit 4 - Data transfer direction

pub fn teie(&self) -> TEIE_R[src]

Bit 3 - Transfer error interrupt enable

pub fn htie(&self) -> HTIE_R[src]

Bit 2 - Half transfer interrupt enable

pub fn tcie(&self) -> TCIE_R[src]

Bit 1 - Transfer complete interrupt enable

pub fn en(&self) -> EN_R[src]

Bit 0 - Channel enable

pub fn dbm(&self) -> DBM_R[src]

Bit 15 - double-buffer mode

pub fn ct(&self) -> CT_R[src]

Bit 16 - current target memory of DMA transfer in double-buffer mode

pub fn secm(&self) -> SECM_R[src]

Bit 17 - secure mode

pub fn ssec(&self) -> SSEC_R[src]

Bit 18 - security of the DMA transfer from the source

pub fn dsec(&self) -> DSEC_R[src]

Bit 19 - security of the DMA transfer to the destination

pub fn priv_(&self) -> PRIV_R[src]

Bit 20 - privileged mode

impl R<u32, Reg<u32, _CNDTR1>>[src]

pub fn ndt(&self) -> NDT_R[src]

Bits 0:17 - Number of data to transfer

impl R<u32, Reg<u32, _CPAR1>>[src]

pub fn pa(&self) -> PA_R[src]

Bits 0:31 - Peripheral address

impl R<u32, Reg<u32, _CM0AR1>>[src]

pub fn ma(&self) -> MA_R[src]

Bits 0:31 - Memory address

impl R<u32, Reg<u32, _CM1AR1>>[src]

pub fn mem2mem(&self) -> MEM2MEM_R[src]

Bit 14 - Memory to memory mode

pub fn pl(&self) -> PL_R[src]

Bits 12:13 - Channel priority level

pub fn msize(&self) -> MSIZE_R[src]

Bits 10:11 - Memory size

pub fn psize(&self) -> PSIZE_R[src]

Bits 8:9 - Peripheral size

pub fn minc(&self) -> MINC_R[src]

Bit 7 - Memory increment mode

pub fn pinc(&self) -> PINC_R[src]

Bit 6 - Peripheral increment mode

pub fn circ(&self) -> CIRC_R[src]

Bit 5 - Circular mode

pub fn dir(&self) -> DIR_R[src]

Bit 4 - Data transfer direction

pub fn teie(&self) -> TEIE_R[src]

Bit 3 - Transfer error interrupt enable

pub fn htie(&self) -> HTIE_R[src]

Bit 2 - Half transfer interrupt enable

pub fn tcie(&self) -> TCIE_R[src]

Bit 1 - Transfer complete interrupt enable

pub fn en(&self) -> EN_R[src]

Bit 0 - Channel enable

pub fn dbm(&self) -> DBM_R[src]

Bit 15 - double-buffer mode

pub fn ct(&self) -> CT_R[src]

Bit 16 - current target memory of DMA transfer in double-buffer mode

pub fn secm(&self) -> SECM_R[src]

Bit 17 - secure mode

pub fn ssec(&self) -> SSEC_R[src]

Bit 18 - security of the DMA transfer from the source

pub fn dsec(&self) -> DSEC_R[src]

Bit 19 - security of the DMA transfer to the destination

pub fn priv_(&self) -> PRIV_R[src]

Bit 20 - privileged mode

impl R<u32, Reg<u32, _CCR2>>[src]

pub fn ndt(&self) -> NDT_R[src]

Bits 0:17 - Number of data to transfer

impl R<u32, Reg<u32, _CNDTR2>>[src]

pub fn pa(&self) -> PA_R[src]

Bits 0:31 - Peripheral address

impl R<u32, Reg<u32, _CPAR2>>[src]

pub fn ma(&self) -> MA_R[src]

Bits 0:31 - Memory address

impl R<u32, Reg<u32, _CM0AR2>>[src]

pub fn mem2mem(&self) -> MEM2MEM_R[src]

Bit 14 - Memory to memory mode

pub fn pl(&self) -> PL_R[src]

Bits 12:13 - Channel priority level

pub fn msize(&self) -> MSIZE_R[src]

Bits 10:11 - Memory size

pub fn psize(&self) -> PSIZE_R[src]

Bits 8:9 - Peripheral size

pub fn minc(&self) -> MINC_R[src]

Bit 7 - Memory increment mode

pub fn pinc(&self) -> PINC_R[src]

Bit 6 - Peripheral increment mode

pub fn circ(&self) -> CIRC_R[src]

Bit 5 - Circular mode

pub fn dir(&self) -> DIR_R[src]

Bit 4 - Data transfer direction

pub fn teie(&self) -> TEIE_R[src]

Bit 3 - Transfer error interrupt enable

pub fn htie(&self) -> HTIE_R[src]

Bit 2 - Half transfer interrupt enable

pub fn tcie(&self) -> TCIE_R[src]

Bit 1 - Transfer complete interrupt enable

pub fn en(&self) -> EN_R[src]

Bit 0 - Channel enable

pub fn dbm(&self) -> DBM_R[src]

Bit 15 - double-buffer mode

pub fn ct(&self) -> CT_R[src]

Bit 16 - current target memory of DMA transfer in double-buffer mode

pub fn secm(&self) -> SECM_R[src]

Bit 17 - secure mode

pub fn ssec(&self) -> SSEC_R[src]

Bit 18 - security of the DMA transfer from the source

pub fn dsec(&self) -> DSEC_R[src]

Bit 19 - security of the DMA transfer to the destination

pub fn priv_(&self) -> PRIV_R[src]

Bit 20 - privileged mode

impl R<u32, Reg<u32, _CM1AR2>>[src]

pub fn ndt(&self) -> NDT_R[src]

Bits 0:17 - Number of data to transfer

impl R<u32, Reg<u32, _CCR3>>[src]

pub fn pa(&self) -> PA_R[src]

Bits 0:31 - Peripheral address

impl R<u32, Reg<u32, _CNDTR3>>[src]

pub fn ma(&self) -> MA_R[src]

Bits 0:31 - Memory address

impl R<u32, Reg<u32, _CPAR3>>[src]

pub fn mem2mem(&self) -> MEM2MEM_R[src]

Bit 14 - Memory to memory mode

pub fn pl(&self) -> PL_R[src]

Bits 12:13 - Channel priority level

pub fn msize(&self) -> MSIZE_R[src]

Bits 10:11 - Memory size

pub fn psize(&self) -> PSIZE_R[src]

Bits 8:9 - Peripheral size

pub fn minc(&self) -> MINC_R[src]

Bit 7 - Memory increment mode

pub fn pinc(&self) -> PINC_R[src]

Bit 6 - Peripheral increment mode

pub fn circ(&self) -> CIRC_R[src]

Bit 5 - Circular mode

pub fn dir(&self) -> DIR_R[src]

Bit 4 - Data transfer direction

pub fn teie(&self) -> TEIE_R[src]

Bit 3 - Transfer error interrupt enable

pub fn htie(&self) -> HTIE_R[src]

Bit 2 - Half transfer interrupt enable

pub fn tcie(&self) -> TCIE_R[src]

Bit 1 - Transfer complete interrupt enable

pub fn en(&self) -> EN_R[src]

Bit 0 - Channel enable

pub fn dbm(&self) -> DBM_R[src]

Bit 15 - double-buffer mode

pub fn ct(&self) -> CT_R[src]

Bit 16 - current target memory of DMA transfer in double-buffer mode

pub fn secm(&self) -> SECM_R[src]

Bit 17 - secure mode

pub fn ssec(&self) -> SSEC_R[src]

Bit 18 - security of the DMA transfer from the source

pub fn dsec(&self) -> DSEC_R[src]

Bit 19 - security of the DMA transfer to the destination

pub fn priv_(&self) -> PRIV_R[src]

Bit 20 - privileged mode

impl R<u32, Reg<u32, _CM0AR3>>[src]

pub fn ndt(&self) -> NDT_R[src]

Bits 0:17 - Number of data to transfer

impl R<u32, Reg<u32, _CM1AR3>>[src]

pub fn pa(&self) -> PA_R[src]

Bits 0:31 - Peripheral address

impl R<u32, Reg<u32, _CCR4>>[src]

pub fn ma(&self) -> MA_R[src]

Bits 0:31 - Memory address

impl R<u32, Reg<u32, _CNDTR4>>[src]

pub fn mem2mem(&self) -> MEM2MEM_R[src]

Bit 14 - Memory to memory mode

pub fn pl(&self) -> PL_R[src]

Bits 12:13 - Channel priority level

pub fn msize(&self) -> MSIZE_R[src]

Bits 10:11 - Memory size

pub fn psize(&self) -> PSIZE_R[src]

Bits 8:9 - Peripheral size

pub fn minc(&self) -> MINC_R[src]

Bit 7 - Memory increment mode

pub fn pinc(&self) -> PINC_R[src]

Bit 6 - Peripheral increment mode

pub fn circ(&self) -> CIRC_R[src]

Bit 5 - Circular mode

pub fn dir(&self) -> DIR_R[src]

Bit 4 - Data transfer direction

pub fn teie(&self) -> TEIE_R[src]

Bit 3 - Transfer error interrupt enable

pub fn htie(&self) -> HTIE_R[src]

Bit 2 - Half transfer interrupt enable

pub fn tcie(&self) -> TCIE_R[src]

Bit 1 - Transfer complete interrupt enable

pub fn en(&self) -> EN_R[src]

Bit 0 - Channel enable

pub fn dbm(&self) -> DBM_R[src]

Bit 15 - double-buffer mode

pub fn ct(&self) -> CT_R[src]

Bit 16 - current target memory of DMA transfer in double-buffer mode

pub fn secm(&self) -> SECM_R[src]

Bit 17 - secure mode

pub fn ssec(&self) -> SSEC_R[src]

Bit 18 - security of the DMA transfer from the source

pub fn dsec(&self) -> DSEC_R[src]

Bit 19 - security of the DMA transfer to the destination

pub fn priv_(&self) -> PRIV_R[src]

Bit 20 - privileged mode

impl R<u32, Reg<u32, _CPAR4>>[src]

pub fn ndt(&self) -> NDT_R[src]

Bits 0:17 - Number of data to transfer

impl R<u32, Reg<u32, _CM0AR4>>[src]

pub fn pa(&self) -> PA_R[src]

Bits 0:31 - Peripheral address

impl R<u32, Reg<u32, _CM1AR4>>[src]

pub fn ma(&self) -> MA_R[src]

Bits 0:31 - Memory address

impl R<u32, Reg<u32, _CCR5>>[src]

pub fn mem2mem(&self) -> MEM2MEM_R[src]

Bit 14 - Memory to memory mode

pub fn pl(&self) -> PL_R[src]

Bits 12:13 - Channel priority level

pub fn msize(&self) -> MSIZE_R[src]

Bits 10:11 - Memory size

pub fn psize(&self) -> PSIZE_R[src]

Bits 8:9 - Peripheral size

pub fn minc(&self) -> MINC_R[src]

Bit 7 - Memory increment mode

pub fn pinc(&self) -> PINC_R[src]

Bit 6 - Peripheral increment mode

pub fn circ(&self) -> CIRC_R[src]

Bit 5 - Circular mode

pub fn dir(&self) -> DIR_R[src]

Bit 4 - Data transfer direction

pub fn teie(&self) -> TEIE_R[src]

Bit 3 - Transfer error interrupt enable

pub fn htie(&self) -> HTIE_R[src]

Bit 2 - Half transfer interrupt enable

pub fn tcie(&self) -> TCIE_R[src]

Bit 1 - Transfer complete interrupt enable

pub fn en(&self) -> EN_R[src]

Bit 0 - Channel enable

pub fn dbm(&self) -> DBM_R[src]

Bit 15 - double-buffer mode

pub fn ct(&self) -> CT_R[src]

Bit 16 - current target memory of DMA transfer in double-buffer mode

pub fn secm(&self) -> SECM_R[src]

Bit 17 - secure mode

pub fn ssec(&self) -> SSEC_R[src]

Bit 18 - security of the DMA transfer from the source

pub fn dsec(&self) -> DSEC_R[src]

Bit 19 - security of the DMA transfer to the destination

pub fn priv_(&self) -> PRIV_R[src]

Bit 20 - privileged mode

impl R<u32, Reg<u32, _CNDTR5>>[src]

pub fn ndt(&self) -> NDT_R[src]

Bits 0:17 - Number of data to transfer

impl R<u32, Reg<u32, _CPAR5>>[src]

pub fn pa(&self) -> PA_R[src]

Bits 0:31 - Peripheral address

impl R<u32, Reg<u32, _CM0AR5>>[src]

pub fn ma(&self) -> MA_R[src]

Bits 0:31 - Memory address

impl R<u32, Reg<u32, _CM1AR5>>[src]

pub fn mem2mem(&self) -> MEM2MEM_R[src]

Bit 14 - Memory to memory mode

pub fn pl(&self) -> PL_R[src]

Bits 12:13 - Channel priority level

pub fn msize(&self) -> MSIZE_R[src]

Bits 10:11 - Memory size

pub fn psize(&self) -> PSIZE_R[src]

Bits 8:9 - Peripheral size

pub fn minc(&self) -> MINC_R[src]

Bit 7 - Memory increment mode

pub fn pinc(&self) -> PINC_R[src]

Bit 6 - Peripheral increment mode

pub fn circ(&self) -> CIRC_R[src]

Bit 5 - Circular mode

pub fn dir(&self) -> DIR_R[src]

Bit 4 - Data transfer direction

pub fn teie(&self) -> TEIE_R[src]

Bit 3 - Transfer error interrupt enable

pub fn htie(&self) -> HTIE_R[src]

Bit 2 - Half transfer interrupt enable

pub fn tcie(&self) -> TCIE_R[src]

Bit 1 - Transfer complete interrupt enable

pub fn en(&self) -> EN_R[src]

Bit 0 - Channel enable

pub fn dbm(&self) -> DBM_R[src]

Bit 15 - double-buffer mode

pub fn ct(&self) -> CT_R[src]

Bit 16 - current target memory of DMA transfer in double-buffer mode

pub fn secm(&self) -> SECM_R[src]

Bit 17 - secure mode

pub fn ssec(&self) -> SSEC_R[src]

Bit 18 - security of the DMA transfer from the source

pub fn dsec(&self) -> DSEC_R[src]

Bit 19 - security of the DMA transfer to the destination

pub fn priv_(&self) -> PRIV_R[src]

Bit 20 - privileged mode

impl R<u32, Reg<u32, _CCR6>>[src]

pub fn ndt(&self) -> NDT_R[src]

Bits 0:17 - Number of data to transfer

impl R<u32, Reg<u32, _CNDTR6>>[src]

pub fn pa(&self) -> PA_R[src]

Bits 0:31 - Peripheral address

impl R<u32, Reg<u32, _CPAR6>>[src]

pub fn ma(&self) -> MA_R[src]

Bits 0:31 - Memory address

impl R<u32, Reg<u32, _CM0AR6>>[src]

pub fn c7s(&self) -> C7S_R[src]

Bits 24:27 - DMA channel 7 selection

pub fn c6s(&self) -> C6S_R[src]

Bits 20:23 - DMA channel 6 selection

pub fn c5s(&self) -> C5S_R[src]

Bits 16:19 - DMA channel 5 selection

pub fn c4s(&self) -> C4S_R[src]

Bits 12:15 - DMA channel 4 selection

pub fn c3s(&self) -> C3S_R[src]

Bits 8:11 - DMA channel 3 selection

pub fn c2s(&self) -> C2S_R[src]

Bits 4:7 - DMA channel 2 selection

pub fn c1s(&self) -> C1S_R[src]

Bits 0:3 - DMA channel 1 selection

impl R<u32, Reg<u32, _CM1AR6>>[src]

pub fn ma(&self) -> MA_R[src]

Bits 0:31 - peripheral address

impl R<u32, Reg<u32, _CCR7>>[src]

pub fn ma(&self) -> MA_R[src]

Bits 0:31 - peripheral address

impl R<u32, Reg<u32, _CNDTR7>>[src]

pub fn ma(&self) -> MA_R[src]

Bits 0:31 - peripheral address

impl R<u32, Reg<u32, _CPAR7>>[src]

pub fn ma(&self) -> MA_R[src]

Bits 0:31 - peripheral address

impl R<u32, Reg<u32, _CM0AR7>>[src]

pub fn ma(&self) -> MA_R[src]

Bits 0:31 - peripheral address

impl R<u32, Reg<u32, _CM1AR7>>[src]

pub fn ma(&self) -> MA_R[src]

Bits 0:31 - peripheral address

impl R<u32, Reg<u32, _CCR8>>[src]

pub fn ma(&self) -> MA_R[src]

Bits 0:31 - peripheral address

impl R<u32, Reg<u32, _CNDTR8>>[src]

pub fn en(&self) -> EN_R[src]

Bit 0 - channel enable

pub fn tcie(&self) -> TCIE_R[src]

Bit 1 - transfer complete interrupt enable

pub fn htie(&self) -> HTIE_R[src]

Bit 2 - half transfer interrupt enable

pub fn teie(&self) -> TEIE_R[src]

Bit 3 - transfer error interrupt enable

pub fn dir(&self) -> DIR_R[src]

Bit 4 - data transfer direction

pub fn circ(&self) -> CIRC_R[src]

Bit 5 - circular mode

pub fn pinc(&self) -> PINC_R[src]

Bit 6 - peripheral increment mode

pub fn minc(&self) -> MINC_R[src]

Bit 7 - memory increment mode

pub fn psize(&self) -> PSIZE_R[src]

Bits 8:9 - peripheral size

pub fn msize(&self) -> MSIZE_R[src]

Bits 10:11 - memory size

pub fn pl(&self) -> PL_R[src]

Bits 12:13 - priority level

pub fn mem2mem(&self) -> MEM2MEM_R[src]

Bit 14 - memory-to-memory mode

pub fn dbm(&self) -> DBM_R[src]

Bit 15 - double-buffer mode

pub fn ct(&self) -> CT_R[src]

Bit 16 - current target memory of DMA transfer in double-buffer mode

pub fn secm(&self) -> SECM_R[src]

Bit 17 - secure mode

pub fn ssec(&self) -> SSEC_R[src]

Bit 18 - security of the DMA transfer from the source

pub fn dsec(&self) -> DSEC_R[src]

Bit 19 - security of the DMA transfer to the destination

pub fn priv_(&self) -> PRIV_R[src]

Bit 20 - privileged mode

impl R<u32, Reg<u32, _CPAR8>>[src]

pub fn ndt(&self) -> NDT_R[src]

Bits 0:17 - number of data to transfer

impl R<u32, Reg<u32, _CM0AR8>>[src]

pub fn pa(&self) -> PA_R[src]

Bits 0:31 - peripheral address

impl R<u32, Reg<u32, _CM1AR8>>[src]

pub fn ma(&self) -> MA_R[src]

Bits 0:31 - peripheral address

impl R<u32, Reg<u32, _CSELR>>[src]

pub fn ma(&self) -> MA_R[src]

Bits 0:31 - peripheral address

impl R<u32, Reg<u32, _MPCBB1_CR>>[src]

pub fn lck(&self) -> LCK_R[src]

Bit 0 - LCK

pub fn invsecstate(&self) -> INVSECSTATE_R[src]

Bit 30 - INVSECSTATE

pub fn srwiladis(&self) -> SRWILADIS_R[src]

Bit 31 - SRWILADIS

impl R<u32, Reg<u32, _MPCBB1_LCKVTR1>>[src]

pub fn lcksb0(&self) -> LCKSB0_R[src]

Bit 0 - LCKSB0

pub fn lcksb1(&self) -> LCKSB1_R[src]

Bit 1 - LCKSB1

pub fn lcksb2(&self) -> LCKSB2_R[src]

Bit 2 - LCKSB2

pub fn lcksb3(&self) -> LCKSB3_R[src]

Bit 3 - LCKSB3

pub fn lcksb4(&self) -> LCKSB4_R[src]

Bit 4 - LCKSB4

pub fn lcksb5(&self) -> LCKSB5_R[src]

Bit 5 - LCKSB5

pub fn lcksb6(&self) -> LCKSB6_R[src]

Bit 6 - LCKSB6

pub fn lcksb7(&self) -> LCKSB7_R[src]

Bit 7 - LCKSB7

pub fn lcksb8(&self) -> LCKSB8_R[src]

Bit 8 - LCKSB8

pub fn lcksb9(&self) -> LCKSB9_R[src]

Bit 9 - LCKSB9

pub fn lcksb10(&self) -> LCKSB10_R[src]

Bit 10 - LCKSB10

pub fn lcksb11(&self) -> LCKSB11_R[src]

Bit 11 - LCKSB11

pub fn lcksb12(&self) -> LCKSB12_R[src]

Bit 12 - LCKSB12

pub fn lcksb13(&self) -> LCKSB13_R[src]

Bit 13 - LCKSB13

pub fn lcksb14(&self) -> LCKSB14_R[src]

Bit 14 - LCKSB14

pub fn lcksb15(&self) -> LCKSB15_R[src]

Bit 15 - LCKSB15

pub fn lcksb16(&self) -> LCKSB16_R[src]

Bit 16 - LCKSB16

pub fn lcksb17(&self) -> LCKSB17_R[src]

Bit 17 - LCKSB17

pub fn lcksb18(&self) -> LCKSB18_R[src]

Bit 18 - LCKSB18

pub fn lcksb19(&self) -> LCKSB19_R[src]

Bit 19 - LCKSB19

pub fn lcksb20(&self) -> LCKSB20_R[src]

Bit 20 - LCKSB20

pub fn lcksb21(&self) -> LCKSB21_R[src]

Bit 21 - LCKSB21

pub fn lcksb22(&self) -> LCKSB22_R[src]

Bit 22 - LCKSB22

pub fn lcksb23(&self) -> LCKSB23_R[src]

Bit 23 - LCKSB23

pub fn lcksb24(&self) -> LCKSB24_R[src]

Bit 24 - LCKSB24

pub fn lcksb25(&self) -> LCKSB25_R[src]

Bit 25 - LCKSB25

pub fn lcksb26(&self) -> LCKSB26_R[src]

Bit 26 - LCKSB26

pub fn lcksb27(&self) -> LCKSB27_R[src]

Bit 27 - LCKSB27

pub fn lcksb28(&self) -> LCKSB28_R[src]

Bit 28 - LCKSB28

pub fn lcksb29(&self) -> LCKSB29_R[src]

Bit 29 - LCKSB29

pub fn lcksb30(&self) -> LCKSB30_R[src]

Bit 30 - LCKSB30

pub fn lcksb31(&self) -> LCKSB31_R[src]

Bit 31 - LCKSB31

impl R<u32, Reg<u32, _MPCBB1_LCKVTR2>>[src]

pub fn lcksb32(&self) -> LCKSB32_R[src]

Bit 0 - LCKSB32

pub fn lcksb33(&self) -> LCKSB33_R[src]

Bit 1 - LCKSB33

pub fn lcksb34(&self) -> LCKSB34_R[src]

Bit 2 - LCKSB34

pub fn lcksb35(&self) -> LCKSB35_R[src]

Bit 3 - LCKSB35

pub fn lcksb36(&self) -> LCKSB36_R[src]

Bit 4 - LCKSB36

pub fn lcksb37(&self) -> LCKSB37_R[src]

Bit 5 - LCKSB37

pub fn lcksb38(&self) -> LCKSB38_R[src]

Bit 6 - LCKSB38

pub fn lcksb39(&self) -> LCKSB39_R[src]

Bit 7 - LCKSB39

pub fn lcksb40(&self) -> LCKSB40_R[src]

Bit 8 - LCKSB40

pub fn lcksb41(&self) -> LCKSB41_R[src]

Bit 9 - LCKSB41

pub fn lcksb42(&self) -> LCKSB42_R[src]

Bit 10 - LCKSB42

pub fn lcksb43(&self) -> LCKSB43_R[src]

Bit 11 - LCKSB43

pub fn lcksb44(&self) -> LCKSB44_R[src]

Bit 12 - LCKSB44

pub fn lcksb45(&self) -> LCKSB45_R[src]

Bit 13 - LCKSB45

pub fn lcksb46(&self) -> LCKSB46_R[src]

Bit 14 - LCKSB46

pub fn lcksb47(&self) -> LCKSB47_R[src]

Bit 15 - LCKSB47

pub fn lcksb48(&self) -> LCKSB48_R[src]

Bit 16 - LCKSB48

pub fn lcksb49(&self) -> LCKSB49_R[src]

Bit 17 - LCKSB49

pub fn lcksb50(&self) -> LCKSB50_R[src]

Bit 18 - LCKSB50

pub fn lcksb51(&self) -> LCKSB51_R[src]

Bit 19 - LCKSB51

pub fn lcksb52(&self) -> LCKSB52_R[src]

Bit 20 - LCKSB52

pub fn lcksb53(&self) -> LCKSB53_R[src]

Bit 21 - LCKSB53

pub fn lcksb54(&self) -> LCKSB54_R[src]

Bit 22 - LCKSB54

pub fn lcksb55(&self) -> LCKSB55_R[src]

Bit 23 - LCKSB55

pub fn lcksb56(&self) -> LCKSB56_R[src]

Bit 24 - LCKSB56

pub fn lcksb57(&self) -> LCKSB57_R[src]

Bit 25 - LCKSB57

pub fn lcksb58(&self) -> LCKSB58_R[src]

Bit 26 - LCKSB58

pub fn lcksb59(&self) -> LCKSB59_R[src]

Bit 27 - LCKSB59

pub fn lcksb60(&self) -> LCKSB60_R[src]

Bit 28 - LCKSB60

pub fn lcksb61(&self) -> LCKSB61_R[src]

Bit 29 - LCKSB61

pub fn lcksb62(&self) -> LCKSB62_R[src]

Bit 30 - LCKSB62

pub fn lcksb63(&self) -> LCKSB63_R[src]

Bit 31 - LCKSB63

impl R<u32, Reg<u32, _MPCBB1_VCTR0>>[src]

pub fn b0(&self) -> B0_R[src]

Bit 0 - B0

pub fn b1(&self) -> B1_R[src]

Bit 1 - B1

pub fn b2(&self) -> B2_R[src]

Bit 2 - B2

pub fn b3(&self) -> B3_R[src]

Bit 3 - B3

pub fn b4(&self) -> B4_R[src]

Bit 4 - B4

pub fn b5(&self) -> B5_R[src]

Bit 5 - B5

pub fn b6(&self) -> B6_R[src]

Bit 6 - B6

pub fn b7(&self) -> B7_R[src]

Bit 7 - B7

pub fn b8(&self) -> B8_R[src]

Bit 8 - B8

pub fn b9(&self) -> B9_R[src]

Bit 9 - B9

pub fn b10(&self) -> B10_R[src]

Bit 10 - B10

pub fn b11(&self) -> B11_R[src]

Bit 11 - B11

pub fn b12(&self) -> B12_R[src]

Bit 12 - B12

pub fn b13(&self) -> B13_R[src]

Bit 13 - B13

pub fn b14(&self) -> B14_R[src]

Bit 14 - B14

pub fn b15(&self) -> B15_R[src]

Bit 15 - B15

pub fn b16(&self) -> B16_R[src]

Bit 16 - B16

pub fn b17(&self) -> B17_R[src]

Bit 17 - B17

pub fn b18(&self) -> B18_R[src]

Bit 18 - B18

pub fn b19(&self) -> B19_R[src]

Bit 19 - B19

pub fn b20(&self) -> B20_R[src]

Bit 20 - B20

pub fn b21(&self) -> B21_R[src]

Bit 21 - B21

pub fn b22(&self) -> B22_R[src]

Bit 22 - B22

pub fn b23(&self) -> B23_R[src]

Bit 23 - B23

pub fn b24(&self) -> B24_R[src]

Bit 24 - B24

pub fn b25(&self) -> B25_R[src]

Bit 25 - B25

pub fn b26(&self) -> B26_R[src]

Bit 26 - B26

pub fn b27(&self) -> B27_R[src]

Bit 27 - B27

pub fn b28(&self) -> B28_R[src]

Bit 28 - B28

pub fn b29(&self) -> B29_R[src]

Bit 29 - B29

pub fn b30(&self) -> B30_R[src]

Bit 30 - B30

pub fn b31(&self) -> B31_R[src]

Bit 31 - B31

impl R<u32, Reg<u32, _MPCBB1_VCTR1>>[src]

pub fn b32(&self) -> B32_R[src]

Bit 0 - B32

pub fn b33(&self) -> B33_R[src]

Bit 1 - B33

pub fn b34(&self) -> B34_R[src]

Bit 2 - B34

pub fn b35(&self) -> B35_R[src]

Bit 3 - B35

pub fn b36(&self) -> B36_R[src]

Bit 4 - B36

pub fn b37(&self) -> B37_R[src]

Bit 5 - B37

pub fn b38(&self) -> B38_R[src]

Bit 6 - B38

pub fn b39(&self) -> B39_R[src]

Bit 7 - B39

pub fn b40(&self) -> B40_R[src]

Bit 8 - B40

pub fn b41(&self) -> B41_R[src]

Bit 9 - B41

pub fn b42(&self) -> B42_R[src]

Bit 10 - B42

pub fn b43(&self) -> B43_R[src]

Bit 11 - B43

pub fn b44(&self) -> B44_R[src]

Bit 12 - B44

pub fn b45(&self) -> B45_R[src]

Bit 13 - B45

pub fn b46(&self) -> B46_R[src]

Bit 14 - B46

pub fn b47(&self) -> B47_R[src]

Bit 15 - B47

pub fn b48(&self) -> B48_R[src]

Bit 16 - B48

pub fn b49(&self) -> B49_R[src]

Bit 17 - B49

pub fn b50(&self) -> B50_R[src]

Bit 18 - B50

pub fn b51(&self) -> B51_R[src]

Bit 19 - B51

pub fn b52(&self) -> B52_R[src]

Bit 20 - B52

pub fn b53(&self) -> B53_R[src]

Bit 21 - B53

pub fn b54(&self) -> B54_R[src]

Bit 22 - B54

pub fn b55(&self) -> B55_R[src]

Bit 23 - B55

pub fn b56(&self) -> B56_R[src]

Bit 24 - B56

pub fn b57(&self) -> B57_R[src]

Bit 25 - B57

pub fn b58(&self) -> B58_R[src]

Bit 26 - B58

pub fn b59(&self) -> B59_R[src]

Bit 27 - B59

pub fn b60(&self) -> B60_R[src]

Bit 28 - B60

pub fn b61(&self) -> B61_R[src]

Bit 29 - B61

pub fn b62(&self) -> B62_R[src]

Bit 30 - B62

pub fn b63(&self) -> B63_R[src]

Bit 31 - B63

impl R<u32, Reg<u32, _MPCBB1_VCTR2>>[src]

pub fn b64(&self) -> B64_R[src]

Bit 0 - B64

pub fn b65(&self) -> B65_R[src]

Bit 1 - B65

pub fn b66(&self) -> B66_R[src]

Bit 2 - B66

pub fn b67(&self) -> B67_R[src]

Bit 3 - B67

pub fn b68(&self) -> B68_R[src]

Bit 4 - B68

pub fn b69(&self) -> B69_R[src]

Bit 5 - B69

pub fn b70(&self) -> B70_R[src]

Bit 6 - B70

pub fn b71(&self) -> B71_R[src]

Bit 7 - B71

pub fn b72(&self) -> B72_R[src]

Bit 8 - B72

pub fn b73(&self) -> B73_R[src]

Bit 9 - B73

pub fn b74(&self) -> B74_R[src]

Bit 10 - B74

pub fn b75(&self) -> B75_R[src]

Bit 11 - B75

pub fn b76(&self) -> B76_R[src]

Bit 12 - B76

pub fn b77(&self) -> B77_R[src]

Bit 13 - B77

pub fn b78(&self) -> B78_R[src]

Bit 14 - B78

pub fn b79(&self) -> B79_R[src]

Bit 15 - B79

pub fn b80(&self) -> B80_R[src]

Bit 16 - B80

pub fn b81(&self) -> B81_R[src]

Bit 17 - B81

pub fn b82(&self) -> B82_R[src]

Bit 18 - B82

pub fn b83(&self) -> B83_R[src]

Bit 19 - B83

pub fn b84(&self) -> B84_R[src]

Bit 20 - B84

pub fn b85(&self) -> B85_R[src]

Bit 21 - B85

pub fn b86(&self) -> B86_R[src]

Bit 22 - B86

pub fn b87(&self) -> B87_R[src]

Bit 23 - B87

pub fn b88(&self) -> B88_R[src]

Bit 24 - B88

pub fn b89(&self) -> B89_R[src]

Bit 25 - B89

pub fn b90(&self) -> B90_R[src]

Bit 26 - B90

pub fn b91(&self) -> B91_R[src]

Bit 27 - B91

pub fn b92(&self) -> B92_R[src]

Bit 28 - B92

pub fn b93(&self) -> B93_R[src]

Bit 29 - B93

pub fn b94(&self) -> B94_R[src]

Bit 30 - B94

pub fn b95(&self) -> B95_R[src]

Bit 31 - B95

impl R<u32, Reg<u32, _MPCBB1_VCTR3>>[src]

pub fn b96(&self) -> B96_R[src]

Bit 0 - B96

pub fn b97(&self) -> B97_R[src]

Bit 1 - B97

pub fn b98(&self) -> B98_R[src]

Bit 2 - B98

pub fn b99(&self) -> B99_R[src]

Bit 3 - B99

pub fn b100(&self) -> B100_R[src]

Bit 4 - B100

pub fn b101(&self) -> B101_R[src]

Bit 5 - B101

pub fn b102(&self) -> B102_R[src]

Bit 6 - B102

pub fn b103(&self) -> B103_R[src]

Bit 7 - B103

pub fn b104(&self) -> B104_R[src]

Bit 8 - B104

pub fn b105(&self) -> B105_R[src]

Bit 9 - B105

pub fn b106(&self) -> B106_R[src]

Bit 10 - B106

pub fn b107(&self) -> B107_R[src]

Bit 11 - B107

pub fn b108(&self) -> B108_R[src]

Bit 12 - B108

pub fn b109(&self) -> B109_R[src]

Bit 13 - B109

pub fn b110(&self) -> B110_R[src]

Bit 14 - B110

pub fn b111(&self) -> B111_R[src]

Bit 15 - B111

pub fn b112(&self) -> B112_R[src]

Bit 16 - B112

pub fn b113(&self) -> B113_R[src]

Bit 17 - B113

pub fn b114(&self) -> B114_R[src]

Bit 18 - B114

pub fn b115(&self) -> B115_R[src]

Bit 19 - B115

pub fn b116(&self) -> B116_R[src]

Bit 20 - B116

pub fn b117(&self) -> B117_R[src]

Bit 21 - B117

pub fn b118(&self) -> B118_R[src]

Bit 22 - B118

pub fn b119(&self) -> B119_R[src]

Bit 23 - B119

pub fn b120(&self) -> B120_R[src]

Bit 24 - B120

pub fn b121(&self) -> B121_R[src]

Bit 25 - B121

pub fn b122(&self) -> B122_R[src]

Bit 26 - B122

pub fn b123(&self) -> B123_R[src]

Bit 27 - B123

pub fn b124(&self) -> B124_R[src]

Bit 28 - B124

pub fn b125(&self) -> B125_R[src]

Bit 29 - B125

pub fn b126(&self) -> B126_R[src]

Bit 30 - B126

pub fn b127(&self) -> B127_R[src]

Bit 31 - B127

impl R<u32, Reg<u32, _MPCBB1_VCTR4>>[src]

pub fn b128(&self) -> B128_R[src]

Bit 0 - B128

pub fn b129(&self) -> B129_R[src]

Bit 1 - B129

pub fn b130(&self) -> B130_R[src]

Bit 2 - B130

pub fn b131(&self) -> B131_R[src]

Bit 3 - B131

pub fn b132(&self) -> B132_R[src]

Bit 4 - B132

pub fn b133(&self) -> B133_R[src]

Bit 5 - B133

pub fn b134(&self) -> B134_R[src]

Bit 6 - B134

pub fn b135(&self) -> B135_R[src]

Bit 7 - B135

pub fn b136(&self) -> B136_R[src]

Bit 8 - B136

pub fn b137(&self) -> B137_R[src]

Bit 9 - B137

pub fn b138(&self) -> B138_R[src]

Bit 10 - B138

pub fn b139(&self) -> B139_R[src]

Bit 11 - B139

pub fn b140(&self) -> B140_R[src]

Bit 12 - B140

pub fn b141(&self) -> B141_R[src]

Bit 13 - B141

pub fn b142(&self) -> B142_R[src]

Bit 14 - B142

pub fn b143(&self) -> B143_R[src]

Bit 15 - B143

pub fn b144(&self) -> B144_R[src]

Bit 16 - B144

pub fn b145(&self) -> B145_R[src]

Bit 17 - B145

pub fn b146(&self) -> B146_R[src]

Bit 18 - B146

pub fn b147(&self) -> B147_R[src]

Bit 19 - B147

pub fn b148(&self) -> B148_R[src]

Bit 20 - B148

pub fn b149(&self) -> B149_R[src]

Bit 21 - B149

pub fn b150(&self) -> B150_R[src]

Bit 22 - B150

pub fn b151(&self) -> B151_R[src]

Bit 23 - B151

pub fn b152(&self) -> B152_R[src]

Bit 24 - B152

pub fn b153(&self) -> B153_R[src]

Bit 25 - B153

pub fn b154(&self) -> B154_R[src]

Bit 26 - B154

pub fn b155(&self) -> B155_R[src]

Bit 27 - B155

pub fn b156(&self) -> B156_R[src]

Bit 28 - B156

pub fn b157(&self) -> B157_R[src]

Bit 29 - B157

pub fn b158(&self) -> B158_R[src]

Bit 30 - B158

pub fn b159(&self) -> B159_R[src]

Bit 31 - B159

impl R<u32, Reg<u32, _MPCBB1_VCTR5>>[src]

pub fn b160(&self) -> B160_R[src]

Bit 0 - B160

pub fn b161(&self) -> B161_R[src]

Bit 1 - B161

pub fn b162(&self) -> B162_R[src]

Bit 2 - B162

pub fn b163(&self) -> B163_R[src]

Bit 3 - B163

pub fn b164(&self) -> B164_R[src]

Bit 4 - B164

pub fn b165(&self) -> B165_R[src]

Bit 5 - B165

pub fn b166(&self) -> B166_R[src]

Bit 6 - B166

pub fn b167(&self) -> B167_R[src]

Bit 7 - B167

pub fn b168(&self) -> B168_R[src]

Bit 8 - B168

pub fn b169(&self) -> B169_R[src]

Bit 9 - B169

pub fn b170(&self) -> B170_R[src]

Bit 10 - B170

pub fn b171(&self) -> B171_R[src]

Bit 11 - B171

pub fn b172(&self) -> B172_R[src]

Bit 12 - B172

pub fn b173(&self) -> B173_R[src]

Bit 13 - B173

pub fn b174(&self) -> B174_R[src]

Bit 14 - B174

pub fn b175(&self) -> B175_R[src]

Bit 15 - B175

pub fn b176(&self) -> B176_R[src]

Bit 16 - B176

pub fn b177(&self) -> B177_R[src]

Bit 17 - B177

pub fn b178(&self) -> B178_R[src]

Bit 18 - B178

pub fn b179(&self) -> B179_R[src]

Bit 19 - B179

pub fn b180(&self) -> B180_R[src]

Bit 20 - B180

pub fn b181(&self) -> B181_R[src]

Bit 21 - B181

pub fn b182(&self) -> B182_R[src]

Bit 22 - B182

pub fn b183(&self) -> B183_R[src]

Bit 23 - B183

pub fn b184(&self) -> B184_R[src]

Bit 24 - B184

pub fn b185(&self) -> B185_R[src]

Bit 25 - B185

pub fn b186(&self) -> B186_R[src]

Bit 26 - B186

pub fn b187(&self) -> B187_R[src]

Bit 27 - B187

pub fn b188(&self) -> B188_R[src]

Bit 28 - B188

pub fn b189(&self) -> B189_R[src]

Bit 29 - B189

pub fn b190(&self) -> B190_R[src]

Bit 30 - B190

pub fn b191(&self) -> B191_R[src]

Bit 31 - B191

impl R<u32, Reg<u32, _MPCBB1_VCTR6>>[src]

pub fn b192(&self) -> B192_R[src]

Bit 0 - B192

pub fn b193(&self) -> B193_R[src]

Bit 1 - B193

pub fn b194(&self) -> B194_R[src]

Bit 2 - B194

pub fn b195(&self) -> B195_R[src]

Bit 3 - B195

pub fn b196(&self) -> B196_R[src]

Bit 4 - B196

pub fn b197(&self) -> B197_R[src]

Bit 5 - B197

pub fn b198(&self) -> B198_R[src]

Bit 6 - B198

pub fn b199(&self) -> B199_R[src]

Bit 7 - B199

pub fn b200(&self) -> B200_R[src]

Bit 8 - B200

pub fn b201(&self) -> B201_R[src]

Bit 9 - B201

pub fn b202(&self) -> B202_R[src]

Bit 10 - B202

pub fn b203(&self) -> B203_R[src]

Bit 11 - B203

pub fn b204(&self) -> B204_R[src]

Bit 12 - B204

pub fn b205(&self) -> B205_R[src]

Bit 13 - B205

pub fn b206(&self) -> B206_R[src]

Bit 14 - B206

pub fn b207(&self) -> B207_R[src]

Bit 15 - B207

pub fn b208(&self) -> B208_R[src]

Bit 16 - B208

pub fn b209(&self) -> B209_R[src]

Bit 17 - B209

pub fn b210(&self) -> B210_R[src]

Bit 18 - B210

pub fn b211(&self) -> B211_R[src]

Bit 19 - B211

pub fn b212(&self) -> B212_R[src]

Bit 20 - B212

pub fn b213(&self) -> B213_R[src]

Bit 21 - B213

pub fn b214(&self) -> B214_R[src]

Bit 22 - B214

pub fn b215(&self) -> B215_R[src]

Bit 23 - B215

pub fn b216(&self) -> B216_R[src]

Bit 24 - B216

pub fn b217(&self) -> B217_R[src]

Bit 25 - B217

pub fn b218(&self) -> B218_R[src]

Bit 26 - B218

pub fn b219(&self) -> B219_R[src]

Bit 27 - B219

pub fn b220(&self) -> B220_R[src]

Bit 28 - B220

pub fn b221(&self) -> B221_R[src]

Bit 29 - B221

pub fn b222(&self) -> B222_R[src]

Bit 30 - B222

pub fn b223(&self) -> B223_R[src]

Bit 31 - B223

impl R<u32, Reg<u32, _MPCBB1_VCTR7>>[src]

pub fn b224(&self) -> B224_R[src]

Bit 0 - B224

pub fn b225(&self) -> B225_R[src]

Bit 1 - B225

pub fn b226(&self) -> B226_R[src]

Bit 2 - B226

pub fn b227(&self) -> B227_R[src]

Bit 3 - B227

pub fn b228(&self) -> B228_R[src]

Bit 4 - B228

pub fn b229(&self) -> B229_R[src]

Bit 5 - B229

pub fn b230(&self) -> B230_R[src]

Bit 6 - B230

pub fn b231(&self) -> B231_R[src]

Bit 7 - B231

pub fn b232(&self) -> B232_R[src]

Bit 8 - B232

pub fn b233(&self) -> B233_R[src]

Bit 9 - B233

pub fn b234(&self) -> B234_R[src]

Bit 10 - B234

pub fn b235(&self) -> B235_R[src]

Bit 11 - B235

pub fn b236(&self) -> B236_R[src]

Bit 12 - B236

pub fn b237(&self) -> B237_R[src]

Bit 13 - B237

pub fn b238(&self) -> B238_R[src]

Bit 14 - B238

pub fn b239(&self) -> B239_R[src]

Bit 15 - B239

pub fn b240(&self) -> B240_R[src]

Bit 16 - B240

pub fn b241(&self) -> B241_R[src]

Bit 17 - B241

pub fn b242(&self) -> B242_R[src]

Bit 18 - B242

pub fn b243(&self) -> B243_R[src]

Bit 19 - B243

pub fn b244(&self) -> B244_R[src]

Bit 20 - B244

pub fn b245(&self) -> B245_R[src]

Bit 21 - B245

pub fn b246(&self) -> B246_R[src]

Bit 22 - B246

pub fn b247(&self) -> B247_R[src]

Bit 23 - B247

pub fn b248(&self) -> B248_R[src]

Bit 24 - B248

pub fn b249(&self) -> B249_R[src]

Bit 25 - B249

pub fn b250(&self) -> B250_R[src]

Bit 26 - B250

pub fn b251(&self) -> B251_R[src]

Bit 27 - B251

pub fn b252(&self) -> B252_R[src]

Bit 28 - B252

pub fn b253(&self) -> B253_R[src]

Bit 29 - B253

pub fn b254(&self) -> B254_R[src]

Bit 30 - B254

pub fn b255(&self) -> B255_R[src]

Bit 31 - B255

impl R<u32, Reg<u32, _MPCBB1_VCTR8>>[src]

pub fn b256(&self) -> B256_R[src]

Bit 0 - B256

pub fn b257(&self) -> B257_R[src]

Bit 1 - B257

pub fn b258(&self) -> B258_R[src]

Bit 2 - B258

pub fn b259(&self) -> B259_R[src]

Bit 3 - B259

pub fn b260(&self) -> B260_R[src]

Bit 4 - B260

pub fn b261(&self) -> B261_R[src]

Bit 5 - B261

pub fn b262(&self) -> B262_R[src]

Bit 6 - B262

pub fn b263(&self) -> B263_R[src]

Bit 7 - B263

pub fn b264(&self) -> B264_R[src]

Bit 8 - B264

pub fn b265(&self) -> B265_R[src]

Bit 9 - B265

pub fn b266(&self) -> B266_R[src]

Bit 10 - B266

pub fn b267(&self) -> B267_R[src]

Bit 11 - B267

pub fn b268(&self) -> B268_R[src]

Bit 12 - B268

pub fn b269(&self) -> B269_R[src]

Bit 13 - B269

pub fn b270(&self) -> B270_R[src]

Bit 14 - B270

pub fn b271(&self) -> B271_R[src]

Bit 15 - B271

pub fn b272(&self) -> B272_R[src]

Bit 16 - B272

pub fn b273(&self) -> B273_R[src]

Bit 17 - B273

pub fn b274(&self) -> B274_R[src]

Bit 18 - B274

pub fn b275(&self) -> B275_R[src]

Bit 19 - B275

pub fn b276(&self) -> B276_R[src]

Bit 20 - B276

pub fn b277(&self) -> B277_R[src]

Bit 21 - B277

pub fn b278(&self) -> B278_R[src]

Bit 22 - B278

pub fn b279(&self) -> B279_R[src]

Bit 23 - B279

pub fn b280(&self) -> B280_R[src]

Bit 24 - B280

pub fn b281(&self) -> B281_R[src]

Bit 25 - B281

pub fn b282(&self) -> B282_R[src]

Bit 26 - B282

pub fn b283(&self) -> B283_R[src]

Bit 27 - B283

pub fn b284(&self) -> B284_R[src]

Bit 28 - B284

pub fn b285(&self) -> B285_R[src]

Bit 29 - B285

pub fn b286(&self) -> B286_R[src]

Bit 30 - B286

pub fn b287(&self) -> B287_R[src]

Bit 31 - B287

impl R<u32, Reg<u32, _MPCBB1_VCTR9>>[src]

pub fn b288(&self) -> B288_R[src]

Bit 0 - B288

pub fn b289(&self) -> B289_R[src]

Bit 1 - B289

pub fn b290(&self) -> B290_R[src]

Bit 2 - B290

pub fn b291(&self) -> B291_R[src]

Bit 3 - B291

pub fn b292(&self) -> B292_R[src]

Bit 4 - B292

pub fn b293(&self) -> B293_R[src]

Bit 5 - B293

pub fn b294(&self) -> B294_R[src]

Bit 6 - B294

pub fn b295(&self) -> B295_R[src]

Bit 7 - B295

pub fn b296(&self) -> B296_R[src]

Bit 8 - B296

pub fn b297(&self) -> B297_R[src]

Bit 9 - B297

pub fn b298(&self) -> B298_R[src]

Bit 10 - B298

pub fn b299(&self) -> B299_R[src]

Bit 11 - B299

pub fn b300(&self) -> B300_R[src]

Bit 12 - B300

pub fn b301(&self) -> B301_R[src]

Bit 13 - B301

pub fn b302(&self) -> B302_R[src]

Bit 14 - B302

pub fn b303(&self) -> B303_R[src]

Bit 15 - B303

pub fn b304(&self) -> B304_R[src]

Bit 16 - B304

pub fn b305(&self) -> B305_R[src]

Bit 17 - B305

pub fn b306(&self) -> B306_R[src]

Bit 18 - B306

pub fn b307(&self) -> B307_R[src]

Bit 19 - B307

pub fn b308(&self) -> B308_R[src]

Bit 20 - B308

pub fn b309(&self) -> B309_R[src]

Bit 21 - B309

pub fn b310(&self) -> B310_R[src]

Bit 22 - B310

pub fn b311(&self) -> B311_R[src]

Bit 23 - B311

pub fn b312(&self) -> B312_R[src]

Bit 24 - B312

pub fn b313(&self) -> B313_R[src]

Bit 25 - B313

pub fn b314(&self) -> B314_R[src]

Bit 26 - B314

pub fn b315(&self) -> B315_R[src]

Bit 27 - B315

pub fn b316(&self) -> B316_R[src]

Bit 28 - B316

pub fn b317(&self) -> B317_R[src]

Bit 29 - B317

pub fn b318(&self) -> B318_R[src]

Bit 30 - B318

pub fn b319(&self) -> B319_R[src]

Bit 31 - B319

impl R<u32, Reg<u32, _MPCBB1_VCTR10>>[src]

pub fn b320(&self) -> B320_R[src]

Bit 0 - B320

pub fn b321(&self) -> B321_R[src]

Bit 1 - B321

pub fn b322(&self) -> B322_R[src]

Bit 2 - B322

pub fn b323(&self) -> B323_R[src]

Bit 3 - B323

pub fn b324(&self) -> B324_R[src]

Bit 4 - B324

pub fn b325(&self) -> B325_R[src]

Bit 5 - B325

pub fn b326(&self) -> B326_R[src]

Bit 6 - B326

pub fn b327(&self) -> B327_R[src]

Bit 7 - B327

pub fn b328(&self) -> B328_R[src]

Bit 8 - B328

pub fn b329(&self) -> B329_R[src]

Bit 9 - B329

pub fn b330(&self) -> B330_R[src]

Bit 10 - B330

pub fn b331(&self) -> B331_R[src]

Bit 11 - B331

pub fn b332(&self) -> B332_R[src]

Bit 12 - B332

pub fn b333(&self) -> B333_R[src]

Bit 13 - B333

pub fn b334(&self) -> B334_R[src]

Bit 14 - B334

pub fn b335(&self) -> B335_R[src]

Bit 15 - B335

pub fn b336(&self) -> B336_R[src]

Bit 16 - B336

pub fn b337(&self) -> B337_R[src]

Bit 17 - B337

pub fn b338(&self) -> B338_R[src]

Bit 18 - B338

pub fn b339(&self) -> B339_R[src]

Bit 19 - B339

pub fn b340(&self) -> B340_R[src]

Bit 20 - B340

pub fn b341(&self) -> B341_R[src]

Bit 21 - B341

pub fn b342(&self) -> B342_R[src]

Bit 22 - B342

pub fn b343(&self) -> B343_R[src]

Bit 23 - B343

pub fn b344(&self) -> B344_R[src]

Bit 24 - B344

pub fn b345(&self) -> B345_R[src]

Bit 25 - B345

pub fn b346(&self) -> B346_R[src]

Bit 26 - B346

pub fn b347(&self) -> B347_R[src]

Bit 27 - B347

pub fn b348(&self) -> B348_R[src]

Bit 28 - B348

pub fn b349(&self) -> B349_R[src]

Bit 29 - B349

pub fn b350(&self) -> B350_R[src]

Bit 30 - B350

pub fn b351(&self) -> B351_R[src]

Bit 31 - B351

impl R<u32, Reg<u32, _MPCBB1_VCTR11>>[src]

pub fn b352(&self) -> B352_R[src]

Bit 0 - B352

pub fn b353(&self) -> B353_R[src]

Bit 1 - B353

pub fn b354(&self) -> B354_R[src]

Bit 2 - B354

pub fn b355(&self) -> B355_R[src]

Bit 3 - B355

pub fn b356(&self) -> B356_R[src]

Bit 4 - B356

pub fn b357(&self) -> B357_R[src]

Bit 5 - B357

pub fn b358(&self) -> B358_R[src]

Bit 6 - B358

pub fn b359(&self) -> B359_R[src]

Bit 7 - B359

pub fn b360(&self) -> B360_R[src]

Bit 8 - B360

pub fn b361(&self) -> B361_R[src]

Bit 9 - B361

pub fn b362(&self) -> B362_R[src]

Bit 10 - B362

pub fn b363(&self) -> B363_R[src]

Bit 11 - B363

pub fn b364(&self) -> B364_R[src]

Bit 12 - B364

pub fn b365(&self) -> B365_R[src]

Bit 13 - B365

pub fn b366(&self) -> B366_R[src]

Bit 14 - B366

pub fn b367(&self) -> B367_R[src]

Bit 15 - B367

pub fn b368(&self) -> B368_R[src]

Bit 16 - B368

pub fn b369(&self) -> B369_R[src]

Bit 17 - B369

pub fn b370(&self) -> B370_R[src]

Bit 18 - B370

pub fn b371(&self) -> B371_R[src]

Bit 19 - B371

pub fn b372(&self) -> B372_R[src]

Bit 20 - B372

pub fn b373(&self) -> B373_R[src]

Bit 21 - B373

pub fn b374(&self) -> B374_R[src]

Bit 22 - B374

pub fn b375(&self) -> B375_R[src]

Bit 23 - B375

pub fn b376(&self) -> B376_R[src]

Bit 24 - B376

pub fn b377(&self) -> B377_R[src]

Bit 25 - B377

pub fn b378(&self) -> B378_R[src]

Bit 26 - B378

pub fn b379(&self) -> B379_R[src]

Bit 27 - B379

pub fn b380(&self) -> B380_R[src]

Bit 28 - B380

pub fn b381(&self) -> B381_R[src]

Bit 29 - B381

pub fn b382(&self) -> B382_R[src]

Bit 30 - B382

pub fn b383(&self) -> B383_R[src]

Bit 31 - B383

impl R<u32, Reg<u32, _MPCBB1_VCTR12>>[src]

pub fn b384(&self) -> B384_R[src]

Bit 0 - B384

pub fn b385(&self) -> B385_R[src]

Bit 1 - B385

pub fn b386(&self) -> B386_R[src]

Bit 2 - B386

pub fn b387(&self) -> B387_R[src]

Bit 3 - B387

pub fn b388(&self) -> B388_R[src]

Bit 4 - B388

pub fn b389(&self) -> B389_R[src]

Bit 5 - B389

pub fn b390(&self) -> B390_R[src]

Bit 6 - B390

pub fn b391(&self) -> B391_R[src]

Bit 7 - B391

pub fn b392(&self) -> B392_R[src]

Bit 8 - B392

pub fn b393(&self) -> B393_R[src]

Bit 9 - B393

pub fn b394(&self) -> B394_R[src]

Bit 10 - B394

pub fn b395(&self) -> B395_R[src]

Bit 11 - B395

pub fn b396(&self) -> B396_R[src]

Bit 12 - B396

pub fn b397(&self) -> B397_R[src]

Bit 13 - B397

pub fn b398(&self) -> B398_R[src]

Bit 14 - B398

pub fn b399(&self) -> B399_R[src]

Bit 15 - B399

pub fn b400(&self) -> B400_R[src]

Bit 16 - B400

pub fn b401(&self) -> B401_R[src]

Bit 17 - B401

pub fn b402(&self) -> B402_R[src]

Bit 18 - B402

pub fn b403(&self) -> B403_R[src]

Bit 19 - B403

pub fn b404(&self) -> B404_R[src]

Bit 20 - B404

pub fn b405(&self) -> B405_R[src]

Bit 21 - B405

pub fn b406(&self) -> B406_R[src]

Bit 22 - B406

pub fn b407(&self) -> B407_R[src]

Bit 23 - B407

pub fn b408(&self) -> B408_R[src]

Bit 24 - B408

pub fn b409(&self) -> B409_R[src]

Bit 25 - B409

pub fn b410(&self) -> B410_R[src]

Bit 26 - B410

pub fn b411(&self) -> B411_R[src]

Bit 27 - B411

pub fn b412(&self) -> B412_R[src]

Bit 28 - B412

pub fn b413(&self) -> B413_R[src]

Bit 29 - B413

pub fn b414(&self) -> B414_R[src]

Bit 30 - B414

pub fn b415(&self) -> B415_R[src]

Bit 31 - B415

impl R<u32, Reg<u32, _MPCBB1_VCTR13>>[src]

pub fn b416(&self) -> B416_R[src]

Bit 0 - B416

pub fn b417(&self) -> B417_R[src]

Bit 1 - B417

pub fn b418(&self) -> B418_R[src]

Bit 2 - B418

pub fn b419(&self) -> B419_R[src]

Bit 3 - B419

pub fn b420(&self) -> B420_R[src]

Bit 4 - B420

pub fn b421(&self) -> B421_R[src]

Bit 5 - B421

pub fn b422(&self) -> B422_R[src]

Bit 6 - B422

pub fn b423(&self) -> B423_R[src]

Bit 7 - B423

pub fn b424(&self) -> B424_R[src]

Bit 8 - B424

pub fn b425(&self) -> B425_R[src]

Bit 9 - B425

pub fn b426(&self) -> B426_R[src]

Bit 10 - B426

pub fn b427(&self) -> B427_R[src]

Bit 11 - B427

pub fn b428(&self) -> B428_R[src]

Bit 12 - B428

pub fn b429(&self) -> B429_R[src]

Bit 13 - B429

pub fn b430(&self) -> B430_R[src]

Bit 14 - B430

pub fn b431(&self) -> B431_R[src]

Bit 15 - B431

pub fn b432(&self) -> B432_R[src]

Bit 16 - B432

pub fn b433(&self) -> B433_R[src]

Bit 17 - B433

pub fn b434(&self) -> B434_R[src]

Bit 18 - B434

pub fn b435(&self) -> B435_R[src]

Bit 19 - B435

pub fn b436(&self) -> B436_R[src]

Bit 20 - B436

pub fn b437(&self) -> B437_R[src]

Bit 21 - B437

pub fn b438(&self) -> B438_R[src]

Bit 22 - B438

pub fn b439(&self) -> B439_R[src]

Bit 23 - B439

pub fn b440(&self) -> B440_R[src]

Bit 24 - B440

pub fn b441(&self) -> B441_R[src]

Bit 25 - B441

pub fn b442(&self) -> B442_R[src]

Bit 26 - B442

pub fn b443(&self) -> B443_R[src]

Bit 27 - B443

pub fn b444(&self) -> B444_R[src]

Bit 28 - B444

pub fn b445(&self) -> B445_R[src]

Bit 29 - B445

pub fn b446(&self) -> B446_R[src]

Bit 30 - B446

pub fn b447(&self) -> B447_R[src]

Bit 31 - B447

impl R<u32, Reg<u32, _MPCBB1_VCTR14>>[src]

pub fn b448(&self) -> B448_R[src]

Bit 0 - B448

pub fn b449(&self) -> B449_R[src]

Bit 1 - B449

pub fn b450(&self) -> B450_R[src]

Bit 2 - B450

pub fn b451(&self) -> B451_R[src]

Bit 3 - B451

pub fn b452(&self) -> B452_R[src]

Bit 4 - B452

pub fn b453(&self) -> B453_R[src]

Bit 5 - B453

pub fn b454(&self) -> B454_R[src]

Bit 6 - B454

pub fn b455(&self) -> B455_R[src]

Bit 7 - B455

pub fn b456(&self) -> B456_R[src]

Bit 8 - B456

pub fn b457(&self) -> B457_R[src]

Bit 9 - B457

pub fn b458(&self) -> B458_R[src]

Bit 10 - B458

pub fn b459(&self) -> B459_R[src]

Bit 11 - B459

pub fn b460(&self) -> B460_R[src]

Bit 12 - B460

pub fn b461(&self) -> B461_R[src]

Bit 13 - B461

pub fn b462(&self) -> B462_R[src]

Bit 14 - B462

pub fn b463(&self) -> B463_R[src]

Bit 15 - B463

pub fn b464(&self) -> B464_R[src]

Bit 16 - B464

pub fn b465(&self) -> B465_R[src]

Bit 17 - B465

pub fn b466(&self) -> B466_R[src]

Bit 18 - B466

pub fn b467(&self) -> B467_R[src]

Bit 19 - B467

pub fn b468(&self) -> B468_R[src]

Bit 20 - B468

pub fn b469(&self) -> B469_R[src]

Bit 21 - B469

pub fn b470(&self) -> B470_R[src]

Bit 22 - B470

pub fn b471(&self) -> B471_R[src]

Bit 23 - B471

pub fn b472(&self) -> B472_R[src]

Bit 24 - B472

pub fn b473(&self) -> B473_R[src]

Bit 25 - B473

pub fn b474(&self) -> B474_R[src]

Bit 26 - B474

pub fn b475(&self) -> B475_R[src]

Bit 27 - B475

pub fn b476(&self) -> B476_R[src]

Bit 28 - B476

pub fn b477(&self) -> B477_R[src]

Bit 29 - B477

pub fn b478(&self) -> B478_R[src]

Bit 30 - B478

pub fn b479(&self) -> B479_R[src]

Bit 31 - B479

impl R<u32, Reg<u32, _MPCBB1_VCTR15>>[src]

pub fn b480(&self) -> B480_R[src]

Bit 0 - B480

pub fn b481(&self) -> B481_R[src]

Bit 1 - B481

pub fn b482(&self) -> B482_R[src]

Bit 2 - B482

pub fn b483(&self) -> B483_R[src]

Bit 3 - B483

pub fn b484(&self) -> B484_R[src]

Bit 4 - B484

pub fn b485(&self) -> B485_R[src]

Bit 5 - B485

pub fn b486(&self) -> B486_R[src]

Bit 6 - B486

pub fn b487(&self) -> B487_R[src]

Bit 7 - B487

pub fn b488(&self) -> B488_R[src]

Bit 8 - B488

pub fn b489(&self) -> B489_R[src]

Bit 9 - B489

pub fn b490(&self) -> B490_R[src]

Bit 10 - B490

pub fn b491(&self) -> B491_R[src]

Bit 11 - B491

pub fn b492(&self) -> B492_R[src]

Bit 12 - B492

pub fn b493(&self) -> B493_R[src]

Bit 13 - B493

pub fn b494(&self) -> B494_R[src]

Bit 14 - B494

pub fn b495(&self) -> B495_R[src]

Bit 15 - B495

pub fn b496(&self) -> B496_R[src]

Bit 16 - B496

pub fn b497(&self) -> B497_R[src]

Bit 17 - B497

pub fn b498(&self) -> B498_R[src]

Bit 18 - B498

pub fn b499(&self) -> B499_R[src]

Bit 19 - B499

pub fn b500(&self) -> B500_R[src]

Bit 20 - B500

pub fn b501(&self) -> B501_R[src]

Bit 21 - B501

pub fn b502(&self) -> B502_R[src]

Bit 22 - B502

pub fn b503(&self) -> B503_R[src]

Bit 23 - B503

pub fn b504(&self) -> B504_R[src]

Bit 24 - B504

pub fn b505(&self) -> B505_R[src]

Bit 25 - B505

pub fn b506(&self) -> B506_R[src]

Bit 26 - B506

pub fn b507(&self) -> B507_R[src]

Bit 27 - B507

pub fn b508(&self) -> B508_R[src]

Bit 28 - B508

pub fn b509(&self) -> B509_R[src]

Bit 29 - B509

pub fn b510(&self) -> B510_R[src]

Bit 30 - B510

pub fn b511(&self) -> B511_R[src]

Bit 31 - B511

impl R<u32, Reg<u32, _MPCBB1_VCTR16>>[src]

pub fn b512(&self) -> B512_R[src]

Bit 0 - B512

pub fn b513(&self) -> B513_R[src]

Bit 1 - B513

pub fn b514(&self) -> B514_R[src]

Bit 2 - B514

pub fn b515(&self) -> B515_R[src]

Bit 3 - B515

pub fn b516(&self) -> B516_R[src]

Bit 4 - B516

pub fn b517(&self) -> B517_R[src]

Bit 5 - B517

pub fn b518(&self) -> B518_R[src]

Bit 6 - B518

pub fn b519(&self) -> B519_R[src]

Bit 7 - B519

pub fn b520(&self) -> B520_R[src]

Bit 8 - B520

pub fn b521(&self) -> B521_R[src]

Bit 9 - B521

pub fn b522(&self) -> B522_R[src]

Bit 10 - B522

pub fn b523(&self) -> B523_R[src]

Bit 11 - B523

pub fn b524(&self) -> B524_R[src]

Bit 12 - B524

pub fn b525(&self) -> B525_R[src]

Bit 13 - B525

pub fn b526(&self) -> B526_R[src]

Bit 14 - B526

pub fn b527(&self) -> B527_R[src]

Bit 15 - B527

pub fn b528(&self) -> B528_R[src]

Bit 16 - B528

pub fn b529(&self) -> B529_R[src]

Bit 17 - B529

pub fn b530(&self) -> B530_R[src]

Bit 18 - B530

pub fn b531(&self) -> B531_R[src]

Bit 19 - B531

pub fn b532(&self) -> B532_R[src]

Bit 20 - B532

pub fn b533(&self) -> B533_R[src]

Bit 21 - B533

pub fn b534(&self) -> B534_R[src]

Bit 22 - B534

pub fn b535(&self) -> B535_R[src]

Bit 23 - B535

pub fn b536(&self) -> B536_R[src]

Bit 24 - B536

pub fn b537(&self) -> B537_R[src]

Bit 25 - B537

pub fn b538(&self) -> B538_R[src]

Bit 26 - B538

pub fn b539(&self) -> B539_R[src]

Bit 27 - B539

pub fn b540(&self) -> B540_R[src]

Bit 28 - B540

pub fn b541(&self) -> B541_R[src]

Bit 29 - B541

pub fn b542(&self) -> B542_R[src]

Bit 30 - B542

pub fn b543(&self) -> B543_R[src]

Bit 31 - B543

impl R<u32, Reg<u32, _MPCBB1_VCTR17>>[src]

pub fn b544(&self) -> B544_R[src]

Bit 0 - B544

pub fn b545(&self) -> B545_R[src]

Bit 1 - B545

pub fn b546(&self) -> B546_R[src]

Bit 2 - B546

pub fn b547(&self) -> B547_R[src]

Bit 3 - B547

pub fn b548(&self) -> B548_R[src]

Bit 4 - B548

pub fn b549(&self) -> B549_R[src]

Bit 5 - B549

pub fn b550(&self) -> B550_R[src]

Bit 6 - B550

pub fn b551(&self) -> B551_R[src]

Bit 7 - B551

pub fn b552(&self) -> B552_R[src]

Bit 8 - B552

pub fn b553(&self) -> B553_R[src]

Bit 9 - B553

pub fn b554(&self) -> B554_R[src]

Bit 10 - B554

pub fn b555(&self) -> B555_R[src]

Bit 11 - B555

pub fn b556(&self) -> B556_R[src]

Bit 12 - B556

pub fn b557(&self) -> B557_R[src]

Bit 13 - B557

pub fn b558(&self) -> B558_R[src]

Bit 14 - B558

pub fn b559(&self) -> B559_R[src]

Bit 15 - B559

pub fn b560(&self) -> B560_R[src]

Bit 16 - B560

pub fn b561(&self) -> B561_R[src]

Bit 17 - B561

pub fn b562(&self) -> B562_R[src]

Bit 18 - B562

pub fn b563(&self) -> B563_R[src]

Bit 19 - B563

pub fn b564(&self) -> B564_R[src]

Bit 20 - B564

pub fn b565(&self) -> B565_R[src]

Bit 21 - B565

pub fn b566(&self) -> B566_R[src]

Bit 22 - B566

pub fn b567(&self) -> B567_R[src]

Bit 23 - B567

pub fn b568(&self) -> B568_R[src]

Bit 24 - B568

pub fn b569(&self) -> B569_R[src]

Bit 25 - B569

pub fn b570(&self) -> B570_R[src]

Bit 26 - B570

pub fn b571(&self) -> B571_R[src]

Bit 27 - B571

pub fn b572(&self) -> B572_R[src]

Bit 28 - B572

pub fn b573(&self) -> B573_R[src]

Bit 29 - B573

pub fn b574(&self) -> B574_R[src]

Bit 30 - B574

pub fn b575(&self) -> B575_R[src]

Bit 31 - B575

impl R<u32, Reg<u32, _MPCBB1_VCTR18>>[src]

pub fn b576(&self) -> B576_R[src]

Bit 0 - B576

pub fn b577(&self) -> B577_R[src]

Bit 1 - B577

pub fn b578(&self) -> B578_R[src]

Bit 2 - B578

pub fn b579(&self) -> B579_R[src]

Bit 3 - B579

pub fn b580(&self) -> B580_R[src]

Bit 4 - B580

pub fn b581(&self) -> B581_R[src]

Bit 5 - B581

pub fn b582(&self) -> B582_R[src]

Bit 6 - B582

pub fn b583(&self) -> B583_R[src]

Bit 7 - B583

pub fn b584(&self) -> B584_R[src]

Bit 8 - B584

pub fn b585(&self) -> B585_R[src]

Bit 9 - B585

pub fn b586(&self) -> B586_R[src]

Bit 10 - B586

pub fn b587(&self) -> B587_R[src]

Bit 11 - B587

pub fn b588(&self) -> B588_R[src]

Bit 12 - B588

pub fn b589(&self) -> B589_R[src]

Bit 13 - B589

pub fn b590(&self) -> B590_R[src]

Bit 14 - B590

pub fn b591(&self) -> B591_R[src]

Bit 15 - B591

pub fn b592(&self) -> B592_R[src]

Bit 16 - B592

pub fn b593(&self) -> B593_R[src]

Bit 17 - B593

pub fn b594(&self) -> B594_R[src]

Bit 18 - B594

pub fn b595(&self) -> B595_R[src]

Bit 19 - B595

pub fn b596(&self) -> B596_R[src]

Bit 20 - B596

pub fn b597(&self) -> B597_R[src]

Bit 21 - B597

pub fn b598(&self) -> B598_R[src]

Bit 22 - B598

pub fn b599(&self) -> B599_R[src]

Bit 23 - B599

pub fn b600(&self) -> B600_R[src]

Bit 24 - B600

pub fn b601(&self) -> B601_R[src]

Bit 25 - B601

pub fn b602(&self) -> B602_R[src]

Bit 26 - B602

pub fn b603(&self) -> B603_R[src]

Bit 27 - B603

pub fn b604(&self) -> B604_R[src]

Bit 28 - B604

pub fn b605(&self) -> B605_R[src]

Bit 29 - B605

pub fn b606(&self) -> B606_R[src]

Bit 30 - B606

pub fn b607(&self) -> B607_R[src]

Bit 31 - B607

impl R<u32, Reg<u32, _MPCBB1_VCTR19>>[src]

pub fn b608(&self) -> B608_R[src]

Bit 0 - B608

pub fn b609(&self) -> B609_R[src]

Bit 1 - B609

pub fn b610(&self) -> B610_R[src]

Bit 2 - B610

pub fn b611(&self) -> B611_R[src]

Bit 3 - B611

pub fn b612(&self) -> B612_R[src]

Bit 4 - B612

pub fn b613(&self) -> B613_R[src]

Bit 5 - B613

pub fn b614(&self) -> B614_R[src]

Bit 6 - B614

pub fn b615(&self) -> B615_R[src]

Bit 7 - B615

pub fn b616(&self) -> B616_R[src]

Bit 8 - B616

pub fn b617(&self) -> B617_R[src]

Bit 9 - B617

pub fn b618(&self) -> B618_R[src]

Bit 10 - B618

pub fn b619(&self) -> B619_R[src]

Bit 11 - B619

pub fn b620(&self) -> B620_R[src]

Bit 12 - B620

pub fn b621(&self) -> B621_R[src]

Bit 13 - B621

pub fn b622(&self) -> B622_R[src]

Bit 14 - B622

pub fn b623(&self) -> B623_R[src]

Bit 15 - B623

pub fn b624(&self) -> B624_R[src]

Bit 16 - B624

pub fn b625(&self) -> B625_R[src]

Bit 17 - B625

pub fn b626(&self) -> B626_R[src]

Bit 18 - B626

pub fn b627(&self) -> B627_R[src]

Bit 19 - B627

pub fn b628(&self) -> B628_R[src]

Bit 20 - B628

pub fn b629(&self) -> B629_R[src]

Bit 21 - B629

pub fn b630(&self) -> B630_R[src]

Bit 22 - B630

pub fn b631(&self) -> B631_R[src]

Bit 23 - B631

pub fn b632(&self) -> B632_R[src]

Bit 24 - B632

pub fn b633(&self) -> B633_R[src]

Bit 25 - B633

pub fn b634(&self) -> B634_R[src]

Bit 26 - B634

pub fn b635(&self) -> B635_R[src]

Bit 27 - B635

pub fn b636(&self) -> B636_R[src]

Bit 28 - B636

pub fn b637(&self) -> B637_R[src]

Bit 29 - B637

pub fn b638(&self) -> B638_R[src]

Bit 30 - B638

pub fn b639(&self) -> B639_R[src]

Bit 31 - B639

impl R<u32, Reg<u32, _MPCBB1_VCTR20>>[src]

pub fn b640(&self) -> B640_R[src]

Bit 0 - B640

pub fn b641(&self) -> B641_R[src]

Bit 1 - B641

pub fn b642(&self) -> B642_R[src]

Bit 2 - B642

pub fn b643(&self) -> B643_R[src]

Bit 3 - B643

pub fn b644(&self) -> B644_R[src]

Bit 4 - B644

pub fn b645(&self) -> B645_R[src]

Bit 5 - B645

pub fn b646(&self) -> B646_R[src]

Bit 6 - B646

pub fn b647(&self) -> B647_R[src]

Bit 7 - B647

pub fn b648(&self) -> B648_R[src]

Bit 8 - B648

pub fn b649(&self) -> B649_R[src]

Bit 9 - B649

pub fn b650(&self) -> B650_R[src]

Bit 10 - B650

pub fn b651(&self) -> B651_R[src]

Bit 11 - B651

pub fn b652(&self) -> B652_R[src]

Bit 12 - B652

pub fn b653(&self) -> B653_R[src]

Bit 13 - B653

pub fn b654(&self) -> B654_R[src]

Bit 14 - B654

pub fn b655(&self) -> B655_R[src]

Bit 15 - B655

pub fn b656(&self) -> B656_R[src]

Bit 16 - B656

pub fn b657(&self) -> B657_R[src]

Bit 17 - B657

pub fn b658(&self) -> B658_R[src]

Bit 18 - B658

pub fn b659(&self) -> B659_R[src]

Bit 19 - B659

pub fn b660(&self) -> B660_R[src]

Bit 20 - B660

pub fn b661(&self) -> B661_R[src]

Bit 21 - B661

pub fn b662(&self) -> B662_R[src]

Bit 22 - B662

pub fn b663(&self) -> B663_R[src]

Bit 23 - B663

pub fn b664(&self) -> B664_R[src]

Bit 24 - B664

pub fn b665(&self) -> B665_R[src]

Bit 25 - B665

pub fn b666(&self) -> B666_R[src]

Bit 26 - B666

pub fn b667(&self) -> B667_R[src]

Bit 27 - B667

pub fn b668(&self) -> B668_R[src]

Bit 28 - B668

pub fn b669(&self) -> B669_R[src]

Bit 29 - B669

pub fn b670(&self) -> B670_R[src]

Bit 30 - B670

pub fn b671(&self) -> B671_R[src]

Bit 31 - B671

impl R<u32, Reg<u32, _MPCBB1_VCTR21>>[src]

pub fn b672(&self) -> B672_R[src]

Bit 0 - B672

pub fn b673(&self) -> B673_R[src]

Bit 1 - B673

pub fn b674(&self) -> B674_R[src]

Bit 2 - B674

pub fn b675(&self) -> B675_R[src]

Bit 3 - B675

pub fn b676(&self) -> B676_R[src]

Bit 4 - B676

pub fn b677(&self) -> B677_R[src]

Bit 5 - B677

pub fn b678(&self) -> B678_R[src]

Bit 6 - B678

pub fn b679(&self) -> B679_R[src]

Bit 7 - B679

pub fn b680(&self) -> B680_R[src]

Bit 8 - B680

pub fn b681(&self) -> B681_R[src]

Bit 9 - B681

pub fn b682(&self) -> B682_R[src]

Bit 10 - B682

pub fn b683(&self) -> B683_R[src]

Bit 11 - B683

pub fn b684(&self) -> B684_R[src]

Bit 12 - B684

pub fn b685(&self) -> B685_R[src]

Bit 13 - B685

pub fn b686(&self) -> B686_R[src]

Bit 14 - B686

pub fn b687(&self) -> B687_R[src]

Bit 15 - B687

pub fn b688(&self) -> B688_R[src]

Bit 16 - B688

pub fn b689(&self) -> B689_R[src]

Bit 17 - B689

pub fn b690(&self) -> B690_R[src]

Bit 18 - B690

pub fn b691(&self) -> B691_R[src]

Bit 19 - B691

pub fn b692(&self) -> B692_R[src]

Bit 20 - B692

pub fn b693(&self) -> B693_R[src]

Bit 21 - B693

pub fn b694(&self) -> B694_R[src]

Bit 22 - B694

pub fn b695(&self) -> B695_R[src]

Bit 23 - B695

pub fn b696(&self) -> B696_R[src]

Bit 24 - B696

pub fn b697(&self) -> B697_R[src]

Bit 25 - B697

pub fn b698(&self) -> B698_R[src]

Bit 26 - B698

pub fn b699(&self) -> B699_R[src]

Bit 27 - B699

pub fn b700(&self) -> B700_R[src]

Bit 28 - B700

pub fn b701(&self) -> B701_R[src]

Bit 29 - B701

pub fn b702(&self) -> B702_R[src]

Bit 30 - B702

pub fn b703(&self) -> B703_R[src]

Bit 31 - B703

impl R<u32, Reg<u32, _MPCBB1_VCTR22>>[src]

pub fn b704(&self) -> B704_R[src]

Bit 0 - B704

pub fn b705(&self) -> B705_R[src]

Bit 1 - B705

pub fn b706(&self) -> B706_R[src]

Bit 2 - B706

pub fn b707(&self) -> B707_R[src]

Bit 3 - B707

pub fn b708(&self) -> B708_R[src]

Bit 4 - B708

pub fn b709(&self) -> B709_R[src]

Bit 5 - B709

pub fn b710(&self) -> B710_R[src]

Bit 6 - B710

pub fn b711(&self) -> B711_R[src]

Bit 7 - B711

pub fn b712(&self) -> B712_R[src]

Bit 8 - B712

pub fn b713(&self) -> B713_R[src]

Bit 9 - B713

pub fn b714(&self) -> B714_R[src]

Bit 10 - B714

pub fn b715(&self) -> B715_R[src]

Bit 11 - B715

pub fn b716(&self) -> B716_R[src]

Bit 12 - B716

pub fn b717(&self) -> B717_R[src]

Bit 13 - B717

pub fn b718(&self) -> B718_R[src]

Bit 14 - B718

pub fn b719(&self) -> B719_R[src]

Bit 15 - B719

pub fn b720(&self) -> B720_R[src]

Bit 16 - B720

pub fn b721(&self) -> B721_R[src]

Bit 17 - B721

pub fn b722(&self) -> B722_R[src]

Bit 18 - B722

pub fn b723(&self) -> B723_R[src]

Bit 19 - B723

pub fn b724(&self) -> B724_R[src]

Bit 20 - B724

pub fn b725(&self) -> B725_R[src]

Bit 21 - B725

pub fn b726(&self) -> B726_R[src]

Bit 22 - B726

pub fn b727(&self) -> B727_R[src]

Bit 23 - B727

pub fn b728(&self) -> B728_R[src]

Bit 24 - B728

pub fn b729(&self) -> B729_R[src]

Bit 25 - B729

pub fn b730(&self) -> B730_R[src]

Bit 26 - B730

pub fn b731(&self) -> B731_R[src]

Bit 27 - B731

pub fn b732(&self) -> B732_R[src]

Bit 28 - B732

pub fn b733(&self) -> B733_R[src]

Bit 29 - B733

pub fn b734(&self) -> B734_R[src]

Bit 30 - B734

pub fn b735(&self) -> B735_R[src]

Bit 31 - B735

impl R<u32, Reg<u32, _MPCBB1_VCTR23>>[src]

pub fn b736(&self) -> B736_R[src]

Bit 0 - B736

pub fn b737(&self) -> B737_R[src]

Bit 1 - B737

pub fn b738(&self) -> B738_R[src]

Bit 2 - B738

pub fn b739(&self) -> B739_R[src]

Bit 3 - B739

pub fn b740(&self) -> B740_R[src]

Bit 4 - B740

pub fn b741(&self) -> B741_R[src]

Bit 5 - B741

pub fn b742(&self) -> B742_R[src]

Bit 6 - B742

pub fn b743(&self) -> B743_R[src]

Bit 7 - B743

pub fn b744(&self) -> B744_R[src]

Bit 8 - B744

pub fn b745(&self) -> B745_R[src]

Bit 9 - B745

pub fn b746(&self) -> B746_R[src]

Bit 10 - B746

pub fn b747(&self) -> B747_R[src]

Bit 11 - B747

pub fn b748(&self) -> B748_R[src]

Bit 12 - B748

pub fn b749(&self) -> B749_R[src]

Bit 13 - B749

pub fn b750(&self) -> B750_R[src]

Bit 14 - B750

pub fn b751(&self) -> B751_R[src]

Bit 15 - B751

pub fn b752(&self) -> B752_R[src]

Bit 16 - B752

pub fn b753(&self) -> B753_R[src]

Bit 17 - B753

pub fn b754(&self) -> B754_R[src]

Bit 18 - B754

pub fn b755(&self) -> B755_R[src]

Bit 19 - B755

pub fn b756(&self) -> B756_R[src]

Bit 20 - B756

pub fn b757(&self) -> B757_R[src]

Bit 21 - B757

pub fn b758(&self) -> B758_R[src]

Bit 22 - B758

pub fn b759(&self) -> B759_R[src]

Bit 23 - B759

pub fn b760(&self) -> B760_R[src]

Bit 24 - B760

pub fn b761(&self) -> B761_R[src]

Bit 25 - B761

pub fn b762(&self) -> B762_R[src]

Bit 26 - B762

pub fn b763(&self) -> B763_R[src]

Bit 27 - B763

pub fn b764(&self) -> B764_R[src]

Bit 28 - B764

pub fn b765(&self) -> B765_R[src]

Bit 29 - B765

pub fn b766(&self) -> B766_R[src]

Bit 30 - B766

pub fn b767(&self) -> B767_R[src]

Bit 31 - B767

impl R<u32, Reg<u32, _MPCBB1_VCTR24>>[src]

pub fn b768(&self) -> B768_R[src]

Bit 0 - B768

pub fn b769(&self) -> B769_R[src]

Bit 1 - B769

pub fn b770(&self) -> B770_R[src]

Bit 2 - B770

pub fn b771(&self) -> B771_R[src]

Bit 3 - B771

pub fn b772(&self) -> B772_R[src]

Bit 4 - B772

pub fn b773(&self) -> B773_R[src]

Bit 5 - B773

pub fn b774(&self) -> B774_R[src]

Bit 6 - B774

pub fn b775(&self) -> B775_R[src]

Bit 7 - B775

pub fn b776(&self) -> B776_R[src]

Bit 8 - B776

pub fn b777(&self) -> B777_R[src]

Bit 9 - B777

pub fn b778(&self) -> B778_R[src]

Bit 10 - B778

pub fn b779(&self) -> B779_R[src]

Bit 11 - B779

pub fn b780(&self) -> B780_R[src]

Bit 12 - B780

pub fn b781(&self) -> B781_R[src]

Bit 13 - B781

pub fn b782(&self) -> B782_R[src]

Bit 14 - B782

pub fn b783(&self) -> B783_R[src]

Bit 15 - B783

pub fn b784(&self) -> B784_R[src]

Bit 16 - B784

pub fn b785(&self) -> B785_R[src]

Bit 17 - B785

pub fn b786(&self) -> B786_R[src]

Bit 18 - B786

pub fn b787(&self) -> B787_R[src]

Bit 19 - B787

pub fn b788(&self) -> B788_R[src]

Bit 20 - B788

pub fn b789(&self) -> B789_R[src]

Bit 21 - B789

pub fn b790(&self) -> B790_R[src]

Bit 22 - B790

pub fn b791(&self) -> B791_R[src]

Bit 23 - B791

pub fn b792(&self) -> B792_R[src]

Bit 24 - B792

pub fn b793(&self) -> B793_R[src]

Bit 25 - B793

pub fn b794(&self) -> B794_R[src]

Bit 26 - B794

pub fn b795(&self) -> B795_R[src]

Bit 27 - B795

pub fn b796(&self) -> B796_R[src]

Bit 28 - B796

pub fn b797(&self) -> B797_R[src]

Bit 29 - B797

pub fn b798(&self) -> B798_R[src]

Bit 30 - B798

pub fn b799(&self) -> B799_R[src]

Bit 31 - B799

impl R<u32, Reg<u32, _MPCBB1_VCTR25>>[src]

pub fn b800(&self) -> B800_R[src]

Bit 0 - B800

pub fn b801(&self) -> B801_R[src]

Bit 1 - B801

pub fn b802(&self) -> B802_R[src]

Bit 2 - B802

pub fn b803(&self) -> B803_R[src]

Bit 3 - B803

pub fn b804(&self) -> B804_R[src]

Bit 4 - B804

pub fn b805(&self) -> B805_R[src]

Bit 5 - B805

pub fn b806(&self) -> B806_R[src]

Bit 6 - B806

pub fn b807(&self) -> B807_R[src]

Bit 7 - B807

pub fn b808(&self) -> B808_R[src]

Bit 8 - B808

pub fn b809(&self) -> B809_R[src]

Bit 9 - B809

pub fn b810(&self) -> B810_R[src]

Bit 10 - B810

pub fn b811(&self) -> B811_R[src]

Bit 11 - B811

pub fn b812(&self) -> B812_R[src]

Bit 12 - B812

pub fn b813(&self) -> B813_R[src]

Bit 13 - B813

pub fn b814(&self) -> B814_R[src]

Bit 14 - B814

pub fn b815(&self) -> B815_R[src]

Bit 15 - B815

pub fn b816(&self) -> B816_R[src]

Bit 16 - B816

pub fn b817(&self) -> B817_R[src]

Bit 17 - B817

pub fn b818(&self) -> B818_R[src]

Bit 18 - B818

pub fn b819(&self) -> B819_R[src]

Bit 19 - B819

pub fn b820(&self) -> B820_R[src]

Bit 20 - B820

pub fn b821(&self) -> B821_R[src]

Bit 21 - B821

pub fn b822(&self) -> B822_R[src]

Bit 22 - B822

pub fn b823(&self) -> B823_R[src]

Bit 23 - B823

pub fn b824(&self) -> B824_R[src]

Bit 24 - B824

pub fn b825(&self) -> B825_R[src]

Bit 25 - B825

pub fn b826(&self) -> B826_R[src]

Bit 26 - B826

pub fn b827(&self) -> B827_R[src]

Bit 27 - B827

pub fn b828(&self) -> B828_R[src]

Bit 28 - B828

pub fn b829(&self) -> B829_R[src]

Bit 29 - B829

pub fn b830(&self) -> B830_R[src]

Bit 30 - B830

pub fn b831(&self) -> B831_R[src]

Bit 31 - B831

impl R<u32, Reg<u32, _MPCBB1_VCTR26>>[src]

pub fn b832(&self) -> B832_R[src]

Bit 0 - B832

pub fn b833(&self) -> B833_R[src]

Bit 1 - B833

pub fn b834(&self) -> B834_R[src]

Bit 2 - B834

pub fn b835(&self) -> B835_R[src]

Bit 3 - B835

pub fn b836(&self) -> B836_R[src]

Bit 4 - B836

pub fn b837(&self) -> B837_R[src]

Bit 5 - B837

pub fn b838(&self) -> B838_R[src]

Bit 6 - B838

pub fn b839(&self) -> B839_R[src]

Bit 7 - B839

pub fn b840(&self) -> B840_R[src]

Bit 8 - B840

pub fn b841(&self) -> B841_R[src]

Bit 9 - B841

pub fn b842(&self) -> B842_R[src]

Bit 10 - B842

pub fn b843(&self) -> B843_R[src]

Bit 11 - B843

pub fn b844(&self) -> B844_R[src]

Bit 12 - B844

pub fn b845(&self) -> B845_R[src]

Bit 13 - B845

pub fn b846(&self) -> B846_R[src]

Bit 14 - B846

pub fn b847(&self) -> B847_R[src]

Bit 15 - B847

pub fn b848(&self) -> B848_R[src]

Bit 16 - B848

pub fn b849(&self) -> B849_R[src]

Bit 17 - B849

pub fn b850(&self) -> B850_R[src]

Bit 18 - B850

pub fn b851(&self) -> B851_R[src]

Bit 19 - B851

pub fn b852(&self) -> B852_R[src]

Bit 20 - B852

pub fn b853(&self) -> B853_R[src]

Bit 21 - B853

pub fn b854(&self) -> B854_R[src]

Bit 22 - B854

pub fn b855(&self) -> B855_R[src]

Bit 23 - B855

pub fn b856(&self) -> B856_R[src]

Bit 24 - B856

pub fn b857(&self) -> B857_R[src]

Bit 25 - B857

pub fn b858(&self) -> B858_R[src]

Bit 26 - B858

pub fn b859(&self) -> B859_R[src]

Bit 27 - B859

pub fn b860(&self) -> B860_R[src]

Bit 28 - B860

pub fn b861(&self) -> B861_R[src]

Bit 29 - B861

pub fn b862(&self) -> B862_R[src]

Bit 30 - B862

pub fn b863(&self) -> B863_R[src]

Bit 31 - B863

impl R<u32, Reg<u32, _MPCBB1_VCTR27>>[src]

pub fn b864(&self) -> B864_R[src]

Bit 0 - B864

pub fn b865(&self) -> B865_R[src]

Bit 1 - B865

pub fn b866(&self) -> B866_R[src]

Bit 2 - B866

pub fn b867(&self) -> B867_R[src]

Bit 3 - B867

pub fn b868(&self) -> B868_R[src]

Bit 4 - B868

pub fn b869(&self) -> B869_R[src]

Bit 5 - B869

pub fn b870(&self) -> B870_R[src]

Bit 6 - B870

pub fn b871(&self) -> B871_R[src]

Bit 7 - B871

pub fn b872(&self) -> B872_R[src]

Bit 8 - B872

pub fn b873(&self) -> B873_R[src]

Bit 9 - B873

pub fn b874(&self) -> B874_R[src]

Bit 10 - B874

pub fn b875(&self) -> B875_R[src]

Bit 11 - B875

pub fn b876(&self) -> B876_R[src]

Bit 12 - B876

pub fn b877(&self) -> B877_R[src]

Bit 13 - B877

pub fn b878(&self) -> B878_R[src]

Bit 14 - B878

pub fn b879(&self) -> B879_R[src]

Bit 15 - B879

pub fn b880(&self) -> B880_R[src]

Bit 16 - B880

pub fn b881(&self) -> B881_R[src]

Bit 17 - B881

pub fn b882(&self) -> B882_R[src]

Bit 18 - B882

pub fn b883(&self) -> B883_R[src]

Bit 19 - B883

pub fn b884(&self) -> B884_R[src]

Bit 20 - B884

pub fn b885(&self) -> B885_R[src]

Bit 21 - B885

pub fn b886(&self) -> B886_R[src]

Bit 22 - B886

pub fn b887(&self) -> B887_R[src]

Bit 23 - B887

pub fn b888(&self) -> B888_R[src]

Bit 24 - B888

pub fn b889(&self) -> B889_R[src]

Bit 25 - B889

pub fn b890(&self) -> B890_R[src]

Bit 26 - B890

pub fn b891(&self) -> B891_R[src]

Bit 27 - B891

pub fn b892(&self) -> B892_R[src]

Bit 28 - B892

pub fn b893(&self) -> B893_R[src]

Bit 29 - B893

pub fn b894(&self) -> B894_R[src]

Bit 30 - B894

pub fn b895(&self) -> B895_R[src]

Bit 31 - B895

impl R<u32, Reg<u32, _MPCBB1_VCTR28>>[src]

pub fn b896(&self) -> B896_R[src]

Bit 0 - B896

pub fn b897(&self) -> B897_R[src]

Bit 1 - B897

pub fn b898(&self) -> B898_R[src]

Bit 2 - B898

pub fn b899(&self) -> B899_R[src]

Bit 3 - B899

pub fn b900(&self) -> B900_R[src]

Bit 4 - B900

pub fn b901(&self) -> B901_R[src]

Bit 5 - B901

pub fn b902(&self) -> B902_R[src]

Bit 6 - B902

pub fn b903(&self) -> B903_R[src]

Bit 7 - B903

pub fn b904(&self) -> B904_R[src]

Bit 8 - B904

pub fn b905(&self) -> B905_R[src]

Bit 9 - B905

pub fn b906(&self) -> B906_R[src]

Bit 10 - B906

pub fn b907(&self) -> B907_R[src]

Bit 11 - B907

pub fn b908(&self) -> B908_R[src]

Bit 12 - B908

pub fn b909(&self) -> B909_R[src]

Bit 13 - B909

pub fn b910(&self) -> B910_R[src]

Bit 14 - B910

pub fn b911(&self) -> B911_R[src]

Bit 15 - B911

pub fn b912(&self) -> B912_R[src]

Bit 16 - B912

pub fn b913(&self) -> B913_R[src]

Bit 17 - B913

pub fn b914(&self) -> B914_R[src]

Bit 18 - B914

pub fn b915(&self) -> B915_R[src]

Bit 19 - B915

pub fn b916(&self) -> B916_R[src]

Bit 20 - B916

pub fn b917(&self) -> B917_R[src]

Bit 21 - B917

pub fn b918(&self) -> B918_R[src]

Bit 22 - B918

pub fn b919(&self) -> B919_R[src]

Bit 23 - B919

pub fn b920(&self) -> B920_R[src]

Bit 24 - B920

pub fn b921(&self) -> B921_R[src]

Bit 25 - B921

pub fn b922(&self) -> B922_R[src]

Bit 26 - B922

pub fn b923(&self) -> B923_R[src]

Bit 27 - B923

pub fn b924(&self) -> B924_R[src]

Bit 28 - B924

pub fn b925(&self) -> B925_R[src]

Bit 29 - B925

pub fn b926(&self) -> B926_R[src]

Bit 30 - B926

pub fn b927(&self) -> B927_R[src]

Bit 31 - B927

impl R<u32, Reg<u32, _MPCBB1_VCTR29>>[src]

pub fn b928(&self) -> B928_R[src]

Bit 0 - B928

pub fn b929(&self) -> B929_R[src]

Bit 1 - B929

pub fn b930(&self) -> B930_R[src]

Bit 2 - B930

pub fn b931(&self) -> B931_R[src]

Bit 3 - B931

pub fn b932(&self) -> B932_R[src]

Bit 4 - B932

pub fn b933(&self) -> B933_R[src]

Bit 5 - B933

pub fn b934(&self) -> B934_R[src]

Bit 6 - B934

pub fn b935(&self) -> B935_R[src]

Bit 7 - B935

pub fn b936(&self) -> B936_R[src]

Bit 8 - B936

pub fn b937(&self) -> B937_R[src]

Bit 9 - B937

pub fn b938(&self) -> B938_R[src]

Bit 10 - B938

pub fn b939(&self) -> B939_R[src]

Bit 11 - B939

pub fn b940(&self) -> B940_R[src]

Bit 12 - B940

pub fn b941(&self) -> B941_R[src]

Bit 13 - B941

pub fn b942(&self) -> B942_R[src]

Bit 14 - B942

pub fn b943(&self) -> B943_R[src]

Bit 15 - B943

pub fn b944(&self) -> B944_R[src]

Bit 16 - B944

pub fn b945(&self) -> B945_R[src]

Bit 17 - B945

pub fn b946(&self) -> B946_R[src]

Bit 18 - B946

pub fn b947(&self) -> B947_R[src]

Bit 19 - B947

pub fn b948(&self) -> B948_R[src]

Bit 20 - B948

pub fn b949(&self) -> B949_R[src]

Bit 21 - B949

pub fn b950(&self) -> B950_R[src]

Bit 22 - B950

pub fn b951(&self) -> B951_R[src]

Bit 23 - B951

pub fn b952(&self) -> B952_R[src]

Bit 24 - B952

pub fn b953(&self) -> B953_R[src]

Bit 25 - B953

pub fn b954(&self) -> B954_R[src]

Bit 26 - B954

pub fn b955(&self) -> B955_R[src]

Bit 27 - B955

pub fn b956(&self) -> B956_R[src]

Bit 28 - B956

pub fn b957(&self) -> B957_R[src]

Bit 29 - B957

pub fn b958(&self) -> B958_R[src]

Bit 30 - B958

pub fn b959(&self) -> B959_R[src]

Bit 31 - B959

impl R<u32, Reg<u32, _MPCBB1_VCTR30>>[src]

pub fn b960(&self) -> B960_R[src]

Bit 0 - B960

pub fn b961(&self) -> B961_R[src]

Bit 1 - B961

pub fn b962(&self) -> B962_R[src]

Bit 2 - B962

pub fn b963(&self) -> B963_R[src]

Bit 3 - B963

pub fn b964(&self) -> B964_R[src]

Bit 4 - B964

pub fn b965(&self) -> B965_R[src]

Bit 5 - B965

pub fn b966(&self) -> B966_R[src]

Bit 6 - B966

pub fn b967(&self) -> B967_R[src]

Bit 7 - B967

pub fn b968(&self) -> B968_R[src]

Bit 8 - B968

pub fn b969(&self) -> B969_R[src]

Bit 9 - B969

pub fn b970(&self) -> B970_R[src]

Bit 10 - B970

pub fn b971(&self) -> B971_R[src]

Bit 11 - B971

pub fn b972(&self) -> B972_R[src]

Bit 12 - B972

pub fn b973(&self) -> B973_R[src]

Bit 13 - B973

pub fn b974(&self) -> B974_R[src]

Bit 14 - B974

pub fn b975(&self) -> B975_R[src]

Bit 15 - B975

pub fn b976(&self) -> B976_R[src]

Bit 16 - B976

pub fn b977(&self) -> B977_R[src]

Bit 17 - B977

pub fn b978(&self) -> B978_R[src]

Bit 18 - B978

pub fn b979(&self) -> B979_R[src]

Bit 19 - B979

pub fn b980(&self) -> B980_R[src]

Bit 20 - B980

pub fn b981(&self) -> B981_R[src]

Bit 21 - B981

pub fn b982(&self) -> B982_R[src]

Bit 22 - B982

pub fn b983(&self) -> B983_R[src]

Bit 23 - B983

pub fn b984(&self) -> B984_R[src]

Bit 24 - B984

pub fn b985(&self) -> B985_R[src]

Bit 25 - B985

pub fn b986(&self) -> B986_R[src]

Bit 26 - B986

pub fn b987(&self) -> B987_R[src]

Bit 27 - B987

pub fn b988(&self) -> B988_R[src]

Bit 28 - B988

pub fn b989(&self) -> B989_R[src]

Bit 29 - B989

pub fn b990(&self) -> B990_R[src]

Bit 30 - B990

pub fn b991(&self) -> B991_R[src]

Bit 31 - B991

impl R<u32, Reg<u32, _MPCBB1_VCTR31>>[src]

pub fn b992(&self) -> B992_R[src]

Bit 0 - B992

pub fn b993(&self) -> B993_R[src]

Bit 1 - B993

pub fn b994(&self) -> B994_R[src]

Bit 2 - B994

pub fn b995(&self) -> B995_R[src]

Bit 3 - B995

pub fn b996(&self) -> B996_R[src]

Bit 4 - B996

pub fn b997(&self) -> B997_R[src]

Bit 5 - B997

pub fn b998(&self) -> B998_R[src]

Bit 6 - B998

pub fn b999(&self) -> B999_R[src]

Bit 7 - B999

pub fn b1000(&self) -> B1000_R[src]

Bit 8 - B1000

pub fn b1001(&self) -> B1001_R[src]

Bit 9 - B1001

pub fn b1002(&self) -> B1002_R[src]

Bit 10 - B1002

pub fn b1003(&self) -> B1003_R[src]

Bit 11 - B1003

pub fn b1004(&self) -> B1004_R[src]

Bit 12 - B1004

pub fn b1005(&self) -> B1005_R[src]

Bit 13 - B1005

pub fn b1006(&self) -> B1006_R[src]

Bit 14 - B1006

pub fn b1007(&self) -> B1007_R[src]

Bit 15 - B1007

pub fn b1008(&self) -> B1008_R[src]

Bit 16 - B1008

pub fn b1009(&self) -> B1009_R[src]

Bit 17 - B1009

pub fn b1010(&self) -> B1010_R[src]

Bit 18 - B1010

pub fn b1011(&self) -> B1011_R[src]

Bit 19 - B1011

pub fn b1012(&self) -> B1012_R[src]

Bit 20 - B1012

pub fn b1013(&self) -> B1013_R[src]

Bit 21 - B1013

pub fn b1014(&self) -> B1014_R[src]

Bit 22 - B1014

pub fn b1015(&self) -> B1015_R[src]

Bit 23 - B1015

pub fn b1016(&self) -> B1016_R[src]

Bit 24 - B1016

pub fn b1017(&self) -> B1017_R[src]

Bit 25 - B1017

pub fn b1018(&self) -> B1018_R[src]

Bit 26 - B1018

pub fn b1019(&self) -> B1019_R[src]

Bit 27 - B1019

pub fn b1020(&self) -> B1020_R[src]

Bit 28 - B1020

pub fn b1021(&self) -> B1021_R[src]

Bit 29 - B1021

pub fn b1022(&self) -> B1022_R[src]

Bit 30 - B1022

pub fn b1023(&self) -> B1023_R[src]

Bit 31 - B1023

impl R<u32, Reg<u32, _MPCBB1_VCTR32>>[src]

pub fn b1024(&self) -> B1024_R[src]

Bit 0 - B1024

pub fn b1025(&self) -> B1025_R[src]

Bit 1 - B1025

pub fn b1026(&self) -> B1026_R[src]

Bit 2 - B1026

pub fn b1027(&self) -> B1027_R[src]

Bit 3 - B1027

pub fn b1028(&self) -> B1028_R[src]

Bit 4 - B1028

pub fn b1029(&self) -> B1029_R[src]

Bit 5 - B1029

pub fn b1030(&self) -> B1030_R[src]

Bit 6 - B1030

pub fn b1031(&self) -> B1031_R[src]

Bit 7 - B1031

pub fn b1032(&self) -> B1032_R[src]

Bit 8 - B1032

pub fn b1033(&self) -> B1033_R[src]

Bit 9 - B1033

pub fn b1034(&self) -> B1034_R[src]

Bit 10 - B1034

pub fn b1035(&self) -> B1035_R[src]

Bit 11 - B1035

pub fn b1036(&self) -> B1036_R[src]

Bit 12 - B1036

pub fn b1037(&self) -> B1037_R[src]

Bit 13 - B1037

pub fn b1038(&self) -> B1038_R[src]

Bit 14 - B1038

pub fn b1039(&self) -> B1039_R[src]

Bit 15 - B1039

pub fn b1040(&self) -> B1040_R[src]

Bit 16 - B1040

pub fn b1041(&self) -> B1041_R[src]

Bit 17 - B1041

pub fn b1042(&self) -> B1042_R[src]

Bit 18 - B1042

pub fn b1043(&self) -> B1043_R[src]

Bit 19 - B1043

pub fn b1044(&self) -> B1044_R[src]

Bit 20 - B1044

pub fn b1045(&self) -> B1045_R[src]

Bit 21 - B1045

pub fn b1046(&self) -> B1046_R[src]

Bit 22 - B1046

pub fn b1047(&self) -> B1047_R[src]

Bit 23 - B1047

pub fn b1048(&self) -> B1048_R[src]

Bit 24 - B1048

pub fn b1049(&self) -> B1049_R[src]

Bit 25 - B1049

pub fn b1050(&self) -> B1050_R[src]

Bit 26 - B1050

pub fn b1051(&self) -> B1051_R[src]

Bit 27 - B1051

pub fn b1052(&self) -> B1052_R[src]

Bit 28 - B1052

pub fn b1053(&self) -> B1053_R[src]

Bit 29 - B1053

pub fn b1054(&self) -> B1054_R[src]

Bit 30 - B1054

pub fn b1055(&self) -> B1055_R[src]

Bit 31 - B1055

impl R<u32, Reg<u32, _MPCBB1_VCTR33>>[src]

pub fn b1056(&self) -> B1056_R[src]

Bit 0 - B1056

pub fn b1057(&self) -> B1057_R[src]

Bit 1 - B1057

pub fn b1058(&self) -> B1058_R[src]

Bit 2 - B1058

pub fn b1059(&self) -> B1059_R[src]

Bit 3 - B1059

pub fn b1060(&self) -> B1060_R[src]

Bit 4 - B1060

pub fn b1061(&self) -> B1061_R[src]

Bit 5 - B1061

pub fn b1062(&self) -> B1062_R[src]

Bit 6 - B1062

pub fn b1063(&self) -> B1063_R[src]

Bit 7 - B1063

pub fn b1064(&self) -> B1064_R[src]

Bit 8 - B1064

pub fn b1065(&self) -> B1065_R[src]

Bit 9 - B1065

pub fn b1066(&self) -> B1066_R[src]

Bit 10 - B1066

pub fn b1067(&self) -> B1067_R[src]

Bit 11 - B1067

pub fn b1068(&self) -> B1068_R[src]

Bit 12 - B1068

pub fn b1069(&self) -> B1069_R[src]

Bit 13 - B1069

pub fn b1070(&self) -> B1070_R[src]

Bit 14 - B1070

pub fn b1071(&self) -> B1071_R[src]

Bit 15 - B1071

pub fn b1072(&self) -> B1072_R[src]

Bit 16 - B1072

pub fn b1073(&self) -> B1073_R[src]

Bit 17 - B1073

pub fn b1074(&self) -> B1074_R[src]

Bit 18 - B1074

pub fn b1075(&self) -> B1075_R[src]

Bit 19 - B1075

pub fn b1076(&self) -> B1076_R[src]

Bit 20 - B1076

pub fn b1077(&self) -> B1077_R[src]

Bit 21 - B1077

pub fn b1078(&self) -> B1078_R[src]

Bit 22 - B1078

pub fn b1079(&self) -> B1079_R[src]

Bit 23 - B1079

pub fn b1080(&self) -> B1080_R[src]

Bit 24 - B1080

pub fn b1081(&self) -> B1081_R[src]

Bit 25 - B1081

pub fn b1082(&self) -> B1082_R[src]

Bit 26 - B1082

pub fn b1083(&self) -> B1083_R[src]

Bit 27 - B1083

pub fn b1084(&self) -> B1084_R[src]

Bit 28 - B1084

pub fn b1085(&self) -> B1085_R[src]

Bit 29 - B1085

pub fn b1086(&self) -> B1086_R[src]

Bit 30 - B1086

pub fn b1087(&self) -> B1087_R[src]

Bit 31 - B1087

impl R<u32, Reg<u32, _MPCBB1_VCTR34>>[src]

pub fn b1088(&self) -> B1088_R[src]

Bit 0 - B1088

pub fn b1089(&self) -> B1089_R[src]

Bit 1 - B1089

pub fn b1090(&self) -> B1090_R[src]

Bit 2 - B1090

pub fn b1091(&self) -> B1091_R[src]

Bit 3 - B1091

pub fn b1092(&self) -> B1092_R[src]

Bit 4 - B1092

pub fn b1093(&self) -> B1093_R[src]

Bit 5 - B1093

pub fn b1094(&self) -> B1094_R[src]

Bit 6 - B1094

pub fn b1095(&self) -> B1095_R[src]

Bit 7 - B1095

pub fn b1096(&self) -> B1096_R[src]

Bit 8 - B1096

pub fn b1097(&self) -> B1097_R[src]

Bit 9 - B1097

pub fn b1098(&self) -> B1098_R[src]

Bit 10 - B1098

pub fn b1099(&self) -> B1099_R[src]

Bit 11 - B1099

pub fn b1100(&self) -> B1100_R[src]

Bit 12 - B1100

pub fn b1101(&self) -> B1101_R[src]

Bit 13 - B1101

pub fn b1102(&self) -> B1102_R[src]

Bit 14 - B1102

pub fn b1103(&self) -> B1103_R[src]

Bit 15 - B1103

pub fn b1104(&self) -> B1104_R[src]

Bit 16 - B1104

pub fn b1105(&self) -> B1105_R[src]

Bit 17 - B1105

pub fn b1106(&self) -> B1106_R[src]

Bit 18 - B1106

pub fn b1107(&self) -> B1107_R[src]

Bit 19 - B1107

pub fn b1108(&self) -> B1108_R[src]

Bit 20 - B1108

pub fn b1109(&self) -> B1109_R[src]

Bit 21 - B1109

pub fn b1110(&self) -> B1110_R[src]

Bit 22 - B1110

pub fn b1111(&self) -> B1111_R[src]

Bit 23 - B1111

pub fn b1112(&self) -> B1112_R[src]

Bit 24 - B1112

pub fn b1113(&self) -> B1113_R[src]

Bit 25 - B1113

pub fn b1114(&self) -> B1114_R[src]

Bit 26 - B1114

pub fn b1115(&self) -> B1115_R[src]

Bit 27 - B1115

pub fn b1116(&self) -> B1116_R[src]

Bit 28 - B1116

pub fn b1117(&self) -> B1117_R[src]

Bit 29 - B1117

pub fn b1118(&self) -> B1118_R[src]

Bit 30 - B1118

pub fn b1119(&self) -> B1119_R[src]

Bit 31 - B1119

impl R<u32, Reg<u32, _MPCBB1_VCTR35>>[src]

pub fn b1120(&self) -> B1120_R[src]

Bit 0 - B1120

pub fn b1121(&self) -> B1121_R[src]

Bit 1 - B1121

pub fn b1122(&self) -> B1122_R[src]

Bit 2 - B1122

pub fn b1123(&self) -> B1123_R[src]

Bit 3 - B1123

pub fn b1124(&self) -> B1124_R[src]

Bit 4 - B1124

pub fn b1125(&self) -> B1125_R[src]

Bit 5 - B1125

pub fn b1126(&self) -> B1126_R[src]

Bit 6 - B1126

pub fn b1127(&self) -> B1127_R[src]

Bit 7 - B1127

pub fn b1128(&self) -> B1128_R[src]

Bit 8 - B1128

pub fn b1129(&self) -> B1129_R[src]

Bit 9 - B1129

pub fn b1130(&self) -> B1130_R[src]

Bit 10 - B1130

pub fn b1131(&self) -> B1131_R[src]

Bit 11 - B1131

pub fn b1132(&self) -> B1132_R[src]

Bit 12 - B1132

pub fn b1133(&self) -> B1133_R[src]

Bit 13 - B1133

pub fn b1134(&self) -> B1134_R[src]

Bit 14 - B1134

pub fn b1135(&self) -> B1135_R[src]

Bit 15 - B1135

pub fn b1136(&self) -> B1136_R[src]

Bit 16 - B1136

pub fn b1137(&self) -> B1137_R[src]

Bit 17 - B1137

pub fn b1138(&self) -> B1138_R[src]

Bit 18 - B1138

pub fn b1139(&self) -> B1139_R[src]

Bit 19 - B1139

pub fn b1140(&self) -> B1140_R[src]

Bit 20 - B1140

pub fn b1141(&self) -> B1141_R[src]

Bit 21 - B1141

pub fn b1142(&self) -> B1142_R[src]

Bit 22 - B1142

pub fn b1143(&self) -> B1143_R[src]

Bit 23 - B1143

pub fn b1144(&self) -> B1144_R[src]

Bit 24 - B1144

pub fn b1145(&self) -> B1145_R[src]

Bit 25 - B1145

pub fn b1146(&self) -> B1146_R[src]

Bit 26 - B1146

pub fn b1147(&self) -> B1147_R[src]

Bit 27 - B1147

pub fn b1148(&self) -> B1148_R[src]

Bit 28 - B1148

pub fn b1149(&self) -> B1149_R[src]

Bit 29 - B1149

pub fn b1150(&self) -> B1150_R[src]

Bit 30 - B1150

pub fn b1151(&self) -> B1151_R[src]

Bit 31 - B1151

impl R<u32, Reg<u32, _MPCBB1_VCTR36>>[src]

pub fn b1152(&self) -> B1152_R[src]

Bit 0 - B1152

pub fn b1153(&self) -> B1153_R[src]

Bit 1 - B1153

pub fn b1154(&self) -> B1154_R[src]

Bit 2 - B1154

pub fn b1155(&self) -> B1155_R[src]

Bit 3 - B1155

pub fn b1156(&self) -> B1156_R[src]

Bit 4 - B1156

pub fn b1157(&self) -> B1157_R[src]

Bit 5 - B1157

pub fn b1158(&self) -> B1158_R[src]

Bit 6 - B1158

pub fn b1159(&self) -> B1159_R[src]

Bit 7 - B1159

pub fn b1160(&self) -> B1160_R[src]

Bit 8 - B1160

pub fn b1161(&self) -> B1161_R[src]

Bit 9 - B1161

pub fn b1162(&self) -> B1162_R[src]

Bit 10 - B1162

pub fn b1163(&self) -> B1163_R[src]

Bit 11 - B1163

pub fn b1164(&self) -> B1164_R[src]

Bit 12 - B1164

pub fn b1165(&self) -> B1165_R[src]

Bit 13 - B1165

pub fn b1166(&self) -> B1166_R[src]

Bit 14 - B1166

pub fn b1167(&self) -> B1167_R[src]

Bit 15 - B1167

pub fn b1168(&self) -> B1168_R[src]

Bit 16 - B1168

pub fn b1169(&self) -> B1169_R[src]

Bit 17 - B1169

pub fn b1170(&self) -> B1170_R[src]

Bit 18 - B1170

pub fn b1171(&self) -> B1171_R[src]

Bit 19 - B1171

pub fn b1172(&self) -> B1172_R[src]

Bit 20 - B1172

pub fn b1173(&self) -> B1173_R[src]

Bit 21 - B1173

pub fn b1174(&self) -> B1174_R[src]

Bit 22 - B1174

pub fn b1175(&self) -> B1175_R[src]

Bit 23 - B1175

pub fn b1176(&self) -> B1176_R[src]

Bit 24 - B1176

pub fn b1177(&self) -> B1177_R[src]

Bit 25 - B1177

pub fn b1178(&self) -> B1178_R[src]

Bit 26 - B1178

pub fn b1179(&self) -> B1179_R[src]

Bit 27 - B1179

pub fn b1180(&self) -> B1180_R[src]

Bit 28 - B1180

pub fn b1181(&self) -> B1181_R[src]

Bit 29 - B1181

pub fn b1182(&self) -> B1182_R[src]

Bit 30 - B1182

pub fn b1183(&self) -> B1183_R[src]

Bit 31 - B1183

impl R<u32, Reg<u32, _MPCBB1_VCTR37>>[src]

pub fn b1184(&self) -> B1184_R[src]

Bit 0 - B1184

pub fn b1185(&self) -> B1185_R[src]

Bit 1 - B1185

pub fn b1186(&self) -> B1186_R[src]

Bit 2 - B1186

pub fn b1187(&self) -> B1187_R[src]

Bit 3 - B1187

pub fn b1188(&self) -> B1188_R[src]

Bit 4 - B1188

pub fn b1189(&self) -> B1189_R[src]

Bit 5 - B1189

pub fn b1190(&self) -> B1190_R[src]

Bit 6 - B1190

pub fn b1191(&self) -> B1191_R[src]

Bit 7 - B1191

pub fn b1192(&self) -> B1192_R[src]

Bit 8 - B1192

pub fn b1193(&self) -> B1193_R[src]

Bit 9 - B1193

pub fn b1194(&self) -> B1194_R[src]

Bit 10 - B1194

pub fn b1195(&self) -> B1195_R[src]

Bit 11 - B1195

pub fn b1196(&self) -> B1196_R[src]

Bit 12 - B1196

pub fn b1197(&self) -> B1197_R[src]

Bit 13 - B1197

pub fn b1198(&self) -> B1198_R[src]

Bit 14 - B1198

pub fn b1199(&self) -> B1199_R[src]

Bit 15 - B1199

pub fn b1200(&self) -> B1200_R[src]

Bit 16 - B1200

pub fn b1201(&self) -> B1201_R[src]

Bit 17 - B1201

pub fn b1202(&self) -> B1202_R[src]

Bit 18 - B1202

pub fn b1203(&self) -> B1203_R[src]

Bit 19 - B1203

pub fn b1204(&self) -> B1204_R[src]

Bit 20 - B1204

pub fn b1205(&self) -> B1205_R[src]

Bit 21 - B1205

pub fn b1206(&self) -> B1206_R[src]

Bit 22 - B1206

pub fn b1207(&self) -> B1207_R[src]

Bit 23 - B1207

pub fn b1208(&self) -> B1208_R[src]

Bit 24 - B1208

pub fn b1209(&self) -> B1209_R[src]

Bit 25 - B1209

pub fn b1210(&self) -> B1210_R[src]

Bit 26 - B1210

pub fn b1211(&self) -> B1211_R[src]

Bit 27 - B1211

pub fn b1212(&self) -> B1212_R[src]

Bit 28 - B1212

pub fn b1213(&self) -> B1213_R[src]

Bit 29 - B1213

pub fn b1214(&self) -> B1214_R[src]

Bit 30 - B1214

pub fn b1215(&self) -> B1215_R[src]

Bit 31 - B1215

impl R<u32, Reg<u32, _MPCBB1_VCTR38>>[src]

pub fn b1216(&self) -> B1216_R[src]

Bit 0 - B1216

pub fn b1217(&self) -> B1217_R[src]

Bit 1 - B1217

pub fn b1218(&self) -> B1218_R[src]

Bit 2 - B1218

pub fn b1219(&self) -> B1219_R[src]

Bit 3 - B1219

pub fn b1220(&self) -> B1220_R[src]

Bit 4 - B1220

pub fn b1221(&self) -> B1221_R[src]

Bit 5 - B1221

pub fn b1222(&self) -> B1222_R[src]

Bit 6 - B1222

pub fn b1223(&self) -> B1223_R[src]

Bit 7 - B1223

pub fn b1224(&self) -> B1224_R[src]

Bit 8 - B1224

pub fn b1225(&self) -> B1225_R[src]

Bit 9 - B1225

pub fn b1226(&self) -> B1226_R[src]

Bit 10 - B1226

pub fn b1227(&self) -> B1227_R[src]

Bit 11 - B1227

pub fn b1228(&self) -> B1228_R[src]

Bit 12 - B1228

pub fn b1229(&self) -> B1229_R[src]

Bit 13 - B1229

pub fn b1230(&self) -> B1230_R[src]

Bit 14 - B1230

pub fn b1231(&self) -> B1231_R[src]

Bit 15 - B1231

pub fn b1232(&self) -> B1232_R[src]

Bit 16 - B1232

pub fn b1233(&self) -> B1233_R[src]

Bit 17 - B1233

pub fn b1234(&self) -> B1234_R[src]

Bit 18 - B1234

pub fn b1235(&self) -> B1235_R[src]

Bit 19 - B1235

pub fn b1236(&self) -> B1236_R[src]

Bit 20 - B1236

pub fn b1237(&self) -> B1237_R[src]

Bit 21 - B1237

pub fn b1238(&self) -> B1238_R[src]

Bit 22 - B1238

pub fn b1239(&self) -> B1239_R[src]

Bit 23 - B1239

pub fn b1240(&self) -> B1240_R[src]

Bit 24 - B1240

pub fn b1241(&self) -> B1241_R[src]

Bit 25 - B1241

pub fn b1242(&self) -> B1242_R[src]

Bit 26 - B1242

pub fn b1243(&self) -> B1243_R[src]

Bit 27 - B1243

pub fn b1244(&self) -> B1244_R[src]

Bit 28 - B1244

pub fn b1245(&self) -> B1245_R[src]

Bit 29 - B1245

pub fn b1246(&self) -> B1246_R[src]

Bit 30 - B1246

pub fn b1247(&self) -> B1247_R[src]

Bit 31 - B1247

impl R<u32, Reg<u32, _MPCBB1_VCTR39>>[src]

pub fn b1248(&self) -> B1248_R[src]

Bit 0 - B1248

pub fn b1249(&self) -> B1249_R[src]

Bit 1 - B1249

pub fn b1250(&self) -> B1250_R[src]

Bit 2 - B1250

pub fn b1251(&self) -> B1251_R[src]

Bit 3 - B1251

pub fn b1252(&self) -> B1252_R[src]

Bit 4 - B1252

pub fn b1253(&self) -> B1253_R[src]

Bit 5 - B1253

pub fn b1254(&self) -> B1254_R[src]

Bit 6 - B1254

pub fn b1255(&self) -> B1255_R[src]

Bit 7 - B1255

pub fn b1256(&self) -> B1256_R[src]

Bit 8 - B1256

pub fn b1257(&self) -> B1257_R[src]

Bit 9 - B1257

pub fn b1258(&self) -> B1258_R[src]

Bit 10 - B1258

pub fn b1259(&self) -> B1259_R[src]

Bit 11 - B1259

pub fn b1260(&self) -> B1260_R[src]

Bit 12 - B1260

pub fn b1261(&self) -> B1261_R[src]

Bit 13 - B1261

pub fn b1262(&self) -> B1262_R[src]

Bit 14 - B1262

pub fn b1263(&self) -> B1263_R[src]

Bit 15 - B1263

pub fn b1264(&self) -> B1264_R[src]

Bit 16 - B1264

pub fn b1265(&self) -> B1265_R[src]

Bit 17 - B1265

pub fn b1266(&self) -> B1266_R[src]

Bit 18 - B1266

pub fn b1267(&self) -> B1267_R[src]

Bit 19 - B1267

pub fn b1268(&self) -> B1268_R[src]

Bit 20 - B1268

pub fn b1269(&self) -> B1269_R[src]

Bit 21 - B1269

pub fn b1270(&self) -> B1270_R[src]

Bit 22 - B1270

pub fn b1271(&self) -> B1271_R[src]

Bit 23 - B1271

pub fn b1272(&self) -> B1272_R[src]

Bit 24 - B1272

pub fn b1273(&self) -> B1273_R[src]

Bit 25 - B1273

pub fn b1274(&self) -> B1274_R[src]

Bit 26 - B1274

pub fn b1275(&self) -> B1275_R[src]

Bit 27 - B1275

pub fn b1276(&self) -> B1276_R[src]

Bit 28 - B1276

pub fn b1277(&self) -> B1277_R[src]

Bit 29 - B1277

pub fn b1278(&self) -> B1278_R[src]

Bit 30 - B1278

pub fn b1279(&self) -> B1279_R[src]

Bit 31 - B1279

impl R<u32, Reg<u32, _MPCBB1_VCTR40>>[src]

pub fn b1280(&self) -> B1280_R[src]

Bit 0 - B1280

pub fn b1281(&self) -> B1281_R[src]

Bit 1 - B1281

pub fn b1282(&self) -> B1282_R[src]

Bit 2 - B1282

pub fn b1283(&self) -> B1283_R[src]

Bit 3 - B1283

pub fn b1284(&self) -> B1284_R[src]

Bit 4 - B1284

pub fn b1285(&self) -> B1285_R[src]

Bit 5 - B1285

pub fn b1286(&self) -> B1286_R[src]

Bit 6 - B1286

pub fn b1287(&self) -> B1287_R[src]

Bit 7 - B1287

pub fn b1288(&self) -> B1288_R[src]

Bit 8 - B1288

pub fn b1289(&self) -> B1289_R[src]

Bit 9 - B1289

pub fn b1290(&self) -> B1290_R[src]

Bit 10 - B1290

pub fn b1291(&self) -> B1291_R[src]

Bit 11 - B1291

pub fn b1292(&self) -> B1292_R[src]

Bit 12 - B1292

pub fn b1293(&self) -> B1293_R[src]

Bit 13 - B1293

pub fn b1294(&self) -> B1294_R[src]

Bit 14 - B1294

pub fn b1295(&self) -> B1295_R[src]

Bit 15 - B1295

pub fn b1296(&self) -> B1296_R[src]

Bit 16 - B1296

pub fn b1297(&self) -> B1297_R[src]

Bit 17 - B1297

pub fn b1298(&self) -> B1298_R[src]

Bit 18 - B1298

pub fn b1299(&self) -> B1299_R[src]

Bit 19 - B1299

pub fn b1300(&self) -> B1300_R[src]

Bit 20 - B1300

pub fn b1301(&self) -> B1301_R[src]

Bit 21 - B1301

pub fn b1302(&self) -> B1302_R[src]

Bit 22 - B1302

pub fn b1303(&self) -> B1303_R[src]

Bit 23 - B1303

pub fn b1304(&self) -> B1304_R[src]

Bit 24 - B1304

pub fn b1305(&self) -> B1305_R[src]

Bit 25 - B1305

pub fn b1306(&self) -> B1306_R[src]

Bit 26 - B1306

pub fn b1307(&self) -> B1307_R[src]

Bit 27 - B1307

pub fn b1308(&self) -> B1308_R[src]

Bit 28 - B1308

pub fn b1309(&self) -> B1309_R[src]

Bit 29 - B1309

pub fn b1310(&self) -> B1310_R[src]

Bit 30 - B1310

pub fn b1311(&self) -> B1311_R[src]

Bit 31 - B1311

impl R<u32, Reg<u32, _MPCBB1_VCTR41>>[src]

pub fn b1312(&self) -> B1312_R[src]

Bit 0 - B1312

pub fn b1313(&self) -> B1313_R[src]

Bit 1 - B1313

pub fn b1314(&self) -> B1314_R[src]

Bit 2 - B1314

pub fn b1315(&self) -> B1315_R[src]

Bit 3 - B1315

pub fn b1316(&self) -> B1316_R[src]

Bit 4 - B1316

pub fn b1317(&self) -> B1317_R[src]

Bit 5 - B1317

pub fn b1318(&self) -> B1318_R[src]

Bit 6 - B1318

pub fn b1319(&self) -> B1319_R[src]

Bit 7 - B1319

pub fn b1320(&self) -> B1320_R[src]

Bit 8 - B1320

pub fn b1321(&self) -> B1321_R[src]

Bit 9 - B1321

pub fn b1322(&self) -> B1322_R[src]

Bit 10 - B1322

pub fn b1323(&self) -> B1323_R[src]

Bit 11 - B1323

pub fn b1324(&self) -> B1324_R[src]

Bit 12 - B1324

pub fn b1325(&self) -> B1325_R[src]

Bit 13 - B1325

pub fn b1326(&self) -> B1326_R[src]

Bit 14 - B1326

pub fn b1327(&self) -> B1327_R[src]

Bit 15 - B1327

pub fn b1328(&self) -> B1328_R[src]

Bit 16 - B1328

pub fn b1329(&self) -> B1329_R[src]

Bit 17 - B1329

pub fn b1330(&self) -> B1330_R[src]

Bit 18 - B1330

pub fn b1331(&self) -> B1331_R[src]

Bit 19 - B1331

pub fn b1332(&self) -> B1332_R[src]

Bit 20 - B1332

pub fn b1333(&self) -> B1333_R[src]

Bit 21 - B1333

pub fn b1334(&self) -> B1334_R[src]

Bit 22 - B1334

pub fn b1335(&self) -> B1335_R[src]

Bit 23 - B1335

pub fn b1336(&self) -> B1336_R[src]

Bit 24 - B1336

pub fn b1337(&self) -> B1337_R[src]

Bit 25 - B1337

pub fn b1338(&self) -> B1338_R[src]

Bit 26 - B1338

pub fn b1339(&self) -> B1339_R[src]

Bit 27 - B1339

pub fn b1340(&self) -> B1340_R[src]

Bit 28 - B1340

pub fn b1341(&self) -> B1341_R[src]

Bit 29 - B1341

pub fn b1342(&self) -> B1342_R[src]

Bit 30 - B1342

pub fn b1343(&self) -> B1343_R[src]

Bit 31 - B1343

impl R<u32, Reg<u32, _MPCBB1_VCTR42>>[src]

pub fn b1344(&self) -> B1344_R[src]

Bit 0 - B1344

pub fn b1345(&self) -> B1345_R[src]

Bit 1 - B1345

pub fn b1346(&self) -> B1346_R[src]

Bit 2 - B1346

pub fn b1347(&self) -> B1347_R[src]

Bit 3 - B1347

pub fn b1348(&self) -> B1348_R[src]

Bit 4 - B1348

pub fn b1349(&self) -> B1349_R[src]

Bit 5 - B1349

pub fn b1350(&self) -> B1350_R[src]

Bit 6 - B1350

pub fn b1351(&self) -> B1351_R[src]

Bit 7 - B1351

pub fn b1352(&self) -> B1352_R[src]

Bit 8 - B1352

pub fn b1353(&self) -> B1353_R[src]

Bit 9 - B1353

pub fn b1354(&self) -> B1354_R[src]

Bit 10 - B1354

pub fn b1355(&self) -> B1355_R[src]

Bit 11 - B1355

pub fn b1356(&self) -> B1356_R[src]

Bit 12 - B1356

pub fn b1357(&self) -> B1357_R[src]

Bit 13 - B1357

pub fn b1358(&self) -> B1358_R[src]

Bit 14 - B1358

pub fn b1359(&self) -> B1359_R[src]

Bit 15 - B1359

pub fn b1360(&self) -> B1360_R[src]

Bit 16 - B1360

pub fn b1361(&self) -> B1361_R[src]

Bit 17 - B1361

pub fn b1362(&self) -> B1362_R[src]

Bit 18 - B1362

pub fn b1363(&self) -> B1363_R[src]

Bit 19 - B1363

pub fn b1364(&self) -> B1364_R[src]

Bit 20 - B1364

pub fn b1365(&self) -> B1365_R[src]

Bit 21 - B1365

pub fn b1366(&self) -> B1366_R[src]

Bit 22 - B1366

pub fn b1367(&self) -> B1367_R[src]

Bit 23 - B1367

pub fn b1368(&self) -> B1368_R[src]

Bit 24 - B1368

pub fn b1369(&self) -> B1369_R[src]

Bit 25 - B1369

pub fn b1370(&self) -> B1370_R[src]

Bit 26 - B1370

pub fn b1371(&self) -> B1371_R[src]

Bit 27 - B1371

pub fn b1372(&self) -> B1372_R[src]

Bit 28 - B1372

pub fn b1373(&self) -> B1373_R[src]

Bit 29 - B1373

pub fn b1374(&self) -> B1374_R[src]

Bit 30 - B1374

pub fn b1375(&self) -> B1375_R[src]

Bit 31 - B1375

impl R<u32, Reg<u32, _MPCBB1_VCTR43>>[src]

pub fn b1376(&self) -> B1376_R[src]

Bit 0 - B1376

pub fn b1377(&self) -> B1377_R[src]

Bit 1 - B1377

pub fn b1378(&self) -> B1378_R[src]

Bit 2 - B1378

pub fn b1379(&self) -> B1379_R[src]

Bit 3 - B1379

pub fn b1380(&self) -> B1380_R[src]

Bit 4 - B1380

pub fn b1381(&self) -> B1381_R[src]

Bit 5 - B1381

pub fn b1382(&self) -> B1382_R[src]

Bit 6 - B1382

pub fn b1383(&self) -> B1383_R[src]

Bit 7 - B1383

pub fn b1384(&self) -> B1384_R[src]

Bit 8 - B1384

pub fn b1385(&self) -> B1385_R[src]

Bit 9 - B1385

pub fn b1386(&self) -> B1386_R[src]

Bit 10 - B1386

pub fn b1387(&self) -> B1387_R[src]

Bit 11 - B1387

pub fn b1388(&self) -> B1388_R[src]

Bit 12 - B1388

pub fn b1389(&self) -> B1389_R[src]

Bit 13 - B1389

pub fn b1390(&self) -> B1390_R[src]

Bit 14 - B1390

pub fn b1391(&self) -> B1391_R[src]

Bit 15 - B1391

pub fn b1392(&self) -> B1392_R[src]

Bit 16 - B1392

pub fn b1393(&self) -> B1393_R[src]

Bit 17 - B1393

pub fn b1394(&self) -> B1394_R[src]

Bit 18 - B1394

pub fn b1395(&self) -> B1395_R[src]

Bit 19 - B1395

pub fn b1396(&self) -> B1396_R[src]

Bit 20 - B1396

pub fn b1397(&self) -> B1397_R[src]

Bit 21 - B1397

pub fn b1398(&self) -> B1398_R[src]

Bit 22 - B1398

pub fn b1399(&self) -> B1399_R[src]

Bit 23 - B1399

pub fn b1400(&self) -> B1400_R[src]

Bit 24 - B1400

pub fn b1401(&self) -> B1401_R[src]

Bit 25 - B1401

pub fn b1402(&self) -> B1402_R[src]

Bit 26 - B1402

pub fn b1403(&self) -> B1403_R[src]

Bit 27 - B1403

pub fn b1404(&self) -> B1404_R[src]

Bit 28 - B1404

pub fn b1405(&self) -> B1405_R[src]

Bit 29 - B1405

pub fn b1406(&self) -> B1406_R[src]

Bit 30 - B1406

pub fn b1407(&self) -> B1407_R[src]

Bit 31 - B1407

impl R<u32, Reg<u32, _MPCBB1_VCTR44>>[src]

pub fn b1408(&self) -> B1408_R[src]

Bit 0 - B1408

pub fn b1409(&self) -> B1409_R[src]

Bit 1 - B1409

pub fn b1410(&self) -> B1410_R[src]

Bit 2 - B1410

pub fn b1411(&self) -> B1411_R[src]

Bit 3 - B1411

pub fn b1412(&self) -> B1412_R[src]

Bit 4 - B1412

pub fn b1413(&self) -> B1413_R[src]

Bit 5 - B1413

pub fn b1414(&self) -> B1414_R[src]

Bit 6 - B1414

pub fn b1415(&self) -> B1415_R[src]

Bit 7 - B1415

pub fn b1416(&self) -> B1416_R[src]

Bit 8 - B1416

pub fn b1417(&self) -> B1417_R[src]

Bit 9 - B1417

pub fn b1418(&self) -> B1418_R[src]

Bit 10 - B1418

pub fn b1419(&self) -> B1419_R[src]

Bit 11 - B1419

pub fn b1420(&self) -> B1420_R[src]

Bit 12 - B1420

pub fn b1421(&self) -> B1421_R[src]

Bit 13 - B1421

pub fn b1422(&self) -> B1422_R[src]

Bit 14 - B1422

pub fn b1423(&self) -> B1423_R[src]

Bit 15 - B1423

pub fn b1424(&self) -> B1424_R[src]

Bit 16 - B1424

pub fn b1425(&self) -> B1425_R[src]

Bit 17 - B1425

pub fn b1426(&self) -> B1426_R[src]

Bit 18 - B1426

pub fn b1427(&self) -> B1427_R[src]

Bit 19 - B1427

pub fn b1428(&self) -> B1428_R[src]

Bit 20 - B1428

pub fn b1429(&self) -> B1429_R[src]

Bit 21 - B1429

pub fn b1430(&self) -> B1430_R[src]

Bit 22 - B1430

pub fn b1431(&self) -> B1431_R[src]

Bit 23 - B1431

pub fn b1432(&self) -> B1432_R[src]

Bit 24 - B1432

pub fn b1433(&self) -> B1433_R[src]

Bit 25 - B1433

pub fn b1434(&self) -> B1434_R[src]

Bit 26 - B1434

pub fn b1435(&self) -> B1435_R[src]

Bit 27 - B1435

pub fn b1436(&self) -> B1436_R[src]

Bit 28 - B1436

pub fn b1437(&self) -> B1437_R[src]

Bit 29 - B1437

pub fn b1438(&self) -> B1438_R[src]

Bit 30 - B1438

pub fn b1439(&self) -> B1439_R[src]

Bit 31 - B1439

impl R<u32, Reg<u32, _MPCBB1_VCTR45>>[src]

pub fn b1440(&self) -> B1440_R[src]

Bit 0 - B1440

pub fn b1441(&self) -> B1441_R[src]

Bit 1 - B1441

pub fn b1442(&self) -> B1442_R[src]

Bit 2 - B1442

pub fn b1443(&self) -> B1443_R[src]

Bit 3 - B1443

pub fn b1444(&self) -> B1444_R[src]

Bit 4 - B1444

pub fn b1445(&self) -> B1445_R[src]

Bit 5 - B1445

pub fn b1446(&self) -> B1446_R[src]

Bit 6 - B1446

pub fn b1447(&self) -> B1447_R[src]

Bit 7 - B1447

pub fn b1448(&self) -> B1448_R[src]

Bit 8 - B1448

pub fn b1449(&self) -> B1449_R[src]

Bit 9 - B1449

pub fn b1450(&self) -> B1450_R[src]

Bit 10 - B1450

pub fn b1451(&self) -> B1451_R[src]

Bit 11 - B1451

pub fn b1452(&self) -> B1452_R[src]

Bit 12 - B1452

pub fn b1453(&self) -> B1453_R[src]

Bit 13 - B1453

pub fn b1454(&self) -> B1454_R[src]

Bit 14 - B1454

pub fn b1455(&self) -> B1455_R[src]

Bit 15 - B1455

pub fn b1456(&self) -> B1456_R[src]

Bit 16 - B1456

pub fn b1457(&self) -> B1457_R[src]

Bit 17 - B1457

pub fn b1458(&self) -> B1458_R[src]

Bit 18 - B1458

pub fn b1459(&self) -> B1459_R[src]

Bit 19 - B1459

pub fn b1460(&self) -> B1460_R[src]

Bit 20 - B1460

pub fn b1461(&self) -> B1461_R[src]

Bit 21 - B1461

pub fn b1462(&self) -> B1462_R[src]

Bit 22 - B1462

pub fn b1463(&self) -> B1463_R[src]

Bit 23 - B1463

pub fn b1464(&self) -> B1464_R[src]

Bit 24 - B1464

pub fn b1465(&self) -> B1465_R[src]

Bit 25 - B1465

pub fn b1466(&self) -> B1466_R[src]

Bit 26 - B1466

pub fn b1467(&self) -> B1467_R[src]

Bit 27 - B1467

pub fn b1468(&self) -> B1468_R[src]

Bit 28 - B1468

pub fn b1469(&self) -> B1469_R[src]

Bit 29 - B1469

pub fn b1470(&self) -> B1470_R[src]

Bit 30 - B1470

pub fn b1471(&self) -> B1471_R[src]

Bit 31 - B1471

impl R<u32, Reg<u32, _MPCBB1_VCTR46>>[src]

pub fn b1472(&self) -> B1472_R[src]

Bit 0 - B1472

pub fn b1473(&self) -> B1473_R[src]

Bit 1 - B1473

pub fn b1474(&self) -> B1474_R[src]

Bit 2 - B1474

pub fn b1475(&self) -> B1475_R[src]

Bit 3 - B1475

pub fn b1476(&self) -> B1476_R[src]

Bit 4 - B1476

pub fn b1477(&self) -> B1477_R[src]

Bit 5 - B1477

pub fn b1478(&self) -> B1478_R[src]

Bit 6 - B1478

pub fn b1479(&self) -> B1479_R[src]

Bit 7 - B1479

pub fn b1480(&self) -> B1480_R[src]

Bit 8 - B1480

pub fn b1481(&self) -> B1481_R[src]

Bit 9 - B1481

pub fn b1482(&self) -> B1482_R[src]

Bit 10 - B1482

pub fn b1483(&self) -> B1483_R[src]

Bit 11 - B1483

pub fn b1484(&self) -> B1484_R[src]

Bit 12 - B1484

pub fn b1485(&self) -> B1485_R[src]

Bit 13 - B1485

pub fn b1486(&self) -> B1486_R[src]

Bit 14 - B1486

pub fn b1487(&self) -> B1487_R[src]

Bit 15 - B1487

pub fn b1488(&self) -> B1488_R[src]

Bit 16 - B1488

pub fn b1489(&self) -> B1489_R[src]

Bit 17 - B1489

pub fn b1490(&self) -> B1490_R[src]

Bit 18 - B1490

pub fn b1491(&self) -> B1491_R[src]

Bit 19 - B1491

pub fn b1492(&self) -> B1492_R[src]

Bit 20 - B1492

pub fn b1493(&self) -> B1493_R[src]

Bit 21 - B1493

pub fn b1494(&self) -> B1494_R[src]

Bit 22 - B1494

pub fn b1495(&self) -> B1495_R[src]

Bit 23 - B1495

pub fn b1496(&self) -> B1496_R[src]

Bit 24 - B1496

pub fn b1497(&self) -> B1497_R[src]

Bit 25 - B1497

pub fn b1498(&self) -> B1498_R[src]

Bit 26 - B1498

pub fn b1499(&self) -> B1499_R[src]

Bit 27 - B1499

pub fn b1500(&self) -> B1500_R[src]

Bit 28 - B1500

pub fn b1501(&self) -> B1501_R[src]

Bit 29 - B1501

pub fn b1502(&self) -> B1502_R[src]

Bit 30 - B1502

pub fn b1503(&self) -> B1503_R[src]

Bit 31 - B1503

impl R<u32, Reg<u32, _MPCBB1_VCTR47>>[src]

pub fn b1504(&self) -> B1504_R[src]

Bit 0 - B1504

pub fn b1505(&self) -> B1505_R[src]

Bit 1 - B1505

pub fn b1506(&self) -> B1506_R[src]

Bit 2 - B1506

pub fn b1507(&self) -> B1507_R[src]

Bit 3 - B1507

pub fn b1508(&self) -> B1508_R[src]

Bit 4 - B1508

pub fn b1509(&self) -> B1509_R[src]

Bit 5 - B1509

pub fn b1510(&self) -> B1510_R[src]

Bit 6 - B1510

pub fn b1511(&self) -> B1511_R[src]

Bit 7 - B1511

pub fn b1512(&self) -> B1512_R[src]

Bit 8 - B1512

pub fn b1513(&self) -> B1513_R[src]

Bit 9 - B1513

pub fn b1514(&self) -> B1514_R[src]

Bit 10 - B1514

pub fn b1515(&self) -> B1515_R[src]

Bit 11 - B1515

pub fn b1516(&self) -> B1516_R[src]

Bit 12 - B1516

pub fn b1517(&self) -> B1517_R[src]

Bit 13 - B1517

pub fn b1518(&self) -> B1518_R[src]

Bit 14 - B1518

pub fn b1519(&self) -> B1519_R[src]

Bit 15 - B1519

pub fn b1520(&self) -> B1520_R[src]

Bit 16 - B1520

pub fn b1521(&self) -> B1521_R[src]

Bit 17 - B1521

pub fn b1522(&self) -> B1522_R[src]

Bit 18 - B1522

pub fn b1523(&self) -> B1523_R[src]

Bit 19 - B1523

pub fn b1524(&self) -> B1524_R[src]

Bit 20 - B1524

pub fn b1525(&self) -> B1525_R[src]

Bit 21 - B1525

pub fn b1526(&self) -> B1526_R[src]

Bit 22 - B1526

pub fn b1527(&self) -> B1527_R[src]

Bit 23 - B1527

pub fn b1528(&self) -> B1528_R[src]

Bit 24 - B1528

pub fn b1529(&self) -> B1529_R[src]

Bit 25 - B1529

pub fn b1530(&self) -> B1530_R[src]

Bit 26 - B1530

pub fn b1531(&self) -> B1531_R[src]

Bit 27 - B1531

pub fn b1532(&self) -> B1532_R[src]

Bit 28 - B1532

pub fn b1533(&self) -> B1533_R[src]

Bit 29 - B1533

pub fn b1534(&self) -> B1534_R[src]

Bit 30 - B1534

pub fn b1535(&self) -> B1535_R[src]

Bit 31 - B1535

impl R<u32, Reg<u32, _MPCBB1_VCTR48>>[src]

pub fn b1536(&self) -> B1536_R[src]

Bit 0 - B1536

pub fn b1537(&self) -> B1537_R[src]

Bit 1 - B1537

pub fn b1538(&self) -> B1538_R[src]

Bit 2 - B1538

pub fn b1539(&self) -> B1539_R[src]

Bit 3 - B1539

pub fn b1540(&self) -> B1540_R[src]

Bit 4 - B1540

pub fn b1541(&self) -> B1541_R[src]

Bit 5 - B1541

pub fn b1542(&self) -> B1542_R[src]

Bit 6 - B1542

pub fn b1543(&self) -> B1543_R[src]

Bit 7 - B1543

pub fn b1544(&self) -> B1544_R[src]

Bit 8 - B1544

pub fn b1545(&self) -> B1545_R[src]

Bit 9 - B1545

pub fn b1546(&self) -> B1546_R[src]

Bit 10 - B1546

pub fn b1547(&self) -> B1547_R[src]

Bit 11 - B1547

pub fn b1548(&self) -> B1548_R[src]

Bit 12 - B1548

pub fn b1549(&self) -> B1549_R[src]

Bit 13 - B1549

pub fn b1550(&self) -> B1550_R[src]

Bit 14 - B1550

pub fn b1551(&self) -> B1551_R[src]

Bit 15 - B1551

pub fn b1552(&self) -> B1552_R[src]

Bit 16 - B1552

pub fn b1553(&self) -> B1553_R[src]

Bit 17 - B1553

pub fn b1554(&self) -> B1554_R[src]

Bit 18 - B1554

pub fn b1555(&self) -> B1555_R[src]

Bit 19 - B1555

pub fn b1556(&self) -> B1556_R[src]

Bit 20 - B1556

pub fn b1557(&self) -> B1557_R[src]

Bit 21 - B1557

pub fn b1558(&self) -> B1558_R[src]

Bit 22 - B1558

pub fn b1559(&self) -> B1559_R[src]

Bit 23 - B1559

pub fn b1560(&self) -> B1560_R[src]

Bit 24 - B1560

pub fn b1561(&self) -> B1561_R[src]

Bit 25 - B1561

pub fn b1562(&self) -> B1562_R[src]

Bit 26 - B1562

pub fn b1563(&self) -> B1563_R[src]

Bit 27 - B1563

pub fn b1564(&self) -> B1564_R[src]

Bit 28 - B1564

pub fn b1565(&self) -> B1565_R[src]

Bit 29 - B1565

pub fn b1566(&self) -> B1566_R[src]

Bit 30 - B1566

pub fn b1567(&self) -> B1567_R[src]

Bit 31 - B1567

impl R<u32, Reg<u32, _MPCBB1_VCTR49>>[src]

pub fn b1568(&self) -> B1568_R[src]

Bit 0 - B1568

pub fn b1569(&self) -> B1569_R[src]

Bit 1 - B1569

pub fn b1570(&self) -> B1570_R[src]

Bit 2 - B1570

pub fn b1571(&self) -> B1571_R[src]

Bit 3 - B1571

pub fn b1572(&self) -> B1572_R[src]

Bit 4 - B1572

pub fn b1573(&self) -> B1573_R[src]

Bit 5 - B1573

pub fn b1574(&self) -> B1574_R[src]

Bit 6 - B1574

pub fn b1575(&self) -> B1575_R[src]

Bit 7 - B1575

pub fn b1576(&self) -> B1576_R[src]

Bit 8 - B1576

pub fn b1577(&self) -> B1577_R[src]

Bit 9 - B1577

pub fn b1578(&self) -> B1578_R[src]

Bit 10 - B1578

pub fn b1579(&self) -> B1579_R[src]

Bit 11 - B1579

pub fn b1580(&self) -> B1580_R[src]

Bit 12 - B1580

pub fn b1581(&self) -> B1581_R[src]

Bit 13 - B1581

pub fn b1582(&self) -> B1582_R[src]

Bit 14 - B1582

pub fn b1583(&self) -> B1583_R[src]

Bit 15 - B1583

pub fn b1584(&self) -> B1584_R[src]

Bit 16 - B1584

pub fn b1585(&self) -> B1585_R[src]

Bit 17 - B1585

pub fn b1586(&self) -> B1586_R[src]

Bit 18 - B1586

pub fn b1587(&self) -> B1587_R[src]

Bit 19 - B1587

pub fn b1588(&self) -> B1588_R[src]

Bit 20 - B1588

pub fn b1589(&self) -> B1589_R[src]

Bit 21 - B1589

pub fn b1590(&self) -> B1590_R[src]

Bit 22 - B1590

pub fn b1591(&self) -> B1591_R[src]

Bit 23 - B1591

pub fn b1592(&self) -> B1592_R[src]

Bit 24 - B1592

pub fn b1593(&self) -> B1593_R[src]

Bit 25 - B1593

pub fn b1594(&self) -> B1594_R[src]

Bit 26 - B1594

pub fn b1595(&self) -> B1595_R[src]

Bit 27 - B1595

pub fn b1596(&self) -> B1596_R[src]

Bit 28 - B1596

pub fn b1597(&self) -> B1597_R[src]

Bit 29 - B1597

pub fn b1598(&self) -> B1598_R[src]

Bit 30 - B1598

pub fn b1599(&self) -> B1599_R[src]

Bit 31 - B1599

impl R<u32, Reg<u32, _MPCBB1_VCTR50>>[src]

pub fn b1600(&self) -> B1600_R[src]

Bit 0 - B1600

pub fn b1601(&self) -> B1601_R[src]

Bit 1 - B1601

pub fn b1602(&self) -> B1602_R[src]

Bit 2 - B1602

pub fn b1603(&self) -> B1603_R[src]

Bit 3 - B1603

pub fn b1604(&self) -> B1604_R[src]

Bit 4 - B1604

pub fn b1605(&self) -> B1605_R[src]

Bit 5 - B1605

pub fn b1606(&self) -> B1606_R[src]

Bit 6 - B1606

pub fn b1607(&self) -> B1607_R[src]

Bit 7 - B1607

pub fn b1608(&self) -> B1608_R[src]

Bit 8 - B1608

pub fn b1609(&self) -> B1609_R[src]

Bit 9 - B1609

pub fn b1610(&self) -> B1610_R[src]

Bit 10 - B1610

pub fn b1611(&self) -> B1611_R[src]

Bit 11 - B1611

pub fn b1612(&self) -> B1612_R[src]

Bit 12 - B1612

pub fn b1613(&self) -> B1613_R[src]

Bit 13 - B1613

pub fn b1614(&self) -> B1614_R[src]

Bit 14 - B1614

pub fn b1615(&self) -> B1615_R[src]

Bit 15 - B1615

pub fn b1616(&self) -> B1616_R[src]

Bit 16 - B1616

pub fn b1617(&self) -> B1617_R[src]

Bit 17 - B1617

pub fn b1618(&self) -> B1618_R[src]

Bit 18 - B1618

pub fn b1619(&self) -> B1619_R[src]

Bit 19 - B1619

pub fn b1620(&self) -> B1620_R[src]

Bit 20 - B1620

pub fn b1621(&self) -> B1621_R[src]

Bit 21 - B1621

pub fn b1622(&self) -> B1622_R[src]

Bit 22 - B1622

pub fn b1623(&self) -> B1623_R[src]

Bit 23 - B1623

pub fn b1624(&self) -> B1624_R[src]

Bit 24 - B1624

pub fn b1625(&self) -> B1625_R[src]

Bit 25 - B1625

pub fn b1626(&self) -> B1626_R[src]

Bit 26 - B1626

pub fn b1627(&self) -> B1627_R[src]

Bit 27 - B1627

pub fn b1628(&self) -> B1628_R[src]

Bit 28 - B1628

pub fn b1629(&self) -> B1629_R[src]

Bit 29 - B1629

pub fn b1630(&self) -> B1630_R[src]

Bit 30 - B1630

pub fn b1631(&self) -> B1631_R[src]

Bit 31 - B1631

impl R<u32, Reg<u32, _MPCBB1_VCTR51>>[src]

pub fn b1632(&self) -> B1632_R[src]

Bit 0 - B1632

pub fn b1633(&self) -> B1633_R[src]

Bit 1 - B1633

pub fn b1634(&self) -> B1634_R[src]

Bit 2 - B1634

pub fn b1635(&self) -> B1635_R[src]

Bit 3 - B1635

pub fn b1636(&self) -> B1636_R[src]

Bit 4 - B1636

pub fn b1637(&self) -> B1637_R[src]

Bit 5 - B1637

pub fn b1638(&self) -> B1638_R[src]

Bit 6 - B1638

pub fn b1639(&self) -> B1639_R[src]

Bit 7 - B1639

pub fn b1640(&self) -> B1640_R[src]

Bit 8 - B1640

pub fn b1641(&self) -> B1641_R[src]

Bit 9 - B1641

pub fn b1642(&self) -> B1642_R[src]

Bit 10 - B1642

pub fn b1643(&self) -> B1643_R[src]

Bit 11 - B1643

pub fn b1644(&self) -> B1644_R[src]

Bit 12 - B1644

pub fn b1645(&self) -> B1645_R[src]

Bit 13 - B1645

pub fn b1646(&self) -> B1646_R[src]

Bit 14 - B1646

pub fn b1647(&self) -> B1647_R[src]

Bit 15 - B1647

pub fn b1648(&self) -> B1648_R[src]

Bit 16 - B1648

pub fn b1649(&self) -> B1649_R[src]

Bit 17 - B1649

pub fn b1650(&self) -> B1650_R[src]

Bit 18 - B1650

pub fn b1651(&self) -> B1651_R[src]

Bit 19 - B1651

pub fn b1652(&self) -> B1652_R[src]

Bit 20 - B1652

pub fn b1653(&self) -> B1653_R[src]

Bit 21 - B1653

pub fn b1654(&self) -> B1654_R[src]

Bit 22 - B1654

pub fn b1655(&self) -> B1655_R[src]

Bit 23 - B1655

pub fn b1656(&self) -> B1656_R[src]

Bit 24 - B1656

pub fn b1657(&self) -> B1657_R[src]

Bit 25 - B1657

pub fn b1658(&self) -> B1658_R[src]

Bit 26 - B1658

pub fn b1659(&self) -> B1659_R[src]

Bit 27 - B1659

pub fn b1660(&self) -> B1660_R[src]

Bit 28 - B1660

pub fn b1661(&self) -> B1661_R[src]

Bit 29 - B1661

pub fn b1662(&self) -> B1662_R[src]

Bit 30 - B1662

pub fn b1663(&self) -> B1663_R[src]

Bit 31 - B1663

impl R<u32, Reg<u32, _MPCBB1_VCTR52>>[src]

pub fn b1664(&self) -> B1664_R[src]

Bit 0 - B1664

pub fn b1665(&self) -> B1665_R[src]

Bit 1 - B1665

pub fn b1666(&self) -> B1666_R[src]

Bit 2 - B1666

pub fn b1667(&self) -> B1667_R[src]

Bit 3 - B1667

pub fn b1668(&self) -> B1668_R[src]

Bit 4 - B1668

pub fn b1669(&self) -> B1669_R[src]

Bit 5 - B1669

pub fn b1670(&self) -> B1670_R[src]

Bit 6 - B1670

pub fn b1671(&self) -> B1671_R[src]

Bit 7 - B1671

pub fn b1672(&self) -> B1672_R[src]

Bit 8 - B1672

pub fn b1673(&self) -> B1673_R[src]

Bit 9 - B1673

pub fn b1674(&self) -> B1674_R[src]

Bit 10 - B1674

pub fn b1675(&self) -> B1675_R[src]

Bit 11 - B1675

pub fn b1676(&self) -> B1676_R[src]

Bit 12 - B1676

pub fn b1677(&self) -> B1677_R[src]

Bit 13 - B1677

pub fn b1678(&self) -> B1678_R[src]

Bit 14 - B1678

pub fn b1679(&self) -> B1679_R[src]

Bit 15 - B1679

pub fn b1680(&self) -> B1680_R[src]

Bit 16 - B1680

pub fn b1681(&self) -> B1681_R[src]

Bit 17 - B1681

pub fn b1682(&self) -> B1682_R[src]

Bit 18 - B1682

pub fn b1683(&self) -> B1683_R[src]

Bit 19 - B1683

pub fn b1684(&self) -> B1684_R[src]

Bit 20 - B1684

pub fn b1685(&self) -> B1685_R[src]

Bit 21 - B1685

pub fn b1686(&self) -> B1686_R[src]

Bit 22 - B1686

pub fn b1687(&self) -> B1687_R[src]

Bit 23 - B1687

pub fn b1688(&self) -> B1688_R[src]

Bit 24 - B1688

pub fn b1689(&self) -> B1689_R[src]

Bit 25 - B1689

pub fn b1690(&self) -> B1690_R[src]

Bit 26 - B1690

pub fn b1691(&self) -> B1691_R[src]

Bit 27 - B1691

pub fn b1692(&self) -> B1692_R[src]

Bit 28 - B1692

pub fn b1693(&self) -> B1693_R[src]

Bit 29 - B1693

pub fn b1694(&self) -> B1694_R[src]

Bit 30 - B1694

pub fn b1695(&self) -> B1695_R[src]

Bit 31 - B1695

impl R<u32, Reg<u32, _MPCBB1_VCTR53>>[src]

pub fn b1696(&self) -> B1696_R[src]

Bit 0 - B1696

pub fn b1697(&self) -> B1697_R[src]

Bit 1 - B1697

pub fn b1698(&self) -> B1698_R[src]

Bit 2 - B1698

pub fn b1699(&self) -> B1699_R[src]

Bit 3 - B1699

pub fn b1700(&self) -> B1700_R[src]

Bit 4 - B1700

pub fn b1701(&self) -> B1701_R[src]

Bit 5 - B1701

pub fn b1702(&self) -> B1702_R[src]

Bit 6 - B1702

pub fn b1703(&self) -> B1703_R[src]

Bit 7 - B1703

pub fn b1704(&self) -> B1704_R[src]

Bit 8 - B1704

pub fn b1705(&self) -> B1705_R[src]

Bit 9 - B1705

pub fn b1706(&self) -> B1706_R[src]

Bit 10 - B1706

pub fn b1707(&self) -> B1707_R[src]

Bit 11 - B1707

pub fn b1708(&self) -> B1708_R[src]

Bit 12 - B1708

pub fn b1709(&self) -> B1709_R[src]

Bit 13 - B1709

pub fn b1710(&self) -> B1710_R[src]

Bit 14 - B1710

pub fn b1711(&self) -> B1711_R[src]

Bit 15 - B1711

pub fn b1712(&self) -> B1712_R[src]

Bit 16 - B1712

pub fn b1713(&self) -> B1713_R[src]

Bit 17 - B1713

pub fn b1714(&self) -> B1714_R[src]

Bit 18 - B1714

pub fn b1715(&self) -> B1715_R[src]

Bit 19 - B1715

pub fn b1716(&self) -> B1716_R[src]

Bit 20 - B1716

pub fn b1717(&self) -> B1717_R[src]

Bit 21 - B1717

pub fn b1718(&self) -> B1718_R[src]

Bit 22 - B1718

pub fn b1719(&self) -> B1719_R[src]

Bit 23 - B1719

pub fn b1720(&self) -> B1720_R[src]

Bit 24 - B1720

pub fn b1721(&self) -> B1721_R[src]

Bit 25 - B1721

pub fn b1722(&self) -> B1722_R[src]

Bit 26 - B1722

pub fn b1723(&self) -> B1723_R[src]

Bit 27 - B1723

pub fn b1724(&self) -> B1724_R[src]

Bit 28 - B1724

pub fn b1725(&self) -> B1725_R[src]

Bit 29 - B1725

pub fn b1726(&self) -> B1726_R[src]

Bit 30 - B1726

pub fn b1727(&self) -> B1727_R[src]

Bit 31 - B1727

impl R<u32, Reg<u32, _MPCBB1_VCTR54>>[src]

pub fn b1728(&self) -> B1728_R[src]

Bit 0 - B1728

pub fn b1729(&self) -> B1729_R[src]

Bit 1 - B1729

pub fn b1730(&self) -> B1730_R[src]

Bit 2 - B1730

pub fn b1731(&self) -> B1731_R[src]

Bit 3 - B1731

pub fn b1732(&self) -> B1732_R[src]

Bit 4 - B1732

pub fn b1733(&self) -> B1733_R[src]

Bit 5 - B1733

pub fn b1734(&self) -> B1734_R[src]

Bit 6 - B1734

pub fn b1735(&self) -> B1735_R[src]

Bit 7 - B1735

pub fn b1736(&self) -> B1736_R[src]

Bit 8 - B1736

pub fn b1737(&self) -> B1737_R[src]

Bit 9 - B1737

pub fn b1738(&self) -> B1738_R[src]

Bit 10 - B1738

pub fn b1739(&self) -> B1739_R[src]

Bit 11 - B1739

pub fn b1740(&self) -> B1740_R[src]

Bit 12 - B1740

pub fn b1741(&self) -> B1741_R[src]

Bit 13 - B1741

pub fn b1742(&self) -> B1742_R[src]

Bit 14 - B1742

pub fn b1743(&self) -> B1743_R[src]

Bit 15 - B1743

pub fn b1744(&self) -> B1744_R[src]

Bit 16 - B1744

pub fn b1745(&self) -> B1745_R[src]

Bit 17 - B1745

pub fn b1746(&self) -> B1746_R[src]

Bit 18 - B1746

pub fn b1747(&self) -> B1747_R[src]

Bit 19 - B1747

pub fn b1748(&self) -> B1748_R[src]

Bit 20 - B1748

pub fn b1749(&self) -> B1749_R[src]

Bit 21 - B1749

pub fn b1750(&self) -> B1750_R[src]

Bit 22 - B1750

pub fn b1751(&self) -> B1751_R[src]

Bit 23 - B1751

pub fn b1752(&self) -> B1752_R[src]

Bit 24 - B1752

pub fn b1753(&self) -> B1753_R[src]

Bit 25 - B1753

pub fn b1754(&self) -> B1754_R[src]

Bit 26 - B1754

pub fn b1755(&self) -> B1755_R[src]

Bit 27 - B1755

pub fn b1756(&self) -> B1756_R[src]

Bit 28 - B1756

pub fn b1757(&self) -> B1757_R[src]

Bit 29 - B1757

pub fn b1758(&self) -> B1758_R[src]

Bit 30 - B1758

pub fn b1759(&self) -> B1759_R[src]

Bit 31 - B1759

impl R<u32, Reg<u32, _MPCBB1_VCTR55>>[src]

pub fn b1760(&self) -> B1760_R[src]

Bit 0 - B1760

pub fn b1761(&self) -> B1761_R[src]

Bit 1 - B1761

pub fn b1762(&self) -> B1762_R[src]

Bit 2 - B1762

pub fn b1763(&self) -> B1763_R[src]

Bit 3 - B1763

pub fn b1764(&self) -> B1764_R[src]

Bit 4 - B1764

pub fn b1765(&self) -> B1765_R[src]

Bit 5 - B1765

pub fn b1766(&self) -> B1766_R[src]

Bit 6 - B1766

pub fn b1767(&self) -> B1767_R[src]

Bit 7 - B1767

pub fn b1768(&self) -> B1768_R[src]

Bit 8 - B1768

pub fn b1769(&self) -> B1769_R[src]

Bit 9 - B1769

pub fn b1770(&self) -> B1770_R[src]

Bit 10 - B1770

pub fn b1771(&self) -> B1771_R[src]

Bit 11 - B1771

pub fn b1772(&self) -> B1772_R[src]

Bit 12 - B1772

pub fn b1773(&self) -> B1773_R[src]

Bit 13 - B1773

pub fn b1774(&self) -> B1774_R[src]

Bit 14 - B1774

pub fn b1775(&self) -> B1775_R[src]

Bit 15 - B1775

pub fn b1776(&self) -> B1776_R[src]

Bit 16 - B1776

pub fn b1777(&self) -> B1777_R[src]

Bit 17 - B1777

pub fn b1778(&self) -> B1778_R[src]

Bit 18 - B1778

pub fn b1779(&self) -> B1779_R[src]

Bit 19 - B1779

pub fn b1780(&self) -> B1780_R[src]

Bit 20 - B1780

pub fn b1781(&self) -> B1781_R[src]

Bit 21 - B1781

pub fn b1782(&self) -> B1782_R[src]

Bit 22 - B1782

pub fn b1783(&self) -> B1783_R[src]

Bit 23 - B1783

pub fn b1784(&self) -> B1784_R[src]

Bit 24 - B1784

pub fn b1785(&self) -> B1785_R[src]

Bit 25 - B1785

pub fn b1786(&self) -> B1786_R[src]

Bit 26 - B1786

pub fn b1787(&self) -> B1787_R[src]

Bit 27 - B1787

pub fn b1788(&self) -> B1788_R[src]

Bit 28 - B1788

pub fn b1789(&self) -> B1789_R[src]

Bit 29 - B1789

pub fn b1790(&self) -> B1790_R[src]

Bit 30 - B1790

pub fn b1791(&self) -> B1791_R[src]

Bit 31 - B1791

impl R<u32, Reg<u32, _MPCBB1_VCTR56>>[src]

pub fn b1792(&self) -> B1792_R[src]

Bit 0 - B1792

pub fn b1793(&self) -> B1793_R[src]

Bit 1 - B1793

pub fn b1794(&self) -> B1794_R[src]

Bit 2 - B1794

pub fn b1795(&self) -> B1795_R[src]

Bit 3 - B1795

pub fn b1796(&self) -> B1796_R[src]

Bit 4 - B1796

pub fn b1797(&self) -> B1797_R[src]

Bit 5 - B1797

pub fn b1798(&self) -> B1798_R[src]

Bit 6 - B1798

pub fn b1799(&self) -> B1799_R[src]

Bit 7 - B1799

pub fn b1800(&self) -> B1800_R[src]

Bit 8 - B1800

pub fn b1801(&self) -> B1801_R[src]

Bit 9 - B1801

pub fn b1802(&self) -> B1802_R[src]

Bit 10 - B1802

pub fn b1803(&self) -> B1803_R[src]

Bit 11 - B1803

pub fn b1804(&self) -> B1804_R[src]

Bit 12 - B1804

pub fn b1805(&self) -> B1805_R[src]

Bit 13 - B1805

pub fn b1806(&self) -> B1806_R[src]

Bit 14 - B1806

pub fn b1807(&self) -> B1807_R[src]

Bit 15 - B1807

pub fn b1808(&self) -> B1808_R[src]

Bit 16 - B1808

pub fn b1809(&self) -> B1809_R[src]

Bit 17 - B1809

pub fn b1810(&self) -> B1810_R[src]

Bit 18 - B1810

pub fn b1811(&self) -> B1811_R[src]

Bit 19 - B1811

pub fn b1812(&self) -> B1812_R[src]

Bit 20 - B1812

pub fn b1813(&self) -> B1813_R[src]

Bit 21 - B1813

pub fn b1814(&self) -> B1814_R[src]

Bit 22 - B1814

pub fn b1815(&self) -> B1815_R[src]

Bit 23 - B1815

pub fn b1816(&self) -> B1816_R[src]

Bit 24 - B1816

pub fn b1817(&self) -> B1817_R[src]

Bit 25 - B1817

pub fn b1818(&self) -> B1818_R[src]

Bit 26 - B1818

pub fn b1819(&self) -> B1819_R[src]

Bit 27 - B1819

pub fn b1820(&self) -> B1820_R[src]

Bit 28 - B1820

pub fn b1821(&self) -> B1821_R[src]

Bit 29 - B1821

pub fn b1822(&self) -> B1822_R[src]

Bit 30 - B1822

pub fn b1823(&self) -> B1823_R[src]

Bit 31 - B1823

impl R<u32, Reg<u32, _MPCBB1_VCTR57>>[src]

pub fn b1824(&self) -> B1824_R[src]

Bit 0 - B1824

pub fn b1825(&self) -> B1825_R[src]

Bit 1 - B1825

pub fn b1826(&self) -> B1826_R[src]

Bit 2 - B1826

pub fn b1827(&self) -> B1827_R[src]

Bit 3 - B1827

pub fn b1828(&self) -> B1828_R[src]

Bit 4 - B1828

pub fn b1829(&self) -> B1829_R[src]

Bit 5 - B1829

pub fn b1830(&self) -> B1830_R[src]

Bit 6 - B1830

pub fn b1831(&self) -> B1831_R[src]

Bit 7 - B1831

pub fn b1832(&self) -> B1832_R[src]

Bit 8 - B1832

pub fn b1833(&self) -> B1833_R[src]

Bit 9 - B1833

pub fn b1834(&self) -> B1834_R[src]

Bit 10 - B1834

pub fn b1835(&self) -> B1835_R[src]

Bit 11 - B1835

pub fn b1836(&self) -> B1836_R[src]

Bit 12 - B1836

pub fn b1837(&self) -> B1837_R[src]

Bit 13 - B1837

pub fn b1838(&self) -> B1838_R[src]

Bit 14 - B1838

pub fn b1839(&self) -> B1839_R[src]

Bit 15 - B1839

pub fn b1840(&self) -> B1840_R[src]

Bit 16 - B1840

pub fn b1841(&self) -> B1841_R[src]

Bit 17 - B1841

pub fn b1842(&self) -> B1842_R[src]

Bit 18 - B1842

pub fn b1843(&self) -> B1843_R[src]

Bit 19 - B1843

pub fn b1844(&self) -> B1844_R[src]

Bit 20 - B1844

pub fn b1845(&self) -> B1845_R[src]

Bit 21 - B1845

pub fn b1846(&self) -> B1846_R[src]

Bit 22 - B1846

pub fn b1847(&self) -> B1847_R[src]

Bit 23 - B1847

pub fn b1848(&self) -> B1848_R[src]

Bit 24 - B1848

pub fn b1849(&self) -> B1849_R[src]

Bit 25 - B1849

pub fn b1850(&self) -> B1850_R[src]

Bit 26 - B1850

pub fn b1851(&self) -> B1851_R[src]

Bit 27 - B1851

pub fn b1852(&self) -> B1852_R[src]

Bit 28 - B1852

pub fn b1853(&self) -> B1853_R[src]

Bit 29 - B1853

pub fn b1854(&self) -> B1854_R[src]

Bit 30 - B1854

pub fn b1855(&self) -> B1855_R[src]

Bit 31 - B1855

impl R<u32, Reg<u32, _MPCBB1_VCTR58>>[src]

pub fn b1856(&self) -> B1856_R[src]

Bit 0 - B1856

pub fn b1857(&self) -> B1857_R[src]

Bit 1 - B1857

pub fn b1858(&self) -> B1858_R[src]

Bit 2 - B1858

pub fn b1859(&self) -> B1859_R[src]

Bit 3 - B1859

pub fn b1860(&self) -> B1860_R[src]

Bit 4 - B1860

pub fn b1861(&self) -> B1861_R[src]

Bit 5 - B1861

pub fn b1862(&self) -> B1862_R[src]

Bit 6 - B1862

pub fn b1863(&self) -> B1863_R[src]

Bit 7 - B1863

pub fn b1864(&self) -> B1864_R[src]

Bit 8 - B1864

pub fn b1865(&self) -> B1865_R[src]

Bit 9 - B1865

pub fn b1866(&self) -> B1866_R[src]

Bit 10 - B1866

pub fn b1867(&self) -> B1867_R[src]

Bit 11 - B1867

pub fn b1868(&self) -> B1868_R[src]

Bit 12 - B1868

pub fn b1869(&self) -> B1869_R[src]

Bit 13 - B1869

pub fn b1870(&self) -> B1870_R[src]

Bit 14 - B1870

pub fn b1871(&self) -> B1871_R[src]

Bit 15 - B1871

pub fn b1872(&self) -> B1872_R[src]

Bit 16 - B1872

pub fn b1873(&self) -> B1873_R[src]

Bit 17 - B1873

pub fn b1874(&self) -> B1874_R[src]

Bit 18 - B1874

pub fn b1875(&self) -> B1875_R[src]

Bit 19 - B1875

pub fn b1876(&self) -> B1876_R[src]

Bit 20 - B1876

pub fn b1877(&self) -> B1877_R[src]

Bit 21 - B1877

pub fn b1878(&self) -> B1878_R[src]

Bit 22 - B1878

pub fn b1879(&self) -> B1879_R[src]

Bit 23 - B1879

pub fn b1880(&self) -> B1880_R[src]

Bit 24 - B1880

pub fn b1881(&self) -> B1881_R[src]

Bit 25 - B1881

pub fn b1882(&self) -> B1882_R[src]

Bit 26 - B1882

pub fn b1883(&self) -> B1883_R[src]

Bit 27 - B1883

pub fn b1884(&self) -> B1884_R[src]

Bit 28 - B1884

pub fn b1885(&self) -> B1885_R[src]

Bit 29 - B1885

pub fn b1886(&self) -> B1886_R[src]

Bit 30 - B1886

pub fn b1887(&self) -> B1887_R[src]

Bit 31 - B1887

impl R<u32, Reg<u32, _MPCBB1_VCTR59>>[src]

pub fn b1888(&self) -> B1888_R[src]

Bit 0 - B1888

pub fn b1889(&self) -> B1889_R[src]

Bit 1 - B1889

pub fn b1890(&self) -> B1890_R[src]

Bit 2 - B1890

pub fn b1891(&self) -> B1891_R[src]

Bit 3 - B1891

pub fn b1892(&self) -> B1892_R[src]

Bit 4 - B1892

pub fn b1893(&self) -> B1893_R[src]

Bit 5 - B1893

pub fn b1894(&self) -> B1894_R[src]

Bit 6 - B1894

pub fn b1895(&self) -> B1895_R[src]

Bit 7 - B1895

pub fn b1896(&self) -> B1896_R[src]

Bit 8 - B1896

pub fn b1897(&self) -> B1897_R[src]

Bit 9 - B1897

pub fn b1898(&self) -> B1898_R[src]

Bit 10 - B1898

pub fn b1899(&self) -> B1899_R[src]

Bit 11 - B1899

pub fn b1900(&self) -> B1900_R[src]

Bit 12 - B1900

pub fn b1901(&self) -> B1901_R[src]

Bit 13 - B1901

pub fn b1902(&self) -> B1902_R[src]

Bit 14 - B1902

pub fn b1903(&self) -> B1903_R[src]

Bit 15 - B1903

pub fn b1904(&self) -> B1904_R[src]

Bit 16 - B1904

pub fn b1905(&self) -> B1905_R[src]

Bit 17 - B1905

pub fn b1906(&self) -> B1906_R[src]

Bit 18 - B1906

pub fn b1907(&self) -> B1907_R[src]

Bit 19 - B1907

pub fn b1908(&self) -> B1908_R[src]

Bit 20 - B1908

pub fn b1909(&self) -> B1909_R[src]

Bit 21 - B1909

pub fn b1910(&self) -> B1910_R[src]

Bit 22 - B1910

pub fn b1911(&self) -> B1911_R[src]

Bit 23 - B1911

pub fn b1912(&self) -> B1912_R[src]

Bit 24 - B1912

pub fn b1913(&self) -> B1913_R[src]

Bit 25 - B1913

pub fn b1914(&self) -> B1914_R[src]

Bit 26 - B1914

pub fn b1915(&self) -> B1915_R[src]

Bit 27 - B1915

pub fn b1916(&self) -> B1916_R[src]

Bit 28 - B1916

pub fn b1917(&self) -> B1917_R[src]

Bit 29 - B1917

pub fn b1918(&self) -> B1918_R[src]

Bit 30 - B1918

pub fn b1919(&self) -> B1919_R[src]

Bit 31 - B1919

impl R<u32, Reg<u32, _MPCBB1_VCTR60>>[src]

pub fn b1920(&self) -> B1920_R[src]

Bit 0 - B1920

pub fn b1921(&self) -> B1921_R[src]

Bit 1 - B1921

pub fn b1922(&self) -> B1922_R[src]

Bit 2 - B1922

pub fn b1923(&self) -> B1923_R[src]

Bit 3 - B1923

pub fn b1924(&self) -> B1924_R[src]

Bit 4 - B1924

pub fn b1925(&self) -> B1925_R[src]

Bit 5 - B1925

pub fn b1926(&self) -> B1926_R[src]

Bit 6 - B1926

pub fn b1927(&self) -> B1927_R[src]

Bit 7 - B1927

pub fn b1928(&self) -> B1928_R[src]

Bit 8 - B1928

pub fn b1929(&self) -> B1929_R[src]

Bit 9 - B1929

pub fn b1930(&self) -> B1930_R[src]

Bit 10 - B1930

pub fn b1931(&self) -> B1931_R[src]

Bit 11 - B1931

pub fn b1932(&self) -> B1932_R[src]

Bit 12 - B1932

pub fn b1933(&self) -> B1933_R[src]

Bit 13 - B1933

pub fn b1934(&self) -> B1934_R[src]

Bit 14 - B1934

pub fn b1935(&self) -> B1935_R[src]

Bit 15 - B1935

pub fn b1936(&self) -> B1936_R[src]

Bit 16 - B1936

pub fn b1937(&self) -> B1937_R[src]

Bit 17 - B1937

pub fn b1938(&self) -> B1938_R[src]

Bit 18 - B1938

pub fn b1939(&self) -> B1939_R[src]

Bit 19 - B1939

pub fn b1940(&self) -> B1940_R[src]

Bit 20 - B1940

pub fn b1941(&self) -> B1941_R[src]

Bit 21 - B1941

pub fn b1942(&self) -> B1942_R[src]

Bit 22 - B1942

pub fn b1943(&self) -> B1943_R[src]

Bit 23 - B1943

pub fn b1944(&self) -> B1944_R[src]

Bit 24 - B1944

pub fn b1945(&self) -> B1945_R[src]

Bit 25 - B1945

pub fn b1946(&self) -> B1946_R[src]

Bit 26 - B1946

pub fn b1947(&self) -> B1947_R[src]

Bit 27 - B1947

pub fn b1948(&self) -> B1948_R[src]

Bit 28 - B1948

pub fn b1949(&self) -> B1949_R[src]

Bit 29 - B1949

pub fn b1950(&self) -> B1950_R[src]

Bit 30 - B1950

pub fn b1951(&self) -> B1951_R[src]

Bit 31 - B1951

impl R<u32, Reg<u32, _MPCBB1_VCTR61>>[src]

pub fn b1952(&self) -> B1952_R[src]

Bit 0 - B1952

pub fn b1953(&self) -> B1953_R[src]

Bit 1 - B1953

pub fn b1954(&self) -> B1954_R[src]

Bit 2 - B1954

pub fn b1955(&self) -> B1955_R[src]

Bit 3 - B1955

pub fn b1956(&self) -> B1956_R[src]

Bit 4 - B1956

pub fn b1957(&self) -> B1957_R[src]

Bit 5 - B1957

pub fn b1958(&self) -> B1958_R[src]

Bit 6 - B1958

pub fn b1959(&self) -> B1959_R[src]

Bit 7 - B1959

pub fn b1960(&self) -> B1960_R[src]

Bit 8 - B1960

pub fn b1961(&self) -> B1961_R[src]

Bit 9 - B1961

pub fn b1962(&self) -> B1962_R[src]

Bit 10 - B1962

pub fn b1963(&self) -> B1963_R[src]

Bit 11 - B1963

pub fn b1964(&self) -> B1964_R[src]

Bit 12 - B1964

pub fn b1965(&self) -> B1965_R[src]

Bit 13 - B1965

pub fn b1966(&self) -> B1966_R[src]

Bit 14 - B1966

pub fn b1967(&self) -> B1967_R[src]

Bit 15 - B1967

pub fn b1968(&self) -> B1968_R[src]

Bit 16 - B1968

pub fn b1969(&self) -> B1969_R[src]

Bit 17 - B1969

pub fn b1970(&self) -> B1970_R[src]

Bit 18 - B1970

pub fn b1971(&self) -> B1971_R[src]

Bit 19 - B1971

pub fn b1972(&self) -> B1972_R[src]

Bit 20 - B1972

pub fn b1973(&self) -> B1973_R[src]

Bit 21 - B1973

pub fn b1974(&self) -> B1974_R[src]

Bit 22 - B1974

pub fn b1975(&self) -> B1975_R[src]

Bit 23 - B1975

pub fn b1976(&self) -> B1976_R[src]

Bit 24 - B1976

pub fn b1977(&self) -> B1977_R[src]

Bit 25 - B1977

pub fn b1978(&self) -> B1978_R[src]

Bit 26 - B1978

pub fn b1979(&self) -> B1979_R[src]

Bit 27 - B1979

pub fn b1980(&self) -> B1980_R[src]

Bit 28 - B1980

pub fn b1981(&self) -> B1981_R[src]

Bit 29 - B1981

pub fn b1982(&self) -> B1982_R[src]

Bit 30 - B1982

pub fn b1983(&self) -> B1983_R[src]

Bit 31 - B1983

impl R<u32, Reg<u32, _MPCBB1_VCTR62>>[src]

pub fn b1984(&self) -> B1984_R[src]

Bit 0 - B1984

pub fn b1985(&self) -> B1985_R[src]

Bit 1 - B1985

pub fn b1986(&self) -> B1986_R[src]

Bit 2 - B1986

pub fn b1987(&self) -> B1987_R[src]

Bit 3 - B1987

pub fn b1988(&self) -> B1988_R[src]

Bit 4 - B1988

pub fn b1989(&self) -> B1989_R[src]

Bit 5 - B1989

pub fn b1990(&self) -> B1990_R[src]

Bit 6 - B1990

pub fn b1991(&self) -> B1991_R[src]

Bit 7 - B1991

pub fn b1992(&self) -> B1992_R[src]

Bit 8 - B1992

pub fn b1993(&self) -> B1993_R[src]

Bit 9 - B1993

pub fn b1994(&self) -> B1994_R[src]

Bit 10 - B1994

pub fn b1995(&self) -> B1995_R[src]

Bit 11 - B1995

pub fn b1996(&self) -> B1996_R[src]

Bit 12 - B1996

pub fn b1997(&self) -> B1997_R[src]

Bit 13 - B1997

pub fn b1998(&self) -> B1998_R[src]

Bit 14 - B1998

pub fn b1999(&self) -> B1999_R[src]

Bit 15 - B1999

pub fn b2000(&self) -> B2000_R[src]

Bit 16 - B2000

pub fn b2001(&self) -> B2001_R[src]

Bit 17 - B2001

pub fn b2002(&self) -> B2002_R[src]

Bit 18 - B2002

pub fn b2003(&self) -> B2003_R[src]

Bit 19 - B2003

pub fn b2004(&self) -> B2004_R[src]

Bit 20 - B2004

pub fn b2005(&self) -> B2005_R[src]

Bit 21 - B2005

pub fn b2006(&self) -> B2006_R[src]

Bit 22 - B2006

pub fn b2007(&self) -> B2007_R[src]

Bit 23 - B2007

pub fn b2008(&self) -> B2008_R[src]

Bit 24 - B2008

pub fn b2009(&self) -> B2009_R[src]

Bit 25 - B2009

pub fn b2010(&self) -> B2010_R[src]

Bit 26 - B2010

pub fn b2011(&self) -> B2011_R[src]

Bit 27 - B2011

pub fn b2012(&self) -> B2012_R[src]

Bit 28 - B2012

pub fn b2013(&self) -> B2013_R[src]

Bit 29 - B2013

pub fn b2014(&self) -> B2014_R[src]

Bit 30 - B2014

pub fn b2015(&self) -> B2015_R[src]

Bit 31 - B2015

impl R<u32, Reg<u32, _MPCBB1_VCTR63>>[src]

pub fn b2016(&self) -> B2016_R[src]

Bit 0 - B2016

pub fn b2017(&self) -> B2017_R[src]

Bit 1 - B2017

pub fn b2018(&self) -> B2018_R[src]

Bit 2 - B2018

pub fn b2019(&self) -> B2019_R[src]

Bit 3 - B2019

pub fn b2020(&self) -> B2020_R[src]

Bit 4 - B2020

pub fn b2021(&self) -> B2021_R[src]

Bit 5 - B2021

pub fn b2022(&self) -> B2022_R[src]

Bit 6 - B2022

pub fn b2023(&self) -> B2023_R[src]

Bit 7 - B2023

pub fn b2024(&self) -> B2024_R[src]

Bit 8 - B2024

pub fn b2025(&self) -> B2025_R[src]

Bit 9 - B2025

pub fn b2026(&self) -> B2026_R[src]

Bit 10 - B2026

pub fn b2027(&self) -> B2027_R[src]

Bit 11 - B2027

pub fn b2028(&self) -> B2028_R[src]

Bit 12 - B2028

pub fn b2029(&self) -> B2029_R[src]

Bit 13 - B2029

pub fn b2030(&self) -> B2030_R[src]

Bit 14 - B2030

pub fn b2031(&self) -> B2031_R[src]

Bit 15 - B2031

pub fn b2032(&self) -> B2032_R[src]

Bit 16 - B2032

pub fn b2033(&self) -> B2033_R[src]

Bit 17 - B2033

pub fn b2034(&self) -> B2034_R[src]

Bit 18 - B2034

pub fn b2035(&self) -> B2035_R[src]

Bit 19 - B2035

pub fn b2036(&self) -> B2036_R[src]

Bit 20 - B2036

pub fn b2037(&self) -> B2037_R[src]

Bit 21 - B2037

pub fn b2038(&self) -> B2038_R[src]

Bit 22 - B2038

pub fn b2039(&self) -> B2039_R[src]

Bit 23 - B2039

pub fn b2040(&self) -> B2040_R[src]

Bit 24 - B2040

pub fn b2041(&self) -> B2041_R[src]

Bit 25 - B2041

pub fn b2042(&self) -> B2042_R[src]

Bit 26 - B2042

pub fn b2043(&self) -> B2043_R[src]

Bit 27 - B2043

pub fn b2044(&self) -> B2044_R[src]

Bit 28 - B2044

pub fn b2045(&self) -> B2045_R[src]

Bit 29 - B2045

pub fn b2046(&self) -> B2046_R[src]

Bit 30 - B2046

pub fn b2047(&self) -> B2047_R[src]

Bit 31 - B2047

impl R<u32, Reg<u32, _MPCBB2_CR>>[src]

pub fn lck(&self) -> LCK_R[src]

Bit 0 - LCK

pub fn invsecstate(&self) -> INVSECSTATE_R[src]

Bit 30 - INVSECSTATE

pub fn srwiladis(&self) -> SRWILADIS_R[src]

Bit 31 - SRWILADIS

impl R<u32, Reg<u32, _MPCBB2_LCKVTR1>>[src]

pub fn lcksb0(&self) -> LCKSB0_R[src]

Bit 0 - LCKSB0

pub fn lcksb1(&self) -> LCKSB1_R[src]

Bit 1 - LCKSB1

pub fn lcksb2(&self) -> LCKSB2_R[src]

Bit 2 - LCKSB2

pub fn lcksb3(&self) -> LCKSB3_R[src]

Bit 3 - LCKSB3

pub fn lcksb4(&self) -> LCKSB4_R[src]

Bit 4 - LCKSB4

pub fn lcksb5(&self) -> LCKSB5_R[src]

Bit 5 - LCKSB5

pub fn lcksb6(&self) -> LCKSB6_R[src]

Bit 6 - LCKSB6

pub fn lcksb7(&self) -> LCKSB7_R[src]

Bit 7 - LCKSB7

pub fn lcksb8(&self) -> LCKSB8_R[src]

Bit 8 - LCKSB8

pub fn lcksb9(&self) -> LCKSB9_R[src]

Bit 9 - LCKSB9

pub fn lcksb10(&self) -> LCKSB10_R[src]

Bit 10 - LCKSB10

pub fn lcksb11(&self) -> LCKSB11_R[src]

Bit 11 - LCKSB11

pub fn lcksb12(&self) -> LCKSB12_R[src]

Bit 12 - LCKSB12

pub fn lcksb13(&self) -> LCKSB13_R[src]

Bit 13 - LCKSB13

pub fn lcksb14(&self) -> LCKSB14_R[src]

Bit 14 - LCKSB14

pub fn lcksb15(&self) -> LCKSB15_R[src]

Bit 15 - LCKSB15

pub fn lcksb16(&self) -> LCKSB16_R[src]

Bit 16 - LCKSB16

pub fn lcksb17(&self) -> LCKSB17_R[src]

Bit 17 - LCKSB17

pub fn lcksb18(&self) -> LCKSB18_R[src]

Bit 18 - LCKSB18

pub fn lcksb19(&self) -> LCKSB19_R[src]

Bit 19 - LCKSB19

pub fn lcksb20(&self) -> LCKSB20_R[src]

Bit 20 - LCKSB20

pub fn lcksb21(&self) -> LCKSB21_R[src]

Bit 21 - LCKSB21

pub fn lcksb22(&self) -> LCKSB22_R[src]

Bit 22 - LCKSB22

pub fn lcksb23(&self) -> LCKSB23_R[src]

Bit 23 - LCKSB23

pub fn lcksb24(&self) -> LCKSB24_R[src]

Bit 24 - LCKSB24

pub fn lcksb25(&self) -> LCKSB25_R[src]

Bit 25 - LCKSB25

pub fn lcksb26(&self) -> LCKSB26_R[src]

Bit 26 - LCKSB26

pub fn lcksb27(&self) -> LCKSB27_R[src]

Bit 27 - LCKSB27

pub fn lcksb28(&self) -> LCKSB28_R[src]

Bit 28 - LCKSB28

pub fn lcksb29(&self) -> LCKSB29_R[src]

Bit 29 - LCKSB29

pub fn lcksb30(&self) -> LCKSB30_R[src]

Bit 30 - LCKSB30

pub fn lcksb31(&self) -> LCKSB31_R[src]

Bit 31 - LCKSB31

impl R<u32, Reg<u32, _MPCBB2_LCKVTR2>>[src]

pub fn lcksb32(&self) -> LCKSB32_R[src]

Bit 0 - LCKSB32

pub fn lcksb33(&self) -> LCKSB33_R[src]

Bit 1 - LCKSB33

pub fn lcksb34(&self) -> LCKSB34_R[src]

Bit 2 - LCKSB34

pub fn lcksb35(&self) -> LCKSB35_R[src]

Bit 3 - LCKSB35

pub fn lcksb36(&self) -> LCKSB36_R[src]

Bit 4 - LCKSB36

pub fn lcksb37(&self) -> LCKSB37_R[src]

Bit 5 - LCKSB37

pub fn lcksb38(&self) -> LCKSB38_R[src]

Bit 6 - LCKSB38

pub fn lcksb39(&self) -> LCKSB39_R[src]

Bit 7 - LCKSB39

pub fn lcksb40(&self) -> LCKSB40_R[src]

Bit 8 - LCKSB40

pub fn lcksb41(&self) -> LCKSB41_R[src]

Bit 9 - LCKSB41

pub fn lcksb42(&self) -> LCKSB42_R[src]

Bit 10 - LCKSB42

pub fn lcksb43(&self) -> LCKSB43_R[src]

Bit 11 - LCKSB43

pub fn lcksb44(&self) -> LCKSB44_R[src]

Bit 12 - LCKSB44

pub fn lcksb45(&self) -> LCKSB45_R[src]

Bit 13 - LCKSB45

pub fn lcksb46(&self) -> LCKSB46_R[src]

Bit 14 - LCKSB46

pub fn lcksb47(&self) -> LCKSB47_R[src]

Bit 15 - LCKSB47

pub fn lcksb48(&self) -> LCKSB48_R[src]

Bit 16 - LCKSB48

pub fn lcksb49(&self) -> LCKSB49_R[src]

Bit 17 - LCKSB49

pub fn lcksb50(&self) -> LCKSB50_R[src]

Bit 18 - LCKSB50

pub fn lcksb51(&self) -> LCKSB51_R[src]

Bit 19 - LCKSB51

pub fn lcksb52(&self) -> LCKSB52_R[src]

Bit 20 - LCKSB52

pub fn lcksb53(&self) -> LCKSB53_R[src]

Bit 21 - LCKSB53

pub fn lcksb54(&self) -> LCKSB54_R[src]

Bit 22 - LCKSB54

pub fn lcksb55(&self) -> LCKSB55_R[src]

Bit 23 - LCKSB55

pub fn lcksb56(&self) -> LCKSB56_R[src]

Bit 24 - LCKSB56

pub fn lcksb57(&self) -> LCKSB57_R[src]

Bit 25 - LCKSB57

pub fn lcksb58(&self) -> LCKSB58_R[src]

Bit 26 - LCKSB58

pub fn lcksb59(&self) -> LCKSB59_R[src]

Bit 27 - LCKSB59

pub fn lcksb60(&self) -> LCKSB60_R[src]

Bit 28 - LCKSB60

pub fn lcksb61(&self) -> LCKSB61_R[src]

Bit 29 - LCKSB61

pub fn lcksb62(&self) -> LCKSB62_R[src]

Bit 30 - LCKSB62

pub fn lcksb63(&self) -> LCKSB63_R[src]

Bit 31 - LCKSB63

impl R<u32, Reg<u32, _MPCBB2_VCTR0>>[src]

pub fn b0(&self) -> B0_R[src]

Bit 0 - B0

pub fn b1(&self) -> B1_R[src]

Bit 1 - B1

pub fn b2(&self) -> B2_R[src]

Bit 2 - B2

pub fn b3(&self) -> B3_R[src]

Bit 3 - B3

pub fn b4(&self) -> B4_R[src]

Bit 4 - B4

pub fn b5(&self) -> B5_R[src]

Bit 5 - B5

pub fn b6(&self) -> B6_R[src]

Bit 6 - B6

pub fn b7(&self) -> B7_R[src]

Bit 7 - B7

pub fn b8(&self) -> B8_R[src]

Bit 8 - B8

pub fn b9(&self) -> B9_R[src]

Bit 9 - B9

pub fn b10(&self) -> B10_R[src]

Bit 10 - B10

pub fn b11(&self) -> B11_R[src]

Bit 11 - B11

pub fn b12(&self) -> B12_R[src]

Bit 12 - B12

pub fn b13(&self) -> B13_R[src]

Bit 13 - B13

pub fn b14(&self) -> B14_R[src]

Bit 14 - B14

pub fn b15(&self) -> B15_R[src]

Bit 15 - B15

pub fn b16(&self) -> B16_R[src]

Bit 16 - B16

pub fn b17(&self) -> B17_R[src]

Bit 17 - B17

pub fn b18(&self) -> B18_R[src]

Bit 18 - B18

pub fn b19(&self) -> B19_R[src]

Bit 19 - B19

pub fn b20(&self) -> B20_R[src]

Bit 20 - B20

pub fn b21(&self) -> B21_R[src]

Bit 21 - B21

pub fn b22(&self) -> B22_R[src]

Bit 22 - B22

pub fn b23(&self) -> B23_R[src]

Bit 23 - B23

pub fn b24(&self) -> B24_R[src]

Bit 24 - B24

pub fn b25(&self) -> B25_R[src]

Bit 25 - B25

pub fn b26(&self) -> B26_R[src]

Bit 26 - B26

pub fn b27(&self) -> B27_R[src]

Bit 27 - B27

pub fn b28(&self) -> B28_R[src]

Bit 28 - B28

pub fn b29(&self) -> B29_R[src]

Bit 29 - B29

pub fn b30(&self) -> B30_R[src]

Bit 30 - B30

pub fn b31(&self) -> B31_R[src]

Bit 31 - B31

impl R<u32, Reg<u32, _MPCBB2_VCTR1>>[src]

pub fn b32(&self) -> B32_R[src]

Bit 0 - B32

pub fn b33(&self) -> B33_R[src]

Bit 1 - B33

pub fn b34(&self) -> B34_R[src]

Bit 2 - B34

pub fn b35(&self) -> B35_R[src]

Bit 3 - B35

pub fn b36(&self) -> B36_R[src]

Bit 4 - B36

pub fn b37(&self) -> B37_R[src]

Bit 5 - B37

pub fn b38(&self) -> B38_R[src]

Bit 6 - B38

pub fn b39(&self) -> B39_R[src]

Bit 7 - B39

pub fn b40(&self) -> B40_R[src]

Bit 8 - B40

pub fn b41(&self) -> B41_R[src]

Bit 9 - B41

pub fn b42(&self) -> B42_R[src]

Bit 10 - B42

pub fn b43(&self) -> B43_R[src]

Bit 11 - B43

pub fn b44(&self) -> B44_R[src]

Bit 12 - B44

pub fn b45(&self) -> B45_R[src]

Bit 13 - B45

pub fn b46(&self) -> B46_R[src]

Bit 14 - B46

pub fn b47(&self) -> B47_R[src]

Bit 15 - B47

pub fn b48(&self) -> B48_R[src]

Bit 16 - B48

pub fn b49(&self) -> B49_R[src]

Bit 17 - B49

pub fn b50(&self) -> B50_R[src]

Bit 18 - B50

pub fn b51(&self) -> B51_R[src]

Bit 19 - B51

pub fn b52(&self) -> B52_R[src]

Bit 20 - B52

pub fn b53(&self) -> B53_R[src]

Bit 21 - B53

pub fn b54(&self) -> B54_R[src]

Bit 22 - B54

pub fn b55(&self) -> B55_R[src]

Bit 23 - B55

pub fn b56(&self) -> B56_R[src]

Bit 24 - B56

pub fn b57(&self) -> B57_R[src]

Bit 25 - B57

pub fn b58(&self) -> B58_R[src]

Bit 26 - B58

pub fn b59(&self) -> B59_R[src]

Bit 27 - B59

pub fn b60(&self) -> B60_R[src]

Bit 28 - B60

pub fn b61(&self) -> B61_R[src]

Bit 29 - B61

pub fn b62(&self) -> B62_R[src]

Bit 30 - B62

pub fn b63(&self) -> B63_R[src]

Bit 31 - B63

impl R<u32, Reg<u32, _MPCBB2_VCTR2>>[src]

pub fn b64(&self) -> B64_R[src]

Bit 0 - B64

pub fn b65(&self) -> B65_R[src]

Bit 1 - B65

pub fn b66(&self) -> B66_R[src]

Bit 2 - B66

pub fn b67(&self) -> B67_R[src]

Bit 3 - B67

pub fn b68(&self) -> B68_R[src]

Bit 4 - B68

pub fn b69(&self) -> B69_R[src]

Bit 5 - B69

pub fn b70(&self) -> B70_R[src]

Bit 6 - B70

pub fn b71(&self) -> B71_R[src]

Bit 7 - B71

pub fn b72(&self) -> B72_R[src]

Bit 8 - B72

pub fn b73(&self) -> B73_R[src]

Bit 9 - B73

pub fn b74(&self) -> B74_R[src]

Bit 10 - B74

pub fn b75(&self) -> B75_R[src]

Bit 11 - B75

pub fn b76(&self) -> B76_R[src]

Bit 12 - B76

pub fn b77(&self) -> B77_R[src]

Bit 13 - B77

pub fn b78(&self) -> B78_R[src]

Bit 14 - B78

pub fn b79(&self) -> B79_R[src]

Bit 15 - B79

pub fn b80(&self) -> B80_R[src]

Bit 16 - B80

pub fn b81(&self) -> B81_R[src]

Bit 17 - B81

pub fn b82(&self) -> B82_R[src]

Bit 18 - B82

pub fn b83(&self) -> B83_R[src]

Bit 19 - B83

pub fn b84(&self) -> B84_R[src]

Bit 20 - B84

pub fn b85(&self) -> B85_R[src]

Bit 21 - B85

pub fn b86(&self) -> B86_R[src]

Bit 22 - B86

pub fn b87(&self) -> B87_R[src]

Bit 23 - B87

pub fn b88(&self) -> B88_R[src]

Bit 24 - B88

pub fn b89(&self) -> B89_R[src]

Bit 25 - B89

pub fn b90(&self) -> B90_R[src]

Bit 26 - B90

pub fn b91(&self) -> B91_R[src]

Bit 27 - B91

pub fn b92(&self) -> B92_R[src]

Bit 28 - B92

pub fn b93(&self) -> B93_R[src]

Bit 29 - B93

pub fn b94(&self) -> B94_R[src]

Bit 30 - B94

pub fn b95(&self) -> B95_R[src]

Bit 31 - B95

impl R<u32, Reg<u32, _MPCBB2_VCTR3>>[src]

pub fn b96(&self) -> B96_R[src]

Bit 0 - B96

pub fn b97(&self) -> B97_R[src]

Bit 1 - B97

pub fn b98(&self) -> B98_R[src]

Bit 2 - B98

pub fn b99(&self) -> B99_R[src]

Bit 3 - B99

pub fn b100(&self) -> B100_R[src]

Bit 4 - B100

pub fn b101(&self) -> B101_R[src]

Bit 5 - B101

pub fn b102(&self) -> B102_R[src]

Bit 6 - B102

pub fn b103(&self) -> B103_R[src]

Bit 7 - B103

pub fn b104(&self) -> B104_R[src]

Bit 8 - B104

pub fn b105(&self) -> B105_R[src]

Bit 9 - B105

pub fn b106(&self) -> B106_R[src]

Bit 10 - B106

pub fn b107(&self) -> B107_R[src]

Bit 11 - B107

pub fn b108(&self) -> B108_R[src]

Bit 12 - B108

pub fn b109(&self) -> B109_R[src]

Bit 13 - B109

pub fn b110(&self) -> B110_R[src]

Bit 14 - B110

pub fn b111(&self) -> B111_R[src]

Bit 15 - B111

pub fn b112(&self) -> B112_R[src]

Bit 16 - B112

pub fn b113(&self) -> B113_R[src]

Bit 17 - B113

pub fn b114(&self) -> B114_R[src]

Bit 18 - B114

pub fn b115(&self) -> B115_R[src]

Bit 19 - B115

pub fn b116(&self) -> B116_R[src]

Bit 20 - B116

pub fn b117(&self) -> B117_R[src]

Bit 21 - B117

pub fn b118(&self) -> B118_R[src]

Bit 22 - B118

pub fn b119(&self) -> B119_R[src]

Bit 23 - B119

pub fn b120(&self) -> B120_R[src]

Bit 24 - B120

pub fn b121(&self) -> B121_R[src]

Bit 25 - B121

pub fn b122(&self) -> B122_R[src]

Bit 26 - B122

pub fn b123(&self) -> B123_R[src]

Bit 27 - B123

pub fn b124(&self) -> B124_R[src]

Bit 28 - B124

pub fn b125(&self) -> B125_R[src]

Bit 29 - B125

pub fn b126(&self) -> B126_R[src]

Bit 30 - B126

pub fn b127(&self) -> B127_R[src]

Bit 31 - B127

impl R<u32, Reg<u32, _MPCBB2_VCTR4>>[src]

pub fn b128(&self) -> B128_R[src]

Bit 0 - B128

pub fn b129(&self) -> B129_R[src]

Bit 1 - B129

pub fn b130(&self) -> B130_R[src]

Bit 2 - B130

pub fn b131(&self) -> B131_R[src]

Bit 3 - B131

pub fn b132(&self) -> B132_R[src]

Bit 4 - B132

pub fn b133(&self) -> B133_R[src]

Bit 5 - B133

pub fn b134(&self) -> B134_R[src]

Bit 6 - B134

pub fn b135(&self) -> B135_R[src]

Bit 7 - B135

pub fn b136(&self) -> B136_R[src]

Bit 8 - B136

pub fn b137(&self) -> B137_R[src]

Bit 9 - B137

pub fn b138(&self) -> B138_R[src]

Bit 10 - B138

pub fn b139(&self) -> B139_R[src]

Bit 11 - B139

pub fn b140(&self) -> B140_R[src]

Bit 12 - B140

pub fn b141(&self) -> B141_R[src]

Bit 13 - B141

pub fn b142(&self) -> B142_R[src]

Bit 14 - B142

pub fn b143(&self) -> B143_R[src]

Bit 15 - B143

pub fn b144(&self) -> B144_R[src]

Bit 16 - B144

pub fn b145(&self) -> B145_R[src]

Bit 17 - B145

pub fn b146(&self) -> B146_R[src]

Bit 18 - B146

pub fn b147(&self) -> B147_R[src]

Bit 19 - B147

pub fn b148(&self) -> B148_R[src]

Bit 20 - B148

pub fn b149(&self) -> B149_R[src]

Bit 21 - B149

pub fn b150(&self) -> B150_R[src]

Bit 22 - B150

pub fn b151(&self) -> B151_R[src]

Bit 23 - B151

pub fn b152(&self) -> B152_R[src]

Bit 24 - B152

pub fn b153(&self) -> B153_R[src]

Bit 25 - B153

pub fn b154(&self) -> B154_R[src]

Bit 26 - B154

pub fn b155(&self) -> B155_R[src]

Bit 27 - B155

pub fn b156(&self) -> B156_R[src]

Bit 28 - B156

pub fn b157(&self) -> B157_R[src]

Bit 29 - B157

pub fn b158(&self) -> B158_R[src]

Bit 30 - B158

pub fn b159(&self) -> B159_R[src]

Bit 31 - B159

impl R<u32, Reg<u32, _MPCBB2_VCTR5>>[src]

pub fn b160(&self) -> B160_R[src]

Bit 0 - B160

pub fn b161(&self) -> B161_R[src]

Bit 1 - B161

pub fn b162(&self) -> B162_R[src]

Bit 2 - B162

pub fn b163(&self) -> B163_R[src]

Bit 3 - B163

pub fn b164(&self) -> B164_R[src]

Bit 4 - B164

pub fn b165(&self) -> B165_R[src]

Bit 5 - B165

pub fn b166(&self) -> B166_R[src]

Bit 6 - B166

pub fn b167(&self) -> B167_R[src]

Bit 7 - B167

pub fn b168(&self) -> B168_R[src]

Bit 8 - B168

pub fn b169(&self) -> B169_R[src]

Bit 9 - B169

pub fn b170(&self) -> B170_R[src]

Bit 10 - B170

pub fn b171(&self) -> B171_R[src]

Bit 11 - B171

pub fn b172(&self) -> B172_R[src]

Bit 12 - B172

pub fn b173(&self) -> B173_R[src]

Bit 13 - B173

pub fn b174(&self) -> B174_R[src]

Bit 14 - B174

pub fn b175(&self) -> B175_R[src]

Bit 15 - B175

pub fn b176(&self) -> B176_R[src]

Bit 16 - B176

pub fn b177(&self) -> B177_R[src]

Bit 17 - B177

pub fn b178(&self) -> B178_R[src]

Bit 18 - B178

pub fn b179(&self) -> B179_R[src]

Bit 19 - B179

pub fn b180(&self) -> B180_R[src]

Bit 20 - B180

pub fn b181(&self) -> B181_R[src]

Bit 21 - B181

pub fn b182(&self) -> B182_R[src]

Bit 22 - B182

pub fn b183(&self) -> B183_R[src]

Bit 23 - B183

pub fn b184(&self) -> B184_R[src]

Bit 24 - B184

pub fn b185(&self) -> B185_R[src]

Bit 25 - B185

pub fn b186(&self) -> B186_R[src]

Bit 26 - B186

pub fn b187(&self) -> B187_R[src]

Bit 27 - B187

pub fn b188(&self) -> B188_R[src]

Bit 28 - B188

pub fn b189(&self) -> B189_R[src]

Bit 29 - B189

pub fn b190(&self) -> B190_R[src]

Bit 30 - B190

pub fn b191(&self) -> B191_R[src]

Bit 31 - B191

impl R<u32, Reg<u32, _MPCBB2_VCTR6>>[src]

pub fn b192(&self) -> B192_R[src]

Bit 0 - B192

pub fn b193(&self) -> B193_R[src]

Bit 1 - B193

pub fn b194(&self) -> B194_R[src]

Bit 2 - B194

pub fn b195(&self) -> B195_R[src]

Bit 3 - B195

pub fn b196(&self) -> B196_R[src]

Bit 4 - B196

pub fn b197(&self) -> B197_R[src]

Bit 5 - B197

pub fn b198(&self) -> B198_R[src]

Bit 6 - B198

pub fn b199(&self) -> B199_R[src]

Bit 7 - B199

pub fn b200(&self) -> B200_R[src]

Bit 8 - B200

pub fn b201(&self) -> B201_R[src]

Bit 9 - B201

pub fn b202(&self) -> B202_R[src]

Bit 10 - B202

pub fn b203(&self) -> B203_R[src]

Bit 11 - B203

pub fn b204(&self) -> B204_R[src]

Bit 12 - B204

pub fn b205(&self) -> B205_R[src]

Bit 13 - B205

pub fn b206(&self) -> B206_R[src]

Bit 14 - B206

pub fn b207(&self) -> B207_R[src]

Bit 15 - B207

pub fn b208(&self) -> B208_R[src]

Bit 16 - B208

pub fn b209(&self) -> B209_R[src]

Bit 17 - B209

pub fn b210(&self) -> B210_R[src]

Bit 18 - B210

pub fn b211(&self) -> B211_R[src]

Bit 19 - B211

pub fn b212(&self) -> B212_R[src]

Bit 20 - B212

pub fn b213(&self) -> B213_R[src]

Bit 21 - B213

pub fn b214(&self) -> B214_R[src]

Bit 22 - B214

pub fn b215(&self) -> B215_R[src]

Bit 23 - B215

pub fn b216(&self) -> B216_R[src]

Bit 24 - B216

pub fn b217(&self) -> B217_R[src]

Bit 25 - B217

pub fn b218(&self) -> B218_R[src]

Bit 26 - B218

pub fn b219(&self) -> B219_R[src]

Bit 27 - B219

pub fn b220(&self) -> B220_R[src]

Bit 28 - B220

pub fn b221(&self) -> B221_R[src]

Bit 29 - B221

pub fn b222(&self) -> B222_R[src]

Bit 30 - B222

pub fn b223(&self) -> B223_R[src]

Bit 31 - B223

impl R<u32, Reg<u32, _MPCBB2_VCTR7>>[src]

pub fn b224(&self) -> B224_R[src]

Bit 0 - B224

pub fn b225(&self) -> B225_R[src]

Bit 1 - B225

pub fn b226(&self) -> B226_R[src]

Bit 2 - B226

pub fn b227(&self) -> B227_R[src]

Bit 3 - B227

pub fn b228(&self) -> B228_R[src]

Bit 4 - B228

pub fn b229(&self) -> B229_R[src]

Bit 5 - B229

pub fn b230(&self) -> B230_R[src]

Bit 6 - B230

pub fn b231(&self) -> B231_R[src]

Bit 7 - B231

pub fn b232(&self) -> B232_R[src]

Bit 8 - B232

pub fn b233(&self) -> B233_R[src]

Bit 9 - B233

pub fn b234(&self) -> B234_R[src]

Bit 10 - B234

pub fn b235(&self) -> B235_R[src]

Bit 11 - B235

pub fn b236(&self) -> B236_R[src]

Bit 12 - B236

pub fn b237(&self) -> B237_R[src]

Bit 13 - B237

pub fn b238(&self) -> B238_R[src]

Bit 14 - B238

pub fn b239(&self) -> B239_R[src]

Bit 15 - B239

pub fn b240(&self) -> B240_R[src]

Bit 16 - B240

pub fn b241(&self) -> B241_R[src]

Bit 17 - B241

pub fn b242(&self) -> B242_R[src]

Bit 18 - B242

pub fn b243(&self) -> B243_R[src]

Bit 19 - B243

pub fn b244(&self) -> B244_R[src]

Bit 20 - B244

pub fn b245(&self) -> B245_R[src]

Bit 21 - B245

pub fn b246(&self) -> B246_R[src]

Bit 22 - B246

pub fn b247(&self) -> B247_R[src]

Bit 23 - B247

pub fn b248(&self) -> B248_R[src]

Bit 24 - B248

pub fn b249(&self) -> B249_R[src]

Bit 25 - B249

pub fn b250(&self) -> B250_R[src]

Bit 26 - B250

pub fn b251(&self) -> B251_R[src]

Bit 27 - B251

pub fn b252(&self) -> B252_R[src]

Bit 28 - B252

pub fn b253(&self) -> B253_R[src]

Bit 29 - B253

pub fn b254(&self) -> B254_R[src]

Bit 30 - B254

pub fn b255(&self) -> B255_R[src]

Bit 31 - B255

impl R<u32, Reg<u32, _MPCBB2_VCTR8>>[src]

pub fn b256(&self) -> B256_R[src]

Bit 0 - B256

pub fn b257(&self) -> B257_R[src]

Bit 1 - B257

pub fn b258(&self) -> B258_R[src]

Bit 2 - B258

pub fn b259(&self) -> B259_R[src]

Bit 3 - B259

pub fn b260(&self) -> B260_R[src]

Bit 4 - B260

pub fn b261(&self) -> B261_R[src]

Bit 5 - B261

pub fn b262(&self) -> B262_R[src]

Bit 6 - B262

pub fn b263(&self) -> B263_R[src]

Bit 7 - B263

pub fn b264(&self) -> B264_R[src]

Bit 8 - B264

pub fn b265(&self) -> B265_R[src]

Bit 9 - B265

pub fn b266(&self) -> B266_R[src]

Bit 10 - B266

pub fn b267(&self) -> B267_R[src]

Bit 11 - B267

pub fn b268(&self) -> B268_R[src]

Bit 12 - B268

pub fn b269(&self) -> B269_R[src]

Bit 13 - B269

pub fn b270(&self) -> B270_R[src]

Bit 14 - B270

pub fn b271(&self) -> B271_R[src]

Bit 15 - B271

pub fn b272(&self) -> B272_R[src]

Bit 16 - B272

pub fn b273(&self) -> B273_R[src]

Bit 17 - B273

pub fn b274(&self) -> B274_R[src]

Bit 18 - B274

pub fn b275(&self) -> B275_R[src]

Bit 19 - B275

pub fn b276(&self) -> B276_R[src]

Bit 20 - B276

pub fn b277(&self) -> B277_R[src]

Bit 21 - B277

pub fn b278(&self) -> B278_R[src]

Bit 22 - B278

pub fn b279(&self) -> B279_R[src]

Bit 23 - B279

pub fn b280(&self) -> B280_R[src]

Bit 24 - B280

pub fn b281(&self) -> B281_R[src]

Bit 25 - B281

pub fn b282(&self) -> B282_R[src]

Bit 26 - B282

pub fn b283(&self) -> B283_R[src]

Bit 27 - B283

pub fn b284(&self) -> B284_R[src]

Bit 28 - B284

pub fn b285(&self) -> B285_R[src]

Bit 29 - B285

pub fn b286(&self) -> B286_R[src]

Bit 30 - B286

pub fn b287(&self) -> B287_R[src]

Bit 31 - B287

impl R<u32, Reg<u32, _MPCBB2_VCTR9>>[src]

pub fn b288(&self) -> B288_R[src]

Bit 0 - B288

pub fn b289(&self) -> B289_R[src]

Bit 1 - B289

pub fn b290(&self) -> B290_R[src]

Bit 2 - B290

pub fn b291(&self) -> B291_R[src]

Bit 3 - B291

pub fn b292(&self) -> B292_R[src]

Bit 4 - B292

pub fn b293(&self) -> B293_R[src]

Bit 5 - B293

pub fn b294(&self) -> B294_R[src]

Bit 6 - B294

pub fn b295(&self) -> B295_R[src]

Bit 7 - B295

pub fn b296(&self) -> B296_R[src]

Bit 8 - B296

pub fn b297(&self) -> B297_R[src]

Bit 9 - B297

pub fn b298(&self) -> B298_R[src]

Bit 10 - B298

pub fn b299(&self) -> B299_R[src]

Bit 11 - B299

pub fn b300(&self) -> B300_R[src]

Bit 12 - B300

pub fn b301(&self) -> B301_R[src]

Bit 13 - B301

pub fn b302(&self) -> B302_R[src]

Bit 14 - B302

pub fn b303(&self) -> B303_R[src]

Bit 15 - B303

pub fn b304(&self) -> B304_R[src]

Bit 16 - B304

pub fn b305(&self) -> B305_R[src]

Bit 17 - B305

pub fn b306(&self) -> B306_R[src]

Bit 18 - B306

pub fn b307(&self) -> B307_R[src]

Bit 19 - B307

pub fn b308(&self) -> B308_R[src]

Bit 20 - B308

pub fn b309(&self) -> B309_R[src]

Bit 21 - B309

pub fn b310(&self) -> B310_R[src]

Bit 22 - B310

pub fn b311(&self) -> B311_R[src]

Bit 23 - B311

pub fn b312(&self) -> B312_R[src]

Bit 24 - B312

pub fn b313(&self) -> B313_R[src]

Bit 25 - B313

pub fn b314(&self) -> B314_R[src]

Bit 26 - B314

pub fn b315(&self) -> B315_R[src]

Bit 27 - B315

pub fn b316(&self) -> B316_R[src]

Bit 28 - B316

pub fn b317(&self) -> B317_R[src]

Bit 29 - B317

pub fn b318(&self) -> B318_R[src]

Bit 30 - B318

pub fn b319(&self) -> B319_R[src]

Bit 31 - B319

impl R<u32, Reg<u32, _MPCBB2_VCTR10>>[src]

pub fn b320(&self) -> B320_R[src]

Bit 0 - B320

pub fn b321(&self) -> B321_R[src]

Bit 1 - B321

pub fn b322(&self) -> B322_R[src]

Bit 2 - B322

pub fn b323(&self) -> B323_R[src]

Bit 3 - B323

pub fn b324(&self) -> B324_R[src]

Bit 4 - B324

pub fn b325(&self) -> B325_R[src]

Bit 5 - B325

pub fn b326(&self) -> B326_R[src]

Bit 6 - B326

pub fn b327(&self) -> B327_R[src]

Bit 7 - B327

pub fn b328(&self) -> B328_R[src]

Bit 8 - B328

pub fn b329(&self) -> B329_R[src]

Bit 9 - B329

pub fn b330(&self) -> B330_R[src]

Bit 10 - B330

pub fn b331(&self) -> B331_R[src]

Bit 11 - B331

pub fn b332(&self) -> B332_R[src]

Bit 12 - B332

pub fn b333(&self) -> B333_R[src]

Bit 13 - B333

pub fn b334(&self) -> B334_R[src]

Bit 14 - B334

pub fn b335(&self) -> B335_R[src]

Bit 15 - B335

pub fn b336(&self) -> B336_R[src]

Bit 16 - B336

pub fn b337(&self) -> B337_R[src]

Bit 17 - B337

pub fn b338(&self) -> B338_R[src]

Bit 18 - B338

pub fn b339(&self) -> B339_R[src]

Bit 19 - B339

pub fn b340(&self) -> B340_R[src]

Bit 20 - B340

pub fn b341(&self) -> B341_R[src]

Bit 21 - B341

pub fn b342(&self) -> B342_R[src]

Bit 22 - B342

pub fn b343(&self) -> B343_R[src]

Bit 23 - B343

pub fn b344(&self) -> B344_R[src]

Bit 24 - B344

pub fn b345(&self) -> B345_R[src]

Bit 25 - B345

pub fn b346(&self) -> B346_R[src]

Bit 26 - B346

pub fn b347(&self) -> B347_R[src]

Bit 27 - B347

pub fn b348(&self) -> B348_R[src]

Bit 28 - B348

pub fn b349(&self) -> B349_R[src]

Bit 29 - B349

pub fn b350(&self) -> B350_R[src]

Bit 30 - B350

pub fn b351(&self) -> B351_R[src]

Bit 31 - B351

impl R<u32, Reg<u32, _MPCBB2_VCTR11>>[src]

pub fn b352(&self) -> B352_R[src]

Bit 0 - B352

pub fn b353(&self) -> B353_R[src]

Bit 1 - B353

pub fn b354(&self) -> B354_R[src]

Bit 2 - B354

pub fn b355(&self) -> B355_R[src]

Bit 3 - B355

pub fn b356(&self) -> B356_R[src]

Bit 4 - B356

pub fn b357(&self) -> B357_R[src]

Bit 5 - B357

pub fn b358(&self) -> B358_R[src]

Bit 6 - B358

pub fn b359(&self) -> B359_R[src]

Bit 7 - B359

pub fn b360(&self) -> B360_R[src]

Bit 8 - B360

pub fn b361(&self) -> B361_R[src]

Bit 9 - B361

pub fn b362(&self) -> B362_R[src]

Bit 10 - B362

pub fn b363(&self) -> B363_R[src]

Bit 11 - B363

pub fn b364(&self) -> B364_R[src]

Bit 12 - B364

pub fn b365(&self) -> B365_R[src]

Bit 13 - B365

pub fn b366(&self) -> B366_R[src]

Bit 14 - B366

pub fn b367(&self) -> B367_R[src]

Bit 15 - B367

pub fn b368(&self) -> B368_R[src]

Bit 16 - B368

pub fn b369(&self) -> B369_R[src]

Bit 17 - B369

pub fn b370(&self) -> B370_R[src]

Bit 18 - B370

pub fn b371(&self) -> B371_R[src]

Bit 19 - B371

pub fn b372(&self) -> B372_R[src]

Bit 20 - B372

pub fn b373(&self) -> B373_R[src]

Bit 21 - B373

pub fn b374(&self) -> B374_R[src]

Bit 22 - B374

pub fn b375(&self) -> B375_R[src]

Bit 23 - B375

pub fn b376(&self) -> B376_R[src]

Bit 24 - B376

pub fn b377(&self) -> B377_R[src]

Bit 25 - B377

pub fn b378(&self) -> B378_R[src]

Bit 26 - B378

pub fn b379(&self) -> B379_R[src]

Bit 27 - B379

pub fn b380(&self) -> B380_R[src]

Bit 28 - B380

pub fn b381(&self) -> B381_R[src]

Bit 29 - B381

pub fn b382(&self) -> B382_R[src]

Bit 30 - B382

pub fn b383(&self) -> B383_R[src]

Bit 31 - B383

impl R<u32, Reg<u32, _MPCBB2_VCTR12>>[src]

pub fn b384(&self) -> B384_R[src]

Bit 0 - B384

pub fn b385(&self) -> B385_R[src]

Bit 1 - B385

pub fn b386(&self) -> B386_R[src]

Bit 2 - B386

pub fn b387(&self) -> B387_R[src]

Bit 3 - B387

pub fn b388(&self) -> B388_R[src]

Bit 4 - B388

pub fn b389(&self) -> B389_R[src]

Bit 5 - B389

pub fn b390(&self) -> B390_R[src]

Bit 6 - B390

pub fn b391(&self) -> B391_R[src]

Bit 7 - B391

pub fn b392(&self) -> B392_R[src]

Bit 8 - B392

pub fn b393(&self) -> B393_R[src]

Bit 9 - B393

pub fn b394(&self) -> B394_R[src]

Bit 10 - B394

pub fn b395(&self) -> B395_R[src]

Bit 11 - B395

pub fn b396(&self) -> B396_R[src]

Bit 12 - B396

pub fn b397(&self) -> B397_R[src]

Bit 13 - B397

pub fn b398(&self) -> B398_R[src]

Bit 14 - B398

pub fn b399(&self) -> B399_R[src]

Bit 15 - B399

pub fn b400(&self) -> B400_R[src]

Bit 16 - B400

pub fn b401(&self) -> B401_R[src]

Bit 17 - B401

pub fn b402(&self) -> B402_R[src]

Bit 18 - B402

pub fn b403(&self) -> B403_R[src]

Bit 19 - B403

pub fn b404(&self) -> B404_R[src]

Bit 20 - B404

pub fn b405(&self) -> B405_R[src]

Bit 21 - B405

pub fn b406(&self) -> B406_R[src]

Bit 22 - B406

pub fn b407(&self) -> B407_R[src]

Bit 23 - B407

pub fn b408(&self) -> B408_R[src]

Bit 24 - B408

pub fn b409(&self) -> B409_R[src]

Bit 25 - B409

pub fn b410(&self) -> B410_R[src]

Bit 26 - B410

pub fn b411(&self) -> B411_R[src]

Bit 27 - B411

pub fn b412(&self) -> B412_R[src]

Bit 28 - B412

pub fn b413(&self) -> B413_R[src]

Bit 29 - B413

pub fn b414(&self) -> B414_R[src]

Bit 30 - B414

pub fn b415(&self) -> B415_R[src]

Bit 31 - B415

impl R<u32, Reg<u32, _MPCBB2_VCTR13>>[src]

pub fn b416(&self) -> B416_R[src]

Bit 0 - B416

pub fn b417(&self) -> B417_R[src]

Bit 1 - B417

pub fn b418(&self) -> B418_R[src]

Bit 2 - B418

pub fn b419(&self) -> B419_R[src]

Bit 3 - B419

pub fn b420(&self) -> B420_R[src]

Bit 4 - B420

pub fn b421(&self) -> B421_R[src]

Bit 5 - B421

pub fn b422(&self) -> B422_R[src]

Bit 6 - B422

pub fn b423(&self) -> B423_R[src]

Bit 7 - B423

pub fn b424(&self) -> B424_R[src]

Bit 8 - B424

pub fn b425(&self) -> B425_R[src]

Bit 9 - B425

pub fn b426(&self) -> B426_R[src]

Bit 10 - B426

pub fn b427(&self) -> B427_R[src]

Bit 11 - B427

pub fn b428(&self) -> B428_R[src]

Bit 12 - B428

pub fn b429(&self) -> B429_R[src]

Bit 13 - B429

pub fn b430(&self) -> B430_R[src]

Bit 14 - B430

pub fn b431(&self) -> B431_R[src]

Bit 15 - B431

pub fn b432(&self) -> B432_R[src]

Bit 16 - B432

pub fn b433(&self) -> B433_R[src]

Bit 17 - B433

pub fn b434(&self) -> B434_R[src]

Bit 18 - B434

pub fn b435(&self) -> B435_R[src]

Bit 19 - B435

pub fn b436(&self) -> B436_R[src]

Bit 20 - B436

pub fn b437(&self) -> B437_R[src]

Bit 21 - B437

pub fn b438(&self) -> B438_R[src]

Bit 22 - B438

pub fn b439(&self) -> B439_R[src]

Bit 23 - B439

pub fn b440(&self) -> B440_R[src]

Bit 24 - B440

pub fn b441(&self) -> B441_R[src]

Bit 25 - B441

pub fn b442(&self) -> B442_R[src]

Bit 26 - B442

pub fn b443(&self) -> B443_R[src]

Bit 27 - B443

pub fn b444(&self) -> B444_R[src]

Bit 28 - B444

pub fn b445(&self) -> B445_R[src]

Bit 29 - B445

pub fn b446(&self) -> B446_R[src]

Bit 30 - B446

pub fn b447(&self) -> B447_R[src]

Bit 31 - B447

impl R<u32, Reg<u32, _MPCBB2_VCTR14>>[src]

pub fn b448(&self) -> B448_R[src]

Bit 0 - B448

pub fn b449(&self) -> B449_R[src]

Bit 1 - B449

pub fn b450(&self) -> B450_R[src]

Bit 2 - B450

pub fn b451(&self) -> B451_R[src]

Bit 3 - B451

pub fn b452(&self) -> B452_R[src]

Bit 4 - B452

pub fn b453(&self) -> B453_R[src]

Bit 5 - B453

pub fn b454(&self) -> B454_R[src]

Bit 6 - B454

pub fn b455(&self) -> B455_R[src]

Bit 7 - B455

pub fn b456(&self) -> B456_R[src]

Bit 8 - B456

pub fn b457(&self) -> B457_R[src]

Bit 9 - B457

pub fn b458(&self) -> B458_R[src]

Bit 10 - B458

pub fn b459(&self) -> B459_R[src]

Bit 11 - B459

pub fn b460(&self) -> B460_R[src]

Bit 12 - B460

pub fn b461(&self) -> B461_R[src]

Bit 13 - B461

pub fn b462(&self) -> B462_R[src]

Bit 14 - B462

pub fn b463(&self) -> B463_R[src]

Bit 15 - B463

pub fn b464(&self) -> B464_R[src]

Bit 16 - B464

pub fn b465(&self) -> B465_R[src]

Bit 17 - B465

pub fn b466(&self) -> B466_R[src]

Bit 18 - B466

pub fn b467(&self) -> B467_R[src]

Bit 19 - B467

pub fn b468(&self) -> B468_R[src]

Bit 20 - B468

pub fn b469(&self) -> B469_R[src]

Bit 21 - B469

pub fn b470(&self) -> B470_R[src]

Bit 22 - B470

pub fn b471(&self) -> B471_R[src]

Bit 23 - B471

pub fn b472(&self) -> B472_R[src]

Bit 24 - B472

pub fn b473(&self) -> B473_R[src]

Bit 25 - B473

pub fn b474(&self) -> B474_R[src]

Bit 26 - B474

pub fn b475(&self) -> B475_R[src]

Bit 27 - B475

pub fn b476(&self) -> B476_R[src]

Bit 28 - B476

pub fn b477(&self) -> B477_R[src]

Bit 29 - B477

pub fn b478(&self) -> B478_R[src]

Bit 30 - B478

pub fn b479(&self) -> B479_R[src]

Bit 31 - B479

impl R<u32, Reg<u32, _MPCBB2_VCTR15>>[src]

pub fn b480(&self) -> B480_R[src]

Bit 0 - B480

pub fn b481(&self) -> B481_R[src]

Bit 1 - B481

pub fn b482(&self) -> B482_R[src]

Bit 2 - B482

pub fn b483(&self) -> B483_R[src]

Bit 3 - B483

pub fn b484(&self) -> B484_R[src]

Bit 4 - B484

pub fn b485(&self) -> B485_R[src]

Bit 5 - B485

pub fn b486(&self) -> B486_R[src]

Bit 6 - B486

pub fn b487(&self) -> B487_R[src]

Bit 7 - B487

pub fn b488(&self) -> B488_R[src]

Bit 8 - B488

pub fn b489(&self) -> B489_R[src]

Bit 9 - B489

pub fn b490(&self) -> B490_R[src]

Bit 10 - B490

pub fn b491(&self) -> B491_R[src]

Bit 11 - B491

pub fn b492(&self) -> B492_R[src]

Bit 12 - B492

pub fn b493(&self) -> B493_R[src]

Bit 13 - B493

pub fn b494(&self) -> B494_R[src]

Bit 14 - B494

pub fn b495(&self) -> B495_R[src]

Bit 15 - B495

pub fn b496(&self) -> B496_R[src]

Bit 16 - B496

pub fn b497(&self) -> B497_R[src]

Bit 17 - B497

pub fn b498(&self) -> B498_R[src]

Bit 18 - B498

pub fn b499(&self) -> B499_R[src]

Bit 19 - B499

pub fn b500(&self) -> B500_R[src]

Bit 20 - B500

pub fn b501(&self) -> B501_R[src]

Bit 21 - B501

pub fn b502(&self) -> B502_R[src]

Bit 22 - B502

pub fn b503(&self) -> B503_R[src]

Bit 23 - B503

pub fn b504(&self) -> B504_R[src]

Bit 24 - B504

pub fn b505(&self) -> B505_R[src]

Bit 25 - B505

pub fn b506(&self) -> B506_R[src]

Bit 26 - B506

pub fn b507(&self) -> B507_R[src]

Bit 27 - B507

pub fn b508(&self) -> B508_R[src]

Bit 28 - B508

pub fn b509(&self) -> B509_R[src]

Bit 29 - B509

pub fn b510(&self) -> B510_R[src]

Bit 30 - B510

pub fn b511(&self) -> B511_R[src]

Bit 31 - B511

impl R<u32, Reg<u32, _MPCBB2_VCTR16>>[src]

pub fn b512(&self) -> B512_R[src]

Bit 0 - B512

pub fn b513(&self) -> B513_R[src]

Bit 1 - B513

pub fn b514(&self) -> B514_R[src]

Bit 2 - B514

pub fn b515(&self) -> B515_R[src]

Bit 3 - B515

pub fn b516(&self) -> B516_R[src]

Bit 4 - B516

pub fn b517(&self) -> B517_R[src]

Bit 5 - B517

pub fn b518(&self) -> B518_R[src]

Bit 6 - B518

pub fn b519(&self) -> B519_R[src]

Bit 7 - B519

pub fn b520(&self) -> B520_R[src]

Bit 8 - B520

pub fn b521(&self) -> B521_R[src]

Bit 9 - B521

pub fn b522(&self) -> B522_R[src]

Bit 10 - B522

pub fn b523(&self) -> B523_R[src]

Bit 11 - B523

pub fn b524(&self) -> B524_R[src]

Bit 12 - B524

pub fn b525(&self) -> B525_R[src]

Bit 13 - B525

pub fn b526(&self) -> B526_R[src]

Bit 14 - B526

pub fn b527(&self) -> B527_R[src]

Bit 15 - B527

pub fn b528(&self) -> B528_R[src]

Bit 16 - B528

pub fn b529(&self) -> B529_R[src]

Bit 17 - B529

pub fn b530(&self) -> B530_R[src]

Bit 18 - B530

pub fn b531(&self) -> B531_R[src]

Bit 19 - B531

pub fn b532(&self) -> B532_R[src]

Bit 20 - B532

pub fn b533(&self) -> B533_R[src]

Bit 21 - B533

pub fn b534(&self) -> B534_R[src]

Bit 22 - B534

pub fn b535(&self) -> B535_R[src]

Bit 23 - B535

pub fn b536(&self) -> B536_R[src]

Bit 24 - B536

pub fn b537(&self) -> B537_R[src]

Bit 25 - B537

pub fn b538(&self) -> B538_R[src]

Bit 26 - B538

pub fn b539(&self) -> B539_R[src]

Bit 27 - B539

pub fn b540(&self) -> B540_R[src]

Bit 28 - B540

pub fn b541(&self) -> B541_R[src]

Bit 29 - B541

pub fn b542(&self) -> B542_R[src]

Bit 30 - B542

pub fn b543(&self) -> B543_R[src]

Bit 31 - B543

impl R<u32, Reg<u32, _MPCBB2_VCTR17>>[src]

pub fn b544(&self) -> B544_R[src]

Bit 0 - B544

pub fn b545(&self) -> B545_R[src]

Bit 1 - B545

pub fn b546(&self) -> B546_R[src]

Bit 2 - B546

pub fn b547(&self) -> B547_R[src]

Bit 3 - B547

pub fn b548(&self) -> B548_R[src]

Bit 4 - B548

pub fn b549(&self) -> B549_R[src]

Bit 5 - B549

pub fn b550(&self) -> B550_R[src]

Bit 6 - B550

pub fn b551(&self) -> B551_R[src]

Bit 7 - B551

pub fn b552(&self) -> B552_R[src]

Bit 8 - B552

pub fn b553(&self) -> B553_R[src]

Bit 9 - B553

pub fn b554(&self) -> B554_R[src]

Bit 10 - B554

pub fn b555(&self) -> B555_R[src]

Bit 11 - B555

pub fn b556(&self) -> B556_R[src]

Bit 12 - B556

pub fn b557(&self) -> B557_R[src]

Bit 13 - B557

pub fn b558(&self) -> B558_R[src]

Bit 14 - B558

pub fn b559(&self) -> B559_R[src]

Bit 15 - B559

pub fn b560(&self) -> B560_R[src]

Bit 16 - B560

pub fn b561(&self) -> B561_R[src]

Bit 17 - B561

pub fn b562(&self) -> B562_R[src]

Bit 18 - B562

pub fn b563(&self) -> B563_R[src]

Bit 19 - B563

pub fn b564(&self) -> B564_R[src]

Bit 20 - B564

pub fn b565(&self) -> B565_R[src]

Bit 21 - B565

pub fn b566(&self) -> B566_R[src]

Bit 22 - B566

pub fn b567(&self) -> B567_R[src]

Bit 23 - B567

pub fn b568(&self) -> B568_R[src]

Bit 24 - B568

pub fn b569(&self) -> B569_R[src]

Bit 25 - B569

pub fn b570(&self) -> B570_R[src]

Bit 26 - B570

pub fn b571(&self) -> B571_R[src]

Bit 27 - B571

pub fn b572(&self) -> B572_R[src]

Bit 28 - B572

pub fn b573(&self) -> B573_R[src]

Bit 29 - B573

pub fn b574(&self) -> B574_R[src]

Bit 30 - B574

pub fn b575(&self) -> B575_R[src]

Bit 31 - B575

impl R<u32, Reg<u32, _MPCBB2_VCTR18>>[src]

pub fn b576(&self) -> B576_R[src]

Bit 0 - B576

pub fn b577(&self) -> B577_R[src]

Bit 1 - B577

pub fn b578(&self) -> B578_R[src]

Bit 2 - B578

pub fn b579(&self) -> B579_R[src]

Bit 3 - B579

pub fn b580(&self) -> B580_R[src]

Bit 4 - B580

pub fn b581(&self) -> B581_R[src]

Bit 5 - B581

pub fn b582(&self) -> B582_R[src]

Bit 6 - B582

pub fn b583(&self) -> B583_R[src]

Bit 7 - B583

pub fn b584(&self) -> B584_R[src]

Bit 8 - B584

pub fn b585(&self) -> B585_R[src]

Bit 9 - B585

pub fn b586(&self) -> B586_R[src]

Bit 10 - B586

pub fn b587(&self) -> B587_R[src]

Bit 11 - B587

pub fn b588(&self) -> B588_R[src]

Bit 12 - B588

pub fn b589(&self) -> B589_R[src]

Bit 13 - B589

pub fn b590(&self) -> B590_R[src]

Bit 14 - B590

pub fn b591(&self) -> B591_R[src]

Bit 15 - B591

pub fn b592(&self) -> B592_R[src]

Bit 16 - B592

pub fn b593(&self) -> B593_R[src]

Bit 17 - B593

pub fn b594(&self) -> B594_R[src]

Bit 18 - B594

pub fn b595(&self) -> B595_R[src]

Bit 19 - B595

pub fn b596(&self) -> B596_R[src]

Bit 20 - B596

pub fn b597(&self) -> B597_R[src]

Bit 21 - B597

pub fn b598(&self) -> B598_R[src]

Bit 22 - B598

pub fn b599(&self) -> B599_R[src]

Bit 23 - B599

pub fn b600(&self) -> B600_R[src]

Bit 24 - B600

pub fn b601(&self) -> B601_R[src]

Bit 25 - B601

pub fn b602(&self) -> B602_R[src]

Bit 26 - B602

pub fn b603(&self) -> B603_R[src]

Bit 27 - B603

pub fn b604(&self) -> B604_R[src]

Bit 28 - B604

pub fn b605(&self) -> B605_R[src]

Bit 29 - B605

pub fn b606(&self) -> B606_R[src]

Bit 30 - B606

pub fn b607(&self) -> B607_R[src]

Bit 31 - B607

impl R<u32, Reg<u32, _MPCBB2_VCTR19>>[src]

pub fn b608(&self) -> B608_R[src]

Bit 0 - B608

pub fn b609(&self) -> B609_R[src]

Bit 1 - B609

pub fn b610(&self) -> B610_R[src]

Bit 2 - B610

pub fn b611(&self) -> B611_R[src]

Bit 3 - B611

pub fn b612(&self) -> B612_R[src]

Bit 4 - B612

pub fn b613(&self) -> B613_R[src]

Bit 5 - B613

pub fn b614(&self) -> B614_R[src]

Bit 6 - B614

pub fn b615(&self) -> B615_R[src]

Bit 7 - B615

pub fn b616(&self) -> B616_R[src]

Bit 8 - B616

pub fn b617(&self) -> B617_R[src]

Bit 9 - B617

pub fn b618(&self) -> B618_R[src]

Bit 10 - B618

pub fn b619(&self) -> B619_R[src]

Bit 11 - B619

pub fn b620(&self) -> B620_R[src]

Bit 12 - B620

pub fn b621(&self) -> B621_R[src]

Bit 13 - B621

pub fn b622(&self) -> B622_R[src]

Bit 14 - B622

pub fn b623(&self) -> B623_R[src]

Bit 15 - B623

pub fn b624(&self) -> B624_R[src]

Bit 16 - B624

pub fn b625(&self) -> B625_R[src]

Bit 17 - B625

pub fn b626(&self) -> B626_R[src]

Bit 18 - B626

pub fn b627(&self) -> B627_R[src]

Bit 19 - B627

pub fn b628(&self) -> B628_R[src]

Bit 20 - B628

pub fn b629(&self) -> B629_R[src]

Bit 21 - B629

pub fn b630(&self) -> B630_R[src]

Bit 22 - B630

pub fn b631(&self) -> B631_R[src]

Bit 23 - B631

pub fn b632(&self) -> B632_R[src]

Bit 24 - B632

pub fn b633(&self) -> B633_R[src]

Bit 25 - B633

pub fn b634(&self) -> B634_R[src]

Bit 26 - B634

pub fn b635(&self) -> B635_R[src]

Bit 27 - B635

pub fn b636(&self) -> B636_R[src]

Bit 28 - B636

pub fn b637(&self) -> B637_R[src]

Bit 29 - B637

pub fn b638(&self) -> B638_R[src]

Bit 30 - B638

pub fn b639(&self) -> B639_R[src]

Bit 31 - B639

impl R<u32, Reg<u32, _MPCBB2_VCTR20>>[src]

pub fn b640(&self) -> B640_R[src]

Bit 0 - B640

pub fn b641(&self) -> B641_R[src]

Bit 1 - B641

pub fn b642(&self) -> B642_R[src]

Bit 2 - B642

pub fn b643(&self) -> B643_R[src]

Bit 3 - B643

pub fn b644(&self) -> B644_R[src]

Bit 4 - B644

pub fn b645(&self) -> B645_R[src]

Bit 5 - B645

pub fn b646(&self) -> B646_R[src]

Bit 6 - B646

pub fn b647(&self) -> B647_R[src]

Bit 7 - B647

pub fn b648(&self) -> B648_R[src]

Bit 8 - B648

pub fn b649(&self) -> B649_R[src]

Bit 9 - B649

pub fn b650(&self) -> B650_R[src]

Bit 10 - B650

pub fn b651(&self) -> B651_R[src]

Bit 11 - B651

pub fn b652(&self) -> B652_R[src]

Bit 12 - B652

pub fn b653(&self) -> B653_R[src]

Bit 13 - B653

pub fn b654(&self) -> B654_R[src]

Bit 14 - B654

pub fn b655(&self) -> B655_R[src]

Bit 15 - B655

pub fn b656(&self) -> B656_R[src]

Bit 16 - B656

pub fn b657(&self) -> B657_R[src]

Bit 17 - B657

pub fn b658(&self) -> B658_R[src]

Bit 18 - B658

pub fn b659(&self) -> B659_R[src]

Bit 19 - B659

pub fn b660(&self) -> B660_R[src]

Bit 20 - B660

pub fn b661(&self) -> B661_R[src]

Bit 21 - B661

pub fn b662(&self) -> B662_R[src]

Bit 22 - B662

pub fn b663(&self) -> B663_R[src]

Bit 23 - B663

pub fn b664(&self) -> B664_R[src]

Bit 24 - B664

pub fn b665(&self) -> B665_R[src]

Bit 25 - B665

pub fn b666(&self) -> B666_R[src]

Bit 26 - B666

pub fn b667(&self) -> B667_R[src]

Bit 27 - B667

pub fn b668(&self) -> B668_R[src]

Bit 28 - B668

pub fn b669(&self) -> B669_R[src]

Bit 29 - B669

pub fn b670(&self) -> B670_R[src]

Bit 30 - B670

pub fn b671(&self) -> B671_R[src]

Bit 31 - B671

impl R<u32, Reg<u32, _MPCBB2_VCTR21>>[src]

pub fn b672(&self) -> B672_R[src]

Bit 0 - B672

pub fn b673(&self) -> B673_R[src]

Bit 1 - B673

pub fn b674(&self) -> B674_R[src]

Bit 2 - B674

pub fn b675(&self) -> B675_R[src]

Bit 3 - B675

pub fn b676(&self) -> B676_R[src]

Bit 4 - B676

pub fn b677(&self) -> B677_R[src]

Bit 5 - B677

pub fn b678(&self) -> B678_R[src]

Bit 6 - B678

pub fn b679(&self) -> B679_R[src]

Bit 7 - B679

pub fn b680(&self) -> B680_R[src]

Bit 8 - B680

pub fn b681(&self) -> B681_R[src]

Bit 9 - B681

pub fn b682(&self) -> B682_R[src]

Bit 10 - B682

pub fn b683(&self) -> B683_R[src]

Bit 11 - B683

pub fn b684(&self) -> B684_R[src]

Bit 12 - B684

pub fn b685(&self) -> B685_R[src]

Bit 13 - B685

pub fn b686(&self) -> B686_R[src]

Bit 14 - B686

pub fn b687(&self) -> B687_R[src]

Bit 15 - B687

pub fn b688(&self) -> B688_R[src]

Bit 16 - B688

pub fn b689(&self) -> B689_R[src]

Bit 17 - B689

pub fn b690(&self) -> B690_R[src]

Bit 18 - B690

pub fn b691(&self) -> B691_R[src]

Bit 19 - B691

pub fn b692(&self) -> B692_R[src]

Bit 20 - B692

pub fn b693(&self) -> B693_R[src]

Bit 21 - B693

pub fn b694(&self) -> B694_R[src]

Bit 22 - B694

pub fn b695(&self) -> B695_R[src]

Bit 23 - B695

pub fn b696(&self) -> B696_R[src]

Bit 24 - B696

pub fn b697(&self) -> B697_R[src]

Bit 25 - B697

pub fn b698(&self) -> B698_R[src]

Bit 26 - B698

pub fn b699(&self) -> B699_R[src]

Bit 27 - B699

pub fn b700(&self) -> B700_R[src]

Bit 28 - B700

pub fn b701(&self) -> B701_R[src]

Bit 29 - B701

pub fn b702(&self) -> B702_R[src]

Bit 30 - B702

pub fn b703(&self) -> B703_R[src]

Bit 31 - B703

impl R<u32, Reg<u32, _MPCBB2_VCTR22>>[src]

pub fn b704(&self) -> B704_R[src]

Bit 0 - B704

pub fn b705(&self) -> B705_R[src]

Bit 1 - B705

pub fn b706(&self) -> B706_R[src]

Bit 2 - B706

pub fn b707(&self) -> B707_R[src]

Bit 3 - B707

pub fn b708(&self) -> B708_R[src]

Bit 4 - B708

pub fn b709(&self) -> B709_R[src]

Bit 5 - B709

pub fn b710(&self) -> B710_R[src]

Bit 6 - B710

pub fn b711(&self) -> B711_R[src]

Bit 7 - B711

pub fn b712(&self) -> B712_R[src]

Bit 8 - B712

pub fn b713(&self) -> B713_R[src]

Bit 9 - B713

pub fn b714(&self) -> B714_R[src]

Bit 10 - B714

pub fn b715(&self) -> B715_R[src]

Bit 11 - B715

pub fn b716(&self) -> B716_R[src]

Bit 12 - B716

pub fn b717(&self) -> B717_R[src]

Bit 13 - B717

pub fn b718(&self) -> B718_R[src]

Bit 14 - B718

pub fn b719(&self) -> B719_R[src]

Bit 15 - B719

pub fn b720(&self) -> B720_R[src]

Bit 16 - B720

pub fn b721(&self) -> B721_R[src]

Bit 17 - B721

pub fn b722(&self) -> B722_R[src]

Bit 18 - B722

pub fn b723(&self) -> B723_R[src]

Bit 19 - B723

pub fn b724(&self) -> B724_R[src]

Bit 20 - B724

pub fn b725(&self) -> B725_R[src]

Bit 21 - B725

pub fn b726(&self) -> B726_R[src]

Bit 22 - B726

pub fn b727(&self) -> B727_R[src]

Bit 23 - B727

pub fn b728(&self) -> B728_R[src]

Bit 24 - B728

pub fn b729(&self) -> B729_R[src]

Bit 25 - B729

pub fn b730(&self) -> B730_R[src]

Bit 26 - B730

pub fn b731(&self) -> B731_R[src]

Bit 27 - B731

pub fn b732(&self) -> B732_R[src]

Bit 28 - B732

pub fn b733(&self) -> B733_R[src]

Bit 29 - B733

pub fn b734(&self) -> B734_R[src]

Bit 30 - B734

pub fn b735(&self) -> B735_R[src]

Bit 31 - B735

impl R<u32, Reg<u32, _MPCBB2_VCTR23>>[src]

pub fn b736(&self) -> B736_R[src]

Bit 0 - B736

pub fn b737(&self) -> B737_R[src]

Bit 1 - B737

pub fn b738(&self) -> B738_R[src]

Bit 2 - B738

pub fn b739(&self) -> B739_R[src]

Bit 3 - B739

pub fn b740(&self) -> B740_R[src]

Bit 4 - B740

pub fn b741(&self) -> B741_R[src]

Bit 5 - B741

pub fn b742(&self) -> B742_R[src]

Bit 6 - B742

pub fn b743(&self) -> B743_R[src]

Bit 7 - B743

pub fn b744(&self) -> B744_R[src]

Bit 8 - B744

pub fn b745(&self) -> B745_R[src]

Bit 9 - B745

pub fn b746(&self) -> B746_R[src]

Bit 10 - B746

pub fn b747(&self) -> B747_R[src]

Bit 11 - B747

pub fn b748(&self) -> B748_R[src]

Bit 12 - B748

pub fn b749(&self) -> B749_R[src]

Bit 13 - B749

pub fn b750(&self) -> B750_R[src]

Bit 14 - B750

pub fn b751(&self) -> B751_R[src]

Bit 15 - B751

pub fn b752(&self) -> B752_R[src]

Bit 16 - B752

pub fn b753(&self) -> B753_R[src]

Bit 17 - B753

pub fn b754(&self) -> B754_R[src]

Bit 18 - B754

pub fn b755(&self) -> B755_R[src]

Bit 19 - B755

pub fn b756(&self) -> B756_R[src]

Bit 20 - B756

pub fn b757(&self) -> B757_R[src]

Bit 21 - B757

pub fn b758(&self) -> B758_R[src]

Bit 22 - B758

pub fn b759(&self) -> B759_R[src]

Bit 23 - B759

pub fn b760(&self) -> B760_R[src]

Bit 24 - B760

pub fn b761(&self) -> B761_R[src]

Bit 25 - B761

pub fn b762(&self) -> B762_R[src]

Bit 26 - B762

pub fn b763(&self) -> B763_R[src]

Bit 27 - B763

pub fn b764(&self) -> B764_R[src]

Bit 28 - B764

pub fn b765(&self) -> B765_R[src]

Bit 29 - B765

pub fn b766(&self) -> B766_R[src]

Bit 30 - B766

pub fn b767(&self) -> B767_R[src]

Bit 31 - B767

impl R<u32, Reg<u32, _MPCBB2_VCTR24>>[src]

pub fn b768(&self) -> B768_R[src]

Bit 0 - B768

pub fn b769(&self) -> B769_R[src]

Bit 1 - B769

pub fn b770(&self) -> B770_R[src]

Bit 2 - B770

pub fn b771(&self) -> B771_R[src]

Bit 3 - B771

pub fn b772(&self) -> B772_R[src]

Bit 4 - B772

pub fn b773(&self) -> B773_R[src]

Bit 5 - B773

pub fn b774(&self) -> B774_R[src]

Bit 6 - B774

pub fn b775(&self) -> B775_R[src]

Bit 7 - B775

pub fn b776(&self) -> B776_R[src]

Bit 8 - B776

pub fn b777(&self) -> B777_R[src]

Bit 9 - B777

pub fn b778(&self) -> B778_R[src]

Bit 10 - B778

pub fn b779(&self) -> B779_R[src]

Bit 11 - B779

pub fn b780(&self) -> B780_R[src]

Bit 12 - B780

pub fn b781(&self) -> B781_R[src]

Bit 13 - B781

pub fn b782(&self) -> B782_R[src]

Bit 14 - B782

pub fn b783(&self) -> B783_R[src]

Bit 15 - B783

pub fn b784(&self) -> B784_R[src]

Bit 16 - B784

pub fn b785(&self) -> B785_R[src]

Bit 17 - B785

pub fn b786(&self) -> B786_R[src]

Bit 18 - B786

pub fn b787(&self) -> B787_R[src]

Bit 19 - B787

pub fn b788(&self) -> B788_R[src]

Bit 20 - B788

pub fn b789(&self) -> B789_R[src]

Bit 21 - B789

pub fn b790(&self) -> B790_R[src]

Bit 22 - B790

pub fn b791(&self) -> B791_R[src]

Bit 23 - B791

pub fn b792(&self) -> B792_R[src]

Bit 24 - B792

pub fn b793(&self) -> B793_R[src]

Bit 25 - B793

pub fn b794(&self) -> B794_R[src]

Bit 26 - B794

pub fn b795(&self) -> B795_R[src]

Bit 27 - B795

pub fn b796(&self) -> B796_R[src]

Bit 28 - B796

pub fn b797(&self) -> B797_R[src]

Bit 29 - B797

pub fn b798(&self) -> B798_R[src]

Bit 30 - B798

pub fn b799(&self) -> B799_R[src]

Bit 31 - B799

impl R<u32, Reg<u32, _MPCBB2_VCTR25>>[src]

pub fn b800(&self) -> B800_R[src]

Bit 0 - B800

pub fn b801(&self) -> B801_R[src]

Bit 1 - B801

pub fn b802(&self) -> B802_R[src]

Bit 2 - B802

pub fn b803(&self) -> B803_R[src]

Bit 3 - B803

pub fn b804(&self) -> B804_R[src]

Bit 4 - B804

pub fn b805(&self) -> B805_R[src]

Bit 5 - B805

pub fn b806(&self) -> B806_R[src]

Bit 6 - B806

pub fn b807(&self) -> B807_R[src]

Bit 7 - B807

pub fn b808(&self) -> B808_R[src]

Bit 8 - B808

pub fn b809(&self) -> B809_R[src]

Bit 9 - B809

pub fn b810(&self) -> B810_R[src]

Bit 10 - B810

pub fn b811(&self) -> B811_R[src]

Bit 11 - B811

pub fn b812(&self) -> B812_R[src]

Bit 12 - B812

pub fn b813(&self) -> B813_R[src]

Bit 13 - B813

pub fn b814(&self) -> B814_R[src]

Bit 14 - B814

pub fn b815(&self) -> B815_R[src]

Bit 15 - B815

pub fn b816(&self) -> B816_R[src]

Bit 16 - B816

pub fn b817(&self) -> B817_R[src]

Bit 17 - B817

pub fn b818(&self) -> B818_R[src]

Bit 18 - B818

pub fn b819(&self) -> B819_R[src]

Bit 19 - B819

pub fn b820(&self) -> B820_R[src]

Bit 20 - B820

pub fn b821(&self) -> B821_R[src]

Bit 21 - B821

pub fn b822(&self) -> B822_R[src]

Bit 22 - B822

pub fn b823(&self) -> B823_R[src]

Bit 23 - B823

pub fn b824(&self) -> B824_R[src]

Bit 24 - B824

pub fn b825(&self) -> B825_R[src]

Bit 25 - B825

pub fn b826(&self) -> B826_R[src]

Bit 26 - B826

pub fn b827(&self) -> B827_R[src]

Bit 27 - B827

pub fn b828(&self) -> B828_R[src]

Bit 28 - B828

pub fn b829(&self) -> B829_R[src]

Bit 29 - B829

pub fn b830(&self) -> B830_R[src]

Bit 30 - B830

pub fn b831(&self) -> B831_R[src]

Bit 31 - B831

impl R<u32, Reg<u32, _MPCBB2_VCTR26>>[src]

pub fn b832(&self) -> B832_R[src]

Bit 0 - B832

pub fn b833(&self) -> B833_R[src]

Bit 1 - B833

pub fn b834(&self) -> B834_R[src]

Bit 2 - B834

pub fn b835(&self) -> B835_R[src]

Bit 3 - B835

pub fn b836(&self) -> B836_R[src]

Bit 4 - B836

pub fn b837(&self) -> B837_R[src]

Bit 5 - B837

pub fn b838(&self) -> B838_R[src]

Bit 6 - B838

pub fn b839(&self) -> B839_R[src]

Bit 7 - B839

pub fn b840(&self) -> B840_R[src]

Bit 8 - B840

pub fn b841(&self) -> B841_R[src]

Bit 9 - B841

pub fn b842(&self) -> B842_R[src]

Bit 10 - B842

pub fn b843(&self) -> B843_R[src]

Bit 11 - B843

pub fn b844(&self) -> B844_R[src]

Bit 12 - B844

pub fn b845(&self) -> B845_R[src]

Bit 13 - B845

pub fn b846(&self) -> B846_R[src]

Bit 14 - B846

pub fn b847(&self) -> B847_R[src]

Bit 15 - B847

pub fn b848(&self) -> B848_R[src]

Bit 16 - B848

pub fn b849(&self) -> B849_R[src]

Bit 17 - B849

pub fn b850(&self) -> B850_R[src]

Bit 18 - B850

pub fn b851(&self) -> B851_R[src]

Bit 19 - B851

pub fn b852(&self) -> B852_R[src]

Bit 20 - B852

pub fn b853(&self) -> B853_R[src]

Bit 21 - B853

pub fn b854(&self) -> B854_R[src]

Bit 22 - B854

pub fn b855(&self) -> B855_R[src]

Bit 23 - B855

pub fn b856(&self) -> B856_R[src]

Bit 24 - B856

pub fn b857(&self) -> B857_R[src]

Bit 25 - B857

pub fn b858(&self) -> B858_R[src]

Bit 26 - B858

pub fn b859(&self) -> B859_R[src]

Bit 27 - B859

pub fn b860(&self) -> B860_R[src]

Bit 28 - B860

pub fn b861(&self) -> B861_R[src]

Bit 29 - B861

pub fn b862(&self) -> B862_R[src]

Bit 30 - B862

pub fn b863(&self) -> B863_R[src]

Bit 31 - B863

impl R<u32, Reg<u32, _MPCBB2_VCTR27>>[src]

pub fn b864(&self) -> B864_R[src]

Bit 0 - B864

pub fn b865(&self) -> B865_R[src]

Bit 1 - B865

pub fn b866(&self) -> B866_R[src]

Bit 2 - B866

pub fn b867(&self) -> B867_R[src]

Bit 3 - B867

pub fn b868(&self) -> B868_R[src]

Bit 4 - B868

pub fn b869(&self) -> B869_R[src]

Bit 5 - B869

pub fn b870(&self) -> B870_R[src]

Bit 6 - B870

pub fn b871(&self) -> B871_R[src]

Bit 7 - B871

pub fn b872(&self) -> B872_R[src]

Bit 8 - B872

pub fn b873(&self) -> B873_R[src]

Bit 9 - B873

pub fn b874(&self) -> B874_R[src]

Bit 10 - B874

pub fn b875(&self) -> B875_R[src]

Bit 11 - B875

pub fn b876(&self) -> B876_R[src]

Bit 12 - B876

pub fn b877(&self) -> B877_R[src]

Bit 13 - B877

pub fn b878(&self) -> B878_R[src]

Bit 14 - B878

pub fn b879(&self) -> B879_R[src]

Bit 15 - B879

pub fn b880(&self) -> B880_R[src]

Bit 16 - B880

pub fn b881(&self) -> B881_R[src]

Bit 17 - B881

pub fn b882(&self) -> B882_R[src]

Bit 18 - B882

pub fn b883(&self) -> B883_R[src]

Bit 19 - B883

pub fn b884(&self) -> B884_R[src]

Bit 20 - B884

pub fn b885(&self) -> B885_R[src]

Bit 21 - B885

pub fn b886(&self) -> B886_R[src]

Bit 22 - B886

pub fn b887(&self) -> B887_R[src]

Bit 23 - B887

pub fn b888(&self) -> B888_R[src]

Bit 24 - B888

pub fn b889(&self) -> B889_R[src]

Bit 25 - B889

pub fn b890(&self) -> B890_R[src]

Bit 26 - B890

pub fn b891(&self) -> B891_R[src]

Bit 27 - B891

pub fn b892(&self) -> B892_R[src]

Bit 28 - B892

pub fn b893(&self) -> B893_R[src]

Bit 29 - B893

pub fn b894(&self) -> B894_R[src]

Bit 30 - B894

pub fn b895(&self) -> B895_R[src]

Bit 31 - B895

impl R<u32, Reg<u32, _MPCBB2_VCTR28>>[src]

pub fn b896(&self) -> B896_R[src]

Bit 0 - B896

pub fn b897(&self) -> B897_R[src]

Bit 1 - B897

pub fn b898(&self) -> B898_R[src]

Bit 2 - B898

pub fn b899(&self) -> B899_R[src]

Bit 3 - B899

pub fn b900(&self) -> B900_R[src]

Bit 4 - B900

pub fn b901(&self) -> B901_R[src]

Bit 5 - B901

pub fn b902(&self) -> B902_R[src]

Bit 6 - B902

pub fn b903(&self) -> B903_R[src]

Bit 7 - B903

pub fn b904(&self) -> B904_R[src]

Bit 8 - B904

pub fn b905(&self) -> B905_R[src]

Bit 9 - B905

pub fn b906(&self) -> B906_R[src]

Bit 10 - B906

pub fn b907(&self) -> B907_R[src]

Bit 11 - B907

pub fn b908(&self) -> B908_R[src]

Bit 12 - B908

pub fn b909(&self) -> B909_R[src]

Bit 13 - B909

pub fn b910(&self) -> B910_R[src]

Bit 14 - B910

pub fn b911(&self) -> B911_R[src]

Bit 15 - B911

pub fn b912(&self) -> B912_R[src]

Bit 16 - B912

pub fn b913(&self) -> B913_R[src]

Bit 17 - B913

pub fn b914(&self) -> B914_R[src]

Bit 18 - B914

pub fn b915(&self) -> B915_R[src]

Bit 19 - B915

pub fn b916(&self) -> B916_R[src]

Bit 20 - B916

pub fn b917(&self) -> B917_R[src]

Bit 21 - B917

pub fn b918(&self) -> B918_R[src]

Bit 22 - B918

pub fn b919(&self) -> B919_R[src]

Bit 23 - B919

pub fn b920(&self) -> B920_R[src]

Bit 24 - B920

pub fn b921(&self) -> B921_R[src]

Bit 25 - B921

pub fn b922(&self) -> B922_R[src]

Bit 26 - B922

pub fn b923(&self) -> B923_R[src]

Bit 27 - B923

pub fn b924(&self) -> B924_R[src]

Bit 28 - B924

pub fn b925(&self) -> B925_R[src]

Bit 29 - B925

pub fn b926(&self) -> B926_R[src]

Bit 30 - B926

pub fn b927(&self) -> B927_R[src]

Bit 31 - B927

impl R<u32, Reg<u32, _MPCBB2_VCTR29>>[src]

pub fn b928(&self) -> B928_R[src]

Bit 0 - B928

pub fn b929(&self) -> B929_R[src]

Bit 1 - B929

pub fn b930(&self) -> B930_R[src]

Bit 2 - B930

pub fn b931(&self) -> B931_R[src]

Bit 3 - B931

pub fn b932(&self) -> B932_R[src]

Bit 4 - B932

pub fn b933(&self) -> B933_R[src]

Bit 5 - B933

pub fn b934(&self) -> B934_R[src]

Bit 6 - B934

pub fn b935(&self) -> B935_R[src]

Bit 7 - B935

pub fn b936(&self) -> B936_R[src]

Bit 8 - B936

pub fn b937(&self) -> B937_R[src]

Bit 9 - B937

pub fn b938(&self) -> B938_R[src]

Bit 10 - B938

pub fn b939(&self) -> B939_R[src]

Bit 11 - B939

pub fn b940(&self) -> B940_R[src]

Bit 12 - B940

pub fn b941(&self) -> B941_R[src]

Bit 13 - B941

pub fn b942(&self) -> B942_R[src]

Bit 14 - B942

pub fn b943(&self) -> B943_R[src]

Bit 15 - B943

pub fn b944(&self) -> B944_R[src]

Bit 16 - B944

pub fn b945(&self) -> B945_R[src]

Bit 17 - B945

pub fn b946(&self) -> B946_R[src]

Bit 18 - B946

pub fn b947(&self) -> B947_R[src]

Bit 19 - B947

pub fn b948(&self) -> B948_R[src]

Bit 20 - B948

pub fn b949(&self) -> B949_R[src]

Bit 21 - B949

pub fn b950(&self) -> B950_R[src]

Bit 22 - B950

pub fn b951(&self) -> B951_R[src]

Bit 23 - B951

pub fn b952(&self) -> B952_R[src]

Bit 24 - B952

pub fn b953(&self) -> B953_R[src]

Bit 25 - B953

pub fn b954(&self) -> B954_R[src]

Bit 26 - B954

pub fn b955(&self) -> B955_R[src]

Bit 27 - B955

pub fn b956(&self) -> B956_R[src]

Bit 28 - B956

pub fn b957(&self) -> B957_R[src]

Bit 29 - B957

pub fn b958(&self) -> B958_R[src]

Bit 30 - B958

pub fn b959(&self) -> B959_R[src]

Bit 31 - B959

impl R<u32, Reg<u32, _MPCBB2_VCTR30>>[src]

pub fn b960(&self) -> B960_R[src]

Bit 0 - B960

pub fn b961(&self) -> B961_R[src]

Bit 1 - B961

pub fn b962(&self) -> B962_R[src]

Bit 2 - B962

pub fn b963(&self) -> B963_R[src]

Bit 3 - B963

pub fn b964(&self) -> B964_R[src]

Bit 4 - B964

pub fn b965(&self) -> B965_R[src]

Bit 5 - B965

pub fn b966(&self) -> B966_R[src]

Bit 6 - B966

pub fn b967(&self) -> B967_R[src]

Bit 7 - B967

pub fn b968(&self) -> B968_R[src]

Bit 8 - B968

pub fn b969(&self) -> B969_R[src]

Bit 9 - B969

pub fn b970(&self) -> B970_R[src]

Bit 10 - B970

pub fn b971(&self) -> B971_R[src]

Bit 11 - B971

pub fn b972(&self) -> B972_R[src]

Bit 12 - B972

pub fn b973(&self) -> B973_R[src]

Bit 13 - B973

pub fn b974(&self) -> B974_R[src]

Bit 14 - B974

pub fn b975(&self) -> B975_R[src]

Bit 15 - B975

pub fn b976(&self) -> B976_R[src]

Bit 16 - B976

pub fn b977(&self) -> B977_R[src]

Bit 17 - B977

pub fn b978(&self) -> B978_R[src]

Bit 18 - B978

pub fn b979(&self) -> B979_R[src]

Bit 19 - B979

pub fn b980(&self) -> B980_R[src]

Bit 20 - B980

pub fn b981(&self) -> B981_R[src]

Bit 21 - B981

pub fn b982(&self) -> B982_R[src]

Bit 22 - B982

pub fn b983(&self) -> B983_R[src]

Bit 23 - B983

pub fn b984(&self) -> B984_R[src]

Bit 24 - B984

pub fn b985(&self) -> B985_R[src]

Bit 25 - B985

pub fn b986(&self) -> B986_R[src]

Bit 26 - B986

pub fn b987(&self) -> B987_R[src]

Bit 27 - B987

pub fn b988(&self) -> B988_R[src]

Bit 28 - B988

pub fn b989(&self) -> B989_R[src]

Bit 29 - B989

pub fn b990(&self) -> B990_R[src]

Bit 30 - B990

pub fn b991(&self) -> B991_R[src]

Bit 31 - B991

impl R<u32, Reg<u32, _MPCBB2_VCTR31>>[src]

pub fn b992(&self) -> B992_R[src]

Bit 0 - B992

pub fn b993(&self) -> B993_R[src]

Bit 1 - B993

pub fn b994(&self) -> B994_R[src]

Bit 2 - B994

pub fn b995(&self) -> B995_R[src]

Bit 3 - B995

pub fn b996(&self) -> B996_R[src]

Bit 4 - B996

pub fn b997(&self) -> B997_R[src]

Bit 5 - B997

pub fn b998(&self) -> B998_R[src]

Bit 6 - B998

pub fn b999(&self) -> B999_R[src]

Bit 7 - B999

pub fn b1000(&self) -> B1000_R[src]

Bit 8 - B1000

pub fn b1001(&self) -> B1001_R[src]

Bit 9 - B1001

pub fn b1002(&self) -> B1002_R[src]

Bit 10 - B1002

pub fn b1003(&self) -> B1003_R[src]

Bit 11 - B1003

pub fn b1004(&self) -> B1004_R[src]

Bit 12 - B1004

pub fn b1005(&self) -> B1005_R[src]

Bit 13 - B1005

pub fn b1006(&self) -> B1006_R[src]

Bit 14 - B1006

pub fn b1007(&self) -> B1007_R[src]

Bit 15 - B1007

pub fn b1008(&self) -> B1008_R[src]

Bit 16 - B1008

pub fn b1009(&self) -> B1009_R[src]

Bit 17 - B1009

pub fn b1010(&self) -> B1010_R[src]

Bit 18 - B1010

pub fn b1011(&self) -> B1011_R[src]

Bit 19 - B1011

pub fn b1012(&self) -> B1012_R[src]

Bit 20 - B1012

pub fn b1013(&self) -> B1013_R[src]

Bit 21 - B1013

pub fn b1014(&self) -> B1014_R[src]

Bit 22 - B1014

pub fn b1015(&self) -> B1015_R[src]

Bit 23 - B1015

pub fn b1016(&self) -> B1016_R[src]

Bit 24 - B1016

pub fn b1017(&self) -> B1017_R[src]

Bit 25 - B1017

pub fn b1018(&self) -> B1018_R[src]

Bit 26 - B1018

pub fn b1019(&self) -> B1019_R[src]

Bit 27 - B1019

pub fn b1020(&self) -> B1020_R[src]

Bit 28 - B1020

pub fn b1021(&self) -> B1021_R[src]

Bit 29 - B1021

pub fn b1022(&self) -> B1022_R[src]

Bit 30 - B1022

pub fn b1023(&self) -> B1023_R[src]

Bit 31 - B1023

impl R<u32, Reg<u32, _MPCBB2_VCTR32>>[src]

pub fn b1024(&self) -> B1024_R[src]

Bit 0 - B1024

pub fn b1025(&self) -> B1025_R[src]

Bit 1 - B1025

pub fn b1026(&self) -> B1026_R[src]

Bit 2 - B1026

pub fn b1027(&self) -> B1027_R[src]

Bit 3 - B1027

pub fn b1028(&self) -> B1028_R[src]

Bit 4 - B1028

pub fn b1029(&self) -> B1029_R[src]

Bit 5 - B1029

pub fn b1030(&self) -> B1030_R[src]

Bit 6 - B1030

pub fn b1031(&self) -> B1031_R[src]

Bit 7 - B1031

pub fn b1032(&self) -> B1032_R[src]

Bit 8 - B1032

pub fn b1033(&self) -> B1033_R[src]

Bit 9 - B1033

pub fn b1034(&self) -> B1034_R[src]

Bit 10 - B1034

pub fn b1035(&self) -> B1035_R[src]

Bit 11 - B1035

pub fn b1036(&self) -> B1036_R[src]

Bit 12 - B1036

pub fn b1037(&self) -> B1037_R[src]

Bit 13 - B1037

pub fn b1038(&self) -> B1038_R[src]

Bit 14 - B1038

pub fn b1039(&self) -> B1039_R[src]

Bit 15 - B1039

pub fn b1040(&self) -> B1040_R[src]

Bit 16 - B1040

pub fn b1041(&self) -> B1041_R[src]

Bit 17 - B1041

pub fn b1042(&self) -> B1042_R[src]

Bit 18 - B1042

pub fn b1043(&self) -> B1043_R[src]

Bit 19 - B1043

pub fn b1044(&self) -> B1044_R[src]

Bit 20 - B1044

pub fn b1045(&self) -> B1045_R[src]

Bit 21 - B1045

pub fn b1046(&self) -> B1046_R[src]

Bit 22 - B1046

pub fn b1047(&self) -> B1047_R[src]

Bit 23 - B1047

pub fn b1048(&self) -> B1048_R[src]

Bit 24 - B1048

pub fn b1049(&self) -> B1049_R[src]

Bit 25 - B1049

pub fn b1050(&self) -> B1050_R[src]

Bit 26 - B1050

pub fn b1051(&self) -> B1051_R[src]

Bit 27 - B1051

pub fn b1052(&self) -> B1052_R[src]

Bit 28 - B1052

pub fn b1053(&self) -> B1053_R[src]

Bit 29 - B1053

pub fn b1054(&self) -> B1054_R[src]

Bit 30 - B1054

pub fn b1055(&self) -> B1055_R[src]

Bit 31 - B1055

impl R<u32, Reg<u32, _MPCBB2_VCTR33>>[src]

pub fn b1056(&self) -> B1056_R[src]

Bit 0 - B1056

pub fn b1057(&self) -> B1057_R[src]

Bit 1 - B1057

pub fn b1058(&self) -> B1058_R[src]

Bit 2 - B1058

pub fn b1059(&self) -> B1059_R[src]

Bit 3 - B1059

pub fn b1060(&self) -> B1060_R[src]

Bit 4 - B1060

pub fn b1061(&self) -> B1061_R[src]

Bit 5 - B1061

pub fn b1062(&self) -> B1062_R[src]

Bit 6 - B1062

pub fn b1063(&self) -> B1063_R[src]

Bit 7 - B1063

pub fn b1064(&self) -> B1064_R[src]

Bit 8 - B1064

pub fn b1065(&self) -> B1065_R[src]

Bit 9 - B1065

pub fn b1066(&self) -> B1066_R[src]

Bit 10 - B1066

pub fn b1067(&self) -> B1067_R[src]

Bit 11 - B1067

pub fn b1068(&self) -> B1068_R[src]

Bit 12 - B1068

pub fn b1069(&self) -> B1069_R[src]

Bit 13 - B1069

pub fn b1070(&self) -> B1070_R[src]

Bit 14 - B1070

pub fn b1071(&self) -> B1071_R[src]

Bit 15 - B1071

pub fn b1072(&self) -> B1072_R[src]

Bit 16 - B1072

pub fn b1073(&self) -> B1073_R[src]

Bit 17 - B1073

pub fn b1074(&self) -> B1074_R[src]

Bit 18 - B1074

pub fn b1075(&self) -> B1075_R[src]

Bit 19 - B1075

pub fn b1076(&self) -> B1076_R[src]

Bit 20 - B1076

pub fn b1077(&self) -> B1077_R[src]

Bit 21 - B1077

pub fn b1078(&self) -> B1078_R[src]

Bit 22 - B1078

pub fn b1079(&self) -> B1079_R[src]

Bit 23 - B1079

pub fn b1080(&self) -> B1080_R[src]

Bit 24 - B1080

pub fn b1081(&self) -> B1081_R[src]

Bit 25 - B1081

pub fn b1082(&self) -> B1082_R[src]

Bit 26 - B1082

pub fn b1083(&self) -> B1083_R[src]

Bit 27 - B1083

pub fn b1084(&self) -> B1084_R[src]

Bit 28 - B1084

pub fn b1085(&self) -> B1085_R[src]

Bit 29 - B1085

pub fn b1086(&self) -> B1086_R[src]

Bit 30 - B1086

pub fn b1087(&self) -> B1087_R[src]

Bit 31 - B1087

impl R<u32, Reg<u32, _MPCBB2_VCTR34>>[src]

pub fn b1088(&self) -> B1088_R[src]

Bit 0 - B1088

pub fn b1089(&self) -> B1089_R[src]

Bit 1 - B1089

pub fn b1090(&self) -> B1090_R[src]

Bit 2 - B1090

pub fn b1091(&self) -> B1091_R[src]

Bit 3 - B1091

pub fn b1092(&self) -> B1092_R[src]

Bit 4 - B1092

pub fn b1093(&self) -> B1093_R[src]

Bit 5 - B1093

pub fn b1094(&self) -> B1094_R[src]

Bit 6 - B1094

pub fn b1095(&self) -> B1095_R[src]

Bit 7 - B1095

pub fn b1096(&self) -> B1096_R[src]

Bit 8 - B1096

pub fn b1097(&self) -> B1097_R[src]

Bit 9 - B1097

pub fn b1098(&self) -> B1098_R[src]

Bit 10 - B1098

pub fn b1099(&self) -> B1099_R[src]

Bit 11 - B1099

pub fn b1100(&self) -> B1100_R[src]

Bit 12 - B1100

pub fn b1101(&self) -> B1101_R[src]

Bit 13 - B1101

pub fn b1102(&self) -> B1102_R[src]

Bit 14 - B1102

pub fn b1103(&self) -> B1103_R[src]

Bit 15 - B1103

pub fn b1104(&self) -> B1104_R[src]

Bit 16 - B1104

pub fn b1105(&self) -> B1105_R[src]

Bit 17 - B1105

pub fn b1106(&self) -> B1106_R[src]

Bit 18 - B1106

pub fn b1107(&self) -> B1107_R[src]

Bit 19 - B1107

pub fn b1108(&self) -> B1108_R[src]

Bit 20 - B1108

pub fn b1109(&self) -> B1109_R[src]

Bit 21 - B1109

pub fn b1110(&self) -> B1110_R[src]

Bit 22 - B1110

pub fn b1111(&self) -> B1111_R[src]

Bit 23 - B1111

pub fn b1112(&self) -> B1112_R[src]

Bit 24 - B1112

pub fn b1113(&self) -> B1113_R[src]

Bit 25 - B1113

pub fn b1114(&self) -> B1114_R[src]

Bit 26 - B1114

pub fn b1115(&self) -> B1115_R[src]

Bit 27 - B1115

pub fn b1116(&self) -> B1116_R[src]

Bit 28 - B1116

pub fn b1117(&self) -> B1117_R[src]

Bit 29 - B1117

pub fn b1118(&self) -> B1118_R[src]

Bit 30 - B1118

pub fn b1119(&self) -> B1119_R[src]

Bit 31 - B1119

impl R<u32, Reg<u32, _MPCBB2_VCTR35>>[src]

pub fn b1120(&self) -> B1120_R[src]

Bit 0 - B1120

pub fn b1121(&self) -> B1121_R[src]

Bit 1 - B1121

pub fn b1122(&self) -> B1122_R[src]

Bit 2 - B1122

pub fn b1123(&self) -> B1123_R[src]

Bit 3 - B1123

pub fn b1124(&self) -> B1124_R[src]

Bit 4 - B1124

pub fn b1125(&self) -> B1125_R[src]

Bit 5 - B1125

pub fn b1126(&self) -> B1126_R[src]

Bit 6 - B1126

pub fn b1127(&self) -> B1127_R[src]

Bit 7 - B1127

pub fn b1128(&self) -> B1128_R[src]

Bit 8 - B1128

pub fn b1129(&self) -> B1129_R[src]

Bit 9 - B1129

pub fn b1130(&self) -> B1130_R[src]

Bit 10 - B1130

pub fn b1131(&self) -> B1131_R[src]

Bit 11 - B1131

pub fn b1132(&self) -> B1132_R[src]

Bit 12 - B1132

pub fn b1133(&self) -> B1133_R[src]

Bit 13 - B1133

pub fn b1134(&self) -> B1134_R[src]

Bit 14 - B1134

pub fn b1135(&self) -> B1135_R[src]

Bit 15 - B1135

pub fn b1136(&self) -> B1136_R[src]

Bit 16 - B1136

pub fn b1137(&self) -> B1137_R[src]

Bit 17 - B1137

pub fn b1138(&self) -> B1138_R[src]

Bit 18 - B1138

pub fn b1139(&self) -> B1139_R[src]

Bit 19 - B1139

pub fn b1140(&self) -> B1140_R[src]

Bit 20 - B1140

pub fn b1141(&self) -> B1141_R[src]

Bit 21 - B1141

pub fn b1142(&self) -> B1142_R[src]

Bit 22 - B1142

pub fn b1143(&self) -> B1143_R[src]

Bit 23 - B1143

pub fn b1144(&self) -> B1144_R[src]

Bit 24 - B1144

pub fn b1145(&self) -> B1145_R[src]

Bit 25 - B1145

pub fn b1146(&self) -> B1146_R[src]

Bit 26 - B1146

pub fn b1147(&self) -> B1147_R[src]

Bit 27 - B1147

pub fn b1148(&self) -> B1148_R[src]

Bit 28 - B1148

pub fn b1149(&self) -> B1149_R[src]

Bit 29 - B1149

pub fn b1150(&self) -> B1150_R[src]

Bit 30 - B1150

pub fn b1151(&self) -> B1151_R[src]

Bit 31 - B1151

impl R<u32, Reg<u32, _MPCBB2_VCTR36>>[src]

pub fn b1152(&self) -> B1152_R[src]

Bit 0 - B1152

pub fn b1153(&self) -> B1153_R[src]

Bit 1 - B1153

pub fn b1154(&self) -> B1154_R[src]

Bit 2 - B1154

pub fn b1155(&self) -> B1155_R[src]

Bit 3 - B1155

pub fn b1156(&self) -> B1156_R[src]

Bit 4 - B1156

pub fn b1157(&self) -> B1157_R[src]

Bit 5 - B1157

pub fn b1158(&self) -> B1158_R[src]

Bit 6 - B1158

pub fn b1159(&self) -> B1159_R[src]

Bit 7 - B1159

pub fn b1160(&self) -> B1160_R[src]

Bit 8 - B1160

pub fn b1161(&self) -> B1161_R[src]

Bit 9 - B1161

pub fn b1162(&self) -> B1162_R[src]

Bit 10 - B1162

pub fn b1163(&self) -> B1163_R[src]

Bit 11 - B1163

pub fn b1164(&self) -> B1164_R[src]

Bit 12 - B1164

pub fn b1165(&self) -> B1165_R[src]

Bit 13 - B1165

pub fn b1166(&self) -> B1166_R[src]

Bit 14 - B1166

pub fn b1167(&self) -> B1167_R[src]

Bit 15 - B1167

pub fn b1168(&self) -> B1168_R[src]

Bit 16 - B1168

pub fn b1169(&self) -> B1169_R[src]

Bit 17 - B1169

pub fn b1170(&self) -> B1170_R[src]

Bit 18 - B1170

pub fn b1171(&self) -> B1171_R[src]

Bit 19 - B1171

pub fn b1172(&self) -> B1172_R[src]

Bit 20 - B1172

pub fn b1173(&self) -> B1173_R[src]

Bit 21 - B1173

pub fn b1174(&self) -> B1174_R[src]

Bit 22 - B1174

pub fn b1175(&self) -> B1175_R[src]

Bit 23 - B1175

pub fn b1176(&self) -> B1176_R[src]

Bit 24 - B1176

pub fn b1177(&self) -> B1177_R[src]

Bit 25 - B1177

pub fn b1178(&self) -> B1178_R[src]

Bit 26 - B1178

pub fn b1179(&self) -> B1179_R[src]

Bit 27 - B1179

pub fn b1180(&self) -> B1180_R[src]

Bit 28 - B1180

pub fn b1181(&self) -> B1181_R[src]

Bit 29 - B1181

pub fn b1182(&self) -> B1182_R[src]

Bit 30 - B1182

pub fn b1183(&self) -> B1183_R[src]

Bit 31 - B1183

impl R<u32, Reg<u32, _MPCBB2_VCTR37>>[src]

pub fn b1184(&self) -> B1184_R[src]

Bit 0 - B1184

pub fn b1185(&self) -> B1185_R[src]

Bit 1 - B1185

pub fn b1186(&self) -> B1186_R[src]

Bit 2 - B1186

pub fn b1187(&self) -> B1187_R[src]

Bit 3 - B1187

pub fn b1188(&self) -> B1188_R[src]

Bit 4 - B1188

pub fn b1189(&self) -> B1189_R[src]

Bit 5 - B1189

pub fn b1190(&self) -> B1190_R[src]

Bit 6 - B1190

pub fn b1191(&self) -> B1191_R[src]

Bit 7 - B1191

pub fn b1192(&self) -> B1192_R[src]

Bit 8 - B1192

pub fn b1193(&self) -> B1193_R[src]

Bit 9 - B1193

pub fn b1194(&self) -> B1194_R[src]

Bit 10 - B1194

pub fn b1195(&self) -> B1195_R[src]

Bit 11 - B1195

pub fn b1196(&self) -> B1196_R[src]

Bit 12 - B1196

pub fn b1197(&self) -> B1197_R[src]

Bit 13 - B1197

pub fn b1198(&self) -> B1198_R[src]

Bit 14 - B1198

pub fn b1199(&self) -> B1199_R[src]

Bit 15 - B1199

pub fn b1200(&self) -> B1200_R[src]

Bit 16 - B1200

pub fn b1201(&self) -> B1201_R[src]

Bit 17 - B1201

pub fn b1202(&self) -> B1202_R[src]

Bit 18 - B1202

pub fn b1203(&self) -> B1203_R[src]

Bit 19 - B1203

pub fn b1204(&self) -> B1204_R[src]

Bit 20 - B1204

pub fn b1205(&self) -> B1205_R[src]

Bit 21 - B1205

pub fn b1206(&self) -> B1206_R[src]

Bit 22 - B1206

pub fn b1207(&self) -> B1207_R[src]

Bit 23 - B1207

pub fn b1208(&self) -> B1208_R[src]

Bit 24 - B1208

pub fn b1209(&self) -> B1209_R[src]

Bit 25 - B1209

pub fn b1210(&self) -> B1210_R[src]

Bit 26 - B1210

pub fn b1211(&self) -> B1211_R[src]

Bit 27 - B1211

pub fn b1212(&self) -> B1212_R[src]

Bit 28 - B1212

pub fn b1213(&self) -> B1213_R[src]

Bit 29 - B1213

pub fn b1214(&self) -> B1214_R[src]

Bit 30 - B1214

pub fn b1215(&self) -> B1215_R[src]

Bit 31 - B1215

impl R<u32, Reg<u32, _MPCBB2_VCTR38>>[src]

pub fn b1216(&self) -> B1216_R[src]

Bit 0 - B1216

pub fn b1217(&self) -> B1217_R[src]

Bit 1 - B1217

pub fn b1218(&self) -> B1218_R[src]

Bit 2 - B1218

pub fn b1219(&self) -> B1219_R[src]

Bit 3 - B1219

pub fn b1220(&self) -> B1220_R[src]

Bit 4 - B1220

pub fn b1221(&self) -> B1221_R[src]

Bit 5 - B1221

pub fn b1222(&self) -> B1222_R[src]

Bit 6 - B1222

pub fn b1223(&self) -> B1223_R[src]

Bit 7 - B1223

pub fn b1224(&self) -> B1224_R[src]

Bit 8 - B1224

pub fn b1225(&self) -> B1225_R[src]

Bit 9 - B1225

pub fn b1226(&self) -> B1226_R[src]

Bit 10 - B1226

pub fn b1227(&self) -> B1227_R[src]

Bit 11 - B1227

pub fn b1228(&self) -> B1228_R[src]

Bit 12 - B1228

pub fn b1229(&self) -> B1229_R[src]

Bit 13 - B1229

pub fn b1230(&self) -> B1230_R[src]

Bit 14 - B1230

pub fn b1231(&self) -> B1231_R[src]

Bit 15 - B1231

pub fn b1232(&self) -> B1232_R[src]

Bit 16 - B1232

pub fn b1233(&self) -> B1233_R[src]

Bit 17 - B1233

pub fn b1234(&self) -> B1234_R[src]

Bit 18 - B1234

pub fn b1235(&self) -> B1235_R[src]

Bit 19 - B1235

pub fn b1236(&self) -> B1236_R[src]

Bit 20 - B1236

pub fn b1237(&self) -> B1237_R[src]

Bit 21 - B1237

pub fn b1238(&self) -> B1238_R[src]

Bit 22 - B1238

pub fn b1239(&self) -> B1239_R[src]

Bit 23 - B1239

pub fn b1240(&self) -> B1240_R[src]

Bit 24 - B1240

pub fn b1241(&self) -> B1241_R[src]

Bit 25 - B1241

pub fn b1242(&self) -> B1242_R[src]

Bit 26 - B1242

pub fn b1243(&self) -> B1243_R[src]

Bit 27 - B1243

pub fn b1244(&self) -> B1244_R[src]

Bit 28 - B1244

pub fn b1245(&self) -> B1245_R[src]

Bit 29 - B1245

pub fn b1246(&self) -> B1246_R[src]

Bit 30 - B1246

pub fn b1247(&self) -> B1247_R[src]

Bit 31 - B1247

impl R<u32, Reg<u32, _MPCBB2_VCTR39>>[src]

pub fn b1248(&self) -> B1248_R[src]

Bit 0 - B1248

pub fn b1249(&self) -> B1249_R[src]

Bit 1 - B1249

pub fn b1250(&self) -> B1250_R[src]

Bit 2 - B1250

pub fn b1251(&self) -> B1251_R[src]

Bit 3 - B1251

pub fn b1252(&self) -> B1252_R[src]

Bit 4 - B1252

pub fn b1253(&self) -> B1253_R[src]

Bit 5 - B1253

pub fn b1254(&self) -> B1254_R[src]

Bit 6 - B1254

pub fn b1255(&self) -> B1255_R[src]

Bit 7 - B1255

pub fn b1256(&self) -> B1256_R[src]

Bit 8 - B1256

pub fn b1257(&self) -> B1257_R[src]

Bit 9 - B1257

pub fn b1258(&self) -> B1258_R[src]

Bit 10 - B1258

pub fn b1259(&self) -> B1259_R[src]

Bit 11 - B1259

pub fn b1260(&self) -> B1260_R[src]

Bit 12 - B1260

pub fn b1261(&self) -> B1261_R[src]

Bit 13 - B1261

pub fn b1262(&self) -> B1262_R[src]

Bit 14 - B1262

pub fn b1263(&self) -> B1263_R[src]

Bit 15 - B1263

pub fn b1264(&self) -> B1264_R[src]

Bit 16 - B1264

pub fn b1265(&self) -> B1265_R[src]

Bit 17 - B1265

pub fn b1266(&self) -> B1266_R[src]

Bit 18 - B1266

pub fn b1267(&self) -> B1267_R[src]

Bit 19 - B1267

pub fn b1268(&self) -> B1268_R[src]

Bit 20 - B1268

pub fn b1269(&self) -> B1269_R[src]

Bit 21 - B1269

pub fn b1270(&self) -> B1270_R[src]

Bit 22 - B1270

pub fn b1271(&self) -> B1271_R[src]

Bit 23 - B1271

pub fn b1272(&self) -> B1272_R[src]

Bit 24 - B1272

pub fn b1273(&self) -> B1273_R[src]

Bit 25 - B1273

pub fn b1274(&self) -> B1274_R[src]

Bit 26 - B1274

pub fn b1275(&self) -> B1275_R[src]

Bit 27 - B1275

pub fn b1276(&self) -> B1276_R[src]

Bit 28 - B1276

pub fn b1277(&self) -> B1277_R[src]

Bit 29 - B1277

pub fn b1278(&self) -> B1278_R[src]

Bit 30 - B1278

pub fn b1279(&self) -> B1279_R[src]

Bit 31 - B1279

impl R<u32, Reg<u32, _MPCBB2_VCTR40>>[src]

pub fn b1280(&self) -> B1280_R[src]

Bit 0 - B1280

pub fn b1281(&self) -> B1281_R[src]

Bit 1 - B1281

pub fn b1282(&self) -> B1282_R[src]

Bit 2 - B1282

pub fn b1283(&self) -> B1283_R[src]

Bit 3 - B1283

pub fn b1284(&self) -> B1284_R[src]

Bit 4 - B1284

pub fn b1285(&self) -> B1285_R[src]

Bit 5 - B1285

pub fn b1286(&self) -> B1286_R[src]

Bit 6 - B1286

pub fn b1287(&self) -> B1287_R[src]

Bit 7 - B1287

pub fn b1288(&self) -> B1288_R[src]

Bit 8 - B1288

pub fn b1289(&self) -> B1289_R[src]

Bit 9 - B1289

pub fn b1290(&self) -> B1290_R[src]

Bit 10 - B1290

pub fn b1291(&self) -> B1291_R[src]

Bit 11 - B1291

pub fn b1292(&self) -> B1292_R[src]

Bit 12 - B1292

pub fn b1293(&self) -> B1293_R[src]

Bit 13 - B1293

pub fn b1294(&self) -> B1294_R[src]

Bit 14 - B1294

pub fn b1295(&self) -> B1295_R[src]

Bit 15 - B1295

pub fn b1296(&self) -> B1296_R[src]

Bit 16 - B1296

pub fn b1297(&self) -> B1297_R[src]

Bit 17 - B1297

pub fn b1298(&self) -> B1298_R[src]

Bit 18 - B1298

pub fn b1299(&self) -> B1299_R[src]

Bit 19 - B1299

pub fn b1300(&self) -> B1300_R[src]

Bit 20 - B1300

pub fn b1301(&self) -> B1301_R[src]

Bit 21 - B1301

pub fn b1302(&self) -> B1302_R[src]

Bit 22 - B1302

pub fn b1303(&self) -> B1303_R[src]

Bit 23 - B1303

pub fn b1304(&self) -> B1304_R[src]

Bit 24 - B1304

pub fn b1305(&self) -> B1305_R[src]

Bit 25 - B1305

pub fn b1306(&self) -> B1306_R[src]

Bit 26 - B1306

pub fn b1307(&self) -> B1307_R[src]

Bit 27 - B1307

pub fn b1308(&self) -> B1308_R[src]

Bit 28 - B1308

pub fn b1309(&self) -> B1309_R[src]

Bit 29 - B1309

pub fn b1310(&self) -> B1310_R[src]

Bit 30 - B1310

pub fn b1311(&self) -> B1311_R[src]

Bit 31 - B1311

impl R<u32, Reg<u32, _MPCBB2_VCTR41>>[src]

pub fn b1312(&self) -> B1312_R[src]

Bit 0 - B1312

pub fn b1313(&self) -> B1313_R[src]

Bit 1 - B1313

pub fn b1314(&self) -> B1314_R[src]

Bit 2 - B1314

pub fn b1315(&self) -> B1315_R[src]

Bit 3 - B1315

pub fn b1316(&self) -> B1316_R[src]

Bit 4 - B1316

pub fn b1317(&self) -> B1317_R[src]

Bit 5 - B1317

pub fn b1318(&self) -> B1318_R[src]

Bit 6 - B1318

pub fn b1319(&self) -> B1319_R[src]

Bit 7 - B1319

pub fn b1320(&self) -> B1320_R[src]

Bit 8 - B1320

pub fn b1321(&self) -> B1321_R[src]

Bit 9 - B1321

pub fn b1322(&self) -> B1322_R[src]

Bit 10 - B1322

pub fn b1323(&self) -> B1323_R[src]

Bit 11 - B1323

pub fn b1324(&self) -> B1324_R[src]

Bit 12 - B1324

pub fn b1325(&self) -> B1325_R[src]

Bit 13 - B1325

pub fn b1326(&self) -> B1326_R[src]

Bit 14 - B1326

pub fn b1327(&self) -> B1327_R[src]

Bit 15 - B1327

pub fn b1328(&self) -> B1328_R[src]

Bit 16 - B1328

pub fn b1329(&self) -> B1329_R[src]

Bit 17 - B1329

pub fn b1330(&self) -> B1330_R[src]

Bit 18 - B1330

pub fn b1331(&self) -> B1331_R[src]

Bit 19 - B1331

pub fn b1332(&self) -> B1332_R[src]

Bit 20 - B1332

pub fn b1333(&self) -> B1333_R[src]

Bit 21 - B1333

pub fn b1334(&self) -> B1334_R[src]

Bit 22 - B1334

pub fn b1335(&self) -> B1335_R[src]

Bit 23 - B1335

pub fn b1336(&self) -> B1336_R[src]

Bit 24 - B1336

pub fn b1337(&self) -> B1337_R[src]

Bit 25 - B1337

pub fn b1338(&self) -> B1338_R[src]

Bit 26 - B1338

pub fn b1339(&self) -> B1339_R[src]

Bit 27 - B1339

pub fn b1340(&self) -> B1340_R[src]

Bit 28 - B1340

pub fn b1341(&self) -> B1341_R[src]

Bit 29 - B1341

pub fn b1342(&self) -> B1342_R[src]

Bit 30 - B1342

pub fn b1343(&self) -> B1343_R[src]

Bit 31 - B1343

impl R<u32, Reg<u32, _MPCBB2_VCTR42>>[src]

pub fn b1344(&self) -> B1344_R[src]

Bit 0 - B1344

pub fn b1345(&self) -> B1345_R[src]

Bit 1 - B1345

pub fn b1346(&self) -> B1346_R[src]

Bit 2 - B1346

pub fn b1347(&self) -> B1347_R[src]

Bit 3 - B1347

pub fn b1348(&self) -> B1348_R[src]

Bit 4 - B1348

pub fn b1349(&self) -> B1349_R[src]

Bit 5 - B1349

pub fn b1350(&self) -> B1350_R[src]

Bit 6 - B1350

pub fn b1351(&self) -> B1351_R[src]

Bit 7 - B1351

pub fn b1352(&self) -> B1352_R[src]

Bit 8 - B1352

pub fn b1353(&self) -> B1353_R[src]

Bit 9 - B1353

pub fn b1354(&self) -> B1354_R[src]

Bit 10 - B1354

pub fn b1355(&self) -> B1355_R[src]

Bit 11 - B1355

pub fn b1356(&self) -> B1356_R[src]

Bit 12 - B1356

pub fn b1357(&self) -> B1357_R[src]

Bit 13 - B1357

pub fn b1358(&self) -> B1358_R[src]

Bit 14 - B1358

pub fn b1359(&self) -> B1359_R[src]

Bit 15 - B1359

pub fn b1360(&self) -> B1360_R[src]

Bit 16 - B1360

pub fn b1361(&self) -> B1361_R[src]

Bit 17 - B1361

pub fn b1362(&self) -> B1362_R[src]

Bit 18 - B1362

pub fn b1363(&self) -> B1363_R[src]

Bit 19 - B1363

pub fn b1364(&self) -> B1364_R[src]

Bit 20 - B1364

pub fn b1365(&self) -> B1365_R[src]

Bit 21 - B1365

pub fn b1366(&self) -> B1366_R[src]

Bit 22 - B1366

pub fn b1367(&self) -> B1367_R[src]

Bit 23 - B1367

pub fn b1368(&self) -> B1368_R[src]

Bit 24 - B1368

pub fn b1369(&self) -> B1369_R[src]

Bit 25 - B1369

pub fn b1370(&self) -> B1370_R[src]

Bit 26 - B1370

pub fn b1371(&self) -> B1371_R[src]

Bit 27 - B1371

pub fn b1372(&self) -> B1372_R[src]

Bit 28 - B1372

pub fn b1373(&self) -> B1373_R[src]

Bit 29 - B1373

pub fn b1374(&self) -> B1374_R[src]

Bit 30 - B1374

pub fn b1375(&self) -> B1375_R[src]

Bit 31 - B1375

impl R<u32, Reg<u32, _MPCBB2_VCTR43>>[src]

pub fn b1376(&self) -> B1376_R[src]

Bit 0 - B1376

pub fn b1377(&self) -> B1377_R[src]

Bit 1 - B1377

pub fn b1378(&self) -> B1378_R[src]

Bit 2 - B1378

pub fn b1379(&self) -> B1379_R[src]

Bit 3 - B1379

pub fn b1380(&self) -> B1380_R[src]

Bit 4 - B1380

pub fn b1381(&self) -> B1381_R[src]

Bit 5 - B1381

pub fn b1382(&self) -> B1382_R[src]

Bit 6 - B1382

pub fn b1383(&self) -> B1383_R[src]

Bit 7 - B1383

pub fn b1384(&self) -> B1384_R[src]

Bit 8 - B1384

pub fn b1385(&self) -> B1385_R[src]

Bit 9 - B1385

pub fn b1386(&self) -> B1386_R[src]

Bit 10 - B1386

pub fn b1387(&self) -> B1387_R[src]

Bit 11 - B1387

pub fn b1388(&self) -> B1388_R[src]

Bit 12 - B1388

pub fn b1389(&self) -> B1389_R[src]

Bit 13 - B1389

pub fn b1390(&self) -> B1390_R[src]

Bit 14 - B1390

pub fn b1391(&self) -> B1391_R[src]

Bit 15 - B1391

pub fn b1392(&self) -> B1392_R[src]

Bit 16 - B1392

pub fn b1393(&self) -> B1393_R[src]

Bit 17 - B1393

pub fn b1394(&self) -> B1394_R[src]

Bit 18 - B1394

pub fn b1395(&self) -> B1395_R[src]

Bit 19 - B1395

pub fn b1396(&self) -> B1396_R[src]

Bit 20 - B1396

pub fn b1397(&self) -> B1397_R[src]

Bit 21 - B1397

pub fn b1398(&self) -> B1398_R[src]

Bit 22 - B1398

pub fn b1399(&self) -> B1399_R[src]

Bit 23 - B1399

pub fn b1400(&self) -> B1400_R[src]

Bit 24 - B1400

pub fn b1401(&self) -> B1401_R[src]

Bit 25 - B1401

pub fn b1402(&self) -> B1402_R[src]

Bit 26 - B1402

pub fn b1403(&self) -> B1403_R[src]

Bit 27 - B1403

pub fn b1404(&self) -> B1404_R[src]

Bit 28 - B1404

pub fn b1405(&self) -> B1405_R[src]

Bit 29 - B1405

pub fn b1406(&self) -> B1406_R[src]

Bit 30 - B1406

pub fn b1407(&self) -> B1407_R[src]

Bit 31 - B1407

impl R<u32, Reg<u32, _MPCBB2_VCTR44>>[src]

pub fn b1408(&self) -> B1408_R[src]

Bit 0 - B1408

pub fn b1409(&self) -> B1409_R[src]

Bit 1 - B1409

pub fn b1410(&self) -> B1410_R[src]

Bit 2 - B1410

pub fn b1411(&self) -> B1411_R[src]

Bit 3 - B1411

pub fn b1412(&self) -> B1412_R[src]

Bit 4 - B1412

pub fn b1413(&self) -> B1413_R[src]

Bit 5 - B1413

pub fn b1414(&self) -> B1414_R[src]

Bit 6 - B1414

pub fn b1415(&self) -> B1415_R[src]

Bit 7 - B1415

pub fn b1416(&self) -> B1416_R[src]

Bit 8 - B1416

pub fn b1417(&self) -> B1417_R[src]

Bit 9 - B1417

pub fn b1418(&self) -> B1418_R[src]

Bit 10 - B1418

pub fn b1419(&self) -> B1419_R[src]

Bit 11 - B1419

pub fn b1420(&self) -> B1420_R[src]

Bit 12 - B1420

pub fn b1421(&self) -> B1421_R[src]

Bit 13 - B1421

pub fn b1422(&self) -> B1422_R[src]

Bit 14 - B1422

pub fn b1423(&self) -> B1423_R[src]

Bit 15 - B1423

pub fn b1424(&self) -> B1424_R[src]

Bit 16 - B1424

pub fn b1425(&self) -> B1425_R[src]

Bit 17 - B1425

pub fn b1426(&self) -> B1426_R[src]

Bit 18 - B1426

pub fn b1427(&self) -> B1427_R[src]

Bit 19 - B1427

pub fn b1428(&self) -> B1428_R[src]

Bit 20 - B1428

pub fn b1429(&self) -> B1429_R[src]

Bit 21 - B1429

pub fn b1430(&self) -> B1430_R[src]

Bit 22 - B1430

pub fn b1431(&self) -> B1431_R[src]

Bit 23 - B1431

pub fn b1432(&self) -> B1432_R[src]

Bit 24 - B1432

pub fn b1433(&self) -> B1433_R[src]

Bit 25 - B1433

pub fn b1434(&self) -> B1434_R[src]

Bit 26 - B1434

pub fn b1435(&self) -> B1435_R[src]

Bit 27 - B1435

pub fn b1436(&self) -> B1436_R[src]

Bit 28 - B1436

pub fn b1437(&self) -> B1437_R[src]

Bit 29 - B1437

pub fn b1438(&self) -> B1438_R[src]

Bit 30 - B1438

pub fn b1439(&self) -> B1439_R[src]

Bit 31 - B1439

impl R<u32, Reg<u32, _MPCBB2_VCTR45>>[src]

pub fn b1440(&self) -> B1440_R[src]

Bit 0 - B1440

pub fn b1441(&self) -> B1441_R[src]

Bit 1 - B1441

pub fn b1442(&self) -> B1442_R[src]

Bit 2 - B1442

pub fn b1443(&self) -> B1443_R[src]

Bit 3 - B1443

pub fn b1444(&self) -> B1444_R[src]

Bit 4 - B1444

pub fn b1445(&self) -> B1445_R[src]

Bit 5 - B1445

pub fn b1446(&self) -> B1446_R[src]

Bit 6 - B1446

pub fn b1447(&self) -> B1447_R[src]

Bit 7 - B1447

pub fn b1448(&self) -> B1448_R[src]

Bit 8 - B1448

pub fn b1449(&self) -> B1449_R[src]

Bit 9 - B1449

pub fn b1450(&self) -> B1450_R[src]

Bit 10 - B1450

pub fn b1451(&self) -> B1451_R[src]

Bit 11 - B1451

pub fn b1452(&self) -> B1452_R[src]

Bit 12 - B1452

pub fn b1453(&self) -> B1453_R[src]

Bit 13 - B1453

pub fn b1454(&self) -> B1454_R[src]

Bit 14 - B1454

pub fn b1455(&self) -> B1455_R[src]

Bit 15 - B1455

pub fn b1456(&self) -> B1456_R[src]

Bit 16 - B1456

pub fn b1457(&self) -> B1457_R[src]

Bit 17 - B1457

pub fn b1458(&self) -> B1458_R[src]

Bit 18 - B1458

pub fn b1459(&self) -> B1459_R[src]

Bit 19 - B1459

pub fn b1460(&self) -> B1460_R[src]

Bit 20 - B1460

pub fn b1461(&self) -> B1461_R[src]

Bit 21 - B1461

pub fn b1462(&self) -> B1462_R[src]

Bit 22 - B1462

pub fn b1463(&self) -> B1463_R[src]

Bit 23 - B1463

pub fn b1464(&self) -> B1464_R[src]

Bit 24 - B1464

pub fn b1465(&self) -> B1465_R[src]

Bit 25 - B1465

pub fn b1466(&self) -> B1466_R[src]

Bit 26 - B1466

pub fn b1467(&self) -> B1467_R[src]

Bit 27 - B1467

pub fn b1468(&self) -> B1468_R[src]

Bit 28 - B1468

pub fn b1469(&self) -> B1469_R[src]

Bit 29 - B1469

pub fn b1470(&self) -> B1470_R[src]

Bit 30 - B1470

pub fn b1471(&self) -> B1471_R[src]

Bit 31 - B1471

impl R<u32, Reg<u32, _MPCBB2_VCTR46>>[src]

pub fn b1472(&self) -> B1472_R[src]

Bit 0 - B1472

pub fn b1473(&self) -> B1473_R[src]

Bit 1 - B1473

pub fn b1474(&self) -> B1474_R[src]

Bit 2 - B1474

pub fn b1475(&self) -> B1475_R[src]

Bit 3 - B1475

pub fn b1476(&self) -> B1476_R[src]

Bit 4 - B1476

pub fn b1477(&self) -> B1477_R[src]

Bit 5 - B1477

pub fn b1478(&self) -> B1478_R[src]

Bit 6 - B1478

pub fn b1479(&self) -> B1479_R[src]

Bit 7 - B1479

pub fn b1480(&self) -> B1480_R[src]

Bit 8 - B1480

pub fn b1481(&self) -> B1481_R[src]

Bit 9 - B1481

pub fn b1482(&self) -> B1482_R[src]

Bit 10 - B1482

pub fn b1483(&self) -> B1483_R[src]

Bit 11 - B1483

pub fn b1484(&self) -> B1484_R[src]

Bit 12 - B1484

pub fn b1485(&self) -> B1485_R[src]

Bit 13 - B1485

pub fn b1486(&self) -> B1486_R[src]

Bit 14 - B1486

pub fn b1487(&self) -> B1487_R[src]

Bit 15 - B1487

pub fn b1488(&self) -> B1488_R[src]

Bit 16 - B1488

pub fn b1489(&self) -> B1489_R[src]

Bit 17 - B1489

pub fn b1490(&self) -> B1490_R[src]

Bit 18 - B1490

pub fn b1491(&self) -> B1491_R[src]

Bit 19 - B1491

pub fn b1492(&self) -> B1492_R[src]

Bit 20 - B1492

pub fn b1493(&self) -> B1493_R[src]

Bit 21 - B1493

pub fn b1494(&self) -> B1494_R[src]

Bit 22 - B1494

pub fn b1495(&self) -> B1495_R[src]

Bit 23 - B1495

pub fn b1496(&self) -> B1496_R[src]

Bit 24 - B1496

pub fn b1497(&self) -> B1497_R[src]

Bit 25 - B1497

pub fn b1498(&self) -> B1498_R[src]

Bit 26 - B1498

pub fn b1499(&self) -> B1499_R[src]

Bit 27 - B1499

pub fn b1500(&self) -> B1500_R[src]

Bit 28 - B1500

pub fn b1501(&self) -> B1501_R[src]

Bit 29 - B1501

pub fn b1502(&self) -> B1502_R[src]

Bit 30 - B1502

pub fn b1503(&self) -> B1503_R[src]

Bit 31 - B1503

impl R<u32, Reg<u32, _MPCBB2_VCTR47>>[src]

pub fn b1504(&self) -> B1504_R[src]

Bit 0 - B1504

pub fn b1505(&self) -> B1505_R[src]

Bit 1 - B1505

pub fn b1506(&self) -> B1506_R[src]

Bit 2 - B1506

pub fn b1507(&self) -> B1507_R[src]

Bit 3 - B1507

pub fn b1508(&self) -> B1508_R[src]

Bit 4 - B1508

pub fn b1509(&self) -> B1509_R[src]

Bit 5 - B1509

pub fn b1510(&self) -> B1510_R[src]

Bit 6 - B1510

pub fn b1511(&self) -> B1511_R[src]

Bit 7 - B1511

pub fn b1512(&self) -> B1512_R[src]

Bit 8 - B1512

pub fn b1513(&self) -> B1513_R[src]

Bit 9 - B1513

pub fn b1514(&self) -> B1514_R[src]

Bit 10 - B1514

pub fn b1515(&self) -> B1515_R[src]

Bit 11 - B1515

pub fn b1516(&self) -> B1516_R[src]

Bit 12 - B1516

pub fn b1517(&self) -> B1517_R[src]

Bit 13 - B1517

pub fn b1518(&self) -> B1518_R[src]

Bit 14 - B1518

pub fn b1519(&self) -> B1519_R[src]

Bit 15 - B1519

pub fn b1520(&self) -> B1520_R[src]

Bit 16 - B1520

pub fn b1521(&self) -> B1521_R[src]

Bit 17 - B1521

pub fn b1522(&self) -> B1522_R[src]

Bit 18 - B1522

pub fn b1523(&self) -> B1523_R[src]

Bit 19 - B1523

pub fn b1524(&self) -> B1524_R[src]

Bit 20 - B1524

pub fn b1525(&self) -> B1525_R[src]

Bit 21 - B1525

pub fn b1526(&self) -> B1526_R[src]

Bit 22 - B1526

pub fn b1527(&self) -> B1527_R[src]

Bit 23 - B1527

pub fn b1528(&self) -> B1528_R[src]

Bit 24 - B1528

pub fn b1529(&self) -> B1529_R[src]

Bit 25 - B1529

pub fn b1530(&self) -> B1530_R[src]

Bit 26 - B1530

pub fn b1531(&self) -> B1531_R[src]

Bit 27 - B1531

pub fn b1532(&self) -> B1532_R[src]

Bit 28 - B1532

pub fn b1533(&self) -> B1533_R[src]

Bit 29 - B1533

pub fn b1534(&self) -> B1534_R[src]

Bit 30 - B1534

pub fn b1535(&self) -> B1535_R[src]

Bit 31 - B1535

impl R<u32, Reg<u32, _MPCBB2_VCTR48>>[src]

pub fn b1536(&self) -> B1536_R[src]

Bit 0 - B1536

pub fn b1537(&self) -> B1537_R[src]

Bit 1 - B1537

pub fn b1538(&self) -> B1538_R[src]

Bit 2 - B1538

pub fn b1539(&self) -> B1539_R[src]

Bit 3 - B1539

pub fn b1540(&self) -> B1540_R[src]

Bit 4 - B1540

pub fn b1541(&self) -> B1541_R[src]

Bit 5 - B1541

pub fn b1542(&self) -> B1542_R[src]

Bit 6 - B1542

pub fn b1543(&self) -> B1543_R[src]

Bit 7 - B1543

pub fn b1544(&self) -> B1544_R[src]

Bit 8 - B1544

pub fn b1545(&self) -> B1545_R[src]

Bit 9 - B1545

pub fn b1546(&self) -> B1546_R[src]

Bit 10 - B1546

pub fn b1547(&self) -> B1547_R[src]

Bit 11 - B1547

pub fn b1548(&self) -> B1548_R[src]

Bit 12 - B1548

pub fn b1549(&self) -> B1549_R[src]

Bit 13 - B1549

pub fn b1550(&self) -> B1550_R[src]

Bit 14 - B1550

pub fn b1551(&self) -> B1551_R[src]

Bit 15 - B1551

pub fn b1552(&self) -> B1552_R[src]

Bit 16 - B1552

pub fn b1553(&self) -> B1553_R[src]

Bit 17 - B1553

pub fn b1554(&self) -> B1554_R[src]

Bit 18 - B1554

pub fn b1555(&self) -> B1555_R[src]

Bit 19 - B1555

pub fn b1556(&self) -> B1556_R[src]

Bit 20 - B1556

pub fn b1557(&self) -> B1557_R[src]

Bit 21 - B1557

pub fn b1558(&self) -> B1558_R[src]

Bit 22 - B1558

pub fn b1559(&self) -> B1559_R[src]

Bit 23 - B1559

pub fn b1560(&self) -> B1560_R[src]

Bit 24 - B1560

pub fn b1561(&self) -> B1561_R[src]

Bit 25 - B1561

pub fn b1562(&self) -> B1562_R[src]

Bit 26 - B1562

pub fn b1563(&self) -> B1563_R[src]

Bit 27 - B1563

pub fn b1564(&self) -> B1564_R[src]

Bit 28 - B1564

pub fn b1565(&self) -> B1565_R[src]

Bit 29 - B1565

pub fn b1566(&self) -> B1566_R[src]

Bit 30 - B1566

pub fn b1567(&self) -> B1567_R[src]

Bit 31 - B1567

impl R<u32, Reg<u32, _MPCBB2_VCTR49>>[src]

pub fn b1568(&self) -> B1568_R[src]

Bit 0 - B1568

pub fn b1569(&self) -> B1569_R[src]

Bit 1 - B1569

pub fn b1570(&self) -> B1570_R[src]

Bit 2 - B1570

pub fn b1571(&self) -> B1571_R[src]

Bit 3 - B1571

pub fn b1572(&self) -> B1572_R[src]

Bit 4 - B1572

pub fn b1573(&self) -> B1573_R[src]

Bit 5 - B1573

pub fn b1574(&self) -> B1574_R[src]

Bit 6 - B1574

pub fn b1575(&self) -> B1575_R[src]

Bit 7 - B1575

pub fn b1576(&self) -> B1576_R[src]

Bit 8 - B1576

pub fn b1577(&self) -> B1577_R[src]

Bit 9 - B1577

pub fn b1578(&self) -> B1578_R[src]

Bit 10 - B1578

pub fn b1579(&self) -> B1579_R[src]

Bit 11 - B1579

pub fn b1580(&self) -> B1580_R[src]

Bit 12 - B1580

pub fn b1581(&self) -> B1581_R[src]

Bit 13 - B1581

pub fn b1582(&self) -> B1582_R[src]

Bit 14 - B1582

pub fn b1583(&self) -> B1583_R[src]

Bit 15 - B1583

pub fn b1584(&self) -> B1584_R[src]

Bit 16 - B1584

pub fn b1585(&self) -> B1585_R[src]

Bit 17 - B1585

pub fn b1586(&self) -> B1586_R[src]

Bit 18 - B1586

pub fn b1587(&self) -> B1587_R[src]

Bit 19 - B1587

pub fn b1588(&self) -> B1588_R[src]

Bit 20 - B1588

pub fn b1589(&self) -> B1589_R[src]

Bit 21 - B1589

pub fn b1590(&self) -> B1590_R[src]

Bit 22 - B1590

pub fn b1591(&self) -> B1591_R[src]

Bit 23 - B1591

pub fn b1592(&self) -> B1592_R[src]

Bit 24 - B1592

pub fn b1593(&self) -> B1593_R[src]

Bit 25 - B1593

pub fn b1594(&self) -> B1594_R[src]

Bit 26 - B1594

pub fn b1595(&self) -> B1595_R[src]

Bit 27 - B1595

pub fn b1596(&self) -> B1596_R[src]

Bit 28 - B1596

pub fn b1597(&self) -> B1597_R[src]

Bit 29 - B1597

pub fn b1598(&self) -> B1598_R[src]

Bit 30 - B1598

pub fn b1599(&self) -> B1599_R[src]

Bit 31 - B1599

impl R<u32, Reg<u32, _MPCBB2_VCTR50>>[src]

pub fn b1600(&self) -> B1600_R[src]

Bit 0 - B1600

pub fn b1601(&self) -> B1601_R[src]

Bit 1 - B1601

pub fn b1602(&self) -> B1602_R[src]

Bit 2 - B1602

pub fn b1603(&self) -> B1603_R[src]

Bit 3 - B1603

pub fn b1604(&self) -> B1604_R[src]

Bit 4 - B1604

pub fn b1605(&self) -> B1605_R[src]

Bit 5 - B1605

pub fn b1606(&self) -> B1606_R[src]

Bit 6 - B1606

pub fn b1607(&self) -> B1607_R[src]

Bit 7 - B1607

pub fn b1608(&self) -> B1608_R[src]

Bit 8 - B1608

pub fn b1609(&self) -> B1609_R[src]

Bit 9 - B1609

pub fn b1610(&self) -> B1610_R[src]

Bit 10 - B1610

pub fn b1611(&self) -> B1611_R[src]

Bit 11 - B1611

pub fn b1612(&self) -> B1612_R[src]

Bit 12 - B1612

pub fn b1613(&self) -> B1613_R[src]

Bit 13 - B1613

pub fn b1614(&self) -> B1614_R[src]

Bit 14 - B1614

pub fn b1615(&self) -> B1615_R[src]

Bit 15 - B1615

pub fn b1616(&self) -> B1616_R[src]

Bit 16 - B1616

pub fn b1617(&self) -> B1617_R[src]

Bit 17 - B1617

pub fn b1618(&self) -> B1618_R[src]

Bit 18 - B1618

pub fn b1619(&self) -> B1619_R[src]

Bit 19 - B1619

pub fn b1620(&self) -> B1620_R[src]

Bit 20 - B1620

pub fn b1621(&self) -> B1621_R[src]

Bit 21 - B1621

pub fn b1622(&self) -> B1622_R[src]

Bit 22 - B1622

pub fn b1623(&self) -> B1623_R[src]

Bit 23 - B1623

pub fn b1624(&self) -> B1624_R[src]

Bit 24 - B1624

pub fn b1625(&self) -> B1625_R[src]

Bit 25 - B1625

pub fn b1626(&self) -> B1626_R[src]

Bit 26 - B1626

pub fn b1627(&self) -> B1627_R[src]

Bit 27 - B1627

pub fn b1628(&self) -> B1628_R[src]

Bit 28 - B1628

pub fn b1629(&self) -> B1629_R[src]

Bit 29 - B1629

pub fn b1630(&self) -> B1630_R[src]

Bit 30 - B1630

pub fn b1631(&self) -> B1631_R[src]

Bit 31 - B1631

impl R<u32, Reg<u32, _MPCBB2_VCTR51>>[src]

pub fn b1632(&self) -> B1632_R[src]

Bit 0 - B1632

pub fn b1633(&self) -> B1633_R[src]

Bit 1 - B1633

pub fn b1634(&self) -> B1634_R[src]

Bit 2 - B1634

pub fn b1635(&self) -> B1635_R[src]

Bit 3 - B1635

pub fn b1636(&self) -> B1636_R[src]

Bit 4 - B1636

pub fn b1637(&self) -> B1637_R[src]

Bit 5 - B1637

pub fn b1638(&self) -> B1638_R[src]

Bit 6 - B1638

pub fn b1639(&self) -> B1639_R[src]

Bit 7 - B1639

pub fn b1640(&self) -> B1640_R[src]

Bit 8 - B1640

pub fn b1641(&self) -> B1641_R[src]

Bit 9 - B1641

pub fn b1642(&self) -> B1642_R[src]

Bit 10 - B1642

pub fn b1643(&self) -> B1643_R[src]

Bit 11 - B1643

pub fn b1644(&self) -> B1644_R[src]

Bit 12 - B1644

pub fn b1645(&self) -> B1645_R[src]

Bit 13 - B1645

pub fn b1646(&self) -> B1646_R[src]

Bit 14 - B1646

pub fn b1647(&self) -> B1647_R[src]

Bit 15 - B1647

pub fn b1648(&self) -> B1648_R[src]

Bit 16 - B1648

pub fn b1649(&self) -> B1649_R[src]

Bit 17 - B1649

pub fn b1650(&self) -> B1650_R[src]

Bit 18 - B1650

pub fn b1651(&self) -> B1651_R[src]

Bit 19 - B1651

pub fn b1652(&self) -> B1652_R[src]

Bit 20 - B1652

pub fn b1653(&self) -> B1653_R[src]

Bit 21 - B1653

pub fn b1654(&self) -> B1654_R[src]

Bit 22 - B1654

pub fn b1655(&self) -> B1655_R[src]

Bit 23 - B1655

pub fn b1656(&self) -> B1656_R[src]

Bit 24 - B1656

pub fn b1657(&self) -> B1657_R[src]

Bit 25 - B1657

pub fn b1658(&self) -> B1658_R[src]

Bit 26 - B1658

pub fn b1659(&self) -> B1659_R[src]

Bit 27 - B1659

pub fn b1660(&self) -> B1660_R[src]

Bit 28 - B1660

pub fn b1661(&self) -> B1661_R[src]

Bit 29 - B1661

pub fn b1662(&self) -> B1662_R[src]

Bit 30 - B1662

pub fn b1663(&self) -> B1663_R[src]

Bit 31 - B1663

impl R<u32, Reg<u32, _MPCBB2_VCTR52>>[src]

pub fn b1664(&self) -> B1664_R[src]

Bit 0 - B1664

pub fn b1665(&self) -> B1665_R[src]

Bit 1 - B1665

pub fn b1666(&self) -> B1666_R[src]

Bit 2 - B1666

pub fn b1667(&self) -> B1667_R[src]

Bit 3 - B1667

pub fn b1668(&self) -> B1668_R[src]

Bit 4 - B1668

pub fn b1669(&self) -> B1669_R[src]

Bit 5 - B1669

pub fn b1670(&self) -> B1670_R[src]

Bit 6 - B1670

pub fn b1671(&self) -> B1671_R[src]

Bit 7 - B1671

pub fn b1672(&self) -> B1672_R[src]

Bit 8 - B1672

pub fn b1673(&self) -> B1673_R[src]

Bit 9 - B1673

pub fn b1674(&self) -> B1674_R[src]

Bit 10 - B1674

pub fn b1675(&self) -> B1675_R[src]

Bit 11 - B1675

pub fn b1676(&self) -> B1676_R[src]

Bit 12 - B1676

pub fn b1677(&self) -> B1677_R[src]

Bit 13 - B1677

pub fn b1678(&self) -> B1678_R[src]

Bit 14 - B1678

pub fn b1679(&self) -> B1679_R[src]

Bit 15 - B1679

pub fn b1680(&self) -> B1680_R[src]

Bit 16 - B1680

pub fn b1681(&self) -> B1681_R[src]

Bit 17 - B1681

pub fn b1682(&self) -> B1682_R[src]

Bit 18 - B1682

pub fn b1683(&self) -> B1683_R[src]

Bit 19 - B1683

pub fn b1684(&self) -> B1684_R[src]

Bit 20 - B1684

pub fn b1685(&self) -> B1685_R[src]

Bit 21 - B1685

pub fn b1686(&self) -> B1686_R[src]

Bit 22 - B1686

pub fn b1687(&self) -> B1687_R[src]

Bit 23 - B1687

pub fn b1688(&self) -> B1688_R[src]

Bit 24 - B1688

pub fn b1689(&self) -> B1689_R[src]

Bit 25 - B1689

pub fn b1690(&self) -> B1690_R[src]

Bit 26 - B1690

pub fn b1691(&self) -> B1691_R[src]

Bit 27 - B1691

pub fn b1692(&self) -> B1692_R[src]

Bit 28 - B1692

pub fn b1693(&self) -> B1693_R[src]

Bit 29 - B1693

pub fn b1694(&self) -> B1694_R[src]

Bit 30 - B1694

pub fn b1695(&self) -> B1695_R[src]

Bit 31 - B1695

impl R<u32, Reg<u32, _MPCBB2_VCTR53>>[src]

pub fn b1696(&self) -> B1696_R[src]

Bit 0 - B1696

pub fn b1697(&self) -> B1697_R[src]

Bit 1 - B1697

pub fn b1698(&self) -> B1698_R[src]

Bit 2 - B1698

pub fn b1699(&self) -> B1699_R[src]

Bit 3 - B1699

pub fn b1700(&self) -> B1700_R[src]

Bit 4 - B1700

pub fn b1701(&self) -> B1701_R[src]

Bit 5 - B1701

pub fn b1702(&self) -> B1702_R[src]

Bit 6 - B1702

pub fn b1703(&self) -> B1703_R[src]

Bit 7 - B1703

pub fn b1704(&self) -> B1704_R[src]

Bit 8 - B1704

pub fn b1705(&self) -> B1705_R[src]

Bit 9 - B1705

pub fn b1706(&self) -> B1706_R[src]

Bit 10 - B1706

pub fn b1707(&self) -> B1707_R[src]

Bit 11 - B1707

pub fn b1708(&self) -> B1708_R[src]

Bit 12 - B1708

pub fn b1709(&self) -> B1709_R[src]

Bit 13 - B1709

pub fn b1710(&self) -> B1710_R[src]

Bit 14 - B1710

pub fn b1711(&self) -> B1711_R[src]

Bit 15 - B1711

pub fn b1712(&self) -> B1712_R[src]

Bit 16 - B1712

pub fn b1713(&self) -> B1713_R[src]

Bit 17 - B1713

pub fn b1714(&self) -> B1714_R[src]

Bit 18 - B1714

pub fn b1715(&self) -> B1715_R[src]

Bit 19 - B1715

pub fn b1716(&self) -> B1716_R[src]

Bit 20 - B1716

pub fn b1717(&self) -> B1717_R[src]

Bit 21 - B1717

pub fn b1718(&self) -> B1718_R[src]

Bit 22 - B1718

pub fn b1719(&self) -> B1719_R[src]

Bit 23 - B1719

pub fn b1720(&self) -> B1720_R[src]

Bit 24 - B1720

pub fn b1721(&self) -> B1721_R[src]

Bit 25 - B1721

pub fn b1722(&self) -> B1722_R[src]

Bit 26 - B1722

pub fn b1723(&self) -> B1723_R[src]

Bit 27 - B1723

pub fn b1724(&self) -> B1724_R[src]

Bit 28 - B1724

pub fn b1725(&self) -> B1725_R[src]

Bit 29 - B1725

pub fn b1726(&self) -> B1726_R[src]

Bit 30 - B1726

pub fn b1727(&self) -> B1727_R[src]

Bit 31 - B1727

impl R<u32, Reg<u32, _MPCBB2_VCTR54>>[src]

pub fn b1728(&self) -> B1728_R[src]

Bit 0 - B1728

pub fn b1729(&self) -> B1729_R[src]

Bit 1 - B1729

pub fn b1730(&self) -> B1730_R[src]

Bit 2 - B1730

pub fn b1731(&self) -> B1731_R[src]

Bit 3 - B1731

pub fn b1732(&self) -> B1732_R[src]

Bit 4 - B1732

pub fn b1733(&self) -> B1733_R[src]

Bit 5 - B1733

pub fn b1734(&self) -> B1734_R[src]

Bit 6 - B1734

pub fn b1735(&self) -> B1735_R[src]

Bit 7 - B1735

pub fn b1736(&self) -> B1736_R[src]

Bit 8 - B1736

pub fn b1737(&self) -> B1737_R[src]

Bit 9 - B1737

pub fn b1738(&self) -> B1738_R[src]

Bit 10 - B1738

pub fn b1739(&self) -> B1739_R[src]

Bit 11 - B1739

pub fn b1740(&self) -> B1740_R[src]

Bit 12 - B1740

pub fn b1741(&self) -> B1741_R[src]

Bit 13 - B1741

pub fn b1742(&self) -> B1742_R[src]

Bit 14 - B1742

pub fn b1743(&self) -> B1743_R[src]

Bit 15 - B1743

pub fn b1744(&self) -> B1744_R[src]

Bit 16 - B1744

pub fn b1745(&self) -> B1745_R[src]

Bit 17 - B1745

pub fn b1746(&self) -> B1746_R[src]

Bit 18 - B1746

pub fn b1747(&self) -> B1747_R[src]

Bit 19 - B1747

pub fn b1748(&self) -> B1748_R[src]

Bit 20 - B1748

pub fn b1749(&self) -> B1749_R[src]

Bit 21 - B1749

pub fn b1750(&self) -> B1750_R[src]

Bit 22 - B1750

pub fn b1751(&self) -> B1751_R[src]

Bit 23 - B1751

pub fn b1752(&self) -> B1752_R[src]

Bit 24 - B1752

pub fn b1753(&self) -> B1753_R[src]

Bit 25 - B1753

pub fn b1754(&self) -> B1754_R[src]

Bit 26 - B1754

pub fn b1755(&self) -> B1755_R[src]

Bit 27 - B1755

pub fn b1756(&self) -> B1756_R[src]

Bit 28 - B1756

pub fn b1757(&self) -> B1757_R[src]

Bit 29 - B1757

pub fn b1758(&self) -> B1758_R[src]

Bit 30 - B1758

pub fn b1759(&self) -> B1759_R[src]

Bit 31 - B1759

impl R<u32, Reg<u32, _MPCBB2_VCTR55>>[src]

pub fn b1760(&self) -> B1760_R[src]

Bit 0 - B1760

pub fn b1761(&self) -> B1761_R[src]

Bit 1 - B1761

pub fn b1762(&self) -> B1762_R[src]

Bit 2 - B1762

pub fn b1763(&self) -> B1763_R[src]

Bit 3 - B1763

pub fn b1764(&self) -> B1764_R[src]

Bit 4 - B1764

pub fn b1765(&self) -> B1765_R[src]

Bit 5 - B1765

pub fn b1766(&self) -> B1766_R[src]

Bit 6 - B1766

pub fn b1767(&self) -> B1767_R[src]

Bit 7 - B1767

pub fn b1768(&self) -> B1768_R[src]

Bit 8 - B1768

pub fn b1769(&self) -> B1769_R[src]

Bit 9 - B1769

pub fn b1770(&self) -> B1770_R[src]

Bit 10 - B1770

pub fn b1771(&self) -> B1771_R[src]

Bit 11 - B1771

pub fn b1772(&self) -> B1772_R[src]

Bit 12 - B1772

pub fn b1773(&self) -> B1773_R[src]

Bit 13 - B1773

pub fn b1774(&self) -> B1774_R[src]

Bit 14 - B1774

pub fn b1775(&self) -> B1775_R[src]

Bit 15 - B1775

pub fn b1776(&self) -> B1776_R[src]

Bit 16 - B1776

pub fn b1777(&self) -> B1777_R[src]

Bit 17 - B1777

pub fn b1778(&self) -> B1778_R[src]

Bit 18 - B1778

pub fn b1779(&self) -> B1779_R[src]

Bit 19 - B1779

pub fn b1780(&self) -> B1780_R[src]

Bit 20 - B1780

pub fn b1781(&self) -> B1781_R[src]

Bit 21 - B1781

pub fn b1782(&self) -> B1782_R[src]

Bit 22 - B1782

pub fn b1783(&self) -> B1783_R[src]

Bit 23 - B1783

pub fn b1784(&self) -> B1784_R[src]

Bit 24 - B1784

pub fn b1785(&self) -> B1785_R[src]

Bit 25 - B1785

pub fn b1786(&self) -> B1786_R[src]

Bit 26 - B1786

pub fn b1787(&self) -> B1787_R[src]

Bit 27 - B1787

pub fn b1788(&self) -> B1788_R[src]

Bit 28 - B1788

pub fn b1789(&self) -> B1789_R[src]

Bit 29 - B1789

pub fn b1790(&self) -> B1790_R[src]

Bit 30 - B1790

pub fn b1791(&self) -> B1791_R[src]

Bit 31 - B1791

impl R<u32, Reg<u32, _MPCBB2_VCTR56>>[src]

pub fn b1792(&self) -> B1792_R[src]

Bit 0 - B1792

pub fn b1793(&self) -> B1793_R[src]

Bit 1 - B1793

pub fn b1794(&self) -> B1794_R[src]

Bit 2 - B1794

pub fn b1795(&self) -> B1795_R[src]

Bit 3 - B1795

pub fn b1796(&self) -> B1796_R[src]

Bit 4 - B1796

pub fn b1797(&self) -> B1797_R[src]

Bit 5 - B1797

pub fn b1798(&self) -> B1798_R[src]

Bit 6 - B1798

pub fn b1799(&self) -> B1799_R[src]

Bit 7 - B1799

pub fn b1800(&self) -> B1800_R[src]

Bit 8 - B1800

pub fn b1801(&self) -> B1801_R[src]

Bit 9 - B1801

pub fn b1802(&self) -> B1802_R[src]

Bit 10 - B1802

pub fn b1803(&self) -> B1803_R[src]

Bit 11 - B1803

pub fn b1804(&self) -> B1804_R[src]

Bit 12 - B1804

pub fn b1805(&self) -> B1805_R[src]

Bit 13 - B1805

pub fn b1806(&self) -> B1806_R[src]

Bit 14 - B1806

pub fn b1807(&self) -> B1807_R[src]

Bit 15 - B1807

pub fn b1808(&self) -> B1808_R[src]

Bit 16 - B1808

pub fn b1809(&self) -> B1809_R[src]

Bit 17 - B1809

pub fn b1810(&self) -> B1810_R[src]

Bit 18 - B1810

pub fn b1811(&self) -> B1811_R[src]

Bit 19 - B1811

pub fn b1812(&self) -> B1812_R[src]

Bit 20 - B1812

pub fn b1813(&self) -> B1813_R[src]

Bit 21 - B1813

pub fn b1814(&self) -> B1814_R[src]

Bit 22 - B1814

pub fn b1815(&self) -> B1815_R[src]

Bit 23 - B1815

pub fn b1816(&self) -> B1816_R[src]

Bit 24 - B1816

pub fn b1817(&self) -> B1817_R[src]

Bit 25 - B1817

pub fn b1818(&self) -> B1818_R[src]

Bit 26 - B1818

pub fn b1819(&self) -> B1819_R[src]

Bit 27 - B1819

pub fn b1820(&self) -> B1820_R[src]

Bit 28 - B1820

pub fn b1821(&self) -> B1821_R[src]

Bit 29 - B1821

pub fn b1822(&self) -> B1822_R[src]

Bit 30 - B1822

pub fn b1823(&self) -> B1823_R[src]

Bit 31 - B1823

impl R<u32, Reg<u32, _MPCBB2_VCTR57>>[src]

pub fn b1824(&self) -> B1824_R[src]

Bit 0 - B1824

pub fn b1825(&self) -> B1825_R[src]

Bit 1 - B1825

pub fn b1826(&self) -> B1826_R[src]

Bit 2 - B1826

pub fn b1827(&self) -> B1827_R[src]

Bit 3 - B1827

pub fn b1828(&self) -> B1828_R[src]

Bit 4 - B1828

pub fn b1829(&self) -> B1829_R[src]

Bit 5 - B1829

pub fn b1830(&self) -> B1830_R[src]

Bit 6 - B1830

pub fn b1831(&self) -> B1831_R[src]

Bit 7 - B1831

pub fn b1832(&self) -> B1832_R[src]

Bit 8 - B1832

pub fn b1833(&self) -> B1833_R[src]

Bit 9 - B1833

pub fn b1834(&self) -> B1834_R[src]

Bit 10 - B1834

pub fn b1835(&self) -> B1835_R[src]

Bit 11 - B1835

pub fn b1836(&self) -> B1836_R[src]

Bit 12 - B1836

pub fn b1837(&self) -> B1837_R[src]

Bit 13 - B1837

pub fn b1838(&self) -> B1838_R[src]

Bit 14 - B1838

pub fn b1839(&self) -> B1839_R[src]

Bit 15 - B1839

pub fn b1840(&self) -> B1840_R[src]

Bit 16 - B1840

pub fn b1841(&self) -> B1841_R[src]

Bit 17 - B1841

pub fn b1842(&self) -> B1842_R[src]

Bit 18 - B1842

pub fn b1843(&self) -> B1843_R[src]

Bit 19 - B1843

pub fn b1844(&self) -> B1844_R[src]

Bit 20 - B1844

pub fn b1845(&self) -> B1845_R[src]

Bit 21 - B1845

pub fn b1846(&self) -> B1846_R[src]

Bit 22 - B1846

pub fn b1847(&self) -> B1847_R[src]

Bit 23 - B1847

pub fn b1848(&self) -> B1848_R[src]

Bit 24 - B1848

pub fn b1849(&self) -> B1849_R[src]

Bit 25 - B1849

pub fn b1850(&self) -> B1850_R[src]

Bit 26 - B1850

pub fn b1851(&self) -> B1851_R[src]

Bit 27 - B1851

pub fn b1852(&self) -> B1852_R[src]

Bit 28 - B1852

pub fn b1853(&self) -> B1853_R[src]

Bit 29 - B1853

pub fn b1854(&self) -> B1854_R[src]

Bit 30 - B1854

pub fn b1855(&self) -> B1855_R[src]

Bit 31 - B1855

impl R<u32, Reg<u32, _MPCBB2_VCTR58>>[src]

pub fn b1856(&self) -> B1856_R[src]

Bit 0 - B1856

pub fn b1857(&self) -> B1857_R[src]

Bit 1 - B1857

pub fn b1858(&self) -> B1858_R[src]

Bit 2 - B1858

pub fn b1859(&self) -> B1859_R[src]

Bit 3 - B1859

pub fn b1860(&self) -> B1860_R[src]

Bit 4 - B1860

pub fn b1861(&self) -> B1861_R[src]

Bit 5 - B1861

pub fn b1862(&self) -> B1862_R[src]

Bit 6 - B1862

pub fn b1863(&self) -> B1863_R[src]

Bit 7 - B1863

pub fn b1864(&self) -> B1864_R[src]

Bit 8 - B1864

pub fn b1865(&self) -> B1865_R[src]

Bit 9 - B1865

pub fn b1866(&self) -> B1866_R[src]

Bit 10 - B1866

pub fn b1867(&self) -> B1867_R[src]

Bit 11 - B1867

pub fn b1868(&self) -> B1868_R[src]

Bit 12 - B1868

pub fn b1869(&self) -> B1869_R[src]

Bit 13 - B1869

pub fn b1870(&self) -> B1870_R[src]

Bit 14 - B1870

pub fn b1871(&self) -> B1871_R[src]

Bit 15 - B1871

pub fn b1872(&self) -> B1872_R[src]

Bit 16 - B1872

pub fn b1873(&self) -> B1873_R[src]

Bit 17 - B1873

pub fn b1874(&self) -> B1874_R[src]

Bit 18 - B1874

pub fn b1875(&self) -> B1875_R[src]

Bit 19 - B1875

pub fn b1876(&self) -> B1876_R[src]

Bit 20 - B1876

pub fn b1877(&self) -> B1877_R[src]

Bit 21 - B1877

pub fn b1878(&self) -> B1878_R[src]

Bit 22 - B1878

pub fn b1879(&self) -> B1879_R[src]

Bit 23 - B1879

pub fn b1880(&self) -> B1880_R[src]

Bit 24 - B1880

pub fn b1881(&self) -> B1881_R[src]

Bit 25 - B1881

pub fn b1882(&self) -> B1882_R[src]

Bit 26 - B1882

pub fn b1883(&self) -> B1883_R[src]

Bit 27 - B1883

pub fn b1884(&self) -> B1884_R[src]

Bit 28 - B1884

pub fn b1885(&self) -> B1885_R[src]

Bit 29 - B1885

pub fn b1886(&self) -> B1886_R[src]

Bit 30 - B1886

pub fn b1887(&self) -> B1887_R[src]

Bit 31 - B1887

impl R<u32, Reg<u32, _MPCBB2_VCTR59>>[src]

pub fn b1888(&self) -> B1888_R[src]

Bit 0 - B1888

pub fn b1889(&self) -> B1889_R[src]

Bit 1 - B1889

pub fn b1890(&self) -> B1890_R[src]

Bit 2 - B1890

pub fn b1891(&self) -> B1891_R[src]

Bit 3 - B1891

pub fn b1892(&self) -> B1892_R[src]

Bit 4 - B1892

pub fn b1893(&self) -> B1893_R[src]

Bit 5 - B1893

pub fn b1894(&self) -> B1894_R[src]

Bit 6 - B1894

pub fn b1895(&self) -> B1895_R[src]

Bit 7 - B1895

pub fn b1896(&self) -> B1896_R[src]

Bit 8 - B1896

pub fn b1897(&self) -> B1897_R[src]

Bit 9 - B1897

pub fn b1898(&self) -> B1898_R[src]

Bit 10 - B1898

pub fn b1899(&self) -> B1899_R[src]

Bit 11 - B1899

pub fn b1900(&self) -> B1900_R[src]

Bit 12 - B1900

pub fn b1901(&self) -> B1901_R[src]

Bit 13 - B1901

pub fn b1902(&self) -> B1902_R[src]

Bit 14 - B1902

pub fn b1903(&self) -> B1903_R[src]

Bit 15 - B1903

pub fn b1904(&self) -> B1904_R[src]

Bit 16 - B1904

pub fn b1905(&self) -> B1905_R[src]

Bit 17 - B1905

pub fn b1906(&self) -> B1906_R[src]

Bit 18 - B1906

pub fn b1907(&self) -> B1907_R[src]

Bit 19 - B1907

pub fn b1908(&self) -> B1908_R[src]

Bit 20 - B1908

pub fn b1909(&self) -> B1909_R[src]

Bit 21 - B1909

pub fn b1910(&self) -> B1910_R[src]

Bit 22 - B1910

pub fn b1911(&self) -> B1911_R[src]

Bit 23 - B1911

pub fn b1912(&self) -> B1912_R[src]

Bit 24 - B1912

pub fn b1913(&self) -> B1913_R[src]

Bit 25 - B1913

pub fn b1914(&self) -> B1914_R[src]

Bit 26 - B1914

pub fn b1915(&self) -> B1915_R[src]

Bit 27 - B1915

pub fn b1916(&self) -> B1916_R[src]

Bit 28 - B1916

pub fn b1917(&self) -> B1917_R[src]

Bit 29 - B1917

pub fn b1918(&self) -> B1918_R[src]

Bit 30 - B1918

pub fn b1919(&self) -> B1919_R[src]

Bit 31 - B1919

impl R<u32, Reg<u32, _MPCBB2_VCTR60>>[src]

pub fn b1920(&self) -> B1920_R[src]

Bit 0 - B1920

pub fn b1921(&self) -> B1921_R[src]

Bit 1 - B1921

pub fn b1922(&self) -> B1922_R[src]

Bit 2 - B1922

pub fn b1923(&self) -> B1923_R[src]

Bit 3 - B1923

pub fn b1924(&self) -> B1924_R[src]

Bit 4 - B1924

pub fn b1925(&self) -> B1925_R[src]

Bit 5 - B1925

pub fn b1926(&self) -> B1926_R[src]

Bit 6 - B1926

pub fn b1927(&self) -> B1927_R[src]

Bit 7 - B1927

pub fn b1928(&self) -> B1928_R[src]

Bit 8 - B1928

pub fn b1929(&self) -> B1929_R[src]

Bit 9 - B1929

pub fn b1930(&self) -> B1930_R[src]

Bit 10 - B1930

pub fn b1931(&self) -> B1931_R[src]

Bit 11 - B1931

pub fn b1932(&self) -> B1932_R[src]

Bit 12 - B1932

pub fn b1933(&self) -> B1933_R[src]

Bit 13 - B1933

pub fn b1934(&self) -> B1934_R[src]

Bit 14 - B1934

pub fn b1935(&self) -> B1935_R[src]

Bit 15 - B1935

pub fn b1936(&self) -> B1936_R[src]

Bit 16 - B1936

pub fn b1937(&self) -> B1937_R[src]

Bit 17 - B1937

pub fn b1938(&self) -> B1938_R[src]

Bit 18 - B1938

pub fn b1939(&self) -> B1939_R[src]

Bit 19 - B1939

pub fn b1940(&self) -> B1940_R[src]

Bit 20 - B1940

pub fn b1941(&self) -> B1941_R[src]

Bit 21 - B1941

pub fn b1942(&self) -> B1942_R[src]

Bit 22 - B1942

pub fn b1943(&self) -> B1943_R[src]

Bit 23 - B1943

pub fn b1944(&self) -> B1944_R[src]

Bit 24 - B1944

pub fn b1945(&self) -> B1945_R[src]

Bit 25 - B1945

pub fn b1946(&self) -> B1946_R[src]

Bit 26 - B1946

pub fn b1947(&self) -> B1947_R[src]

Bit 27 - B1947

pub fn b1948(&self) -> B1948_R[src]

Bit 28 - B1948

pub fn b1949(&self) -> B1949_R[src]

Bit 29 - B1949

pub fn b1950(&self) -> B1950_R[src]

Bit 30 - B1950

pub fn b1951(&self) -> B1951_R[src]

Bit 31 - B1951

impl R<u32, Reg<u32, _MPCBB2_VCTR61>>[src]

pub fn b1952(&self) -> B1952_R[src]

Bit 0 - B1952

pub fn b1953(&self) -> B1953_R[src]

Bit 1 - B1953

pub fn b1954(&self) -> B1954_R[src]

Bit 2 - B1954

pub fn b1955(&self) -> B1955_R[src]

Bit 3 - B1955

pub fn b1956(&self) -> B1956_R[src]

Bit 4 - B1956

pub fn b1957(&self) -> B1957_R[src]

Bit 5 - B1957

pub fn b1958(&self) -> B1958_R[src]

Bit 6 - B1958

pub fn b1959(&self) -> B1959_R[src]

Bit 7 - B1959

pub fn b1960(&self) -> B1960_R[src]

Bit 8 - B1960

pub fn b1961(&self) -> B1961_R[src]

Bit 9 - B1961

pub fn b1962(&self) -> B1962_R[src]

Bit 10 - B1962

pub fn b1963(&self) -> B1963_R[src]

Bit 11 - B1963

pub fn b1964(&self) -> B1964_R[src]

Bit 12 - B1964

pub fn b1965(&self) -> B1965_R[src]

Bit 13 - B1965

pub fn b1966(&self) -> B1966_R[src]

Bit 14 - B1966

pub fn b1967(&self) -> B1967_R[src]

Bit 15 - B1967

pub fn b1968(&self) -> B1968_R[src]

Bit 16 - B1968

pub fn b1969(&self) -> B1969_R[src]

Bit 17 - B1969

pub fn b1970(&self) -> B1970_R[src]

Bit 18 - B1970

pub fn b1971(&self) -> B1971_R[src]

Bit 19 - B1971

pub fn b1972(&self) -> B1972_R[src]

Bit 20 - B1972

pub fn b1973(&self) -> B1973_R[src]

Bit 21 - B1973

pub fn b1974(&self) -> B1974_R[src]

Bit 22 - B1974

pub fn b1975(&self) -> B1975_R[src]

Bit 23 - B1975

pub fn b1976(&self) -> B1976_R[src]

Bit 24 - B1976

pub fn b1977(&self) -> B1977_R[src]

Bit 25 - B1977

pub fn b1978(&self) -> B1978_R[src]

Bit 26 - B1978

pub fn b1979(&self) -> B1979_R[src]

Bit 27 - B1979

pub fn b1980(&self) -> B1980_R[src]

Bit 28 - B1980

pub fn b1981(&self) -> B1981_R[src]

Bit 29 - B1981

pub fn b1982(&self) -> B1982_R[src]

Bit 30 - B1982

pub fn b1983(&self) -> B1983_R[src]

Bit 31 - B1983

impl R<u32, Reg<u32, _MPCBB2_VCTR62>>[src]

pub fn b1984(&self) -> B1984_R[src]

Bit 0 - B1984

pub fn b1985(&self) -> B1985_R[src]

Bit 1 - B1985

pub fn b1986(&self) -> B1986_R[src]

Bit 2 - B1986

pub fn b1987(&self) -> B1987_R[src]

Bit 3 - B1987

pub fn b1988(&self) -> B1988_R[src]

Bit 4 - B1988

pub fn b1989(&self) -> B1989_R[src]

Bit 5 - B1989

pub fn b1990(&self) -> B1990_R[src]

Bit 6 - B1990

pub fn b1991(&self) -> B1991_R[src]

Bit 7 - B1991

pub fn b1992(&self) -> B1992_R[src]

Bit 8 - B1992

pub fn b1993(&self) -> B1993_R[src]

Bit 9 - B1993

pub fn b1994(&self) -> B1994_R[src]

Bit 10 - B1994

pub fn b1995(&self) -> B1995_R[src]

Bit 11 - B1995

pub fn b1996(&self) -> B1996_R[src]

Bit 12 - B1996

pub fn b1997(&self) -> B1997_R[src]

Bit 13 - B1997

pub fn b1998(&self) -> B1998_R[src]

Bit 14 - B1998

pub fn b1999(&self) -> B1999_R[src]

Bit 15 - B1999

pub fn b2000(&self) -> B2000_R[src]

Bit 16 - B2000

pub fn b2001(&self) -> B2001_R[src]

Bit 17 - B2001

pub fn b2002(&self) -> B2002_R[src]

Bit 18 - B2002

pub fn b2003(&self) -> B2003_R[src]

Bit 19 - B2003

pub fn b2004(&self) -> B2004_R[src]

Bit 20 - B2004

pub fn b2005(&self) -> B2005_R[src]

Bit 21 - B2005

pub fn b2006(&self) -> B2006_R[src]

Bit 22 - B2006

pub fn b2007(&self) -> B2007_R[src]

Bit 23 - B2007

pub fn b2008(&self) -> B2008_R[src]

Bit 24 - B2008

pub fn b2009(&self) -> B2009_R[src]

Bit 25 - B2009

pub fn b2010(&self) -> B2010_R[src]

Bit 26 - B2010

pub fn b2011(&self) -> B2011_R[src]

Bit 27 - B2011

pub fn b2012(&self) -> B2012_R[src]

Bit 28 - B2012

pub fn b2013(&self) -> B2013_R[src]

Bit 29 - B2013

pub fn b2014(&self) -> B2014_R[src]

Bit 30 - B2014

pub fn b2015(&self) -> B2015_R[src]

Bit 31 - B2015

impl R<u32, Reg<u32, _MPCBB2_VCTR63>>[src]

pub fn b2016(&self) -> B2016_R[src]

Bit 0 - B2016

pub fn b2017(&self) -> B2017_R[src]

Bit 1 - B2017

pub fn b2018(&self) -> B2018_R[src]

Bit 2 - B2018

pub fn b2019(&self) -> B2019_R[src]

Bit 3 - B2019

pub fn b2020(&self) -> B2020_R[src]

Bit 4 - B2020

pub fn b2021(&self) -> B2021_R[src]

Bit 5 - B2021

pub fn b2022(&self) -> B2022_R[src]

Bit 6 - B2022

pub fn b2023(&self) -> B2023_R[src]

Bit 7 - B2023

pub fn b2024(&self) -> B2024_R[src]

Bit 8 - B2024

pub fn b2025(&self) -> B2025_R[src]

Bit 9 - B2025

pub fn b2026(&self) -> B2026_R[src]

Bit 10 - B2026

pub fn b2027(&self) -> B2027_R[src]

Bit 11 - B2027

pub fn b2028(&self) -> B2028_R[src]

Bit 12 - B2028

pub fn b2029(&self) -> B2029_R[src]

Bit 13 - B2029

pub fn b2030(&self) -> B2030_R[src]

Bit 14 - B2030

pub fn b2031(&self) -> B2031_R[src]

Bit 15 - B2031

pub fn b2032(&self) -> B2032_R[src]

Bit 16 - B2032

pub fn b2033(&self) -> B2033_R[src]

Bit 17 - B2033

pub fn b2034(&self) -> B2034_R[src]

Bit 18 - B2034

pub fn b2035(&self) -> B2035_R[src]

Bit 19 - B2035

pub fn b2036(&self) -> B2036_R[src]

Bit 20 - B2036

pub fn b2037(&self) -> B2037_R[src]

Bit 21 - B2037

pub fn b2038(&self) -> B2038_R[src]

Bit 22 - B2038

pub fn b2039(&self) -> B2039_R[src]

Bit 23 - B2039

pub fn b2040(&self) -> B2040_R[src]

Bit 24 - B2040

pub fn b2041(&self) -> B2041_R[src]

Bit 25 - B2041

pub fn b2042(&self) -> B2042_R[src]

Bit 26 - B2042

pub fn b2043(&self) -> B2043_R[src]

Bit 27 - B2043

pub fn b2044(&self) -> B2044_R[src]

Bit 28 - B2044

pub fn b2045(&self) -> B2045_R[src]

Bit 29 - B2045

pub fn b2046(&self) -> B2046_R[src]

Bit 30 - B2046

pub fn b2047(&self) -> B2047_R[src]

Bit 31 - B2047

impl R<u32, Reg<u32, _CR1>>[src]

pub fn bidimode(&self) -> BIDIMODE_R[src]

Bit 15 - Bidirectional data mode enable

pub fn bidioe(&self) -> BIDIOE_R[src]

Bit 14 - Output enable in bidirectional mode

pub fn crcen(&self) -> CRCEN_R[src]

Bit 13 - Hardware CRC calculation enable

pub fn crcnext(&self) -> CRCNEXT_R[src]

Bit 12 - CRC transfer next

pub fn dff(&self) -> DFF_R[src]

Bit 11 - Data frame format

pub fn rxonly(&self) -> RXONLY_R[src]

Bit 10 - Receive only

pub fn ssm(&self) -> SSM_R[src]

Bit 9 - Software slave management

pub fn ssi(&self) -> SSI_R[src]

Bit 8 - Internal slave select

pub fn lsbfirst(&self) -> LSBFIRST_R[src]

Bit 7 - Frame format

pub fn spe(&self) -> SPE_R[src]

Bit 6 - SPI enable

pub fn br(&self) -> BR_R[src]

Bits 3:5 - Baud rate control

pub fn mstr(&self) -> MSTR_R[src]

Bit 2 - Master selection

pub fn cpol(&self) -> CPOL_R[src]

Bit 1 - Clock polarity

pub fn cpha(&self) -> CPHA_R[src]

Bit 0 - Clock phase

impl R<u32, Reg<u32, _CR2>>[src]

pub fn rxdmaen(&self) -> RXDMAEN_R[src]

Bit 0 - Rx buffer DMA enable

pub fn txdmaen(&self) -> TXDMAEN_R[src]

Bit 1 - Tx buffer DMA enable

pub fn ssoe(&self) -> SSOE_R[src]

Bit 2 - SS output enable

pub fn nssp(&self) -> NSSP_R[src]

Bit 3 - NSS pulse management

pub fn frf(&self) -> FRF_R[src]

Bit 4 - Frame format

pub fn errie(&self) -> ERRIE_R[src]

Bit 5 - Error interrupt enable

pub fn rxneie(&self) -> RXNEIE_R[src]

Bit 6 - RX buffer not empty interrupt enable

pub fn txeie(&self) -> TXEIE_R[src]

Bit 7 - Tx buffer empty interrupt enable

pub fn ds(&self) -> DS_R[src]

Bits 8:11 - Data size

pub fn frxth(&self) -> FRXTH_R[src]

Bit 12 - FIFO reception threshold

pub fn ldma_rx(&self) -> LDMA_RX_R[src]

Bit 13 - Last DMA transfer for reception

pub fn ldma_tx(&self) -> LDMA_TX_R[src]

Bit 14 - Last DMA transfer for transmission

impl R<u32, Reg<u32, _SR>>[src]

pub fn rxne(&self) -> RXNE_R[src]

Bit 0 - Receive buffer not empty

pub fn txe(&self) -> TXE_R[src]

Bit 1 - Transmit buffer empty

pub fn crcerr(&self) -> CRCERR_R[src]

Bit 4 - CRC error flag

pub fn modf(&self) -> MODF_R[src]

Bit 5 - Mode fault

pub fn ovr(&self) -> OVR_R[src]

Bit 6 - Overrun flag

pub fn bsy(&self) -> BSY_R[src]

Bit 7 - Busy flag

pub fn tifrfe(&self) -> TIFRFE_R[src]

Bit 8 - TI frame format error

pub fn frlvl(&self) -> FRLVL_R[src]

Bits 9:10 - FIFO reception level

pub fn ftlvl(&self) -> FTLVL_R[src]

Bits 11:12 - FIFO transmission level

impl R<u32, Reg<u32, _DR>>[src]

pub fn dr(&self) -> DR_R[src]

Bits 0:15 - Data register

impl R<u32, Reg<u32, _CRCPR>>[src]

pub fn crcpoly(&self) -> CRCPOLY_R[src]

Bits 0:15 - CRC polynomial register

impl R<u32, Reg<u32, _RXCRCR>>[src]

pub fn rx_crc(&self) -> RXCRC_R[src]

Bits 0:15 - Rx CRC register

impl R<u32, Reg<u32, _TXCRCR>>[src]

pub fn tx_crc(&self) -> TXCRC_R[src]

Bits 0:15 - Tx CRC register

impl R<u32, Reg<u32, _CR1>>[src]

pub fn ckd(&self) -> CKD_R[src]

Bits 8:9 - Clock division

pub fn arpe(&self) -> ARPE_R[src]

Bit 7 - Auto-reload preload enable

pub fn cms(&self) -> CMS_R[src]

Bits 5:6 - Center-aligned mode selection

pub fn dir(&self) -> DIR_R[src]

Bit 4 - Direction

pub fn opm(&self) -> OPM_R[src]

Bit 3 - One-pulse mode

pub fn urs(&self) -> URS_R[src]

Bit 2 - Update request source

pub fn udis(&self) -> UDIS_R[src]

Bit 1 - Update disable

pub fn cen(&self) -> CEN_R[src]

Bit 0 - Counter enable

pub fn uifremap(&self) -> UIFREMAP_R[src]

Bit 11 - UIF status bit remapping

impl R<u32, Reg<u32, _CR2>>[src]

pub fn ois4(&self) -> OIS4_R[src]

Bit 14 - Output Idle state 4

pub fn ois3n(&self) -> OIS3N_R[src]

Bit 13 - Output Idle state 3

pub fn ois3(&self) -> OIS3_R[src]

Bit 12 - Output Idle state 3

pub fn ois2n(&self) -> OIS2N_R[src]

Bit 11 - Output Idle state 2

pub fn ois2(&self) -> OIS2_R[src]

Bit 10 - Output Idle state 2

pub fn ois1n(&self) -> OIS1N_R[src]

Bit 9 - Output Idle state 1

pub fn ois1(&self) -> OIS1_R[src]

Bit 8 - Output Idle state 1

pub fn ti1s(&self) -> TI1S_R[src]

Bit 7 - TI1 selection

pub fn mms(&self) -> MMS_R[src]

Bits 4:6 - Master mode selection

pub fn ccds(&self) -> CCDS_R[src]

Bit 3 - Capture/compare DMA selection

pub fn ccus(&self) -> CCUS_R[src]

Bit 2 - Capture/compare control update selection

pub fn ccpc(&self) -> CCPC_R[src]

Bit 0 - Capture/compare preloaded control

pub fn ois5(&self) -> OIS5_R[src]

Bit 15 - Output Idle state 5 (OC5 output)

pub fn ois6(&self) -> OIS6_R[src]

Bit 16 - Output Idle state 6

pub fn mms2(&self) -> MMS2_R[src]

Bits 20:23 - Master mode selection 2

impl R<u32, Reg<u32, _SMCR>>[src]

pub fn etp(&self) -> ETP_R[src]

Bit 15 - External trigger polarity

pub fn ece(&self) -> ECE_R[src]

Bit 14 - External clock enable

pub fn etps(&self) -> ETPS_R[src]

Bits 12:13 - External trigger prescaler

pub fn etf(&self) -> ETF_R[src]

Bits 8:11 - External trigger filter

pub fn msm(&self) -> MSM_R[src]

Bit 7 - Master/Slave mode

pub fn ts(&self) -> TS_R[src]

Bits 4:6 - Trigger selection

pub fn sms(&self) -> SMS_R[src]

Bits 0:2 - Slave mode selection

pub fn sms_bit3(&self) -> SMS_BIT3_R[src]

Bit 16 - Slave mode selection - bit 3

impl R<u32, Reg<u32, _DIER>>[src]

pub fn tde(&self) -> TDE_R[src]

Bit 14 - Trigger DMA request enable

pub fn comde(&self) -> COMDE_R[src]

Bit 13 - COM DMA request enable

pub fn cc4de(&self) -> CC4DE_R[src]

Bit 12 - Capture/Compare 4 DMA request enable

pub fn cc3de(&self) -> CC3DE_R[src]

Bit 11 - Capture/Compare 3 DMA request enable

pub fn cc2de(&self) -> CC2DE_R[src]

Bit 10 - Capture/Compare 2 DMA request enable

pub fn cc1de(&self) -> CC1DE_R[src]

Bit 9 - Capture/Compare 1 DMA request enable

pub fn ude(&self) -> UDE_R[src]

Bit 8 - Update DMA request enable

pub fn tie(&self) -> TIE_R[src]

Bit 6 - Trigger interrupt enable

pub fn cc4ie(&self) -> CC4IE_R[src]

Bit 4 - Capture/Compare 4 interrupt enable

pub fn cc3ie(&self) -> CC3IE_R[src]

Bit 3 - Capture/Compare 3 interrupt enable

pub fn cc2ie(&self) -> CC2IE_R[src]

Bit 2 - Capture/Compare 2 interrupt enable

pub fn cc1ie(&self) -> CC1IE_R[src]

Bit 1 - Capture/Compare 1 interrupt enable

pub fn uie(&self) -> UIE_R[src]

Bit 0 - Update interrupt enable

pub fn bie(&self) -> BIE_R[src]

Bit 7 - Break interrupt enable

pub fn comie(&self) -> COMIE_R[src]

Bit 5 - COM interrupt enable

impl R<u32, Reg<u32, _SR>>[src]

pub fn cc4of(&self) -> CC4OF_R[src]

Bit 12 - Capture/Compare 4 overcapture flag

pub fn cc3of(&self) -> CC3OF_R[src]

Bit 11 - Capture/Compare 3 overcapture flag

pub fn cc2of(&self) -> CC2OF_R[src]

Bit 10 - Capture/compare 2 overcapture flag

pub fn cc1of(&self) -> CC1OF_R[src]

Bit 9 - Capture/Compare 1 overcapture flag

pub fn bif(&self) -> BIF_R[src]

Bit 7 - Break interrupt flag

pub fn tif(&self) -> TIF_R[src]

Bit 6 - Trigger interrupt flag

pub fn comif(&self) -> COMIF_R[src]

Bit 5 - COM interrupt flag

pub fn cc4if(&self) -> CC4IF_R[src]

Bit 4 - Capture/Compare 4 interrupt flag

pub fn cc3if(&self) -> CC3IF_R[src]

Bit 3 - Capture/Compare 3 interrupt flag

pub fn cc2if(&self) -> CC2IF_R[src]

Bit 2 - Capture/Compare 2 interrupt flag

pub fn cc1if(&self) -> CC1IF_R[src]

Bit 1 - Capture/compare 1 interrupt flag

pub fn uif(&self) -> UIF_R[src]

Bit 0 - Update interrupt flag

pub fn sbif(&self) -> SBIF_R[src]

Bit 13 - System Break interrupt flag

pub fn cc5if(&self) -> CC5IF_R[src]

Bit 16 - Compare 5 interrupt flag

pub fn cc6if(&self) -> CC6IF_R[src]

Bit 17 - Compare 6 interrupt flag

impl R<u32, Reg<u32, _CCMR1_OUTPUT>>[src]

pub fn oc2ce(&self) -> OC2CE_R[src]

Bit 15 - Output Compare 2 clear enable

pub fn oc2m(&self) -> OC2M_R[src]

Bits 12:14 - Output Compare 2 mode

pub fn oc2pe(&self) -> OC2PE_R[src]

Bit 11 - Output Compare 2 preload enable

pub fn oc2fe(&self) -> OC2FE_R[src]

Bit 10 - Output Compare 2 fast enable

pub fn cc2s(&self) -> CC2S_R[src]

Bits 8:9 - Capture/Compare 2 selection

pub fn oc1ce(&self) -> OC1CE_R[src]

Bit 7 - Output Compare 1 clear enable

pub fn oc1m(&self) -> OC1M_R[src]

Bits 4:6 - Output Compare 1 mode

pub fn oc1pe(&self) -> OC1PE_R[src]

Bit 3 - Output Compare 1 preload enable

pub fn oc1fe(&self) -> OC1FE_R[src]

Bit 2 - Output Compare 1 fast enable

pub fn cc1s(&self) -> CC1S_R[src]

Bits 0:1 - Capture/Compare 1 selection

pub fn oc1m_bit3(&self) -> OC1M_BIT3_R[src]

Bit 16 - Output Compare 1 mode - bit 3

pub fn oc2m_bit3(&self) -> OC2M_BIT3_R[src]

Bit 24 - Output Compare 2 mode - bit 3

impl R<u32, Reg<u32, _CCMR1_INPUT>>[src]

pub fn ic2f(&self) -> IC2F_R[src]

Bits 12:15 - Input capture 2 filter

pub fn ic2pcs(&self) -> IC2PCS_R[src]

Bits 10:11 - Input capture 2 prescaler

pub fn cc2s(&self) -> CC2S_R[src]

Bits 8:9 - Capture/Compare 2 selection

pub fn ic1f(&self) -> IC1F_R[src]

Bits 4:7 - Input capture 1 filter

pub fn icpcs(&self) -> ICPCS_R[src]

Bits 2:3 - Input capture 1 prescaler

pub fn cc1s(&self) -> CC1S_R[src]

Bits 0:1 - Capture/Compare 1 selection

impl R<u32, Reg<u32, _CCMR2_OUTPUT>>[src]

pub fn oc4ce(&self) -> OC4CE_R[src]

Bit 15 - Output compare 4 clear enable

pub fn oc4m(&self) -> OC4M_R[src]

Bits 12:14 - Output compare 4 mode

pub fn oc4pe(&self) -> OC4PE_R[src]

Bit 11 - Output compare 4 preload enable

pub fn oc4fe(&self) -> OC4FE_R[src]

Bit 10 - Output compare 4 fast enable

pub fn cc4s(&self) -> CC4S_R[src]

Bits 8:9 - Capture/Compare 4 selection

pub fn oc3ce(&self) -> OC3CE_R[src]

Bit 7 - Output compare 3 clear enable

pub fn oc3m(&self) -> OC3M_R[src]

Bits 4:6 - Output compare 3 mode

pub fn oc3pe(&self) -> OC3PE_R[src]

Bit 3 - Output compare 3 preload enable

pub fn oc3fe(&self) -> OC3FE_R[src]

Bit 2 - Output compare 3 fast enable

pub fn cc3s(&self) -> CC3S_R[src]

Bits 0:1 - Capture/Compare 3 selection

pub fn oc3m_bit3(&self) -> OC3M_BIT3_R[src]

Bit 16 - Output Compare 3 mode - bit 3

pub fn oc4m_bit3(&self) -> OC4M_BIT3_R[src]

Bit 24 - Output Compare 4 mode - bit 3

impl R<u32, Reg<u32, _CCMR2_INPUT>>[src]

pub fn ic4f(&self) -> IC4F_R[src]

Bits 12:15 - Input capture 4 filter

pub fn ic4psc(&self) -> IC4PSC_R[src]

Bits 10:11 - Input capture 4 prescaler

pub fn cc4s(&self) -> CC4S_R[src]

Bits 8:9 - Capture/Compare 4 selection

pub fn ic3f(&self) -> IC3F_R[src]

Bits 4:7 - Input capture 3 filter

pub fn ic3psc(&self) -> IC3PSC_R[src]

Bits 2:3 - Input capture 3 prescaler

pub fn cc3s(&self) -> CC3S_R[src]

Bits 0:1 - Capture/compare 3 selection

impl R<u32, Reg<u32, _CCER>>[src]

pub fn cc4p(&self) -> CC4P_R[src]

Bit 13 - Capture/Compare 3 output Polarity

pub fn cc4e(&self) -> CC4E_R[src]

Bit 12 - Capture/Compare 4 output enable

pub fn cc3np(&self) -> CC3NP_R[src]

Bit 11 - Capture/Compare 3 output Polarity

pub fn cc3ne(&self) -> CC3NE_R[src]

Bit 10 - Capture/Compare 3 complementary output enable

pub fn cc3p(&self) -> CC3P_R[src]

Bit 9 - Capture/Compare 3 output Polarity

pub fn cc3e(&self) -> CC3E_R[src]

Bit 8 - Capture/Compare 3 output enable

pub fn cc2np(&self) -> CC2NP_R[src]

Bit 7 - Capture/Compare 2 output Polarity

pub fn cc2ne(&self) -> CC2NE_R[src]

Bit 6 - Capture/Compare 2 complementary output enable

pub fn cc2p(&self) -> CC2P_R[src]

Bit 5 - Capture/Compare 2 output Polarity

pub fn cc2e(&self) -> CC2E_R[src]

Bit 4 - Capture/Compare 2 output enable

pub fn cc1np(&self) -> CC1NP_R[src]

Bit 3 - Capture/Compare 1 output Polarity

pub fn cc1ne(&self) -> CC1NE_R[src]

Bit 2 - Capture/Compare 1 complementary output enable

pub fn cc1p(&self) -> CC1P_R[src]

Bit 1 - Capture/Compare 1 output Polarity

pub fn cc1e(&self) -> CC1E_R[src]

Bit 0 - Capture/Compare 1 output enable

pub fn cc4np(&self) -> CC4NP_R[src]

Bit 15 - Capture/Compare 4 complementary output polarity

pub fn cc5e(&self) -> CC5E_R[src]

Bit 16 - Capture/Compare 5 output enable

pub fn cc5p(&self) -> CC5P_R[src]

Bit 17 - Capture/Compare 5 output polarity

pub fn cc6e(&self) -> CC6E_R[src]

Bit 20 - Capture/Compare 6 output enable

pub fn cc6p(&self) -> CC6P_R[src]

Bit 21 - Capture/Compare 6 output polarity

impl R<u32, Reg<u32, _CNT>>[src]

pub fn cnt(&self) -> CNT_R[src]

Bits 0:15 - counter value

pub fn uifcpy(&self) -> UIFCPY_R[src]

Bit 31 - UIF copy

impl R<u32, Reg<u32, _PSC>>[src]

pub fn psc(&self) -> PSC_R[src]

Bits 0:15 - Prescaler value

impl R<u32, Reg<u32, _ARR>>[src]

pub fn arr(&self) -> ARR_R[src]

Bits 0:15 - Auto-reload value

impl R<u32, Reg<u32, _RCR>>[src]

pub fn rep(&self) -> REP_R[src]

Bits 0:7 - Repetition counter value

impl R<u32, Reg<u32, _CCR1>>[src]

pub fn ccr1(&self) -> CCR1_R[src]

Bits 0:15 - Capture/Compare 1 value

impl R<u32, Reg<u32, _CCR2>>[src]

pub fn ccr2(&self) -> CCR2_R[src]

Bits 0:15 - Capture/Compare 2 value

impl R<u32, Reg<u32, _CCR3>>[src]

pub fn ccr3(&self) -> CCR3_R[src]

Bits 0:15 - Capture/Compare value

impl R<u32, Reg<u32, _CCR4>>[src]

pub fn ccr4(&self) -> CCR4_R[src]

Bits 0:15 - Capture/Compare value

impl R<u32, Reg<u32, _BDTR>>[src]

pub fn moe(&self) -> MOE_R[src]

Bit 15 - Main output enable

pub fn aoe(&self) -> AOE_R[src]

Bit 14 - Automatic output enable

pub fn bkp(&self) -> BKP_R[src]

Bit 13 - Break polarity

pub fn bke(&self) -> BKE_R[src]

Bit 12 - Break enable

pub fn ossr(&self) -> OSSR_R[src]

Bit 11 - Off-state selection for Run mode

pub fn ossi(&self) -> OSSI_R[src]

Bit 10 - Off-state selection for Idle mode

pub fn lock(&self) -> LOCK_R[src]

Bits 8:9 - Lock configuration

pub fn dtg(&self) -> DTG_R[src]

Bits 0:7 - Dead-time generator setup

pub fn bkf(&self) -> BKF_R[src]

Bits 16:19 - Break filter

pub fn bk2f(&self) -> BK2F_R[src]

Bits 20:23 - Break 2 filter

pub fn bk2e(&self) -> BK2E_R[src]

Bit 24 - Break 2 enable

pub fn bk2p(&self) -> BK2P_R[src]

Bit 25 - Break 2 polarity

pub fn bkdsrm(&self) -> BKDSRM_R[src]

Bit 26 - Break Disarm

pub fn bk2dsrm(&self) -> BK2DSRM_R[src]

Bit 27 - Break2 Disarm

pub fn bkbid(&self) -> BKBID_R[src]

Bit 28 - Break Bidirectional

pub fn bk2bid(&self) -> BK2BID_R[src]

Bit 29 - Break2 bidirectional

impl R<u32, Reg<u32, _DCR>>[src]

pub fn dbl(&self) -> DBL_R[src]

Bits 8:12 - DMA burst length

pub fn dba(&self) -> DBA_R[src]

Bits 0:4 - DMA base address

impl R<u32, Reg<u32, _DMAR>>[src]

pub fn dmab(&self) -> DMAB_R[src]

Bits 0:31 - DMA register for burst accesses

impl R<u32, Reg<u32, _OR1>>[src]

pub fn etr_adc1_rmp(&self) -> ETR_ADC1_RMP_R[src]

Bits 0:1 - External trigger remap on ADC1 analog watchdog

pub fn ti1_rmp(&self) -> TI1_RMP_R[src]

Bit 4 - Input Capture 1 remap

impl R<u32, Reg<u32, _CCMR3_OUTPUT>>[src]

pub fn oc6m_bit3(&self) -> OC6M_BIT3_R[src]

Bit 24 - Output Compare 6 mode bit 3

pub fn oc5m_bit3(&self) -> OC5M_BIT3_R[src]

Bits 16:18 - Output Compare 5 mode bit 3

pub fn oc6ce(&self) -> OC6CE_R[src]

Bit 15 - Output compare 6 clear enable

pub fn oc6m(&self) -> OC6M_R[src]

Bits 12:14 - Output compare 6 mode

pub fn oc6pe(&self) -> OC6PE_R[src]

Bit 11 - Output compare 6 preload enable

pub fn oc6fe(&self) -> OC6FE_R[src]

Bit 10 - Output compare 6 fast enable

pub fn oc5ce(&self) -> OC5CE_R[src]

Bit 7 - Output compare 5 clear enable

pub fn oc5m(&self) -> OC5M_R[src]

Bits 4:6 - Output compare 5 mode

pub fn oc5pe(&self) -> OC5PE_R[src]

Bit 3 - Output compare 5 preload enable

pub fn oc5fe(&self) -> OC5FE_R[src]

Bit 2 - Output compare 5 fast enable

impl R<u32, Reg<u32, _CCR5>>[src]

pub fn ccr5(&self) -> CCR5_R[src]

Bits 0:15 - Capture/Compare value

pub fn gc5c1(&self) -> GC5C1_R[src]

Bit 29 - Group Channel 5 and Channel 1

pub fn gc5c2(&self) -> GC5C2_R[src]

Bit 30 - Group Channel 5 and Channel 2

pub fn gc5c3(&self) -> GC5C3_R[src]

Bit 31 - Group Channel 5 and Channel 3

impl R<u32, Reg<u32, _CCR6>>[src]

pub fn ccr6(&self) -> CCR6_R[src]

Bits 0:15 - Capture/Compare value

impl R<u32, Reg<u32, _OR2>>[src]

pub fn bkine(&self) -> BKINE_R[src]

Bit 0 - BRK BKIN input enable

pub fn bkcmp1e(&self) -> BKCMP1E_R[src]

Bit 1 - BRK COMP1 enable

pub fn bkcmp2e(&self) -> BKCMP2E_R[src]

Bit 2 - BRK COMP2 enable

pub fn bkdfbk0e(&self) -> BKDFBK0E_R[src]

Bit 8 - BRK DFSDM_BREAK0 enable

pub fn bkinp(&self) -> BKINP_R[src]

Bit 9 - BRK BKIN input polarity

pub fn bkcmp1p(&self) -> BKCMP1P_R[src]

Bit 10 - BRK COMP1 input polarity

pub fn bkcmp2p(&self) -> BKCMP2P_R[src]

Bit 11 - BRK COMP2 input polarity

pub fn etrsel(&self) -> ETRSEL_R[src]

Bits 14:16 - ETR source selection

impl R<u32, Reg<u32, _OR3>>[src]

pub fn bk2ine(&self) -> BK2INE_R[src]

Bit 0 - BRK2 BKIN input enable

pub fn bk2cmp1e(&self) -> BK2CMP1E_R[src]

Bit 1 - BRK2 COMP1 enable

pub fn bk2cmp2e(&self) -> BK2CMP2E_R[src]

Bit 2 - BRK2 COMP2 enable

pub fn bk2dfbk0e(&self) -> BK2DFBK0E_R[src]

Bit 8 - BRK2 DFSDM_BREAK0 enable

pub fn bk2inp(&self) -> BK2INP_R[src]

Bit 9 - BRK2 BKIN input polarity

pub fn bk2cmp1p(&self) -> BK2CMP1P_R[src]

Bit 10 - BRK2 COMP1 input polarity

pub fn bk2cmp2p(&self) -> BK2CMP2P_R[src]

Bit 11 - BRK2 COMP2 input polarity

impl R<u32, Reg<u32, _CR1>>[src]

pub fn cen(&self) -> CEN_R[src]

Bit 0 - Counter enable

pub fn udis(&self) -> UDIS_R[src]

Bit 1 - Update disable

pub fn urs(&self) -> URS_R[src]

Bit 2 - Update request source

pub fn opm(&self) -> OPM_R[src]

Bit 3 - One-pulse mode

pub fn arpe(&self) -> ARPE_R[src]

Bit 7 - Auto-reload preload enable

pub fn ckd(&self) -> CKD_R[src]

Bits 8:9 - Clock division

pub fn uifremap(&self) -> UIFREMAP_R[src]

Bit 11 - UIF status bit remapping

impl R<u32, Reg<u32, _CR2>>[src]

pub fn ois1n(&self) -> OIS1N_R[src]

Bit 9 - Output Idle state 1

pub fn ois1(&self) -> OIS1_R[src]

Bit 8 - Output Idle state 1

pub fn ccds(&self) -> CCDS_R[src]

Bit 3 - Capture/compare DMA selection

pub fn ccus(&self) -> CCUS_R[src]

Bit 2 - Capture/compare control update selection

pub fn ccpc(&self) -> CCPC_R[src]

Bit 0 - Capture/compare preloaded control

pub fn mms(&self) -> MMS_R[src]

Bits 4:5 - Master mode selection

pub fn ti1s(&self) -> TI1S_R[src]

Bit 7 - TI1 selection

pub fn ois2(&self) -> OIS2_R[src]

Bit 10 - Output idle state 2 (OC2 output)

impl R<u32, Reg<u32, _DIER>>[src]

pub fn tde(&self) -> TDE_R[src]

Bit 14 - Trigger DMA request enable

pub fn comde(&self) -> COMDE_R[src]

Bit 13 - COM DMA request enable

pub fn cc1de(&self) -> CC1DE_R[src]

Bit 9 - Capture/Compare 1 DMA request enable

pub fn ude(&self) -> UDE_R[src]

Bit 8 - Update DMA request enable

pub fn bie(&self) -> BIE_R[src]

Bit 7 - Break interrupt enable

pub fn tie(&self) -> TIE_R[src]

Bit 6 - Trigger interrupt enable

pub fn comie(&self) -> COMIE_R[src]

Bit 5 - COM interrupt enable

pub fn cc1ie(&self) -> CC1IE_R[src]

Bit 1 - Capture/Compare 1 interrupt enable

pub fn uie(&self) -> UIE_R[src]

Bit 0 - Update interrupt enable

pub fn cc2de(&self) -> CC2DE_R[src]

Bit 10 - Capture/Compare 2 DMA request enable

pub fn cc2ie(&self) -> CC2IE_R[src]

Bit 2 - Capture/Compare 2 interrupt enable

impl R<u32, Reg<u32, _SR>>[src]

pub fn cc1of(&self) -> CC1OF_R[src]

Bit 9 - Capture/Compare 1 overcapture flag

pub fn bif(&self) -> BIF_R[src]

Bit 7 - Break interrupt flag

pub fn tif(&self) -> TIF_R[src]

Bit 6 - Trigger interrupt flag

pub fn comif(&self) -> COMIF_R[src]

Bit 5 - COM interrupt flag

pub fn cc1if(&self) -> CC1IF_R[src]

Bit 1 - Capture/compare 1 interrupt flag

pub fn uif(&self) -> UIF_R[src]

Bit 0 - Update interrupt flag

pub fn cc2of(&self) -> CC2OF_R[src]

Bit 10 - Capture/Compare 2 overcapture flag

pub fn cc2if(&self) -> CC2IF_R[src]

Bit 2 - Capture/Compare 2 interrupt flag

impl R<u32, Reg<u32, _CCMR1_OUTPUT>>[src]

pub fn oc1m_bit3(&self) -> OC1M_BIT3_R[src]

Bit 16 - Output Compare 1 mode

pub fn oc1m(&self) -> OC1M_R[src]

Bits 4:6 - Output Compare 1 mode

pub fn oc1pe(&self) -> OC1PE_R[src]

Bit 3 - Output Compare 1 preload enable

pub fn oc1fe(&self) -> OC1FE_R[src]

Bit 2 - Output Compare 1 fast enable

pub fn cc1s(&self) -> CC1S_R[src]

Bits 0:1 - Capture/Compare 1 selection

pub fn oc2m_bit3(&self) -> OC2M_BIT3_R[src]

Bit 24 - Output Compare 2 mode - bit 3

pub fn oc2m(&self) -> OC2M_R[src]

Bits 12:14 - Output Compare 2 mode

pub fn oc2pe(&self) -> OC2PE_R[src]

Bit 11 - Output Compare 2 preload enable

pub fn cc2s(&self) -> CC2S_R[src]

Bits 8:9 - Capture/Compare 2 selection

impl R<u32, Reg<u32, _CCMR1_INPUT>>[src]

pub fn ic1f(&self) -> IC1F_R[src]

Bits 4:7 - Input capture 1 filter

pub fn ic1psc(&self) -> IC1PSC_R[src]

Bits 2:3 - Input capture 1 prescaler

pub fn cc1s(&self) -> CC1S_R[src]

Bits 0:1 - Capture/Compare 1 selection

pub fn ic2f(&self) -> IC2F_R[src]

Bits 12:15 - Input capture 2 filter

pub fn ic2psc(&self) -> IC2PSC_R[src]

Bits 10:11 - Input capture 2 prescaler

pub fn cc2s(&self) -> CC2S_R[src]

Bits 8:9 - Capture/Compare 2 selection

impl R<u32, Reg<u32, _CCER>>[src]

pub fn cc1np(&self) -> CC1NP_R[src]

Bit 3 - Capture/Compare 1 output Polarity

pub fn cc1ne(&self) -> CC1NE_R[src]

Bit 2 - Capture/Compare 1 complementary output enable

pub fn cc1p(&self) -> CC1P_R[src]

Bit 1 - Capture/Compare 1 output Polarity

pub fn cc1e(&self) -> CC1E_R[src]

Bit 0 - Capture/Compare 1 output enable

pub fn cc2np(&self) -> CC2NP_R[src]

Bit 7 - Capture/Compare 2 complementary output polarity

pub fn cc2p(&self) -> CC2P_R[src]

Bit 5 - Capture/Compare 2 output polarity

pub fn cc2e(&self) -> CC2E_R[src]

Bit 4 - Capture/Compare 2 output enable

impl R<u32, Reg<u32, _CNT>>[src]

pub fn cnt(&self) -> CNT_R[src]

Bits 0:15 - counter value

pub fn uifcpy(&self) -> UIFCPY_R[src]

Bit 31 - UIF Copy

impl R<u32, Reg<u32, _PSC>>[src]

pub fn psc(&self) -> PSC_R[src]

Bits 0:15 - Prescaler value

impl R<u32, Reg<u32, _ARR>>[src]

pub fn arr(&self) -> ARR_R[src]

Bits 0:15 - Auto-reload value

impl R<u32, Reg<u32, _RCR>>[src]

pub fn rep(&self) -> REP_R[src]

Bits 0:7 - Repetition counter value

impl R<u32, Reg<u32, _CCR1>>[src]

pub fn ccr1(&self) -> CCR1_R[src]

Bits 0:15 - Capture/Compare 1 value

impl R<u32, Reg<u32, _BDTR>>[src]

pub fn dtg(&self) -> DTG_R[src]

Bits 0:7 - Dead-time generator setup

pub fn lock(&self) -> LOCK_R[src]

Bits 8:9 - Lock configuration

pub fn ossi(&self) -> OSSI_R[src]

Bit 10 - Off-state selection for Idle mode

pub fn ossr(&self) -> OSSR_R[src]

Bit 11 - Off-state selection for Run mode

pub fn bke(&self) -> BKE_R[src]

Bit 12 - Break enable

pub fn bkp(&self) -> BKP_R[src]

Bit 13 - Break polarity

pub fn aoe(&self) -> AOE_R[src]

Bit 14 - Automatic output enable

pub fn moe(&self) -> MOE_R[src]

Bit 15 - Main output enable

pub fn bkbid(&self) -> BKBID_R[src]

Bit 28 - Break Bidirectional

pub fn bkdsrm(&self) -> BKDSRM_R[src]

Bit 26 - Break Disarm

impl R<u32, Reg<u32, _DCR>>[src]

pub fn dbl(&self) -> DBL_R[src]

Bits 8:12 - DMA burst length

pub fn dba(&self) -> DBA_R[src]

Bits 0:4 - DMA base address

impl R<u32, Reg<u32, _DMAR>>[src]

pub fn dmab(&self) -> DMAB_R[src]

Bits 0:15 - DMA register for burst accesses

impl R<u32, Reg<u32, _SMCR>>[src]

pub fn sms(&self) -> SMS_R[src]

Bits 0:2 - Slave mode selection

pub fn ts(&self) -> TS_R[src]

Bits 4:6 - Trigger selection

pub fn msm(&self) -> MSM_R[src]

Bit 7 - Master/slave mode

pub fn sms_bit3(&self) -> SMS_BIT3_R[src]

Bit 16 - Slave mode selection - bit 3

impl R<u32, Reg<u32, _OR1>>[src]

pub fn encoder_mode(&self) -> ENCODER_MODE_R[src]

Bits 1:2 - Encoder mode

pub fn ti1_rmp(&self) -> TI1_RMP_R[src]

Bit 0 - Input capture 1 remap

impl R<u32, Reg<u32, _OR2>>[src]

pub fn bkcmp2p(&self) -> BKCMP2P_R[src]

Bit 11 - BRK COMP2 input polarity

pub fn bkcmp1p(&self) -> BKCMP1P_R[src]

Bit 10 - BRK COMP1 input polarity

pub fn bkinp(&self) -> BKINP_R[src]

Bit 9 - BRK BKIN input polarity

pub fn bkdf1bk0e(&self) -> BKDF1BK0E_R[src]

Bit 8 - BRK dfsdm1_break[0] enable

pub fn bkcmp2e(&self) -> BKCMP2E_R[src]

Bit 2 - BRK COMP2 enable

pub fn bkcmp1e(&self) -> BKCMP1E_R[src]

Bit 1 - BRK COMP1 enable

pub fn bkine(&self) -> BKINE_R[src]

Bit 0 - BRK BKIN input enable

impl R<u32, Reg<u32, _CCR2>>[src]

pub fn ccr2(&self) -> CCR2_R[src]

Bits 0:15 - Capture/Compare 2 value

impl R<u32, Reg<u32, _CR1>>[src]

pub fn cen(&self) -> CEN_R[src]

Bit 0 - Counter enable

pub fn udis(&self) -> UDIS_R[src]

Bit 1 - Update disable

pub fn urs(&self) -> URS_R[src]

Bit 2 - Update request source

pub fn opm(&self) -> OPM_R[src]

Bit 3 - One-pulse mode

pub fn arpe(&self) -> ARPE_R[src]

Bit 7 - Auto-reload preload enable

pub fn ckd(&self) -> CKD_R[src]

Bits 8:9 - Clock division

pub fn uifremap(&self) -> UIFREMAP_R[src]

Bit 11 - UIF status bit remapping

impl R<u32, Reg<u32, _CR2>>[src]

pub fn ois1n(&self) -> OIS1N_R[src]

Bit 9 - Output Idle state 1

pub fn ois1(&self) -> OIS1_R[src]

Bit 8 - Output Idle state 1

pub fn ccds(&self) -> CCDS_R[src]

Bit 3 - Capture/compare DMA selection

pub fn ccus(&self) -> CCUS_R[src]

Bit 2 - Capture/compare control update selection

pub fn ccpc(&self) -> CCPC_R[src]

Bit 0 - Capture/compare preloaded control

impl R<u32, Reg<u32, _DIER>>[src]

pub fn comde(&self) -> COMDE_R[src]

Bit 13 - COM DMA request enable

pub fn cc1de(&self) -> CC1DE_R[src]

Bit 9 - Capture/Compare 1 DMA request enable

pub fn ude(&self) -> UDE_R[src]

Bit 8 - Update DMA request enable

pub fn bie(&self) -> BIE_R[src]

Bit 7 - Break interrupt enable

pub fn comie(&self) -> COMIE_R[src]

Bit 5 - COM interrupt enable

pub fn cc1ie(&self) -> CC1IE_R[src]

Bit 1 - Capture/Compare 1 interrupt enable

pub fn uie(&self) -> UIE_R[src]

Bit 0 - Update interrupt enable

impl R<u32, Reg<u32, _SR>>[src]

pub fn cc1of(&self) -> CC1OF_R[src]

Bit 9 - Capture/Compare 1 overcapture flag

pub fn bif(&self) -> BIF_R[src]

Bit 7 - Break interrupt flag

pub fn comif(&self) -> COMIF_R[src]

Bit 5 - COM interrupt flag

pub fn cc1if(&self) -> CC1IF_R[src]

Bit 1 - Capture/compare 1 interrupt flag

pub fn uif(&self) -> UIF_R[src]

Bit 0 - Update interrupt flag

impl R<u32, Reg<u32, _CCMR1_OUTPUT>>[src]

pub fn oc1m_2(&self) -> OC1M_2_R[src]

Bit 16 - Output Compare 1 mode

pub fn oc1m(&self) -> OC1M_R[src]

Bits 4:6 - Output Compare 1 mode

pub fn oc1pe(&self) -> OC1PE_R[src]

Bit 3 - Output Compare 1 preload enable

pub fn oc1fe(&self) -> OC1FE_R[src]

Bit 2 - Output Compare 1 fast enable

pub fn cc1s(&self) -> CC1S_R[src]

Bits 0:1 - Capture/Compare 1 selection

impl R<u32, Reg<u32, _CCMR1_INPUT>>[src]

pub fn ic1f(&self) -> IC1F_R[src]

Bits 4:7 - Input capture 1 filter

pub fn ic1psc(&self) -> IC1PSC_R[src]

Bits 2:3 - Input capture 1 prescaler

pub fn cc1s(&self) -> CC1S_R[src]

Bits 0:1 - Capture/Compare 1 selection

impl R<u32, Reg<u32, _CCER>>[src]

pub fn cc1np(&self) -> CC1NP_R[src]

Bit 3 - Capture/Compare 1 output Polarity

pub fn cc1ne(&self) -> CC1NE_R[src]

Bit 2 - Capture/Compare 1 complementary output enable

pub fn cc1p(&self) -> CC1P_R[src]

Bit 1 - Capture/Compare 1 output Polarity

pub fn cc1e(&self) -> CC1E_R[src]

Bit 0 - Capture/Compare 1 output enable

impl R<u32, Reg<u32, _CNT>>[src]

pub fn cnt(&self) -> CNT_R[src]

Bits 0:15 - counter value

pub fn uifcpy(&self) -> UIFCPY_R[src]

Bit 31 - UIF Copy

impl R<u32, Reg<u32, _PSC>>[src]

pub fn psc(&self) -> PSC_R[src]

Bits 0:15 - Prescaler value

impl R<u32, Reg<u32, _ARR>>[src]

pub fn arr(&self) -> ARR_R[src]

Bits 0:15 - Auto-reload value

impl R<u32, Reg<u32, _RCR>>[src]

pub fn rep(&self) -> REP_R[src]

Bits 0:7 - Repetition counter value

impl R<u32, Reg<u32, _CCR1>>[src]

pub fn ccr1(&self) -> CCR1_R[src]

Bits 0:15 - Capture/Compare 1 value

impl R<u32, Reg<u32, _BDTR>>[src]

pub fn dtg(&self) -> DTG_R[src]

Bits 0:7 - Dead-time generator setup

pub fn lock(&self) -> LOCK_R[src]

Bits 8:9 - Lock configuration

pub fn ossi(&self) -> OSSI_R[src]

Bit 10 - Off-state selection for Idle mode

pub fn ossr(&self) -> OSSR_R[src]

Bit 11 - Off-state selection for Run mode

pub fn bke(&self) -> BKE_R[src]

Bit 12 - Break enable

pub fn bkp(&self) -> BKP_R[src]

Bit 13 - Break polarity

pub fn aoe(&self) -> AOE_R[src]

Bit 14 - Automatic output enable

pub fn moe(&self) -> MOE_R[src]

Bit 15 - Main output enable

pub fn bkbid(&self) -> BKBID_R[src]

Bit 28 - Break Bidirectional

pub fn bkdsrm(&self) -> BKDSRM_R[src]

Bit 26 - Break Disarm

impl R<u32, Reg<u32, _DCR>>[src]

pub fn dbl(&self) -> DBL_R[src]

Bits 8:12 - DMA burst length

pub fn dba(&self) -> DBA_R[src]

Bits 0:4 - DMA base address

impl R<u32, Reg<u32, _DMAR>>[src]

pub fn dmab(&self) -> DMAB_R[src]

Bits 0:15 - DMA register for burst accesses

impl R<u32, Reg<u32, _OR1>>[src]

pub fn ti1_rmp(&self) -> TI1_RMP_R[src]

Bits 0:1 - Input capture 1 remap

impl R<u32, Reg<u32, _OR2>>[src]

pub fn bkine(&self) -> BKINE_R[src]

Bit 0 - BRK BKIN input enable

pub fn bkcmp1e(&self) -> BKCMP1E_R[src]

Bit 1 - BRK COMP1 enable

pub fn bkcmp2e(&self) -> BKCMP2E_R[src]

Bit 2 - BRK COMP2 enable

pub fn bkdf1bk1e(&self) -> BKDF1BK1E_R[src]

Bit 8 - BRK dfsdm1_break[1] enable

pub fn bkinp(&self) -> BKINP_R[src]

Bit 9 - BRK BKIN input polarity

pub fn bkcmp1p(&self) -> BKCMP1P_R[src]

Bit 10 - BRK COMP1 input polarity

pub fn bkcmp2p(&self) -> BKCMP2P_R[src]

Bit 11 - BRK COMP2 input polarit

impl R<u32, Reg<u32, _CR1>>[src]

pub fn cen(&self) -> CEN_R[src]

Bit 0 - Counter enable

pub fn udis(&self) -> UDIS_R[src]

Bit 1 - Update disable

pub fn urs(&self) -> URS_R[src]

Bit 2 - Update request source

pub fn opm(&self) -> OPM_R[src]

Bit 3 - One-pulse mode

pub fn arpe(&self) -> ARPE_R[src]

Bit 7 - Auto-reload preload enable

pub fn ckd(&self) -> CKD_R[src]

Bits 8:9 - Clock division

pub fn uifremap(&self) -> UIFREMAP_R[src]

Bit 11 - UIF status bit remapping

impl R<u32, Reg<u32, _CR2>>[src]

pub fn ois1n(&self) -> OIS1N_R[src]

Bit 9 - Output Idle state 1

pub fn ois1(&self) -> OIS1_R[src]

Bit 8 - Output Idle state 1

pub fn ccds(&self) -> CCDS_R[src]

Bit 3 - Capture/compare DMA selection

pub fn ccus(&self) -> CCUS_R[src]

Bit 2 - Capture/compare control update selection

pub fn ccpc(&self) -> CCPC_R[src]

Bit 0 - Capture/compare preloaded control

impl R<u32, Reg<u32, _DIER>>[src]

pub fn comde(&self) -> COMDE_R[src]

Bit 13 - COM DMA request enable

pub fn cc1de(&self) -> CC1DE_R[src]

Bit 9 - Capture/Compare 1 DMA request enable

pub fn ude(&self) -> UDE_R[src]

Bit 8 - Update DMA request enable

pub fn bie(&self) -> BIE_R[src]

Bit 7 - Break interrupt enable

pub fn comie(&self) -> COMIE_R[src]

Bit 5 - COM interrupt enable

pub fn cc1ie(&self) -> CC1IE_R[src]

Bit 1 - Capture/Compare 1 interrupt enable

pub fn uie(&self) -> UIE_R[src]

Bit 0 - Update interrupt enable

impl R<u32, Reg<u32, _SR>>[src]

pub fn cc1of(&self) -> CC1OF_R[src]

Bit 9 - Capture/Compare 1 overcapture flag

pub fn bif(&self) -> BIF_R[src]

Bit 7 - Break interrupt flag

pub fn comif(&self) -> COMIF_R[src]

Bit 5 - COM interrupt flag

pub fn cc1if(&self) -> CC1IF_R[src]

Bit 1 - Capture/compare 1 interrupt flag

pub fn uif(&self) -> UIF_R[src]

Bit 0 - Update interrupt flag

impl R<u32, Reg<u32, _CCMR1_OUTPUT>>[src]

pub fn oc1m_2(&self) -> OC1M_2_R[src]

Bit 16 - Output Compare 1 mode

pub fn oc1m(&self) -> OC1M_R[src]

Bits 4:6 - Output Compare 1 mode

pub fn oc1pe(&self) -> OC1PE_R[src]

Bit 3 - Output Compare 1 preload enable

pub fn oc1fe(&self) -> OC1FE_R[src]

Bit 2 - Output Compare 1 fast enable

pub fn cc1s(&self) -> CC1S_R[src]

Bits 0:1 - Capture/Compare 1 selection

impl R<u32, Reg<u32, _CCMR1_INPUT>>[src]

pub fn ic1f(&self) -> IC1F_R[src]

Bits 4:7 - Input capture 1 filter

pub fn ic1psc(&self) -> IC1PSC_R[src]

Bits 2:3 - Input capture 1 prescaler

pub fn cc1s(&self) -> CC1S_R[src]

Bits 0:1 - Capture/Compare 1 selection

impl R<u32, Reg<u32, _CCER>>[src]

pub fn cc1np(&self) -> CC1NP_R[src]

Bit 3 - Capture/Compare 1 output Polarity

pub fn cc1ne(&self) -> CC1NE_R[src]

Bit 2 - Capture/Compare 1 complementary output enable

pub fn cc1p(&self) -> CC1P_R[src]

Bit 1 - Capture/Compare 1 output Polarity

pub fn cc1e(&self) -> CC1E_R[src]

Bit 0 - Capture/Compare 1 output enable

impl R<u32, Reg<u32, _CNT>>[src]

pub fn cnt(&self) -> CNT_R[src]

Bits 0:15 - counter value

pub fn uifcpy(&self) -> UIFCPY_R[src]

Bit 31 - UIF Copy

impl R<u32, Reg<u32, _PSC>>[src]

pub fn psc(&self) -> PSC_R[src]

Bits 0:15 - Prescaler value

impl R<u32, Reg<u32, _ARR>>[src]

pub fn arr(&self) -> ARR_R[src]

Bits 0:15 - Auto-reload value

impl R<u32, Reg<u32, _RCR>>[src]

pub fn rep(&self) -> REP_R[src]

Bits 0:7 - Repetition counter value

impl R<u32, Reg<u32, _CCR1>>[src]

pub fn ccr1(&self) -> CCR1_R[src]

Bits 0:15 - Capture/Compare 1 value

impl R<u32, Reg<u32, _BDTR>>[src]

pub fn dtg(&self) -> DTG_R[src]

Bits 0:7 - Dead-time generator setup

pub fn lock(&self) -> LOCK_R[src]

Bits 8:9 - Lock configuration

pub fn ossi(&self) -> OSSI_R[src]

Bit 10 - Off-state selection for Idle mode

pub fn ossr(&self) -> OSSR_R[src]

Bit 11 - Off-state selection for Run mode

pub fn bke(&self) -> BKE_R[src]

Bit 12 - Break enable

pub fn bkp(&self) -> BKP_R[src]

Bit 13 - Break polarity

pub fn aoe(&self) -> AOE_R[src]

Bit 14 - Automatic output enable

pub fn moe(&self) -> MOE_R[src]

Bit 15 - Main output enable

pub fn bkbid(&self) -> BKBID_R[src]

Bit 28 - Break Bidirectional

pub fn bkdsrm(&self) -> BKDSRM_R[src]

Bit 26 - Break Disarm

impl R<u32, Reg<u32, _DCR>>[src]

pub fn dbl(&self) -> DBL_R[src]

Bits 8:12 - DMA burst length

pub fn dba(&self) -> DBA_R[src]

Bits 0:4 - DMA base address

impl R<u32, Reg<u32, _DMAR>>[src]

pub fn dmab(&self) -> DMAB_R[src]

Bits 0:15 - DMA register for burst accesses

impl R<u32, Reg<u32, _OR1>>[src]

pub fn ti1_rmp(&self) -> TI1_RMP_R[src]

Bits 0:1 - Input capture 1 remap

impl R<u32, Reg<u32, _OR2>>[src]

pub fn bkine(&self) -> BKINE_R[src]

Bit 0 - BRK BKIN input enable

pub fn bkcmp1e(&self) -> BKCMP1E_R[src]

Bit 1 - BRK COMP1 enable

pub fn bkcmp2e(&self) -> BKCMP2E_R[src]

Bit 2 - BRK COMP2 enable

pub fn bkdf1bk2e(&self) -> BKDF1BK2E_R[src]

Bit 8 - BRK dfsdm1_break[2] enable

pub fn bkinp(&self) -> BKINP_R[src]

Bit 9 - BRK BKIN input polarity

pub fn bkcmp1p(&self) -> BKCMP1P_R[src]

Bit 10 - BRK COMP1 input polarity

pub fn bkcmp2p(&self) -> BKCMP2P_R[src]

Bit 11 - BRK COMP2 input polarit

impl R<u32, Reg<u32, _CR1>>[src]

pub fn ckd(&self) -> CKD_R[src]

Bits 8:9 - Clock division

pub fn arpe(&self) -> ARPE_R[src]

Bit 7 - Auto-reload preload enable

pub fn cms(&self) -> CMS_R[src]

Bits 5:6 - Center-aligned mode selection

pub fn dir(&self) -> DIR_R[src]

Bit 4 - Direction

pub fn opm(&self) -> OPM_R[src]

Bit 3 - One-pulse mode

pub fn urs(&self) -> URS_R[src]

Bit 2 - Update request source

pub fn udis(&self) -> UDIS_R[src]

Bit 1 - Update disable

pub fn cen(&self) -> CEN_R[src]

Bit 0 - Counter enable

pub fn uifremap(&self) -> UIFREMAP_R[src]

Bit 11 - UIF status bit remapping

impl R<u32, Reg<u32, _CR2>>[src]

pub fn ti1s(&self) -> TI1S_R[src]

Bit 7 - TI1 selection

pub fn mms(&self) -> MMS_R[src]

Bits 4:6 - Master mode selection

pub fn ccds(&self) -> CCDS_R[src]

Bit 3 - Capture/compare DMA selection

impl R<u32, Reg<u32, _SMCR>>[src]

pub fn etp(&self) -> ETP_R[src]

Bit 15 - External trigger polarity

pub fn ece(&self) -> ECE_R[src]

Bit 14 - External clock enable

pub fn etps(&self) -> ETPS_R[src]

Bits 12:13 - External trigger prescaler

pub fn etf(&self) -> ETF_R[src]

Bits 8:11 - External trigger filter

pub fn msm(&self) -> MSM_R[src]

Bit 7 - Master/Slave mode

pub fn ts(&self) -> TS_R[src]

Bits 4:6 - Trigger selection

pub fn sms(&self) -> SMS_R[src]

Bits 0:2 - Slave mode selection

pub fn sms_bit3(&self) -> SMS_BIT3_R[src]

Bit 16 - Slave mode selection - bit 3

impl R<u32, Reg<u32, _DIER>>[src]

pub fn tde(&self) -> TDE_R[src]

Bit 14 - Trigger DMA request enable

pub fn cc4de(&self) -> CC4DE_R[src]

Bit 12 - Capture/Compare 4 DMA request enable

pub fn cc3de(&self) -> CC3DE_R[src]

Bit 11 - Capture/Compare 3 DMA request enable

pub fn cc2de(&self) -> CC2DE_R[src]

Bit 10 - Capture/Compare 2 DMA request enable

pub fn cc1de(&self) -> CC1DE_R[src]

Bit 9 - Capture/Compare 1 DMA request enable

pub fn ude(&self) -> UDE_R[src]

Bit 8 - Update DMA request enable

pub fn tie(&self) -> TIE_R[src]

Bit 6 - Trigger interrupt enable

pub fn cc4ie(&self) -> CC4IE_R[src]

Bit 4 - Capture/Compare 4 interrupt enable

pub fn cc3ie(&self) -> CC3IE_R[src]

Bit 3 - Capture/Compare 3 interrupt enable

pub fn cc2ie(&self) -> CC2IE_R[src]

Bit 2 - Capture/Compare 2 interrupt enable

pub fn cc1ie(&self) -> CC1IE_R[src]

Bit 1 - Capture/Compare 1 interrupt enable

pub fn uie(&self) -> UIE_R[src]

Bit 0 - Update interrupt enable

impl R<u32, Reg<u32, _SR>>[src]

pub fn cc4of(&self) -> CC4OF_R[src]

Bit 12 - Capture/Compare 4 overcapture flag

pub fn cc3of(&self) -> CC3OF_R[src]

Bit 11 - Capture/Compare 3 overcapture flag

pub fn cc2of(&self) -> CC2OF_R[src]

Bit 10 - Capture/compare 2 overcapture flag

pub fn cc1of(&self) -> CC1OF_R[src]

Bit 9 - Capture/Compare 1 overcapture flag

pub fn tif(&self) -> TIF_R[src]

Bit 6 - Trigger interrupt flag

pub fn cc4if(&self) -> CC4IF_R[src]

Bit 4 - Capture/Compare 4 interrupt flag

pub fn cc3if(&self) -> CC3IF_R[src]

Bit 3 - Capture/Compare 3 interrupt flag

pub fn cc2if(&self) -> CC2IF_R[src]

Bit 2 - Capture/Compare 2 interrupt flag

pub fn cc1if(&self) -> CC1IF_R[src]

Bit 1 - Capture/compare 1 interrupt flag

pub fn uif(&self) -> UIF_R[src]

Bit 0 - Update interrupt flag

impl R<u32, Reg<u32, _CCMR1_OUTPUT>>[src]

pub fn oc2ce(&self) -> OC2CE_R[src]

Bit 15 - Output compare 2 clear enable

pub fn oc2m(&self) -> OC2M_R[src]

Bits 12:14 - Output compare 2 mode

pub fn oc2pe(&self) -> OC2PE_R[src]

Bit 11 - Output compare 2 preload enable

pub fn oc2fe(&self) -> OC2FE_R[src]

Bit 10 - Output compare 2 fast enable

pub fn cc2s(&self) -> CC2S_R[src]

Bits 8:9 - Capture/Compare 2 selection

pub fn oc1ce(&self) -> OC1CE_R[src]

Bit 7 - Output compare 1 clear enable

pub fn oc1m(&self) -> OC1M_R[src]

Bits 4:6 - Output compare 1 mode

pub fn oc1pe(&self) -> OC1PE_R[src]

Bit 3 - Output compare 1 preload enable

pub fn oc1fe(&self) -> OC1FE_R[src]

Bit 2 - Output compare 1 fast enable

pub fn cc1s(&self) -> CC1S_R[src]

Bits 0:1 - Capture/Compare 1 selection

pub fn oc2m_bit3(&self) -> OC2M_BIT3_R[src]

Bit 24 - Output Compare 2 mode - bit 3

pub fn oc1m_bit3(&self) -> OC1M_BIT3_R[src]

Bit 16 - Output Compare 1 mode - bit 3

impl R<u32, Reg<u32, _CCMR1_INPUT>>[src]

pub fn ic2f(&self) -> IC2F_R[src]

Bits 12:15 - Input capture 2 filter

pub fn ic2psc(&self) -> IC2PSC_R[src]

Bits 10:11 - Input capture 2 prescaler

pub fn cc2s(&self) -> CC2S_R[src]

Bits 8:9 - Capture/compare 2 selection

pub fn ic1f(&self) -> IC1F_R[src]

Bits 4:7 - Input capture 1 filter

pub fn ic1psc(&self) -> IC1PSC_R[src]

Bits 2:3 - Input capture 1 prescaler

pub fn cc1s(&self) -> CC1S_R[src]

Bits 0:1 - Capture/Compare 1 selection

impl R<u32, Reg<u32, _CCMR2_OUTPUT>>[src]

pub fn oc4ce(&self) -> OC4CE_R[src]

Bit 15 - Output compare 4 clear enable

pub fn oc4m(&self) -> OC4M_R[src]

Bits 12:14 - Output compare 4 mode

pub fn oc4pe(&self) -> OC4PE_R[src]

Bit 11 - Output compare 4 preload enable

pub fn oc4fe(&self) -> OC4FE_R[src]

Bit 10 - Output compare 4 fast enable

pub fn cc4s(&self) -> CC4S_R[src]

Bits 8:9 - Capture/Compare 4 selection

pub fn oc3ce(&self) -> OC3CE_R[src]

Bit 7 - Output compare 3 clear enable

pub fn oc3m(&self) -> OC3M_R[src]

Bits 4:6 - Output compare 3 mode

pub fn oc3pe(&self) -> OC3PE_R[src]

Bit 3 - Output compare 3 preload enable

pub fn oc3fe(&self) -> OC3FE_R[src]

Bit 2 - Output compare 3 fast enable

pub fn cc3s(&self) -> CC3S_R[src]

Bits 0:1 - Capture/Compare 3 selection

pub fn oc4m_bit3(&self) -> OC4M_BIT3_R[src]

Bit 24 - Output Compare 2 mode - bit 3

pub fn oc3m_bit3(&self) -> OC3M_BIT3_R[src]

Bit 16 - Output Compare 1 mode - bit 3

impl R<u32, Reg<u32, _CCMR2_INPUT>>[src]

pub fn ic4f(&self) -> IC4F_R[src]

Bits 12:15 - Input capture 4 filter

pub fn ic4psc(&self) -> IC4PSC_R[src]

Bits 10:11 - Input capture 4 prescaler

pub fn cc4s(&self) -> CC4S_R[src]

Bits 8:9 - Capture/Compare 4 selection

pub fn ic3f(&self) -> IC3F_R[src]

Bits 4:7 - Input capture 3 filter

pub fn ic3psc(&self) -> IC3PSC_R[src]

Bits 2:3 - Input capture 3 prescaler

pub fn cc3s(&self) -> CC3S_R[src]

Bits 0:1 - Capture/Compare 3 selection

impl R<u32, Reg<u32, _CCER>>[src]

pub fn cc4np(&self) -> CC4NP_R[src]

Bit 15 - Capture/Compare 4 output Polarity

pub fn cc4p(&self) -> CC4P_R[src]

Bit 13 - Capture/Compare 3 output Polarity

pub fn cc4e(&self) -> CC4E_R[src]

Bit 12 - Capture/Compare 4 output enable

pub fn cc3np(&self) -> CC3NP_R[src]

Bit 11 - Capture/Compare 3 output Polarity

pub fn cc3p(&self) -> CC3P_R[src]

Bit 9 - Capture/Compare 3 output Polarity

pub fn cc3e(&self) -> CC3E_R[src]

Bit 8 - Capture/Compare 3 output enable

pub fn cc2np(&self) -> CC2NP_R[src]

Bit 7 - Capture/Compare 2 output Polarity

pub fn cc2p(&self) -> CC2P_R[src]

Bit 5 - Capture/Compare 2 output Polarity

pub fn cc2e(&self) -> CC2E_R[src]

Bit 4 - Capture/Compare 2 output enable

pub fn cc1np(&self) -> CC1NP_R[src]

Bit 3 - Capture/Compare 1 output Polarity

pub fn cc1p(&self) -> CC1P_R[src]

Bit 1 - Capture/Compare 1 output Polarity

pub fn cc1e(&self) -> CC1E_R[src]

Bit 0 - Capture/Compare 1 output enable

impl R<u32, Reg<u32, _CNT>>[src]

pub fn cnt_h(&self) -> CNT_H_R[src]

Bits 16:30 - Most significant part counter value (on TIM2 and TIM5)

pub fn cnt_l(&self) -> CNT_L_R[src]

Bits 0:15 - Least significant part of counter value

pub fn cnt_bit31(&self) -> CNT_BIT31_R[src]

Bit 31 - Most significant bit of counter value (on TIM2 and TIM5)

impl R<u32, Reg<u32, _PSC>>[src]

pub fn psc(&self) -> PSC_R[src]

Bits 0:15 - Prescaler value

impl R<u32, Reg<u32, _ARR>>[src]

pub fn arr_h(&self) -> ARR_H_R[src]

Bits 16:31 - High Auto-reload value (TIM2 only)

pub fn arr_l(&self) -> ARR_L_R[src]

Bits 0:15 - Low Auto-reload value

impl R<u32, Reg<u32, _CCR1>>[src]

pub fn ccr1_h(&self) -> CCR1_H_R[src]

Bits 16:31 - High Capture/Compare 1 value (TIM2 only)

pub fn ccr1_l(&self) -> CCR1_L_R[src]

Bits 0:15 - Low Capture/Compare 1 value

impl R<u32, Reg<u32, _CCR2>>[src]

pub fn ccr2_h(&self) -> CCR2_H_R[src]

Bits 16:31 - High Capture/Compare 2 value (TIM2 only)

pub fn ccr2_l(&self) -> CCR2_L_R[src]

Bits 0:15 - Low Capture/Compare 2 value

impl R<u32, Reg<u32, _CCR3>>[src]

pub fn ccr3_h(&self) -> CCR3_H_R[src]

Bits 16:31 - High Capture/Compare value (TIM2 only)

pub fn ccr3_l(&self) -> CCR3_L_R[src]

Bits 0:15 - Low Capture/Compare value

impl R<u32, Reg<u32, _CCR4>>[src]

pub fn ccr4_h(&self) -> CCR4_H_R[src]

Bits 16:31 - High Capture/Compare value (TIM2 only)

pub fn ccr4_l(&self) -> CCR4_L_R[src]

Bits 0:15 - Low Capture/Compare value

impl R<u32, Reg<u32, _DCR>>[src]

pub fn dbl(&self) -> DBL_R[src]

Bits 8:12 - DMA burst length

pub fn dba(&self) -> DBA_R[src]

Bits 0:4 - DMA base address

impl R<u32, Reg<u32, _DMAR>>[src]

pub fn dmab(&self) -> DMAB_R[src]

Bits 0:15 - Low Capture/Compare 2 value

impl R<u32, Reg<u32, _OR1>>[src]

pub fn itr1_rmp(&self) -> ITR1_RMP_R[src]

Bit 0 - Internal trigger 1 remap

pub fn ti4_rmp(&self) -> TI4_RMP_R[src]

Bits 2:3 - Input Capture 4 remap

pub fn etr1_rmp(&self) -> ETR1_RMP_R[src]

Bit 1 - External trigger remap

impl R<u32, Reg<u32, _OR2>>[src]

pub fn etrsel(&self) -> ETRSEL_R[src]

Bits 14:16 - ETR source selection

impl R<u32, Reg<u32, _CR1>>[src]

pub fn ckd(&self) -> CKD_R[src]

Bits 8:9 - Clock division

pub fn arpe(&self) -> ARPE_R[src]

Bit 7 - Auto-reload preload enable

pub fn cms(&self) -> CMS_R[src]

Bits 5:6 - Center-aligned mode selection

pub fn dir(&self) -> DIR_R[src]

Bit 4 - Direction

pub fn opm(&self) -> OPM_R[src]

Bit 3 - One-pulse mode

pub fn urs(&self) -> URS_R[src]

Bit 2 - Update request source

pub fn udis(&self) -> UDIS_R[src]

Bit 1 - Update disable

pub fn cen(&self) -> CEN_R[src]

Bit 0 - Counter enable

pub fn uifremap(&self) -> UIFREMAP_R[src]

Bit 11 - UIF status bit remapping

impl R<u32, Reg<u32, _CR2>>[src]

pub fn ti1s(&self) -> TI1S_R[src]

Bit 7 - TI1 selection

pub fn mms(&self) -> MMS_R[src]

Bits 4:6 - Master mode selection

pub fn ccds(&self) -> CCDS_R[src]

Bit 3 - Capture/compare DMA selection

impl R<u32, Reg<u32, _SMCR>>[src]

pub fn etp(&self) -> ETP_R[src]

Bit 15 - External trigger polarity

pub fn ece(&self) -> ECE_R[src]

Bit 14 - External clock enable

pub fn etps(&self) -> ETPS_R[src]

Bits 12:13 - External trigger prescaler

pub fn etf(&self) -> ETF_R[src]

Bits 8:11 - External trigger filter

pub fn msm(&self) -> MSM_R[src]

Bit 7 - Master/Slave mode

pub fn ts(&self) -> TS_R[src]

Bits 4:6 - Trigger selection

pub fn sms(&self) -> SMS_R[src]

Bits 0:2 - Slave mode selection

pub fn sms_bit3(&self) -> SMS_BIT3_R[src]

Bit 16 - Slave mode selection - bit 3

impl R<u32, Reg<u32, _DIER>>[src]

pub fn tde(&self) -> TDE_R[src]

Bit 14 - Trigger DMA request enable

pub fn cc4de(&self) -> CC4DE_R[src]

Bit 12 - Capture/Compare 4 DMA request enable

pub fn cc3de(&self) -> CC3DE_R[src]

Bit 11 - Capture/Compare 3 DMA request enable

pub fn cc2de(&self) -> CC2DE_R[src]

Bit 10 - Capture/Compare 2 DMA request enable

pub fn cc1de(&self) -> CC1DE_R[src]

Bit 9 - Capture/Compare 1 DMA request enable

pub fn ude(&self) -> UDE_R[src]

Bit 8 - Update DMA request enable

pub fn tie(&self) -> TIE_R[src]

Bit 6 - Trigger interrupt enable

pub fn cc4ie(&self) -> CC4IE_R[src]

Bit 4 - Capture/Compare 4 interrupt enable

pub fn cc3ie(&self) -> CC3IE_R[src]

Bit 3 - Capture/Compare 3 interrupt enable

pub fn cc2ie(&self) -> CC2IE_R[src]

Bit 2 - Capture/Compare 2 interrupt enable

pub fn cc1ie(&self) -> CC1IE_R[src]

Bit 1 - Capture/Compare 1 interrupt enable

pub fn uie(&self) -> UIE_R[src]

Bit 0 - Update interrupt enable

impl R<u32, Reg<u32, _SR>>[src]

pub fn cc4of(&self) -> CC4OF_R[src]

Bit 12 - Capture/Compare 4 overcapture flag

pub fn cc3of(&self) -> CC3OF_R[src]

Bit 11 - Capture/Compare 3 overcapture flag

pub fn cc2of(&self) -> CC2OF_R[src]

Bit 10 - Capture/compare 2 overcapture flag

pub fn cc1of(&self) -> CC1OF_R[src]

Bit 9 - Capture/Compare 1 overcapture flag

pub fn tif(&self) -> TIF_R[src]

Bit 6 - Trigger interrupt flag

pub fn cc4if(&self) -> CC4IF_R[src]

Bit 4 - Capture/Compare 4 interrupt flag

pub fn cc3if(&self) -> CC3IF_R[src]

Bit 3 - Capture/Compare 3 interrupt flag

pub fn cc2if(&self) -> CC2IF_R[src]

Bit 2 - Capture/Compare 2 interrupt flag

pub fn cc1if(&self) -> CC1IF_R[src]

Bit 1 - Capture/compare 1 interrupt flag

pub fn uif(&self) -> UIF_R[src]

Bit 0 - Update interrupt flag

impl R<u32, Reg<u32, _CCMR1_OUTPUT>>[src]

pub fn oc2ce(&self) -> OC2CE_R[src]

Bit 15 - Output compare 2 clear enable

pub fn oc2m(&self) -> OC2M_R[src]

Bits 12:14 - Output compare 2 mode

pub fn oc2pe(&self) -> OC2PE_R[src]

Bit 11 - Output compare 2 preload enable

pub fn oc2fe(&self) -> OC2FE_R[src]

Bit 10 - Output compare 2 fast enable

pub fn cc2s(&self) -> CC2S_R[src]

Bits 8:9 - Capture/Compare 2 selection

pub fn oc1ce(&self) -> OC1CE_R[src]

Bit 7 - Output compare 1 clear enable

pub fn oc1m(&self) -> OC1M_R[src]

Bits 4:6 - Output compare 1 mode

pub fn oc1pe(&self) -> OC1PE_R[src]

Bit 3 - Output compare 1 preload enable

pub fn oc1fe(&self) -> OC1FE_R[src]

Bit 2 - Output compare 1 fast enable

pub fn cc1s(&self) -> CC1S_R[src]

Bits 0:1 - Capture/Compare 1 selection

pub fn oc2m_bit3(&self) -> OC2M_BIT3_R[src]

Bit 24 - Output Compare 2 mode - bit 3

pub fn oc1m_bit3(&self) -> OC1M_BIT3_R[src]

Bit 16 - Output Compare 1 mode - bit 3

impl R<u32, Reg<u32, _CCMR1_INPUT>>[src]

pub fn ic2f(&self) -> IC2F_R[src]

Bits 12:15 - Input capture 2 filter

pub fn ic2psc(&self) -> IC2PSC_R[src]

Bits 10:11 - Input capture 2 prescaler

pub fn cc2s(&self) -> CC2S_R[src]

Bits 8:9 - Capture/compare 2 selection

pub fn ic1f(&self) -> IC1F_R[src]

Bits 4:7 - Input capture 1 filter

pub fn ic1psc(&self) -> IC1PSC_R[src]

Bits 2:3 - Input capture 1 prescaler

pub fn cc1s(&self) -> CC1S_R[src]

Bits 0:1 - Capture/Compare 1 selection

impl R<u32, Reg<u32, _CCMR2_OUTPUT>>[src]

pub fn oc4ce(&self) -> OC4CE_R[src]

Bit 15 - Output compare 4 clear enable

pub fn oc4m(&self) -> OC4M_R[src]

Bits 12:14 - Output compare 4 mode

pub fn oc4pe(&self) -> OC4PE_R[src]

Bit 11 - Output compare 4 preload enable

pub fn oc4fe(&self) -> OC4FE_R[src]

Bit 10 - Output compare 4 fast enable

pub fn cc4s(&self) -> CC4S_R[src]

Bits 8:9 - Capture/Compare 4 selection

pub fn oc3ce(&self) -> OC3CE_R[src]

Bit 7 - Output compare 3 clear enable

pub fn oc3m(&self) -> OC3M_R[src]

Bits 4:6 - Output compare 3 mode

pub fn oc3pe(&self) -> OC3PE_R[src]

Bit 3 - Output compare 3 preload enable

pub fn oc3fe(&self) -> OC3FE_R[src]

Bit 2 - Output compare 3 fast enable

pub fn cc3s(&self) -> CC3S_R[src]

Bits 0:1 - Capture/Compare 3 selection

pub fn oc4m_bit3(&self) -> OC4M_BIT3_R[src]

Bit 24 - Output Compare 2 mode - bit 3

pub fn oc3m_bit3(&self) -> OC3M_BIT3_R[src]

Bit 16 - Output Compare 1 mode - bit 3

impl R<u32, Reg<u32, _CCMR2_INPUT>>[src]

pub fn ic4f(&self) -> IC4F_R[src]

Bits 12:15 - Input capture 4 filter

pub fn ic4psc(&self) -> IC4PSC_R[src]

Bits 10:11 - Input capture 4 prescaler

pub fn cc4s(&self) -> CC4S_R[src]

Bits 8:9 - Capture/Compare 4 selection

pub fn ic3f(&self) -> IC3F_R[src]

Bits 4:7 - Input capture 3 filter

pub fn ic3psc(&self) -> IC3PSC_R[src]

Bits 2:3 - Input capture 3 prescaler

pub fn cc3s(&self) -> CC3S_R[src]

Bits 0:1 - Capture/Compare 3 selection

impl R<u32, Reg<u32, _CCER>>[src]

pub fn cc4np(&self) -> CC4NP_R[src]

Bit 15 - Capture/Compare 4 output Polarity

pub fn cc4p(&self) -> CC4P_R[src]

Bit 13 - Capture/Compare 3 output Polarity

pub fn cc4e(&self) -> CC4E_R[src]

Bit 12 - Capture/Compare 4 output enable

pub fn cc3np(&self) -> CC3NP_R[src]

Bit 11 - Capture/Compare 3 output Polarity

pub fn cc3p(&self) -> CC3P_R[src]

Bit 9 - Capture/Compare 3 output Polarity

pub fn cc3e(&self) -> CC3E_R[src]

Bit 8 - Capture/Compare 3 output enable

pub fn cc2np(&self) -> CC2NP_R[src]

Bit 7 - Capture/Compare 2 output Polarity

pub fn cc2p(&self) -> CC2P_R[src]

Bit 5 - Capture/Compare 2 output Polarity

pub fn cc2e(&self) -> CC2E_R[src]

Bit 4 - Capture/Compare 2 output enable

pub fn cc1np(&self) -> CC1NP_R[src]

Bit 3 - Capture/Compare 1 output Polarity

pub fn cc1p(&self) -> CC1P_R[src]

Bit 1 - Capture/Compare 1 output Polarity

pub fn cc1e(&self) -> CC1E_R[src]

Bit 0 - Capture/Compare 1 output enable

impl R<u32, Reg<u32, _CNT>>[src]

pub fn cnt_h(&self) -> CNT_H_R[src]

Bits 16:30 - Most significant part counter value (on TIM2 and TIM5)

pub fn cnt_l(&self) -> CNT_L_R[src]

Bits 0:15 - Least significant part of counter value

pub fn cnt_bit31(&self) -> CNT_BIT31_R[src]

Bit 31 - Most significant bit of counter value (on TIM2 and TIM5)

impl R<u32, Reg<u32, _PSC>>[src]

pub fn psc(&self) -> PSC_R[src]

Bits 0:15 - Prescaler value

impl R<u32, Reg<u32, _ARR>>[src]

pub fn arr_h(&self) -> ARR_H_R[src]

Bits 16:31 - High Auto-reload value (TIM2 only)

pub fn arr_l(&self) -> ARR_L_R[src]

Bits 0:15 - Low Auto-reload value

impl R<u32, Reg<u32, _CCR1>>[src]

pub fn ccr1_h(&self) -> CCR1_H_R[src]

Bits 16:31 - High Capture/Compare 1 value (TIM2 only)

pub fn ccr1_l(&self) -> CCR1_L_R[src]

Bits 0:15 - Low Capture/Compare 1 value

impl R<u32, Reg<u32, _CCR2>>[src]

pub fn ccr2_h(&self) -> CCR2_H_R[src]

Bits 16:31 - High Capture/Compare 2 value (TIM2 only)

pub fn ccr2_l(&self) -> CCR2_L_R[src]

Bits 0:15 - Low Capture/Compare 2 value

impl R<u32, Reg<u32, _CCR3>>[src]

pub fn ccr3_h(&self) -> CCR3_H_R[src]

Bits 16:31 - High Capture/Compare value (TIM2 only)

pub fn ccr3_l(&self) -> CCR3_L_R[src]

Bits 0:15 - Low Capture/Compare value

impl R<u32, Reg<u32, _CCR4>>[src]

pub fn ccr4_h(&self) -> CCR4_H_R[src]

Bits 16:31 - High Capture/Compare value (TIM2 only)

pub fn ccr4_l(&self) -> CCR4_L_R[src]

Bits 0:15 - Low Capture/Compare value

impl R<u32, Reg<u32, _DCR>>[src]

pub fn dbl(&self) -> DBL_R[src]

Bits 8:12 - DMA burst length

pub fn dba(&self) -> DBA_R[src]

Bits 0:4 - DMA base address

impl R<u32, Reg<u32, _DMAR>>[src]

pub fn dmab(&self) -> DMAB_R[src]

Bits 0:15 - Low Capture/Compare 2 value

impl R<u32, Reg<u32, _OR1>>[src]

pub fn itr1_rmp(&self) -> ITR1_RMP_R[src]

Bit 0 - Internal trigger 1 remap

impl R<u32, Reg<u32, _OR2>>[src]

pub fn etrsel(&self) -> ETRSEL_R[src]

Bits 14:16 - ETR source selection

impl R<u32, Reg<u32, _CR1>>[src]

pub fn ckd(&self) -> CKD_R[src]

Bits 8:9 - Clock division

pub fn arpe(&self) -> ARPE_R[src]

Bit 7 - Auto-reload preload enable

pub fn cms(&self) -> CMS_R[src]

Bits 5:6 - Center-aligned mode selection

pub fn dir(&self) -> DIR_R[src]

Bit 4 - Direction

pub fn opm(&self) -> OPM_R[src]

Bit 3 - One-pulse mode

pub fn urs(&self) -> URS_R[src]

Bit 2 - Update request source

pub fn udis(&self) -> UDIS_R[src]

Bit 1 - Update disable

pub fn cen(&self) -> CEN_R[src]

Bit 0 - Counter enable

pub fn uifremap(&self) -> UIFREMAP_R[src]

Bit 11 - UIF status bit remapping

impl R<u32, Reg<u32, _CR2>>[src]

pub fn ti1s(&self) -> TI1S_R[src]

Bit 7 - TI1 selection

pub fn mms(&self) -> MMS_R[src]

Bits 4:6 - Master mode selection

pub fn ccds(&self) -> CCDS_R[src]

Bit 3 - Capture/compare DMA selection

impl R<u32, Reg<u32, _SMCR>>[src]

pub fn etp(&self) -> ETP_R[src]

Bit 15 - External trigger polarity

pub fn ece(&self) -> ECE_R[src]

Bit 14 - External clock enable

pub fn etps(&self) -> ETPS_R[src]

Bits 12:13 - External trigger prescaler

pub fn etf(&self) -> ETF_R[src]

Bits 8:11 - External trigger filter

pub fn msm(&self) -> MSM_R[src]

Bit 7 - Master/Slave mode

pub fn ts(&self) -> TS_R[src]

Bits 4:6 - Trigger selection

pub fn sms(&self) -> SMS_R[src]

Bits 0:2 - Slave mode selection

pub fn sms_bit3(&self) -> SMS_BIT3_R[src]

Bit 16 - Slave mode selection - bit 3

impl R<u32, Reg<u32, _DIER>>[src]

pub fn tde(&self) -> TDE_R[src]

Bit 14 - Trigger DMA request enable

pub fn cc4de(&self) -> CC4DE_R[src]

Bit 12 - Capture/Compare 4 DMA request enable

pub fn cc3de(&self) -> CC3DE_R[src]

Bit 11 - Capture/Compare 3 DMA request enable

pub fn cc2de(&self) -> CC2DE_R[src]

Bit 10 - Capture/Compare 2 DMA request enable

pub fn cc1de(&self) -> CC1DE_R[src]

Bit 9 - Capture/Compare 1 DMA request enable

pub fn ude(&self) -> UDE_R[src]

Bit 8 - Update DMA request enable

pub fn tie(&self) -> TIE_R[src]

Bit 6 - Trigger interrupt enable

pub fn cc4ie(&self) -> CC4IE_R[src]

Bit 4 - Capture/Compare 4 interrupt enable

pub fn cc3ie(&self) -> CC3IE_R[src]

Bit 3 - Capture/Compare 3 interrupt enable

pub fn cc2ie(&self) -> CC2IE_R[src]

Bit 2 - Capture/Compare 2 interrupt enable

pub fn cc1ie(&self) -> CC1IE_R[src]

Bit 1 - Capture/Compare 1 interrupt enable

pub fn uie(&self) -> UIE_R[src]

Bit 0 - Update interrupt enable

impl R<u32, Reg<u32, _SR>>[src]

pub fn cc4of(&self) -> CC4OF_R[src]

Bit 12 - Capture/Compare 4 overcapture flag

pub fn cc3of(&self) -> CC3OF_R[src]

Bit 11 - Capture/Compare 3 overcapture flag

pub fn cc2of(&self) -> CC2OF_R[src]

Bit 10 - Capture/compare 2 overcapture flag

pub fn cc1of(&self) -> CC1OF_R[src]

Bit 9 - Capture/Compare 1 overcapture flag

pub fn tif(&self) -> TIF_R[src]

Bit 6 - Trigger interrupt flag

pub fn cc4if(&self) -> CC4IF_R[src]

Bit 4 - Capture/Compare 4 interrupt flag

pub fn cc3if(&self) -> CC3IF_R[src]

Bit 3 - Capture/Compare 3 interrupt flag

pub fn cc2if(&self) -> CC2IF_R[src]

Bit 2 - Capture/Compare 2 interrupt flag

pub fn cc1if(&self) -> CC1IF_R[src]

Bit 1 - Capture/compare 1 interrupt flag

pub fn uif(&self) -> UIF_R[src]

Bit 0 - Update interrupt flag

impl R<u32, Reg<u32, _CCMR1_OUTPUT>>[src]

pub fn oc2ce(&self) -> OC2CE_R[src]

Bit 15 - Output compare 2 clear enable

pub fn oc2m(&self) -> OC2M_R[src]

Bits 12:14 - Output compare 2 mode

pub fn oc2pe(&self) -> OC2PE_R[src]

Bit 11 - Output compare 2 preload enable

pub fn oc2fe(&self) -> OC2FE_R[src]

Bit 10 - Output compare 2 fast enable

pub fn cc2s(&self) -> CC2S_R[src]

Bits 8:9 - Capture/Compare 2 selection

pub fn oc1ce(&self) -> OC1CE_R[src]

Bit 7 - Output compare 1 clear enable

pub fn oc1m(&self) -> OC1M_R[src]

Bits 4:6 - Output compare 1 mode

pub fn oc1pe(&self) -> OC1PE_R[src]

Bit 3 - Output compare 1 preload enable

pub fn oc1fe(&self) -> OC1FE_R[src]

Bit 2 - Output compare 1 fast enable

pub fn cc1s(&self) -> CC1S_R[src]

Bits 0:1 - Capture/Compare 1 selection

pub fn oc2m_bit3(&self) -> OC2M_BIT3_R[src]

Bit 24 - Output Compare 2 mode - bit 3

pub fn oc1m_bit3(&self) -> OC1M_BIT3_R[src]

Bit 16 - Output Compare 1 mode - bit 3

impl R<u32, Reg<u32, _CCMR1_INPUT>>[src]

pub fn ic2f(&self) -> IC2F_R[src]

Bits 12:15 - Input capture 2 filter

pub fn ic2psc(&self) -> IC2PSC_R[src]

Bits 10:11 - Input capture 2 prescaler

pub fn cc2s(&self) -> CC2S_R[src]

Bits 8:9 - Capture/compare 2 selection

pub fn ic1f(&self) -> IC1F_R[src]

Bits 4:7 - Input capture 1 filter

pub fn ic1psc(&self) -> IC1PSC_R[src]

Bits 2:3 - Input capture 1 prescaler

pub fn cc1s(&self) -> CC1S_R[src]

Bits 0:1 - Capture/Compare 1 selection

impl R<u32, Reg<u32, _CCMR2_OUTPUT>>[src]

pub fn oc4ce(&self) -> OC4CE_R[src]

Bit 15 - Output compare 4 clear enable

pub fn oc4m(&self) -> OC4M_R[src]

Bits 12:14 - Output compare 4 mode

pub fn oc4pe(&self) -> OC4PE_R[src]

Bit 11 - Output compare 4 preload enable

pub fn oc4fe(&self) -> OC4FE_R[src]

Bit 10 - Output compare 4 fast enable

pub fn cc4s(&self) -> CC4S_R[src]

Bits 8:9 - Capture/Compare 4 selection

pub fn oc3ce(&self) -> OC3CE_R[src]

Bit 7 - Output compare 3 clear enable

pub fn oc3m(&self) -> OC3M_R[src]

Bits 4:6 - Output compare 3 mode

pub fn oc3pe(&self) -> OC3PE_R[src]

Bit 3 - Output compare 3 preload enable

pub fn oc3fe(&self) -> OC3FE_R[src]

Bit 2 - Output compare 3 fast enable

pub fn cc3s(&self) -> CC3S_R[src]

Bits 0:1 - Capture/Compare 3 selection

pub fn oc4m_bit3(&self) -> OC4M_BIT3_R[src]

Bit 24 - Output Compare 2 mode - bit 3

pub fn oc3m_bit3(&self) -> OC3M_BIT3_R[src]

Bit 16 - Output Compare 1 mode - bit 3

impl R<u32, Reg<u32, _CCMR2_INPUT>>[src]

pub fn ic4f(&self) -> IC4F_R[src]

Bits 12:15 - Input capture 4 filter

pub fn ic4psc(&self) -> IC4PSC_R[src]

Bits 10:11 - Input capture 4 prescaler

pub fn cc4s(&self) -> CC4S_R[src]

Bits 8:9 - Capture/Compare 4 selection

pub fn ic3f(&self) -> IC3F_R[src]

Bits 4:7 - Input capture 3 filter

pub fn ic3psc(&self) -> IC3PSC_R[src]

Bits 2:3 - Input capture 3 prescaler

pub fn cc3s(&self) -> CC3S_R[src]

Bits 0:1 - Capture/Compare 3 selection

impl R<u32, Reg<u32, _CCER>>[src]

pub fn cc4np(&self) -> CC4NP_R[src]

Bit 15 - Capture/Compare 4 output Polarity

pub fn cc4p(&self) -> CC4P_R[src]

Bit 13 - Capture/Compare 3 output Polarity

pub fn cc4e(&self) -> CC4E_R[src]

Bit 12 - Capture/Compare 4 output enable

pub fn cc3np(&self) -> CC3NP_R[src]

Bit 11 - Capture/Compare 3 output Polarity

pub fn cc3p(&self) -> CC3P_R[src]

Bit 9 - Capture/Compare 3 output Polarity

pub fn cc3e(&self) -> CC3E_R[src]

Bit 8 - Capture/Compare 3 output enable

pub fn cc2np(&self) -> CC2NP_R[src]

Bit 7 - Capture/Compare 2 output Polarity

pub fn cc2p(&self) -> CC2P_R[src]

Bit 5 - Capture/Compare 2 output Polarity

pub fn cc2e(&self) -> CC2E_R[src]

Bit 4 - Capture/Compare 2 output enable

pub fn cc1np(&self) -> CC1NP_R[src]

Bit 3 - Capture/Compare 1 output Polarity

pub fn cc1p(&self) -> CC1P_R[src]

Bit 1 - Capture/Compare 1 output Polarity

pub fn cc1e(&self) -> CC1E_R[src]

Bit 0 - Capture/Compare 1 output enable

impl R<u32, Reg<u32, _CNT>>[src]

pub fn cnt_h(&self) -> CNT_H_R[src]

Bits 16:30 - Most significant part counter value (on TIM2 and TIM5)

pub fn cnt_l(&self) -> CNT_L_R[src]

Bits 0:15 - Least significant part of counter value

pub fn cnt_bit31(&self) -> CNT_BIT31_R[src]

Bit 31 - Most significant bit of counter value (on TIM2 and TIM5)

impl R<u32, Reg<u32, _PSC>>[src]

pub fn psc(&self) -> PSC_R[src]

Bits 0:15 - Prescaler value

impl R<u32, Reg<u32, _ARR>>[src]

pub fn arr_h(&self) -> ARR_H_R[src]

Bits 16:31 - High Auto-reload value (TIM2 only)

pub fn arr_l(&self) -> ARR_L_R[src]

Bits 0:15 - Low Auto-reload value

impl R<u32, Reg<u32, _CCR1>>[src]

pub fn ccr1_h(&self) -> CCR1_H_R[src]

Bits 16:31 - High Capture/Compare 1 value (TIM2 only)

pub fn ccr1_l(&self) -> CCR1_L_R[src]

Bits 0:15 - Low Capture/Compare 1 value

impl R<u32, Reg<u32, _CCR2>>[src]

pub fn ccr2_h(&self) -> CCR2_H_R[src]

Bits 16:31 - High Capture/Compare 2 value (TIM2 only)

pub fn ccr2_l(&self) -> CCR2_L_R[src]

Bits 0:15 - Low Capture/Compare 2 value

impl R<u32, Reg<u32, _CCR3>>[src]

pub fn ccr3_h(&self) -> CCR3_H_R[src]

Bits 16:31 - High Capture/Compare value (TIM2 only)

pub fn ccr3_l(&self) -> CCR3_L_R[src]

Bits 0:15 - Low Capture/Compare value

impl R<u32, Reg<u32, _CCR4>>[src]

pub fn ccr4_h(&self) -> CCR4_H_R[src]

Bits 16:31 - High Capture/Compare value (TIM2 only)

pub fn ccr4_l(&self) -> CCR4_L_R[src]

Bits 0:15 - Low Capture/Compare value

impl R<u32, Reg<u32, _DCR>>[src]

pub fn dbl(&self) -> DBL_R[src]

Bits 8:12 - DMA burst length

pub fn dba(&self) -> DBA_R[src]

Bits 0:4 - DMA base address

impl R<u32, Reg<u32, _DMAR>>[src]

pub fn dmab(&self) -> DMAB_R[src]

Bits 0:15 - Low Capture/Compare 2 value

impl R<u32, Reg<u32, _CR1>>[src]

pub fn arpe(&self) -> ARPE_R[src]

Bit 7 - Auto-reload preload enable

pub fn opm(&self) -> OPM_R[src]

Bit 3 - One-pulse mode

pub fn urs(&self) -> URS_R[src]

Bit 2 - Update request source

pub fn udis(&self) -> UDIS_R[src]

Bit 1 - Update disable

pub fn cen(&self) -> CEN_R[src]

Bit 0 - Counter enable

pub fn uifrema(&self) -> UIFREMA_R[src]

Bit 11 - UIF status bit remapping

impl R<u32, Reg<u32, _CR2>>[src]

pub fn mms(&self) -> MMS_R[src]

Bits 4:6 - Master mode selection

impl R<u32, Reg<u32, _DIER>>[src]

pub fn ude(&self) -> UDE_R[src]

Bit 8 - Update DMA request enable

pub fn uie(&self) -> UIE_R[src]

Bit 0 - Update interrupt enable

impl R<u32, Reg<u32, _SR>>[src]

pub fn uif(&self) -> UIF_R[src]

Bit 0 - Update interrupt flag

impl R<u32, Reg<u32, _CNT>>[src]

pub fn cnt_bit0(&self) -> CNT_BIT0_R[src]

Bits 0:15 - CNT

pub fn uifcpy(&self) -> UIFCPY_R[src]

Bit 31 - UIFCPY or Res

impl R<u32, Reg<u32, _PSC>>[src]

pub fn psc(&self) -> PSC_R[src]

Bits 0:15 - Prescaler value

impl R<u32, Reg<u32, _ARR>>[src]

pub fn arr_bit0(&self) -> ARR_BIT0_R[src]

Bits 0:15 - ARR_bit0

impl R<u32, Reg<u32, _CR1>>[src]

pub fn arpe(&self) -> ARPE_R[src]

Bit 7 - Auto-reload preload enable

pub fn opm(&self) -> OPM_R[src]

Bit 3 - One-pulse mode

pub fn urs(&self) -> URS_R[src]

Bit 2 - Update request source

pub fn udis(&self) -> UDIS_R[src]

Bit 1 - Update disable

pub fn cen(&self) -> CEN_R[src]

Bit 0 - Counter enable

pub fn uifrema(&self) -> UIFREMA_R[src]

Bit 11 - UIF status bit remapping

impl R<u32, Reg<u32, _CR2>>[src]

pub fn mms(&self) -> MMS_R[src]

Bits 4:6 - Master mode selection

impl R<u32, Reg<u32, _DIER>>[src]

pub fn ude(&self) -> UDE_R[src]

Bit 8 - Update DMA request enable

pub fn uie(&self) -> UIE_R[src]

Bit 0 - Update interrupt enable

impl R<u32, Reg<u32, _SR>>[src]

pub fn uif(&self) -> UIF_R[src]

Bit 0 - Update interrupt flag

impl R<u32, Reg<u32, _CNT>>[src]

pub fn cnt_bit0(&self) -> CNT_BIT0_R[src]

Bits 0:15 - CNT

pub fn uifcpy(&self) -> UIFCPY_R[src]

Bit 31 - UIFCPY or Res

impl R<u32, Reg<u32, _PSC>>[src]

pub fn psc(&self) -> PSC_R[src]

Bits 0:15 - Prescaler value

impl R<u32, Reg<u32, _ARR>>[src]

pub fn arr_bit0(&self) -> ARR_BIT0_R[src]

Bits 0:15 - ARR_bit0

impl R<u32, Reg<u32, _DAC_CR>>[src]

pub fn en1(&self) -> EN1_R[src]

Bit 0 - DAC channel1 enable This bit is set and cleared by software to enable/disable DAC channel1.

pub fn ten1(&self) -> TEN1_R[src]

Bit 1 - DAC channel1 trigger enable

pub fn tsel10(&self) -> TSEL10_R[src]

Bit 2 - TSEL10

pub fn tsel11(&self) -> TSEL11_R[src]

Bit 3 - TSEL11

pub fn tsel12(&self) -> TSEL12_R[src]

Bit 4 - TSEL12

pub fn tsel13(&self) -> TSEL13_R[src]

Bit 5 - TSEL13

pub fn wave1(&self) -> WAVE1_R[src]

Bits 6:7 - DAC channel1 noise/triangle wave generation enable These bits are set and cleared by software. Note: Only used if bit TEN1 = 1 (DAC channel1 trigger enabled).

pub fn mamp1(&self) -> MAMP1_R[src]

Bits 8:11 - DAC channel1 mask/amplitude selector These bits are written by software to select mask in wave generation mode or amplitude in triangle generation mode. = 1011: Unmask bits[11:0] of LFSR/ triangle amplitude equal to 4095

pub fn dmaen1(&self) -> DMAEN1_R[src]

Bit 12 - DAC channel1 DMA enable This bit is set and cleared by software.

pub fn dmaudrie1(&self) -> DMAUDRIE1_R[src]

Bit 13 - DAC channel1 DMA Underrun Interrupt enable This bit is set and cleared by software.

pub fn cen1(&self) -> CEN1_R[src]

Bit 14 - DAC Channel 1 calibration enable This bit is set and cleared by software to enable/disable DAC channel 1 calibration, it can be written only if bit EN1=0 into DAC_CR (the calibration mode can be entered/exit only when the DAC channel is disabled) Otherwise, the write operation is ignored.

pub fn hfsel(&self) -> HFSEL_R[src]

Bit 15 - HFSEL

pub fn en2(&self) -> EN2_R[src]

Bit 16 - DAC channel2 enable This bit is set and cleared by software to enable/disable DAC channel2.

pub fn ten2(&self) -> TEN2_R[src]

Bit 17 - DAC channel2 trigger enable

pub fn tsel20(&self) -> TSEL20_R[src]

Bit 18 - TSEL20

pub fn tsel21(&self) -> TSEL21_R[src]

Bit 19 - TSEL21

pub fn tsel22(&self) -> TSEL22_R[src]

Bit 20 - TSEL22

pub fn tsel23(&self) -> TSEL23_R[src]

Bit 21 - TSEL23

pub fn wave2(&self) -> WAVE2_R[src]

Bits 22:23 - DAC channel2 noise/triangle wave generation enable These bits are set/reset by software. 1x: Triangle wave generation enabled Note: Only used if bit TEN2 = 1 (DAC channel2 trigger enabled)

pub fn mamp2(&self) -> MAMP2_R[src]

Bits 24:27 - DAC channel2 mask/amplitude selector These bits are written by software to select mask in wave generation mode or amplitude in triangle generation mode. = 1011: Unmask bits[11:0] of LFSR/ triangle amplitude equal to 4095

pub fn dmaen2(&self) -> DMAEN2_R[src]

Bit 28 - DAC channel2 DMA enable This bit is set and cleared by software.

pub fn dmaudrie2(&self) -> DMAUDRIE2_R[src]

Bit 29 - DAC channel2 DMA underrun interrupt enable This bit is set and cleared by software.

pub fn cen2(&self) -> CEN2_R[src]

Bit 30 - DAC Channel 2 calibration enable This bit is set and cleared by software to enable/disable DAC channel 2 calibration, it can be written only if bit EN2=0 into DAC_CR (the calibration mode can be entered/exit only when the DAC channel is disabled) Otherwise, the write operation is ignored.

impl R<u32, Reg<u32, _DAC_DHR12R1>>[src]

pub fn dacc1dhr(&self) -> DACC1DHR_R[src]

Bits 0:11 - DAC channel1 12-bit right-aligned data These bits are written by software which specifies 12-bit data for DAC channel1.

impl R<u32, Reg<u32, _DAC_DHR12L1>>[src]

pub fn dacc1dhr(&self) -> DACC1DHR_R[src]

Bits 4:15 - DAC channel1 12-bit left-aligned data These bits are written by software which specifies 12-bit data for DAC channel1.

impl R<u32, Reg<u32, _DAC_DHR8R1>>[src]

pub fn dacc1dhr(&self) -> DACC1DHR_R[src]

Bits 0:7 - DAC channel1 8-bit right-aligned data These bits are written by software which specifies 8-bit data for DAC channel1.

impl R<u32, Reg<u32, _DAC_DHR12R2>>[src]

pub fn dacc2dhr(&self) -> DACC2DHR_R[src]

Bits 0:11 - DAC channel2 12-bit right-aligned data These bits are written by software which specifies 12-bit data for DAC channel2.

impl R<u32, Reg<u32, _DAC_DHR12L2>>[src]

pub fn dacc2dhr(&self) -> DACC2DHR_R[src]

Bits 4:15 - DAC channel2 12-bit left-aligned data These bits are written by software which specify 12-bit data for DAC channel2.

impl R<u32, Reg<u32, _DAC_DHR8R2>>[src]

pub fn dacc2dhr(&self) -> DACC2DHR_R[src]

Bits 0:7 - DAC channel2 8-bit right-aligned data These bits are written by software which specifies 8-bit data for DAC channel2.

impl R<u32, Reg<u32, _DAC_DHR12RD>>[src]

pub fn dacc1dhr(&self) -> DACC1DHR_R[src]

Bits 0:11 - DAC channel1 12-bit right-aligned data These bits are written by software which specifies 12-bit data for DAC channel1.

pub fn dacc2dhr(&self) -> DACC2DHR_R[src]

Bits 16:27 - DAC channel2 12-bit right-aligned data These bits are written by software which specifies 12-bit data for DAC channel2.

impl R<u32, Reg<u32, _DAC_DHR12LD>>[src]

pub fn dacc1dhr(&self) -> DACC1DHR_R[src]

Bits 4:15 - DAC channel1 12-bit left-aligned data These bits are written by software which specifies 12-bit data for DAC channel1.

pub fn dacc2dhr(&self) -> DACC2DHR_R[src]

Bits 20:31 - DAC channel2 12-bit left-aligned data These bits are written by software which specifies 12-bit data for DAC channel2.

impl R<u32, Reg<u32, _DAC_DHR8RD>>[src]

pub fn dacc1dhr(&self) -> DACC1DHR_R[src]

Bits 0:7 - DAC channel1 8-bit right-aligned data These bits are written by software which specifies 8-bit data for DAC channel1.

pub fn dacc2dhr(&self) -> DACC2DHR_R[src]

Bits 8:15 - DAC channel2 8-bit right-aligned data These bits are written by software which specifies 8-bit data for DAC channel2.

impl R<u32, Reg<u32, _DAC_DOR1>>[src]

pub fn dacc1dor(&self) -> DACC1DOR_R[src]

Bits 0:11 - DAC channel1 data output These bits are read-only, they contain data output for DAC channel1.

impl R<u32, Reg<u32, _DAC_DOR2>>[src]

pub fn dacc2dor(&self) -> DACC2DOR_R[src]

Bits 0:11 - DAC channel2 data output These bits are read-only, they contain data output for DAC channel2.

impl R<u32, Reg<u32, _DAC_SR>>[src]

pub fn dmaudr1(&self) -> DMAUDR1_R[src]

Bit 13 - DAC channel1 DMA underrun flag This bit is set by hardware and cleared by software (by writing it to 1).

pub fn cal_flag1(&self) -> CAL_FLAG1_R[src]

Bit 14 - DAC Channel 1 calibration offset status This bit is set and cleared by hardware

pub fn bwst1(&self) -> BWST1_R[src]

Bit 15 - DAC Channel 1 busy writing sample time flag This bit is systematically set just after Sample & Hold mode enable and is set each time the software writes the register DAC_SHSR1, It is cleared by hardware when the write operation of DAC_SHSR1 is complete. (It takes about 3LSI periods of synchronization).

pub fn dmaudr2(&self) -> DMAUDR2_R[src]

Bit 29 - DAC channel2 DMA underrun flag This bit is set by hardware and cleared by software (by writing it to 1).

pub fn cal_flag2(&self) -> CAL_FLAG2_R[src]

Bit 30 - DAC Channel 2 calibration offset status This bit is set and cleared by hardware

pub fn bwst2(&self) -> BWST2_R[src]

Bit 31 - DAC Channel 2 busy writing sample time flag This bit is systematically set just after Sample & Hold mode enable and is set each time the software writes the register DAC_SHSR2, It is cleared by hardware when the write operation of DAC_SHSR2 is complete. (It takes about 3 LSI periods of synchronization).

impl R<u32, Reg<u32, _DAC_CCR>>[src]

pub fn otrim1(&self) -> OTRIM1_R[src]

Bits 0:4 - DAC Channel 1 offset trimming value

pub fn otrim2(&self) -> OTRIM2_R[src]

Bits 16:20 - DAC Channel 2 offset trimming value

impl R<u32, Reg<u32, _DAC_MCR>>[src]

pub fn mode1(&self) -> MODE1_R[src]

Bits 0:2 - DAC Channel 1 mode These bits can be written only when the DAC is disabled and not in the calibration mode (when bit EN1=0 and bit CEN1 =0 in the DAC_CR register). If EN1=1 or CEN1 =1 the write operation is ignored. They can be set and cleared by software to select the DAC Channel 1 mode: DAC Channel 1 in normal Mode DAC Channel 1 in sample & hold mode

pub fn mode2(&self) -> MODE2_R[src]

Bits 16:18 - DAC Channel 2 mode These bits can be written only when the DAC is disabled and not in the calibration mode (when bit EN2=0 and bit CEN2 =0 in the DAC_CR register). If EN2=1 or CEN2 =1 the write operation is ignored. They can be set and cleared by software to select the DAC Channel 2 mode: DAC Channel 2 in normal Mode DAC Channel 2 in sample & hold mode

impl R<u32, Reg<u32, _DAC_SHSR1>>[src]

pub fn tsample1(&self) -> TSAMPLE1_R[src]

Bits 0:9 - DAC Channel 1 sample Time (only valid in sample & hold mode) These bits can be written when the DAC channel1 is disabled or also during normal operation. in the latter case, the write can be done only when BWSTx of DAC_SR register is low, If BWSTx=1, the write operation is ignored.

impl R<u32, Reg<u32, _DAC_SHSR2>>[src]

pub fn tsample2(&self) -> TSAMPLE2_R[src]

Bits 0:9 - DAC Channel 2 sample Time (only valid in sample & hold mode) These bits can be written when the DAC channel2 is disabled or also during normal operation. in the latter case, the write can be done only when BWSTx of DAC_SR register is low, if BWSTx=1, the write operation is ignored.

impl R<u32, Reg<u32, _DAC_SHHR>>[src]

pub fn thold1(&self) -> THOLD1_R[src]

Bits 0:9 - DAC Channel 1 hold Time (only valid in sample & hold mode) Hold time= (THOLD[9:0]) x T LSI

pub fn thold2(&self) -> THOLD2_R[src]

Bits 16:25 - DAC Channel 2 hold time (only valid in sample & hold mode). Hold time= (THOLD[9:0]) x T LSI

impl R<u32, Reg<u32, _DAC_SHRR>>[src]

pub fn trefresh1(&self) -> TREFRESH1_R[src]

Bits 0:7 - DAC Channel 1 refresh Time (only valid in sample & hold mode) Refresh time= (TREFRESH[7:0]) x T LSI

pub fn trefresh2(&self) -> TREFRESH2_R[src]

Bits 16:23 - DAC Channel 2 refresh Time (only valid in sample & hold mode) Refresh time= (TREFRESH[7:0]) x T LSI

impl R<u32, Reg<u32, _OPAMP1_CSR>>[src]

pub fn opaen(&self) -> OPAEN_R[src]

Bit 0 - Operational amplifier Enable

pub fn opalpm(&self) -> OPALPM_R[src]

Bit 1 - Operational amplifier Low Power Mode

pub fn opamode(&self) -> OPAMODE_R[src]

Bits 2:3 - Operational amplifier PGA mode

pub fn pga_gain(&self) -> PGA_GAIN_R[src]

Bits 4:5 - Operational amplifier Programmable amplifier gain value

pub fn vm_sel(&self) -> VM_SEL_R[src]

Bits 8:9 - inverting input selection

pub fn vp_sel(&self) -> VP_SEL_R[src]

Bit 10 - non inverted input selection

pub fn calon(&self) -> CALON_R[src]

Bit 12 - calibration mode enable

pub fn calsel(&self) -> CALSEL_R[src]

Bit 13 - calibration selection

pub fn usertrim(&self) -> USERTRIM_R[src]

Bit 14 - User trimming enable

pub fn calout(&self) -> CALOUT_R[src]

Bit 15 - Operational amplifier calibration output

pub fn opa_range(&self) -> OPA_RANGE_R[src]

Bit 31 - Operational amplifier power supply range for stability

impl R<u32, Reg<u32, _OPAMP1_OTR>>[src]

pub fn trimoffsetn(&self) -> TRIMOFFSETN_R[src]

Bits 0:4 - Trim for NMOS differential pairs

pub fn trimoffsetp(&self) -> TRIMOFFSETP_R[src]

Bits 8:12 - Trim for PMOS differential pairs

impl R<u32, Reg<u32, _OPAMP1_LPOTR>>[src]

pub fn trimlpoffsetn(&self) -> TRIMLPOFFSETN_R[src]

Bits 0:4 - Trim for NMOS differential pairs

pub fn trimlpoffsetp(&self) -> TRIMLPOFFSETP_R[src]

Bits 8:12 - Trim for PMOS differential pairs

impl R<u32, Reg<u32, _OPAMP2_CRS>>[src]

pub fn opaen(&self) -> OPAEN_R[src]

Bit 0 - Operational amplifier Enable

pub fn opalpm(&self) -> OPALPM_R[src]

Bit 1 - Operational amplifier Low Power Mode

pub fn opamode(&self) -> OPAMODE_R[src]

Bits 2:3 - Operational amplifier PGA mode

pub fn pga_gain(&self) -> PGA_GAIN_R[src]

Bits 4:5 - Operational amplifier Programmable amplifier gain value

pub fn vm_sel(&self) -> VM_SEL_R[src]

Bits 8:9 - inverting input selection

pub fn vp_sel(&self) -> VP_SEL_R[src]

Bit 10 - non inverted input selection

pub fn calon(&self) -> CALON_R[src]

Bit 12 - calibration mode enable

pub fn calsel(&self) -> CALSEL_R[src]

Bit 13 - calibration selection

pub fn usertrim(&self) -> USERTRIM_R[src]

Bit 14 - User trimming enable

pub fn calout(&self) -> CALOUT_R[src]

Bit 15 - Operational amplifier calibration output

impl R<u32, Reg<u32, _OPAMP2_OTR>>[src]

pub fn trimoffsetn(&self) -> TRIMOFFSETN_R[src]

Bits 0:4 - Trim for NMOS differential pairs

pub fn trimoffsetp(&self) -> TRIMOFFSETP_R[src]

Bits 8:12 - Trim for PMOS differential pairs

impl R<u32, Reg<u32, _OPAMP2_LPOTR>>[src]

pub fn trimlpoffsetn(&self) -> TRIMLPOFFSETN_R[src]

Bits 0:4 - Trim for NMOS differential pairs

pub fn trimlpoffsetp(&self) -> TRIMLPOFFSETP_R[src]

Bits 8:12 - Trim for PMOS differential pairs

impl R<u32, Reg<u32, _CR>>[src]

pub fn npblb(&self) -> NPBLB_R[src]

Bits 20:23 - Number of padding bytes in last block of payload

pub fn keysize(&self) -> KEYSIZE_R[src]

Bit 18 - Key size selection

pub fn chmod2(&self) -> CHMOD2_R[src]

Bit 16 - AES chaining mode Bit2

pub fn gcmph(&self) -> GCMPH_R[src]

Bits 13:14 - Used only for GCM, CCM and GMAC algorithms and has no effect when other algorithms are selected

pub fn dmaouten(&self) -> DMAOUTEN_R[src]

Bit 12 - Enable DMA management of data output phase

pub fn dmainen(&self) -> DMAINEN_R[src]

Bit 11 - Enable DMA management of data input phase

pub fn errie(&self) -> ERRIE_R[src]

Bit 10 - Error interrupt enable

pub fn ccfie(&self) -> CCFIE_R[src]

Bit 9 - CCF flag interrupt enable

pub fn errc(&self) -> ERRC_R[src]

Bit 8 - Error clear

pub fn ccfc(&self) -> CCFC_R[src]

Bit 7 - Computation Complete Flag Clear

pub fn chmod(&self) -> CHMOD_R[src]

Bits 5:6 - AES chaining mode selection Bit1 Bit0

pub fn mode(&self) -> MODE_R[src]

Bits 3:4 - AES operating mode

pub fn datatype(&self) -> DATATYPE_R[src]

Bits 1:2 - Data type selection (for data in and data out to/from the cryptographic block)

pub fn en(&self) -> EN_R[src]

Bit 0 - AES enable

impl R<u32, Reg<u32, _SR>>[src]

pub fn busy(&self) -> BUSY_R[src]

Bit 3 - Busy flag

pub fn wrerr(&self) -> WRERR_R[src]

Bit 2 - Write error flag

pub fn rderr(&self) -> RDERR_R[src]

Bit 1 - Read error flag

pub fn ccf(&self) -> CCF_R[src]

Bit 0 - Computation complete flag

impl R<u32, Reg<u32, _DINR>>[src]

pub fn din(&self) -> DIN_R[src]

Bits 0:31 - Data Input Register

impl R<u32, Reg<u32, _DOUTR>>[src]

pub fn dout(&self) -> DOUT_R[src]

Bits 0:31 - Data output register

impl R<u32, Reg<u32, _IVR0>>[src]

pub fn ivi(&self) -> IVI_R[src]

Bits 0:31 - initialization vector register (LSB IVR [31:0])

impl R<u32, Reg<u32, _IVR1>>[src]

pub fn ivi(&self) -> IVI_R[src]

Bits 0:31 - Initialization Vector Register (IVR [63:32])

impl R<u32, Reg<u32, _IVR2>>[src]

pub fn ivi(&self) -> IVI_R[src]

Bits 0:31 - Initialization Vector Register (IVR [95:64])

impl R<u32, Reg<u32, _IVR3>>[src]

pub fn ivi(&self) -> IVI_R[src]

Bits 0:31 - Initialization Vector Register (MSB IVR [127:96])

impl R<u32, Reg<u32, _SUSP0R>>[src]

pub fn aes_susp0r(&self) -> AES_SUSP0R_R[src]

Bits 0:31 - AES suspend register 0

impl R<u32, Reg<u32, _SUSP1R>>[src]

pub fn aes_susp1r(&self) -> AES_SUSP1R_R[src]

Bits 0:31 - AES suspend register 1

impl R<u32, Reg<u32, _SUSP2R>>[src]

pub fn aes_susp2r(&self) -> AES_SUSP2R_R[src]

Bits 0:31 - AES suspend register 2

impl R<u32, Reg<u32, _SUSP3R>>[src]

pub fn aes_susp3r(&self) -> AES_SUSP3R_R[src]

Bits 0:31 - AES suspend register 3

impl R<u32, Reg<u32, _SUSP4R>>[src]

pub fn aes_susp4r(&self) -> AES_SUSP4R_R[src]

Bits 0:31 - AES suspend register 4

impl R<u32, Reg<u32, _SUSP5R>>[src]

pub fn aes_susp5r(&self) -> AES_SUSP5R_R[src]

Bits 0:31 - AES suspend register 5

impl R<u32, Reg<u32, _SUSP6R>>[src]

pub fn aes_susp6r(&self) -> AES_SUSP6R_R[src]

Bits 0:31 - AES suspend register 6

impl R<u32, Reg<u32, _SUSP7R>>[src]

pub fn aes_susp7r(&self) -> AES_SUSP7R_R[src]

Bits 0:31 - AES suspend register 7

impl R<u32, Reg<u32, _PKA_CR>>[src]

pub fn en(&self) -> EN_R[src]

Bit 0 - PKA Enable

pub fn start(&self) -> START_R[src]

Bit 1 - Start the operation

pub fn mode(&self) -> MODE_R[src]

Bits 8:13 - PKA operation code

pub fn procendie(&self) -> PROCENDIE_R[src]

Bit 17 - End of operation interrupt enable

pub fn ramerrie(&self) -> RAMERRIE_R[src]

Bit 19 - RAM error interrupt enable

pub fn addrerrie(&self) -> ADDRERRIE_R[src]

Bit 20 - Address error interrupt enable

impl R<u32, Reg<u32, _PKA_SR>>[src]

pub fn busy(&self) -> BUSY_R[src]

Bit 16 - PKA operation in progress

pub fn procendf(&self) -> PROCENDF_R[src]

Bit 17 - PKA end of operation flag

pub fn ramerrf(&self) -> RAMERRF_R[src]

Bit 19 - PKA ram error flag

pub fn addrerrf(&self) -> ADDRERRF_R[src]

Bit 20 - address er flag

impl R<u32, Reg<u32, _CR>>[src]

pub fn enc(&self) -> ENC_R[src]

Bit 0 - Encryption mode bit

impl R<u32, Reg<u32, _R1CFGR>>[src]

pub fn reg_en(&self) -> REG_EN_R[src]

Bit 0 - region on-the-fly decryption enable

pub fn configlock(&self) -> CONFIGLOCK_R[src]

Bit 1 - region config lock

pub fn keylock(&self) -> KEYLOCK_R[src]

Bit 2 - region key lock

pub fn mode(&self) -> MODE_R[src]

Bits 4:5 - operating mode

pub fn keycrc(&self) -> KEYCRC_R[src]

Bits 8:15 - region key 8-bit CRC

pub fn regx_version(&self) -> REGX_VERSION_R[src]

Bits 16:31 - region firmware version

impl R<u32, Reg<u32, _R2CFGR>>[src]

pub fn reg_en(&self) -> REG_EN_R[src]

Bit 0 - region on-the-fly decryption enable

pub fn configlock(&self) -> CONFIGLOCK_R[src]

Bit 1 - region config lock

pub fn keylock(&self) -> KEYLOCK_R[src]

Bit 2 - region key lock

pub fn mode(&self) -> MODE_R[src]

Bits 4:5 - operating mode

pub fn keycrc(&self) -> KEYCRC_R[src]

Bits 8:15 - region key 8-bit CRC

pub fn regx_version(&self) -> REGX_VERSION_R[src]

Bits 16:31 - region firmware version

impl R<u32, Reg<u32, _R3CFGR>>[src]

pub fn reg_en(&self) -> REG_EN_R[src]

Bit 0 - region on-the-fly decryption enable

pub fn configlock(&self) -> CONFIGLOCK_R[src]

Bit 1 - region config lock

pub fn keylock(&self) -> KEYLOCK_R[src]

Bit 2 - region key lock

pub fn mode(&self) -> MODE_R[src]

Bits 4:5 - operating mode

pub fn keycrc(&self) -> KEYCRC_R[src]

Bits 8:15 - region key 8-bit CRC

pub fn regx_version(&self) -> REGX_VERSION_R[src]

Bits 16:31 - region firmware version

impl R<u32, Reg<u32, _R4CFGR>>[src]

pub fn reg_en(&self) -> REG_EN_R[src]

Bit 0 - region on-the-fly decryption enable

pub fn configlock(&self) -> CONFIGLOCK_R[src]

Bit 1 - region config lock

pub fn keylock(&self) -> KEYLOCK_R[src]

Bit 2 - region key lock

pub fn mode(&self) -> MODE_R[src]

Bits 4:5 - operating mode

pub fn keycrc(&self) -> KEYCRC_R[src]

Bits 8:15 - region key 8-bit CRC

pub fn regx_version(&self) -> REGX_VERSION_R[src]

Bits 16:31 - region firmware version

impl R<u32, Reg<u32, _R1STARTADDR>>[src]

pub fn regx_start_addr(&self) -> REGX_START_ADDR_R[src]

Bits 0:31 - Region AXI start address

impl R<u32, Reg<u32, _R2STARTADDR>>[src]

pub fn regx_start_addr(&self) -> REGX_START_ADDR_R[src]

Bits 0:31 - Region AXI start address

impl R<u32, Reg<u32, _R3STARTADDR>>[src]

pub fn regx_start_addr(&self) -> REGX_START_ADDR_R[src]

Bits 0:31 - Region AXI start address

impl R<u32, Reg<u32, _R4STARTADDR>>[src]

pub fn regx_start_addr(&self) -> REGX_START_ADDR_R[src]

Bits 0:31 - Region AXI start address

impl R<u32, Reg<u32, _R1ENDADDR>>[src]

pub fn regx_end_addr(&self) -> REGX_END_ADDR_R[src]

Bits 0:31 - Region AXI end address

impl R<u32, Reg<u32, _R2ENDADDR>>[src]

pub fn regx_end_addr(&self) -> REGX_END_ADDR_R[src]

Bits 0:31 - Region AXI end address

impl R<u32, Reg<u32, _R3ENDADDR>>[src]

pub fn regx_end_addr(&self) -> REGX_END_ADDR_R[src]

Bits 0:31 - Region AXI end address

impl R<u32, Reg<u32, _R4ENDADDR>>[src]

pub fn regx_end_addr(&self) -> REGX_END_ADDR_R[src]

Bits 0:31 - Region AXI end address

impl R<u32, Reg<u32, _R1NONCER0>>[src]

pub fn regx_nonce(&self) -> REGX_NONCE_R[src]

Bits 0:31 - REGx_NONCE

impl R<u32, Reg<u32, _R2NONCER0>>[src]

pub fn regx_nonce(&self) -> REGX_NONCE_R[src]

Bits 0:31 - REGx_NONCE

impl R<u32, Reg<u32, _R3NONCER0>>[src]

pub fn regx_nonce(&self) -> REGX_NONCE_R[src]

Bits 0:31 - REGx_NONCE

impl R<u32, Reg<u32, _R4NONCER0>>[src]

pub fn regx_nonce(&self) -> REGX_NONCE_R[src]

Bits 0:31 - REGx_NONCE

impl R<u32, Reg<u32, _R1NONCER1>>[src]

pub fn regx_nonce(&self) -> REGX_NONCE_R[src]

Bits 0:31 - Region nonce

impl R<u32, Reg<u32, _R2NONCER1>>[src]

pub fn regx_nonce(&self) -> REGX_NONCE_R[src]

Bits 0:31 - Region nonce, bits [63:32]REGx_NONCE[63:32]

impl R<u32, Reg<u32, _R3NONCER1>>[src]

pub fn regx_nonce(&self) -> REGX_NONCE_R[src]

Bits 0:31 - REGx_NONCE

impl R<u32, Reg<u32, _R4NONCER1>>[src]

pub fn regx_nonce(&self) -> REGX_NONCE_R[src]

Bits 0:31 - REGx_NONCE

impl R<u32, Reg<u32, _ISR>>[src]

pub fn seif(&self) -> SEIF_R[src]

Bit 0 - Security Error Interrupt Flag status

pub fn xoneif(&self) -> XONEIF_R[src]

Bit 1 - Execute-only execute-Never Error Interrupt Flag status

pub fn keif(&self) -> KEIF_R[src]

Bit 2 - Key Error Interrupt Flag status

impl R<u32, Reg<u32, _IER>>[src]

pub fn seie(&self) -> SEIE_R[src]

Bit 0 - Security Error Interrupt Enable

pub fn xoneie(&self) -> XONEIE_R[src]

Bit 1 - XONEIE

pub fn keie(&self) -> KEIE_R[src]

Bit 2 - KEIE

impl R<u32, Reg<u32, _CR1>>[src]

pub fn ckd(&self) -> CKD_R[src]

Bits 8:9 - Clock division

pub fn arpe(&self) -> ARPE_R[src]

Bit 7 - Auto-reload preload enable

pub fn cms(&self) -> CMS_R[src]

Bits 5:6 - Center-aligned mode selection

pub fn dir(&self) -> DIR_R[src]

Bit 4 - Direction

pub fn opm(&self) -> OPM_R[src]

Bit 3 - One-pulse mode

pub fn urs(&self) -> URS_R[src]

Bit 2 - Update request source

pub fn udis(&self) -> UDIS_R[src]

Bit 1 - Update disable

pub fn cen(&self) -> CEN_R[src]

Bit 0 - Counter enable

pub fn uifremap(&self) -> UIFREMAP_R[src]

Bit 11 - UIF status bit remapping

impl R<u32, Reg<u32, _CR2>>[src]

pub fn ois4(&self) -> OIS4_R[src]

Bit 14 - Output Idle state 4

pub fn ois3n(&self) -> OIS3N_R[src]

Bit 13 - Output Idle state 3

pub fn ois3(&self) -> OIS3_R[src]

Bit 12 - Output Idle state 3

pub fn ois2n(&self) -> OIS2N_R[src]

Bit 11 - Output Idle state 2

pub fn ois2(&self) -> OIS2_R[src]

Bit 10 - Output Idle state 2

pub fn ois1n(&self) -> OIS1N_R[src]

Bit 9 - Output Idle state 1

pub fn ois1(&self) -> OIS1_R[src]

Bit 8 - Output Idle state 1

pub fn ti1s(&self) -> TI1S_R[src]

Bit 7 - TI1 selection

pub fn mms(&self) -> MMS_R[src]

Bits 4:6 - Master mode selection

pub fn ccds(&self) -> CCDS_R[src]

Bit 3 - Capture/compare DMA selection

pub fn ccus(&self) -> CCUS_R[src]

Bit 2 - Capture/compare control update selection

pub fn ccpc(&self) -> CCPC_R[src]

Bit 0 - Capture/compare preloaded control

pub fn ois5(&self) -> OIS5_R[src]

Bit 15 - Output Idle state 5 (OC5 output)

pub fn ois6(&self) -> OIS6_R[src]

Bit 16 - Output Idle state 6

pub fn mms2(&self) -> MMS2_R[src]

Bits 20:23 - Master mode selection 2

impl R<u32, Reg<u32, _SMCR>>[src]

pub fn etp(&self) -> ETP_R[src]

Bit 15 - External trigger polarity

pub fn ece(&self) -> ECE_R[src]

Bit 14 - External clock enable

pub fn etps(&self) -> ETPS_R[src]

Bits 12:13 - External trigger prescaler

pub fn etf(&self) -> ETF_R[src]

Bits 8:11 - External trigger filter

pub fn msm(&self) -> MSM_R[src]

Bit 7 - Master/Slave mode

pub fn ts(&self) -> TS_R[src]

Bits 4:6 - Trigger selection

pub fn sms(&self) -> SMS_R[src]

Bits 0:2 - Slave mode selection

pub fn sms_bit3(&self) -> SMS_BIT3_R[src]

Bit 16 - Slave mode selection - bit 3

impl R<u32, Reg<u32, _DIER>>[src]

pub fn tde(&self) -> TDE_R[src]

Bit 14 - Trigger DMA request enable

pub fn comde(&self) -> COMDE_R[src]

Bit 13 - COM DMA request enable

pub fn cc4de(&self) -> CC4DE_R[src]

Bit 12 - Capture/Compare 4 DMA request enable

pub fn cc3de(&self) -> CC3DE_R[src]

Bit 11 - Capture/Compare 3 DMA request enable

pub fn cc2de(&self) -> CC2DE_R[src]

Bit 10 - Capture/Compare 2 DMA request enable

pub fn cc1de(&self) -> CC1DE_R[src]

Bit 9 - Capture/Compare 1 DMA request enable

pub fn ude(&self) -> UDE_R[src]

Bit 8 - Update DMA request enable

pub fn tie(&self) -> TIE_R[src]

Bit 6 - Trigger interrupt enable

pub fn cc4ie(&self) -> CC4IE_R[src]

Bit 4 - Capture/Compare 4 interrupt enable

pub fn cc3ie(&self) -> CC3IE_R[src]

Bit 3 - Capture/Compare 3 interrupt enable

pub fn cc2ie(&self) -> CC2IE_R[src]

Bit 2 - Capture/Compare 2 interrupt enable

pub fn cc1ie(&self) -> CC1IE_R[src]

Bit 1 - Capture/Compare 1 interrupt enable

pub fn uie(&self) -> UIE_R[src]

Bit 0 - Update interrupt enable

pub fn bie(&self) -> BIE_R[src]

Bit 7 - Break interrupt enable

pub fn comie(&self) -> COMIE_R[src]

Bit 5 - COM interrupt enable

impl R<u32, Reg<u32, _SR>>[src]

pub fn cc4of(&self) -> CC4OF_R[src]

Bit 12 - Capture/Compare 4 overcapture flag

pub fn cc3of(&self) -> CC3OF_R[src]

Bit 11 - Capture/Compare 3 overcapture flag

pub fn cc2of(&self) -> CC2OF_R[src]

Bit 10 - Capture/compare 2 overcapture flag

pub fn cc1of(&self) -> CC1OF_R[src]

Bit 9 - Capture/Compare 1 overcapture flag

pub fn bif(&self) -> BIF_R[src]

Bit 7 - Break interrupt flag

pub fn tif(&self) -> TIF_R[src]

Bit 6 - Trigger interrupt flag

pub fn comif(&self) -> COMIF_R[src]

Bit 5 - COM interrupt flag

pub fn cc4if(&self) -> CC4IF_R[src]

Bit 4 - Capture/Compare 4 interrupt flag

pub fn cc3if(&self) -> CC3IF_R[src]

Bit 3 - Capture/Compare 3 interrupt flag

pub fn cc2if(&self) -> CC2IF_R[src]

Bit 2 - Capture/Compare 2 interrupt flag

pub fn cc1if(&self) -> CC1IF_R[src]

Bit 1 - Capture/compare 1 interrupt flag

pub fn uif(&self) -> UIF_R[src]

Bit 0 - Update interrupt flag

pub fn sbif(&self) -> SBIF_R[src]

Bit 13 - System Break interrupt flag

pub fn cc5if(&self) -> CC5IF_R[src]

Bit 16 - Compare 5 interrupt flag

pub fn cc6if(&self) -> CC6IF_R[src]

Bit 17 - Compare 6 interrupt flag

impl R<u32, Reg<u32, _CCMR1_OUTPUT>>[src]

pub fn oc2ce(&self) -> OC2CE_R[src]

Bit 15 - Output Compare 2 clear enable

pub fn oc2m(&self) -> OC2M_R[src]

Bits 12:14 - Output Compare 2 mode

pub fn oc2pe(&self) -> OC2PE_R[src]

Bit 11 - Output Compare 2 preload enable

pub fn oc2fe(&self) -> OC2FE_R[src]

Bit 10 - Output Compare 2 fast enable

pub fn cc2s(&self) -> CC2S_R[src]

Bits 8:9 - Capture/Compare 2 selection

pub fn oc1ce(&self) -> OC1CE_R[src]

Bit 7 - Output Compare 1 clear enable

pub fn oc1m(&self) -> OC1M_R[src]

Bits 4:6 - Output Compare 1 mode

pub fn oc1pe(&self) -> OC1PE_R[src]

Bit 3 - Output Compare 1 preload enable

pub fn oc1fe(&self) -> OC1FE_R[src]

Bit 2 - Output Compare 1 fast enable

pub fn cc1s(&self) -> CC1S_R[src]

Bits 0:1 - Capture/Compare 1 selection

pub fn oc1m_bit3(&self) -> OC1M_BIT3_R[src]

Bit 16 - Output Compare 1 mode - bit 3

pub fn oc2m_bit3(&self) -> OC2M_BIT3_R[src]

Bit 24 - Output Compare 2 mode - bit 3

impl R<u32, Reg<u32, _CCMR1_INPUT>>[src]

pub fn ic2f(&self) -> IC2F_R[src]

Bits 12:15 - Input capture 2 filter

pub fn ic2pcs(&self) -> IC2PCS_R[src]

Bits 10:11 - Input capture 2 prescaler

pub fn cc2s(&self) -> CC2S_R[src]

Bits 8:9 - Capture/Compare 2 selection

pub fn ic1f(&self) -> IC1F_R[src]

Bits 4:7 - Input capture 1 filter

pub fn icpcs(&self) -> ICPCS_R[src]

Bits 2:3 - Input capture 1 prescaler

pub fn cc1s(&self) -> CC1S_R[src]

Bits 0:1 - Capture/Compare 1 selection

impl R<u32, Reg<u32, _CCMR2_OUTPUT>>[src]

pub fn oc4ce(&self) -> OC4CE_R[src]

Bit 15 - Output compare 4 clear enable

pub fn oc4m(&self) -> OC4M_R[src]

Bits 12:14 - Output compare 4 mode

pub fn oc4pe(&self) -> OC4PE_R[src]

Bit 11 - Output compare 4 preload enable

pub fn oc4fe(&self) -> OC4FE_R[src]

Bit 10 - Output compare 4 fast enable

pub fn cc4s(&self) -> CC4S_R[src]

Bits 8:9 - Capture/Compare 4 selection

pub fn oc3ce(&self) -> OC3CE_R[src]

Bit 7 - Output compare 3 clear enable

pub fn oc3m(&self) -> OC3M_R[src]

Bits 4:6 - Output compare 3 mode

pub fn oc3pe(&self) -> OC3PE_R[src]

Bit 3 - Output compare 3 preload enable

pub fn oc3fe(&self) -> OC3FE_R[src]

Bit 2 - Output compare 3 fast enable

pub fn cc3s(&self) -> CC3S_R[src]

Bits 0:1 - Capture/Compare 3 selection

pub fn oc3m_bit3(&self) -> OC3M_BIT3_R[src]

Bit 16 - Output Compare 3 mode - bit 3

pub fn oc4m_bit3(&self) -> OC4M_BIT3_R[src]

Bit 24 - Output Compare 4 mode - bit 3

impl R<u32, Reg<u32, _CCMR2_INPUT>>[src]

pub fn ic4f(&self) -> IC4F_R[src]

Bits 12:15 - Input capture 4 filter

pub fn ic4psc(&self) -> IC4PSC_R[src]

Bits 10:11 - Input capture 4 prescaler

pub fn cc4s(&self) -> CC4S_R[src]

Bits 8:9 - Capture/Compare 4 selection

pub fn ic3f(&self) -> IC3F_R[src]

Bits 4:7 - Input capture 3 filter

pub fn ic3psc(&self) -> IC3PSC_R[src]

Bits 2:3 - Input capture 3 prescaler

pub fn cc3s(&self) -> CC3S_R[src]

Bits 0:1 - Capture/compare 3 selection

impl R<u32, Reg<u32, _CCER>>[src]

pub fn cc4p(&self) -> CC4P_R[src]

Bit 13 - Capture/Compare 3 output Polarity

pub fn cc4e(&self) -> CC4E_R[src]

Bit 12 - Capture/Compare 4 output enable

pub fn cc3np(&self) -> CC3NP_R[src]

Bit 11 - Capture/Compare 3 output Polarity

pub fn cc3ne(&self) -> CC3NE_R[src]

Bit 10 - Capture/Compare 3 complementary output enable

pub fn cc3p(&self) -> CC3P_R[src]

Bit 9 - Capture/Compare 3 output Polarity

pub fn cc3e(&self) -> CC3E_R[src]

Bit 8 - Capture/Compare 3 output enable

pub fn cc2np(&self) -> CC2NP_R[src]

Bit 7 - Capture/Compare 2 output Polarity

pub fn cc2ne(&self) -> CC2NE_R[src]

Bit 6 - Capture/Compare 2 complementary output enable

pub fn cc2p(&self) -> CC2P_R[src]

Bit 5 - Capture/Compare 2 output Polarity

pub fn cc2e(&self) -> CC2E_R[src]

Bit 4 - Capture/Compare 2 output enable

pub fn cc1np(&self) -> CC1NP_R[src]

Bit 3 - Capture/Compare 1 output Polarity

pub fn cc1ne(&self) -> CC1NE_R[src]

Bit 2 - Capture/Compare 1 complementary output enable

pub fn cc1p(&self) -> CC1P_R[src]

Bit 1 - Capture/Compare 1 output Polarity

pub fn cc1e(&self) -> CC1E_R[src]

Bit 0 - Capture/Compare 1 output enable

pub fn cc4np(&self) -> CC4NP_R[src]

Bit 15 - Capture/Compare 4 complementary output polarity

pub fn cc5e(&self) -> CC5E_R[src]

Bit 16 - Capture/Compare 5 output enable

pub fn cc5p(&self) -> CC5P_R[src]

Bit 17 - Capture/Compare 5 output polarity

pub fn cc6e(&self) -> CC6E_R[src]

Bit 20 - Capture/Compare 6 output enable

pub fn cc6p(&self) -> CC6P_R[src]

Bit 21 - Capture/Compare 6 output polarity

impl R<u32, Reg<u32, _CNT>>[src]

pub fn cnt(&self) -> CNT_R[src]

Bits 0:15 - counter value

pub fn uifcpy(&self) -> UIFCPY_R[src]

Bit 31 - UIF copy

impl R<u32, Reg<u32, _PSC>>[src]

pub fn psc(&self) -> PSC_R[src]

Bits 0:15 - Prescaler value

impl R<u32, Reg<u32, _ARR>>[src]

pub fn arr(&self) -> ARR_R[src]

Bits 0:15 - Auto-reload value

impl R<u32, Reg<u32, _RCR>>[src]

pub fn rep(&self) -> REP_R[src]

Bits 0:7 - Repetition counter value

impl R<u32, Reg<u32, _CCR1>>[src]

pub fn ccr1(&self) -> CCR1_R[src]

Bits 0:15 - Capture/Compare 1 value

impl R<u32, Reg<u32, _CCR2>>[src]

pub fn ccr2(&self) -> CCR2_R[src]

Bits 0:15 - Capture/Compare 2 value

impl R<u32, Reg<u32, _CCR3>>[src]

pub fn ccr3(&self) -> CCR3_R[src]

Bits 0:15 - Capture/Compare value

impl R<u32, Reg<u32, _CCR4>>[src]

pub fn ccr4(&self) -> CCR4_R[src]

Bits 0:15 - Capture/Compare value

impl R<u32, Reg<u32, _BDTR>>[src]

pub fn moe(&self) -> MOE_R[src]

Bit 15 - Main output enable

pub fn aoe(&self) -> AOE_R[src]

Bit 14 - Automatic output enable

pub fn bkp(&self) -> BKP_R[src]

Bit 13 - Break polarity

pub fn bke(&self) -> BKE_R[src]

Bit 12 - Break enable

pub fn ossr(&self) -> OSSR_R[src]

Bit 11 - Off-state selection for Run mode

pub fn ossi(&self) -> OSSI_R[src]

Bit 10 - Off-state selection for Idle mode

pub fn lock(&self) -> LOCK_R[src]

Bits 8:9 - Lock configuration

pub fn dtg(&self) -> DTG_R[src]

Bits 0:7 - Dead-time generator setup

pub fn bkf(&self) -> BKF_R[src]

Bits 16:19 - Break filter

pub fn bk2f(&self) -> BK2F_R[src]

Bits 20:23 - Break 2 filter

pub fn bk2e(&self) -> BK2E_R[src]

Bit 24 - Break 2 enable

pub fn bk2p(&self) -> BK2P_R[src]

Bit 25 - Break 2 polarity

pub fn bkdsrm(&self) -> BKDSRM_R[src]

Bit 26 - Break Disarm

pub fn bk2dsrm(&self) -> BK2DSRM_R[src]

Bit 27 - Break2 Disarm

pub fn bkbid(&self) -> BKBID_R[src]

Bit 28 - Break Bidirectional

pub fn bk2bid(&self) -> BK2BID_R[src]

Bit 29 - Break2 bidirectional

impl R<u32, Reg<u32, _DCR>>[src]

pub fn dbl(&self) -> DBL_R[src]

Bits 8:12 - DMA burst length

pub fn dba(&self) -> DBA_R[src]

Bits 0:4 - DMA base address

impl R<u32, Reg<u32, _DMAR>>[src]

pub fn dmab(&self) -> DMAB_R[src]

Bits 0:31 - DMA register for burst accesses

impl R<u32, Reg<u32, _OR1>>[src]

pub fn ti1_rmp(&self) -> TI1_RMP_R[src]

Bit 4 - Input Capture 1 remap

impl R<u32, Reg<u32, _CCMR3_OUTPUT>>[src]

pub fn oc6m_bit3(&self) -> OC6M_BIT3_R[src]

Bit 24 - Output Compare 6 mode bit 3

pub fn oc5m_bit3(&self) -> OC5M_BIT3_R[src]

Bits 16:18 - Output Compare 5 mode bit 3

pub fn oc6ce(&self) -> OC6CE_R[src]

Bit 15 - Output compare 6 clear enable

pub fn oc6m(&self) -> OC6M_R[src]

Bits 12:14 - Output compare 6 mode

pub fn oc6pe(&self) -> OC6PE_R[src]

Bit 11 - Output compare 6 preload enable

pub fn oc6fe(&self) -> OC6FE_R[src]

Bit 10 - Output compare 6 fast enable

pub fn oc5ce(&self) -> OC5CE_R[src]

Bit 7 - Output compare 5 clear enable

pub fn oc5m(&self) -> OC5M_R[src]

Bits 4:6 - Output compare 5 mode

pub fn oc5pe(&self) -> OC5PE_R[src]

Bit 3 - Output compare 5 preload enable

pub fn oc5fe(&self) -> OC5FE_R[src]

Bit 2 - Output compare 5 fast enable

impl R<u32, Reg<u32, _CCR5>>[src]

pub fn ccr5(&self) -> CCR5_R[src]

Bits 0:15 - Capture/Compare value

pub fn gc5c1(&self) -> GC5C1_R[src]

Bit 29 - Group Channel 5 and Channel 1

pub fn gc5c2(&self) -> GC5C2_R[src]

Bit 30 - Group Channel 5 and Channel 2

pub fn gc5c3(&self) -> GC5C3_R[src]

Bit 31 - Group Channel 5 and Channel 3

impl R<u32, Reg<u32, _CCR6>>[src]

pub fn ccr6(&self) -> CCR6_R[src]

Bits 0:15 - Capture/Compare value

impl R<u32, Reg<u32, _OR2>>[src]

pub fn bkine(&self) -> BKINE_R[src]

Bit 0 - BRK BKIN input enable

pub fn bkcmp1e(&self) -> BKCMP1E_R[src]

Bit 1 - BRK COMP1 enable

pub fn bkcmp2e(&self) -> BKCMP2E_R[src]

Bit 2 - BRK COMP2 enable

pub fn bkdf1bk2e(&self) -> BKDF1BK2E_R[src]

Bit 8 - BRK dfsdm1_break[2] enable

pub fn bkinp(&self) -> BKINP_R[src]

Bit 9 - BRK BKIN input polarity

pub fn bkcmp1p(&self) -> BKCMP1P_R[src]

Bit 10 - BRK COMP1 input polarity

pub fn bkcmp2p(&self) -> BKCMP2P_R[src]

Bit 11 - BRK COMP2 input polarity

pub fn etrsel(&self) -> ETRSEL_R[src]

Bits 14:16 - ETR source selection

impl R<u32, Reg<u32, _OR3>>[src]

pub fn bk2ine(&self) -> BK2INE_R[src]

Bit 0 - BRK2 BKIN input enable

pub fn bk2cmp1e(&self) -> BK2CMP1E_R[src]

Bit 1 - BRK2 COMP1 enable

pub fn bk2cmp2e(&self) -> BK2CMP2E_R[src]

Bit 2 - BRK2 COMP2 enable

pub fn bk2dfbk3e(&self) -> BK2DFBK3E_R[src]

Bit 8 - BRK2 DFSDM_BREAK0 enable

pub fn bk2inp(&self) -> BK2INP_R[src]

Bit 9 - BRK2 BKIN input polarity

pub fn bk2cmp1p(&self) -> BK2CMP1P_R[src]

Bit 10 - BRK2 COMP1 input polarity

pub fn bk2cmp2p(&self) -> BK2CMP2P_R[src]

Bit 11 - BRK2 COMP2 input polarity

impl R<u32, Reg<u32, _IER1>>[src]

pub fn tim2ie(&self) -> TIM2IE_R[src]

Bit 0 - TIM2IE

pub fn tim3ie(&self) -> TIM3IE_R[src]

Bit 1 - TIM3IE

pub fn tim4ie(&self) -> TIM4IE_R[src]

Bit 2 - TIM4IE

pub fn tim5ie(&self) -> TIM5IE_R[src]

Bit 3 - TIM5IE

pub fn tim6ie(&self) -> TIM6IE_R[src]

Bit 4 - TIM6IE

pub fn tim7ie(&self) -> TIM7IE_R[src]

Bit 5 - TIM7IE

pub fn wwdgie(&self) -> WWDGIE_R[src]

Bit 6 - WWDGIE

pub fn iwdgie(&self) -> IWDGIE_R[src]

Bit 7 - IWDGIE

pub fn spi2ie(&self) -> SPI2IE_R[src]

Bit 8 - SPI2IE

pub fn spi3ie(&self) -> SPI3IE_R[src]

Bit 9 - SPI3IE

pub fn usart2ie(&self) -> USART2IE_R[src]

Bit 10 - USART2IE

pub fn usart3ie(&self) -> USART3IE_R[src]

Bit 11 - USART3IE

pub fn uart4ie(&self) -> UART4IE_R[src]

Bit 12 - UART4IE

pub fn uart5ie(&self) -> UART5IE_R[src]

Bit 13 - UART5IE

pub fn i2c1ie(&self) -> I2C1IE_R[src]

Bit 14 - I2C1IE

pub fn i2c2ie(&self) -> I2C2IE_R[src]

Bit 15 - I2C2IE

pub fn i2c3ie(&self) -> I2C3IE_R[src]

Bit 16 - I2C3IE

pub fn crsie(&self) -> CRSIE_R[src]

Bit 17 - CRSIE

pub fn dacie(&self) -> DACIE_R[src]

Bit 18 - DACIE

pub fn opampie(&self) -> OPAMPIE_R[src]

Bit 19 - OPAMPIE

pub fn lptim1ie(&self) -> LPTIM1IE_R[src]

Bit 20 - LPTIM1IE

pub fn lpuart1ie(&self) -> LPUART1IE_R[src]

Bit 21 - LPUART1IE

pub fn i2c4ie(&self) -> I2C4IE_R[src]

Bit 22 - I2C4IE

pub fn lptim2ie(&self) -> LPTIM2IE_R[src]

Bit 23 - LPTIM2IE

pub fn lptim3ie(&self) -> LPTIM3IE_R[src]

Bit 24 - LPTIM3IE

pub fn fdcan1ie(&self) -> FDCAN1IE_R[src]

Bit 25 - FDCAN1IE

pub fn usbfsie(&self) -> USBFSIE_R[src]

Bit 26 - USBFSIE

pub fn ucpd1ie(&self) -> UCPD1IE_R[src]

Bit 27 - UCPD1IE

pub fn vrefbufie(&self) -> VREFBUFIE_R[src]

Bit 28 - VREFBUFIE

pub fn compie(&self) -> COMPIE_R[src]

Bit 29 - COMPIE

pub fn tim1ie(&self) -> TIM1IE_R[src]

Bit 30 - TIM1IE

pub fn spi1ie(&self) -> SPI1IE_R[src]

Bit 31 - SPI1IE

impl R<u32, Reg<u32, _IER2>>[src]

pub fn tim8ie(&self) -> TIM8IE_R[src]

Bit 0 - TIM8IE

pub fn usart1ie(&self) -> USART1IE_R[src]

Bit 1 - USART1IE

pub fn tim15ie(&self) -> TIM15IE_R[src]

Bit 2 - TIM15IE

pub fn tim16ie(&self) -> TIM16IE_R[src]

Bit 3 - TIM16IE

pub fn tim17ie(&self) -> TIM17IE_R[src]

Bit 4 - TIM17IE

pub fn sai1ie(&self) -> SAI1IE_R[src]

Bit 5 - SAI1IE

pub fn sai2ie(&self) -> SAI2IE_R[src]

Bit 6 - SAI2IE

pub fn dfsdm1ie(&self) -> DFSDM1IE_R[src]

Bit 7 - DFSDM1IE

pub fn crcie(&self) -> CRCIE_R[src]

Bit 8 - CRCIE

pub fn tscie(&self) -> TSCIE_R[src]

Bit 9 - TSCIE

pub fn icacheie(&self) -> ICACHEIE_R[src]

Bit 10 - ICACHEIE

pub fn adcie(&self) -> ADCIE_R[src]

Bit 11 - ADCIE

pub fn aesie(&self) -> AESIE_R[src]

Bit 12 - AESIE

pub fn hashie(&self) -> HASHIE_R[src]

Bit 13 - HASHIE

pub fn rngie(&self) -> RNGIE_R[src]

Bit 14 - RNGIE

pub fn pkaie(&self) -> PKAIE_R[src]

Bit 15 - PKAIE

pub fn sdmmc1ie(&self) -> SDMMC1IE_R[src]

Bit 16 - SDMMC1IE

pub fn fmc_regie(&self) -> FMC_REGIE_R[src]

Bit 17 - FMC_REGIE

pub fn octospi1_regie(&self) -> OCTOSPI1_REGIE_R[src]

Bit 18 - OCTOSPI1_REGIE

pub fn rtcie(&self) -> RTCIE_R[src]

Bit 19 - RTCIE

pub fn pwrie(&self) -> PWRIE_R[src]

Bit 20 - PWRIE

pub fn syscfgie(&self) -> SYSCFGIE_R[src]

Bit 21 - SYSCFGIE

pub fn dma1ie(&self) -> DMA1IE_R[src]

Bit 22 - DMA1IE

pub fn dma2ie(&self) -> DMA2IE_R[src]

Bit 23 - DMA2IE

pub fn dmamux1ie(&self) -> DMAMUX1IE_R[src]

Bit 24 - DMAMUX1IE

pub fn rccie(&self) -> RCCIE_R[src]

Bit 25 - RCCIE

pub fn flashie(&self) -> FLASHIE_R[src]

Bit 26 - FLASHIE

pub fn flash_regie(&self) -> FLASH_REGIE_R[src]

Bit 27 - FLASH_REGIE

pub fn extiie(&self) -> EXTIIE_R[src]

Bit 28 - EXTIIE

pub fn otfdec1ie(&self) -> OTFDEC1IE_R[src]

Bit 29 - OTFDEC1IE

impl R<u32, Reg<u32, _IER3>>[src]

pub fn tzscie(&self) -> TZSCIE_R[src]

Bit 0 - TZSCIE

pub fn tzicie(&self) -> TZICIE_R[src]

Bit 1 - TZICIE

pub fn mpcwm1ie(&self) -> MPCWM1IE_R[src]

Bit 2 - MPCWM1IE

pub fn mpcwm2ie(&self) -> MPCWM2IE_R[src]

Bit 3 - MPCWM2IE

pub fn mpcbb1ie(&self) -> MPCBB1IE_R[src]

Bit 4 - MPCBB1IE

pub fn mpcbb1_regie(&self) -> MPCBB1_REGIE_R[src]

Bit 5 - MPCBB1_REGIE

pub fn mpcbb2ie(&self) -> MPCBB2IE_R[src]

Bit 6 - MPCBB2IE

pub fn mpcbb2_regie(&self) -> MPCBB2_REGIE_R[src]

Bit 7 - MPCBB2_REGIE

impl R<u32, Reg<u32, _SR1>>[src]

pub fn tim2f(&self) -> TIM2F_R[src]

Bit 0 - TIM2F

pub fn tim3f(&self) -> TIM3F_R[src]

Bit 1 - TIM3F

pub fn tim4f(&self) -> TIM4F_R[src]

Bit 2 - TIM4F

pub fn tim5f(&self) -> TIM5F_R[src]

Bit 3 - TIM5F

pub fn tim6f(&self) -> TIM6F_R[src]

Bit 4 - TIM6F

pub fn tim7f(&self) -> TIM7F_R[src]

Bit 5 - TIM7F

pub fn wwdgf(&self) -> WWDGF_R[src]

Bit 6 - WWDGF

pub fn iwdgf(&self) -> IWDGF_R[src]

Bit 7 - IWDGF

pub fn spi2f(&self) -> SPI2F_R[src]

Bit 8 - SPI2F

pub fn spi3f(&self) -> SPI3F_R[src]

Bit 9 - SPI3F

pub fn usart2f(&self) -> USART2F_R[src]

Bit 10 - USART2F

pub fn usart3f(&self) -> USART3F_R[src]

Bit 11 - USART3F

pub fn uart4f(&self) -> UART4F_R[src]

Bit 12 - UART4F

pub fn uart5f(&self) -> UART5F_R[src]

Bit 13 - UART5F

pub fn i2c1f(&self) -> I2C1F_R[src]

Bit 14 - I2C1F

pub fn i2c2f(&self) -> I2C2F_R[src]

Bit 15 - I2C2F

pub fn i2c3f(&self) -> I2C3F_R[src]

Bit 16 - I2C3F

pub fn crsf(&self) -> CRSF_R[src]

Bit 17 - CRSF

pub fn dacf(&self) -> DACF_R[src]

Bit 18 - DACF

pub fn opampf(&self) -> OPAMPF_R[src]

Bit 19 - OPAMPF

pub fn lptim1f(&self) -> LPTIM1F_R[src]

Bit 20 - LPTIM1F

pub fn lpuart1f(&self) -> LPUART1F_R[src]

Bit 21 - LPUART1F

pub fn i2c4f(&self) -> I2C4F_R[src]

Bit 22 - I2C4F

pub fn lptim2f(&self) -> LPTIM2F_R[src]

Bit 23 - LPTIM2F

pub fn lptim3f(&self) -> LPTIM3F_R[src]

Bit 24 - LPTIM3F

pub fn fdcan1f(&self) -> FDCAN1F_R[src]

Bit 25 - FDCAN1F

pub fn usbfsf(&self) -> USBFSF_R[src]

Bit 26 - USBFSF

pub fn ucpd1f(&self) -> UCPD1F_R[src]

Bit 27 - UCPD1F

pub fn vrefbuff(&self) -> VREFBUFF_R[src]

Bit 28 - VREFBUFF

pub fn compf(&self) -> COMPF_R[src]

Bit 29 - COMPF

pub fn tim1f(&self) -> TIM1F_R[src]

Bit 30 - TIM1F

pub fn spi1f(&self) -> SPI1F_R[src]

Bit 31 - SPI1F

impl R<u32, Reg<u32, _SR2>>[src]

pub fn tim8f(&self) -> TIM8F_R[src]

Bit 0 - TIM8F

pub fn usart1f(&self) -> USART1F_R[src]

Bit 1 - USART1F

pub fn tim15f(&self) -> TIM15F_R[src]

Bit 2 - TIM15F

pub fn tim16f(&self) -> TIM16F_R[src]

Bit 3 - TIM16F

pub fn tim17f(&self) -> TIM17F_R[src]

Bit 4 - TIM17F

pub fn sai1f(&self) -> SAI1F_R[src]

Bit 5 - SAI1F

pub fn sai2f(&self) -> SAI2F_R[src]

Bit 6 - SAI2F

pub fn dfsdm1f(&self) -> DFSDM1F_R[src]

Bit 7 - DFSDM1F

pub fn crcf(&self) -> CRCF_R[src]

Bit 8 - CRCF

pub fn tscf(&self) -> TSCF_R[src]

Bit 9 - TSCF

pub fn icachef(&self) -> ICACHEF_R[src]

Bit 10 - ICACHEF

pub fn adcf(&self) -> ADCF_R[src]

Bit 11 - ADCF

pub fn aesf(&self) -> AESF_R[src]

Bit 12 - AESF

pub fn hashf(&self) -> HASHF_R[src]

Bit 13 - HASHF

pub fn rngf(&self) -> RNGF_R[src]

Bit 14 - RNGF

pub fn pkaf(&self) -> PKAF_R[src]

Bit 15 - PKAF

pub fn sdmmc1f(&self) -> SDMMC1F_R[src]

Bit 16 - SDMMC1F

pub fn fmc_regf(&self) -> FMC_REGF_R[src]

Bit 17 - FMC_REGF

pub fn octospi1_regf(&self) -> OCTOSPI1_REGF_R[src]

Bit 18 - OCTOSPI1_REGF

pub fn rtcf(&self) -> RTCF_R[src]

Bit 19 - RTCF

pub fn pwrf(&self) -> PWRF_R[src]

Bit 20 - PWRF

pub fn syscfgf(&self) -> SYSCFGF_R[src]

Bit 21 - SYSCFGF

pub fn dma1f(&self) -> DMA1F_R[src]

Bit 22 - DMA1F

pub fn dma2f(&self) -> DMA2F_R[src]

Bit 23 - DMA2F

pub fn dmamux1f(&self) -> DMAMUX1F_R[src]

Bit 24 - DMAMUX1F

pub fn rccf(&self) -> RCCF_R[src]

Bit 25 - RCCF

pub fn flashf(&self) -> FLASHF_R[src]

Bit 26 - FLASHF

pub fn flash_regf(&self) -> FLASH_REGF_R[src]

Bit 27 - FLASH_REGF

pub fn extif(&self) -> EXTIF_R[src]

Bit 28 - EXTIF

pub fn otfdec1f(&self) -> OTFDEC1F_R[src]

Bit 29 - OTFDEC1F

impl R<u32, Reg<u32, _SR3>>[src]

pub fn tzscf(&self) -> TZSCF_R[src]

Bit 0 - TZSCF

pub fn tzicf(&self) -> TZICF_R[src]

Bit 1 - TZICF

pub fn mpcwm1f(&self) -> MPCWM1F_R[src]

Bit 2 - MPCWM1F

pub fn mpcwm2f(&self) -> MPCWM2F_R[src]

Bit 3 - MPCWM2F

pub fn mpcbb1f(&self) -> MPCBB1F_R[src]

Bit 4 - MPCBB1F

pub fn mpcbb1_regf(&self) -> MPCBB1_REGF_R[src]

Bit 5 - MPCBB1_REGF

pub fn mpcbb2f(&self) -> MPCBB2F_R[src]

Bit 6 - MPCBB2F

pub fn mpcbb2_regf(&self) -> MPCBB2_REGF_R[src]

Bit 7 - MPCBB2_REGF

impl R<u32, Reg<u32, _FCR2>>[src]

pub fn tim8fc(&self) -> TIM8FC_R[src]

Bit 0 - TIM8FC

pub fn usart1fc(&self) -> USART1FC_R[src]

Bit 1 - USART1FC

pub fn tim15fc(&self) -> TIM15FC_R[src]

Bit 2 - TIM15FC

pub fn tim16fc(&self) -> TIM16FC_R[src]

Bit 3 - TIM16FC

pub fn tim17fc(&self) -> TIM17FC_R[src]

Bit 4 - TIM17FC

pub fn sai1fc(&self) -> SAI1FC_R[src]

Bit 5 - SAI1FC

pub fn sai2fc(&self) -> SAI2FC_R[src]

Bit 6 - SAI2FC

pub fn dfsdm1fc(&self) -> DFSDM1FC_R[src]

Bit 7 - DFSDM1FC

pub fn crcfc(&self) -> CRCFC_R[src]

Bit 8 - CRCFC

pub fn tscfc(&self) -> TSCFC_R[src]

Bit 9 - TSCFC

pub fn icachefc(&self) -> ICACHEFC_R[src]

Bit 10 - ICACHEFC

pub fn adcfc(&self) -> ADCFC_R[src]

Bit 11 - ADCFC

pub fn aesfc(&self) -> AESFC_R[src]

Bit 12 - AESFC

pub fn hashfc(&self) -> HASHFC_R[src]

Bit 13 - HASHFC

pub fn rngfc(&self) -> RNGFC_R[src]

Bit 14 - RNGFC

pub fn pkafc(&self) -> PKAFC_R[src]

Bit 15 - PKAFC

pub fn sdmmc1fc(&self) -> SDMMC1FC_R[src]

Bit 16 - SDMMC1FC

pub fn fmc_regfc(&self) -> FMC_REGFC_R[src]

Bit 17 - FMC_REGFC

pub fn octospi1_regfc(&self) -> OCTOSPI1_REGFC_R[src]

Bit 18 - OCTOSPI1_REGFC

pub fn rtcfc(&self) -> RTCFC_R[src]

Bit 19 - RTCFC

pub fn pwrfc(&self) -> PWRFC_R[src]

Bit 20 - PWRFC

pub fn syscfgfc(&self) -> SYSCFGFC_R[src]

Bit 21 - SYSCFGFC

pub fn dma1fc(&self) -> DMA1FC_R[src]

Bit 22 - DMA1FC

pub fn dma2fc(&self) -> DMA2FC_R[src]

Bit 23 - DMA2FC

pub fn dmamux1fc(&self) -> DMAMUX1FC_R[src]

Bit 24 - DMAMUX1FC

pub fn rccfc(&self) -> RCCFC_R[src]

Bit 25 - RCCFC

pub fn flashfc(&self) -> FLASHFC_R[src]

Bit 26 - FLASHFC

pub fn flash_regfc(&self) -> FLASH_REGFC_R[src]

Bit 27 - FLASH_REGFC

pub fn extifc(&self) -> EXTIFC_R[src]

Bit 28 - EXTIFC

pub fn otfdec1fc(&self) -> OTFDEC1FC_R[src]

Bit 29 - OTFDEC1FC

impl R<u32, Reg<u32, _FCR3>>[src]

pub fn tzscfc(&self) -> TZSCFC_R[src]

Bit 0 - TZSCFC

pub fn tzicfc(&self) -> TZICFC_R[src]

Bit 1 - TZICFC

pub fn mpcwm1fc(&self) -> MPCWM1FC_R[src]

Bit 2 - MPCWM1FC

pub fn mpcwm2fc(&self) -> MPCWM2FC_R[src]

Bit 3 - MPCWM2FC

pub fn mpcbb1fc(&self) -> MPCBB1FC_R[src]

Bit 4 - MPCBB1FC

pub fn mpcbb1_regfc(&self) -> MPCBB1_REGFC_R[src]

Bit 5 - MPCBB1_REGFC

pub fn mpcbb2fc(&self) -> MPCBB2FC_R[src]

Bit 6 - MPCBB2FC

pub fn mpcbb2_regfc(&self) -> MPCBB2_REGFC_R[src]

Bit 7 - MPCBB2_REGFC

impl R<u32, Reg<u32, _TZSC_CR>>[src]

pub fn lck(&self) -> LCK_R[src]

Bit 0 - LCK

impl R<u32, Reg<u32, _TZSC_SECCFGR1>>[src]

pub fn tim2sec(&self) -> TIM2SEC_R[src]

Bit 0 - TIM2SEC

pub fn tim3sec(&self) -> TIM3SEC_R[src]

Bit 1 - TIM3SEC

pub fn tim4sec(&self) -> TIM4SEC_R[src]

Bit 2 - TIM4SEC

pub fn tim5sec(&self) -> TIM5SEC_R[src]

Bit 3 - TIM5SEC

pub fn tim6sec(&self) -> TIM6SEC_R[src]

Bit 4 - TIM6SEC

pub fn tim7sec(&self) -> TIM7SEC_R[src]

Bit 5 - TIM7SEC

pub fn wwdgsec(&self) -> WWDGSEC_R[src]

Bit 6 - WWDGSEC

pub fn iwdgsec(&self) -> IWDGSEC_R[src]

Bit 7 - IWDGSEC

pub fn spi2sec(&self) -> SPI2SEC_R[src]

Bit 8 - SPI2SEC

pub fn spi3sec(&self) -> SPI3SEC_R[src]

Bit 9 - SPI3SEC

pub fn usart2sec(&self) -> USART2SEC_R[src]

Bit 10 - USART2SEC

pub fn usart3sec(&self) -> USART3SEC_R[src]

Bit 11 - USART3SEC

pub fn uart4sec(&self) -> UART4SEC_R[src]

Bit 12 - UART4SEC

pub fn uart5sec(&self) -> UART5SEC_R[src]

Bit 13 - UART5SEC

pub fn i2c1sec(&self) -> I2C1SEC_R[src]

Bit 14 - I2C1SEC

pub fn i2c2sec(&self) -> I2C2SEC_R[src]

Bit 15 - I2C2SEC

pub fn i2c3sec(&self) -> I2C3SEC_R[src]

Bit 16 - I2C3SEC

pub fn crssec(&self) -> CRSSEC_R[src]

Bit 17 - CRSSEC

pub fn dacsec(&self) -> DACSEC_R[src]

Bit 18 - DACSEC

pub fn opampsec(&self) -> OPAMPSEC_R[src]

Bit 19 - OPAMPSEC

pub fn lptim1sec(&self) -> LPTIM1SEC_R[src]

Bit 20 - LPTIM1SEC

pub fn lpuart1sec(&self) -> LPUART1SEC_R[src]

Bit 21 - LPUART1SEC

pub fn i2c4sec(&self) -> I2C4SEC_R[src]

Bit 22 - I2C4SEC

pub fn lptim2sec(&self) -> LPTIM2SEC_R[src]

Bit 23 - LPTIM2SEC

pub fn lptim3sec(&self) -> LPTIM3SEC_R[src]

Bit 24 - LPTIM3SEC

pub fn fdcan1sec(&self) -> FDCAN1SEC_R[src]

Bit 25 - FDCAN1SEC

pub fn usbfssec(&self) -> USBFSSEC_R[src]

Bit 26 - USBFSSEC

pub fn ucpd1sec(&self) -> UCPD1SEC_R[src]

Bit 27 - UCPD1SEC

pub fn vrefbufsec(&self) -> VREFBUFSEC_R[src]

Bit 28 - VREFBUFSEC

pub fn compsec(&self) -> COMPSEC_R[src]

Bit 29 - COMPSEC

pub fn tim1sec(&self) -> TIM1SEC_R[src]

Bit 30 - TIM1SEC

pub fn spi1sec(&self) -> SPI1SEC_R[src]

Bit 31 - SPI1SEC

impl R<u32, Reg<u32, _TZSC_SECCFGR2>>[src]

pub fn tim8sec(&self) -> TIM8SEC_R[src]

Bit 0 - TIM8SEC

pub fn usart1sec(&self) -> USART1SEC_R[src]

Bit 1 - USART1SEC

pub fn tim15sec(&self) -> TIM15SEC_R[src]

Bit 2 - TIM15SEC

pub fn tim16sec(&self) -> TIM16SEC_R[src]

Bit 3 - TIM16SEC

pub fn tim17sec(&self) -> TIM17SEC_R[src]

Bit 4 - TIM17SEC

pub fn sai1sec(&self) -> SAI1SEC_R[src]

Bit 5 - SAI1SEC

pub fn sai2sec(&self) -> SAI2SEC_R[src]

Bit 6 - SAI2SEC

pub fn dfsdm1sec(&self) -> DFSDM1SEC_R[src]

Bit 7 - DFSDM1SEC

pub fn crcsec(&self) -> CRCSEC_R[src]

Bit 8 - CRCSEC

pub fn tscsec(&self) -> TSCSEC_R[src]

Bit 9 - TSCSEC

pub fn icachesec(&self) -> ICACHESEC_R[src]

Bit 10 - ICACHESEC

pub fn adcsec(&self) -> ADCSEC_R[src]

Bit 11 - ADCSEC

pub fn aessec(&self) -> AESSEC_R[src]

Bit 12 - AESSEC

pub fn hashsec(&self) -> HASHSEC_R[src]

Bit 13 - HASHSEC

pub fn rngsec(&self) -> RNGSEC_R[src]

Bit 14 - RNGSEC

pub fn pkasec(&self) -> PKASEC_R[src]

Bit 15 - PKASEC

pub fn sdmmc1sec(&self) -> SDMMC1SEC_R[src]

Bit 16 - SDMMC1SEC

pub fn fsmc_regsec(&self) -> FSMC_REGSEC_R[src]

Bit 17 - FSMC_REGSEC

pub fn octospi1_regsec(&self) -> OCTOSPI1_REGSEC_R[src]

Bit 18 - OCTOSPI1_REGSEC

impl R<u32, Reg<u32, _TZSC_PRIVCFGR1>>[src]

pub fn tim2priv(&self) -> TIM2PRIV_R[src]

Bit 0 - TIM2PRIV

pub fn tim3priv(&self) -> TIM3PRIV_R[src]

Bit 1 - TIM3PRIV

pub fn tim4priv(&self) -> TIM4PRIV_R[src]

Bit 2 - TIM4PRIV

pub fn tim5priv(&self) -> TIM5PRIV_R[src]

Bit 3 - TIM5PRIV

pub fn tim6priv(&self) -> TIM6PRIV_R[src]

Bit 4 - TIM6PRIV

pub fn tim7priv(&self) -> TIM7PRIV_R[src]

Bit 5 - TIM7PRIV

pub fn wwdgpriv(&self) -> WWDGPRIV_R[src]

Bit 6 - WWDGPRIV

pub fn iwdgpriv(&self) -> IWDGPRIV_R[src]

Bit 7 - IWDGPRIV

pub fn spi2priv(&self) -> SPI2PRIV_R[src]

Bit 8 - SPI2PRIV

pub fn spi3priv(&self) -> SPI3PRIV_R[src]

Bit 9 - SPI3PRIV

pub fn usart2priv(&self) -> USART2PRIV_R[src]

Bit 10 - USART2PRIV

pub fn usart3priv(&self) -> USART3PRIV_R[src]

Bit 11 - USART3PRIV

pub fn uart4priv(&self) -> UART4PRIV_R[src]

Bit 12 - UART4PRIV

pub fn uart5priv(&self) -> UART5PRIV_R[src]

Bit 13 - UART5PRIV

pub fn i2c1priv(&self) -> I2C1PRIV_R[src]

Bit 14 - I2C1PRIV

pub fn i2c2priv(&self) -> I2C2PRIV_R[src]

Bit 15 - I2C2PRIV

pub fn i2c3priv(&self) -> I2C3PRIV_R[src]

Bit 16 - I2C3PRIV

pub fn crspriv(&self) -> CRSPRIV_R[src]

Bit 17 - CRSPRIV

pub fn dacpriv(&self) -> DACPRIV_R[src]

Bit 18 - DACPRIV

pub fn opamppriv(&self) -> OPAMPPRIV_R[src]

Bit 19 - OPAMPPRIV

pub fn lptim1priv(&self) -> LPTIM1PRIV_R[src]

Bit 20 - LPTIM1PRIV

pub fn lpuart1priv(&self) -> LPUART1PRIV_R[src]

Bit 21 - LPUART1PRIV

pub fn i2c4priv(&self) -> I2C4PRIV_R[src]

Bit 22 - I2C4PRIV

pub fn lptim2priv(&self) -> LPTIM2PRIV_R[src]

Bit 23 - LPTIM2PRIV

pub fn lptim3priv(&self) -> LPTIM3PRIV_R[src]

Bit 24 - LPTIM3PRIV

pub fn fdcan1priv(&self) -> FDCAN1PRIV_R[src]

Bit 25 - FDCAN1PRIV

pub fn usbfspriv(&self) -> USBFSPRIV_R[src]

Bit 26 - USBFSPRIV

pub fn ucpd1priv(&self) -> UCPD1PRIV_R[src]

Bit 27 - UCPD1PRIV

pub fn vrefbufpriv(&self) -> VREFBUFPRIV_R[src]

Bit 28 - VREFBUFPRIV

pub fn comppriv(&self) -> COMPPRIV_R[src]

Bit 29 - COMPPRIV

pub fn tim1priv(&self) -> TIM1PRIV_R[src]

Bit 30 - TIM1PRIV

pub fn spi1priv(&self) -> SPI1PRIV_R[src]

Bit 31 - SPI1PRIV

impl R<u32, Reg<u32, _TZSC_PRIVCFGR2>>[src]

pub fn tim8priv(&self) -> TIM8PRIV_R[src]

Bit 0 - TIM8PRIV

pub fn usart1priv(&self) -> USART1PRIV_R[src]

Bit 1 - USART1PRIV

pub fn tim15priv(&self) -> TIM15PRIV_R[src]

Bit 2 - TIM15PRIV

pub fn tim16priv(&self) -> TIM16PRIV_R[src]

Bit 3 - TIM16PRIV

pub fn tim17priv(&self) -> TIM17PRIV_R[src]

Bit 4 - TIM17PRIV

pub fn sai1priv(&self) -> SAI1PRIV_R[src]

Bit 5 - SAI1PRIV

pub fn sai2priv(&self) -> SAI2PRIV_R[src]

Bit 6 - SAI2PRIV

pub fn dfsdm1priv(&self) -> DFSDM1PRIV_R[src]

Bit 7 - DFSDM1PRIV

pub fn crcpriv(&self) -> CRCPRIV_R[src]

Bit 8 - CRCPRIV

pub fn tscpriv(&self) -> TSCPRIV_R[src]

Bit 9 - TSCPRIV

pub fn icachepriv(&self) -> ICACHEPRIV_R[src]

Bit 10 - ICACHEPRIV

pub fn adcpriv(&self) -> ADCPRIV_R[src]

Bit 11 - ADCPRIV

pub fn aespriv(&self) -> AESPRIV_R[src]

Bit 12 - AESPRIV

pub fn hashpriv(&self) -> HASHPRIV_R[src]

Bit 13 - HASHPRIV

pub fn rngpriv(&self) -> RNGPRIV_R[src]

Bit 14 - RNGPRIV

pub fn pkapriv(&self) -> PKAPRIV_R[src]

Bit 15 - PKAPRIV

pub fn sdmmc1priv(&self) -> SDMMC1PRIV_R[src]

Bit 16 - SDMMC1PRIV

pub fn fsmc_regpriv(&self) -> FSMC_REGPRIV_R[src]

Bit 17 - FSMC_REGPRIV

pub fn octospi1_regpriv(&self) -> OCTOSPI1_REGPRIV_R[src]

Bit 18 - OCTOSPI1_REGRIV

impl R<u32, Reg<u32, _TZSC_MPCWM1_NSWMR1>>[src]

pub fn nswm1strt(&self) -> NSWM1STRT_R[src]

Bits 0:10 - NSWM1STRT

pub fn nswm1lgth(&self) -> NSWM1LGTH_R[src]

Bits 16:27 - NSWM1LGTH

impl R<u32, Reg<u32, _TZSC_MPCWM1_NSWMR2>>[src]

pub fn nswm2strt(&self) -> NSWM2STRT_R[src]

Bits 0:10 - NSWM2STRT

pub fn nswm2lgth(&self) -> NSWM2LGTH_R[src]

Bits 16:27 - NSWM2LGTH

impl R<u32, Reg<u32, _TZSC_MPCWM2_NSWMR1>>[src]

pub fn nswm1strt(&self) -> NSWM1STRT_R[src]

Bits 0:10 - NSWM1STRT

pub fn nswm1lgth(&self) -> NSWM1LGTH_R[src]

Bits 16:27 - NSWM1LGTH

impl R<u32, Reg<u32, _TZSC_MPCWM3_NSWMR1>>[src]

pub fn nswm2strt(&self) -> NSWM2STRT_R[src]

Bits 0:10 - NSWM2STRT

pub fn nswm2lgth(&self) -> NSWM2LGTH_R[src]

Bits 16:27 - NSWM2LGTH

impl R<u32, Reg<u32, _TZSC_MPCWM2_NSWMR2>>[src]

pub fn nswm2strt(&self) -> NSWM2STRT_R[src]

Bits 0:10 - NSWM2STRT

pub fn nswm2lgth(&self) -> NSWM2LGTH_R[src]

Bits 16:27 - NSWM2LGTH

impl R<u32, Reg<u32, _CR>>[src]

pub fn wdga(&self) -> WDGA_R[src]

Bit 7 - Activation bit

pub fn t(&self) -> T_R[src]

Bits 0:6 - 7-bit counter (MSB to LSB)

impl R<u32, Reg<u32, _CFR>>[src]

pub fn ewi(&self) -> EWI_R[src]

Bit 9 - Early wakeup interrupt

pub fn wdgtb(&self) -> WDGTB_R[src]

Bits 7:8 - Timer base

pub fn w(&self) -> W_R[src]

Bits 0:6 - 7-bit window value

impl R<u32, Reg<u32, _SR>>[src]

pub fn ewif(&self) -> EWIF_R[src]

Bit 0 - Early wakeup interrupt flag

impl R<u32, Reg<u32, _SECCFGR>>[src]

pub fn sram2sec(&self) -> SRAM2SEC_R[src]

Bit 2 - SRAM2 security

pub fn classbsec(&self) -> CLASSBSEC_R[src]

Bit 1 - ClassB security

pub fn syscfgsec(&self) -> SYSCFGSEC_R[src]

Bit 0 - SYSCFG clock control security

pub fn fpusec(&self) -> FPUSEC_R[src]

Bit 3 - FPUSEC

impl R<u32, Reg<u32, _CFGR1>>[src]

pub fn i2c4_fmp(&self) -> I2C4_FMP_R[src]

Bit 23 - I2C4_FMP

pub fn i2c3_fmp(&self) -> I2C3_FMP_R[src]

Bit 22 - I2C3 Fast-mode Plus driving capability activation

pub fn i2c2_fmp(&self) -> I2C2_FMP_R[src]

Bit 21 - I2C2 Fast-mode Plus driving capability activation

pub fn i2c1_fmp(&self) -> I2C1_FMP_R[src]

Bit 20 - I2C1 Fast-mode Plus driving capability activation

pub fn i2c_pb9_fmp(&self) -> I2C_PB9_FMP_R[src]

Bit 19 - Fast-mode Plus (Fm+) driving capability activation on PB9

pub fn i2c_pb8_fmp(&self) -> I2C_PB8_FMP_R[src]

Bit 18 - Fast-mode Plus (Fm+) driving capability activation on PB8

pub fn i2c_pb7_fmp(&self) -> I2C_PB7_FMP_R[src]

Bit 17 - Fast-mode Plus (Fm+) driving capability activation on PB7

pub fn i2c_pb6_fmp(&self) -> I2C_PB6_FMP_R[src]

Bit 16 - Fast-mode Plus (Fm+) driving capability activation on PB6

pub fn boosten(&self) -> BOOSTEN_R[src]

Bit 8 - I/O analog switch voltage booster enable

pub fn anaswvdd(&self) -> ANASWVDD_R[src]

Bit 9 - GPIO analog switch control voltage selection

impl R<u32, Reg<u32, _FPUIMR>>[src]

pub fn fpu_ie(&self) -> FPU_IE_R[src]

Bits 0:5 - Floating point unit interrupts enable bits

impl R<u32, Reg<u32, _CNSLCKR>>[src]

pub fn locknsvtor(&self) -> LOCKNSVTOR_R[src]

Bit 0 - VTOR_NS register lock

pub fn locknsmpu(&self) -> LOCKNSMPU_R[src]

Bit 1 - Non-secure MPU registers lock

impl R<u32, Reg<u32, _CSLOCKR>>[src]

pub fn locksvtaircr(&self) -> LOCKSVTAIRCR_R[src]

Bit 0 - LOCKSVTAIRCR

pub fn locksmpu(&self) -> LOCKSMPU_R[src]

Bit 1 - LOCKSMPU

pub fn locksau(&self) -> LOCKSAU_R[src]

Bit 2 - LOCKSAU

impl R<u32, Reg<u32, _SCSR>>[src]

pub fn sram2bsy(&self) -> SRAM2BSY_R[src]

Bit 1 - SRAM2 busy by erase operation

pub fn sram2er(&self) -> SRAM2ER_R[src]

Bit 0 - SRAM2 Erase

impl R<u32, Reg<u32, _CFGR2>>[src]

pub fn spf(&self) -> SPF_R[src]

Bit 8 - SRAM2 parity error flag

impl R<u32, Reg<u32, _RSSCMDR>>[src]

pub fn rsscmd(&self) -> RSSCMD_R[src]

Bits 0:7 - RSS commands

impl R<u32, Reg<u32, _IDCODE>>[src]

pub fn dev_id(&self) -> DEV_ID_R[src]

Bits 0:11 - Device identifier

pub fn rev_id(&self) -> REV_ID_R[src]

Bits 16:31 - Revision identifie

impl R<u32, Reg<u32, _CR>>[src]

pub fn dbg_stop(&self) -> DBG_STOP_R[src]

Bit 1 - Debug Stop mode

pub fn dbg_standby(&self) -> DBG_STANDBY_R[src]

Bit 2 - Debug Standby mode

pub fn trace_ioen(&self) -> TRACE_IOEN_R[src]

Bit 4 - Trace pin assignment control

pub fn trace_mode(&self) -> TRACE_MODE_R[src]

Bits 6:7 - Trace pin assignment control

pub fn trace_en(&self) -> TRACE_EN_R[src]

Bit 5 - trace port and clock enable

impl R<u32, Reg<u32, _APB1LFZR>>[src]

pub fn dbg_tim2_stop(&self) -> DBG_TIM2_STOP_R[src]

Bit 0 - TIM2 counter stopped when core is halted

pub fn dbg_tim6_stop(&self) -> DBG_TIM6_STOP_R[src]

Bit 4 - TIM6 counter stopped when core is halted

pub fn dbg_tim7_stop(&self) -> DBG_TIM7_STOP_R[src]

Bit 5 - TIM7 counter stopped when core is halted

pub fn dbg_rtc_stop(&self) -> DBG_RTC_STOP_R[src]

Bit 10 - RTC counter stopped when core is halted

pub fn dbg_wwdg_stop(&self) -> DBG_WWDG_STOP_R[src]

Bit 11 - Window watchdog counter stopped when core is halted

pub fn dbg_iwdg_stop(&self) -> DBG_IWDG_STOP_R[src]

Bit 12 - Independent watchdog counter stopped when core is halted

pub fn dbg_i2c1_stop(&self) -> DBG_I2C1_STOP_R[src]

Bit 21 - I2C1 SMBUS timeout counter stopped when core is halted

pub fn dbg_i2c2_stop(&self) -> DBG_I2C2_STOP_R[src]

Bit 22 - I2C2 SMBUS timeout counter stopped when core is halted

pub fn dbg_i2c3_stop(&self) -> DBG_I2C3_STOP_R[src]

Bit 23 - I2C3 SMBUS timeout counter stopped when core is halted

pub fn dbg_lptim1_stop(&self) -> DBG_LPTIM1_STOP_R[src]

Bit 31 - LPTIM1 counter stopped when core is halted

pub fn dbg_tim3_stop(&self) -> DBG_TIM3_STOP_R[src]

Bit 1 - TIM3 stop in debug

pub fn dbg_tim4_stop(&self) -> DBG_TIM4_STOP_R[src]

Bit 2 - TIM4 stop in debug

pub fn dbg_tim5_stop(&self) -> DBG_TIM5_STOP_R[src]

Bit 3 - TIM5 stop in debug

impl R<u32, Reg<u32, _APB1HFZR>>[src]

pub fn dbg_lptim2_stop(&self) -> DBG_LPTIM2_STOP_R[src]

Bit 5 - LPTIM2 counter stopped when core is halted

pub fn dbg_i2c4_stop(&self) -> DBG_I2C4_STOP_R[src]

Bit 1 - I2C4 stop in debug

pub fn dbg_lptim3_stop(&self) -> DBG_LPTIM3_STOP_R[src]

Bit 6 - LPTIM3 stop in debug

impl R<u32, Reg<u32, _APB2FZR>>[src]

pub fn dbg_tim1_stop(&self) -> DBG_TIM1_STOP_R[src]

Bit 11 - TIM1 counter stopped when core is halted

pub fn dbg_tim15_stop(&self) -> DBG_TIM15_STOP_R[src]

Bit 16 - TIM15 counter stopped when core is halted

pub fn dbg_tim16_stop(&self) -> DBG_TIM16_STOP_R[src]

Bit 17 - TIM16 counter stopped when core is halted

pub fn dbg_tim8_stop(&self) -> DBG_TIM8_STOP_R[src]

Bit 13 - TIM8 stop in debug

pub fn dbg_tim17_stop(&self) -> DBG_TIM17_STOP_R[src]

Bit 18 - DBG_TIM17_STOP

impl R<u16, Reg<u16, _EP0R>>[src]

pub fn ea(&self) -> EA_R[src]

Bits 0:3 - Endpoint address

pub fn stat_tx(&self) -> STAT_TX_R[src]

Bits 4:5 - Status bits, for transmission transfers

pub fn dtog_tx(&self) -> DTOG_TX_R[src]

Bit 6 - Data Toggle, for transmission transfers

pub fn ctr_tx(&self) -> CTR_TX_R[src]

Bit 7 - Correct Transfer for transmission

pub fn ep_kind(&self) -> EP_KIND_R[src]

Bit 8 - Endpoint kind

pub fn ep_type(&self) -> EP_TYPE_R[src]

Bits 9:10 - Endpoint type

pub fn setup(&self) -> SETUP_R[src]

Bit 11 - Setup transaction completed

pub fn stat_rx(&self) -> STAT_RX_R[src]

Bits 12:13 - Status bits, for reception transfers

pub fn dtog_rx(&self) -> DTOG_RX_R[src]

Bit 14 - Data Toggle, for reception transfers

pub fn ctr_rx(&self) -> CTR_RX_R[src]

Bit 15 - Correct transfer for reception

impl R<u16, Reg<u16, _EP1R>>[src]

pub fn ea(&self) -> EA_R[src]

Bits 0:3 - Endpoint address

pub fn stat_tx(&self) -> STAT_TX_R[src]

Bits 4:5 - Status bits, for transmission transfers

pub fn dtog_tx(&self) -> DTOG_TX_R[src]

Bit 6 - Data Toggle, for transmission transfers

pub fn ctr_tx(&self) -> CTR_TX_R[src]

Bit 7 - Correct Transfer for transmission

pub fn ep_kind(&self) -> EP_KIND_R[src]

Bit 8 - Endpoint kind

pub fn ep_type(&self) -> EP_TYPE_R[src]

Bits 9:10 - Endpoint type

pub fn setup(&self) -> SETUP_R[src]

Bit 11 - Setup transaction completed

pub fn stat_rx(&self) -> STAT_RX_R[src]

Bits 12:13 - Status bits, for reception transfers

pub fn dtog_rx(&self) -> DTOG_RX_R[src]

Bit 14 - Data Toggle, for reception transfers

pub fn ctr_rx(&self) -> CTR_RX_R[src]

Bit 15 - Correct transfer for reception

impl R<u16, Reg<u16, _EP2R>>[src]

pub fn ea(&self) -> EA_R[src]

Bits 0:3 - Endpoint address

pub fn stat_tx(&self) -> STAT_TX_R[src]

Bits 4:5 - Status bits, for transmission transfers

pub fn dtog_tx(&self) -> DTOG_TX_R[src]

Bit 6 - Data Toggle, for transmission transfers

pub fn ctr_tx(&self) -> CTR_TX_R[src]

Bit 7 - Correct Transfer for transmission

pub fn ep_kind(&self) -> EP_KIND_R[src]

Bit 8 - Endpoint kind

pub fn ep_type(&self) -> EP_TYPE_R[src]

Bits 9:10 - Endpoint type

pub fn setup(&self) -> SETUP_R[src]

Bit 11 - Setup transaction completed

pub fn stat_rx(&self) -> STAT_RX_R[src]

Bits 12:13 - Status bits, for reception transfers

pub fn dtog_rx(&self) -> DTOG_RX_R[src]

Bit 14 - Data Toggle, for reception transfers

pub fn ctr_rx(&self) -> CTR_RX_R[src]

Bit 15 - Correct transfer for reception

impl R<u16, Reg<u16, _EP3R>>[src]

pub fn ea(&self) -> EA_R[src]

Bits 0:3 - Endpoint address

pub fn stat_tx(&self) -> STAT_TX_R[src]

Bits 4:5 - Status bits, for transmission transfers

pub fn dtog_tx(&self) -> DTOG_TX_R[src]

Bit 6 - Data Toggle, for transmission transfers

pub fn ctr_tx(&self) -> CTR_TX_R[src]

Bit 7 - Correct Transfer for transmission

pub fn ep_kind(&self) -> EP_KIND_R[src]

Bit 8 - Endpoint kind

pub fn ep_type(&self) -> EP_TYPE_R[src]

Bits 9:10 - Endpoint type

pub fn setup(&self) -> SETUP_R[src]

Bit 11 - Setup transaction completed

pub fn stat_rx(&self) -> STAT_RX_R[src]

Bits 12:13 - Status bits, for reception transfers

pub fn dtog_rx(&self) -> DTOG_RX_R[src]

Bit 14 - Data Toggle, for reception transfers

pub fn ctr_rx(&self) -> CTR_RX_R[src]

Bit 15 - Correct transfer for reception

impl R<u16, Reg<u16, _EP4R>>[src]

pub fn ea(&self) -> EA_R[src]

Bits 0:3 - Endpoint address

pub fn stat_tx(&self) -> STAT_TX_R[src]

Bits 4:5 - Status bits, for transmission transfers

pub fn dtog_tx(&self) -> DTOG_TX_R[src]

Bit 6 - Data Toggle, for transmission transfers

pub fn ctr_tx(&self) -> CTR_TX_R[src]

Bit 7 - Correct Transfer for transmission

pub fn ep_kind(&self) -> EP_KIND_R[src]

Bit 8 - Endpoint kind

pub fn ep_type(&self) -> EP_TYPE_R[src]

Bits 9:10 - Endpoint type

pub fn setup(&self) -> SETUP_R[src]

Bit 11 - Setup transaction completed

pub fn stat_rx(&self) -> STAT_RX_R[src]

Bits 12:13 - Status bits, for reception transfers

pub fn dtog_rx(&self) -> DTOG_RX_R[src]

Bit 14 - Data Toggle, for reception transfers

pub fn ctr_rx(&self) -> CTR_RX_R[src]

Bit 15 - Correct transfer for reception

impl R<u16, Reg<u16, _EP5R>>[src]

pub fn ea(&self) -> EA_R[src]

Bits 0:3 - Endpoint address

pub fn stat_tx(&self) -> STAT_TX_R[src]

Bits 4:5 - Status bits, for transmission transfers

pub fn dtog_tx(&self) -> DTOG_TX_R[src]

Bit 6 - Data Toggle, for transmission transfers

pub fn ctr_tx(&self) -> CTR_TX_R[src]

Bit 7 - Correct Transfer for transmission

pub fn ep_kind(&self) -> EP_KIND_R[src]

Bit 8 - Endpoint kind

pub fn ep_type(&self) -> EP_TYPE_R[src]

Bits 9:10 - Endpoint type

pub fn setup(&self) -> SETUP_R[src]

Bit 11 - Setup transaction completed

pub fn stat_rx(&self) -> STAT_RX_R[src]

Bits 12:13 - Status bits, for reception transfers

pub fn dtog_rx(&self) -> DTOG_RX_R[src]

Bit 14 - Data Toggle, for reception transfers

pub fn ctr_rx(&self) -> CTR_RX_R[src]

Bit 15 - Correct transfer for reception

impl R<u16, Reg<u16, _EP6R>>[src]

pub fn ea(&self) -> EA_R[src]

Bits 0:3 - Endpoint address

pub fn stat_tx(&self) -> STAT_TX_R[src]

Bits 4:5 - Status bits, for transmission transfers

pub fn dtog_tx(&self) -> DTOG_TX_R[src]

Bit 6 - Data Toggle, for transmission transfers

pub fn ctr_tx(&self) -> CTR_TX_R[src]

Bit 7 - Correct Transfer for transmission

pub fn ep_kind(&self) -> EP_KIND_R[src]

Bit 8 - Endpoint kind

pub fn ep_type(&self) -> EP_TYPE_R[src]

Bits 9:10 - Endpoint type

pub fn setup(&self) -> SETUP_R[src]

Bit 11 - Setup transaction completed

pub fn stat_rx(&self) -> STAT_RX_R[src]

Bits 12:13 - Status bits, for reception transfers

pub fn dtog_rx(&self) -> DTOG_RX_R[src]

Bit 14 - Data Toggle, for reception transfers

pub fn ctr_rx(&self) -> CTR_RX_R[src]

Bit 15 - Correct transfer for reception

impl R<u16, Reg<u16, _EP7R>>[src]

pub fn ea(&self) -> EA_R[src]

Bits 0:3 - Endpoint address

pub fn stat_tx(&self) -> STAT_TX_R[src]

Bits 4:5 - Status bits, for transmission transfers

pub fn dtog_tx(&self) -> DTOG_TX_R[src]

Bit 6 - Data Toggle, for transmission transfers

pub fn ctr_tx(&self) -> CTR_TX_R[src]

Bit 7 - Correct Transfer for transmission

pub fn ep_kind(&self) -> EP_KIND_R[src]

Bit 8 - Endpoint kind

pub fn ep_type(&self) -> EP_TYPE_R[src]

Bits 9:10 - Endpoint type

pub fn setup(&self) -> SETUP_R[src]

Bit 11 - Setup transaction completed

pub fn stat_rx(&self) -> STAT_RX_R[src]

Bits 12:13 - Status bits, for reception transfers

pub fn dtog_rx(&self) -> DTOG_RX_R[src]

Bit 14 - Data Toggle, for reception transfers

pub fn ctr_rx(&self) -> CTR_RX_R[src]

Bit 15 - Correct transfer for reception

impl R<u16, Reg<u16, _CNTR>>[src]

pub fn fres(&self) -> FRES_R[src]

Bit 0 - Force USB Reset

pub fn pdwn(&self) -> PDWN_R[src]

Bit 1 - Power down

pub fn lpmode(&self) -> LPMODE_R[src]

Bit 2 - Low-power mode

pub fn fsusp(&self) -> FSUSP_R[src]

Bit 3 - Force suspend

pub fn resume(&self) -> RESUME_R[src]

Bit 4 - Resume request

pub fn l1resume(&self) -> L1RESUME_R[src]

Bit 5 - LPM L1 Resume request

pub fn l1reqm(&self) -> L1REQM_R[src]

Bit 7 - LPM L1 state request interrupt mask

pub fn esofm(&self) -> ESOFM_R[src]

Bit 8 - Expected start of frame interrupt mask

pub fn sofm(&self) -> SOFM_R[src]

Bit 9 - Start of frame interrupt mask

pub fn resetm(&self) -> RESETM_R[src]

Bit 10 - USB reset interrupt mask

pub fn suspm(&self) -> SUSPM_R[src]

Bit 11 - Suspend mode interrupt mask

pub fn wkupm(&self) -> WKUPM_R[src]

Bit 12 - Wakeup interrupt mask

pub fn errm(&self) -> ERRM_R[src]

Bit 13 - Error interrupt mask

pub fn pmaovrm(&self) -> PMAOVRM_R[src]

Bit 14 - Packet memory area over / underrun interrupt mask

pub fn ctrm(&self) -> CTRM_R[src]

Bit 15 - Correct transfer interrupt mask

impl R<u16, Reg<u16, _ISTR>>[src]

pub fn ep_id(&self) -> EP_ID_R[src]

Bits 0:3 - Endpoint Identifier

pub fn dir(&self) -> DIR_R[src]

Bit 4 - Direction of transaction

pub fn l1req(&self) -> L1REQ_R[src]

Bit 7 - LPM L1 state request

pub fn esof(&self) -> ESOF_R[src]

Bit 8 - Expected start frame

pub fn sof(&self) -> SOF_R[src]

Bit 9 - start of frame

pub fn reset(&self) -> RESET_R[src]

Bit 10 - reset request

pub fn susp(&self) -> SUSP_R[src]

Bit 11 - Suspend mode request

pub fn wkup(&self) -> WKUP_R[src]

Bit 12 - Wakeup

pub fn err(&self) -> ERR_R[src]

Bit 13 - Error

pub fn pmaovr(&self) -> PMAOVR_R[src]

Bit 14 - Packet memory area over / underrun

pub fn ctr(&self) -> CTR_R[src]

Bit 15 - Correct transfer

impl R<u16, Reg<u16, _FNR>>[src]

pub fn fn_(&self) -> FN_R[src]

Bits 0:10 - Frame number

pub fn lsof(&self) -> LSOF_R[src]

Bits 11:12 - Lost SOF

pub fn lck(&self) -> LCK_R[src]

Bit 13 - Locked

pub fn rxdm(&self) -> RXDM_R[src]

Bit 14 - Receive data - line status

pub fn rxdp(&self) -> RXDP_R[src]

Bit 15 - Receive data + line status

impl R<u16, Reg<u16, _DADDR>>[src]

pub fn add(&self) -> ADD_R[src]

Bits 0:6 - Device address

pub fn ef(&self) -> EF_R[src]

Bit 7 - Enable function

impl R<u16, Reg<u16, _BTABLE>>[src]

pub fn btable(&self) -> BTABLE_R[src]

Bits 3:15 - Buffer table

impl R<u16, Reg<u16, _LPMCSR>>[src]

pub fn lpmen(&self) -> LPMEN_R[src]

Bit 0 - LPM support enable

pub fn lpmack(&self) -> LPMACK_R[src]

Bit 1 - LPM Token acknowledge enable

pub fn remwake(&self) -> REMWAKE_R[src]

Bit 3 - RemoteWake value

pub fn besl(&self) -> BESL_R[src]

Bits 4:7 - BESL value

impl R<u16, Reg<u16, _BCDR>>[src]

pub fn bcden(&self) -> BCDEN_R[src]

Bit 0 - Battery charging detector (BCD) enable

pub fn dcden(&self) -> DCDEN_R[src]

Bit 1 - Data contact detection (DCD) mode enable

pub fn pden(&self) -> PDEN_R[src]

Bit 2 - Primary detection (PD) mode enable

pub fn sden(&self) -> SDEN_R[src]

Bit 3 - Secondary detection (SD) mode enable

pub fn dcdet(&self) -> DCDET_R[src]

Bit 4 - Data contact detection (DCD) status

pub fn pdet(&self) -> PDET_R[src]

Bit 5 - Primary detection (PD) status

pub fn sdet(&self) -> SDET_R[src]

Bit 6 - Secondary detection (SD) status

pub fn ps2det(&self) -> PS2DET_R[src]

Bit 7 - DM pull-up detection status

pub fn dppu(&self) -> DPPU_R[src]

Bit 15 - DP pull-up control

impl R<u16, Reg<u16, _COUNT0_TX>>[src]

pub fn count0_tx(&self) -> COUNT0_TX_R[src]

Bits 0:9 - Transmission byte count

impl R<u16, Reg<u16, _COUNT1_TX>>[src]

pub fn count1_tx(&self) -> COUNT1_TX_R[src]

Bits 0:9 - Transmission byte count

impl R<u16, Reg<u16, _COUNT2_TX>>[src]

pub fn count2_tx(&self) -> COUNT2_TX_R[src]

Bits 0:9 - Transmission byte count

impl R<u16, Reg<u16, _COUNT3_TX>>[src]

pub fn count3_tx(&self) -> COUNT3_TX_R[src]

Bits 0:9 - Transmission byte count

impl R<u16, Reg<u16, _COUNT4_TX>>[src]

pub fn count4_tx(&self) -> COUNT4_TX_R[src]

Bits 0:9 - Transmission byte count

impl R<u16, Reg<u16, _COUNT5_TX>>[src]

pub fn count5_tx(&self) -> COUNT5_TX_R[src]

Bits 0:9 - Transmission byte count

impl R<u16, Reg<u16, _COUNT6_TX>>[src]

pub fn count6_tx(&self) -> COUNT6_TX_R[src]

Bits 0:9 - Transmission byte count

impl R<u16, Reg<u16, _COUNT7_TX>>[src]

pub fn count7_tx(&self) -> COUNT7_TX_R[src]

Bits 0:9 - Transmission byte count

impl R<u16, Reg<u16, _ADDR0_RX>>[src]

pub fn addr0_rx(&self) -> ADDR0_RX_R[src]

Bits 1:15 - Reception buffer address

impl R<u16, Reg<u16, _ADDR1_RX>>[src]

pub fn addr1_rx(&self) -> ADDR1_RX_R[src]

Bits 1:15 - Reception buffer address

impl R<u16, Reg<u16, _ADDR2_RX>>[src]

pub fn addr2_rx(&self) -> ADDR2_RX_R[src]

Bits 1:15 - Reception buffer address

impl R<u16, Reg<u16, _ADDR3_RX>>[src]

pub fn addr3_rx(&self) -> ADDR3_RX_R[src]

Bits 1:15 - Reception buffer address

impl R<u16, Reg<u16, _ADDR4_RX>>[src]

pub fn addr4_rx(&self) -> ADDR4_RX_R[src]

Bits 1:15 - Reception buffer address

impl R<u16, Reg<u16, _ADDR5_RX>>[src]

pub fn addr5_rx(&self) -> ADDR5_RX_R[src]

Bits 1:15 - Reception buffer address

impl R<u16, Reg<u16, _ADDR6_RX>>[src]

pub fn addr6_rx(&self) -> ADDR6_RX_R[src]

Bits 1:15 - Reception buffer address

impl R<u16, Reg<u16, _ADDR7_RX>>[src]

pub fn addr7_rx(&self) -> ADDR7_RX_R[src]

Bits 1:15 - Reception buffer address

impl R<u16, Reg<u16, _COUNT0_RX>>[src]

pub fn count0_rx(&self) -> COUNT0_RX_R[src]

Bits 0:9 - Reception byte count

pub fn num_block(&self) -> NUM_BLOCK_R[src]

Bits 10:14 - Number of blocks

pub fn bl_size(&self) -> BL_SIZE_R[src]

Bit 15 - Block size

impl R<u16, Reg<u16, _COUNT1_RX>>[src]

pub fn count1_rx(&self) -> COUNT1_RX_R[src]

Bits 0:9 - Reception byte count

pub fn num_block(&self) -> NUM_BLOCK_R[src]

Bits 10:14 - Number of blocks

pub fn bl_size(&self) -> BL_SIZE_R[src]

Bit 15 - Block size

impl R<u16, Reg<u16, _COUNT2_RX>>[src]

pub fn count2_rx(&self) -> COUNT2_RX_R[src]

Bits 0:9 - Reception byte count

pub fn num_block(&self) -> NUM_BLOCK_R[src]

Bits 10:14 - Number of blocks

pub fn bl_size(&self) -> BL_SIZE_R[src]

Bit 15 - Block size

impl R<u16, Reg<u16, _COUNT3_RX>>[src]

pub fn count3_rx(&self) -> COUNT3_RX_R[src]

Bits 0:9 - Reception byte count

pub fn num_block(&self) -> NUM_BLOCK_R[src]

Bits 10:14 - Number of blocks

pub fn bl_size(&self) -> BL_SIZE_R[src]

Bit 15 - Block size

impl R<u16, Reg<u16, _COUNT4_RX>>[src]

pub fn count4_rx(&self) -> COUNT4_RX_R[src]

Bits 0:9 - Reception byte count

pub fn num_block(&self) -> NUM_BLOCK_R[src]

Bits 10:14 - Number of blocks

pub fn bl_size(&self) -> BL_SIZE_R[src]

Bit 15 - Block size

impl R<u16, Reg<u16, _COUNT5_RX>>[src]

pub fn count5_rx(&self) -> COUNT5_RX_R[src]

Bits 0:9 - Reception byte count

pub fn num_block(&self) -> NUM_BLOCK_R[src]

Bits 10:14 - Number of blocks

pub fn bl_size(&self) -> BL_SIZE_R[src]

Bit 15 - Block size

impl R<u16, Reg<u16, _COUNT6_RX>>[src]

pub fn count6_rx(&self) -> COUNT6_RX_R[src]

Bits 0:9 - Reception byte count

pub fn num_block(&self) -> NUM_BLOCK_R[src]

Bits 10:14 - Number of blocks

pub fn bl_size(&self) -> BL_SIZE_R[src]

Bit 15 - Block size

impl R<u16, Reg<u16, _COUNT7_RX>>[src]

pub fn count7_rx(&self) -> COUNT7_RX_R[src]

Bits 0:9 - Reception byte count

pub fn num_block(&self) -> NUM_BLOCK_R[src]

Bits 10:14 - Number of blocks

pub fn bl_size(&self) -> BL_SIZE_R[src]

Bit 15 - Block size

impl R<u32, Reg<u32, _CR>>[src]

pub fn fmode(&self) -> FMODE_R[src]

Bits 28:29 - Functional mode

pub fn pmm(&self) -> PMM_R[src]

Bit 23 - Polling match mode

pub fn apms(&self) -> APMS_R[src]

Bit 22 - Automatic poll mode stop

pub fn toie(&self) -> TOIE_R[src]

Bit 20 - TimeOut interrupt enable

pub fn smie(&self) -> SMIE_R[src]

Bit 19 - Status match interrupt enable

pub fn ftie(&self) -> FTIE_R[src]

Bit 18 - FIFO threshold interrupt enable

pub fn tcie(&self) -> TCIE_R[src]

Bit 17 - Transfer complete interrupt enable

pub fn teie(&self) -> TEIE_R[src]

Bit 16 - Transfer error interrupt enable

pub fn fthres(&self) -> FTHRES_R[src]

Bits 8:12 - IFO threshold level

pub fn fsel(&self) -> FSEL_R[src]

Bit 7 - FLASH memory selection

pub fn dqm(&self) -> DQM_R[src]

Bit 6 - Dual-quad mode

pub fn tcen(&self) -> TCEN_R[src]

Bit 3 - Timeout counter enable

pub fn dmaen(&self) -> DMAEN_R[src]

Bit 2 - DMA enable

pub fn abort(&self) -> ABORT_R[src]

Bit 1 - Abort request

pub fn en(&self) -> EN_R[src]

Bit 0 - Enable

impl R<u32, Reg<u32, _DCR1>>[src]

pub fn ckmode(&self) -> CKMODE_R[src]

Bit 0 - Mode 0 / mode 3

pub fn frck(&self) -> FRCK_R[src]

Bit 1 - Free running clock

pub fn csht(&self) -> CSHT_R[src]

Bits 8:10 - Chip-select high time

pub fn devsize(&self) -> DEVSIZE_R[src]

Bits 16:20 - Device size

pub fn mtyp(&self) -> MTYP_R[src]

Bits 24:25 - Memory type

impl R<u32, Reg<u32, _DCR2>>[src]

pub fn prescaler(&self) -> PRESCALER_R[src]

Bits 0:7 - Clock prescaler

pub fn wrapsize(&self) -> WRAPSIZE_R[src]

Bits 16:18 - Wrap size

impl R<u32, Reg<u32, _DCR3>>[src]

pub fn csbound(&self) -> CSBOUND_R[src]

Bits 16:20 - CS boundary

impl R<u32, Reg<u32, _DCR4>>[src]

pub fn tef(&self) -> TEF_R[src]

Bit 0 - Transfer error flag

pub fn tcf(&self) -> TCF_R[src]

Bit 1 - Transfer complete flag

pub fn ftf(&self) -> FTF_R[src]

Bit 2 - FIFO threshold flag

pub fn smf(&self) -> SMF_R[src]

Bit 3 - Status match flag

pub fn tof(&self) -> TOF_R[src]

Bit 4 - Timeout flag

pub fn busy(&self) -> BUSY_R[src]

Bit 5 - BUSY

pub fn flevel(&self) -> FLEVEL_R[src]

Bits 8:13 - FIFO level

impl R<u32, Reg<u32, _FCR>>[src]

pub fn dl(&self) -> DL_R[src]

Bits 0:31 - Data length

impl R<u32, Reg<u32, _DLR>>[src]

pub fn address(&self) -> ADDRESS_R[src]

Bits 0:31 - ADDRESS

impl R<u32, Reg<u32, _AR>>[src]

pub fn data(&self) -> DATA_R[src]

Bits 0:31 - Data

impl R<u32, Reg<u32, _DR>>[src]

pub fn mask(&self) -> MASK_R[src]

Bits 0:31 - Status mask

impl R<u32, Reg<u32, _PSMKR>>[src]

pub fn match_(&self) -> MATCH_R[src]

Bits 0:31 - Status match

impl R<u32, Reg<u32, _PSMAR>>[src]

pub fn interval(&self) -> INTERVAL_R[src]

Bits 0:15 - Polling interval

impl R<u32, Reg<u32, _PIR>>[src]

pub fn imode(&self) -> IMODE_R[src]

Bits 0:2 - Instruction mode

pub fn idtr(&self) -> IDTR_R[src]

Bit 3 - Instruction double transfer rate

pub fn isize(&self) -> ISIZE_R[src]

Bits 4:5 - Instruction size

pub fn admode(&self) -> ADMODE_R[src]

Bits 8:10 - Address mode

pub fn addtr(&self) -> ADDTR_R[src]

Bit 11 - Address double transfer rate

pub fn adsize(&self) -> ADSIZE_R[src]

Bits 12:13 - Address size

pub fn abmode(&self) -> ABMODE_R[src]

Bits 16:18 - Alternate byte mode

pub fn abdtr(&self) -> ABDTR_R[src]

Bit 19 - Alternate bytes double transfer rate

pub fn absize(&self) -> ABSIZE_R[src]

Bits 20:21 - Alternate bytes size

pub fn dmode(&self) -> DMODE_R[src]

Bits 24:26 - Data mode

pub fn ddtr(&self) -> DDTR_R[src]

Bit 27 - Alternate bytes double transfer rate

pub fn dqse(&self) -> DQSE_R[src]

Bit 29 - DQS enable

pub fn sioo(&self) -> SIOO_R[src]

Bit 31 - Send instruction only once mode

impl R<u32, Reg<u32, _CCR>>[src]

pub fn dcyc(&self) -> DCYC_R[src]

Bits 0:4 - Number of dummy cycles

pub fn dhqc(&self) -> DHQC_R[src]

Bit 28 - Delay hold quarter cycle

pub fn sshift(&self) -> SSHIFT_R[src]

Bit 30 - Sample shift

impl R<u32, Reg<u32, _TCR>>[src]

pub fn instruction(&self) -> INSTRUCTION_R[src]

Bits 0:31 - INSTRUCTION

impl R<u32, Reg<u32, _IR>>[src]

pub fn alternate(&self) -> ALTERNATE_R[src]

Bits 0:31 - Alternate bytes

impl R<u32, Reg<u32, _ABR>>[src]

pub fn timeout(&self) -> TIMEOUT_R[src]

Bits 0:15 - Timeout period

impl R<u32, Reg<u32, _LPTR>>[src]

pub fn imode(&self) -> IMODE_R[src]

Bits 0:2 - Instruction mode

pub fn idtr(&self) -> IDTR_R[src]

Bit 3 - Instruction double transfer rate

pub fn isize(&self) -> ISIZE_R[src]

Bits 4:5 - Instruction size

pub fn admode(&self) -> ADMODE_R[src]

Bits 8:10 - Address mode

pub fn addtr(&self) -> ADDTR_R[src]

Bit 11 - Address double transfer rate

pub fn adsize(&self) -> ADSIZE_R[src]

Bits 12:13 - Address size

pub fn abmode(&self) -> ABMODE_R[src]

Bits 16:18 - Alternate byte mode

pub fn abdtr(&self) -> ABDTR_R[src]

Bit 19 - Alternate bytes double transfer rate

pub fn absize(&self) -> ABSIZE_R[src]

Bits 20:21 - Alternate bytes size

pub fn dmode(&self) -> DMODE_R[src]

Bits 24:26 - Data mode

pub fn ddtr(&self) -> DDTR_R[src]

Bit 27 - alternate bytes double transfer rate

pub fn dqse(&self) -> DQSE_R[src]

Bit 29 - DQS enable

impl R<u32, Reg<u32, _WPCCR>>[src]

pub fn dcyc(&self) -> DCYC_R[src]

Bits 0:4 - Number of dummy cycles

pub fn dhqc(&self) -> DHQC_R[src]

Bit 28 - Delay hold quarter cycle

pub fn sshift(&self) -> SSHIFT_R[src]

Bit 30 - Sample shift

impl R<u32, Reg<u32, _WPTCR>>[src]

pub fn instruction(&self) -> INSTRUCTION_R[src]

Bits 0:31 - INSTRUCTION

impl R<u32, Reg<u32, _WPIR>>[src]

pub fn alternate(&self) -> ALTERNATE_R[src]

Bits 0:31 - Alternate bytes

impl R<u32, Reg<u32, _WPABR>>[src]

pub fn lm(&self) -> LM_R[src]

Bit 0 - Latency mode

pub fn wzl(&self) -> WZL_R[src]

Bit 1 - Write zero latency

pub fn tacc(&self) -> TACC_R[src]

Bits 8:15 - Access time

pub fn trwr(&self) -> TRWR_R[src]

Bits 16:23 - Read write recovery time

impl R<u32, Reg<u32, _WCCR>>[src]

pub fn refresh(&self) -> REFRESH_R[src]

Bits 0:15 - REFRESH

impl R<u32, Reg<u32, _WTCR>>[src]

pub fn imode(&self) -> IMODE_R[src]

Bits 0:2 - IMODE

pub fn idtr(&self) -> IDTR_R[src]

Bit 3 - IDTR

pub fn isize(&self) -> ISIZE_R[src]

Bits 4:5 - ISIZE

pub fn admode(&self) -> ADMODE_R[src]

Bits 8:10 - ADMODE

pub fn addtr(&self) -> ADDTR_R[src]

Bit 11 - ADDTR

pub fn adsize(&self) -> ADSIZE_R[src]

Bits 12:13 - ADSIZE

pub fn abmode(&self) -> ABMODE_R[src]

Bits 16:18 - ABMODE

pub fn abdtr(&self) -> ABDTR_R[src]

Bit 19 - ABDTR

pub fn absize(&self) -> ABSIZE_R[src]

Bits 20:21 - ABSIZE

pub fn dmode(&self) -> DMODE_R[src]

Bits 24:26 - DMODE

pub fn ddtr(&self) -> DDTR_R[src]

Bit 27 - DDTR

pub fn dqse(&self) -> DQSE_R[src]

Bit 29 - DQSE

impl R<u32, Reg<u32, _WIR>>[src]

pub fn dcyc(&self) -> DCYC_R[src]

Bits 0:4 - DCYC

impl R<u32, Reg<u32, _WABR>>[src]

pub fn instruction(&self) -> INSTRUCTION_R[src]

Bits 0:31 - INSTRUCTION

impl R<u32, Reg<u32, _HLCR>>[src]

pub fn alternate(&self) -> ALTERNATE_R[src]

Bits 0:31 - Alternate bytes

impl R<u32, Reg<u32, _CR1>>[src]

pub fn m1(&self) -> M1_R[src]

Bit 28 - Word length

pub fn deat(&self) -> DEAT_R[src]

Bits 21:25 - DEAT

pub fn dedt(&self) -> DEDT_R[src]

Bits 16:20 - DEDT

pub fn cmie(&self) -> CMIE_R[src]

Bit 14 - Character match interrupt enable

pub fn mme(&self) -> MME_R[src]

Bit 13 - Mute mode enable

pub fn m0(&self) -> M0_R[src]

Bit 12 - Word length

pub fn wake(&self) -> WAKE_R[src]

Bit 11 - Receiver wakeup method

pub fn pce(&self) -> PCE_R[src]

Bit 10 - Parity control enable

pub fn ps(&self) -> PS_R[src]

Bit 9 - Parity selection

pub fn peie(&self) -> PEIE_R[src]

Bit 8 - PE interrupt enable

pub fn txeie(&self) -> TXEIE_R[src]

Bit 7 - interrupt enable

pub fn tcie(&self) -> TCIE_R[src]

Bit 6 - Transmission complete interrupt enable

pub fn rxneie(&self) -> RXNEIE_R[src]

Bit 5 - RXNE interrupt enable

pub fn idleie(&self) -> IDLEIE_R[src]

Bit 4 - IDLE interrupt enable

pub fn te(&self) -> TE_R[src]

Bit 3 - Transmitter enable

pub fn re(&self) -> RE_R[src]

Bit 2 - Receiver enable

pub fn uesm(&self) -> UESM_R[src]

Bit 1 - USART enable in Stop mode

pub fn ue(&self) -> UE_R[src]

Bit 0 - USART enable

pub fn fifoen(&self) -> FIFOEN_R[src]

Bit 29 - FIFOEN

pub fn txfeie(&self) -> TXFEIE_R[src]

Bit 30 - TXFEIE

pub fn rxffie(&self) -> RXFFIE_R[src]

Bit 31 - RXFFIE

impl R<u32, Reg<u32, _CR2>>[src]

pub fn add4_7(&self) -> ADD4_7_R[src]

Bits 28:31 - Address of the USART node

pub fn add0_3(&self) -> ADD0_3_R[src]

Bits 24:27 - Address of the USART node

pub fn msbfirst(&self) -> MSBFIRST_R[src]

Bit 19 - Most significant bit first

pub fn tainv(&self) -> TAINV_R[src]

Bit 18 - Binary data inversion

pub fn txinv(&self) -> TXINV_R[src]

Bit 17 - TX pin active level inversion

pub fn rxinv(&self) -> RXINV_R[src]

Bit 16 - RX pin active level inversion

pub fn swap(&self) -> SWAP_R[src]

Bit 15 - Swap TX/RX pins

pub fn stop(&self) -> STOP_R[src]

Bits 12:13 - STOP bits

pub fn addm7(&self) -> ADDM7_R[src]

Bit 4 - 7-bit Address Detection/4-bit Address Detection

impl R<u32, Reg<u32, _CR3>>[src]

pub fn wufie(&self) -> WUFIE_R[src]

Bit 22 - Wakeup from Stop mode interrupt enable

pub fn wus(&self) -> WUS_R[src]

Bits 20:21 - Wakeup from Stop mode interrupt flag selection

pub fn dep(&self) -> DEP_R[src]

Bit 15 - Driver enable polarity selection

pub fn dem(&self) -> DEM_R[src]

Bit 14 - Driver enable mode

pub fn ddre(&self) -> DDRE_R[src]

Bit 13 - DMA Disable on Reception Error

pub fn ovrdis(&self) -> OVRDIS_R[src]

Bit 12 - Overrun Disable

pub fn ctsie(&self) -> CTSIE_R[src]

Bit 10 - CTS interrupt enable

pub fn ctse(&self) -> CTSE_R[src]

Bit 9 - CTS enable

pub fn rtse(&self) -> RTSE_R[src]

Bit 8 - RTS enable

pub fn dmat(&self) -> DMAT_R[src]

Bit 7 - DMA enable transmitter

pub fn dmar(&self) -> DMAR_R[src]

Bit 6 - DMA enable receiver

pub fn hdsel(&self) -> HDSEL_R[src]

Bit 3 - Half-duplex selection

pub fn eie(&self) -> EIE_R[src]

Bit 0 - Error interrupt enable

pub fn txftie(&self) -> TXFTIE_R[src]

Bit 23 - TXFTIE

pub fn rxftcfg(&self) -> RXFTCFG_R[src]

Bits 25:27 - RXFTCFG

pub fn rxftie(&self) -> RXFTIE_R[src]

Bit 28 - RXFTIE

pub fn txftcfg(&self) -> TXFTCFG_R[src]

Bits 29:31 - TXFTCFG

impl R<u32, Reg<u32, _BRR>>[src]

pub fn brr(&self) -> BRR_R[src]

Bits 0:19 - BRR

impl R<u32, Reg<u32, _ISR>>[src]

pub fn reack(&self) -> REACK_R[src]

Bit 22 - REACK

pub fn teack(&self) -> TEACK_R[src]

Bit 21 - TEACK

pub fn wuf(&self) -> WUF_R[src]

Bit 20 - WUF

pub fn rwu(&self) -> RWU_R[src]

Bit 19 - RWU

pub fn sbkf(&self) -> SBKF_R[src]

Bit 18 - SBKF

pub fn cmf(&self) -> CMF_R[src]

Bit 17 - CMF

pub fn busy(&self) -> BUSY_R[src]

Bit 16 - BUSY

pub fn cts(&self) -> CTS_R[src]

Bit 10 - CTS

pub fn ctsif(&self) -> CTSIF_R[src]

Bit 9 - CTSIF

pub fn txe(&self) -> TXE_R[src]

Bit 7 - TXE

pub fn tc(&self) -> TC_R[src]

Bit 6 - TC

pub fn rxne(&self) -> RXNE_R[src]

Bit 5 - RXNE

pub fn idle(&self) -> IDLE_R[src]

Bit 4 - IDLE

pub fn ore(&self) -> ORE_R[src]

Bit 3 - ORE

pub fn nf(&self) -> NF_R[src]

Bit 2 - NF

pub fn fe(&self) -> FE_R[src]

Bit 1 - FE

pub fn pe(&self) -> PE_R[src]

Bit 0 - PE

pub fn txfe(&self) -> TXFE_R[src]

Bit 23 - TXFE

pub fn rxff(&self) -> RXFF_R[src]

Bit 24 - RXFF

pub fn rxft(&self) -> RXFT_R[src]

Bit 26 - RXFT

pub fn txft(&self) -> TXFT_R[src]

Bit 27 - TXFT

impl R<u32, Reg<u32, _RDR>>[src]

pub fn rdr(&self) -> RDR_R[src]

Bits 0:8 - Receive data value

impl R<u32, Reg<u32, _TDR>>[src]

pub fn tdr(&self) -> TDR_R[src]

Bits 0:8 - Transmit data value

impl R<u32, Reg<u32, _PRESC>>[src]

pub fn prescaler(&self) -> PRESCALER_R[src]

Bits 0:3 - PRESCALER

impl R<u32, Reg<u32, _COMP1_CSR>>[src]

pub fn comp1_en(&self) -> COMP1_EN_R[src]

Bit 0 - Comparator 1 enable bit

pub fn comp1_pwrmode(&self) -> COMP1_PWRMODE_R[src]

Bits 2:3 - Power Mode of the comparator 1

pub fn comp1_inmsel(&self) -> COMP1_INMSEL_R[src]

Bits 4:6 - Comparator 1 Input Minus connection configuration bit

pub fn comp1_inpsel(&self) -> COMP1_INPSEL_R[src]

Bit 7 - Comparator1 input plus selection bit

pub fn comp1_polarity(&self) -> COMP1_POLARITY_R[src]

Bit 15 - Comparator 1 polarity selection bit

pub fn comp1_hyst(&self) -> COMP1_HYST_R[src]

Bits 16:17 - Comparator 1 hysteresis selection bits

pub fn comp1_blanking(&self) -> COMP1_BLANKING_R[src]

Bits 18:20 - Comparator 1 blanking source selection bits

pub fn comp1_brgen(&self) -> COMP1_BRGEN_R[src]

Bit 22 - Scaler bridge enable

pub fn comp1_scalen(&self) -> COMP1_SCALEN_R[src]

Bit 23 - Voltage scaler enable bit

pub fn comp1_value(&self) -> COMP1_VALUE_R[src]

Bit 30 - Comparator 1 output status bit

impl R<u32, Reg<u32, _COMP2_CSR>>[src]

pub fn comp2_en(&self) -> COMP2_EN_R[src]

Bit 0 - Comparator 2 enable bit

pub fn comp2_pwrmode(&self) -> COMP2_PWRMODE_R[src]

Bits 2:3 - Power Mode of the comparator 2

pub fn comp2_inmsel(&self) -> COMP2_INMSEL_R[src]

Bits 4:6 - Comparator 2 Input Minus connection configuration bit

pub fn comp2_inpsel(&self) -> COMP2_INPSEL_R[src]

Bit 7 - Comparator 2 Input Plus connection configuration bit

pub fn comp2_winmode(&self) -> COMP2_WINMODE_R[src]

Bit 9 - Windows mode selection bit

pub fn comp2_polarity(&self) -> COMP2_POLARITY_R[src]

Bit 15 - Comparator 2 polarity selection bit

pub fn comp2_hyst(&self) -> COMP2_HYST_R[src]

Bits 16:17 - Comparator 2 hysteresis selection bits

pub fn comp2_blanking(&self) -> COMP2_BLANKING_R[src]

Bits 18:20 - Comparator 2 blanking source selection bits

pub fn comp2_brgen(&self) -> COMP2_BRGEN_R[src]

Bit 22 - Scaler bridge enable

pub fn comp2_scalen(&self) -> COMP2_SCALEN_R[src]

Bit 23 - Voltage scaler enable bit

pub fn comp2_value(&self) -> COMP2_VALUE_R[src]

Bit 30 - Comparator 2 output status bit

impl R<u32, Reg<u32, _CSR>>[src]

pub fn envr(&self) -> ENVR_R[src]

Bit 0 - Voltage reference buffer enable

pub fn hiz(&self) -> HIZ_R[src]

Bit 1 - High impedance mode

pub fn vrs(&self) -> VRS_R[src]

Bit 2 - Voltage reference scale

pub fn vrr(&self) -> VRR_R[src]

Bit 3 - Voltage reference buffer ready

impl R<u32, Reg<u32, _CCR>>[src]

pub fn trim(&self) -> TRIM_R[src]

Bits 0:5 - Trimming code

impl R<u32, Reg<u32, _CR>>[src]

pub fn ctph(&self) -> CTPH_R[src]

Bits 28:31 - Charge transfer pulse high

pub fn ctpl(&self) -> CTPL_R[src]

Bits 24:27 - Charge transfer pulse low

pub fn ssd(&self) -> SSD_R[src]

Bits 17:23 - Spread spectrum deviation

pub fn sse(&self) -> SSE_R[src]

Bit 16 - Spread spectrum enable

pub fn sspsc(&self) -> SSPSC_R[src]

Bit 15 - Spread spectrum prescaler

pub fn pgpsc(&self) -> PGPSC_R[src]

Bits 12:14 - pulse generator prescaler

pub fn mcv(&self) -> MCV_R[src]

Bits 5:7 - Max count value

pub fn iodef(&self) -> IODEF_R[src]

Bit 4 - I/O Default mode

pub fn syncpol(&self) -> SYNCPOL_R[src]

Bit 3 - Synchronization pin polarity

pub fn am(&self) -> AM_R[src]

Bit 2 - Acquisition mode

pub fn start(&self) -> START_R[src]

Bit 1 - Start a new acquisition

pub fn tsce(&self) -> TSCE_R[src]

Bit 0 - Touch sensing controller enable

impl R<u32, Reg<u32, _IER>>[src]

pub fn mceie(&self) -> MCEIE_R[src]

Bit 1 - Max count error interrupt enable

pub fn eoaie(&self) -> EOAIE_R[src]

Bit 0 - End of acquisition interrupt enable

impl R<u32, Reg<u32, _ICR>>[src]

pub fn mceic(&self) -> MCEIC_R[src]

Bit 1 - Max count error interrupt clear

pub fn eoaic(&self) -> EOAIC_R[src]

Bit 0 - End of acquisition interrupt clear

impl R<u32, Reg<u32, _ISR>>[src]

pub fn mcef(&self) -> MCEF_R[src]

Bit 1 - Max count error flag

pub fn eoaf(&self) -> EOAF_R[src]

Bit 0 - End of acquisition flag

impl R<u32, Reg<u32, _IOHCR>>[src]

pub fn g8_io4(&self) -> G8_IO4_R[src]

Bit 31 - G8_IO4

pub fn g8_io3(&self) -> G8_IO3_R[src]

Bit 30 - G8_IO3

pub fn g8_io2(&self) -> G8_IO2_R[src]

Bit 29 - G8_IO2

pub fn g8_io1(&self) -> G8_IO1_R[src]

Bit 28 - G8_IO1

pub fn g7_io4(&self) -> G7_IO4_R[src]

Bit 27 - G7_IO4

pub fn g7_io3(&self) -> G7_IO3_R[src]

Bit 26 - G7_IO3

pub fn g7_io2(&self) -> G7_IO2_R[src]

Bit 25 - G7_IO2

pub fn g7_io1(&self) -> G7_IO1_R[src]

Bit 24 - G7_IO1

pub fn g6_io4(&self) -> G6_IO4_R[src]

Bit 23 - G6_IO4

pub fn g6_io3(&self) -> G6_IO3_R[src]

Bit 22 - G6_IO3

pub fn g6_io2(&self) -> G6_IO2_R[src]

Bit 21 - G6_IO2

pub fn g6_io1(&self) -> G6_IO1_R[src]

Bit 20 - G6_IO1

pub fn g5_io4(&self) -> G5_IO4_R[src]

Bit 19 - G5_IO4

pub fn g5_io3(&self) -> G5_IO3_R[src]

Bit 18 - G5_IO3

pub fn g5_io2(&self) -> G5_IO2_R[src]

Bit 17 - G5_IO2

pub fn g5_io1(&self) -> G5_IO1_R[src]

Bit 16 - G5_IO1

pub fn g4_io4(&self) -> G4_IO4_R[src]

Bit 15 - G4_IO4

pub fn g4_io3(&self) -> G4_IO3_R[src]

Bit 14 - G4_IO3

pub fn g4_io2(&self) -> G4_IO2_R[src]

Bit 13 - G4_IO2

pub fn g4_io1(&self) -> G4_IO1_R[src]

Bit 12 - G4_IO1

pub fn g3_io4(&self) -> G3_IO4_R[src]

Bit 11 - G3_IO4

pub fn g3_io3(&self) -> G3_IO3_R[src]

Bit 10 - G3_IO3

pub fn g3_io2(&self) -> G3_IO2_R[src]

Bit 9 - G3_IO2

pub fn g3_io1(&self) -> G3_IO1_R[src]

Bit 8 - G3_IO1

pub fn g2_io4(&self) -> G2_IO4_R[src]

Bit 7 - G2_IO4

pub fn g2_io3(&self) -> G2_IO3_R[src]

Bit 6 - G2_IO3

pub fn g2_io2(&self) -> G2_IO2_R[src]

Bit 5 - G2_IO2

pub fn g2_io1(&self) -> G2_IO1_R[src]

Bit 4 - G2_IO1

pub fn g1_io4(&self) -> G1_IO4_R[src]

Bit 3 - G1_IO4

pub fn g1_io3(&self) -> G1_IO3_R[src]

Bit 2 - G1_IO3

pub fn g1_io2(&self) -> G1_IO2_R[src]

Bit 1 - G1_IO2

pub fn g1_io1(&self) -> G1_IO1_R[src]

Bit 0 - G1_IO1

impl R<u32, Reg<u32, _IOASCR>>[src]

pub fn g8_io4(&self) -> G8_IO4_R[src]

Bit 31 - G8_IO4

pub fn g8_io3(&self) -> G8_IO3_R[src]

Bit 30 - G8_IO3

pub fn g8_io2(&self) -> G8_IO2_R[src]

Bit 29 - G8_IO2

pub fn g8_io1(&self) -> G8_IO1_R[src]

Bit 28 - G8_IO1

pub fn g7_io4(&self) -> G7_IO4_R[src]

Bit 27 - G7_IO4

pub fn g7_io3(&self) -> G7_IO3_R[src]

Bit 26 - G7_IO3

pub fn g7_io2(&self) -> G7_IO2_R[src]

Bit 25 - G7_IO2

pub fn g7_io1(&self) -> G7_IO1_R[src]

Bit 24 - G7_IO1

pub fn g6_io4(&self) -> G6_IO4_R[src]

Bit 23 - G6_IO4

pub fn g6_io3(&self) -> G6_IO3_R[src]

Bit 22 - G6_IO3

pub fn g6_io2(&self) -> G6_IO2_R[src]

Bit 21 - G6_IO2

pub fn g6_io1(&self) -> G6_IO1_R[src]

Bit 20 - G6_IO1

pub fn g5_io4(&self) -> G5_IO4_R[src]

Bit 19 - G5_IO4

pub fn g5_io3(&self) -> G5_IO3_R[src]

Bit 18 - G5_IO3

pub fn g5_io2(&self) -> G5_IO2_R[src]

Bit 17 - G5_IO2

pub fn g5_io1(&self) -> G5_IO1_R[src]

Bit 16 - G5_IO1

pub fn g4_io4(&self) -> G4_IO4_R[src]

Bit 15 - G4_IO4

pub fn g4_io3(&self) -> G4_IO3_R[src]

Bit 14 - G4_IO3

pub fn g4_io2(&self) -> G4_IO2_R[src]

Bit 13 - G4_IO2

pub fn g4_io1(&self) -> G4_IO1_R[src]

Bit 12 - G4_IO1

pub fn g3_io4(&self) -> G3_IO4_R[src]

Bit 11 - G3_IO4

pub fn g3_io3(&self) -> G3_IO3_R[src]

Bit 10 - G3_IO3

pub fn g3_io2(&self) -> G3_IO2_R[src]

Bit 9 - G3_IO2

pub fn g3_io1(&self) -> G3_IO1_R[src]

Bit 8 - G3_IO1

pub fn g2_io4(&self) -> G2_IO4_R[src]

Bit 7 - G2_IO4

pub fn g2_io3(&self) -> G2_IO3_R[src]

Bit 6 - G2_IO3

pub fn g2_io2(&self) -> G2_IO2_R[src]

Bit 5 - G2_IO2

pub fn g2_io1(&self) -> G2_IO1_R[src]

Bit 4 - G2_IO1

pub fn g1_io4(&self) -> G1_IO4_R[src]

Bit 3 - G1_IO4

pub fn g1_io3(&self) -> G1_IO3_R[src]

Bit 2 - G1_IO3

pub fn g1_io2(&self) -> G1_IO2_R[src]

Bit 1 - G1_IO2

pub fn g1_io1(&self) -> G1_IO1_R[src]

Bit 0 - G1_IO1

impl R<u32, Reg<u32, _IOSCR>>[src]

pub fn g8_io4(&self) -> G8_IO4_R[src]

Bit 31 - G8_IO4

pub fn g8_io3(&self) -> G8_IO3_R[src]

Bit 30 - G8_IO3

pub fn g8_io2(&self) -> G8_IO2_R[src]

Bit 29 - G8_IO2

pub fn g8_io1(&self) -> G8_IO1_R[src]

Bit 28 - G8_IO1

pub fn g7_io4(&self) -> G7_IO4_R[src]

Bit 27 - G7_IO4

pub fn g7_io3(&self) -> G7_IO3_R[src]

Bit 26 - G7_IO3

pub fn g7_io2(&self) -> G7_IO2_R[src]

Bit 25 - G7_IO2

pub fn g7_io1(&self) -> G7_IO1_R[src]

Bit 24 - G7_IO1

pub fn g6_io4(&self) -> G6_IO4_R[src]

Bit 23 - G6_IO4

pub fn g6_io3(&self) -> G6_IO3_R[src]

Bit 22 - G6_IO3

pub fn g6_io2(&self) -> G6_IO2_R[src]

Bit 21 - G6_IO2

pub fn g6_io1(&self) -> G6_IO1_R[src]

Bit 20 - G6_IO1

pub fn g5_io4(&self) -> G5_IO4_R[src]

Bit 19 - G5_IO4

pub fn g5_io3(&self) -> G5_IO3_R[src]

Bit 18 - G5_IO3

pub fn g5_io2(&self) -> G5_IO2_R[src]

Bit 17 - G5_IO2

pub fn g5_io1(&self) -> G5_IO1_R[src]

Bit 16 - G5_IO1

pub fn g4_io4(&self) -> G4_IO4_R[src]

Bit 15 - G4_IO4

pub fn g4_io3(&self) -> G4_IO3_R[src]

Bit 14 - G4_IO3

pub fn g4_io2(&self) -> G4_IO2_R[src]

Bit 13 - G4_IO2

pub fn g4_io1(&self) -> G4_IO1_R[src]

Bit 12 - G4_IO1

pub fn g3_io4(&self) -> G3_IO4_R[src]

Bit 11 - G3_IO4

pub fn g3_io3(&self) -> G3_IO3_R[src]

Bit 10 - G3_IO3

pub fn g3_io2(&self) -> G3_IO2_R[src]

Bit 9 - G3_IO2

pub fn g3_io1(&self) -> G3_IO1_R[src]

Bit 8 - G3_IO1

pub fn g2_io4(&self) -> G2_IO4_R[src]

Bit 7 - G2_IO4

pub fn g2_io3(&self) -> G2_IO3_R[src]

Bit 6 - G2_IO3

pub fn g2_io2(&self) -> G2_IO2_R[src]

Bit 5 - G2_IO2

pub fn g2_io1(&self) -> G2_IO1_R[src]

Bit 4 - G2_IO1

pub fn g1_io4(&self) -> G1_IO4_R[src]

Bit 3 - G1_IO4

pub fn g1_io3(&self) -> G1_IO3_R[src]

Bit 2 - G1_IO3

pub fn g1_io2(&self) -> G1_IO2_R[src]

Bit 1 - G1_IO2

pub fn g1_io1(&self) -> G1_IO1_R[src]

Bit 0 - G1_IO1

impl R<u32, Reg<u32, _IOCCR>>[src]

pub fn g8_io4(&self) -> G8_IO4_R[src]

Bit 31 - G8_IO4

pub fn g8_io3(&self) -> G8_IO3_R[src]

Bit 30 - G8_IO3

pub fn g8_io2(&self) -> G8_IO2_R[src]

Bit 29 - G8_IO2

pub fn g8_io1(&self) -> G8_IO1_R[src]

Bit 28 - G8_IO1

pub fn g7_io4(&self) -> G7_IO4_R[src]

Bit 27 - G7_IO4

pub fn g7_io3(&self) -> G7_IO3_R[src]

Bit 26 - G7_IO3

pub fn g7_io2(&self) -> G7_IO2_R[src]

Bit 25 - G7_IO2

pub fn g7_io1(&self) -> G7_IO1_R[src]

Bit 24 - G7_IO1

pub fn g6_io4(&self) -> G6_IO4_R[src]

Bit 23 - G6_IO4

pub fn g6_io3(&self) -> G6_IO3_R[src]

Bit 22 - G6_IO3

pub fn g6_io2(&self) -> G6_IO2_R[src]

Bit 21 - G6_IO2

pub fn g6_io1(&self) -> G6_IO1_R[src]

Bit 20 - G6_IO1

pub fn g5_io4(&self) -> G5_IO4_R[src]

Bit 19 - G5_IO4

pub fn g5_io3(&self) -> G5_IO3_R[src]

Bit 18 - G5_IO3

pub fn g5_io2(&self) -> G5_IO2_R[src]

Bit 17 - G5_IO2

pub fn g5_io1(&self) -> G5_IO1_R[src]

Bit 16 - G5_IO1

pub fn g4_io4(&self) -> G4_IO4_R[src]

Bit 15 - G4_IO4

pub fn g4_io3(&self) -> G4_IO3_R[src]

Bit 14 - G4_IO3

pub fn g4_io2(&self) -> G4_IO2_R[src]

Bit 13 - G4_IO2

pub fn g4_io1(&self) -> G4_IO1_R[src]

Bit 12 - G4_IO1

pub fn g3_io4(&self) -> G3_IO4_R[src]

Bit 11 - G3_IO4

pub fn g3_io3(&self) -> G3_IO3_R[src]

Bit 10 - G3_IO3

pub fn g3_io2(&self) -> G3_IO2_R[src]

Bit 9 - G3_IO2

pub fn g3_io1(&self) -> G3_IO1_R[src]

Bit 8 - G3_IO1

pub fn g2_io4(&self) -> G2_IO4_R[src]

Bit 7 - G2_IO4

pub fn g2_io3(&self) -> G2_IO3_R[src]

Bit 6 - G2_IO3

pub fn g2_io2(&self) -> G2_IO2_R[src]

Bit 5 - G2_IO2

pub fn g2_io1(&self) -> G2_IO1_R[src]

Bit 4 - G2_IO1

pub fn g1_io4(&self) -> G1_IO4_R[src]

Bit 3 - G1_IO4

pub fn g1_io3(&self) -> G1_IO3_R[src]

Bit 2 - G1_IO3

pub fn g1_io2(&self) -> G1_IO2_R[src]

Bit 1 - G1_IO2

pub fn g1_io1(&self) -> G1_IO1_R[src]

Bit 0 - G1_IO1

impl R<u32, Reg<u32, _IOGCSR>>[src]

pub fn g8s(&self) -> G8S_R[src]

Bit 23 - Analog I/O group x status

pub fn g7s(&self) -> G7S_R[src]

Bit 22 - Analog I/O group x status

pub fn g6s(&self) -> G6S_R[src]

Bit 21 - Analog I/O group x status

pub fn g5s(&self) -> G5S_R[src]

Bit 20 - Analog I/O group x status

pub fn g4s(&self) -> G4S_R[src]

Bit 19 - Analog I/O group x status

pub fn g3s(&self) -> G3S_R[src]

Bit 18 - Analog I/O group x status

pub fn g2s(&self) -> G2S_R[src]

Bit 17 - Analog I/O group x status

pub fn g1s(&self) -> G1S_R[src]

Bit 16 - Analog I/O group x status

pub fn g8e(&self) -> G8E_R[src]

Bit 7 - Analog I/O group x enable

pub fn g7e(&self) -> G7E_R[src]

Bit 6 - Analog I/O group x enable

pub fn g6e(&self) -> G6E_R[src]

Bit 5 - Analog I/O group x enable

pub fn g5e(&self) -> G5E_R[src]

Bit 4 - Analog I/O group x enable

pub fn g4e(&self) -> G4E_R[src]

Bit 3 - Analog I/O group x enable

pub fn g3e(&self) -> G3E_R[src]

Bit 2 - Analog I/O group x enable

pub fn g2e(&self) -> G2E_R[src]

Bit 1 - Analog I/O group x enable

pub fn g1e(&self) -> G1E_R[src]

Bit 0 - Analog I/O group x enable

impl R<u32, Reg<u32, _IOG1CR>>[src]

pub fn cnt(&self) -> CNT_R[src]

Bits 0:13 - Counter value

impl R<u32, Reg<u32, _IOG2CR>>[src]

pub fn cnt(&self) -> CNT_R[src]

Bits 0:13 - Counter value

impl R<u32, Reg<u32, _IOG3CR>>[src]

pub fn cnt(&self) -> CNT_R[src]

Bits 0:13 - Counter value

impl R<u32, Reg<u32, _IOG4CR>>[src]

pub fn cnt(&self) -> CNT_R[src]

Bits 0:13 - Counter value

impl R<u32, Reg<u32, _IOG5CR>>[src]

pub fn cnt(&self) -> CNT_R[src]

Bits 0:13 - Counter value

impl R<u32, Reg<u32, _IOG6CR>>[src]

pub fn cnt(&self) -> CNT_R[src]

Bits 0:13 - Counter value

impl R<u32, Reg<u32, _IOG7CR>>[src]

pub fn cnt(&self) -> CNT_R[src]

Bits 0:13 - Counter value

impl R<u32, Reg<u32, _IOG8CR>>[src]

pub fn cnt(&self) -> CNT_R[src]

Bits 0:13 - Counter value

impl R<u32, Reg<u32, _CFG1>>[src]

pub fn hbitclkdiv(&self) -> HBITCLKDIV_R[src]

Bits 0:5 - HBITCLKDIV

pub fn ifrgap(&self) -> IFRGAP_R[src]

Bits 6:10 - IFRGAP

pub fn transwin(&self) -> TRANSWIN_R[src]

Bits 11:15 - TRANSWIN

pub fn psc_usbpdclk(&self) -> PSC_USBPDCLK_R[src]

Bits 17:19 - PSC_USBPDCLK

pub fn rxordseten(&self) -> RXORDSETEN_R[src]

Bits 20:28 - RXORDSETEN

pub fn txdmaen(&self) -> TXDMAEN_R[src]

Bit 29 - TXDMAEN

pub fn rxdmaen(&self) -> RXDMAEN_R[src]

Bit 30 - RXDMAEN:

pub fn ucpden(&self) -> UCPDEN_R[src]

Bit 31 - UCPDEN

impl R<u32, Reg<u32, _CFG2>>[src]

pub fn rxfiltdis(&self) -> RXFILTDIS_R[src]

Bit 0 - RXFILTDIS

pub fn rxfilt2n3(&self) -> RXFILT2N3_R[src]

Bit 1 - RXFILT2N3

pub fn forceclk(&self) -> FORCECLK_R[src]

Bit 2 - FORCECLK

pub fn wupen(&self) -> WUPEN_R[src]

Bit 3 - WUPEN

impl R<u32, Reg<u32, _CFG3>>[src]

pub fn trim1_ng_ccrpd(&self) -> TRIM1_NG_CCRPD_R[src]

Bits 0:3 - TRIM1_NG_CCRPD

pub fn trim1_ng_cc1a5(&self) -> TRIM1_NG_CC1A5_R[src]

Bits 4:8 - TRIM1_NG_CC1A5

pub fn trim1_ng_cc3a0(&self) -> TRIM1_NG_CC3A0_R[src]

Bits 9:12 - TRIM1_NG_CC3A0

pub fn trim2_ng_ccrpd(&self) -> TRIM2_NG_CCRPD_R[src]

Bits 16:19 - TRIM2_NG_CCRPD

pub fn trim2_ng_cc1a5(&self) -> TRIM2_NG_CC1A5_R[src]

Bits 20:24 - TRIM2_NG_CC1A5

pub fn trim2_ng_cc3a0(&self) -> TRIM2_NG_CC3A0_R[src]

Bits 25:28 - TRIM2_NG_CC3A0

impl R<u32, Reg<u32, _CR>>[src]

pub fn txmode(&self) -> TXMODE_R[src]

Bits 0:1 - TXMODE

pub fn txsend(&self) -> TXSEND_R[src]

Bit 2 - TXSEND

pub fn txhrst(&self) -> TXHRST_R[src]

Bit 3 - TXHRST

pub fn rxmode(&self) -> RXMODE_R[src]

Bit 4 - RXMODE

pub fn phyrxen(&self) -> PHYRXEN_R[src]

Bit 5 - PHYRXEN

pub fn phyccsel(&self) -> PHYCCSEL_R[src]

Bit 6 - PHYCCSEL

pub fn anasubmode(&self) -> ANASUBMODE_R[src]

Bits 7:8 - ANASUBMODE

pub fn anamode(&self) -> ANAMODE_R[src]

Bit 9 - ANAMODE

pub fn ccenable(&self) -> CCENABLE_R[src]

Bits 10:11 - CCENABLE

pub fn frsrxen(&self) -> FRSRXEN_R[src]

Bit 16 - FRSRXEN

pub fn frstx(&self) -> FRSTX_R[src]

Bit 17 - FRSTX

pub fn rdch(&self) -> RDCH_R[src]

Bit 18 - RDCH

pub fn cc1tcdis(&self) -> CC1TCDIS_R[src]

Bit 20 - CC1TCDIS

pub fn cc2tcdis(&self) -> CC2TCDIS_R[src]

Bit 21 - CC2TCDIS

impl R<u32, Reg<u32, _IMR>>[src]

pub fn txisie(&self) -> TXISIE_R[src]

Bit 0 - TXISIE

pub fn txmsgdiscie(&self) -> TXMSGDISCIE_R[src]

Bit 1 - TXMSGDISCIE

pub fn txmsgsentie(&self) -> TXMSGSENTIE_R[src]

Bit 2 - TXMSGSENTIE

pub fn txmsgabtie(&self) -> TXMSGABTIE_R[src]

Bit 3 - TXMSGABTIE

pub fn hrstdiscie(&self) -> HRSTDISCIE_R[src]

Bit 4 - HRSTDISCIE

pub fn hrstsentie(&self) -> HRSTSENTIE_R[src]

Bit 5 - HRSTSENTIE

pub fn txundie(&self) -> TXUNDIE_R[src]

Bit 6 - TXUNDIE

pub fn rxneie(&self) -> RXNEIE_R[src]

Bit 8 - RXNEIE

pub fn rxorddetie(&self) -> RXORDDETIE_R[src]

Bit 9 - RXORDDETIE

pub fn rxhrstdetie(&self) -> RXHRSTDETIE_R[src]

Bit 10 - RXHRSTDETIE

pub fn rxovrie(&self) -> RXOVRIE_R[src]

Bit 11 - RXOVRIE

pub fn rxmsgendie(&self) -> RXMSGENDIE_R[src]

Bit 12 - RXMSGENDIE

pub fn typecevt1ie(&self) -> TYPECEVT1IE_R[src]

Bit 14 - TYPECEVT1IE

pub fn typecevt2ie(&self) -> TYPECEVT2IE_R[src]

Bit 15 - TYPECEVT2IE

pub fn frsevtie(&self) -> FRSEVTIE_R[src]

Bit 20 - FRSEVTIE

impl R<u32, Reg<u32, _SR>>[src]

pub fn txis(&self) -> TXIS_R[src]

Bit 0 - TXIS

pub fn txmsgdisc(&self) -> TXMSGDISC_R[src]

Bit 1 - TXMSGDISC

pub fn txmsgsent(&self) -> TXMSGSENT_R[src]

Bit 2 - TXMSGSENT

pub fn txmsgabt(&self) -> TXMSGABT_R[src]

Bit 3 - TXMSGABT

pub fn hrstdisc(&self) -> HRSTDISC_R[src]

Bit 4 - HRSTDISC

pub fn hrstsent(&self) -> HRSTSENT_R[src]

Bit 5 - HRSTSENT

pub fn txund(&self) -> TXUND_R[src]

Bit 6 - TXUND

pub fn rxne(&self) -> RXNE_R[src]

Bit 8 - RXNE

pub fn rxorddet(&self) -> RXORDDET_R[src]

Bit 9 - RXORDDET

pub fn rxhrstdet(&self) -> RXHRSTDET_R[src]

Bit 10 - RXHRSTDET

pub fn rxovr(&self) -> RXOVR_R[src]

Bit 11 - RXOVR

pub fn rxmsgend(&self) -> RXMSGEND_R[src]

Bit 12 - RXMSGEND

pub fn rxerr(&self) -> RXERR_R[src]

Bit 13 - RXERR

pub fn typecevt1(&self) -> TYPECEVT1_R[src]

Bit 14 - TYPECEVT1

pub fn typecevt2(&self) -> TYPECEVT2_R[src]

Bit 15 - TYPECEVT2

pub fn typec_vstate_cc1(&self) -> TYPEC_VSTATE_CC1_R[src]

Bits 16:17 - TYPEC_VSTATE_CC1

pub fn typec_vstate_cc2(&self) -> TYPEC_VSTATE_CC2_R[src]

Bits 18:19 - TYPEC_VSTATE_CC2

pub fn frsevt(&self) -> FRSEVT_R[src]

Bit 20 - FRSEVT

impl R<u32, Reg<u32, _ICR>>[src]

pub fn txmsgdisccf(&self) -> TXMSGDISCCF_R[src]

Bit 1 - TXMSGDISCCF

pub fn txmsgsentcf(&self) -> TXMSGSENTCF_R[src]

Bit 2 - TXMSGSENTCF

pub fn txmsgabtcf(&self) -> TXMSGABTCF_R[src]

Bit 3 - TXMSGABTCF

pub fn hrstdisccf(&self) -> HRSTDISCCF_R[src]

Bit 4 - HRSTDISCCF

pub fn hrstsentcf(&self) -> HRSTSENTCF_R[src]

Bit 5 - HRSTSENTCF

pub fn txundcf(&self) -> TXUNDCF_R[src]

Bit 6 - TXUNDCF

pub fn rxorddetcf(&self) -> RXORDDETCF_R[src]

Bit 9 - RXORDDETCF

pub fn rxhrstdetcf(&self) -> RXHRSTDETCF_R[src]

Bit 10 - RXHRSTDETCF

pub fn rxovrcf(&self) -> RXOVRCF_R[src]

Bit 11 - RXOVRCF

pub fn rxmsgendcf(&self) -> RXMSGENDCF_R[src]

Bit 12 - RXMSGENDCF

pub fn typecevt1cf(&self) -> TYPECEVT1CF_R[src]

Bit 14 - TYPECEVT1CF

pub fn typecevt2cf(&self) -> TYPECEVT2CF_R[src]

Bit 15 - TYPECEVT2CF

pub fn frsevtcf(&self) -> FRSEVTCF_R[src]

Bit 20 - FRSEVTCF

impl R<u32, Reg<u32, _TX_ORDSET>>[src]

pub fn txordset(&self) -> TXORDSET_R[src]

Bits 0:19 - TXORDSET

impl R<u32, Reg<u32, _TX_PAYSZ>>[src]

pub fn txpaysz(&self) -> TXPAYSZ_R[src]

Bits 0:9 - TXPAYSZ

impl R<u32, Reg<u32, _TXDR>>[src]

pub fn txdata(&self) -> TXDATA_R[src]

Bits 0:7 - TXDATA

impl R<u32, Reg<u32, _RX_ORDSET>>[src]

pub fn rxordset(&self) -> RXORDSET_R[src]

Bits 0:2 - RXORDSET

pub fn rxsop3of4(&self) -> RXSOP3OF4_R[src]

Bit 3 - RXSOP3OF4

pub fn rxsopkinvalid(&self) -> RXSOPKINVALID_R[src]

Bits 4:6 - RXSOPKINVALID

impl R<u32, Reg<u32, _RX_PAYSZ>>[src]

pub fn rxpaysz(&self) -> RXPAYSZ_R[src]

Bits 0:9 - RXPAYSZ

impl R<u32, Reg<u32, _RXDR>>[src]

pub fn rxdata(&self) -> RXDATA_R[src]

Bits 0:7 - RXDATA

impl R<u32, Reg<u32, _RX_ORDEXT1>>[src]

pub fn rxsopx1(&self) -> RXSOPX1_R[src]

Bits 0:19 - RXSOPX1

impl R<u32, Reg<u32, _RX_ORDEXT2>>[src]

pub fn rxsopx2(&self) -> RXSOPX2_R[src]

Bits 0:19 - RXSOPX2

impl R<u32, Reg<u32, _FDCAN_CREL>>[src]

pub fn rel(&self) -> REL_R[src]

Bits 28:31 - Core release

pub fn step(&self) -> STEP_R[src]

Bits 24:27 - Step of Core release

pub fn substep(&self) -> SUBSTEP_R[src]

Bits 20:23 - Sub-step of Core release

pub fn year(&self) -> YEAR_R[src]

Bits 16:19 - Timestamp Year

pub fn mon(&self) -> MON_R[src]

Bits 8:15 - Timestamp Month

pub fn day(&self) -> DAY_R[src]

Bits 0:7 - Timestamp Day

impl R<u32, Reg<u32, _FDCAN_ENDN>>[src]

pub fn etv(&self) -> ETV_R[src]

Bits 0:31 - Endiannes Test Value

impl R<u32, Reg<u32, _FDCAN_DBTP>>[src]

pub fn dsjw(&self) -> DSJW_R[src]

Bits 0:3 - Synchronization Jump Width

pub fn dtseg2(&self) -> DTSEG2_R[src]

Bits 4:7 - Data time segment after sample point

pub fn dtseg1(&self) -> DTSEG1_R[src]

Bits 8:12 - Data time segment after sample point

pub fn dbrp(&self) -> DBRP_R[src]

Bits 16:20 - Data BIt Rate Prescaler

pub fn tdc(&self) -> TDC_R[src]

Bit 23 - Transceiver Delay Compensation

impl R<u32, Reg<u32, _FDCAN_TEST>>[src]

pub fn lbck(&self) -> LBCK_R[src]

Bit 4 - Loop Back mode

pub fn tx(&self) -> TX_R[src]

Bits 5:6 - Loop Back mode

pub fn rx(&self) -> RX_R[src]

Bit 7 - Control of Transmit Pin

impl R<u32, Reg<u32, _FDCAN_RWD>>[src]

pub fn wdv(&self) -> WDV_R[src]

Bits 8:15 - Watchdog value

pub fn wdc(&self) -> WDC_R[src]

Bits 0:7 - Watchdog configuration

impl R<u32, Reg<u32, _FDCAN_CCCR>>[src]

pub fn init(&self) -> INIT_R[src]

Bit 0 - Initialization

pub fn cce(&self) -> CCE_R[src]

Bit 1 - Configuration Change Enable

pub fn asm(&self) -> ASM_R[src]

Bit 2 - ASM Restricted Operation Mode

pub fn csa(&self) -> CSA_R[src]

Bit 3 - Clock Stop Acknowledge

pub fn csr(&self) -> CSR_R[src]

Bit 4 - Clock Stop Request

pub fn mon(&self) -> MON_R[src]

Bit 5 - Bus Monitoring Mode

pub fn dar(&self) -> DAR_R[src]

Bit 6 - Disable Automatic Retransmission

pub fn test(&self) -> TEST_R[src]

Bit 7 - Test Mode Enable

pub fn fdoe(&self) -> FDOE_R[src]

Bit 8 - FD Operation Enable

pub fn bse(&self) -> BSE_R[src]

Bit 9 - FDCAN Bit Rate Switching

pub fn pxhd(&self) -> PXHD_R[src]

Bit 12 - Protocol Exception Handling Disable

pub fn efbi(&self) -> EFBI_R[src]

Bit 13 - Edge Filtering during Bus Integration

pub fn txp(&self) -> TXP_R[src]

Bit 14 - TXP

pub fn niso(&self) -> NISO_R[src]

Bit 15 - Non ISO Operation

impl R<u32, Reg<u32, _FDCAN_NBTP>>[src]

pub fn nsjw(&self) -> NSJW_R[src]

Bits 25:31 - NSJW: Nominal (Re)Synchronization Jump Width

pub fn nbrp(&self) -> NBRP_R[src]

Bits 16:24 - Bit Rate Prescaler

pub fn ntseg1(&self) -> NTSEG1_R[src]

Bits 8:15 - Nominal Time segment before sample point

pub fn tseg2(&self) -> TSEG2_R[src]

Bits 0:6 - Nominal Time segment after sample point

impl R<u32, Reg<u32, _FDCAN_TSCC>>[src]

pub fn tcp(&self) -> TCP_R[src]

Bits 16:19 - Timestamp Counter Prescaler

pub fn tss(&self) -> TSS_R[src]

Bits 0:1 - Timestamp Select

impl R<u32, Reg<u32, _FDCAN_TSCV>>[src]

pub fn tsc(&self) -> TSC_R[src]

Bits 0:15 - Timestamp Counter

impl R<u32, Reg<u32, _FDCAN_TOCC>>[src]

pub fn etoc(&self) -> ETOC_R[src]

Bit 0 - Enable Timeout Counter

pub fn tos(&self) -> TOS_R[src]

Bits 1:2 - Timeout Select

pub fn top(&self) -> TOP_R[src]

Bits 16:31 - Timeout Period

impl R<u32, Reg<u32, _FDCAN_TOCV>>[src]

pub fn toc(&self) -> TOC_R[src]

Bits 0:15 - Timeout Counter

impl R<u32, Reg<u32, _FDCAN_ECR>>[src]

pub fn cel(&self) -> CEL_R[src]

Bits 16:23 - AN Error Logging

pub fn rp(&self) -> RP_R[src]

Bit 15 - Receive Error Passive

pub fn rec(&self) -> REC_R[src]

Bits 8:14 - Receive Error Counter

pub fn tec(&self) -> TEC_R[src]

Bits 0:7 - Transmit Error Counter

impl R<u32, Reg<u32, _FDCAN_PSR>>[src]

pub fn lec(&self) -> LEC_R[src]

Bits 0:2 - Last Error Code

pub fn act(&self) -> ACT_R[src]

Bits 3:4 - Activity

pub fn ep(&self) -> EP_R[src]

Bit 5 - Error Passive

pub fn ew(&self) -> EW_R[src]

Bit 6 - Warning Status

pub fn bo(&self) -> BO_R[src]

Bit 7 - Bus_Off Status

pub fn dlec(&self) -> DLEC_R[src]

Bits 8:10 - Data Last Error Code

pub fn resi(&self) -> RESI_R[src]

Bit 11 - ESI flag of last received FDCAN Message

pub fn rbrs(&self) -> RBRS_R[src]

Bit 12 - BRS flag of last received FDCAN Message

pub fn redl(&self) -> REDL_R[src]

Bit 13 - Received FDCAN Message

pub fn pxe(&self) -> PXE_R[src]

Bit 14 - Protocol Exception Event

pub fn tdcv(&self) -> TDCV_R[src]

Bits 16:22 - Transmitter Delay Compensation Value

impl R<u32, Reg<u32, _FDCAN_TDCR>>[src]

pub fn tdcf(&self) -> TDCF_R[src]

Bits 0:6 - Transmitter Delay Compensation Filter Window Length

pub fn tdco(&self) -> TDCO_R[src]

Bits 8:14 - Transmitter Delay Compensation Offset

impl R<u32, Reg<u32, _FDCAN_IR>>[src]

pub fn rf0n(&self) -> RF0N_R[src]

Bit 0 - RF0N

pub fn rf0f(&self) -> RF0F_R[src]

Bit 1 - RF0F

pub fn rf0l(&self) -> RF0L_R[src]

Bit 2 - RF0L

pub fn rf1n(&self) -> RF1N_R[src]

Bit 3 - RF1N

pub fn rf1f(&self) -> RF1F_R[src]

Bit 4 - RF1F

pub fn rf1l(&self) -> RF1L_R[src]

Bit 5 - RF1L

pub fn hpm(&self) -> HPM_R[src]

Bit 6 - HPM

pub fn tc(&self) -> TC_R[src]

Bit 7 - TC

pub fn tcf(&self) -> TCF_R[src]

Bit 8 - TCF

pub fn tfe(&self) -> TFE_R[src]

Bit 9 - TFE

pub fn tefn(&self) -> TEFN_R[src]

Bit 10 - TEFN

pub fn teff(&self) -> TEFF_R[src]

Bit 11 - TEFF

pub fn tefl(&self) -> TEFL_R[src]

Bit 12 - TEFL

pub fn tsw(&self) -> TSW_R[src]

Bit 13 - TSW

pub fn mraf(&self) -> MRAF_R[src]

Bit 14 - MRAF

pub fn too(&self) -> TOO_R[src]

Bit 15 - TOO

pub fn elo(&self) -> ELO_R[src]

Bit 16 - ELO

pub fn ep(&self) -> EP_R[src]

Bit 17 - EP

pub fn ew(&self) -> EW_R[src]

Bit 18 - EW

pub fn bo(&self) -> BO_R[src]

Bit 19 - BO

pub fn wdi(&self) -> WDI_R[src]

Bit 20 - WDI

pub fn pea(&self) -> PEA_R[src]

Bit 21 - PEA

pub fn ped(&self) -> PED_R[src]

Bit 22 - PED

pub fn ara(&self) -> ARA_R[src]

Bit 23 - ARA

impl R<u32, Reg<u32, _FDCAN_IE>>[src]

pub fn rf0ne(&self) -> RF0NE_R[src]

Bit 0 - Rx FIFO 0 New Message Enable

pub fn rf0fe(&self) -> RF0FE_R[src]

Bit 1 - Rx FIFO 0 Full Enable

pub fn rf0le(&self) -> RF0LE_R[src]

Bit 2 - Rx FIFO 0 Message Lost Enable

pub fn rf1ne(&self) -> RF1NE_R[src]

Bit 3 - Rx FIFO 1 New Message Enable

pub fn rf1fe(&self) -> RF1FE_R[src]

Bit 4 - Rx FIFO 1 Watermark Reached Enable

pub fn rf1le(&self) -> RF1LE_R[src]

Bit 5 - Rx FIFO 1 Message Lost Enable

pub fn hpme(&self) -> HPME_R[src]

Bit 6 - High Priority Message Enable

pub fn tce(&self) -> TCE_R[src]

Bit 7 - Transmission Completed Enable

pub fn tcfe(&self) -> TCFE_R[src]

Bit 8 - Transmission Cancellation Finished Enable

pub fn tefe(&self) -> TEFE_R[src]

Bit 9 - Tx FIFO Empty Enable

pub fn tefne(&self) -> TEFNE_R[src]

Bit 10 - Tx Event FIFO New Entry Enable

pub fn teffe(&self) -> TEFFE_R[src]

Bit 11 - Tx Event FIFO Full Enable

pub fn tefle(&self) -> TEFLE_R[src]

Bit 12 - Tx Event FIFO Element Lost Enable

pub fn mrafe(&self) -> MRAFE_R[src]

Bit 13 - Message RAM Access Failure Enable

pub fn tooe(&self) -> TOOE_R[src]

Bit 14 - Timeout Occurred Enable

pub fn eloe(&self) -> ELOE_R[src]

Bit 15 - Error Logging Overflow Enable

pub fn epe(&self) -> EPE_R[src]

Bit 16 - Error Passive Enable

pub fn ewe(&self) -> EWE_R[src]

Bit 17 - Warning Status Enable

pub fn boe(&self) -> BOE_R[src]

Bit 18 - Bus_Off Status Enable

pub fn wdie(&self) -> WDIE_R[src]

Bit 19 - Watchdog Interrupt Enable

pub fn peae(&self) -> PEAE_R[src]

Bit 20 - Protocol Error in Arbitration Phase Enable

pub fn pede(&self) -> PEDE_R[src]

Bit 21 - Protocol Error in Data Phase Enable

pub fn arae(&self) -> ARAE_R[src]

Bit 22 - Access to Reserved Address Enable

impl R<u32, Reg<u32, _FDCAN_ILS>>[src]

pub fn rx_fifo0(&self) -> RXFIFO0_R[src]

Bit 0 - RxFIFO0

pub fn rx_fifo1(&self) -> RXFIFO1_R[src]

Bit 1 - RxFIFO1

pub fn smsg(&self) -> SMSG_R[src]

Bit 2 - SMSG

pub fn tferr(&self) -> TFERR_R[src]

Bit 3 - TFERR

pub fn misc(&self) -> MISC_R[src]

Bit 4 - MISC

pub fn berr(&self) -> BERR_R[src]

Bit 5 - BERR

pub fn perr(&self) -> PERR_R[src]

Bit 6 - PERR

impl R<u32, Reg<u32, _FDCAN_ILE>>[src]

pub fn eint0(&self) -> EINT0_R[src]

Bit 0 - Enable Interrupt Line 0

pub fn eint1(&self) -> EINT1_R[src]

Bit 1 - Enable Interrupt Line 1

impl R<u32, Reg<u32, _FDCAN_RXGFC>>[src]

pub fn rrfe(&self) -> RRFE_R[src]

Bit 0 - Reject Remote Frames Extended

pub fn rrfs(&self) -> RRFS_R[src]

Bit 1 - Reject Remote Frames Standard

pub fn anfe(&self) -> ANFE_R[src]

Bits 2:3 - Accept Non-matching Frames Extended

pub fn anfs(&self) -> ANFS_R[src]

Bits 4:5 - Accept Non-matching Frames Standard

pub fn f1om(&self) -> F1OM_R[src]

Bit 8 - F1OM

pub fn f0om(&self) -> F0OM_R[src]

Bit 9 - F0OM

pub fn lss(&self) -> LSS_R[src]

Bits 16:20 - LSS

pub fn lse(&self) -> LSE_R[src]

Bits 24:27 - LSE

impl R<u32, Reg<u32, _FDCAN_XIDAM>>[src]

pub fn eidm(&self) -> EIDM_R[src]

Bits 0:28 - Extended ID Mask

impl R<u32, Reg<u32, _FDCAN_HPMS>>[src]

pub fn bidx(&self) -> BIDX_R[src]

Bits 0:2 - Buffer Index

pub fn msi(&self) -> MSI_R[src]

Bits 6:7 - Message Storage Indicator

pub fn fidx(&self) -> FIDX_R[src]

Bits 8:12 - Filter Index

pub fn flst(&self) -> FLST_R[src]

Bit 15 - Filter List

impl R<u32, Reg<u32, _FDCAN_RXF0S>>[src]

pub fn f0fl(&self) -> F0FL_R[src]

Bits 0:3 - Rx FIFO 0 Fill Level

pub fn f0gi(&self) -> F0GI_R[src]

Bits 8:9 - Rx FIFO 0 Get Index

pub fn f0pi(&self) -> F0PI_R[src]

Bits 16:17 - Rx FIFO 0 Put Index

pub fn f0f(&self) -> F0F_R[src]

Bit 24 - Rx FIFO 0 Full

pub fn rf0l(&self) -> RF0L_R[src]

Bit 25 - Rx FIFO 0 Message Lost

impl R<u32, Reg<u32, _FDCAN_RXF0A>>[src]

pub fn f0ai(&self) -> F0AI_R[src]

Bits 0:2 - Rx FIFO 0 Acknowledge Index

impl R<u32, Reg<u32, _FDCAN_RXF1S>>[src]

pub fn f1fl(&self) -> F1FL_R[src]

Bits 0:3 - Rx FIFO 1 Fill Level

pub fn f1gi(&self) -> F1GI_R[src]

Bits 8:9 - Rx FIFO 1 Get Index

pub fn f1pi(&self) -> F1PI_R[src]

Bits 16:17 - Rx FIFO 1 Put Index

pub fn f1f(&self) -> F1F_R[src]

Bit 24 - Rx FIFO 1 Full

pub fn rf1l(&self) -> RF1L_R[src]

Bit 25 - Rx FIFO 1 Message Lost

impl R<u32, Reg<u32, _FDCAN_RXF1A>>[src]

pub fn f1ai(&self) -> F1AI_R[src]

Bits 0:2 - Rx FIFO 1 Acknowledge Index

impl R<u32, Reg<u32, _FDCAN_TXFQS>>[src]

pub fn tffl(&self) -> TFFL_R[src]

Bits 0:2 - Tx FIFO Free Level

pub fn tfgi(&self) -> TFGI_R[src]

Bits 8:9 - TFGI

pub fn tfqpi(&self) -> TFQPI_R[src]

Bits 16:17 - Tx FIFO/Queue Put Index

pub fn tfqf(&self) -> TFQF_R[src]

Bit 21 - Tx FIFO/Queue Full

impl R<u32, Reg<u32, _FDCAN_TXBRP>>[src]

pub fn trp(&self) -> TRP_R[src]

Bits 0:2 - Transmission Request Pending

impl R<u32, Reg<u32, _FDCAN_TXBAR>>[src]

pub fn ar(&self) -> AR_R[src]

Bits 0:2 - Add Request

impl R<u32, Reg<u32, _FDCAN_TXBCR>>[src]

pub fn cr(&self) -> CR_R[src]

Bits 0:2 - Cancellation Request

impl R<u32, Reg<u32, _FDCAN_TXBTO>>[src]

pub fn to(&self) -> TO_R[src]

Bits 0:2 - Transmission Occurred.

impl R<u32, Reg<u32, _FDCAN_TXBCF>>[src]

pub fn cf(&self) -> CF_R[src]

Bits 0:2 - Cancellation Finished

impl R<u32, Reg<u32, _FDCAN_TXBTIE>>[src]

pub fn tie(&self) -> TIE_R[src]

Bits 0:2 - Transmission Interrupt Enable

impl R<u32, Reg<u32, _FDCAN_TXBCIE>>[src]

pub fn cf(&self) -> CF_R[src]

Bits 0:2 - Cancellation Finished Interrupt Enable

impl R<u32, Reg<u32, _FDCAN_TXEFS>>[src]

pub fn effl(&self) -> EFFL_R[src]

Bits 0:2 - Event FIFO Fill Level

pub fn efgi(&self) -> EFGI_R[src]

Bits 8:9 - Event FIFO Get Index.

pub fn eff(&self) -> EFF_R[src]

Bit 24 - Event FIFO Full.

pub fn tefl(&self) -> TEFL_R[src]

Bit 25 - Tx Event FIFO Element Lost.

pub fn efpi(&self) -> EFPI_R[src]

Bits 16:17 - Event FIFO Put Index

impl R<u32, Reg<u32, _FDCAN_TXEFA>>[src]

pub fn efai(&self) -> EFAI_R[src]

Bits 0:1 - Event FIFO Acknowledge Index

impl R<u32, Reg<u32, _FDCAN_CKDIV>>[src]

pub fn pdiv(&self) -> PDIV_R[src]

Bits 0:3 - PDIV

impl R<u32, Reg<u32, _FDCAN_TXBC>>[src]

pub fn tfqm(&self) -> TFQM_R[src]

Bit 24 - Tx FIFO/Queue Mode

impl R<u32, Reg<u32, _DR>>[src]

pub fn dr(&self) -> DR_R[src]

Bits 0:31 - Data register bits

impl R<u32, Reg<u32, _IDR>>[src]

pub fn idr(&self) -> IDR_R[src]

Bits 0:7 - General-purpose 8-bit data register bits

impl R<u32, Reg<u32, _CR>>[src]

pub fn rev_out(&self) -> REV_OUT_R[src]

Bit 7 - Reverse output data

pub fn rev_in(&self) -> REV_IN_R[src]

Bits 5:6 - Reverse input data

pub fn polysize(&self) -> POLYSIZE_R[src]

Bits 3:4 - Polynomial size

impl R<u32, Reg<u32, _INIT>>[src]

pub fn crc_init(&self) -> CRC_INIT_R[src]

Bits 0:31 - Programmable initial CRC value

impl R<u32, Reg<u32, _POL>>[src]

pub fn polynomialcoefficients(&self) -> POLYNOMIALCOEFFICIENTS_R[src]

Bits 0:31 - Programmable polynomial

impl R<u32, Reg<u32, _CR>>[src]

pub fn trim(&self) -> TRIM_R[src]

Bits 8:14 - HSI48 oscillator smooth trimming

pub fn swsync(&self) -> SWSYNC_R[src]

Bit 7 - Generate software SYNC event

pub fn autotrimen(&self) -> AUTOTRIMEN_R[src]

Bit 6 - Automatic trimming enable

pub fn cen(&self) -> CEN_R[src]

Bit 5 - Frequency error counter enable

pub fn esyncie(&self) -> ESYNCIE_R[src]

Bit 3 - Expected SYNC interrupt enable

pub fn errie(&self) -> ERRIE_R[src]

Bit 2 - Synchronization or trimming error interrupt enable

pub fn syncwarnie(&self) -> SYNCWARNIE_R[src]

Bit 1 - SYNC warning interrupt enable

pub fn syncokie(&self) -> SYNCOKIE_R[src]

Bit 0 - SYNC event OK interrupt enable

impl R<u32, Reg<u32, _CFGR>>[src]

pub fn syncpol(&self) -> SYNCPOL_R[src]

Bit 31 - SYNC polarity selection

pub fn syncsrc(&self) -> SYNCSRC_R[src]

Bits 28:29 - SYNC signal source selection

pub fn syncdiv(&self) -> SYNCDIV_R[src]

Bits 24:26 - SYNC divider

pub fn felim(&self) -> FELIM_R[src]

Bits 16:23 - Frequency error limit

pub fn reload(&self) -> RELOAD_R[src]

Bits 0:15 - Counter reload value

impl R<u32, Reg<u32, _ISR>>[src]

pub fn fecap(&self) -> FECAP_R[src]

Bits 16:31 - Frequency error capture

pub fn fedir(&self) -> FEDIR_R[src]

Bit 15 - Frequency error direction

pub fn trimovf(&self) -> TRIMOVF_R[src]

Bit 10 - Trimming overflow or underflow

pub fn syncmiss(&self) -> SYNCMISS_R[src]

Bit 9 - SYNC missed

pub fn syncerr(&self) -> SYNCERR_R[src]

Bit 8 - SYNC error

pub fn esyncf(&self) -> ESYNCF_R[src]

Bit 3 - Expected SYNC flag

pub fn errf(&self) -> ERRF_R[src]

Bit 2 - Error flag

pub fn syncwarnf(&self) -> SYNCWARNF_R[src]

Bit 1 - SYNC warning flag

pub fn syncokf(&self) -> SYNCOKF_R[src]

Bit 0 - SYNC event OK flag

impl R<u32, Reg<u32, _ICR>>[src]

pub fn esyncc(&self) -> ESYNCC_R[src]

Bit 3 - Expected SYNC clear flag

pub fn errc(&self) -> ERRC_R[src]

Bit 2 - Error clear flag

pub fn syncwarnc(&self) -> SYNCWARNC_R[src]

Bit 1 - SYNC warning clear flag

pub fn syncokc(&self) -> SYNCOKC_R[src]

Bit 0 - SYNC event OK clear flag

impl R<u32, Reg<u32, _CR1>>[src]

pub fn m1(&self) -> M1_R[src]

Bit 28 - Word length

pub fn eobie(&self) -> EOBIE_R[src]

Bit 27 - End of Block interrupt enable

pub fn rtoie(&self) -> RTOIE_R[src]

Bit 26 - Receiver timeout interrupt enable

pub fn deat4(&self) -> DEAT4_R[src]

Bit 25 - Driver Enable assertion time

pub fn deat3(&self) -> DEAT3_R[src]

Bit 24 - DEAT3

pub fn deat2(&self) -> DEAT2_R[src]

Bit 23 - DEAT2

pub fn deat1(&self) -> DEAT1_R[src]

Bit 22 - DEAT1

pub fn deat0(&self) -> DEAT0_R[src]

Bit 21 - DEAT0

pub fn dedt4(&self) -> DEDT4_R[src]

Bit 20 - Driver Enable de-assertion time

pub fn dedt3(&self) -> DEDT3_R[src]

Bit 19 - DEDT3

pub fn dedt2(&self) -> DEDT2_R[src]

Bit 18 - DEDT2

pub fn dedt1(&self) -> DEDT1_R[src]

Bit 17 - DEDT1

pub fn dedt0(&self) -> DEDT0_R[src]

Bit 16 - DEDT0

pub fn over8(&self) -> OVER8_R[src]

Bit 15 - Oversampling mode

pub fn cmie(&self) -> CMIE_R[src]

Bit 14 - Character match interrupt enable

pub fn mme(&self) -> MME_R[src]

Bit 13 - Mute mode enable

pub fn m0(&self) -> M0_R[src]

Bit 12 - Word length

pub fn wake(&self) -> WAKE_R[src]

Bit 11 - Receiver wakeup method

pub fn pce(&self) -> PCE_R[src]

Bit 10 - Parity control enable

pub fn ps(&self) -> PS_R[src]

Bit 9 - Parity selection

pub fn peie(&self) -> PEIE_R[src]

Bit 8 - PE interrupt enable

pub fn txeie(&self) -> TXEIE_R[src]

Bit 7 - interrupt enable

pub fn tcie(&self) -> TCIE_R[src]

Bit 6 - Transmission complete interrupt enable

pub fn rxneie(&self) -> RXNEIE_R[src]

Bit 5 - RXNE interrupt enable

pub fn idleie(&self) -> IDLEIE_R[src]

Bit 4 - IDLE interrupt enable

pub fn te(&self) -> TE_R[src]

Bit 3 - Transmitter enable

pub fn re(&self) -> RE_R[src]

Bit 2 - Receiver enable

pub fn uesm(&self) -> UESM_R[src]

Bit 1 - USART enable in Stop mode

pub fn ue(&self) -> UE_R[src]

Bit 0 - USART enable

pub fn fifoen(&self) -> FIFOEN_R[src]

Bit 29 - FIFOEN

pub fn txfeie(&self) -> TXFEIE_R[src]

Bit 30 - TXFEIE

pub fn rxffie(&self) -> RXFFIE_R[src]

Bit 31 - RXFFIE

impl R<u32, Reg<u32, _CR2>>[src]

pub fn add4_7(&self) -> ADD4_7_R[src]

Bits 28:31 - Address of the USART node

pub fn add0_3(&self) -> ADD0_3_R[src]

Bits 24:27 - Address of the USART node

pub fn rtoen(&self) -> RTOEN_R[src]

Bit 23 - Receiver timeout enable

pub fn abrmod1(&self) -> ABRMOD1_R[src]

Bit 22 - Auto baud rate mode

pub fn abrmod0(&self) -> ABRMOD0_R[src]

Bit 21 - ABRMOD0

pub fn abren(&self) -> ABREN_R[src]

Bit 20 - Auto baud rate enable

pub fn msbfirst(&self) -> MSBFIRST_R[src]

Bit 19 - Most significant bit first

pub fn datainv(&self) -> DATAINV_R[src]

Bit 18 - Binary data inversion

pub fn txinv(&self) -> TXINV_R[src]

Bit 17 - TX pin active level inversion

pub fn rxinv(&self) -> RXINV_R[src]

Bit 16 - RX pin active level inversion

pub fn swap(&self) -> SWAP_R[src]

Bit 15 - Swap TX/RX pins

pub fn linen(&self) -> LINEN_R[src]

Bit 14 - LIN mode enable

pub fn stop(&self) -> STOP_R[src]

Bits 12:13 - STOP bits

pub fn clken(&self) -> CLKEN_R[src]

Bit 11 - Clock enable

pub fn cpol(&self) -> CPOL_R[src]

Bit 10 - Clock polarity

pub fn cpha(&self) -> CPHA_R[src]

Bit 9 - Clock phase

pub fn lbcl(&self) -> LBCL_R[src]

Bit 8 - Last bit clock pulse

pub fn lbdie(&self) -> LBDIE_R[src]

Bit 6 - LIN break detection interrupt enable

pub fn lbdl(&self) -> LBDL_R[src]

Bit 5 - LIN break detection length

pub fn addm7(&self) -> ADDM7_R[src]

Bit 4 - 7-bit Address Detection/4-bit Address Detection

pub fn slven(&self) -> SLVEN_R[src]

Bit 0 - SLVEN

pub fn dis_nss(&self) -> DIS_NSS_R[src]

Bit 3 - DIS_NSS

impl R<u32, Reg<u32, _CR3>>[src]

pub fn wufie(&self) -> WUFIE_R[src]

Bit 22 - Wakeup from Stop mode interrupt enable

pub fn wus(&self) -> WUS_R[src]

Bits 20:21 - Wakeup from Stop mode interrupt flag selection

pub fn scarcnt(&self) -> SCARCNT_R[src]

Bits 17:19 - Smartcard auto-retry count

pub fn dep(&self) -> DEP_R[src]

Bit 15 - Driver enable polarity selection

pub fn dem(&self) -> DEM_R[src]

Bit 14 - Driver enable mode

pub fn ddre(&self) -> DDRE_R[src]

Bit 13 - DMA Disable on Reception Error

pub fn ovrdis(&self) -> OVRDIS_R[src]

Bit 12 - Overrun Disable

pub fn onebit(&self) -> ONEBIT_R[src]

Bit 11 - One sample bit method enable

pub fn ctsie(&self) -> CTSIE_R[src]

Bit 10 - CTS interrupt enable

pub fn ctse(&self) -> CTSE_R[src]

Bit 9 - CTS enable

pub fn rtse(&self) -> RTSE_R[src]

Bit 8 - RTS enable

pub fn dmat(&self) -> DMAT_R[src]

Bit 7 - DMA enable transmitter

pub fn dmar(&self) -> DMAR_R[src]

Bit 6 - DMA enable receiver

pub fn scen(&self) -> SCEN_R[src]

Bit 5 - Smartcard mode enable

pub fn nack(&self) -> NACK_R[src]

Bit 4 - Smartcard NACK enable

pub fn hdsel(&self) -> HDSEL_R[src]

Bit 3 - Half-duplex selection

pub fn irlp(&self) -> IRLP_R[src]

Bit 2 - Ir low-power

pub fn iren(&self) -> IREN_R[src]

Bit 1 - Ir mode enable

pub fn eie(&self) -> EIE_R[src]

Bit 0 - Error interrupt enable

pub fn txftie(&self) -> TXFTIE_R[src]

Bit 23 - TXFTIE

pub fn tcbgtie(&self) -> TCBGTIE_R[src]

Bit 24 - TCBGTIE

pub fn rxftcfg(&self) -> RXFTCFG_R[src]

Bits 25:27 - RXFTCFG

pub fn rxftie(&self) -> RXFTIE_R[src]

Bit 28 - RXFTIE

pub fn txftcfg(&self) -> TXFTCFG_R[src]

Bits 29:31 - TXFTCFG

impl R<u32, Reg<u32, _BRR>>[src]

pub fn brr(&self) -> BRR_R[src]

Bits 0:15 - BRR

impl R<u32, Reg<u32, _GTPR>>[src]

pub fn gt(&self) -> GT_R[src]

Bits 8:15 - Guard time value

pub fn psc(&self) -> PSC_R[src]

Bits 0:7 - Prescaler value

impl R<u32, Reg<u32, _RTOR>>[src]

pub fn blen(&self) -> BLEN_R[src]

Bits 24:31 - Block Length

pub fn rto(&self) -> RTO_R[src]

Bits 0:23 - Receiver timeout value

impl R<u32, Reg<u32, _ISR>>[src]

pub fn reack(&self) -> REACK_R[src]

Bit 22 - REACK

pub fn teack(&self) -> TEACK_R[src]

Bit 21 - TEACK

pub fn wuf(&self) -> WUF_R[src]

Bit 20 - WUF

pub fn rwu(&self) -> RWU_R[src]

Bit 19 - RWU

pub fn sbkf(&self) -> SBKF_R[src]

Bit 18 - SBKF

pub fn cmf(&self) -> CMF_R[src]

Bit 17 - CMF

pub fn busy(&self) -> BUSY_R[src]

Bit 16 - BUSY

pub fn abrf(&self) -> ABRF_R[src]

Bit 15 - ABRF

pub fn abre(&self) -> ABRE_R[src]

Bit 14 - ABRE

pub fn eobf(&self) -> EOBF_R[src]

Bit 12 - EOBF

pub fn rtof(&self) -> RTOF_R[src]

Bit 11 - RTOF

pub fn cts(&self) -> CTS_R[src]

Bit 10 - CTS

pub fn ctsif(&self) -> CTSIF_R[src]

Bit 9 - CTSIF

pub fn lbdf(&self) -> LBDF_R[src]

Bit 8 - LBDF

pub fn txe(&self) -> TXE_R[src]

Bit 7 - TXE

pub fn tc(&self) -> TC_R[src]

Bit 6 - TC

pub fn rxne(&self) -> RXNE_R[src]

Bit 5 - RXNE

pub fn idle(&self) -> IDLE_R[src]

Bit 4 - IDLE

pub fn ore(&self) -> ORE_R[src]

Bit 3 - ORE

pub fn nf(&self) -> NF_R[src]

Bit 2 - NF

pub fn fe(&self) -> FE_R[src]

Bit 1 - FE

pub fn pe(&self) -> PE_R[src]

Bit 0 - PE

pub fn txfe(&self) -> TXFE_R[src]

Bit 23 - TXFE

pub fn rxff(&self) -> RXFF_R[src]

Bit 24 - RXFF

pub fn tcbgt(&self) -> TCBGT_R[src]

Bit 25 - TCBGT

pub fn rxft(&self) -> RXFT_R[src]

Bit 26 - RXFT

pub fn txft(&self) -> TXFT_R[src]

Bit 27 - TXFT

impl R<u32, Reg<u32, _RDR>>[src]

pub fn rdr(&self) -> RDR_R[src]

Bits 0:8 - Receive data value

impl R<u32, Reg<u32, _TDR>>[src]

pub fn tdr(&self) -> TDR_R[src]

Bits 0:8 - Transmit data value

impl R<u32, Reg<u32, _PRESC>>[src]

pub fn prescaler(&self) -> PRESCALER_R[src]

Bits 0:3 - PRESCALER

impl R<u32, Reg<u32, _CSR>>[src]

pub fn addrdy_mst(&self) -> ADDRDY_MST_R[src]

Bit 0 - ADDRDY_MST

pub fn eosmp_mst(&self) -> EOSMP_MST_R[src]

Bit 1 - EOSMP_MST

pub fn eoc_mst(&self) -> EOC_MST_R[src]

Bit 2 - EOC_MST

pub fn eos_mst(&self) -> EOS_MST_R[src]

Bit 3 - EOS_MST

pub fn ovr_mst(&self) -> OVR_MST_R[src]

Bit 4 - OVR_MST

pub fn jeoc_mst(&self) -> JEOC_MST_R[src]

Bit 5 - JEOC_MST

pub fn jeos_mst(&self) -> JEOS_MST_R[src]

Bit 6 - JEOS_MST

pub fn awd1_mst(&self) -> AWD1_MST_R[src]

Bit 7 - AWD1_MST

pub fn awd2_mst(&self) -> AWD2_MST_R[src]

Bit 8 - AWD2_MST

pub fn awd3_mst(&self) -> AWD3_MST_R[src]

Bit 9 - AWD3_MST

pub fn jqovf_mst(&self) -> JQOVF_MST_R[src]

Bit 10 - JQOVF_MST

pub fn adrdy_slv(&self) -> ADRDY_SLV_R[src]

Bit 16 - ADRDY_SLV

pub fn eosmp_slv(&self) -> EOSMP_SLV_R[src]

Bit 17 - EOSMP_SLV

pub fn eoc_slv(&self) -> EOC_SLV_R[src]

Bit 18 - EOC_SLV

pub fn eos_slv(&self) -> EOS_SLV_R[src]

Bit 19 - EOS_SLV

pub fn ovr_slv(&self) -> OVR_SLV_R[src]

Bit 20 - OVR_SLV

pub fn jeoc_slv(&self) -> JEOC_SLV_R[src]

Bit 21 - JEOC_SLV

pub fn jeos_slv(&self) -> JEOS_SLV_R[src]

Bit 22 - JEOS_SLV

pub fn awd1_slv(&self) -> AWD1_SLV_R[src]

Bit 23 - AWD1_SLV

pub fn awd2_slv(&self) -> AWD2_SLV_R[src]

Bit 24 - AWD2_SLV

pub fn awd3_slv(&self) -> AWD3_SLV_R[src]

Bit 25 - AWD3_SLV

pub fn jqovf_slv(&self) -> JQOVF_SLV_R[src]

Bit 26 - JQOVF_SLV

impl R<u32, Reg<u32, _CCR>>[src]

pub fn ckmode(&self) -> CKMODE_R[src]

Bits 16:17 - ADC clock mode

pub fn presc(&self) -> PRESC_R[src]

Bits 18:21 - ADC prescaler

pub fn vrefen(&self) -> VREFEN_R[src]

Bit 22 - VREFINT enable

pub fn ch17sel(&self) -> CH17SEL_R[src]

Bit 23 - CH17SEL

pub fn ch18sel(&self) -> CH18SEL_R[src]

Bit 24 - CH18SEL

pub fn mdma(&self) -> MDMA_R[src]

Bits 14:15 - MDMA

pub fn dmacfg(&self) -> DMACFG_R[src]

Bit 13 - DMACFG

pub fn delay(&self) -> DELAY_R[src]

Bits 8:10 - DELAY

pub fn dual(&self) -> DUAL_R[src]

Bits 0:4 - DUAL

impl R<u32, Reg<u32, _CDR>>[src]

pub fn rdata_mst(&self) -> RDATA_MST_R[src]

Bits 0:15 - RDATA_MST

pub fn rdata_slv(&self) -> RDATA_SLV_R[src]

Bits 16:31 - RDATA_SLV

impl R<u32, Reg<u32, _ISR>>[src]

pub fn jqovf(&self) -> JQOVF_R[src]

Bit 10 - JQOVF

pub fn awd3(&self) -> AWD3_R[src]

Bit 9 - AWD3

pub fn awd2(&self) -> AWD2_R[src]

Bit 8 - AWD2

pub fn awd1(&self) -> AWD1_R[src]

Bit 7 - AWD1

pub fn jeos(&self) -> JEOS_R[src]

Bit 6 - JEOS

pub fn jeoc(&self) -> JEOC_R[src]

Bit 5 - JEOC

pub fn ovr(&self) -> OVR_R[src]

Bit 4 - OVR

pub fn eos(&self) -> EOS_R[src]

Bit 3 - EOS

pub fn eoc(&self) -> EOC_R[src]

Bit 2 - EOC

pub fn eosmp(&self) -> EOSMP_R[src]

Bit 1 - EOSMP

pub fn adrdy(&self) -> ADRDY_R[src]

Bit 0 - ADRDY

impl R<u32, Reg<u32, _IER>>[src]

pub fn jqovfie(&self) -> JQOVFIE_R[src]

Bit 10 - JQOVFIE

pub fn awd3ie(&self) -> AWD3IE_R[src]

Bit 9 - AWD3IE

pub fn awd2ie(&self) -> AWD2IE_R[src]

Bit 8 - AWD2IE

pub fn awd1ie(&self) -> AWD1IE_R[src]

Bit 7 - AWD1IE

pub fn jeosie(&self) -> JEOSIE_R[src]

Bit 6 - JEOSIE

pub fn jeocie(&self) -> JEOCIE_R[src]

Bit 5 - JEOCIE

pub fn ovrie(&self) -> OVRIE_R[src]

Bit 4 - OVRIE

pub fn eosie(&self) -> EOSIE_R[src]

Bit 3 - EOSIE

pub fn eocie(&self) -> EOCIE_R[src]

Bit 2 - EOCIE

pub fn eosmpie(&self) -> EOSMPIE_R[src]

Bit 1 - EOSMPIE

pub fn adrdyie(&self) -> ADRDYIE_R[src]

Bit 0 - ADRDYIE

impl R<u32, Reg<u32, _CR>>[src]

pub fn adcal(&self) -> ADCAL_R[src]

Bit 31 - ADCAL

pub fn adcaldif(&self) -> ADCALDIF_R[src]

Bit 30 - ADCALDIF

pub fn deeppwd(&self) -> DEEPPWD_R[src]

Bit 29 - DEEPPWD

pub fn advregen(&self) -> ADVREGEN_R[src]

Bit 28 - ADVREGEN

pub fn jadstp(&self) -> JADSTP_R[src]

Bit 5 - JADSTP

pub fn adstp(&self) -> ADSTP_R[src]

Bit 4 - ADSTP

pub fn jadstart(&self) -> JADSTART_R[src]

Bit 3 - JADSTART

pub fn adstart(&self) -> ADSTART_R[src]

Bit 2 - ADSTART

pub fn addis(&self) -> ADDIS_R[src]

Bit 1 - ADDIS

pub fn aden(&self) -> ADEN_R[src]

Bit 0 - ADEN

impl R<u32, Reg<u32, _CFGR>>[src]

pub fn jqdis(&self) -> JQDIS_R[src]

Bit 31 - JQDIS

pub fn awdch1ch(&self) -> AWDCH1CH_R[src]

Bits 26:30 - AWDCH1CH

pub fn jauto(&self) -> JAUTO_R[src]

Bit 25 - JAUTO

pub fn jawd1en(&self) -> JAWD1EN_R[src]

Bit 24 - JAWD1EN

pub fn awd1en(&self) -> AWD1EN_R[src]

Bit 23 - AWD1EN

pub fn awd1sgl(&self) -> AWD1SGL_R[src]

Bit 22 - AWD1SGL

pub fn jqm(&self) -> JQM_R[src]

Bit 21 - JQM

pub fn jdiscen(&self) -> JDISCEN_R[src]

Bit 20 - JDISCEN

pub fn discnum(&self) -> DISCNUM_R[src]

Bits 17:19 - DISCNUM

pub fn discen(&self) -> DISCEN_R[src]

Bit 16 - DISCEN

pub fn autdly(&self) -> AUTDLY_R[src]

Bit 14 - AUTDLY

pub fn cont(&self) -> CONT_R[src]

Bit 13 - CONT

pub fn ovrmod(&self) -> OVRMOD_R[src]

Bit 12 - OVRMOD

pub fn exten(&self) -> EXTEN_R[src]

Bits 10:11 - EXTEN

pub fn extsel(&self) -> EXTSEL_R[src]

Bits 6:9 - EXTSEL

pub fn align(&self) -> ALIGN_R[src]

Bit 5 - ALIGN

pub fn res(&self) -> RES_R[src]

Bits 3:4 - RES

pub fn dmacfg(&self) -> DMACFG_R[src]

Bit 1 - DMACFG

pub fn dmaen(&self) -> DMAEN_R[src]

Bit 0 - DMAEN

impl R<u32, Reg<u32, _CFGR2>>[src]

pub fn rovsm(&self) -> ROVSM_R[src]

Bit 10 - EXTEN

pub fn tovs(&self) -> TOVS_R[src]

Bit 9 - EXTSEL

pub fn ovss(&self) -> OVSS_R[src]

Bits 5:8 - ALIGN

pub fn ovsr(&self) -> OVSR_R[src]

Bits 2:4 - RES

pub fn jovse(&self) -> JOVSE_R[src]

Bit 1 - DMACFG

pub fn rovse(&self) -> ROVSE_R[src]

Bit 0 - DMAEN

impl R<u32, Reg<u32, _SMPR1>>[src]

pub fn smp9(&self) -> SMP9_R[src]

Bits 27:29 - SMP9

pub fn smp8(&self) -> SMP8_R[src]

Bits 24:26 - SMP8

pub fn smp7(&self) -> SMP7_R[src]

Bits 21:23 - SMP7

pub fn smp6(&self) -> SMP6_R[src]

Bits 18:20 - SMP6

pub fn smp5(&self) -> SMP5_R[src]

Bits 15:17 - SMP5

pub fn smp4(&self) -> SMP4_R[src]

Bits 12:14 - SMP4

pub fn smp3(&self) -> SMP3_R[src]

Bits 9:11 - SMP3

pub fn smp2(&self) -> SMP2_R[src]

Bits 6:8 - SMP2

pub fn smp1(&self) -> SMP1_R[src]

Bits 3:5 - SMP1

pub fn smp0(&self) -> SMP0_R[src]

Bits 0:2 - SMP0

impl R<u32, Reg<u32, _SMPR2>>[src]

pub fn smp18(&self) -> SMP18_R[src]

Bits 24:26 - SMP18

pub fn smp17(&self) -> SMP17_R[src]

Bits 21:23 - SMP17

pub fn smp16(&self) -> SMP16_R[src]

Bits 18:20 - SMP16

pub fn smp15(&self) -> SMP15_R[src]

Bits 15:17 - SMP15

pub fn smp14(&self) -> SMP14_R[src]

Bits 12:14 - SMP14

pub fn smp13(&self) -> SMP13_R[src]

Bits 9:11 - SMP13

pub fn smp12(&self) -> SMP12_R[src]

Bits 6:8 - SMP12

pub fn smp11(&self) -> SMP11_R[src]

Bits 3:5 - SMP11

pub fn smp10(&self) -> SMP10_R[src]

Bits 0:2 - SMP10

impl R<u32, Reg<u32, _TR1>>[src]

pub fn ht1(&self) -> HT1_R[src]

Bits 16:27 - HT1

pub fn lt1(&self) -> LT1_R[src]

Bits 0:11 - LT1

impl R<u32, Reg<u32, _TR2>>[src]

pub fn ht2(&self) -> HT2_R[src]

Bits 16:23 - HT2

pub fn lt2(&self) -> LT2_R[src]

Bits 0:7 - LT2

impl R<u32, Reg<u32, _TR3>>[src]

pub fn ht3(&self) -> HT3_R[src]

Bits 16:23 - HT3

pub fn lt3(&self) -> LT3_R[src]

Bits 0:7 - LT3

impl R<u32, Reg<u32, _SQR1>>[src]

pub fn sq4(&self) -> SQ4_R[src]

Bits 24:28 - SQ4

pub fn sq3(&self) -> SQ3_R[src]

Bits 18:22 - SQ3

pub fn sq2(&self) -> SQ2_R[src]

Bits 12:16 - SQ2

pub fn sq1(&self) -> SQ1_R[src]

Bits 6:10 - SQ1

pub fn l(&self) -> L_R[src]

Bits 0:3 - L

impl R<u32, Reg<u32, _SQR2>>[src]

pub fn sq9(&self) -> SQ9_R[src]

Bits 24:28 - SQ9

pub fn sq8(&self) -> SQ8_R[src]

Bits 18:22 - SQ8

pub fn sq7(&self) -> SQ7_R[src]

Bits 12:16 - SQ7

pub fn sq6(&self) -> SQ6_R[src]

Bits 6:10 - SQ6

pub fn sq5(&self) -> SQ5_R[src]

Bits 0:4 - SQ5

impl R<u32, Reg<u32, _SQR3>>[src]

pub fn sq14(&self) -> SQ14_R[src]

Bits 24:28 - SQ14

pub fn sq13(&self) -> SQ13_R[src]

Bits 18:22 - SQ13

pub fn sq12(&self) -> SQ12_R[src]

Bits 12:16 - SQ12

pub fn sq11(&self) -> SQ11_R[src]

Bits 6:10 - SQ11

pub fn sq10(&self) -> SQ10_R[src]

Bits 0:4 - SQ10

impl R<u32, Reg<u32, _SQR4>>[src]

pub fn sq16(&self) -> SQ16_R[src]

Bits 6:10 - SQ16

pub fn sq15(&self) -> SQ15_R[src]

Bits 0:4 - SQ15

impl R<u32, Reg<u32, _DR>>[src]

pub fn rdata(&self) -> RDATA_R[src]

Bits 0:15 - regularDATA

impl R<u32, Reg<u32, _JSQR>>[src]

pub fn jsq4(&self) -> JSQ4_R[src]

Bits 26:30 - JSQ4

pub fn jsq3(&self) -> JSQ3_R[src]

Bits 20:24 - JSQ3

pub fn jsq2(&self) -> JSQ2_R[src]

Bits 14:18 - JSQ2

pub fn jsq1(&self) -> JSQ1_R[src]

Bits 8:12 - JSQ1

pub fn jexten(&self) -> JEXTEN_R[src]

Bits 6:7 - JEXTEN

pub fn jextsel(&self) -> JEXTSEL_R[src]

Bits 2:5 - JEXTSEL

pub fn jl(&self) -> JL_R[src]

Bits 0:1 - JL

impl R<u32, Reg<u32, _OFR1>>[src]

pub fn offset1_en(&self) -> OFFSET1_EN_R[src]

Bit 31 - OFFSET1_EN

pub fn offset1_ch(&self) -> OFFSET1_CH_R[src]

Bits 26:30 - OFFSET1_CH

pub fn offset1(&self) -> OFFSET1_R[src]

Bits 0:11 - OFFSET1

impl R<u32, Reg<u32, _OFR2>>[src]

pub fn offset2_en(&self) -> OFFSET2_EN_R[src]

Bit 31 - OFFSET2_EN

pub fn offset2_ch(&self) -> OFFSET2_CH_R[src]

Bits 26:30 - OFFSET2_CH

pub fn offset2(&self) -> OFFSET2_R[src]

Bits 0:11 - OFFSET2

impl R<u32, Reg<u32, _OFR3>>[src]

pub fn offset3_en(&self) -> OFFSET3_EN_R[src]

Bit 31 - OFFSET3_EN

pub fn offset3_ch(&self) -> OFFSET3_CH_R[src]

Bits 26:30 - OFFSET3_CH

pub fn offset3(&self) -> OFFSET3_R[src]

Bits 0:11 - OFFSET3

impl R<u32, Reg<u32, _OFR4>>[src]

pub fn offset4_en(&self) -> OFFSET4_EN_R[src]

Bit 31 - OFFSET4_EN

pub fn offset4_ch(&self) -> OFFSET4_CH_R[src]

Bits 26:30 - OFFSET4_CH

pub fn offset4(&self) -> OFFSET4_R[src]

Bits 0:11 - OFFSET4

impl R<u32, Reg<u32, _JDR1>>[src]

pub fn jdata(&self) -> JDATA_R[src]

Bits 0:15 - JDATA1

impl R<u32, Reg<u32, _JDR2>>[src]

pub fn jdata(&self) -> JDATA_R[src]

Bits 0:15 - JDATA2

impl R<u32, Reg<u32, _JDR3>>[src]

pub fn jdata(&self) -> JDATA_R[src]

Bits 0:15 - JDATA3

impl R<u32, Reg<u32, _JDR4>>[src]

pub fn jdata(&self) -> JDATA_R[src]

Bits 0:15 - JDATA4

impl R<u32, Reg<u32, _AWD2CR>>[src]

pub fn awd2ch(&self) -> AWD2CH_R[src]

Bits 0:18 - AWD2CH

impl R<u32, Reg<u32, _AWD3CR>>[src]

pub fn awd3ch(&self) -> AWD3CH_R[src]

Bits 0:18 - AWD3CH

impl R<u32, Reg<u32, _DIFSEL>>[src]

pub fn difsel_0(&self) -> DIFSEL_0_R[src]

Bit 0 - Differential mode for channel 0

pub fn difsel_1_15(&self) -> DIFSEL_1_15_R[src]

Bits 1:15 - Differential mode for channels 15 to 1

pub fn difsel_16_18(&self) -> DIFSEL_16_18_R[src]

Bits 16:18 - Differential mode for channels 18 to 16

impl R<u32, Reg<u32, _CALFACT>>[src]

pub fn calfact_d(&self) -> CALFACT_D_R[src]

Bits 16:22 - CALFACT_D

pub fn calfact_s(&self) -> CALFACT_S_R[src]

Bits 0:6 - CALFACT_S

impl R<u32, Reg<u32, _STIR>>[src]

pub fn intid(&self) -> INTID_R[src]

Bits 0:8 - Software generated interrupt ID

impl R<u32, Reg<u32, _FMC_BCR1>>[src]

pub fn mbken(&self) -> MBKEN_R[src]

Bit 0 - Memory bank enable bit This bit enables the memory bank. After reset Bank1 is enabled, all others are disabled. Accessing a disabled bank causes an ERROR on AXI bus.

pub fn muxen(&self) -> MUXEN_R[src]

Bit 1 - Address/data multiplexing enable bit When this bit is set, the address and data values are multiplexed on the data bus, valid only with NOR and PSRAM memories:

pub fn mtyp(&self) -> MTYP_R[src]

Bits 2:3 - Memory type These bits define the type of external memory attached to the corresponding memory bank:

pub fn mwid(&self) -> MWID_R[src]

Bits 4:5 - Memory data bus width Defines the external memory device width, valid for all type of memories.

pub fn faccen(&self) -> FACCEN_R[src]

Bit 6 - Flash access enable This bit enables NOR Flash memory access operations.

pub fn bursten(&self) -> BURSTEN_R[src]

Bit 8 - Burst enable bit This bit enables/disables synchronous accesses during read operations. It is valid only for synchronous memories operating in Burst mode:

pub fn waitpol(&self) -> WAITPOL_R[src]

Bit 9 - Wait signal polarity bit This bit defines the polarity of the wait signal from memory used for either in synchronous or asynchronous mode:

pub fn waitcfg(&self) -> WAITCFG_R[src]

Bit 11 - Wait timing configuration The NWAIT signal indicates whether the data from the memory are valid or if a wait state must be inserted when accessing the memory in synchronous mode. This configuration bit determines if NWAIT is asserted by the memory one clock cycle before the wait state or during the wait state:

pub fn wren(&self) -> WREN_R[src]

Bit 12 - Write enable bit This bit indicates whether write operations are enabled/disabled in the bank by the FMC:

pub fn waiten(&self) -> WAITEN_R[src]

Bit 13 - Wait enable bit This bit enables/disables wait-state insertion via the NWAIT signal when accessing the memory in synchronous mode.

pub fn extmod(&self) -> EXTMOD_R[src]

Bit 14 - Extended mode enable. This bit enables the FMC to program the write timings for asynchronous accesses inside the FMC_BWTR register, thus resulting in different timings for read and write operations. Note: When the extended mode is disabled, the FMC can operate in Mode1 or Mode2 as follows: ** Mode 1 is the default mode when the SRAM/PSRAM memory type is selected (MTYP =0x0 or 0x01) ** Mode 2 is the default mode when the NOR memory type is selected (MTYP = 0x10).

pub fn asyncwait(&self) -> ASYNCWAIT_R[src]

Bit 15 - Wait signal during asynchronous transfers This bit enables/disables the FMC to use the wait signal even during an asynchronous protocol.

pub fn cpsize(&self) -> CPSIZE_R[src]

Bits 16:18 - CRAM Page Size These are used for Cellular RAM 1.5 which does not allow burst access to cross the address boundaries between pages. When these bits are configured, the FMC controller splits automatically the burst access when the memory page size is reached (refer to memory datasheet for page size). Other configuration: reserved.

pub fn cburstrw(&self) -> CBURSTRW_R[src]

Bit 19 - Write burst enable For PSRAM (CRAM) operating in Burst mode, the bit enables synchronous accesses during write operations. The enable bit for synchronous read accesses is the BURSTEN bit in the FMC_BCRx register.

pub fn cclken(&self) -> CCLKEN_R[src]

Bit 20 - Continuous Clock Enable This bit enables the FMC_CLK clock output to external memory devices. Note: The CCLKEN bit of the FMC_BCR2..4 registers is dont care. It is only enabled through the FMC_BCR1 register. Bank 1 must be configured in synchronous mode to generate the FMC_CLK continuous clock. If CCLKEN bit is set, the FMC_CLK clock ratio is specified by CLKDIV value in the FMC_BTR1 register. CLKDIV in FMC_BWTR1 is dont care. If the synchronous mode is used and CCLKEN bit is set, the synchronous memories connected to other banks than Bank 1 are clocked by the same clock (the CLKDIV value in the FMC_BTR2..4 and FMC_BWTR2..4 registers for other banks has no effect.)

pub fn wfdis(&self) -> WFDIS_R[src]

Bit 21 - Write FIFO Disable This bit disables the Write FIFO used by the FMC controller. Note: The WFDIS bit of the FMC_BCR2..4 registers is dont care. It is only enabled through the FMC_BCR1 register.

pub fn nblset(&self) -> NBLSET_R[src]

Bits 22:23 - NBLSET

impl R<u32, Reg<u32, _FMC_BCR2>>[src]

pub fn mbken(&self) -> MBKEN_R[src]

Bit 0 - Memory bank enable bit This bit enables the memory bank. After reset Bank1 is enabled, all others are disabled. Accessing a disabled bank causes an ERROR on AXI bus.

pub fn muxen(&self) -> MUXEN_R[src]

Bit 1 - Address/data multiplexing enable bit When this bit is set, the address and data values are multiplexed on the data bus, valid only with NOR and PSRAM memories:

pub fn mtyp(&self) -> MTYP_R[src]

Bits 2:3 - Memory type These bits define the type of external memory attached to the corresponding memory bank:

pub fn mwid(&self) -> MWID_R[src]

Bits 4:5 - Memory data bus width Defines the external memory device width, valid for all type of memories.

pub fn faccen(&self) -> FACCEN_R[src]

Bit 6 - Flash access enable This bit enables NOR Flash memory access operations.

pub fn bursten(&self) -> BURSTEN_R[src]

Bit 8 - Burst enable bit This bit enables/disables synchronous accesses during read operations. It is valid only for synchronous memories operating in Burst mode:

pub fn waitpol(&self) -> WAITPOL_R[src]

Bit 9 - Wait signal polarity bit This bit defines the polarity of the wait signal from memory used for either in synchronous or asynchronous mode:

pub fn waitcfg(&self) -> WAITCFG_R[src]

Bit 11 - Wait timing configuration The NWAIT signal indicates whether the data from the memory are valid or if a wait state must be inserted when accessing the memory in synchronous mode. This configuration bit determines if NWAIT is asserted by the memory one clock cycle before the wait state or during the wait state:

pub fn wren(&self) -> WREN_R[src]

Bit 12 - Write enable bit This bit indicates whether write operations are enabled/disabled in the bank by the FMC:

pub fn waiten(&self) -> WAITEN_R[src]

Bit 13 - Wait enable bit This bit enables/disables wait-state insertion via the NWAIT signal when accessing the memory in synchronous mode.

pub fn extmod(&self) -> EXTMOD_R[src]

Bit 14 - Extended mode enable. This bit enables the FMC to program the write timings for asynchronous accesses inside the FMC_BWTR register, thus resulting in different timings for read and write operations. Note: When the extended mode is disabled, the FMC can operate in Mode1 or Mode2 as follows: ** Mode 1 is the default mode when the SRAM/PSRAM memory type is selected (MTYP =0x0 or 0x01) ** Mode 2 is the default mode when the NOR memory type is selected (MTYP = 0x10).

pub fn asyncwait(&self) -> ASYNCWAIT_R[src]

Bit 15 - Wait signal during asynchronous transfers This bit enables/disables the FMC to use the wait signal even during an asynchronous protocol.

pub fn cpsize(&self) -> CPSIZE_R[src]

Bits 16:18 - CRAM Page Size These are used for Cellular RAM 1.5 which does not allow burst access to cross the address boundaries between pages. When these bits are configured, the FMC controller splits automatically the burst access when the memory page size is reached (refer to memory datasheet for page size). Other configuration: reserved.

pub fn cburstrw(&self) -> CBURSTRW_R[src]

Bit 19 - Write burst enable For PSRAM (CRAM) operating in Burst mode, the bit enables synchronous accesses during write operations. The enable bit for synchronous read accesses is the BURSTEN bit in the FMC_BCRx register.

pub fn cclken(&self) -> CCLKEN_R[src]

Bit 20 - Continuous Clock Enable This bit enables the FMC_CLK clock output to external memory devices. Note: The CCLKEN bit of the FMC_BCR2..4 registers is dont care. It is only enabled through the FMC_BCR1 register. Bank 1 must be configured in synchronous mode to generate the FMC_CLK continuous clock. If CCLKEN bit is set, the FMC_CLK clock ratio is specified by CLKDIV value in the FMC_BTR1 register. CLKDIV in FMC_BWTR1 is dont care. If the synchronous mode is used and CCLKEN bit is set, the synchronous memories connected to other banks than Bank 1 are clocked by the same clock (the CLKDIV value in the FMC_BTR2..4 and FMC_BWTR2..4 registers for other banks has no effect.)

pub fn wfdis(&self) -> WFDIS_R[src]

Bit 21 - Write FIFO Disable This bit disables the Write FIFO used by the FMC controller. Note: The WFDIS bit of the FMC_BCR2..4 registers is dont care. It is only enabled through the FMC_BCR1 register.

pub fn nblset(&self) -> NBLSET_R[src]

Bits 22:23 - NBLSET

impl R<u32, Reg<u32, _FMC_BCR3>>[src]

pub fn mbken(&self) -> MBKEN_R[src]

Bit 0 - Memory bank enable bit This bit enables the memory bank. After reset Bank1 is enabled, all others are disabled. Accessing a disabled bank causes an ERROR on AXI bus.

pub fn muxen(&self) -> MUXEN_R[src]

Bit 1 - Address/data multiplexing enable bit When this bit is set, the address and data values are multiplexed on the data bus, valid only with NOR and PSRAM memories:

pub fn mtyp(&self) -> MTYP_R[src]

Bits 2:3 - Memory type These bits define the type of external memory attached to the corresponding memory bank:

pub fn mwid(&self) -> MWID_R[src]

Bits 4:5 - Memory data bus width Defines the external memory device width, valid for all type of memories.

pub fn faccen(&self) -> FACCEN_R[src]

Bit 6 - Flash access enable This bit enables NOR Flash memory access operations.

pub fn bursten(&self) -> BURSTEN_R[src]

Bit 8 - Burst enable bit This bit enables/disables synchronous accesses during read operations. It is valid only for synchronous memories operating in Burst mode:

pub fn waitpol(&self) -> WAITPOL_R[src]

Bit 9 - Wait signal polarity bit This bit defines the polarity of the wait signal from memory used for either in synchronous or asynchronous mode:

pub fn waitcfg(&self) -> WAITCFG_R[src]

Bit 11 - Wait timing configuration The NWAIT signal indicates whether the data from the memory are valid or if a wait state must be inserted when accessing the memory in synchronous mode. This configuration bit determines if NWAIT is asserted by the memory one clock cycle before the wait state or during the wait state:

pub fn wren(&self) -> WREN_R[src]

Bit 12 - Write enable bit This bit indicates whether write operations are enabled/disabled in the bank by the FMC:

pub fn waiten(&self) -> WAITEN_R[src]

Bit 13 - Wait enable bit This bit enables/disables wait-state insertion via the NWAIT signal when accessing the memory in synchronous mode.

pub fn extmod(&self) -> EXTMOD_R[src]

Bit 14 - Extended mode enable. This bit enables the FMC to program the write timings for asynchronous accesses inside the FMC_BWTR register, thus resulting in different timings for read and write operations. Note: When the extended mode is disabled, the FMC can operate in Mode1 or Mode2 as follows: ** Mode 1 is the default mode when the SRAM/PSRAM memory type is selected (MTYP =0x0 or 0x01) ** Mode 2 is the default mode when the NOR memory type is selected (MTYP = 0x10).

pub fn asyncwait(&self) -> ASYNCWAIT_R[src]

Bit 15 - Wait signal during asynchronous transfers This bit enables/disables the FMC to use the wait signal even during an asynchronous protocol.

pub fn cpsize(&self) -> CPSIZE_R[src]

Bits 16:18 - CRAM Page Size These are used for Cellular RAM 1.5 which does not allow burst access to cross the address boundaries between pages. When these bits are configured, the FMC controller splits automatically the burst access when the memory page size is reached (refer to memory datasheet for page size). Other configuration: reserved.

pub fn cburstrw(&self) -> CBURSTRW_R[src]

Bit 19 - Write burst enable For PSRAM (CRAM) operating in Burst mode, the bit enables synchronous accesses during write operations. The enable bit for synchronous read accesses is the BURSTEN bit in the FMC_BCRx register.

pub fn cclken(&self) -> CCLKEN_R[src]

Bit 20 - Continuous Clock Enable This bit enables the FMC_CLK clock output to external memory devices. Note: The CCLKEN bit of the FMC_BCR2..4 registers is dont care. It is only enabled through the FMC_BCR1 register. Bank 1 must be configured in synchronous mode to generate the FMC_CLK continuous clock. If CCLKEN bit is set, the FMC_CLK clock ratio is specified by CLKDIV value in the FMC_BTR1 register. CLKDIV in FMC_BWTR1 is dont care. If the synchronous mode is used and CCLKEN bit is set, the synchronous memories connected to other banks than Bank 1 are clocked by the same clock (the CLKDIV value in the FMC_BTR2..4 and FMC_BWTR2..4 registers for other banks has no effect.)

pub fn wfdis(&self) -> WFDIS_R[src]

Bit 21 - Write FIFO Disable This bit disables the Write FIFO used by the FMC controller. Note: The WFDIS bit of the FMC_BCR2..4 registers is dont care. It is only enabled through the FMC_BCR1 register.

pub fn nblset(&self) -> NBLSET_R[src]

Bits 22:23 - NBLSET

impl R<u32, Reg<u32, _FMC_BCR4>>[src]

pub fn mbken(&self) -> MBKEN_R[src]

Bit 0 - Memory bank enable bit This bit enables the memory bank. After reset Bank1 is enabled, all others are disabled. Accessing a disabled bank causes an ERROR on AXI bus.

pub fn muxen(&self) -> MUXEN_R[src]

Bit 1 - Address/data multiplexing enable bit When this bit is set, the address and data values are multiplexed on the data bus, valid only with NOR and PSRAM memories:

pub fn mtyp(&self) -> MTYP_R[src]

Bits 2:3 - Memory type These bits define the type of external memory attached to the corresponding memory bank:

pub fn mwid(&self) -> MWID_R[src]

Bits 4:5 - Memory data bus width Defines the external memory device width, valid for all type of memories.

pub fn faccen(&self) -> FACCEN_R[src]

Bit 6 - Flash access enable This bit enables NOR Flash memory access operations.

pub fn bursten(&self) -> BURSTEN_R[src]

Bit 8 - Burst enable bit This bit enables/disables synchronous accesses during read operations. It is valid only for synchronous memories operating in Burst mode:

pub fn waitpol(&self) -> WAITPOL_R[src]

Bit 9 - Wait signal polarity bit This bit defines the polarity of the wait signal from memory used for either in synchronous or asynchronous mode:

pub fn waitcfg(&self) -> WAITCFG_R[src]

Bit 11 - Wait timing configuration The NWAIT signal indicates whether the data from the memory are valid or if a wait state must be inserted when accessing the memory in synchronous mode. This configuration bit determines if NWAIT is asserted by the memory one clock cycle before the wait state or during the wait state:

pub fn wren(&self) -> WREN_R[src]

Bit 12 - Write enable bit This bit indicates whether write operations are enabled/disabled in the bank by the FMC:

pub fn waiten(&self) -> WAITEN_R[src]

Bit 13 - Wait enable bit This bit enables/disables wait-state insertion via the NWAIT signal when accessing the memory in synchronous mode.

pub fn extmod(&self) -> EXTMOD_R[src]

Bit 14 - Extended mode enable. This bit enables the FMC to program the write timings for asynchronous accesses inside the FMC_BWTR register, thus resulting in different timings for read and write operations. Note: When the extended mode is disabled, the FMC can operate in Mode1 or Mode2 as follows: ** Mode 1 is the default mode when the SRAM/PSRAM memory type is selected (MTYP =0x0 or 0x01) ** Mode 2 is the default mode when the NOR memory type is selected (MTYP = 0x10).

pub fn asyncwait(&self) -> ASYNCWAIT_R[src]

Bit 15 - Wait signal during asynchronous transfers This bit enables/disables the FMC to use the wait signal even during an asynchronous protocol.

pub fn cpsize(&self) -> CPSIZE_R[src]

Bits 16:18 - CRAM Page Size These are used for Cellular RAM 1.5 which does not allow burst access to cross the address boundaries between pages. When these bits are configured, the FMC controller splits automatically the burst access when the memory page size is reached (refer to memory datasheet for page size). Other configuration: reserved.

pub fn cburstrw(&self) -> CBURSTRW_R[src]

Bit 19 - Write burst enable For PSRAM (CRAM) operating in Burst mode, the bit enables synchronous accesses during write operations. The enable bit for synchronous read accesses is the BURSTEN bit in the FMC_BCRx register.

pub fn cclken(&self) -> CCLKEN_R[src]

Bit 20 - Continuous Clock Enable This bit enables the FMC_CLK clock output to external memory devices. Note: The CCLKEN bit of the FMC_BCR2..4 registers is dont care. It is only enabled through the FMC_BCR1 register. Bank 1 must be configured in synchronous mode to generate the FMC_CLK continuous clock. If CCLKEN bit is set, the FMC_CLK clock ratio is specified by CLKDIV value in the FMC_BTR1 register. CLKDIV in FMC_BWTR1 is dont care. If the synchronous mode is used and CCLKEN bit is set, the synchronous memories connected to other banks than Bank 1 are clocked by the same clock (the CLKDIV value in the FMC_BTR2..4 and FMC_BWTR2..4 registers for other banks has no effect.)

pub fn wfdis(&self) -> WFDIS_R[src]

Bit 21 - Write FIFO Disable This bit disables the Write FIFO used by the FMC controller. Note: The WFDIS bit of the FMC_BCR2..4 registers is dont care. It is only enabled through the FMC_BCR1 register.

pub fn nblset(&self) -> NBLSET_R[src]

Bits 22:23 - NBLSET

impl R<u32, Reg<u32, _FMC_BTR1>>[src]

pub fn addset(&self) -> ADDSET_R[src]

Bits 0:3 - Address setup phase duration These bits are written by software to define the duration of the address setup phase (refer to Figure81 to Figure93), used in SRAMs, ROMs and asynchronous NOR Flash: For each access mode address setup phase duration, please refer to the respective figure (refer to Figure81 to Figure93). Note: In synchronous accesses, this value is dont care. In Muxed mode or Mode D, the minimum value for ADDSET is 1.

pub fn addhld(&self) -> ADDHLD_R[src]

Bits 4:7 - Address-hold phase duration These bits are written by software to define the duration of the address hold phase (refer to Figure81 to Figure93), used in mode D or multiplexed accesses: For each access mode address-hold phase duration, please refer to the respective figure (Figure81 to Figure93). Note: In synchronous accesses, this value is not used, the address hold phase is always 1 memory clock period duration.

pub fn datast(&self) -> DATAST_R[src]

Bits 8:15 - Data-phase duration These bits are written by software to define the duration of the data phase (refer to Figure81 to Figure93), used in asynchronous accesses: For each memory type and access mode data-phase duration, please refer to the respective figure (Figure81 to Figure93). Example: Mode1, write access, DATAST=1: Data-phase duration= DATAST+1 = 2 KCK_FMC clock cycles. Note: In synchronous accesses, this value is dont care.

pub fn busturn(&self) -> BUSTURN_R[src]

Bits 16:19 - Bus turnaround phase duration These bits are written by software to add a delay at the end of a write-to-read or read-to write transaction. The programmed bus turnaround delay is inserted between an asynchronous read (in muxed or mode D) or write transaction and any other asynchronous /synchronous read/write from/to a static bank. If a read operation is performed, the bank can be the same or a different one, whereas it must be different in case of write operation to the bank, except in muxed mode or mode D. In some cases, whatever the programmed BUSTRUN values, the bus turnaround delay is fixed as follows: The bus turnaround delay is not inserted between two consecutive asynchronous write transfers to the same static memory bank except in muxed mode and mode D. There is a bus turnaround delay of 1 FMC clock cycle between: Two consecutive asynchronous read transfers to the same static memory bank except for modes muxed and D. An asynchronous read to an asynchronous or synchronous write to any static bank or dynamic bank except in modes muxed and D mode. There is a bus turnaround delay of 2 FMC clock cycle between: Two consecutive synchronous write operations (in Burst or Single mode) to the same bank. A synchronous write (burst or single) access and an asynchronous write or read transfer to or from static memory bank (the bank can be the same or a different one in case of a read operation. Two consecutive synchronous read operations (in Burst or Single mode) followed by any synchronous/asynchronous read or write from/to another static memory bank. There is a bus turnaround delay of 3 FMC clock cycle between: Two consecutive synchronous write operations (in Burst or Single mode) to different static banks. A synchronous write access (in Burst or Single mode) and a synchronous read from the same or a different bank. The bus turnaround delay allows to match the minimum time between consecutive transactions (tEHEL from NEx high to NEx low) and the maximum time required by the memory to free the data bus after a read access (tEHQZ): (BUSTRUN + 1) KCK_FMC period ≥ tEHELmin and (BUSTRUN + 2)KCK_FMC period ≥ tEHQZmax if EXTMOD = 0 (BUSTRUN + 2)KCK_FMC period ≥ max (tEHELmin, tEHQZmax) if EXTMOD = 126. ...

pub fn clkdiv(&self) -> CLKDIV_R[src]

Bits 20:23 - Clock divide ratio (for FMC_CLK signal) These bits define the period of FMC_CLK clock output signal, expressed in number of KCK_FMC cycles: In asynchronous NOR Flash, SRAM or PSRAM accesses, this value is dont care. Note: Refer to Section20.6.5: Synchronous transactions for FMC_CLK divider ratio formula)

pub fn datlat(&self) -> DATLAT_R[src]

Bits 24:27 - Data latency for synchronous memory For synchronous access with read write burst mode enabled these bits define the number of memory clock cycles

pub fn accmod(&self) -> ACCMOD_R[src]

Bits 28:29 - Access mode These bits specify the asynchronous access modes as shown in the timing diagrams. They are taken into account only when the EXTMOD bit in the FMC_BCRx register is 1.

pub fn datahld(&self) -> DATAHLD_R[src]

Bits 30:31 - DATAHLD

impl R<u32, Reg<u32, _FMC_BTR2>>[src]

pub fn addset(&self) -> ADDSET_R[src]

Bits 0:3 - Address setup phase duration These bits are written by software to define the duration of the address setup phase (refer to Figure81 to Figure93), used in SRAMs, ROMs and asynchronous NOR Flash: For each access mode address setup phase duration, please refer to the respective figure (refer to Figure81 to Figure93). Note: In synchronous accesses, this value is dont care. In Muxed mode or Mode D, the minimum value for ADDSET is 1.

pub fn addhld(&self) -> ADDHLD_R[src]

Bits 4:7 - Address-hold phase duration These bits are written by software to define the duration of the address hold phase (refer to Figure81 to Figure93), used in mode D or multiplexed accesses: For each access mode address-hold phase duration, please refer to the respective figure (Figure81 to Figure93). Note: In synchronous accesses, this value is not used, the address hold phase is always 1 memory clock period duration.

pub fn datast(&self) -> DATAST_R[src]

Bits 8:15 - Data-phase duration These bits are written by software to define the duration of the data phase (refer to Figure81 to Figure93), used in asynchronous accesses: For each memory type and access mode data-phase duration, please refer to the respective figure (Figure81 to Figure93). Example: Mode1, write access, DATAST=1: Data-phase duration= DATAST+1 = 2 KCK_FMC clock cycles. Note: In synchronous accesses, this value is dont care.

pub fn busturn(&self) -> BUSTURN_R[src]

Bits 16:19 - Bus turnaround phase duration These bits are written by software to add a delay at the end of a write-to-read or read-to write transaction. The programmed bus turnaround delay is inserted between an asynchronous read (in muxed or mode D) or write transaction and any other asynchronous /synchronous read/write from/to a static bank. If a read operation is performed, the bank can be the same or a different one, whereas it must be different in case of write operation to the bank, except in muxed mode or mode D. In some cases, whatever the programmed BUSTRUN values, the bus turnaround delay is fixed as follows: The bus turnaround delay is not inserted between two consecutive asynchronous write transfers to the same static memory bank except in muxed mode and mode D. There is a bus turnaround delay of 1 FMC clock cycle between: Two consecutive asynchronous read transfers to the same static memory bank except for modes muxed and D. An asynchronous read to an asynchronous or synchronous write to any static bank or dynamic bank except in modes muxed and D mode. There is a bus turnaround delay of 2 FMC clock cycle between: Two consecutive synchronous write operations (in Burst or Single mode) to the same bank. A synchronous write (burst or single) access and an asynchronous write or read transfer to or from static memory bank (the bank can be the same or a different one in case of a read operation. Two consecutive synchronous read operations (in Burst or Single mode) followed by any synchronous/asynchronous read or write from/to another static memory bank. There is a bus turnaround delay of 3 FMC clock cycle between: Two consecutive synchronous write operations (in Burst or Single mode) to different static banks. A synchronous write access (in Burst or Single mode) and a synchronous read from the same or a different bank. The bus turnaround delay allows to match the minimum time between consecutive transactions (tEHEL from NEx high to NEx low) and the maximum time required by the memory to free the data bus after a read access (tEHQZ): (BUSTRUN + 1) KCK_FMC period ≥ tEHELmin and (BUSTRUN + 2)KCK_FMC period ≥ tEHQZmax if EXTMOD = 0 (BUSTRUN + 2)KCK_FMC period ≥ max (tEHELmin, tEHQZmax) if EXTMOD = 126. ...

pub fn clkdiv(&self) -> CLKDIV_R[src]

Bits 20:23 - Clock divide ratio (for FMC_CLK signal) These bits define the period of FMC_CLK clock output signal, expressed in number of KCK_FMC cycles: In asynchronous NOR Flash, SRAM or PSRAM accesses, this value is dont care. Note: Refer to Section20.6.5: Synchronous transactions for FMC_CLK divider ratio formula)

pub fn datlat(&self) -> DATLAT_R[src]

Bits 24:27 - Data latency for synchronous memory For synchronous access with read write burst mode enabled these bits define the number of memory clock cycles

pub fn accmod(&self) -> ACCMOD_R[src]

Bits 28:29 - Access mode These bits specify the asynchronous access modes as shown in the timing diagrams. They are taken into account only when the EXTMOD bit in the FMC_BCRx register is 1.

pub fn datahld(&self) -> DATAHLD_R[src]

Bits 30:31 - DATAHLD

impl R<u32, Reg<u32, _FMC_BTR3>>[src]

pub fn addset(&self) -> ADDSET_R[src]

Bits 0:3 - Address setup phase duration These bits are written by software to define the duration of the address setup phase (refer to Figure81 to Figure93), used in SRAMs, ROMs and asynchronous NOR Flash: For each access mode address setup phase duration, please refer to the respective figure (refer to Figure81 to Figure93). Note: In synchronous accesses, this value is dont care. In Muxed mode or Mode D, the minimum value for ADDSET is 1.

pub fn addhld(&self) -> ADDHLD_R[src]

Bits 4:7 - Address-hold phase duration These bits are written by software to define the duration of the address hold phase (refer to Figure81 to Figure93), used in mode D or multiplexed accesses: For each access mode address-hold phase duration, please refer to the respective figure (Figure81 to Figure93). Note: In synchronous accesses, this value is not used, the address hold phase is always 1 memory clock period duration.

pub fn datast(&self) -> DATAST_R[src]

Bits 8:15 - Data-phase duration These bits are written by software to define the duration of the data phase (refer to Figure81 to Figure93), used in asynchronous accesses: For each memory type and access mode data-phase duration, please refer to the respective figure (Figure81 to Figure93). Example: Mode1, write access, DATAST=1: Data-phase duration= DATAST+1 = 2 KCK_FMC clock cycles. Note: In synchronous accesses, this value is dont care.

pub fn busturn(&self) -> BUSTURN_R[src]

Bits 16:19 - Bus turnaround phase duration These bits are written by software to add a delay at the end of a write-to-read or read-to write transaction. The programmed bus turnaround delay is inserted between an asynchronous read (in muxed or mode D) or write transaction and any other asynchronous /synchronous read/write from/to a static bank. If a read operation is performed, the bank can be the same or a different one, whereas it must be different in case of write operation to the bank, except in muxed mode or mode D. In some cases, whatever the programmed BUSTRUN values, the bus turnaround delay is fixed as follows: The bus turnaround delay is not inserted between two consecutive asynchronous write transfers to the same static memory bank except in muxed mode and mode D. There is a bus turnaround delay of 1 FMC clock cycle between: Two consecutive asynchronous read transfers to the same static memory bank except for modes muxed and D. An asynchronous read to an asynchronous or synchronous write to any static bank or dynamic bank except in modes muxed and D mode. There is a bus turnaround delay of 2 FMC clock cycle between: Two consecutive synchronous write operations (in Burst or Single mode) to the same bank. A synchronous write (burst or single) access and an asynchronous write or read transfer to or from static memory bank (the bank can be the same or a different one in case of a read operation. Two consecutive synchronous read operations (in Burst or Single mode) followed by any synchronous/asynchronous read or write from/to another static memory bank. There is a bus turnaround delay of 3 FMC clock cycle between: Two consecutive synchronous write operations (in Burst or Single mode) to different static banks. A synchronous write access (in Burst or Single mode) and a synchronous read from the same or a different bank. The bus turnaround delay allows to match the minimum time between consecutive transactions (tEHEL from NEx high to NEx low) and the maximum time required by the memory to free the data bus after a read access (tEHQZ): (BUSTRUN + 1) KCK_FMC period ≥ tEHELmin and (BUSTRUN + 2)KCK_FMC period ≥ tEHQZmax if EXTMOD = 0 (BUSTRUN + 2)KCK_FMC period ≥ max (tEHELmin, tEHQZmax) if EXTMOD = 126. ...

pub fn clkdiv(&self) -> CLKDIV_R[src]

Bits 20:23 - Clock divide ratio (for FMC_CLK signal) These bits define the period of FMC_CLK clock output signal, expressed in number of KCK_FMC cycles: In asynchronous NOR Flash, SRAM or PSRAM accesses, this value is dont care. Note: Refer to Section20.6.5: Synchronous transactions for FMC_CLK divider ratio formula)

pub fn datlat(&self) -> DATLAT_R[src]

Bits 24:27 - Data latency for synchronous memory For synchronous access with read write burst mode enabled these bits define the number of memory clock cycles

pub fn accmod(&self) -> ACCMOD_R[src]

Bits 28:29 - Access mode These bits specify the asynchronous access modes as shown in the timing diagrams. They are taken into account only when the EXTMOD bit in the FMC_BCRx register is 1.

pub fn datahld(&self) -> DATAHLD_R[src]

Bits 30:31 - DATAHLD

impl R<u32, Reg<u32, _FMC_BTR4>>[src]

pub fn addset(&self) -> ADDSET_R[src]

Bits 0:3 - Address setup phase duration These bits are written by software to define the duration of the address setup phase (refer to Figure81 to Figure93), used in SRAMs, ROMs and asynchronous NOR Flash: For each access mode address setup phase duration, please refer to the respective figure (refer to Figure81 to Figure93). Note: In synchronous accesses, this value is dont care. In Muxed mode or Mode D, the minimum value for ADDSET is 1.

pub fn addhld(&self) -> ADDHLD_R[src]

Bits 4:7 - Address-hold phase duration These bits are written by software to define the duration of the address hold phase (refer to Figure81 to Figure93), used in mode D or multiplexed accesses: For each access mode address-hold phase duration, please refer to the respective figure (Figure81 to Figure93). Note: In synchronous accesses, this value is not used, the address hold phase is always 1 memory clock period duration.

pub fn datast(&self) -> DATAST_R[src]

Bits 8:15 - Data-phase duration These bits are written by software to define the duration of the data phase (refer to Figure81 to Figure93), used in asynchronous accesses: For each memory type and access mode data-phase duration, please refer to the respective figure (Figure81 to Figure93). Example: Mode1, write access, DATAST=1: Data-phase duration= DATAST+1 = 2 KCK_FMC clock cycles. Note: In synchronous accesses, this value is dont care.

pub fn busturn(&self) -> BUSTURN_R[src]

Bits 16:19 - Bus turnaround phase duration These bits are written by software to add a delay at the end of a write-to-read or read-to write transaction. The programmed bus turnaround delay is inserted between an asynchronous read (in muxed or mode D) or write transaction and any other asynchronous /synchronous read/write from/to a static bank. If a read operation is performed, the bank can be the same or a different one, whereas it must be different in case of write operation to the bank, except in muxed mode or mode D. In some cases, whatever the programmed BUSTRUN values, the bus turnaround delay is fixed as follows: The bus turnaround delay is not inserted between two consecutive asynchronous write transfers to the same static memory bank except in muxed mode and mode D. There is a bus turnaround delay of 1 FMC clock cycle between: Two consecutive asynchronous read transfers to the same static memory bank except for modes muxed and D. An asynchronous read to an asynchronous or synchronous write to any static bank or dynamic bank except in modes muxed and D mode. There is a bus turnaround delay of 2 FMC clock cycle between: Two consecutive synchronous write operations (in Burst or Single mode) to the same bank. A synchronous write (burst or single) access and an asynchronous write or read transfer to or from static memory bank (the bank can be the same or a different one in case of a read operation. Two consecutive synchronous read operations (in Burst or Single mode) followed by any synchronous/asynchronous read or write from/to another static memory bank. There is a bus turnaround delay of 3 FMC clock cycle between: Two consecutive synchronous write operations (in Burst or Single mode) to different static banks. A synchronous write access (in Burst or Single mode) and a synchronous read from the same or a different bank. The bus turnaround delay allows to match the minimum time between consecutive transactions (tEHEL from NEx high to NEx low) and the maximum time required by the memory to free the data bus after a read access (tEHQZ): (BUSTRUN + 1) KCK_FMC period ≥ tEHELmin and (BUSTRUN + 2)KCK_FMC period ≥ tEHQZmax if EXTMOD = 0 (BUSTRUN + 2)KCK_FMC period ≥ max (tEHELmin, tEHQZmax) if EXTMOD = 126. ...

pub fn clkdiv(&self) -> CLKDIV_R[src]

Bits 20:23 - Clock divide ratio (for FMC_CLK signal) These bits define the period of FMC_CLK clock output signal, expressed in number of KCK_FMC cycles: In asynchronous NOR Flash, SRAM or PSRAM accesses, this value is dont care. Note: Refer to Section20.6.5: Synchronous transactions for FMC_CLK divider ratio formula)

pub fn datlat(&self) -> DATLAT_R[src]

Bits 24:27 - Data latency for synchronous memory For synchronous access with read write burst mode enabled these bits define the number of memory clock cycles

pub fn accmod(&self) -> ACCMOD_R[src]

Bits 28:29 - Access mode These bits specify the asynchronous access modes as shown in the timing diagrams. They are taken into account only when the EXTMOD bit in the FMC_BCRx register is 1.

pub fn datahld(&self) -> DATAHLD_R[src]

Bits 30:31 - DATAHLD

impl R<u32, Reg<u32, _FMC_PCR>>[src]

pub fn pwaiten(&self) -> PWAITEN_R[src]

Bit 1 - Wait feature enable bit. This bit enables the Wait feature for the NAND Flash memory bank:

pub fn pbken(&self) -> PBKEN_R[src]

Bit 2 - NAND Flash memory bank enable bit. This bit enables the memory bank. Accessing a disabled memory bank causes an ERROR on AXI bus

pub fn ptyp(&self) -> PTYP_R[src]

Bit 3 - Memory type

pub fn pwid(&self) -> PWID_R[src]

Bits 4:5 - Data bus width. These bits define the external memory device width.

pub fn eccen(&self) -> ECCEN_R[src]

Bit 6 - ECC computation logic enable bit

pub fn tclr(&self) -> TCLR_R[src]

Bits 9:12 - CLE to RE delay. These bits set time from CLE low to RE low in number of KCK_FMC clock cycles. The time is give by the following formula: t_clr = (TCLR + SET + 2) TKCK_FMC where TKCK_FMC is the KCK_FMC clock period Note: Set is MEMSET or ATTSET according to the addressed space.

pub fn tar(&self) -> TAR_R[src]

Bits 13:16 - ALE to RE delay. These bits set time from ALE low to RE low in number of KCK_FMC clock cycles. Time is: t_ar = (TAR + SET + 2) TKCK_FMC where TKCK_FMC is the FMC clock period Note: Set is MEMSET or ATTSET according to the addressed space.

pub fn eccps(&self) -> ECCPS_R[src]

Bits 17:19 - ECC page size. These bits define the page size for the extended ECC:

impl R<u32, Reg<u32, _FMC_SR>>[src]

pub fn irs(&self) -> IRS_R[src]

Bit 0 - Interrupt rising edge status The flag is set by hardware and reset by software. Note: If this bit is written by software to 1 it will be set.

pub fn ils(&self) -> ILS_R[src]

Bit 1 - Interrupt high-level status The flag is set by hardware and reset by software.

pub fn ifs(&self) -> IFS_R[src]

Bit 2 - Interrupt falling edge status The flag is set by hardware and reset by software. Note: If this bit is written by software to 1 it will be set.

pub fn iren(&self) -> IREN_R[src]

Bit 3 - Interrupt rising edge detection enable bit

pub fn ilen(&self) -> ILEN_R[src]

Bit 4 - Interrupt high-level detection enable bit

pub fn ifen(&self) -> IFEN_R[src]

Bit 5 - Interrupt falling edge detection enable bit

pub fn fempt(&self) -> FEMPT_R[src]

Bit 6 - FIFO empty. Read-only bit that provides the status of the FIFO

impl R<u32, Reg<u32, _FMC_PMEM>>[src]

pub fn memset(&self) -> MEMSET_R[src]

Bits 0:7 - Common memory x setup time These bits define the number of KCK_FMC (+1) clock cycles to set up the address before the command assertion (NWE, NOE), for NAND Flash read or write access to common memory space:

pub fn memwait(&self) -> MEMWAIT_R[src]

Bits 8:15 - Common memory wait time These bits define the minimum number of KCK_FMC (+1) clock cycles to assert the command (NWE, NOE), for NAND Flash read or write access to common memory space. The duration of command assertion is extended if the wait signal (NWAIT) is active (low) at the end of the programmed value of KCK_FMC:

pub fn memhold(&self) -> MEMHOLD_R[src]

Bits 16:23 - Common memory hold time These bits define the number of KCK_FMC clock cycles for write accesses and KCK_FMC+1 clock cycles for read accesses during which the address is held (and data for write accesses) after the command is de-asserted (NWE, NOE), for NAND Flash read or write access to common memory space:

pub fn memhiz(&self) -> MEMHIZ_R[src]

Bits 24:31 - Common memory x data bus Hi-Z time These bits define the number of KCK_FMC clock cycles during which the data bus is kept Hi-Z after the start of a NAND Flash write access to common memory space. This is only valid for write transactions:

impl R<u32, Reg<u32, _FMC_PATT>>[src]

pub fn attset(&self) -> ATTSET_R[src]

Bits 0:7 - Attribute memory setup time These bits define the number of KCK_FMC (+1) clock cycles to set up address before the command assertion (NWE, NOE), for NAND Flash read or write access to attribute memory space:

pub fn attwait(&self) -> ATTWAIT_R[src]

Bits 8:15 - Attribute memory wait time These bits define the minimum number of x KCK_FMC (+1) clock cycles to assert the command (NWE, NOE), for NAND Flash read or write access to attribute memory space. The duration for command assertion is extended if the wait signal (NWAIT) is active (low) at the end of the programmed value of KCK_FMC:

pub fn atthold(&self) -> ATTHOLD_R[src]

Bits 16:23 - Attribute memory hold time These bits define the number of KCK_FMC clock cycles during which the address is held (and data for write access) after the command de-assertion (NWE, NOE), for NAND Flash read or write access to attribute memory space:

pub fn atthiz(&self) -> ATTHIZ_R[src]

Bits 24:31 - Attribute memory data bus Hi-Z time These bits define the number of KCK_FMC clock cycles during which the data bus is kept in Hi-Z after the start of a NAND Flash write access to attribute memory space on socket. Only valid for writ transaction:

impl R<u32, Reg<u32, _FMC_ECCR>>[src]

pub fn ecc(&self) -> ECC_R[src]

Bits 0:31 - ECC result This field contains the value computed by the ECC computation logic. Table167 describes the contents of these bit fields.

impl R<u32, Reg<u32, _FMC_BWTR1>>[src]

pub fn addset(&self) -> ADDSET_R[src]

Bits 0:3 - Address setup phase duration. These bits are written by software to define the duration of the address setup phase in KCK_FMC cycles (refer to Figure81 to Figure93), used in asynchronous accesses: ... Note: In synchronous accesses, this value is not used, the address setup phase is always 1 Flash clock period duration. In muxed mode, the minimum ADDSET value is 1.

pub fn addhld(&self) -> ADDHLD_R[src]

Bits 4:7 - Address-hold phase duration. These bits are written by software to define the duration of the address hold phase (refer to Figure81 to Figure93), used in asynchronous multiplexed accesses: ... Note: In synchronous NOR Flash accesses, this value is not used, the address hold phase is always 1 Flash clock period duration.

pub fn datast(&self) -> DATAST_R[src]

Bits 8:15 - Data-phase duration. These bits are written by software to define the duration of the data phase (refer to Figure81 to Figure93), used in asynchronous SRAM, PSRAM and NOR Flash memory accesses:

pub fn busturn(&self) -> BUSTURN_R[src]

Bits 16:19 - Bus turnaround phase duration These bits are written by software to add a delay at the end of a write transaction to match the minimum time between consecutive transactions (tEHEL from ENx high to ENx low): (BUSTRUN + 1) KCK_FMC period ≥ tEHELmin. The programmed bus turnaround delay is inserted between a an asynchronous write transfer and any other asynchronous /synchronous read or write transfer to or from a static bank. If a read operation is performed, the bank can be the same or a different one, whereas it must be different in case of write operation to the bank, except in muxed mode or mode D. In some cases, whatever the programmed BUSTRUN values, the bus turnaround delay is fixed as follows: The bus turnaround delay is not inserted between two consecutive asynchronous write transfers to the same static memory bank except for muxed mode and mode D. There is a bus turnaround delay of 2 FMC clock cycle between: Two consecutive synchronous write operations (in Burst or Single mode) to the same bank A synchronous write transfer ((in Burst or Single mode) and an asynchronous write or read transfer to or from static memory bank. There is a bus turnaround delay of 3 FMC clock cycle between: Two consecutive synchronous write operations (in Burst or Single mode) to different static banks. A synchronous write transfer (in Burst or Single mode) and a synchronous read from the same or a different bank. ...

pub fn accmod(&self) -> ACCMOD_R[src]

Bits 28:29 - Access mode. These bits specify the asynchronous access modes as shown in the next timing diagrams.These bits are taken into account only when the EXTMOD bit in the FMC_BCRx register is 1.

impl R<u32, Reg<u32, _FMC_BWTR2>>[src]

pub fn addset(&self) -> ADDSET_R[src]

Bits 0:3 - Address setup phase duration. These bits are written by software to define the duration of the address setup phase in KCK_FMC cycles (refer to Figure81 to Figure93), used in asynchronous accesses: ... Note: In synchronous accesses, this value is not used, the address setup phase is always 1 Flash clock period duration. In muxed mode, the minimum ADDSET value is 1.

pub fn addhld(&self) -> ADDHLD_R[src]

Bits 4:7 - Address-hold phase duration. These bits are written by software to define the duration of the address hold phase (refer to Figure81 to Figure93), used in asynchronous multiplexed accesses: ... Note: In synchronous NOR Flash accesses, this value is not used, the address hold phase is always 1 Flash clock period duration.

pub fn datast(&self) -> DATAST_R[src]

Bits 8:15 - Data-phase duration. These bits are written by software to define the duration of the data phase (refer to Figure81 to Figure93), used in asynchronous SRAM, PSRAM and NOR Flash memory accesses:

pub fn busturn(&self) -> BUSTURN_R[src]

Bits 16:19 - Bus turnaround phase duration These bits are written by software to add a delay at the end of a write transaction to match the minimum time between consecutive transactions (tEHEL from ENx high to ENx low): (BUSTRUN + 1) KCK_FMC period ≥ tEHELmin. The programmed bus turnaround delay is inserted between a an asynchronous write transfer and any other asynchronous /synchronous read or write transfer to or from a static bank. If a read operation is performed, the bank can be the same or a different one, whereas it must be different in case of write operation to the bank, except in muxed mode or mode D. In some cases, whatever the programmed BUSTRUN values, the bus turnaround delay is fixed as follows: The bus turnaround delay is not inserted between two consecutive asynchronous write transfers to the same static memory bank except for muxed mode and mode D. There is a bus turnaround delay of 2 FMC clock cycle between: Two consecutive synchronous write operations (in Burst or Single mode) to the same bank A synchronous write transfer ((in Burst or Single mode) and an asynchronous write or read transfer to or from static memory bank. There is a bus turnaround delay of 3 FMC clock cycle between: Two consecutive synchronous write operations (in Burst or Single mode) to different static banks. A synchronous write transfer (in Burst or Single mode) and a synchronous read from the same or a different bank. ...

pub fn accmod(&self) -> ACCMOD_R[src]

Bits 28:29 - Access mode. These bits specify the asynchronous access modes as shown in the next timing diagrams.These bits are taken into account only when the EXTMOD bit in the FMC_BCRx register is 1.

impl R<u32, Reg<u32, _FMC_BWTR3>>[src]

pub fn addset(&self) -> ADDSET_R[src]

Bits 0:3 - Address setup phase duration. These bits are written by software to define the duration of the address setup phase in KCK_FMC cycles (refer to Figure81 to Figure93), used in asynchronous accesses: ... Note: In synchronous accesses, this value is not used, the address setup phase is always 1 Flash clock period duration. In muxed mode, the minimum ADDSET value is 1.

pub fn addhld(&self) -> ADDHLD_R[src]

Bits 4:7 - Address-hold phase duration. These bits are written by software to define the duration of the address hold phase (refer to Figure81 to Figure93), used in asynchronous multiplexed accesses: ... Note: In synchronous NOR Flash accesses, this value is not used, the address hold phase is always 1 Flash clock period duration.

pub fn datast(&self) -> DATAST_R[src]

Bits 8:15 - Data-phase duration. These bits are written by software to define the duration of the data phase (refer to Figure81 to Figure93), used in asynchronous SRAM, PSRAM and NOR Flash memory accesses:

pub fn busturn(&self) -> BUSTURN_R[src]

Bits 16:19 - Bus turnaround phase duration These bits are written by software to add a delay at the end of a write transaction to match the minimum time between consecutive transactions (tEHEL from ENx high to ENx low): (BUSTRUN + 1) KCK_FMC period ≥ tEHELmin. The programmed bus turnaround delay is inserted between a an asynchronous write transfer and any other asynchronous /synchronous read or write transfer to or from a static bank. If a read operation is performed, the bank can be the same or a different one, whereas it must be different in case of write operation to the bank, except in muxed mode or mode D. In some cases, whatever the programmed BUSTRUN values, the bus turnaround delay is fixed as follows: The bus turnaround delay is not inserted between two consecutive asynchronous write transfers to the same static memory bank except for muxed mode and mode D. There is a bus turnaround delay of 2 FMC clock cycle between: Two consecutive synchronous write operations (in Burst or Single mode) to the same bank A synchronous write transfer ((in Burst or Single mode) and an asynchronous write or read transfer to or from static memory bank. There is a bus turnaround delay of 3 FMC clock cycle between: Two consecutive synchronous write operations (in Burst or Single mode) to different static banks. A synchronous write transfer (in Burst or Single mode) and a synchronous read from the same or a different bank. ...

pub fn accmod(&self) -> ACCMOD_R[src]

Bits 28:29 - Access mode. These bits specify the asynchronous access modes as shown in the next timing diagrams.These bits are taken into account only when the EXTMOD bit in the FMC_BCRx register is 1.

impl R<u32, Reg<u32, _FMC_BWTR4>>[src]

pub fn addset(&self) -> ADDSET_R[src]

Bits 0:3 - Address setup phase duration. These bits are written by software to define the duration of the address setup phase in KCK_FMC cycles (refer to Figure81 to Figure93), used in asynchronous accesses: ... Note: In synchronous accesses, this value is not used, the address setup phase is always 1 Flash clock period duration. In muxed mode, the minimum ADDSET value is 1.

pub fn addhld(&self) -> ADDHLD_R[src]

Bits 4:7 - Address-hold phase duration. These bits are written by software to define the duration of the address hold phase (refer to Figure81 to Figure93), used in asynchronous multiplexed accesses: ... Note: In synchronous NOR Flash accesses, this value is not used, the address hold phase is always 1 Flash clock period duration.

pub fn datast(&self) -> DATAST_R[src]

Bits 8:15 - Data-phase duration. These bits are written by software to define the duration of the data phase (refer to Figure81 to Figure93), used in asynchronous SRAM, PSRAM and NOR Flash memory accesses:

pub fn busturn(&self) -> BUSTURN_R[src]

Bits 16:19 - Bus turnaround phase duration These bits are written by software to add a delay at the end of a write transaction to match the minimum time between consecutive transactions (tEHEL from ENx high to ENx low): (BUSTRUN + 1) KCK_FMC period ≥ tEHELmin. The programmed bus turnaround delay is inserted between a an asynchronous write transfer and any other asynchronous /synchronous read or write transfer to or from a static bank. If a read operation is performed, the bank can be the same or a different one, whereas it must be different in case of write operation to the bank, except in muxed mode or mode D. In some cases, whatever the programmed BUSTRUN values, the bus turnaround delay is fixed as follows: The bus turnaround delay is not inserted between two consecutive asynchronous write transfers to the same static memory bank except for muxed mode and mode D. There is a bus turnaround delay of 2 FMC clock cycle between: Two consecutive synchronous write operations (in Burst or Single mode) to the same bank A synchronous write transfer ((in Burst or Single mode) and an asynchronous write or read transfer to or from static memory bank. There is a bus turnaround delay of 3 FMC clock cycle between: Two consecutive synchronous write operations (in Burst or Single mode) to different static banks. A synchronous write transfer (in Burst or Single mode) and a synchronous read from the same or a different bank. ...

pub fn accmod(&self) -> ACCMOD_R[src]

Bits 28:29 - Access mode. These bits specify the asynchronous access modes as shown in the next timing diagrams.These bits are taken into account only when the EXTMOD bit in the FMC_BCRx register is 1.

impl R<u32, Reg<u32, _PCSCNTR>>[src]

pub fn cscount(&self) -> CSCOUNT_R[src]

Bits 0:15 - Chip select counter

pub fn cntb1en(&self) -> CNTB1EN_R[src]

Bit 16 - Counter Bank 1 enable

pub fn cntb2en(&self) -> CNTB2EN_R[src]

Bit 17 - Counter Bank 2 enable

pub fn cntb3en(&self) -> CNTB3EN_R[src]

Bit 18 - Counter Bank 3 enable

pub fn cntb4en(&self) -> CNTB4EN_R[src]

Bit 19 - Counter Bank 4 enable

impl R<u32, Reg<u32, _RNG_CR>>[src]

pub fn rngen(&self) -> RNGEN_R[src]

Bit 2 - Random number generator enable

pub fn ie(&self) -> IE_R[src]

Bit 3 - Interrupt enable

pub fn ced(&self) -> CED_R[src]

Bit 5 - Clock error detection Note: The clock error detection can be used only when ck_rc48 or ck_pll1_q (ck_pll1_q = 48MHz) source is selected otherwise, CED bit must be equal to 1. The clock error detection cannot be enabled nor disabled on the fly when RNG peripheral is enabled, to enable or disable CED the RNG must be disabled.

pub fn rng_config3(&self) -> RNG_CONFIG3_R[src]

Bits 8:11 - RNG configuration 3

pub fn nistc(&self) -> NISTC_R[src]

Bit 12 - Non NIST compliant

pub fn rng_config2(&self) -> RNG_CONFIG2_R[src]

Bits 13:15 - RNG configuration 2

pub fn clkdiv(&self) -> CLKDIV_R[src]

Bits 16:19 - Clock divider factor

pub fn rng_config1(&self) -> RNG_CONFIG1_R[src]

Bits 20:25 - RNG configuration 1

pub fn condrst(&self) -> CONDRST_R[src]

Bit 30 - Conditioning soft reset

pub fn configlock(&self) -> CONFIGLOCK_R[src]

Bit 31 - RNG Config Lock

impl R<u32, Reg<u32, _RNG_SR>>[src]

pub fn drdy(&self) -> DRDY_R[src]

Bit 0 - Data ready Note: If IE=1 in RNG_CR, an interrupt is generated when DRDY=1. It can rise when the peripheral is disabled. When the output buffer becomes empty (after reading RNG_DR), this bit returns to 0 until a new random value is generated.

pub fn cecs(&self) -> CECS_R[src]

Bit 1 - Clock error current status Note: This bit is meaningless if CED (Clock error detection) bit in RNG_CR is equal to 1.

pub fn secs(&self) -> SECS_R[src]

Bit 2 - Seed error current status ** More than 64 consecutive bits at the same value (0 or 1) ** More than 32 consecutive alternances of 0 and 1 (0101010101...01)

pub fn ceis(&self) -> CEIS_R[src]

Bit 5 - Clock error interrupt status This bit is set at the same time as CECS. It is cleared by writing it to 0. An interrupt is pending if IE = 1 in the RNG_CR register. Note: This bit is meaningless if CED (Clock error detection) bit in RNG_CR is equal to 1.

pub fn seis(&self) -> SEIS_R[src]

Bit 6 - Seed error interrupt status This bit is set at the same time as SECS. It is cleared by writing it to 0. ** More than 64 consecutive bits at the same value (0 or 1) ** More than 32 consecutive alternances of 0 and 1 (0101010101...01) An interrupt is pending if IE = 1 in the RNG_CR register.

impl R<u32, Reg<u32, _RNG_DR>>[src]

pub fn rndata(&self) -> RNDATA_R[src]

Bits 0:31 - Random data 32-bit random data which are valid when DRDY=1.

impl R<u32, Reg<u32, _RNG_HTCR>>[src]

pub fn htcfg(&self) -> HTCFG_R[src]

Bits 0:31 - health test configuration

impl R<u32, Reg<u32, _SDMMC_POWER>>[src]

pub fn pwrctrl(&self) -> PWRCTRL_R[src]

Bits 0:1 - SDMMC state control bits. These bits can only be written when the SDMMC is not in the power-on state (PWRCTRL?11). These bits are used to define the functional state of the SDMMC signals: Any further write will be ignored, PWRCTRL value will keep 11.

pub fn vswitch(&self) -> VSWITCH_R[src]

Bit 2 - Voltage switch sequence start. This bit is used to start the timing critical section of the voltage switch sequence:

pub fn vswitchen(&self) -> VSWITCHEN_R[src]

Bit 3 - Voltage switch procedure enable. This bit can only be written by firmware when CPSM is disabled (CPSMEN = 0). This bit is used to stop the SDMMC_CK after the voltage switch command response:

pub fn dirpol(&self) -> DIRPOL_R[src]

Bit 4 - Data and command direction signals polarity selection. This bit can only be written when the SDMMC is in the power-off state (PWRCTRL = 00).

impl R<u32, Reg<u32, _SDMMC_CLKCR>>[src]

pub fn clkdiv(&self) -> CLKDIV_R[src]

Bits 0:9 - Clock divide factor This bit can only be written when the CPSM and DPSM are not active (CPSMACT = 0 and DPSMACT = 0). This field defines the divide factor between the input clock (SDMMCCLK) and the output clock (SDMMC_CK): SDMMC_CK frequency = SDMMCCLK / [2 * CLKDIV]. 0xx: etc.. xxx: etc..

pub fn pwrsav(&self) -> PWRSAV_R[src]

Bit 12 - Power saving configuration bit This bit can only be written when the CPSM and DPSM are not active (CPSMACT = 0 and DPSMACT = 0) For power saving, the SDMMC_CK clock output can be disabled when the bus is idle by setting PWRSAV:

pub fn widbus(&self) -> WIDBUS_R[src]

Bits 14:15 - Wide bus mode enable bit This bit can only be written when the CPSM and DPSM are not active (CPSMACT = 0 and DPSMACT = 0)

pub fn negedge(&self) -> NEGEDGE_R[src]

Bit 16 - SDMMC_CK dephasing selection bit for data and Command. This bit can only be written when the CPSM and DPSM are not active (CPSMACT = 0 and DPSMACT = 0). When clock division = 1 (CLKDIV = 0), this bit has no effect. Data and Command change on SDMMC_CK falling edge. When clock division >1 (CLKDIV > 0) & DDR = 0: - SDMMC_CK edge occurs on SDMMCCLK rising edge. When clock division >1 (CLKDIV > 0) & DDR = 1: - Data changed on the SDMMCCLK falling edge succeeding a SDMMC_CK edge. - SDMMC_CK edge occurs on SDMMCCLK rising edge. - Data changed on the SDMMC_CK falling edge succeeding a SDMMC_CK edge. - SDMMC_CK edge occurs on SDMMCCLK rising edge.

pub fn hwfc_en(&self) -> HWFC_EN_R[src]

Bit 17 - Hardware flow control enable This bit can only be written when the CPSM and DPSM are not active (CPSMACT = 0 and DPSMACT = 0) When Hardware flow control is enabled, the meaning of the TXFIFOE and RXFIFOF flags change, please see SDMMC status register definition in Section56.8.11.

pub fn ddr(&self) -> DDR_R[src]

Bit 18 - Data rate signaling selection This bit can only be written when the CPSM and DPSM are not active (CPSMACT = 0 and DPSMACT = 0) DDR rate shall only be selected with 4-bit or 8-bit wide bus mode. (WIDBUS > 00). DDR = 1 has no effect when WIDBUS = 00 (1-bit wide bus). DDR rate shall only be selected with clock division >1. (CLKDIV > 0)

pub fn busspeed(&self) -> BUSSPEED_R[src]

Bit 19 - Bus speed mode selection between DS, HS, SDR12, SDR25 and SDR50, DDR50, SDR104. This bit can only be written when the CPSM and DPSM are not active (CPSMACT = 0 and DPSMACT = 0)

pub fn selclkrx(&self) -> SELCLKRX_R[src]

Bits 20:21 - Receive clock selection. These bits can only be written when the CPSM and DPSM are not active (CPSMACT = 0 and DPSMACT = 0)

impl R<u32, Reg<u32, _SDMMC_ARGR>>[src]

pub fn cmdarg(&self) -> CMDARG_R[src]

Bits 0:31 - Command argument. These bits can only be written by firmware when CPSM is disabled (CPSMEN = 0). Command argument sent to a card as part of a command message. If a command contains an argument, it must be loaded into this register before writing a command to the command register.

impl R<u32, Reg<u32, _SDMMC_CMDR>>[src]

pub fn cmdindex(&self) -> CMDINDEX_R[src]

Bits 0:5 - Command index. This bit can only be written by firmware when CPSM is disabled (CPSMEN = 0). The command index is sent to the card as part of a command message.

pub fn cmdtrans(&self) -> CMDTRANS_R[src]

Bit 6 - The CPSM treats the command as a data transfer command, stops the interrupt period, and signals DataEnable to the DPSM This bit can only be written by firmware when CPSM is disabled (CPSMEN = 0). If this bit is set, the CPSM issues an end of interrupt period and issues DataEnable signal to the DPSM when the command is sent.

pub fn cmdstop(&self) -> CMDSTOP_R[src]

Bit 7 - The CPSM treats the command as a Stop Transmission command and signals Abort to the DPSM. This bit can only be written by firmware when CPSM is disabled (CPSMEN = 0). If this bit is set, the CPSM issues the Abort signal to the DPSM when the command is sent.

pub fn waitresp(&self) -> WAITRESP_R[src]

Bits 8:9 - Wait for response bits. This bit can only be written by firmware when CPSM is disabled (CPSMEN = 0). They are used to configure whether the CPSM is to wait for a response, and if yes, which kind of response.

pub fn waitint(&self) -> WAITINT_R[src]

Bit 10 - CPSM waits for interrupt request. If this bit is set, the CPSM disables command timeout and waits for an card interrupt request (Response). If this bit is cleared in the CPSM Wait state, will cause the abort of the interrupt mode.

pub fn waitpend(&self) -> WAITPEND_R[src]

Bit 11 - CPSM Waits for end of data transfer (CmdPend internal signal) from DPSM. This bit when set, the CPSM waits for the end of data transfer trigger before it starts sending a command. WAITPEND is only taken into account when DTMODE = MMC stream data transfer, WIDBUS = 1-bit wide bus mode, DPSMACT = 1 and DTDIR = from host to card.

pub fn cpsmen(&self) -> CPSMEN_R[src]

Bit 12 - Command path state machine (CPSM) Enable bit This bit is written 1 by firmware, and cleared by hardware when the CPSM enters the Idle state. If this bit is set, the CPSM is enabled. When DTEN = 1, no command will be transfered nor boot procedure will be started. CPSMEN is cleared to 0.

pub fn dthold(&self) -> DTHOLD_R[src]

Bit 13 - Hold new data block transmission and reception in the DPSM. If this bit is set, the DPSM will not move from the Wait_S state to the Send state or from the Wait_R state to the Receive state.

pub fn bootmode(&self) -> BOOTMODE_R[src]

Bit 14 - Select the boot mode procedure to be used. This bit can only be written by firmware when CPSM is disabled (CPSMEN = 0)

pub fn booten(&self) -> BOOTEN_R[src]

Bit 15 - Enable boot mode procedure.

pub fn cmdsuspend(&self) -> CMDSUSPEND_R[src]

Bit 16 - The CPSM treats the command as a Suspend or Resume command and signals interrupt period start/end. This bit can only be written by firmware when CPSM is disabled (CPSMEN = 0). CMDSUSPEND = 1 and CMDTRANS = 0 Suspend command, start interrupt period when response bit BS=0. CMDSUSPEND = 1 and CMDTRANS = 1 Resume command with data, end interrupt period when response bit DF=1.

impl R<u32, Reg<u32, _SDMMC_RESP1R>>[src]

pub fn cardstatus1(&self) -> CARDSTATUS1_R[src]

Bits 0:31 - see Table 432

impl R<u32, Reg<u32, _SDMMC_RESP2R>>[src]

pub fn cardstatus2(&self) -> CARDSTATUS2_R[src]

Bits 0:31 - see Table404.

impl R<u32, Reg<u32, _SDMMC_RESP3R>>[src]

pub fn cardstatus3(&self) -> CARDSTATUS3_R[src]

Bits 0:31 - see Table404.

impl R<u32, Reg<u32, _SDMMC_RESP4R>>[src]

pub fn cardstatus4(&self) -> CARDSTATUS4_R[src]

Bits 0:31 - see Table404.

impl R<u32, Reg<u32, _SDMMC_DTIMER>>[src]

pub fn datatime(&self) -> DATATIME_R[src]

Bits 0:31 - Data and R1b busy timeout period This bit can only be written when the CPSM and DPSM are not active (CPSMACT = 0 and DPSMACT = 0). Data and R1b busy timeout period expressed in card bus clock periods.

impl R<u32, Reg<u32, _SDMMC_DLENR>>[src]

pub fn datalength(&self) -> DATALENGTH_R[src]

Bits 0:24 - Data length value This register can only be written by firmware when DPSM is inactive (DPSMACT = 0). Number of data bytes to be transferred. When DDR = 1 DATALENGTH is truncated to a multiple of 2. (The last odd byte is not transfered) When DATALENGTH = 0 no data will be transfered, when requested by a CPSMEN and CMDTRANS = 1 also no command will be transfered. DTEN and CPSMEN are cleared to 0.

impl R<u32, Reg<u32, _SDMMC_DCTRL>>[src]

pub fn dten(&self) -> DTEN_R[src]

Bit 0 - Data transfer enable bit This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0). This bit is cleared by Hardware when data transfer completes. This bit shall only be used to transfer data when no associated data transfer command is used, i.e. shall not be used with SD or eMMC cards.

pub fn dtdir(&self) -> DTDIR_R[src]

Bit 1 - Data transfer direction selection This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0).

pub fn dtmode(&self) -> DTMODE_R[src]

Bits 2:3 - Data transfer mode selection. This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0).

pub fn dblocksize(&self) -> DBLOCKSIZE_R[src]

Bits 4:7 - Data block size This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0). Define the data block length when the block data transfer mode is selected: When DATALENGTH is not a multiple of DBLOCKSIZE, the transfered data is truncated at a multiple of DBLOCKSIZE. (Any remain data will not be transfered.) When DDR = 1, DBLOCKSIZE = 0000 shall not be used. (No data will be transfered)

pub fn rwstart(&self) -> RWSTART_R[src]

Bit 8 - Read wait start. If this bit is set, read wait operation starts.

pub fn rwstop(&self) -> RWSTOP_R[src]

Bit 9 - Read wait stop This bit is written by firmware and auto cleared by hardware when the DPSM moves from the READ_WAIT state to the WAIT_R or IDLE state.

pub fn rwmod(&self) -> RWMOD_R[src]

Bit 10 - Read wait mode. This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0).

pub fn sdioen(&self) -> SDIOEN_R[src]

Bit 11 - SD I/O interrupt enable functions This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0). If this bit is set, the DPSM enables the SD I/O card specific interrupt operation.

pub fn bootacken(&self) -> BOOTACKEN_R[src]

Bit 12 - Enable the reception of the boot acknowledgment. This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0).

pub fn fiforst(&self) -> FIFORST_R[src]

Bit 13 - FIFO reset, will flush any remaining data. This bit can only be written by firmware when IDMAEN= 0 and DPSM is active (DPSMACT = 1). This bit will only take effect when a transfer error or transfer hold occurs.

impl R<u32, Reg<u32, _SDMMC_DCNTR>>[src]

pub fn datacount(&self) -> DATACOUNT_R[src]

Bits 0:24 - Data count value When read, the number of remaining data bytes to be transferred is returned. Write has no effect.

impl R<u32, Reg<u32, _SDMMC_STAR>>[src]

pub fn ccrcfail(&self) -> CCRCFAIL_R[src]

Bit 0 - Command response received (CRC check failed). Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR.

pub fn dcrcfail(&self) -> DCRCFAIL_R[src]

Bit 1 - Data block sent/received (CRC check failed). Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR.

pub fn ctimeout(&self) -> CTIMEOUT_R[src]

Bit 2 - Command response timeout. Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR. The Command Timeout period has a fixed value of 64 SDMMC_CK clock periods.

pub fn dtimeout(&self) -> DTIMEOUT_R[src]

Bit 3 - Data timeout. Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR.

pub fn txunderr(&self) -> TXUNDERR_R[src]

Bit 4 - Transmit FIFO underrun error or IDMA read transfer error. Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR.

pub fn rxoverr(&self) -> RXOVERR_R[src]

Bit 5 - Received FIFO overrun error or IDMA write transfer error. Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR.

pub fn cmdrend(&self) -> CMDREND_R[src]

Bit 6 - Command response received (CRC check passed, or no CRC). Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR.

pub fn cmdsent(&self) -> CMDSENT_R[src]

Bit 7 - Command sent (no response required). Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR.

pub fn dataend(&self) -> DATAEND_R[src]

Bit 8 - Data transfer ended correctly. (data counter, DATACOUNT is zero and no errors occur). Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR.

pub fn dhold(&self) -> DHOLD_R[src]

Bit 9 - Data transfer Hold. Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR.

pub fn dbckend(&self) -> DBCKEND_R[src]

Bit 10 - Data block sent/received. (CRC check passed) and DPSM moves to the READWAIT state. Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR.

pub fn dabort(&self) -> DABORT_R[src]

Bit 11 - Data transfer aborted by CMD12. Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR.

pub fn dpsmact(&self) -> DPSMACT_R[src]

Bit 12 - Data path state machine active, i.e. not in Idle state. This is a hardware status flag only, does not generate an interrupt.

pub fn cpsmact(&self) -> CPSMACT_R[src]

Bit 13 - Command path state machine active, i.e. not in Idle state. This is a hardware status flag only, does not generate an interrupt.

pub fn txfifohe(&self) -> TXFIFOHE_R[src]

Bit 14 - Transmit FIFO half empty At least half the number of words can be written into the FIFO. This bit is cleared when the FIFO becomes half+1 full.

pub fn rxfifohf(&self) -> RXFIFOHF_R[src]

Bit 15 - Receive FIFO half full There are at least half the number of words in the FIFO. This bit is cleared when the FIFO becomes half+1 empty.

pub fn txfifof(&self) -> TXFIFOF_R[src]

Bit 16 - Transmit FIFO full This is a hardware status flag only, does not generate an interrupt. This bit is cleared when one FIFO location becomes empty.

pub fn rxfifof(&self) -> RXFIFOF_R[src]

Bit 17 - Receive FIFO full This bit is cleared when one FIFO location becomes empty.

pub fn txfifoe(&self) -> TXFIFOE_R[src]

Bit 18 - Transmit FIFO empty This bit is cleared when one FIFO location becomes full.

pub fn rxfifoe(&self) -> RXFIFOE_R[src]

Bit 19 - Receive FIFO empty This is a hardware status flag only, does not generate an interrupt. This bit is cleared when one FIFO location becomes full.

pub fn busyd0(&self) -> BUSYD0_R[src]

Bit 20 - Inverted value of SDMMC_D0 line (Busy), sampled at the end of a CMD response and a second time 2 SDMMC_CK cycles after the CMD response. This bit is reset to not busy when the SDMMCD0 line changes from busy to not busy. This bit does not signal busy due to data transfer. This is a hardware status flag only, it does not generate an interrupt.

pub fn busyd0end(&self) -> BUSYD0END_R[src]

Bit 21 - end of SDMMC_D0 Busy following a CMD response detected. This indicates only end of busy following a CMD response. This bit does not signal busy due to data transfer. Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR.

pub fn sdioit(&self) -> SDIOIT_R[src]

Bit 22 - SDIO interrupt received. Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR.

pub fn ackfail(&self) -> ACKFAIL_R[src]

Bit 23 - Boot acknowledgment received (boot acknowledgment check fail). Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR.

pub fn acktimeout(&self) -> ACKTIMEOUT_R[src]

Bit 24 - Boot acknowledgment timeout. Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR.

pub fn vswend(&self) -> VSWEND_R[src]

Bit 25 - Voltage switch critical timing section completion. Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR.

pub fn ckstop(&self) -> CKSTOP_R[src]

Bit 26 - SDMMC_CK stopped in Voltage switch procedure. Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR.

pub fn idmate(&self) -> IDMATE_R[src]

Bit 27 - IDMA transfer error. Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR.

pub fn idmabtc(&self) -> IDMABTC_R[src]

Bit 28 - IDMA buffer transfer complete. interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR.

impl R<u32, Reg<u32, _SDMMC_ICR>>[src]

pub fn ccrcfailc(&self) -> CCRCFAILC_R[src]

Bit 0 - CCRCFAIL flag clear bit Set by software to clear the CCRCFAIL flag.

pub fn dcrcfailc(&self) -> DCRCFAILC_R[src]

Bit 1 - DCRCFAIL flag clear bit Set by software to clear the DCRCFAIL flag.

pub fn ctimeoutc(&self) -> CTIMEOUTC_R[src]

Bit 2 - CTIMEOUT flag clear bit Set by software to clear the CTIMEOUT flag.

pub fn dtimeoutc(&self) -> DTIMEOUTC_R[src]

Bit 3 - DTIMEOUT flag clear bit Set by software to clear the DTIMEOUT flag.

pub fn txunderrc(&self) -> TXUNDERRC_R[src]

Bit 4 - TXUNDERR flag clear bit Set by software to clear TXUNDERR flag.

pub fn rxoverrc(&self) -> RXOVERRC_R[src]

Bit 5 - RXOVERR flag clear bit Set by software to clear the RXOVERR flag.

pub fn cmdrendc(&self) -> CMDRENDC_R[src]

Bit 6 - CMDREND flag clear bit Set by software to clear the CMDREND flag.

pub fn cmdsentc(&self) -> CMDSENTC_R[src]

Bit 7 - CMDSENT flag clear bit Set by software to clear the CMDSENT flag.

pub fn dataendc(&self) -> DATAENDC_R[src]

Bit 8 - DATAEND flag clear bit Set by software to clear the DATAEND flag.

pub fn dholdc(&self) -> DHOLDC_R[src]

Bit 9 - DHOLD flag clear bit Set by software to clear the DHOLD flag.

pub fn dbckendc(&self) -> DBCKENDC_R[src]

Bit 10 - DBCKEND flag clear bit Set by software to clear the DBCKEND flag.

pub fn dabortc(&self) -> DABORTC_R[src]

Bit 11 - DABORT flag clear bit Set by software to clear the DABORT flag.

pub fn busyd0endc(&self) -> BUSYD0ENDC_R[src]

Bit 21 - BUSYD0END flag clear bit Set by software to clear the BUSYD0END flag.

pub fn sdioitc(&self) -> SDIOITC_R[src]

Bit 22 - SDIOIT flag clear bit Set by software to clear the SDIOIT flag.

pub fn ackfailc(&self) -> ACKFAILC_R[src]

Bit 23 - ACKFAIL flag clear bit Set by software to clear the ACKFAIL flag.

pub fn acktimeoutc(&self) -> ACKTIMEOUTC_R[src]

Bit 24 - ACKTIMEOUT flag clear bit Set by software to clear the ACKTIMEOUT flag.

pub fn vswendc(&self) -> VSWENDC_R[src]

Bit 25 - VSWEND flag clear bit Set by software to clear the VSWEND flag.

pub fn ckstopc(&self) -> CKSTOPC_R[src]

Bit 26 - CKSTOP flag clear bit Set by software to clear the CKSTOP flag.

pub fn idmatec(&self) -> IDMATEC_R[src]

Bit 27 - IDMA transfer error clear bit Set by software to clear the IDMATE flag.

pub fn idmabtcc(&self) -> IDMABTCC_R[src]

Bit 28 - IDMA buffer transfer complete clear bit Set by software to clear the IDMABTC flag.

impl R<u32, Reg<u32, _SDMMC_MASKR>>[src]

pub fn ccrcfailie(&self) -> CCRCFAILIE_R[src]

Bit 0 - Command CRC fail interrupt enable Set and cleared by software to enable/disable interrupt caused by command CRC failure.

pub fn dcrcfailie(&self) -> DCRCFAILIE_R[src]

Bit 1 - Data CRC fail interrupt enable Set and cleared by software to enable/disable interrupt caused by data CRC failure.

pub fn ctimeoutie(&self) -> CTIMEOUTIE_R[src]

Bit 2 - Command timeout interrupt enable Set and cleared by software to enable/disable interrupt caused by command timeout.

pub fn dtimeoutie(&self) -> DTIMEOUTIE_R[src]

Bit 3 - Data timeout interrupt enable Set and cleared by software to enable/disable interrupt caused by data timeout.

pub fn txunderrie(&self) -> TXUNDERRIE_R[src]

Bit 4 - Tx FIFO underrun error interrupt enable Set and cleared by software to enable/disable interrupt caused by Tx FIFO underrun error.

pub fn rxoverrie(&self) -> RXOVERRIE_R[src]

Bit 5 - Rx FIFO overrun error interrupt enable Set and cleared by software to enable/disable interrupt caused by Rx FIFO overrun error.

pub fn cmdrendie(&self) -> CMDRENDIE_R[src]

Bit 6 - Command response received interrupt enable Set and cleared by software to enable/disable interrupt caused by receiving command response.

pub fn cmdsentie(&self) -> CMDSENTIE_R[src]

Bit 7 - Command sent interrupt enable Set and cleared by software to enable/disable interrupt caused by sending command.

pub fn dataendie(&self) -> DATAENDIE_R[src]

Bit 8 - Data end interrupt enable Set and cleared by software to enable/disable interrupt caused by data end.

pub fn dholdie(&self) -> DHOLDIE_R[src]

Bit 9 - Data hold interrupt enable Set and cleared by software to enable/disable the interrupt generated when sending new data is hold in the DPSM Wait_S state.

pub fn dbckendie(&self) -> DBCKENDIE_R[src]

Bit 10 - Data block end interrupt enable Set and cleared by software to enable/disable interrupt caused by data block end.

pub fn dabortie(&self) -> DABORTIE_R[src]

Bit 11 - Data transfer aborted interrupt enable Set and cleared by software to enable/disable interrupt caused by a data transfer being aborted.

pub fn txfifoheie(&self) -> TXFIFOHEIE_R[src]

Bit 14 - Tx FIFO half empty interrupt enable Set and cleared by software to enable/disable interrupt caused by Tx FIFO half empty.

pub fn rxfifohfie(&self) -> RXFIFOHFIE_R[src]

Bit 15 - Rx FIFO half full interrupt enable Set and cleared by software to enable/disable interrupt caused by Rx FIFO half full.

pub fn rxfifofie(&self) -> RXFIFOFIE_R[src]

Bit 17 - Rx FIFO full interrupt enable Set and cleared by software to enable/disable interrupt caused by Rx FIFO full.

pub fn txfifoeie(&self) -> TXFIFOEIE_R[src]

Bit 18 - Tx FIFO empty interrupt enable Set and cleared by software to enable/disable interrupt caused by Tx FIFO empty.

pub fn busyd0endie(&self) -> BUSYD0ENDIE_R[src]

Bit 21 - BUSYD0END interrupt enable Set and cleared by software to enable/disable the interrupt generated when SDMMC_D0 signal changes from busy to NOT busy following a CMD response.

pub fn sdioitie(&self) -> SDIOITIE_R[src]

Bit 22 - SDIO mode interrupt received interrupt enable Set and cleared by software to enable/disable the interrupt generated when receiving the SDIO mode interrupt.

pub fn ackfailie(&self) -> ACKFAILIE_R[src]

Bit 23 - Acknowledgment Fail interrupt enable Set and cleared by software to enable/disable interrupt caused by acknowledgment Fail.

pub fn acktimeoutie(&self) -> ACKTIMEOUTIE_R[src]

Bit 24 - Acknowledgment timeout interrupt enable Set and cleared by software to enable/disable interrupt caused by acknowledgment timeout.

pub fn vswendie(&self) -> VSWENDIE_R[src]

Bit 25 - Voltage switch critical timing section completion interrupt enable Set and cleared by software to enable/disable the interrupt generated when voltage switch critical timing section completion.

pub fn ckstopie(&self) -> CKSTOPIE_R[src]

Bit 26 - Voltage Switch clock stopped interrupt enable Set and cleared by software to enable/disable interrupt caused by Voltage Switch clock stopped.

pub fn idmabtcie(&self) -> IDMABTCIE_R[src]

Bit 28 - IDMA buffer transfer complete interrupt enable Set and cleared by software to enable/disable the interrupt generated when the IDMA has transferred all data belonging to a memory buffer.

impl R<u32, Reg<u32, _SDMMC_ACKTIMER>>[src]

pub fn acktime(&self) -> ACKTIME_R[src]

Bits 0:24 - Boot acknowledgment timeout period This bit can only be written by firmware when CPSM is disabled (CPSMEN = 0). Boot acknowledgment timeout period expressed in card bus clock periods.

impl R<u32, Reg<u32, _SDMMC_IDMACTRLR>>[src]

pub fn idmaen(&self) -> IDMAEN_R[src]

Bit 0 - IDMA enable This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0).

pub fn idmabmode(&self) -> IDMABMODE_R[src]

Bit 1 - Buffer mode selection. This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0).

pub fn idmabact(&self) -> IDMABACT_R[src]

Bit 2 - Double buffer mode active buffer indication This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0). When IDMA is enabled this bit is toggled by hardware.

impl R<u32, Reg<u32, _SDMMC_IDMABSIZER>>[src]

pub fn idmabndt(&self) -> IDMABNDT_R[src]

Bits 5:12 - Number of transfers per buffer. This 8-bit value shall be multiplied by 8 to get the size of the buffer in 32-bit words and by 32 to get the size of the buffer in bytes. Example: IDMABNDT = 0x01: buffer size = 8 words = 32 bytes. These bits can only be written by firmware when DPSM is inactive (DPSMACT = 0).

impl R<u32, Reg<u32, _SDMMC_IDMABASE0R>>[src]

pub fn idmabase0(&self) -> IDMABASE0_R[src]

Bits 0:31 - Buffer 0 memory base address bits [31:2], shall be word aligned (bit [1:0] are always 0 and read only). This register can be written by firmware when DPSM is inactive (DPSMACT = 0), and can dynamically be written by firmware when DPSM active (DPSMACT = 1) and memory buffer 0 is inactive (IDMABACT = 1).

impl R<u32, Reg<u32, _SDMMC_IDMABASE1R>>[src]

pub fn idmabase1(&self) -> IDMABASE1_R[src]

Bits 0:31 - Buffer 1 memory base address, shall be word aligned (bit [1:0] are always 0 and read only). This register can be written by firmware when DPSM is inactive (DPSMACT = 0), and can dynamically be written by firmware when DPSM active (DPSMACT = 1) and memory buffer 1 is inactive (IDMABACT = 0).

impl R<u32, Reg<u32, _SDMMC_FIFOR>>[src]

pub fn fifodata(&self) -> FIFODATA_R[src]

Bits 0:31 - Receive and transmit FIFO data This register can only be read or written by firmware when the DPSM is active (DPSMACT=1). The FIFO data occupies 16 entries of 32-bit words.

impl R<u32, Reg<u32, _SDMMC_VER>>[src]

pub fn minrev(&self) -> MINREV_R[src]

Bits 0:3 - IP minor revision number.

pub fn majrev(&self) -> MAJREV_R[src]

Bits 4:7 - IP major revision number.

impl R<u32, Reg<u32, _SDMMC_ID>>[src]

pub fn ip_id(&self) -> IP_ID_R[src]

Bits 0:31 - SDMMC IP identification.

impl R<u32, Reg<u32, _SDMMC_RESPCMDR>>[src]

pub fn respcmd(&self) -> RESPCMD_R[src]

Bits 0:5 - Response command index

Trait Implementations

impl<U, T, FI> PartialEq<FI> for R<U, T> where
    U: PartialEq,
    FI: Copy + Into<U>, 
[src]

Auto Trait Implementations

impl<U, T> Send for R<U, T> where
    T: Send,
    U: Send

impl<U, T> Sync for R<U, T> where
    T: Sync,
    U: Sync

impl<U, T> Unpin for R<U, T> where
    T: Unpin,
    U: Unpin

Blanket Implementations

impl<T> Any for T where
    T: 'static + ?Sized
[src]

impl<T> Borrow<T> for T where
    T: ?Sized
[src]

impl<T> BorrowMut<T> for T where
    T: ?Sized
[src]

impl<T> From<T> for T[src]

impl<T, U> Into<U> for T where
    U: From<T>, 
[src]

impl<T> Same<T> for T

type Output = T

Should always be Self

impl<T, U> TryFrom<U> for T where
    U: Into<T>, 
[src]

type Error = Infallible

The type returned in the event of a conversion error.

impl<T, U> TryInto<U> for T where
    U: TryFrom<T>, 
[src]

type Error = <U as TryFrom<T>>::Error

The type returned in the event of a conversion error.