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#[doc = "Reader of register PLLSAI2CFGR"] pub type R = crate::R<u32, super::PLLSAI2CFGR>; #[doc = "Writer for register PLLSAI2CFGR"] pub type W = crate::W<u32, super::PLLSAI2CFGR>; #[doc = "Register PLLSAI2CFGR `reset()`'s with value 0x1000"] impl crate::ResetValue for super::PLLSAI2CFGR { type Type = u32; #[inline(always)] fn reset_value() -> Self::Type { 0x1000 } } #[doc = "Reader of field `PLLSAI2PDIV`"] pub type PLLSAI2PDIV_R = crate::R<u8, u8>; #[doc = "Write proxy for field `PLLSAI2PDIV`"] pub struct PLLSAI2PDIV_W<'a> { w: &'a mut W, } impl<'a> PLLSAI2PDIV_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x1f << 27)) | (((value as u32) & 0x1f) << 27); self.w } } #[doc = "Reader of field `PLLSAI2P`"] pub type PLLSAI2P_R = crate::R<bool, bool>; #[doc = "Write proxy for field `PLLSAI2P`"] pub struct PLLSAI2P_W<'a> { w: &'a mut W, } impl<'a> PLLSAI2P_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 17)) | (((value as u32) & 0x01) << 17); self.w } } #[doc = "Reader of field `PLLSAI2PEN`"] pub type PLLSAI2PEN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `PLLSAI2PEN`"] pub struct PLLSAI2PEN_W<'a> { w: &'a mut W, } impl<'a> PLLSAI2PEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 16)) | (((value as u32) & 0x01) << 16); self.w } } #[doc = "Reader of field `PLLSAI2N`"] pub type PLLSAI2N_R = crate::R<u8, u8>; #[doc = "Write proxy for field `PLLSAI2N`"] pub struct PLLSAI2N_W<'a> { w: &'a mut W, } impl<'a> PLLSAI2N_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x7f << 8)) | (((value as u32) & 0x7f) << 8); self.w } } #[doc = "Reader of field `PLLSAI2M`"] pub type PLLSAI2M_R = crate::R<u8, u8>; #[doc = "Write proxy for field `PLLSAI2M`"] pub struct PLLSAI2M_W<'a> { w: &'a mut W, } impl<'a> PLLSAI2M_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 4)) | (((value as u32) & 0x0f) << 4); self.w } } #[doc = "Reader of field `PLLSAI2SRC`"] pub type PLLSAI2SRC_R = crate::R<u8, u8>; #[doc = "Write proxy for field `PLLSAI2SRC`"] pub struct PLLSAI2SRC_W<'a> { w: &'a mut W, } impl<'a> PLLSAI2SRC_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0x03) | ((value as u32) & 0x03); self.w } } impl R { #[doc = "Bits 27:31 - PLLSAI2 division factor for PLLSAI2CLK"] #[inline(always)] pub fn pllsai2pdiv(&self) -> PLLSAI2PDIV_R { PLLSAI2PDIV_R::new(((self.bits >> 27) & 0x1f) as u8) } #[doc = "Bit 17 - SAI1PLL division factor for PLLSAI2CLK (SAI1 or SAI2 clock)"] #[inline(always)] pub fn pllsai2p(&self) -> PLLSAI2P_R { PLLSAI2P_R::new(((self.bits >> 17) & 0x01) != 0) } #[doc = "Bit 16 - SAI2PLL PLLSAI2CLK output enable"] #[inline(always)] pub fn pllsai2pen(&self) -> PLLSAI2PEN_R { PLLSAI2PEN_R::new(((self.bits >> 16) & 0x01) != 0) } #[doc = "Bits 8:14 - SAI2PLL multiplication factor for VCO"] #[inline(always)] pub fn pllsai2n(&self) -> PLLSAI2N_R { PLLSAI2N_R::new(((self.bits >> 8) & 0x7f) as u8) } #[doc = "Bits 4:7 - Division factor for PLLSAI2 input clock"] #[inline(always)] pub fn pllsai2m(&self) -> PLLSAI2M_R { PLLSAI2M_R::new(((self.bits >> 4) & 0x0f) as u8) } #[doc = "Bits 0:1 - PLLSAI2SRC"] #[inline(always)] pub fn pllsai2src(&self) -> PLLSAI2SRC_R { PLLSAI2SRC_R::new((self.bits & 0x03) as u8) } } impl W { #[doc = "Bits 27:31 - PLLSAI2 division factor for PLLSAI2CLK"] #[inline(always)] pub fn pllsai2pdiv(&mut self) -> PLLSAI2PDIV_W { PLLSAI2PDIV_W { w: self } } #[doc = "Bit 17 - SAI1PLL division factor for PLLSAI2CLK (SAI1 or SAI2 clock)"] #[inline(always)] pub fn pllsai2p(&mut self) -> PLLSAI2P_W { PLLSAI2P_W { w: self } } #[doc = "Bit 16 - SAI2PLL PLLSAI2CLK output enable"] #[inline(always)] pub fn pllsai2pen(&mut self) -> PLLSAI2PEN_W { PLLSAI2PEN_W { w: self } } #[doc = "Bits 8:14 - SAI2PLL multiplication factor for VCO"] #[inline(always)] pub fn pllsai2n(&mut self) -> PLLSAI2N_W { PLLSAI2N_W { w: self } } #[doc = "Bits 4:7 - Division factor for PLLSAI2 input clock"] #[inline(always)] pub fn pllsai2m(&mut self) -> PLLSAI2M_W { PLLSAI2M_W { w: self } } #[doc = "Bits 0:1 - PLLSAI2SRC"] #[inline(always)] pub fn pllsai2src(&mut self) -> PLLSAI2SRC_W { PLLSAI2SRC_W { w: self } } }