rigless 0.0.5

// rigless svd from STM32F427.svd, sha256 5eb6bfd30833147f0cb93b74235b602f835fddd78d3795f67a5873804e80d414. Do not edit.
//! Registers of `OTG_FS_DEVICE` and the instances derived from it.

use rigless::soc::{Access, FieldSpec, Layout, ReadAction, RegisterSpec, Width, WriteModify};

/// The registers by name; a variant's index is its row in [`REGISTERS`].
#[derive(Debug, Clone, Copy, PartialEq, Eq)]
pub enum Register {
    /// `FS_DCFG` at offset `0x0`, resets to `0x0220_0000`, read-write.
    FsDcfg = 0,
    /// `FS_DCTL` at offset `0x4`, resets to `0x0000_0000`, read-write.
    FsDctl = 1,
    /// `FS_DSTS` at offset `0x8`, resets to `0x0000_0010`, read-only.
    FsDsts = 2,
    /// `FS_DIEPMSK` at offset `0x10`, resets to `0x0000_0000`, read-write.
    FsDiepmsk = 3,
    /// `FS_DOEPMSK` at offset `0x14`, resets to `0x0000_0000`, read-write.
    FsDoepmsk = 4,
    /// `FS_DAINT` at offset `0x18`, resets to `0x0000_0000`, read-only.
    FsDaint = 5,
    /// `FS_DAINTMSK` at offset `0x1C`, resets to `0x0000_0000`, read-write.
    FsDaintmsk = 6,
    /// `DVBUSDIS` at offset `0x28`, resets to `0x0000_17D7`, read-write.
    Dvbusdis = 7,
    /// `DVBUSPULSE` at offset `0x2C`, resets to `0x0000_05B8`, read-write.
    Dvbuspulse = 8,
    /// `DIEPEMPMSK` at offset `0x34`, resets to `0x0000_0000`, read-write.
    Diepempmsk = 9,
    /// `FS_DIEPCTL0` at offset `0x100`, resets to `0x0000_0000`, read-write.
    FsDiepctl0 = 10,
    /// `DIEPINT0` at offset `0x108`, resets to `0x0000_0080`, read-write.
    Diepint0 = 11,
    /// `DIEPTSIZ0` at offset `0x110`, resets to `0x0000_0000`, read-write.
    Dieptsiz0 = 12,
    /// `DTXFSTS0` at offset `0x118`, resets to `0x0000_0000`, read-only.
    Dtxfsts0 = 13,
    /// `DIEPCTL1` at offset `0x120`, resets to `0x0000_0000`, read-write.
    Diepctl1 = 14,
    /// `DIEPINT1` at offset `0x128`, resets to `0x0000_0080`, read-write.
    Diepint1 = 15,
    /// `DIEPTSIZ1` at offset `0x130`, resets to `0x0000_0000`, read-write.
    Dieptsiz1 = 16,
    /// `DTXFSTS1` at offset `0x138`, resets to `0x0000_0000`, read-only.
    Dtxfsts1 = 17,
    /// `DIEPCTL2` at offset `0x140`, resets to `0x0000_0000`, read-write.
    Diepctl2 = 18,
    /// `DIEPINT2` at offset `0x148`, resets to `0x0000_0080`, read-write.
    Diepint2 = 19,
    /// `DIEPTSIZ2` at offset `0x150`, resets to `0x0000_0000`, read-write.
    Dieptsiz2 = 20,
    /// `DTXFSTS2` at offset `0x158`, resets to `0x0000_0000`, read-only.
    Dtxfsts2 = 21,
    /// `DIEPCTL3` at offset `0x160`, resets to `0x0000_0000`, read-write.
    Diepctl3 = 22,
    /// `DIEPINT3` at offset `0x168`, resets to `0x0000_0080`, read-write.
    Diepint3 = 23,
    /// `DIEPTSIZ3` at offset `0x170`, resets to `0x0000_0000`, read-write.
    Dieptsiz3 = 24,
    /// `DTXFSTS3` at offset `0x178`, resets to `0x0000_0000`, read-only.
    Dtxfsts3 = 25,
    /// `DOEPCTL0` at offset `0x300`, resets to `0x0000_8000`, read-write.
    Doepctl0 = 26,
    /// `DOEPINT0` at offset `0x308`, resets to `0x0000_0080`, read-write.
    Doepint0 = 27,
    /// `DOEPTSIZ0` at offset `0x310`, resets to `0x0000_0000`, read-write.
    Doeptsiz0 = 28,
    /// `DOEPCTL1` at offset `0x320`, resets to `0x0000_0000`, read-write.
    Doepctl1 = 29,
    /// `DOEPINT1` at offset `0x328`, resets to `0x0000_0080`, read-write.
    Doepint1 = 30,
    /// `DOEPTSIZ1` at offset `0x330`, resets to `0x0000_0000`, read-write.
    Doeptsiz1 = 31,
    /// `DOEPCTL2` at offset `0x340`, resets to `0x0000_0000`, read-write.
    Doepctl2 = 32,
    /// `DOEPINT2` at offset `0x348`, resets to `0x0000_0080`, read-write.
    Doepint2 = 33,
    /// `DOEPTSIZ2` at offset `0x350`, resets to `0x0000_0000`, read-write.
    Doeptsiz2 = 34,
    /// `DOEPCTL3` at offset `0x360`, resets to `0x0000_0000`, read-write.
    Doepctl3 = 35,
    /// `DOEPINT3` at offset `0x368`, resets to `0x0000_0080`, read-write.
    Doepint3 = 36,
    /// `DOEPTSIZ3` at offset `0x370`, resets to `0x0000_0000`, read-write.
    Doeptsiz3 = 37,
}

impl Register {
    /// Every register, in table order.
    pub const ALL: [Self; 38] = [Self::FsDcfg, Self::FsDctl, Self::FsDsts, Self::FsDiepmsk, Self::FsDoepmsk, Self::FsDaint, Self::FsDaintmsk, Self::Dvbusdis, Self::Dvbuspulse, Self::Diepempmsk, Self::FsDiepctl0, Self::Diepint0, Self::Dieptsiz0, Self::Dtxfsts0, Self::Diepctl1, Self::Diepint1, Self::Dieptsiz1, Self::Dtxfsts1, Self::Diepctl2, Self::Diepint2, Self::Dieptsiz2, Self::Dtxfsts2, Self::Diepctl3, Self::Diepint3, Self::Dieptsiz3, Self::Dtxfsts3, Self::Doepctl0, Self::Doepint0, Self::Doeptsiz0, Self::Doepctl1, Self::Doepint1, Self::Doeptsiz1, Self::Doepctl2, Self::Doepint2, Self::Doeptsiz2, Self::Doepctl3, Self::Doepint3, Self::Doeptsiz3];
}

impl Layout for Register {
    const REGISTERS: &'static [RegisterSpec] = &REGISTERS;
    fn from_index(index: usize) -> Option<Self> {
        Self::ALL.get(index).copied()
    }
    fn index(self) -> usize {
        self as usize
    }
}

/// The fields of `FS_DCFG`.
pub mod fs_dcfg {
    use super::FieldSpec;
    /// `DSPD`, bits 0..=1.
    pub const DSPD: &FieldSpec = &super::REGISTERS[0].fields[0];
    /// `NZLSOHSK`, bit 2.
    pub const NZLSOHSK: &FieldSpec = &super::REGISTERS[0].fields[1];
    /// `DAD`, bits 4..=10.
    pub const DAD: &FieldSpec = &super::REGISTERS[0].fields[2];
    /// `PFIVL`, bits 11..=12.
    pub const PFIVL: &FieldSpec = &super::REGISTERS[0].fields[3];
}

/// The fields of `FS_DCTL`.
pub mod fs_dctl {
    use super::FieldSpec;
    /// `RWUSIG`, bit 0.
    pub const RWUSIG: &FieldSpec = &super::REGISTERS[1].fields[0];
    /// `SDIS`, bit 1.
    pub const SDIS: &FieldSpec = &super::REGISTERS[1].fields[1];
    /// `GINSTS`, bit 2, read-only.
    pub const GINSTS: &FieldSpec = &super::REGISTERS[1].fields[2];
    /// `GONSTS`, bit 3, read-only.
    pub const GONSTS: &FieldSpec = &super::REGISTERS[1].fields[3];
    /// `TCTL`, bits 4..=6.
    pub const TCTL: &FieldSpec = &super::REGISTERS[1].fields[4];
    /// `SGINAK`, bit 7.
    pub const SGINAK: &FieldSpec = &super::REGISTERS[1].fields[5];
    /// `CGINAK`, bit 8.
    pub const CGINAK: &FieldSpec = &super::REGISTERS[1].fields[6];
    /// `SGONAK`, bit 9.
    pub const SGONAK: &FieldSpec = &super::REGISTERS[1].fields[7];
    /// `CGONAK`, bit 10.
    pub const CGONAK: &FieldSpec = &super::REGISTERS[1].fields[8];
    /// `POPRGDNE`, bit 11.
    pub const POPRGDNE: &FieldSpec = &super::REGISTERS[1].fields[9];
}

/// The fields of `FS_DSTS`.
pub mod fs_dsts {
    use super::FieldSpec;
    /// `SUSPSTS`, bit 0.
    pub const SUSPSTS: &FieldSpec = &super::REGISTERS[2].fields[0];
    /// `ENUMSPD`, bits 1..=2.
    pub const ENUMSPD: &FieldSpec = &super::REGISTERS[2].fields[1];
    /// `EERR`, bit 3.
    pub const EERR: &FieldSpec = &super::REGISTERS[2].fields[2];
    /// `FNSOF`, bits 8..=21.
    pub const FNSOF: &FieldSpec = &super::REGISTERS[2].fields[3];
}

/// The fields of `FS_DIEPMSK`.
pub mod fs_diepmsk {
    use super::FieldSpec;
    /// `XFRCM`, bit 0.
    pub const XFRCM: &FieldSpec = &super::REGISTERS[3].fields[0];
    /// `EPDM`, bit 1.
    pub const EPDM: &FieldSpec = &super::REGISTERS[3].fields[1];
    /// `TOM`, bit 3.
    pub const TOM: &FieldSpec = &super::REGISTERS[3].fields[2];
    /// `ITTXFEMSK`, bit 4.
    pub const ITTXFEMSK: &FieldSpec = &super::REGISTERS[3].fields[3];
    /// `INEPNMM`, bit 5.
    pub const INEPNMM: &FieldSpec = &super::REGISTERS[3].fields[4];
    /// `INEPNEM`, bit 6.
    pub const INEPNEM: &FieldSpec = &super::REGISTERS[3].fields[5];
}

/// The fields of `FS_DOEPMSK`.
pub mod fs_doepmsk {
    use super::FieldSpec;
    /// `XFRCM`, bit 0.
    pub const XFRCM: &FieldSpec = &super::REGISTERS[4].fields[0];
    /// `EPDM`, bit 1.
    pub const EPDM: &FieldSpec = &super::REGISTERS[4].fields[1];
    /// `STUPM`, bit 3.
    pub const STUPM: &FieldSpec = &super::REGISTERS[4].fields[2];
    /// `OTEPDM`, bit 4.
    pub const OTEPDM: &FieldSpec = &super::REGISTERS[4].fields[3];
}

/// The fields of `FS_DAINT`.
pub mod fs_daint {
    use super::FieldSpec;
    /// `IEPINT`, bits 0..=15.
    pub const IEPINT: &FieldSpec = &super::REGISTERS[5].fields[0];
    /// `OEPINT`, bits 16..=31.
    pub const OEPINT: &FieldSpec = &super::REGISTERS[5].fields[1];
}

/// The fields of `FS_DAINTMSK`.
pub mod fs_daintmsk {
    use super::FieldSpec;
    /// `IEPM`, bits 0..=15.
    pub const IEPM: &FieldSpec = &super::REGISTERS[6].fields[0];
    /// `OEPINT`, bits 16..=31.
    pub const OEPINT: &FieldSpec = &super::REGISTERS[6].fields[1];
}

/// The fields of `DVBUSDIS`.
pub mod dvbusdis {
    use super::FieldSpec;
    /// `VBUSDT`, bits 0..=15.
    pub const VBUSDT: &FieldSpec = &super::REGISTERS[7].fields[0];
}

/// The fields of `DVBUSPULSE`.
pub mod dvbuspulse {
    use super::FieldSpec;
    /// `DVBUSP`, bits 0..=11.
    pub const DVBUSP: &FieldSpec = &super::REGISTERS[8].fields[0];
}

/// The fields of `DIEPEMPMSK`.
pub mod diepempmsk {
    use super::FieldSpec;
    /// `INEPTXFEM`, bits 0..=15.
    pub const INEPTXFEM: &FieldSpec = &super::REGISTERS[9].fields[0];
}

/// The fields of `FS_DIEPCTL0`.
pub mod fs_diepctl0 {
    use super::FieldSpec;
    /// `MPSIZ`, bits 0..=1.
    pub const MPSIZ: &FieldSpec = &super::REGISTERS[10].fields[0];
    /// `USBAEP`, bit 15, read-only.
    pub const USBAEP: &FieldSpec = &super::REGISTERS[10].fields[1];
    /// `NAKSTS`, bit 17, read-only.
    pub const NAKSTS: &FieldSpec = &super::REGISTERS[10].fields[2];
    /// `EPTYP`, bits 18..=19, read-only.
    pub const EPTYP: &FieldSpec = &super::REGISTERS[10].fields[3];
    /// `STALL`, bit 21.
    pub const STALL: &FieldSpec = &super::REGISTERS[10].fields[4];
    /// `TXFNUM`, bits 22..=25.
    pub const TXFNUM: &FieldSpec = &super::REGISTERS[10].fields[5];
    /// `CNAK`, bit 26, write-only.
    pub const CNAK: &FieldSpec = &super::REGISTERS[10].fields[6];
    /// `SNAK`, bit 27, write-only.
    pub const SNAK: &FieldSpec = &super::REGISTERS[10].fields[7];
    /// `EPDIS`, bit 30, read-only.
    pub const EPDIS: &FieldSpec = &super::REGISTERS[10].fields[8];
    /// `EPENA`, bit 31, read-only.
    pub const EPENA: &FieldSpec = &super::REGISTERS[10].fields[9];
}

/// The fields of `DIEPINT0`.
pub mod diepint0 {
    use super::FieldSpec;
    /// `XFRC`, bit 0.
    pub const XFRC: &FieldSpec = &super::REGISTERS[11].fields[0];
    /// `EPDISD`, bit 1.
    pub const EPDISD: &FieldSpec = &super::REGISTERS[11].fields[1];
    /// `TOC`, bit 3.
    pub const TOC: &FieldSpec = &super::REGISTERS[11].fields[2];
    /// `ITTXFE`, bit 4.
    pub const ITTXFE: &FieldSpec = &super::REGISTERS[11].fields[3];
    /// `INEPNE`, bit 6.
    pub const INEPNE: &FieldSpec = &super::REGISTERS[11].fields[4];
    /// `TXFE`, bit 7, read-only.
    pub const TXFE: &FieldSpec = &super::REGISTERS[11].fields[5];
}

/// The fields of `DIEPTSIZ0`.
pub mod dieptsiz0 {
    use super::FieldSpec;
    /// `XFRSIZ`, bits 0..=6.
    pub const XFRSIZ: &FieldSpec = &super::REGISTERS[12].fields[0];
    /// `PKTCNT`, bits 19..=20.
    pub const PKTCNT: &FieldSpec = &super::REGISTERS[12].fields[1];
}

/// The fields of `DTXFSTS0`.
pub mod dtxfsts0 {
    use super::FieldSpec;
    /// `INEPTFSAV`, bits 0..=15.
    pub const INEPTFSAV: &FieldSpec = &super::REGISTERS[13].fields[0];
}

/// The fields of `DIEPCTL1`.
pub mod diepctl1 {
    use super::FieldSpec;
    /// `MPSIZ`, bits 0..=10.
    pub const MPSIZ: &FieldSpec = &super::REGISTERS[14].fields[0];
    /// `USBAEP`, bit 15.
    pub const USBAEP: &FieldSpec = &super::REGISTERS[14].fields[1];
    /// `EONUM_DPID`, bit 16, read-only.
    pub const EONUM_DPID: &FieldSpec = &super::REGISTERS[14].fields[2];
    /// `NAKSTS`, bit 17, read-only.
    pub const NAKSTS: &FieldSpec = &super::REGISTERS[14].fields[3];
    /// `EPTYP`, bits 18..=19.
    pub const EPTYP: &FieldSpec = &super::REGISTERS[14].fields[4];
    /// `Stall`, bit 21.
    pub const STALL: &FieldSpec = &super::REGISTERS[14].fields[5];
    /// `TXFNUM`, bits 22..=25.
    pub const TXFNUM: &FieldSpec = &super::REGISTERS[14].fields[6];
    /// `CNAK`, bit 26, write-only.
    pub const CNAK: &FieldSpec = &super::REGISTERS[14].fields[7];
    /// `SNAK`, bit 27, write-only.
    pub const SNAK: &FieldSpec = &super::REGISTERS[14].fields[8];
    /// `SD0PID_SEVNFRM`, bit 28, write-only.
    pub const SD0PID_SEVNFRM: &FieldSpec = &super::REGISTERS[14].fields[9];
    /// `SODDFRM_SD1PID`, bit 29, write-only.
    pub const SODDFRM_SD1PID: &FieldSpec = &super::REGISTERS[14].fields[10];
    /// `EPDIS`, bit 30.
    pub const EPDIS: &FieldSpec = &super::REGISTERS[14].fields[11];
    /// `EPENA`, bit 31.
    pub const EPENA: &FieldSpec = &super::REGISTERS[14].fields[12];
}

/// The fields of `DIEPINT1`.
pub mod diepint1 {
    use super::FieldSpec;
    /// `XFRC`, bit 0.
    pub const XFRC: &FieldSpec = &super::REGISTERS[15].fields[0];
    /// `EPDISD`, bit 1.
    pub const EPDISD: &FieldSpec = &super::REGISTERS[15].fields[1];
    /// `TOC`, bit 3.
    pub const TOC: &FieldSpec = &super::REGISTERS[15].fields[2];
    /// `ITTXFE`, bit 4.
    pub const ITTXFE: &FieldSpec = &super::REGISTERS[15].fields[3];
    /// `INEPNE`, bit 6.
    pub const INEPNE: &FieldSpec = &super::REGISTERS[15].fields[4];
    /// `TXFE`, bit 7, read-only.
    pub const TXFE: &FieldSpec = &super::REGISTERS[15].fields[5];
}

/// The fields of `DIEPTSIZ1`.
pub mod dieptsiz1 {
    use super::FieldSpec;
    /// `XFRSIZ`, bits 0..=18.
    pub const XFRSIZ: &FieldSpec = &super::REGISTERS[16].fields[0];
    /// `PKTCNT`, bits 19..=28.
    pub const PKTCNT: &FieldSpec = &super::REGISTERS[16].fields[1];
    /// `MCNT`, bits 29..=30.
    pub const MCNT: &FieldSpec = &super::REGISTERS[16].fields[2];
}

/// The fields of `DTXFSTS1`.
pub mod dtxfsts1 {
    use super::FieldSpec;
    /// `INEPTFSAV`, bits 0..=15.
    pub const INEPTFSAV: &FieldSpec = &super::REGISTERS[17].fields[0];
}

/// The fields of `DIEPCTL2`.
pub mod diepctl2 {
    use super::FieldSpec;
    /// `MPSIZ`, bits 0..=10.
    pub const MPSIZ: &FieldSpec = &super::REGISTERS[18].fields[0];
    /// `USBAEP`, bit 15.
    pub const USBAEP: &FieldSpec = &super::REGISTERS[18].fields[1];
    /// `EONUM_DPID`, bit 16, read-only.
    pub const EONUM_DPID: &FieldSpec = &super::REGISTERS[18].fields[2];
    /// `NAKSTS`, bit 17, read-only.
    pub const NAKSTS: &FieldSpec = &super::REGISTERS[18].fields[3];
    /// `EPTYP`, bits 18..=19.
    pub const EPTYP: &FieldSpec = &super::REGISTERS[18].fields[4];
    /// `Stall`, bit 21.
    pub const STALL: &FieldSpec = &super::REGISTERS[18].fields[5];
    /// `TXFNUM`, bits 22..=25.
    pub const TXFNUM: &FieldSpec = &super::REGISTERS[18].fields[6];
    /// `CNAK`, bit 26, write-only.
    pub const CNAK: &FieldSpec = &super::REGISTERS[18].fields[7];
    /// `SNAK`, bit 27, write-only.
    pub const SNAK: &FieldSpec = &super::REGISTERS[18].fields[8];
    /// `SD0PID_SEVNFRM`, bit 28, write-only.
    pub const SD0PID_SEVNFRM: &FieldSpec = &super::REGISTERS[18].fields[9];
    /// `SODDFRM`, bit 29, write-only.
    pub const SODDFRM: &FieldSpec = &super::REGISTERS[18].fields[10];
    /// `EPDIS`, bit 30.
    pub const EPDIS: &FieldSpec = &super::REGISTERS[18].fields[11];
    /// `EPENA`, bit 31.
    pub const EPENA: &FieldSpec = &super::REGISTERS[18].fields[12];
}

/// The fields of `DIEPINT2`.
pub mod diepint2 {
    use super::FieldSpec;
    /// `XFRC`, bit 0.
    pub const XFRC: &FieldSpec = &super::REGISTERS[19].fields[0];
    /// `EPDISD`, bit 1.
    pub const EPDISD: &FieldSpec = &super::REGISTERS[19].fields[1];
    /// `TOC`, bit 3.
    pub const TOC: &FieldSpec = &super::REGISTERS[19].fields[2];
    /// `ITTXFE`, bit 4.
    pub const ITTXFE: &FieldSpec = &super::REGISTERS[19].fields[3];
    /// `INEPNE`, bit 6.
    pub const INEPNE: &FieldSpec = &super::REGISTERS[19].fields[4];
    /// `TXFE`, bit 7, read-only.
    pub const TXFE: &FieldSpec = &super::REGISTERS[19].fields[5];
}

/// The fields of `DIEPTSIZ2`.
pub mod dieptsiz2 {
    use super::FieldSpec;
    /// `XFRSIZ`, bits 0..=18.
    pub const XFRSIZ: &FieldSpec = &super::REGISTERS[20].fields[0];
    /// `PKTCNT`, bits 19..=28.
    pub const PKTCNT: &FieldSpec = &super::REGISTERS[20].fields[1];
    /// `MCNT`, bits 29..=30.
    pub const MCNT: &FieldSpec = &super::REGISTERS[20].fields[2];
}

/// The fields of `DTXFSTS2`.
pub mod dtxfsts2 {
    use super::FieldSpec;
    /// `INEPTFSAV`, bits 0..=15.
    pub const INEPTFSAV: &FieldSpec = &super::REGISTERS[21].fields[0];
}

/// The fields of `DIEPCTL3`.
pub mod diepctl3 {
    use super::FieldSpec;
    /// `MPSIZ`, bits 0..=10.
    pub const MPSIZ: &FieldSpec = &super::REGISTERS[22].fields[0];
    /// `USBAEP`, bit 15.
    pub const USBAEP: &FieldSpec = &super::REGISTERS[22].fields[1];
    /// `EONUM_DPID`, bit 16, read-only.
    pub const EONUM_DPID: &FieldSpec = &super::REGISTERS[22].fields[2];
    /// `NAKSTS`, bit 17, read-only.
    pub const NAKSTS: &FieldSpec = &super::REGISTERS[22].fields[3];
    /// `EPTYP`, bits 18..=19.
    pub const EPTYP: &FieldSpec = &super::REGISTERS[22].fields[4];
    /// `Stall`, bit 21.
    pub const STALL: &FieldSpec = &super::REGISTERS[22].fields[5];
    /// `TXFNUM`, bits 22..=25.
    pub const TXFNUM: &FieldSpec = &super::REGISTERS[22].fields[6];
    /// `CNAK`, bit 26, write-only.
    pub const CNAK: &FieldSpec = &super::REGISTERS[22].fields[7];
    /// `SNAK`, bit 27, write-only.
    pub const SNAK: &FieldSpec = &super::REGISTERS[22].fields[8];
    /// `SD0PID_SEVNFRM`, bit 28, write-only.
    pub const SD0PID_SEVNFRM: &FieldSpec = &super::REGISTERS[22].fields[9];
    /// `SODDFRM`, bit 29, write-only.
    pub const SODDFRM: &FieldSpec = &super::REGISTERS[22].fields[10];
    /// `EPDIS`, bit 30.
    pub const EPDIS: &FieldSpec = &super::REGISTERS[22].fields[11];
    /// `EPENA`, bit 31.
    pub const EPENA: &FieldSpec = &super::REGISTERS[22].fields[12];
}

/// The fields of `DIEPINT3`.
pub mod diepint3 {
    use super::FieldSpec;
    /// `XFRC`, bit 0.
    pub const XFRC: &FieldSpec = &super::REGISTERS[23].fields[0];
    /// `EPDISD`, bit 1.
    pub const EPDISD: &FieldSpec = &super::REGISTERS[23].fields[1];
    /// `TOC`, bit 3.
    pub const TOC: &FieldSpec = &super::REGISTERS[23].fields[2];
    /// `ITTXFE`, bit 4.
    pub const ITTXFE: &FieldSpec = &super::REGISTERS[23].fields[3];
    /// `INEPNE`, bit 6.
    pub const INEPNE: &FieldSpec = &super::REGISTERS[23].fields[4];
    /// `TXFE`, bit 7, read-only.
    pub const TXFE: &FieldSpec = &super::REGISTERS[23].fields[5];
}

/// The fields of `DIEPTSIZ3`.
pub mod dieptsiz3 {
    use super::FieldSpec;
    /// `XFRSIZ`, bits 0..=18.
    pub const XFRSIZ: &FieldSpec = &super::REGISTERS[24].fields[0];
    /// `PKTCNT`, bits 19..=28.
    pub const PKTCNT: &FieldSpec = &super::REGISTERS[24].fields[1];
    /// `MCNT`, bits 29..=30.
    pub const MCNT: &FieldSpec = &super::REGISTERS[24].fields[2];
}

/// The fields of `DTXFSTS3`.
pub mod dtxfsts3 {
    use super::FieldSpec;
    /// `INEPTFSAV`, bits 0..=15.
    pub const INEPTFSAV: &FieldSpec = &super::REGISTERS[25].fields[0];
}

/// The fields of `DOEPCTL0`.
pub mod doepctl0 {
    use super::FieldSpec;
    /// `MPSIZ`, bits 0..=1, read-only.
    pub const MPSIZ: &FieldSpec = &super::REGISTERS[26].fields[0];
    /// `USBAEP`, bit 15, read-only.
    pub const USBAEP: &FieldSpec = &super::REGISTERS[26].fields[1];
    /// `NAKSTS`, bit 17, read-only.
    pub const NAKSTS: &FieldSpec = &super::REGISTERS[26].fields[2];
    /// `EPTYP`, bits 18..=19, read-only.
    pub const EPTYP: &FieldSpec = &super::REGISTERS[26].fields[3];
    /// `SNPM`, bit 20.
    pub const SNPM: &FieldSpec = &super::REGISTERS[26].fields[4];
    /// `Stall`, bit 21.
    pub const STALL: &FieldSpec = &super::REGISTERS[26].fields[5];
    /// `CNAK`, bit 26, write-only.
    pub const CNAK: &FieldSpec = &super::REGISTERS[26].fields[6];
    /// `SNAK`, bit 27, write-only.
    pub const SNAK: &FieldSpec = &super::REGISTERS[26].fields[7];
    /// `EPDIS`, bit 30, read-only.
    pub const EPDIS: &FieldSpec = &super::REGISTERS[26].fields[8];
    /// `EPENA`, bit 31, write-only.
    pub const EPENA: &FieldSpec = &super::REGISTERS[26].fields[9];
}

/// The fields of `DOEPINT0`.
pub mod doepint0 {
    use super::FieldSpec;
    /// `XFRC`, bit 0.
    pub const XFRC: &FieldSpec = &super::REGISTERS[27].fields[0];
    /// `EPDISD`, bit 1.
    pub const EPDISD: &FieldSpec = &super::REGISTERS[27].fields[1];
    /// `STUP`, bit 3.
    pub const STUP: &FieldSpec = &super::REGISTERS[27].fields[2];
    /// `OTEPDIS`, bit 4.
    pub const OTEPDIS: &FieldSpec = &super::REGISTERS[27].fields[3];
    /// `B2BSTUP`, bit 6.
    pub const B2BSTUP: &FieldSpec = &super::REGISTERS[27].fields[4];
}

/// The fields of `DOEPTSIZ0`.
pub mod doeptsiz0 {
    use super::FieldSpec;
    /// `XFRSIZ`, bits 0..=6.
    pub const XFRSIZ: &FieldSpec = &super::REGISTERS[28].fields[0];
    /// `PKTCNT`, bit 19.
    pub const PKTCNT: &FieldSpec = &super::REGISTERS[28].fields[1];
    /// `STUPCNT`, bits 29..=30.
    pub const STUPCNT: &FieldSpec = &super::REGISTERS[28].fields[2];
}

/// The fields of `DOEPCTL1`.
pub mod doepctl1 {
    use super::FieldSpec;
    /// `MPSIZ`, bits 0..=10.
    pub const MPSIZ: &FieldSpec = &super::REGISTERS[29].fields[0];
    /// `USBAEP`, bit 15.
    pub const USBAEP: &FieldSpec = &super::REGISTERS[29].fields[1];
    /// `EONUM_DPID`, bit 16, read-only.
    pub const EONUM_DPID: &FieldSpec = &super::REGISTERS[29].fields[2];
    /// `NAKSTS`, bit 17, read-only.
    pub const NAKSTS: &FieldSpec = &super::REGISTERS[29].fields[3];
    /// `EPTYP`, bits 18..=19.
    pub const EPTYP: &FieldSpec = &super::REGISTERS[29].fields[4];
    /// `SNPM`, bit 20.
    pub const SNPM: &FieldSpec = &super::REGISTERS[29].fields[5];
    /// `Stall`, bit 21.
    pub const STALL: &FieldSpec = &super::REGISTERS[29].fields[6];
    /// `CNAK`, bit 26, write-only.
    pub const CNAK: &FieldSpec = &super::REGISTERS[29].fields[7];
    /// `SNAK`, bit 27, write-only.
    pub const SNAK: &FieldSpec = &super::REGISTERS[29].fields[8];
    /// `SD0PID_SEVNFRM`, bit 28, write-only.
    pub const SD0PID_SEVNFRM: &FieldSpec = &super::REGISTERS[29].fields[9];
    /// `SODDFRM`, bit 29, write-only.
    pub const SODDFRM: &FieldSpec = &super::REGISTERS[29].fields[10];
    /// `EPDIS`, bit 30.
    pub const EPDIS: &FieldSpec = &super::REGISTERS[29].fields[11];
    /// `EPENA`, bit 31.
    pub const EPENA: &FieldSpec = &super::REGISTERS[29].fields[12];
}

/// The fields of `DOEPINT1`.
pub mod doepint1 {
    use super::FieldSpec;
    /// `XFRC`, bit 0.
    pub const XFRC: &FieldSpec = &super::REGISTERS[30].fields[0];
    /// `EPDISD`, bit 1.
    pub const EPDISD: &FieldSpec = &super::REGISTERS[30].fields[1];
    /// `STUP`, bit 3.
    pub const STUP: &FieldSpec = &super::REGISTERS[30].fields[2];
    /// `OTEPDIS`, bit 4.
    pub const OTEPDIS: &FieldSpec = &super::REGISTERS[30].fields[3];
    /// `B2BSTUP`, bit 6.
    pub const B2BSTUP: &FieldSpec = &super::REGISTERS[30].fields[4];
}

/// The fields of `DOEPTSIZ1`.
pub mod doeptsiz1 {
    use super::FieldSpec;
    /// `XFRSIZ`, bits 0..=18.
    pub const XFRSIZ: &FieldSpec = &super::REGISTERS[31].fields[0];
    /// `PKTCNT`, bits 19..=28.
    pub const PKTCNT: &FieldSpec = &super::REGISTERS[31].fields[1];
    /// `RXDPID_STUPCNT`, bits 29..=30.
    pub const RXDPID_STUPCNT: &FieldSpec = &super::REGISTERS[31].fields[2];
}

/// The fields of `DOEPCTL2`.
pub mod doepctl2 {
    use super::FieldSpec;
    /// `MPSIZ`, bits 0..=10.
    pub const MPSIZ: &FieldSpec = &super::REGISTERS[32].fields[0];
    /// `USBAEP`, bit 15.
    pub const USBAEP: &FieldSpec = &super::REGISTERS[32].fields[1];
    /// `EONUM_DPID`, bit 16, read-only.
    pub const EONUM_DPID: &FieldSpec = &super::REGISTERS[32].fields[2];
    /// `NAKSTS`, bit 17, read-only.
    pub const NAKSTS: &FieldSpec = &super::REGISTERS[32].fields[3];
    /// `EPTYP`, bits 18..=19.
    pub const EPTYP: &FieldSpec = &super::REGISTERS[32].fields[4];
    /// `SNPM`, bit 20.
    pub const SNPM: &FieldSpec = &super::REGISTERS[32].fields[5];
    /// `Stall`, bit 21.
    pub const STALL: &FieldSpec = &super::REGISTERS[32].fields[6];
    /// `CNAK`, bit 26, write-only.
    pub const CNAK: &FieldSpec = &super::REGISTERS[32].fields[7];
    /// `SNAK`, bit 27, write-only.
    pub const SNAK: &FieldSpec = &super::REGISTERS[32].fields[8];
    /// `SD0PID_SEVNFRM`, bit 28, write-only.
    pub const SD0PID_SEVNFRM: &FieldSpec = &super::REGISTERS[32].fields[9];
    /// `SODDFRM`, bit 29, write-only.
    pub const SODDFRM: &FieldSpec = &super::REGISTERS[32].fields[10];
    /// `EPDIS`, bit 30.
    pub const EPDIS: &FieldSpec = &super::REGISTERS[32].fields[11];
    /// `EPENA`, bit 31.
    pub const EPENA: &FieldSpec = &super::REGISTERS[32].fields[12];
}

/// The fields of `DOEPINT2`.
pub mod doepint2 {
    use super::FieldSpec;
    /// `XFRC`, bit 0.
    pub const XFRC: &FieldSpec = &super::REGISTERS[33].fields[0];
    /// `EPDISD`, bit 1.
    pub const EPDISD: &FieldSpec = &super::REGISTERS[33].fields[1];
    /// `STUP`, bit 3.
    pub const STUP: &FieldSpec = &super::REGISTERS[33].fields[2];
    /// `OTEPDIS`, bit 4.
    pub const OTEPDIS: &FieldSpec = &super::REGISTERS[33].fields[3];
    /// `B2BSTUP`, bit 6.
    pub const B2BSTUP: &FieldSpec = &super::REGISTERS[33].fields[4];
}

/// The fields of `DOEPTSIZ2`.
pub mod doeptsiz2 {
    use super::FieldSpec;
    /// `XFRSIZ`, bits 0..=18.
    pub const XFRSIZ: &FieldSpec = &super::REGISTERS[34].fields[0];
    /// `PKTCNT`, bits 19..=28.
    pub const PKTCNT: &FieldSpec = &super::REGISTERS[34].fields[1];
    /// `RXDPID_STUPCNT`, bits 29..=30.
    pub const RXDPID_STUPCNT: &FieldSpec = &super::REGISTERS[34].fields[2];
}

/// The fields of `DOEPCTL3`.
pub mod doepctl3 {
    use super::FieldSpec;
    /// `MPSIZ`, bits 0..=10.
    pub const MPSIZ: &FieldSpec = &super::REGISTERS[35].fields[0];
    /// `USBAEP`, bit 15.
    pub const USBAEP: &FieldSpec = &super::REGISTERS[35].fields[1];
    /// `EONUM_DPID`, bit 16, read-only.
    pub const EONUM_DPID: &FieldSpec = &super::REGISTERS[35].fields[2];
    /// `NAKSTS`, bit 17, read-only.
    pub const NAKSTS: &FieldSpec = &super::REGISTERS[35].fields[3];
    /// `EPTYP`, bits 18..=19.
    pub const EPTYP: &FieldSpec = &super::REGISTERS[35].fields[4];
    /// `SNPM`, bit 20.
    pub const SNPM: &FieldSpec = &super::REGISTERS[35].fields[5];
    /// `Stall`, bit 21.
    pub const STALL: &FieldSpec = &super::REGISTERS[35].fields[6];
    /// `CNAK`, bit 26, write-only.
    pub const CNAK: &FieldSpec = &super::REGISTERS[35].fields[7];
    /// `SNAK`, bit 27, write-only.
    pub const SNAK: &FieldSpec = &super::REGISTERS[35].fields[8];
    /// `SD0PID_SEVNFRM`, bit 28, write-only.
    pub const SD0PID_SEVNFRM: &FieldSpec = &super::REGISTERS[35].fields[9];
    /// `SODDFRM`, bit 29, write-only.
    pub const SODDFRM: &FieldSpec = &super::REGISTERS[35].fields[10];
    /// `EPDIS`, bit 30.
    pub const EPDIS: &FieldSpec = &super::REGISTERS[35].fields[11];
    /// `EPENA`, bit 31.
    pub const EPENA: &FieldSpec = &super::REGISTERS[35].fields[12];
}

/// The fields of `DOEPINT3`.
pub mod doepint3 {
    use super::FieldSpec;
    /// `XFRC`, bit 0.
    pub const XFRC: &FieldSpec = &super::REGISTERS[36].fields[0];
    /// `EPDISD`, bit 1.
    pub const EPDISD: &FieldSpec = &super::REGISTERS[36].fields[1];
    /// `STUP`, bit 3.
    pub const STUP: &FieldSpec = &super::REGISTERS[36].fields[2];
    /// `OTEPDIS`, bit 4.
    pub const OTEPDIS: &FieldSpec = &super::REGISTERS[36].fields[3];
    /// `B2BSTUP`, bit 6.
    pub const B2BSTUP: &FieldSpec = &super::REGISTERS[36].fields[4];
}

/// The fields of `DOEPTSIZ3`.
pub mod doeptsiz3 {
    use super::FieldSpec;
    /// `XFRSIZ`, bits 0..=18.
    pub const XFRSIZ: &FieldSpec = &super::REGISTERS[37].fields[0];
    /// `PKTCNT`, bits 19..=28.
    pub const PKTCNT: &FieldSpec = &super::REGISTERS[37].fields[1];
    /// `RXDPID_STUPCNT`, bits 29..=30.
    pub const RXDPID_STUPCNT: &FieldSpec = &super::REGISTERS[37].fields[2];
}

/// The register table.
pub static REGISTERS: [RegisterSpec; 38] = [
    RegisterSpec { name: "FS_DCFG", offset: 0x0, width: Width::W32, reset: 0x0220_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "DSPD", bit: 0, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "NZLSOHSK", bit: 2, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DAD", bit: 4, width: 7, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "PFIVL", bit: 11, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "FS_DCTL", offset: 0x4, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "RWUSIG", bit: 0, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "SDIS", bit: 1, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "GINSTS", bit: 2, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "GONSTS", bit: 3, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TCTL", bit: 4, width: 3, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "SGINAK", bit: 7, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CGINAK", bit: 8, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "SGONAK", bit: 9, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CGONAK", bit: 10, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "POPRGDNE", bit: 11, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "FS_DSTS", offset: 0x8, width: Width::W32, reset: 0x0000_0010, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "SUSPSTS", bit: 0, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "ENUMSPD", bit: 1, width: 2, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EERR", bit: 3, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "FNSOF", bit: 8, width: 14, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "FS_DIEPMSK", offset: 0x10, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "XFRCM", bit: 0, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EPDM", bit: 1, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TOM", bit: 3, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "ITTXFEMSK", bit: 4, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "INEPNMM", bit: 5, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "INEPNEM", bit: 6, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "FS_DOEPMSK", offset: 0x14, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "XFRCM", bit: 0, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EPDM", bit: 1, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "STUPM", bit: 3, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "OTEPDM", bit: 4, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "FS_DAINT", offset: 0x18, width: Width::W32, reset: 0x0000_0000, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "IEPINT", bit: 0, width: 16, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "OEPINT", bit: 16, width: 16, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "FS_DAINTMSK", offset: 0x1C, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "IEPM", bit: 0, width: 16, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "OEPINT", bit: 16, width: 16, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "DVBUSDIS", offset: 0x28, width: Width::W32, reset: 0x0000_17D7, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "VBUSDT", bit: 0, width: 16, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "DVBUSPULSE", offset: 0x2C, width: Width::W32, reset: 0x0000_05B8, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "DVBUSP", bit: 0, width: 12, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "DIEPEMPMSK", offset: 0x34, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "INEPTXFEM", bit: 0, width: 16, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "FS_DIEPCTL0", offset: 0x100, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "MPSIZ", bit: 0, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "USBAEP", bit: 15, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "NAKSTS", bit: 17, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EPTYP", bit: 18, width: 2, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "STALL", bit: 21, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TXFNUM", bit: 22, width: 4, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CNAK", bit: 26, width: 1, access: Access::WriteOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "SNAK", bit: 27, width: 1, access: Access::WriteOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EPDIS", bit: 30, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EPENA", bit: 31, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "DIEPINT0", offset: 0x108, width: Width::W32, reset: 0x0000_0080, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "XFRC", bit: 0, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EPDISD", bit: 1, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TOC", bit: 3, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "ITTXFE", bit: 4, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "INEPNE", bit: 6, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TXFE", bit: 7, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "DIEPTSIZ0", offset: 0x110, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "XFRSIZ", bit: 0, width: 7, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "PKTCNT", bit: 19, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "DTXFSTS0", offset: 0x118, width: Width::W32, reset: 0x0000_0000, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "INEPTFSAV", bit: 0, width: 16, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "DIEPCTL1", offset: 0x120, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "MPSIZ", bit: 0, width: 11, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "USBAEP", bit: 15, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EONUM_DPID", bit: 16, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "NAKSTS", bit: 17, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EPTYP", bit: 18, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "Stall", bit: 21, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TXFNUM", bit: 22, width: 4, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CNAK", bit: 26, width: 1, access: Access::WriteOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "SNAK", bit: 27, width: 1, access: Access::WriteOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "SD0PID_SEVNFRM", bit: 28, width: 1, access: Access::WriteOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "SODDFRM_SD1PID", bit: 29, width: 1, access: Access::WriteOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EPDIS", bit: 30, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EPENA", bit: 31, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "DIEPINT1", offset: 0x128, width: Width::W32, reset: 0x0000_0080, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "XFRC", bit: 0, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EPDISD", bit: 1, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TOC", bit: 3, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "ITTXFE", bit: 4, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "INEPNE", bit: 6, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TXFE", bit: 7, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "DIEPTSIZ1", offset: 0x130, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "XFRSIZ", bit: 0, width: 19, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "PKTCNT", bit: 19, width: 10, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "MCNT", bit: 29, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "DTXFSTS1", offset: 0x138, width: Width::W32, reset: 0x0000_0000, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "INEPTFSAV", bit: 0, width: 16, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "DIEPCTL2", offset: 0x140, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "MPSIZ", bit: 0, width: 11, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "USBAEP", bit: 15, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EONUM_DPID", bit: 16, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "NAKSTS", bit: 17, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EPTYP", bit: 18, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "Stall", bit: 21, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TXFNUM", bit: 22, width: 4, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CNAK", bit: 26, width: 1, access: Access::WriteOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "SNAK", bit: 27, width: 1, access: Access::WriteOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "SD0PID_SEVNFRM", bit: 28, width: 1, access: Access::WriteOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "SODDFRM", bit: 29, width: 1, access: Access::WriteOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EPDIS", bit: 30, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EPENA", bit: 31, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "DIEPINT2", offset: 0x148, width: Width::W32, reset: 0x0000_0080, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "XFRC", bit: 0, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EPDISD", bit: 1, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TOC", bit: 3, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "ITTXFE", bit: 4, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "INEPNE", bit: 6, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TXFE", bit: 7, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "DIEPTSIZ2", offset: 0x150, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "XFRSIZ", bit: 0, width: 19, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "PKTCNT", bit: 19, width: 10, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "MCNT", bit: 29, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "DTXFSTS2", offset: 0x158, width: Width::W32, reset: 0x0000_0000, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "INEPTFSAV", bit: 0, width: 16, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "DIEPCTL3", offset: 0x160, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "MPSIZ", bit: 0, width: 11, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "USBAEP", bit: 15, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EONUM_DPID", bit: 16, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "NAKSTS", bit: 17, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EPTYP", bit: 18, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "Stall", bit: 21, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TXFNUM", bit: 22, width: 4, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CNAK", bit: 26, width: 1, access: Access::WriteOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "SNAK", bit: 27, width: 1, access: Access::WriteOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "SD0PID_SEVNFRM", bit: 28, width: 1, access: Access::WriteOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "SODDFRM", bit: 29, width: 1, access: Access::WriteOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EPDIS", bit: 30, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EPENA", bit: 31, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "DIEPINT3", offset: 0x168, width: Width::W32, reset: 0x0000_0080, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "XFRC", bit: 0, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EPDISD", bit: 1, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TOC", bit: 3, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "ITTXFE", bit: 4, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "INEPNE", bit: 6, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TXFE", bit: 7, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "DIEPTSIZ3", offset: 0x170, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "XFRSIZ", bit: 0, width: 19, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "PKTCNT", bit: 19, width: 10, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "MCNT", bit: 29, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "DTXFSTS3", offset: 0x178, width: Width::W32, reset: 0x0000_0000, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "INEPTFSAV", bit: 0, width: 16, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "DOEPCTL0", offset: 0x300, width: Width::W32, reset: 0x0000_8000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "MPSIZ", bit: 0, width: 2, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "USBAEP", bit: 15, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "NAKSTS", bit: 17, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EPTYP", bit: 18, width: 2, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "SNPM", bit: 20, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "Stall", bit: 21, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CNAK", bit: 26, width: 1, access: Access::WriteOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "SNAK", bit: 27, width: 1, access: Access::WriteOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EPDIS", bit: 30, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EPENA", bit: 31, width: 1, access: Access::WriteOnly, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "DOEPINT0", offset: 0x308, width: Width::W32, reset: 0x0000_0080, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "XFRC", bit: 0, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EPDISD", bit: 1, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "STUP", bit: 3, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "OTEPDIS", bit: 4, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "B2BSTUP", bit: 6, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "DOEPTSIZ0", offset: 0x310, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "XFRSIZ", bit: 0, width: 7, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "PKTCNT", bit: 19, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "STUPCNT", bit: 29, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "DOEPCTL1", offset: 0x320, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "MPSIZ", bit: 0, width: 11, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "USBAEP", bit: 15, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EONUM_DPID", bit: 16, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "NAKSTS", bit: 17, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EPTYP", bit: 18, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "SNPM", bit: 20, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "Stall", bit: 21, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CNAK", bit: 26, width: 1, access: Access::WriteOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "SNAK", bit: 27, width: 1, access: Access::WriteOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "SD0PID_SEVNFRM", bit: 28, width: 1, access: Access::WriteOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "SODDFRM", bit: 29, width: 1, access: Access::WriteOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EPDIS", bit: 30, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EPENA", bit: 31, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "DOEPINT1", offset: 0x328, width: Width::W32, reset: 0x0000_0080, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "XFRC", bit: 0, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EPDISD", bit: 1, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "STUP", bit: 3, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "OTEPDIS", bit: 4, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "B2BSTUP", bit: 6, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "DOEPTSIZ1", offset: 0x330, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "XFRSIZ", bit: 0, width: 19, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "PKTCNT", bit: 19, width: 10, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "RXDPID_STUPCNT", bit: 29, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "DOEPCTL2", offset: 0x340, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "MPSIZ", bit: 0, width: 11, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "USBAEP", bit: 15, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EONUM_DPID", bit: 16, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "NAKSTS", bit: 17, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EPTYP", bit: 18, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "SNPM", bit: 20, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "Stall", bit: 21, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CNAK", bit: 26, width: 1, access: Access::WriteOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "SNAK", bit: 27, width: 1, access: Access::WriteOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "SD0PID_SEVNFRM", bit: 28, width: 1, access: Access::WriteOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "SODDFRM", bit: 29, width: 1, access: Access::WriteOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EPDIS", bit: 30, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EPENA", bit: 31, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "DOEPINT2", offset: 0x348, width: Width::W32, reset: 0x0000_0080, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "XFRC", bit: 0, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EPDISD", bit: 1, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "STUP", bit: 3, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "OTEPDIS", bit: 4, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "B2BSTUP", bit: 6, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "DOEPTSIZ2", offset: 0x350, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "XFRSIZ", bit: 0, width: 19, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "PKTCNT", bit: 19, width: 10, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "RXDPID_STUPCNT", bit: 29, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "DOEPCTL3", offset: 0x360, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "MPSIZ", bit: 0, width: 11, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "USBAEP", bit: 15, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EONUM_DPID", bit: 16, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "NAKSTS", bit: 17, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EPTYP", bit: 18, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "SNPM", bit: 20, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "Stall", bit: 21, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CNAK", bit: 26, width: 1, access: Access::WriteOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "SNAK", bit: 27, width: 1, access: Access::WriteOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "SD0PID_SEVNFRM", bit: 28, width: 1, access: Access::WriteOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "SODDFRM", bit: 29, width: 1, access: Access::WriteOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EPDIS", bit: 30, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EPENA", bit: 31, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "DOEPINT3", offset: 0x368, width: Width::W32, reset: 0x0000_0080, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "XFRC", bit: 0, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EPDISD", bit: 1, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "STUP", bit: 3, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "OTEPDIS", bit: 4, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "B2BSTUP", bit: 6, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "DOEPTSIZ3", offset: 0x370, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "XFRSIZ", bit: 0, width: 19, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "PKTCNT", bit: 19, width: 10, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "RXDPID_STUPCNT", bit: 29, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
];