rigless 0.0.5

Virtual hardware-in-the-loop runtime: run unmodified firmware on an emulated MCU with every peripheral, chip model, and unit of virtual time in Rust; a fork of QEMU is built in and executes the instructions
Documentation 
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// rigless svd from STM32F427.svd, sha256 5eb6bfd30833147f0cb93b74235b602f835fddd78d3795f67a5873804e80d414. Do not edit.
//! Registers of `Ethernet_PTP` and the instances derived from it.

use rigless::soc::{Access, FieldSpec, Layout, ReadAction, RegisterSpec, Width, WriteModify};

/// The registers by name; a variant's index is its row in [`REGISTERS`].
#[derive(Debug, Clone, Copy, PartialEq, Eq)]
pub enum Register {
    /// `PTPTSCR` at offset `0x0`, resets to `0x0000_2000`, read-write.
    Ptptscr = 0,
    /// `PTPSSIR` at offset `0x4`, resets to `0x0000_0000`, read-write.
    Ptpssir = 1,
    /// `PTPTSHR` at offset `0x8`, resets to `0x0000_0000`, read-only.
    Ptptshr = 2,
    /// `PTPTSLR` at offset `0xC`, resets to `0x0000_0000`, read-only.
    Ptptslr = 3,
    /// `PTPTSHUR` at offset `0x10`, resets to `0x0000_0000`, read-write.
    Ptptshur = 4,
    /// `PTPTSLUR` at offset `0x14`, resets to `0x0000_0000`, read-write.
    Ptptslur = 5,
    /// `PTPTSAR` at offset `0x18`, resets to `0x0000_0000`, read-write.
    Ptptsar = 6,
    /// `PTPTTHR` at offset `0x1C`, resets to `0x0000_0000`, read-write.
    Ptptthr = 7,
    /// `PTPTTLR` at offset `0x20`, resets to `0x0000_0000`, read-write.
    Ptpttlr = 8,
    /// `PTPTSSR` at offset `0x28`, resets to `0x0000_0000`, read-only.
    Ptptssr = 9,
    /// `PTPPPSCR` at offset `0x2C`, resets to `0x0000_0000`, read-only.
    Ptpppscr = 10,
}

impl Register {
    /// Every register, in table order.
    pub const ALL: [Self; 11] = [Self::Ptptscr, Self::Ptpssir, Self::Ptptshr, Self::Ptptslr, Self::Ptptshur, Self::Ptptslur, Self::Ptptsar, Self::Ptptthr, Self::Ptpttlr, Self::Ptptssr, Self::Ptpppscr];
}

impl Layout for Register {
    const REGISTERS: &'static [RegisterSpec] = &REGISTERS;
    fn from_index(index: usize) -> Option<Self> {
        Self::ALL.get(index).copied()
    }
    fn index(self) -> usize {
        self as usize
    }
}

/// The fields of `PTPTSCR`.
pub mod ptptscr {
    use super::FieldSpec;
    /// `TSE`, bit 0.
    pub const TSE: &FieldSpec = &super::REGISTERS[0].fields[0];
    /// `TSFCU`, bit 1.
    pub const TSFCU: &FieldSpec = &super::REGISTERS[0].fields[1];
    /// `TSSTI`, bit 2.
    pub const TSSTI: &FieldSpec = &super::REGISTERS[0].fields[2];
    /// `TSSTU`, bit 3.
    pub const TSSTU: &FieldSpec = &super::REGISTERS[0].fields[3];
    /// `TSITE`, bit 4.
    pub const TSITE: &FieldSpec = &super::REGISTERS[0].fields[4];
    /// `TTSARU`, bit 5.
    pub const TTSARU: &FieldSpec = &super::REGISTERS[0].fields[5];
    /// `TSSARFE`, bit 8.
    pub const TSSARFE: &FieldSpec = &super::REGISTERS[0].fields[6];
    /// `TSSSR`, bit 9.
    pub const TSSSR: &FieldSpec = &super::REGISTERS[0].fields[7];
    /// `TSPTPPSV2E`, bit 10.
    pub const TSPTPPSV2E: &FieldSpec = &super::REGISTERS[0].fields[8];
    /// `TSSPTPOEFE`, bit 11.
    pub const TSSPTPOEFE: &FieldSpec = &super::REGISTERS[0].fields[9];
    /// `TSSIPV6FE`, bit 12.
    pub const TSSIPV6FE: &FieldSpec = &super::REGISTERS[0].fields[10];
    /// `TSSIPV4FE`, bit 13.
    pub const TSSIPV4FE: &FieldSpec = &super::REGISTERS[0].fields[11];
    /// `TSSEME`, bit 14.
    pub const TSSEME: &FieldSpec = &super::REGISTERS[0].fields[12];
    /// `TSSMRME`, bit 15.
    pub const TSSMRME: &FieldSpec = &super::REGISTERS[0].fields[13];
    /// `TSCNT`, bits 16..=17.
    pub const TSCNT: &FieldSpec = &super::REGISTERS[0].fields[14];
    /// `TSPFFMAE`, bit 18.
    pub const TSPFFMAE: &FieldSpec = &super::REGISTERS[0].fields[15];
}

/// The fields of `PTPSSIR`.
pub mod ptpssir {
    use super::FieldSpec;
    /// `STSSI`, bits 0..=7.
    pub const STSSI: &FieldSpec = &super::REGISTERS[1].fields[0];
}

/// The fields of `PTPTSHR`.
pub mod ptptshr {
    use super::FieldSpec;
    /// `STS`, bits 0..=31.
    pub const STS: &FieldSpec = &super::REGISTERS[2].fields[0];
}

/// The fields of `PTPTSLR`.
pub mod ptptslr {
    use super::FieldSpec;
    /// `STSS`, bits 0..=30.
    pub const STSS: &FieldSpec = &super::REGISTERS[3].fields[0];
    /// `STPNS`, bit 31.
    pub const STPNS: &FieldSpec = &super::REGISTERS[3].fields[1];
}

/// The fields of `PTPTSHUR`.
pub mod ptptshur {
    use super::FieldSpec;
    /// `TSUS`, bits 0..=31.
    pub const TSUS: &FieldSpec = &super::REGISTERS[4].fields[0];
}

/// The fields of `PTPTSLUR`.
pub mod ptptslur {
    use super::FieldSpec;
    /// `TSUSS`, bits 0..=30.
    pub const TSUSS: &FieldSpec = &super::REGISTERS[5].fields[0];
    /// `TSUPNS`, bit 31.
    pub const TSUPNS: &FieldSpec = &super::REGISTERS[5].fields[1];
}

/// The fields of `PTPTSAR`.
pub mod ptptsar {
    use super::FieldSpec;
    /// `TSA`, bits 0..=31.
    pub const TSA: &FieldSpec = &super::REGISTERS[6].fields[0];
}

/// The fields of `PTPTTHR`.
pub mod ptptthr {
    use super::FieldSpec;
    /// `TTSH`, bits 0..=31.
    pub const TTSH: &FieldSpec = &super::REGISTERS[7].fields[0];
}

/// The fields of `PTPTTLR`.
pub mod ptpttlr {
    use super::FieldSpec;
    /// `TTSL`, bits 0..=31.
    pub const TTSL: &FieldSpec = &super::REGISTERS[8].fields[0];
}

/// The fields of `PTPTSSR`.
pub mod ptptssr {
    use super::FieldSpec;
    /// `TSSO`, bit 0.
    pub const TSSO: &FieldSpec = &super::REGISTERS[9].fields[0];
    /// `TSTTR`, bit 1.
    pub const TSTTR: &FieldSpec = &super::REGISTERS[9].fields[1];
}

/// The fields of `PTPPPSCR`.
pub mod ptpppscr {
    use super::FieldSpec;
    /// `TSSO`, bit 0.
    pub const TSSO: &FieldSpec = &super::REGISTERS[10].fields[0];
    /// `TSTTR`, bit 1.
    pub const TSTTR: &FieldSpec = &super::REGISTERS[10].fields[1];
}

/// The register table.
pub static REGISTERS: [RegisterSpec; 11] = [
    RegisterSpec { name: "PTPTSCR", offset: 0x0, width: Width::W32, reset: 0x0000_2000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "TSE", bit: 0, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TSFCU", bit: 1, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TSSTI", bit: 2, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TSSTU", bit: 3, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TSITE", bit: 4, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TTSARU", bit: 5, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TSSARFE", bit: 8, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TSSSR", bit: 9, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TSPTPPSV2E", bit: 10, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TSSPTPOEFE", bit: 11, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TSSIPV6FE", bit: 12, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TSSIPV4FE", bit: 13, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TSSEME", bit: 14, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TSSMRME", bit: 15, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TSCNT", bit: 16, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TSPFFMAE", bit: 18, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "PTPSSIR", offset: 0x4, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "STSSI", bit: 0, width: 8, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "PTPTSHR", offset: 0x8, width: Width::W32, reset: 0x0000_0000, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "STS", bit: 0, width: 32, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "PTPTSLR", offset: 0xC, width: Width::W32, reset: 0x0000_0000, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "STSS", bit: 0, width: 31, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "STPNS", bit: 31, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "PTPTSHUR", offset: 0x10, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "TSUS", bit: 0, width: 32, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "PTPTSLUR", offset: 0x14, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "TSUSS", bit: 0, width: 31, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TSUPNS", bit: 31, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "PTPTSAR", offset: 0x18, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "TSA", bit: 0, width: 32, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "PTPTTHR", offset: 0x1C, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "TTSH", bit: 0, width: 32, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "PTPTTLR", offset: 0x20, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "TTSL", bit: 0, width: 32, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "PTPTSSR", offset: 0x28, width: Width::W32, reset: 0x0000_0000, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "TSSO", bit: 0, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TSTTR", bit: 1, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "PTPPPSCR", offset: 0x2C, width: Width::W32, reset: 0x0000_0000, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "TSSO", bit: 0, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TSTTR", bit: 1, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
    ] },
];