sdmmc-core 0.5.0

SD/MMC core data structures and algorithms
Documentation 
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use crate::lib_bitfield;

use super::{ExtCsd, ExtCsdIndex};

lib_bitfield! {
    /// Represents the `FW_CONFIG` field of the [ExtCsd] register.
    FirmwareConfig: u8,
    mask: 0b1,
    default: 0,
    {
        /// Indicates if the ability to update the firmware is disabled.
        update_disable: 0;
    }
}

impl ExtCsd {
    /// Gets the `FW_CONFIG` field of the [ExtCsd] register.
    pub const fn fw_config(&self) -> FirmwareConfig {
        FirmwareConfig::from_inner(self.0[ExtCsdIndex::FwConfig.into_inner()])
    }

    /// Sets the `FW_CONFIG` field of the [ExtCsd] register.
    pub fn set_fw_config(&mut self, val: FirmwareConfig) {
        self.0[ExtCsdIndex::FwConfig.into_inner()] = val.into_inner();
    }
}

#[cfg(test)]
mod tests {
    use super::*;

    #[test]
    fn test_fw_config() {
        let mut ext_csd = ExtCsd::new();

        assert_eq!(ext_csd.fw_config(), FirmwareConfig::new());

        (0..u8::MAX)
            .map(FirmwareConfig::from_inner)
            .for_each(|fw_config| {
                ext_csd.set_fw_config(fw_config);
                assert_eq!(ext_csd.fw_config(), fw_config);
            });
    }
}