sdmmc-core 0.5.0

SD/MMC core data structures and algorithms
Documentation 
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use crate::lib_bitfield;
use crate::result::Result;

use super::{ExtCsd, ExtCsdIndex};

lib_bitfield! {
    /// Represents the `BOOT_CONFIG_PROT` field of the [ExtCsd] register.
    BootConfigurationProtection: u8,
    mask: 0x11,
    default: 0,
    {
        /// Indicates whether to disable boot configuration register bits permanently.
        perm_boot_config_prot: 4;
        /// Indicates whether to disable boot configuration register bits until next power cycle.
        pwr_boot_config_prot: 0;
    }
}

impl ExtCsd {
    /// Gets the `BOOT_CONFIG_PROT` field of the [ExtCsd] register.
    pub const fn boot_config_prot(&self) -> BootConfigurationProtection {
        BootConfigurationProtection::from_inner(self.0[ExtCsdIndex::BootConfigProt.into_inner()])
    }

    /// Sets the `BOOT_CONFIG_PROT` field of the [ExtCsd] register.
    pub fn set_boot_config_prot(&mut self, val: BootConfigurationProtection) {
        self.0[ExtCsdIndex::BootConfigProt.into_inner()] = val.into_inner();
    }
}

#[cfg(test)]
mod tests {
    use super::*;

    #[test]
    fn test_boot_config_prot() {
        let mut ext_csd = ExtCsd::new();

        assert_eq!(
            ext_csd.boot_config_prot(),
            BootConfigurationProtection::new()
        );

        (0..=u8::MAX)
            .map(BootConfigurationProtection::from_inner)
            .for_each(|boot| {
                ext_csd.set_boot_config_prot(boot);
                assert_eq!(ext_csd.boot_config_prot(), boot);
            });
    }
}