sdmmc-core 0.5.0

SD/MMC core data structures and algorithms
Documentation 
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use crate::lib_bitfield;

use super::{ExtCsd, ExtCsdIndex};

lib_bitfield! {
    /// Represents the `BOOT_INFO` field of the [ExtCsd] register.
    BootInfo: u8,
    mask: 0x7,
    default: 0,
    {
        /// Indicates support for `High Speed` (HS) boot method.
        hs_boot_mode: 2;
        /// Indicates support for `Dual Data Rate` (DDR) boot method.
        ddr_boot_mode: 1;
        /// Indicates support for alternative boot method.
        alt_boot_mode: 0;
    }
}

impl ExtCsd {
    /// Gets the `BOOT_INFO` field of the [ExtCsd] register.
    pub const fn boot_info(&self) -> BootInfo {
        BootInfo::from_inner(self.0[ExtCsdIndex::BootInfo.into_inner()])
    }

    /// Sets the `BOOT_INFO` field of the [ExtCsd] register.
    pub(crate) fn set_boot_info(&mut self, val: BootInfo) {
        self.0[ExtCsdIndex::BootInfo.into_inner()] = val.into_inner();
    }
}

#[cfg(test)]
mod tests {
    use super::*;

    #[test]
    fn test_boot_info() {
        let mut ext_csd = ExtCsd::new();

        assert_eq!(ext_csd.boot_info(), BootInfo::new());

        (0..=u8::MAX).map(BootInfo::from_inner).for_each(|info| {
            ext_csd.set_boot_info(info);
            assert_eq!(ext_csd.boot_info(), info);
        });
    }
}