Struct gd32f1::R [−][src]
Register/field reader
Result of the read method of a register.
Also it can be used in the modify method
Implementations
impl<U, T> R<U, T> where
U: Copy, [src]
U: Copy,
impl<FI> R<bool, FI>[src]
pub fn bit(&self) -> bool[src]
Value of the field as raw bits
pub fn bit_is_clear(&self) -> bool[src]
Returns true if the bit is clear (0)
pub fn bit_is_set(&self) -> bool[src]
Returns true if the bit is set (1)
impl R<bool, STRC_A>[src]
pub fn variant(&self) -> STRC_A[src]
Get enumerated values variant
pub fn is_not_started(&self) -> bool[src]
Checks if the value of the field is NOTSTARTED
pub fn is_started(&self) -> bool[src]
Checks if the value of the field is STARTED
impl R<bool, STIC_A>[src]
pub fn variant(&self) -> STIC_A[src]
Get enumerated values variant
pub fn is_not_started(&self) -> bool[src]
Checks if the value of the field is NOTSTARTED
pub fn is_started(&self) -> bool[src]
Checks if the value of the field is STARTED
impl R<bool, EOIC_A>[src]
pub fn variant(&self) -> EOIC_A[src]
Get enumerated values variant
pub fn is_not_complete(&self) -> bool[src]
Checks if the value of the field is NOTCOMPLETE
pub fn is_complete(&self) -> bool[src]
Checks if the value of the field is COMPLETE
impl R<bool, EOC_A>[src]
pub fn variant(&self) -> EOC_A[src]
Get enumerated values variant
pub fn is_not_complete(&self) -> bool[src]
Checks if the value of the field is NOTCOMPLETE
pub fn is_complete(&self) -> bool[src]
Checks if the value of the field is COMPLETE
impl R<bool, WDE_A>[src]
pub fn variant(&self) -> WDE_A[src]
Get enumerated values variant
pub fn is_no_event(&self) -> bool[src]
Checks if the value of the field is NOEVENT
pub fn is_event(&self) -> bool[src]
Checks if the value of the field is EVENT
impl R<u32, Reg<u32, _STAT>>[src]
pub fn strc(&self) -> STRC_R[src]
Bit 4 - Start flag of regular channel group
pub fn stic(&self) -> STIC_R[src]
Bit 3 - Start flag of inserted channel group
pub fn eoic(&self) -> EOIC_R[src]
Bit 2 - End of inserted group conversion flag
pub fn eoc(&self) -> EOC_R[src]
Bit 1 - End of group conversion flag
pub fn wde(&self) -> WDE_R[src]
Bit 0 - Analog watchdog event flag
impl R<bool, RWDEN_A>[src]
pub fn variant(&self) -> RWDEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, IWDEN_A>[src]
pub fn variant(&self) -> IWDEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, DISIC_A>[src]
pub fn variant(&self) -> DISIC_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, DISRC_A>[src]
pub fn variant(&self) -> DISRC_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, ICA_A>[src]
pub fn variant(&self) -> ICA_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, WDSC_A>[src]
pub fn variant(&self) -> WDSC_A[src]
Get enumerated values variant
pub fn is_all(&self) -> bool[src]
Checks if the value of the field is ALL
pub fn is_single(&self) -> bool[src]
Checks if the value of the field is SINGLE
impl R<bool, SM_A>[src]
pub fn variant(&self) -> SM_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, EOICIE_A>[src]
pub fn variant(&self) -> EOICIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, WDEIE_A>[src]
pub fn variant(&self) -> WDEIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, EOCIE_A>[src]
pub fn variant(&self) -> EOCIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CTL0>>[src]
pub fn dres(&self) -> DRES_R[src]
Bits 24:25 - ADC resolution
pub fn rwden(&self) -> RWDEN_R[src]
Bit 23 - Regular channel analog watchdog enable
pub fn iwden(&self) -> IWDEN_R[src]
Bit 22 - Inserted channel analog watchdog enable
pub fn disnum(&self) -> DISNUM_R[src]
Bits 13:15 - Number of conversions in discontinuous mode
pub fn disic(&self) -> DISIC_R[src]
Bit 12 - Discontinuous mode on injected channels
pub fn disrc(&self) -> DISRC_R[src]
Bit 11 - Discontinuous mode on regular channels
pub fn ica(&self) -> ICA_R[src]
Bit 10 - Inserted channel group convert automatically
pub fn wdsc(&self) -> WDSC_R[src]
Bit 9 - When in scan mode, analog watchdog is effective on a single channel
pub fn sm(&self) -> SM_R[src]
Bit 8 - Scan mode
pub fn eoicie(&self) -> EOICIE_R[src]
Bit 7 - Interrupt enable for EOIC
pub fn wdeie(&self) -> WDEIE_R[src]
Bit 6 - Interrupt enable for WDE
pub fn eocie(&self) -> EOCIE_R[src]
Bit 5 - Interrupt enable for EOC
pub fn wdchsel(&self) -> WDCHSEL_R[src]
Bits 0:4 - Analog watchdog channel select
impl R<bool, VBATEN_A>[src]
pub fn variant(&self) -> VBATEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, TSVREN_A>[src]
pub fn variant(&self) -> TSVREN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, SWRCST_A>[src]
pub fn variant(&self) -> SWRCST_A[src]
Get enumerated values variant
pub fn is_started(&self) -> bool[src]
Checks if the value of the field is STARTED
pub fn is_not_started(&self) -> bool[src]
Checks if the value of the field is NOTSTARTED
impl R<bool, SWICST_A>[src]
pub fn variant(&self) -> SWICST_A[src]
Get enumerated values variant
pub fn is_started(&self) -> bool[src]
Checks if the value of the field is STARTED
pub fn is_not_started(&self) -> bool[src]
Checks if the value of the field is NOTSTARTED
impl R<bool, ETERC_A>[src]
pub fn variant(&self) -> ETERC_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u8, ETSRC_A>[src]
pub fn variant(&self) -> ETSRC_A[src]
Get enumerated values variant
pub fn is_timer0ch0(&self) -> bool[src]
Checks if the value of the field is TIMER0CH0
pub fn is_timer0ch1(&self) -> bool[src]
Checks if the value of the field is TIMER0CH1
pub fn is_timer0ch2(&self) -> bool[src]
Checks if the value of the field is TIMER0CH2
pub fn is_timer1ch1(&self) -> bool[src]
Checks if the value of the field is TIMER1CH1
pub fn is_timer2trgo(&self) -> bool[src]
Checks if the value of the field is TIMER2TRGO
pub fn is_timer14ch0(&self) -> bool[src]
Checks if the value of the field is TIMER14CH0
pub fn is_exti11(&self) -> bool[src]
Checks if the value of the field is EXTI11
pub fn is_swrcst(&self) -> bool[src]
Checks if the value of the field is SWRCST
impl R<bool, ETEIC_A>[src]
pub fn variant(&self) -> ETEIC_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u8, ETSIC_A>[src]
pub fn variant(&self) -> ETSIC_A[src]
Get enumerated values variant
pub fn is_timer0trgo(&self) -> bool[src]
Checks if the value of the field is TIMER0TRGO
pub fn is_timer0ch3(&self) -> bool[src]
Checks if the value of the field is TIMER0CH3
pub fn is_timer1trgo(&self) -> bool[src]
Checks if the value of the field is TIMER1TRGO
pub fn is_timer1ch0(&self) -> bool[src]
Checks if the value of the field is TIMER1CH0
pub fn is_timer2ch2(&self) -> bool[src]
Checks if the value of the field is TIMER2CH2
pub fn is_timer14trgo(&self) -> bool[src]
Checks if the value of the field is TIMER14TRGO
pub fn is_exti15(&self) -> bool[src]
Checks if the value of the field is EXTI15
pub fn is_swicst(&self) -> bool[src]
Checks if the value of the field is SWICST
impl R<bool, DAL_A>[src]
pub fn variant(&self) -> DAL_A[src]
Get enumerated values variant
pub fn is_right(&self) -> bool[src]
Checks if the value of the field is RIGHT
pub fn is_left(&self) -> bool[src]
Checks if the value of the field is LEFT
impl R<bool, DMA_A>[src]
pub fn variant(&self) -> DMA_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, RSTCLB_A>[src]
pub fn variant(&self) -> RSTCLB_A[src]
Get enumerated values variant
pub fn is_complete(&self) -> bool[src]
Checks if the value of the field is COMPLETE
pub fn is_not_complete(&self) -> bool[src]
Checks if the value of the field is NOTCOMPLETE
impl R<bool, CLB_A>[src]
pub fn variant(&self) -> CLB_A[src]
Get enumerated values variant
pub fn is_complete(&self) -> bool[src]
Checks if the value of the field is COMPLETE
pub fn is_not_complete(&self) -> bool[src]
Checks if the value of the field is NOTCOMPLETE
impl R<bool, CTN_A>[src]
pub fn variant(&self) -> CTN_A[src]
Get enumerated values variant
pub fn is_single(&self) -> bool[src]
Checks if the value of the field is SINGLE
pub fn is_continuous(&self) -> bool[src]
Checks if the value of the field is CONTINUOUS
impl R<bool, ADCON_A>[src]
pub fn variant(&self) -> ADCON_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CTL1>>[src]
pub fn vbaten(&self) -> VBATEN_R[src]
Bit 24 - enable/disable the VBAT channel
pub fn tsvren(&self) -> TSVREN_R[src]
Bit 23 - Channel 16 and 17 enable of ADC
pub fn swrcst(&self) -> SWRCST_R[src]
Bit 22 - Start on regular channel
pub fn swicst(&self) -> SWICST_R[src]
Bit 21 - Start on inserted channel
pub fn eterc(&self) -> ETERC_R[src]
Bit 20 - External trigger enable for regular channel
pub fn etsrc(&self) -> ETSRC_R[src]
Bits 17:19 - External trigger select for regular channel
pub fn eteic(&self) -> ETEIC_R[src]
Bit 15 - External trigger enable for inserted channel
pub fn etsic(&self) -> ETSIC_R[src]
Bits 12:14 - External trigger select for inserted channel
pub fn dal(&self) -> DAL_R[src]
Bit 11 - Data alignment
pub fn dma(&self) -> DMA_R[src]
Bit 8 - DMA request enable
pub fn rstclb(&self) -> RSTCLB_R[src]
Bit 3 - Reset calibration
pub fn clb(&self) -> CLB_R[src]
Bit 2 - ADC calibration
pub fn ctn(&self) -> CTN_R[src]
Bit 1 - Continuous mode
pub fn adcon(&self) -> ADCON_R[src]
Bit 0 - ADC ON
impl R<u8, SPT10_A>[src]
pub fn variant(&self) -> SPT10_A[src]
Get enumerated values variant
pub fn is_cycles1_5(&self) -> bool[src]
Checks if the value of the field is CYCLES1_5
pub fn is_cycles7_5(&self) -> bool[src]
Checks if the value of the field is CYCLES7_5
pub fn is_cycles13_5(&self) -> bool[src]
Checks if the value of the field is CYCLES13_5
pub fn is_cycles28_5(&self) -> bool[src]
Checks if the value of the field is CYCLES28_5
pub fn is_cycles41_5(&self) -> bool[src]
Checks if the value of the field is CYCLES41_5
pub fn is_cycles55_5(&self) -> bool[src]
Checks if the value of the field is CYCLES55_5
pub fn is_cycles71_5(&self) -> bool[src]
Checks if the value of the field is CYCLES71_5
pub fn is_cycles239_5(&self) -> bool[src]
Checks if the value of the field is CYCLES239_5
impl R<u32, Reg<u32, _SAMPT0>>[src]
pub fn spt10(&self) -> SPT10_R[src]
Bits 0:2 - Channel 10 sample time selection
pub fn spt11(&self) -> SPT11_R[src]
Bits 3:5 - Channel 11 sample time selection
pub fn spt12(&self) -> SPT12_R[src]
Bits 6:8 - Channel 12 sample time selection
pub fn spt13(&self) -> SPT13_R[src]
Bits 9:11 - Channel 13 sample time selection
pub fn spt14(&self) -> SPT14_R[src]
Bits 12:14 - Channel 14 sample time selection
pub fn spt15(&self) -> SPT15_R[src]
Bits 15:17 - Channel 15 sample time selection
pub fn spt16(&self) -> SPT16_R[src]
Bits 18:20 - Channel 16 sample time selection
pub fn spt17(&self) -> SPT17_R[src]
Bits 21:23 - Channel 17 sample time selection
pub fn spt18(&self) -> SPT18_R[src]
Bits 24:26 - Channel 18 sample time selection
impl R<u8, SPT0_A>[src]
pub fn variant(&self) -> SPT0_A[src]
Get enumerated values variant
pub fn is_cycles1_5(&self) -> bool[src]
Checks if the value of the field is CYCLES1_5
pub fn is_cycles7_5(&self) -> bool[src]
Checks if the value of the field is CYCLES7_5
pub fn is_cycles13_5(&self) -> bool[src]
Checks if the value of the field is CYCLES13_5
pub fn is_cycles28_5(&self) -> bool[src]
Checks if the value of the field is CYCLES28_5
pub fn is_cycles41_5(&self) -> bool[src]
Checks if the value of the field is CYCLES41_5
pub fn is_cycles55_5(&self) -> bool[src]
Checks if the value of the field is CYCLES55_5
pub fn is_cycles71_5(&self) -> bool[src]
Checks if the value of the field is CYCLES71_5
pub fn is_cycles239_5(&self) -> bool[src]
Checks if the value of the field is CYCLES239_5
impl R<u32, Reg<u32, _SAMPT1>>[src]
pub fn spt0(&self) -> SPT0_R[src]
Bits 0:2 - Channel 0 sample time selection
pub fn spt1(&self) -> SPT1_R[src]
Bits 3:5 - Channel 1 sample time selection
pub fn spt2(&self) -> SPT2_R[src]
Bits 6:8 - Channel 2 sample time selection
pub fn spt3(&self) -> SPT3_R[src]
Bits 9:11 - Channel 3 sample time selection
pub fn spt4(&self) -> SPT4_R[src]
Bits 12:14 - Channel 4 sample time selection
pub fn spt5(&self) -> SPT5_R[src]
Bits 15:17 - Channel 5 sample time selection
pub fn spt6(&self) -> SPT6_R[src]
Bits 18:20 - Channel 6 sample time selection
pub fn spt7(&self) -> SPT7_R[src]
Bits 21:23 - Channel 7 sample time selection
pub fn spt8(&self) -> SPT8_R[src]
Bits 24:26 - Channel 8 sample time selection
pub fn spt9(&self) -> SPT9_R[src]
Bits 27:29 - Channel 9 sample time selection
impl R<u32, Reg<u32, _IOFF0>>[src]
impl R<u32, Reg<u32, _IOFF1>>[src]
impl R<u32, Reg<u32, _IOFF2>>[src]
impl R<u32, Reg<u32, _IOFF3>>[src]
impl R<u32, Reg<u32, _WDHT>>[src]
impl R<u32, Reg<u32, _WDLT>>[src]
impl R<u32, Reg<u32, _RSQ0>>[src]
pub fn rl(&self) -> RL_R[src]
Bits 20:23 - Regular channel group length
pub fn rsq16(&self) -> RSQ16_R[src]
Bits 15:19 - 16th conversion in regular sequence
pub fn rsq15(&self) -> RSQ15_R[src]
Bits 10:14 - 15th conversion in regular sequence
pub fn rsq14(&self) -> RSQ14_R[src]
Bits 5:9 - 14th conversion in regular sequence
pub fn rsq13(&self) -> RSQ13_R[src]
Bits 0:4 - 13th conversion in regular sequence
impl R<u32, Reg<u32, _RSQ1>>[src]
pub fn rsq12(&self) -> RSQ12_R[src]
Bits 25:29 - 12th conversion in regular sequence
pub fn rsq11(&self) -> RSQ11_R[src]
Bits 20:24 - 11th conversion in regular sequence
pub fn rsq10(&self) -> RSQ10_R[src]
Bits 15:19 - 10th conversion in regular sequence
pub fn rsq9(&self) -> RSQ9_R[src]
Bits 10:14 - 9th conversion in regular sequence
pub fn rsq8(&self) -> RSQ8_R[src]
Bits 5:9 - 8th conversion in regular sequence
pub fn rsq7(&self) -> RSQ7_R[src]
Bits 0:4 - 7th conversion in regular sequence
impl R<u32, Reg<u32, _RSQ2>>[src]
pub fn rsq6(&self) -> RSQ6_R[src]
Bits 25:29 - 6th conversion in regular sequence
pub fn rsq5(&self) -> RSQ5_R[src]
Bits 20:24 - 5th conversion in regular sequence
pub fn rsq4(&self) -> RSQ4_R[src]
Bits 15:19 - 4th conversion in regular sequence
pub fn rsq3(&self) -> RSQ3_R[src]
Bits 10:14 - 3rd conversion in regular sequence
pub fn rsq2(&self) -> RSQ2_R[src]
Bits 5:9 - 2nd conversion in regular sequence
pub fn rsq1(&self) -> RSQ1_R[src]
Bits 0:4 - 1st conversion in regular sequence
impl R<u32, Reg<u32, _ISQ>>[src]
pub fn il(&self) -> IL_R[src]
Bits 20:21 - Inserted channel group length
pub fn isq4(&self) -> ISQ4_R[src]
Bits 15:19 - 4th conversion in injected sequence
pub fn isq3(&self) -> ISQ3_R[src]
Bits 10:14 - 3rd conversion in injected sequence
pub fn isq2(&self) -> ISQ2_R[src]
Bits 5:9 - 2nd conversion in injected sequence
pub fn isq1(&self) -> ISQ1_R[src]
Bits 0:4 - 1st conversion in injected sequence
impl R<u32, Reg<u32, _IDATA0>>[src]
impl R<u32, Reg<u32, _IDATA1>>[src]
impl R<u32, Reg<u32, _IDATA2>>[src]
impl R<u32, Reg<u32, _IDATA3>>[src]
impl R<u32, Reg<u32, _RDATA>>[src]
impl R<u32, Reg<u32, _OVSAMPCTL>>[src]
pub fn tovs(&self) -> TOVS_R[src]
Bit 9 - Triggered Oversampling
pub fn ovss(&self) -> OVSS_R[src]
Bits 5:8 - Oversampling shift
pub fn ovsr(&self) -> OVSR_R[src]
Bits 2:4 - Oversampling ratio
pub fn ovsen(&self) -> OVSEN_R[src]
Bit 0 - Oversampler Enable
impl R<u32, Reg<u32, _CTL>>[src]
pub fn dfz(&self) -> DFZ_R[src]
Bit 16 - Debug freeze
pub fn swrst(&self) -> SWRST_R[src]
Bit 15 - Software reset
pub fn ttc(&self) -> TTC_R[src]
Bit 7 - Time-triggered communication
pub fn abor(&self) -> ABOR_R[src]
Bit 6 - Automatic bus-off recovery
pub fn awu(&self) -> AWU_R[src]
Bit 5 - Automatic wakeup
pub fn ard(&self) -> ARD_R[src]
Bit 4 - Automatic retransmission disable
pub fn rfod(&self) -> RFOD_R[src]
Bit 3 - Receive FIFO overwrite disable
pub fn tfo(&self) -> TFO_R[src]
Bit 2 - Transmit FIFO order
pub fn slpwmod(&self) -> SLPWMOD_R[src]
Bit 1 - Sleep working mode
pub fn iwmod(&self) -> IWMOD_R[src]
Bit 0 - Initial working mode
impl R<u32, Reg<u32, _STAT>>[src]
pub fn rxl(&self) -> RXL_R[src]
Bit 11 - RX level
pub fn lastrx(&self) -> LASTRX_R[src]
Bit 10 - Last sample value of Rx pin
pub fn rs(&self) -> RS_R[src]
Bit 9 - Receiving state
pub fn ts(&self) -> TS_R[src]
Bit 8 - Transmitting state
pub fn slpif(&self) -> SLPIF_R[src]
Bit 4 - Status change interrupt flag of sleep working mode entering
pub fn wuif(&self) -> WUIF_R[src]
Bit 3 - Status change interrupt flag of wakeup from sleep working mode
pub fn errif(&self) -> ERRIF_R[src]
Bit 2 - Error interrupt flag
pub fn slpws(&self) -> SLPWS_R[src]
Bit 1 - Sleep working state
pub fn iws(&self) -> IWS_R[src]
Bit 0 - Initial working state
impl R<u32, Reg<u32, _TSTAT>>[src]
pub fn tmls2(&self) -> TMLS2_R[src]
Bit 31 - Transmit mailbox 2 last sending in transmit FIFO
pub fn tmls1(&self) -> TMLS1_R[src]
Bit 30 - Transmit mailbox 1 last sending in transmit FIFO
pub fn tmls0(&self) -> TMLS0_R[src]
Bit 29 - Transmit mailbox 0 last sending in transmit FIFO
pub fn tme2(&self) -> TME2_R[src]
Bit 28 - Transmit mailbox 2 empty
pub fn tme1(&self) -> TME1_R[src]
Bit 27 - Transmit mailbox 1 empty
pub fn tme0(&self) -> TME0_R[src]
Bit 26 - Transmit mailbox 0 empty
pub fn num(&self) -> NUM_R[src]
Bits 24:25 - number of the transmit FIFO mailbox in which the frame will be transmitted if at least one mailbox is empty
pub fn mst2(&self) -> MST2_R[src]
Bit 23 - Mailbox 2 stop transmitting
pub fn mte2(&self) -> MTE2_R[src]
Bit 19 - Mailbox 2 transmit error
pub fn mal2(&self) -> MAL2_R[src]
Bit 18 - Mailbox 2 arbitration lost
pub fn mtfnerr2(&self) -> MTFNERR2_R[src]
Bit 17 - Mailbox 2 transmit finished and no error
pub fn mtf2(&self) -> MTF2_R[src]
Bit 16 - Mailbox 2 transmit finished
pub fn mst1(&self) -> MST1_R[src]
Bit 15 - Mailbox 1 stop transmitting
pub fn mte1(&self) -> MTE1_R[src]
Bit 11 - Mailbox 1 transmit error
pub fn mal1(&self) -> MAL1_R[src]
Bit 10 - Mailbox 1 arbitration lost
pub fn mtfnerr1(&self) -> MTFNERR1_R[src]
Bit 9 - Mailbox 1 transmit finished and no error
pub fn mtf1(&self) -> MTF1_R[src]
Bit 8 - Mailbox 1 transmit finished
pub fn mst0(&self) -> MST0_R[src]
Bit 7 - Mailbox 0 stop transmitting
pub fn mte0(&self) -> MTE0_R[src]
Bit 3 - Mailbox 0 transmit error
pub fn mal0(&self) -> MAL0_R[src]
Bit 2 - Mailbox 0 arbitration lost
pub fn mtfnerr0(&self) -> MTFNERR0_R[src]
Bit 1 - Mailbox 0 transmit finished and no error
pub fn mtf0(&self) -> MTF0_R[src]
Bit 0 - Mailbox 0 transmit finished
impl R<u32, Reg<u32, _RFIFO0>>[src]
pub fn rfd0(&self) -> RFD0_R[src]
Bit 5 - Receive FIFO 0 dequeue
pub fn rfo0(&self) -> RFO0_R[src]
Bit 4 - Receive FIFO 0 overfull
pub fn rff0(&self) -> RFF0_R[src]
Bit 3 - Receive FIFO 0 full
pub fn rfl0(&self) -> RFL0_R[src]
Bits 0:1 - Receive FIFO 0 length
impl R<u32, Reg<u32, _RFIFO1>>[src]
pub fn rfd1(&self) -> RFD1_R[src]
Bit 5 - Receive FIFO1 dequeue
pub fn rfo1(&self) -> RFO1_R[src]
Bit 4 - Receive FIFO1 overfull
pub fn rff1(&self) -> RFF1_R[src]
Bit 3 - Receive FIFO1 full
pub fn rfl1(&self) -> RFL1_R[src]
Bits 0:1 - Receive FIFO1 length
impl R<u32, Reg<u32, _INTEN>>[src]
pub fn slpwie(&self) -> SLPWIE_R[src]
Bit 17 - Sleep working interrupt enable
pub fn wie(&self) -> WIE_R[src]
Bit 16 - Wakeup interrupt enable
pub fn errie(&self) -> ERRIE_R[src]
Bit 15 - Error interrupt enable
pub fn errnie(&self) -> ERRNIE_R[src]
Bit 11 - Error number interrupt enable
pub fn boie(&self) -> BOIE_R[src]
Bit 10 - Bus-off interrupt enable
pub fn perrie(&self) -> PERRIE_R[src]
Bit 9 - Passive error interrupt enable
pub fn werrie(&self) -> WERRIE_R[src]
Bit 8 - Warning error interrupt enable
pub fn rfoie1(&self) -> RFOIE1_R[src]
Bit 6 - Receive FIFO1 overfull interrupt enable
pub fn rffie1(&self) -> RFFIE1_R[src]
Bit 5 - Receive FIFO1 full interrupt enable
pub fn rfneie1(&self) -> RFNEIE1_R[src]
Bit 4 - Receive FIFO1 not empty interrupt enable
pub fn rfoie0(&self) -> RFOIE0_R[src]
Bit 3 - Receive FIFO0 overfull interrupt enable
pub fn rffie0(&self) -> RFFIE0_R[src]
Bit 2 - Receive FIFO0 full interrupt enable
pub fn rfneie0(&self) -> RFNEIE0_R[src]
Bit 1 - Receive FIFO0 not empty interrupt enable
pub fn tmeie(&self) -> TMEIE_R[src]
Bit 0 - Transmit mailbox empty interrupt enable
impl R<u32, Reg<u32, _ERR>>[src]
pub fn recnt(&self) -> RECNT_R[src]
Bits 24:31 - Receive Error Count
pub fn tecnt(&self) -> TECNT_R[src]
Bits 16:23 - Transmit Error Count
pub fn errn(&self) -> ERRN_R[src]
Bits 4:6 - Error number
pub fn boerr(&self) -> BOERR_R[src]
Bit 2 - Bus-off error
pub fn perr(&self) -> PERR_R[src]
Bit 1 - Passive error
pub fn werr(&self) -> WERR_R[src]
Bit 0 - Warning error
impl R<u32, Reg<u32, _BT>>[src]
pub fn scmod(&self) -> SCMOD_R[src]
Bit 31 - Silent communication mode
pub fn lcmod(&self) -> LCMOD_R[src]
Bit 30 - Loopback communication mode
pub fn sjw(&self) -> SJW_R[src]
Bits 24:25 - Resynchronization jump width
pub fn bs2(&self) -> BS2_R[src]
Bits 20:22 - Bit segment 2
pub fn bs1(&self) -> BS1_R[src]
Bits 16:19 - Bit segment 1
pub fn buadpsc(&self) -> BUADPSC_R[src]
Bits 0:9 - Baud rate prescaler
impl R<u32, Reg<u32, _TMI0>>[src]
pub fn sfid_efid(&self) -> SFID_EFID_R[src]
Bits 21:31 - The frame identifier
pub fn efid(&self) -> EFID_R[src]
Bits 3:20 - The frame identifier
pub fn ff(&self) -> FF_R[src]
Bit 2 - Frame format
pub fn ft(&self) -> FT_R[src]
Bit 1 - Frame type
pub fn ten(&self) -> TEN_R[src]
Bit 0 - Transmit enable
impl R<u32, Reg<u32, _TMP0>>[src]
pub fn ts(&self) -> TS_R[src]
Bits 16:31 - Time stamp
pub fn tsen(&self) -> TSEN_R[src]
Bit 8 - Time stamp enable
pub fn dlenc(&self) -> DLENC_R[src]
Bits 0:3 - Data length code
impl R<u32, Reg<u32, _TMDATA00>>[src]
pub fn db3(&self) -> DB3_R[src]
Bits 24:31 - Data byte 3
pub fn db2(&self) -> DB2_R[src]
Bits 16:23 - Data byte 2
pub fn db1(&self) -> DB1_R[src]
Bits 8:15 - Data byte 1
pub fn db0(&self) -> DB0_R[src]
Bits 0:7 - Data byte 0
impl R<u32, Reg<u32, _TMDATA10>>[src]
pub fn db7(&self) -> DB7_R[src]
Bits 24:31 - Data byte 7
pub fn db6(&self) -> DB6_R[src]
Bits 16:23 - Data byte 6
pub fn db5(&self) -> DB5_R[src]
Bits 8:15 - Data byte 5
pub fn db4(&self) -> DB4_R[src]
Bits 0:7 - Data byte 4
impl R<u32, Reg<u32, _TMI1>>[src]
pub fn sfid_efid(&self) -> SFID_EFID_R[src]
Bits 21:31 - The frame identifier
pub fn efid(&self) -> EFID_R[src]
Bits 3:20 - The frame identifier
pub fn ff(&self) -> FF_R[src]
Bit 2 - Frame format
pub fn ft(&self) -> FT_R[src]
Bit 1 - Frame type
pub fn ten(&self) -> TEN_R[src]
Bit 0 - Transmit enable
impl R<u32, Reg<u32, _TMP1>>[src]
pub fn ts(&self) -> TS_R[src]
Bits 16:31 - Time stamp
pub fn tsen(&self) -> TSEN_R[src]
Bit 8 - Time stamp enable
pub fn dlenc(&self) -> DLENC_R[src]
Bits 0:3 - Data length code
impl R<u32, Reg<u32, _TMDATA01>>[src]
pub fn db3(&self) -> DB3_R[src]
Bits 24:31 - Data byte 3
pub fn db2(&self) -> DB2_R[src]
Bits 16:23 - Data byte 2
pub fn db1(&self) -> DB1_R[src]
Bits 8:15 - Data byte 1
pub fn db0(&self) -> DB0_R[src]
Bits 0:7 - Data byte 0
impl R<u32, Reg<u32, _TMDATA11>>[src]
pub fn db7(&self) -> DB7_R[src]
Bits 24:31 - Data byte 7
pub fn db6(&self) -> DB6_R[src]
Bits 16:23 - Data byte 6
pub fn db5(&self) -> DB5_R[src]
Bits 8:15 - Data byte 5
pub fn db4(&self) -> DB4_R[src]
Bits 0:7 - Data byte 4
impl R<u32, Reg<u32, _TMI2>>[src]
pub fn sfid_efid(&self) -> SFID_EFID_R[src]
Bits 21:31 - The frame identifier
pub fn efid(&self) -> EFID_R[src]
Bits 3:20 - The frame identifier
pub fn ff(&self) -> FF_R[src]
Bit 2 - Frame format
pub fn ft(&self) -> FT_R[src]
Bit 1 - Frame type
pub fn ten(&self) -> TEN_R[src]
Bit 0 - Transmit enable
impl R<u32, Reg<u32, _TMP2>>[src]
pub fn ts(&self) -> TS_R[src]
Bits 16:31 - Time stamp
pub fn tsen(&self) -> TSEN_R[src]
Bit 8 - Time stamp enable
pub fn dlenc(&self) -> DLENC_R[src]
Bits 0:3 - Data length code
impl R<u32, Reg<u32, _TMDATA02>>[src]
pub fn db3(&self) -> DB3_R[src]
Bits 24:31 - Data byte 3
pub fn db2(&self) -> DB2_R[src]
Bits 16:23 - Data byte 2
pub fn db1(&self) -> DB1_R[src]
Bits 8:15 - Data byte 1
pub fn db0(&self) -> DB0_R[src]
Bits 0:7 - Data byte 0
impl R<u32, Reg<u32, _TMDATA12>>[src]
pub fn db7(&self) -> DB7_R[src]
Bits 24:31 - Data byte 7
pub fn db6(&self) -> DB6_R[src]
Bits 16:23 - Data byte 6
pub fn db5(&self) -> DB5_R[src]
Bits 8:15 - Data byte 5
pub fn db4(&self) -> DB4_R[src]
Bits 0:7 - Data byte 4
impl R<u32, Reg<u32, _RFIFOMI0>>[src]
pub fn sfid_efid(&self) -> SFID_EFID_R[src]
Bits 21:31 - The frame identifier
pub fn efid(&self) -> EFID_R[src]
Bits 3:20 - The frame identifier
pub fn ff(&self) -> FF_R[src]
Bit 2 - Frame format
pub fn ft(&self) -> FT_R[src]
Bit 1 - Frame type
impl R<u32, Reg<u32, _RFIFOMP0>>[src]
pub fn ts(&self) -> TS_R[src]
Bits 16:31 - Time stamp
pub fn fi(&self) -> FI_R[src]
Bits 8:15 - Filtering index
pub fn dlenc(&self) -> DLENC_R[src]
Bits 0:3 - Data length code
impl R<u32, Reg<u32, _RFIFOMDATA00>>[src]
pub fn db3(&self) -> DB3_R[src]
Bits 24:31 - Data byte 3
pub fn db2(&self) -> DB2_R[src]
Bits 16:23 - Data byte 2
pub fn db1(&self) -> DB1_R[src]
Bits 8:15 - Data byte 1
pub fn db0(&self) -> DB0_R[src]
Bits 0:7 - Data byte 0
impl R<u32, Reg<u32, _RFIFOMDATA10>>[src]
pub fn db7(&self) -> DB7_R[src]
Bits 24:31 - Data byte 7
pub fn db6(&self) -> DB6_R[src]
Bits 16:23 - Data byte 6
pub fn db5(&self) -> DB5_R[src]
Bits 8:15 - Data byte 5
pub fn db4(&self) -> DB4_R[src]
Bits 0:7 - Data byte 4
impl R<u32, Reg<u32, _RFIFOMI1>>[src]
pub fn sfid_efid(&self) -> SFID_EFID_R[src]
Bits 21:31 - The frame identifier
pub fn efid(&self) -> EFID_R[src]
Bits 3:20 - The frame identifier
pub fn ff(&self) -> FF_R[src]
Bit 2 - Frame format
pub fn ft(&self) -> FT_R[src]
Bit 1 - Frame type
impl R<u32, Reg<u32, _RFIFOMP1>>[src]
pub fn ts(&self) -> TS_R[src]
Bits 16:31 - Time stamp
pub fn fi(&self) -> FI_R[src]
Bits 8:15 - Filtering index
pub fn dlenc(&self) -> DLENC_R[src]
Bits 0:3 - Data length code
impl R<u32, Reg<u32, _RFIFOMDATA01>>[src]
pub fn db3(&self) -> DB3_R[src]
Bits 24:31 - Data byte 3
pub fn db2(&self) -> DB2_R[src]
Bits 16:23 - Data byte 2
pub fn db1(&self) -> DB1_R[src]
Bits 8:15 - Data byte 1
pub fn db0(&self) -> DB0_R[src]
Bits 0:7 - Data byte 0
impl R<u32, Reg<u32, _RFIFOMDATA11>>[src]
pub fn db7(&self) -> DB7_R[src]
Bits 24:31 - Data byte 7
pub fn db6(&self) -> DB6_R[src]
Bits 16:23 - Data byte 6
pub fn db5(&self) -> DB5_R[src]
Bits 8:15 - Data byte 5
pub fn db4(&self) -> DB4_R[src]
Bits 0:7 - Data byte 4
impl R<u32, Reg<u32, _FCTL>>[src]
pub fn hbc1f(&self) -> HBC1F_R[src]
Bits 8:13 - Header bank of CAN1 filter
pub fn fld(&self) -> FLD_R[src]
Bit 0 - Filter lock disable
impl R<u32, Reg<u32, _FMCFG>>[src]
pub fn fmod27(&self) -> FMOD27_R[src]
Bit 27 - Filter mode
pub fn fmod26(&self) -> FMOD26_R[src]
Bit 26 - Filter mode
pub fn fmod25(&self) -> FMOD25_R[src]
Bit 25 - Filter mode
pub fn fmod24(&self) -> FMOD24_R[src]
Bit 24 - Filter mode
pub fn fmod23(&self) -> FMOD23_R[src]
Bit 23 - Filter mode
pub fn fmod22(&self) -> FMOD22_R[src]
Bit 22 - Filter mode
pub fn fmod21(&self) -> FMOD21_R[src]
Bit 21 - Filter mode
pub fn fmod20(&self) -> FMOD20_R[src]
Bit 20 - Filter mode
pub fn fmod19(&self) -> FMOD19_R[src]
Bit 19 - Filter mode
pub fn fmod18(&self) -> FMOD18_R[src]
Bit 18 - Filter mode
pub fn fmod17(&self) -> FMOD17_R[src]
Bit 17 - Filter mode
pub fn fmod16(&self) -> FMOD16_R[src]
Bit 16 - Filter mode
pub fn fmod15(&self) -> FMOD15_R[src]
Bit 15 - Filter mode
pub fn fmod14(&self) -> FMOD14_R[src]
Bit 14 - Filter mode
pub fn fmod13(&self) -> FMOD13_R[src]
Bit 13 - Filter mode
pub fn fmod12(&self) -> FMOD12_R[src]
Bit 12 - Filter mode
pub fn fmod11(&self) -> FMOD11_R[src]
Bit 11 - Filter mode
pub fn fmod10(&self) -> FMOD10_R[src]
Bit 10 - Filter mode
pub fn fmod9(&self) -> FMOD9_R[src]
Bit 9 - Filter mode
pub fn fmod8(&self) -> FMOD8_R[src]
Bit 8 - Filter mode
pub fn fmod7(&self) -> FMOD7_R[src]
Bit 7 - Filter mode
pub fn fmod6(&self) -> FMOD6_R[src]
Bit 6 - Filter mode
pub fn fmod5(&self) -> FMOD5_R[src]
Bit 5 - Filter mode
pub fn fmod4(&self) -> FMOD4_R[src]
Bit 4 - Filter mode
pub fn fmod3(&self) -> FMOD3_R[src]
Bit 3 - Filter mode
pub fn fmod2(&self) -> FMOD2_R[src]
Bit 2 - Filter mode
pub fn fmod1(&self) -> FMOD1_R[src]
Bit 1 - Filter mode
pub fn fmod0(&self) -> FMOD0_R[src]
Bit 0 - Filter mode
impl R<u32, Reg<u32, _FSCFG>>[src]
pub fn fs0(&self) -> FS0_R[src]
Bit 0 - Filter scale
pub fn fs1(&self) -> FS1_R[src]
Bit 1 - Filter scale
pub fn fs2(&self) -> FS2_R[src]
Bit 2 - Filter scale
pub fn fs3(&self) -> FS3_R[src]
Bit 3 - Filter scale
pub fn fs4(&self) -> FS4_R[src]
Bit 4 - Filter scale
pub fn fs5(&self) -> FS5_R[src]
Bit 5 - Filter scale
pub fn fs6(&self) -> FS6_R[src]
Bit 6 - Filter scale
pub fn fs7(&self) -> FS7_R[src]
Bit 7 - Filter scale
pub fn fs8(&self) -> FS8_R[src]
Bit 8 - Filter scale
pub fn fs9(&self) -> FS9_R[src]
Bit 9 - Filter scale
pub fn fs10(&self) -> FS10_R[src]
Bit 10 - Filter scale
pub fn fs11(&self) -> FS11_R[src]
Bit 11 - Filter scale
pub fn fs12(&self) -> FS12_R[src]
Bit 12 - Filter scale
pub fn fs13(&self) -> FS13_R[src]
Bit 13 - Filter scale
pub fn fs14(&self) -> FS14_R[src]
Bit 14 - Filter scale
pub fn fs15(&self) -> FS15_R[src]
Bit 15 - Filter scale
pub fn fs16(&self) -> FS16_R[src]
Bit 16 - Filter scale
pub fn fs17(&self) -> FS17_R[src]
Bit 17 - Filter scale
pub fn fs18(&self) -> FS18_R[src]
Bit 18 - Filter scale
pub fn fs19(&self) -> FS19_R[src]
Bit 19 - Filter scale
pub fn fs20(&self) -> FS20_R[src]
Bit 20 - Filter scale
pub fn fs21(&self) -> FS21_R[src]
Bit 21 - Filter scale
pub fn fs22(&self) -> FS22_R[src]
Bit 22 - Filter scale
pub fn fs23(&self) -> FS23_R[src]
Bit 23 - Filter scale
pub fn fs24(&self) -> FS24_R[src]
Bit 24 - Filter scale
pub fn fs25(&self) -> FS25_R[src]
Bit 25 - Filter scale
pub fn fs26(&self) -> FS26_R[src]
Bit 26 - Filter scale
pub fn fs27(&self) -> FS27_R[src]
Bit 27 - Filter scale
impl R<u32, Reg<u32, _FAFIFO>>[src]
pub fn faf0(&self) -> FAF0_R[src]
Bit 0 - Filter 0 associated FIFO
pub fn faf1(&self) -> FAF1_R[src]
Bit 1 - Filter 1 associated FIFO
pub fn faf2(&self) -> FAF2_R[src]
Bit 2 - Filter 2 associated FIFO
pub fn faf3(&self) -> FAF3_R[src]
Bit 3 - Filter 3 associated FIFO
pub fn faf4(&self) -> FAF4_R[src]
Bit 4 - Filter 4 associated FIFO
pub fn faf5(&self) -> FAF5_R[src]
Bit 5 - Filter 5 associated FIFO
pub fn faf6(&self) -> FAF6_R[src]
Bit 6 - Filter 6 associated FIFO
pub fn faf7(&self) -> FAF7_R[src]
Bit 7 - Filter 7 associated FIFO
pub fn faf8(&self) -> FAF8_R[src]
Bit 8 - Filter 8 associated FIFO
pub fn faf9(&self) -> FAF9_R[src]
Bit 9 - Filter 9 associated FIFO
pub fn faf10(&self) -> FAF10_R[src]
Bit 10 - Filter 10 associated FIFO
pub fn faf11(&self) -> FAF11_R[src]
Bit 11 - Filter 11 associated FIFO
pub fn faf12(&self) -> FAF12_R[src]
Bit 12 - Filter 12 associated FIFO
pub fn faf13(&self) -> FAF13_R[src]
Bit 13 - Filter 13 associated FIFO
pub fn faf14(&self) -> FAF14_R[src]
Bit 14 - Filter 14 associated FIFO
pub fn faf15(&self) -> FAF15_R[src]
Bit 15 - Filter 15 associated FIFO
pub fn faf16(&self) -> FAF16_R[src]
Bit 16 - Filter 16 associated FIFO
pub fn faf17(&self) -> FAF17_R[src]
Bit 17 - Filter 17 associated FIFO
pub fn faf18(&self) -> FAF18_R[src]
Bit 18 - Filter 18 associated FIFO
pub fn faf19(&self) -> FAF19_R[src]
Bit 19 - Filter 19 associated FIFO
pub fn faf20(&self) -> FAF20_R[src]
Bit 20 - Filter 20 associated FIFO
pub fn faf21(&self) -> FAF21_R[src]
Bit 21 - Filter 21 associated FIFO
pub fn faf22(&self) -> FAF22_R[src]
Bit 22 - Filter 22 associated FIFO
pub fn faf23(&self) -> FAF23_R[src]
Bit 23 - Filter 23 associated FIFO
pub fn faf24(&self) -> FAF24_R[src]
Bit 24 - Filter 24 associated FIFO
pub fn faf25(&self) -> FAF25_R[src]
Bit 25 - Filter 25 associated FIFO
pub fn faf26(&self) -> FAF26_R[src]
Bit 26 - Filter 26 associated FIFO
pub fn faf27(&self) -> FAF27_R[src]
Bit 27 - Filter 27 associated FIFO
impl R<u32, Reg<u32, _FW>>[src]
pub fn fw0(&self) -> FW0_R[src]
Bit 0 - Filter working
pub fn fw1(&self) -> FW1_R[src]
Bit 1 - Filter working
pub fn fw2(&self) -> FW2_R[src]
Bit 2 - Filter working
pub fn fw3(&self) -> FW3_R[src]
Bit 3 - Filter working
pub fn fw4(&self) -> FW4_R[src]
Bit 4 - Filter working
pub fn fw5(&self) -> FW5_R[src]
Bit 5 - Filter working
pub fn fw6(&self) -> FW6_R[src]
Bit 6 - Filter working
pub fn fw7(&self) -> FW7_R[src]
Bit 7 - Filter working
pub fn fw8(&self) -> FW8_R[src]
Bit 8 - Filter working
pub fn fw9(&self) -> FW9_R[src]
Bit 9 - Filter working
pub fn fw10(&self) -> FW10_R[src]
Bit 10 - Filter working
pub fn fw11(&self) -> FW11_R[src]
Bit 11 - Filter working
pub fn fw12(&self) -> FW12_R[src]
Bit 12 - Filter working
pub fn fw13(&self) -> FW13_R[src]
Bit 13 - Filter working
pub fn fw14(&self) -> FW14_R[src]
Bit 14 - Filter working
pub fn fw15(&self) -> FW15_R[src]
Bit 15 - Filter working
pub fn fw16(&self) -> FW16_R[src]
Bit 16 - Filter working
pub fn fw17(&self) -> FW17_R[src]
Bit 17 - Filter working
pub fn fw18(&self) -> FW18_R[src]
Bit 18 - Filter working
pub fn fw19(&self) -> FW19_R[src]
Bit 19 - Filter working
pub fn fw20(&self) -> FW20_R[src]
Bit 20 - Filter working
pub fn fw21(&self) -> FW21_R[src]
Bit 21 - Filter working
pub fn fw22(&self) -> FW22_R[src]
Bit 22 - Filter working
pub fn fw23(&self) -> FW23_R[src]
Bit 23 - Filter working
pub fn fw24(&self) -> FW24_R[src]
Bit 24 - Filter working
pub fn fw25(&self) -> FW25_R[src]
Bit 25 - Filter working
pub fn fw26(&self) -> FW26_R[src]
Bit 26 - Filter working
pub fn fw27(&self) -> FW27_R[src]
Bit 27 - Filter working
impl R<u32, Reg<u32, _F0DATA0>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F0DATA1>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F1DATA0>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F1DATA1>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F2DATA0>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F2DATA1>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F3DATA0>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F3DATA1>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F4DATA0>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F4DATA1>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F5DATA0>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F5DATA1>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F6DATA0>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F6DATA1>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F7DATA0>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F7DATA1>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F8DATA0>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F8DATA1>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F9DATA0>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F9DATA1>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F10DATA0>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F10DATA1>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F11DATA0>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F11DATA1>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F12DATA0>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F12DATA1>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F13DATA0>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F13DATA1>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F14DATA0>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F14DATA1>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F15DATA0>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F15DATA1>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F16DATA0>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F16DATA1>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F17DATA0>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F17DATA1>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F18DATA0>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F18DATA1>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F19DATA0>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F19DATA1>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F20DATA0>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F20DATA1>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F21DATA0>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F21DATA1>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F22DATA0>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F22DATA1>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F23DATA0>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F23DATA1>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F24DATA0>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F24DATA1>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F25DATA0>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F25DATA1>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F26DATA0>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F26DATA1>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F27DATA0>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F27DATA1>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _PHYCTL>>[src]
pub fn pomod(&self) -> POMOD_R[src]
Bits 8:9 - CAN PHY output driver control
pub fn phyen(&self) -> PHYEN_R[src]
Bit 0 - PHY enable bit
impl R<u32, Reg<u32, _CTL>>[src]
pub fn endom(&self) -> ENDOM_R[src]
Bit 2 - ENDOM bit value in the next frame in TX mode
pub fn som(&self) -> SOM_R[src]
Bit 1 - Start of sending a message
pub fn cecen(&self) -> CECEN_R[src]
Bit 0 - Enable/disable HDMI-CEC controller
impl R<u32, Reg<u32, _CFG>>[src]
pub fn sft(&self) -> SFT_R[src]
Bits 0:2 - Signal Free Time
pub fn rtol(&self) -> RTOL_R[src]
Bit 3 - Reception bit timing tolerance
pub fn rbrestp(&self) -> RBRESTP_R[src]
Bit 4 - Whether stop receive message when detected RBRE
pub fn rbregen(&self) -> RBREGEN_R[src]
Bit 5 - Generate Error-bit when detected RBRE in singlecast
pub fn rlbpegen(&self) -> RLBPEGEN_R[src]
Bit 6 - Generate Error-bit when detected RLBPE in singlecast
pub fn bcng(&self) -> BCNG_R[src]
Bit 7 - Do not generate Error-bit in broadcast message
pub fn sftopt(&self) -> SFTOPT_R[src]
Bit 8 - The SFT start option
pub fn oadr(&self) -> OADR_R[src]
Bits 16:30 - Own Address
pub fn lmen(&self) -> LMEN_R[src]
Bit 31 - Listen mode enable
impl R<u32, Reg<u32, _RDATA>>[src]
impl R<u32, Reg<u32, _INTF>>[src]
pub fn taerr(&self) -> TAERR_R[src]
Bit 12 - Tx ACK Error flag
pub fn terr(&self) -> TERR_R[src]
Bit 11 - Tx-Error
pub fn tu(&self) -> TU_R[src]
Bit 10 - Tx data buffer underrun
pub fn tend(&self) -> TEND_R[src]
Bit 9 - Transmission successfully end
pub fn tbr(&self) -> TBR_R[src]
Bit 8 - Tx-Byte data request
pub fn lstarb(&self) -> LSTARB_R[src]
Bit 7 - Arbitration lost
pub fn rae(&self) -> RAE_R[src]
Bit 6 - Rx ACK Error
pub fn rlbpe(&self) -> RLBPE_R[src]
Bit 5 - Long Bit Period Error
pub fn rsbpe(&self) -> RSBPE_R[src]
Bit 4 - Short Bit Period Error
pub fn rbre(&self) -> RBRE_R[src]
Bit 3 - Bit Rising Error
pub fn ro(&self) -> RO_R[src]
Bit 2 - RX Overrun
pub fn rend(&self) -> REND_R[src]
Bit 1 - End of Reception
pub fn rbr(&self) -> RBR_R[src]
Bit 0 - Rx-Byte data received
impl R<u32, Reg<u32, _INTEN>>[src]
pub fn taerrie(&self) -> TAERRIE_R[src]
Bit 12 - TAERR Interrupt Enable
pub fn terrie(&self) -> TERRIE_R[src]
Bit 11 - TERR Interrupt Enable
pub fn tuie(&self) -> TUIE_R[src]
Bit 10 - TU Interrupt Enable
pub fn txendie(&self) -> TXENDIE_R[src]
Bit 9 - TEND Interrupt Enable
pub fn tbrie(&self) -> TBRIE_R[src]
Bit 8 - TBR Interrupt Enable
pub fn lstarbie(&self) -> LSTARBIE_R[src]
Bit 7 - ALRLST Interrupt Enable
pub fn raeie(&self) -> RAEIE_R[src]
Bit 6 - RAE Interrupt Enable
pub fn rlbpeie(&self) -> RLBPEIE_R[src]
Bit 5 - RLBPE Interrupt Enable
pub fn rsbpeie(&self) -> RSBPEIE_R[src]
Bit 4 - RSBPE Interrupt Enable
pub fn rbreie(&self) -> RBREIE_R[src]
Bit 3 - RBRE Interrupt Enable
pub fn roie(&self) -> ROIE_R[src]
Bit 2 - RO Interrupt Enable
pub fn rendie(&self) -> RENDIE_R[src]
Bit 1 - REND Interrupt Enable
pub fn rbrie(&self) -> RBRIE_R[src]
Bit 0 - RBR Interrupt Enable
impl R<bool, CMP0EN_A>[src]
pub fn variant(&self) -> CMP0EN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, CMP0SW_A>[src]
pub fn variant(&self) -> CMP0SW_A[src]
Get enumerated values variant
pub fn is_open(&self) -> bool[src]
Checks if the value of the field is OPEN
pub fn is_closed(&self) -> bool[src]
Checks if the value of the field is CLOSED
impl R<u8, CMP0M_A>[src]
pub fn variant(&self) -> CMP0M_A[src]
Get enumerated values variant
pub fn is_high_speed(&self) -> bool[src]
Checks if the value of the field is HIGHSPEED
pub fn is_medium_speed(&self) -> bool[src]
Checks if the value of the field is MEDIUMSPEED
pub fn is_low_speed(&self) -> bool[src]
Checks if the value of the field is LOWSPEED
pub fn is_very_low_speed(&self) -> bool[src]
Checks if the value of the field is VERYLOWSPEED
impl R<u8, CMP0MSEL_A>[src]
pub fn variant(&self) -> Variant<u8, CMP0MSEL_A>[src]
Get enumerated values variant
pub fn is_one_quarter_vref(&self) -> bool[src]
Checks if the value of the field is ONEQUARTERVREF
pub fn is_one_half_vref(&self) -> bool[src]
Checks if the value of the field is ONEHALFVREF
pub fn is_three_quarter_vref(&self) -> bool[src]
Checks if the value of the field is THREEQUARTERVREF
pub fn is_vref(&self) -> bool[src]
Checks if the value of the field is VREF
pub fn is_pa4(&self) -> bool[src]
Checks if the value of the field is PA4
pub fn is_pa5(&self) -> bool[src]
Checks if the value of the field is PA5
pub fn is_pa0(&self) -> bool[src]
Checks if the value of the field is PA0
impl R<u8, CMP0OSEL_A>[src]
pub fn variant(&self) -> CMP0OSEL_A[src]
Get enumerated values variant
pub fn is_no_selection(&self) -> bool[src]
Checks if the value of the field is NOSELECTION
pub fn is_timer0break_input(&self) -> bool[src]
Checks if the value of the field is TIMER0BREAKINPUT
pub fn is_timer0input_capture0(&self) -> bool[src]
Checks if the value of the field is TIMER0INPUTCAPTURE0
pub fn is_timer0ocpreclear_input(&self) -> bool[src]
Checks if the value of the field is TIMER0OCPRECLEARINPUT
pub fn is_timer1input_capture3(&self) -> bool[src]
Checks if the value of the field is TIMER1INPUTCAPTURE3
pub fn is_timer1ocpreclear_input(&self) -> bool[src]
Checks if the value of the field is TIMER1OCPRECLEARINPUT
pub fn is_timer2input_capture0(&self) -> bool[src]
Checks if the value of the field is TIMER2INPUTCAPTURE0
pub fn is_timer2ocpreclear_input(&self) -> bool[src]
Checks if the value of the field is TIMER2OCPRECLEARINPUT
impl R<bool, CMP0PL_A>[src]
pub fn variant(&self) -> CMP0PL_A[src]
Get enumerated values variant
pub fn is_not_inverted(&self) -> bool[src]
Checks if the value of the field is NOTINVERTED
pub fn is_inverted(&self) -> bool[src]
Checks if the value of the field is INVERTED
impl R<u8, CMP0HST_A>[src]
pub fn variant(&self) -> CMP0HST_A[src]
Get enumerated values variant
pub fn is_no_hysteresis(&self) -> bool[src]
Checks if the value of the field is NOHYSTERESIS
pub fn is_low_hysteresis(&self) -> bool[src]
Checks if the value of the field is LOWHYSTERESIS
pub fn is_medium_hysteresis(&self) -> bool[src]
Checks if the value of the field is MEDIUMHYSTERESIS
pub fn is_high_hysteresis(&self) -> bool[src]
Checks if the value of the field is HIGHHYSTERESIS
impl R<bool, CMP0O_A>[src]
pub fn variant(&self) -> CMP0O_A[src]
Get enumerated values variant
pub fn is_low(&self) -> bool[src]
Checks if the value of the field is LOW
pub fn is_high(&self) -> bool[src]
Checks if the value of the field is HIGH
impl R<bool, CMP0LK_A>[src]
pub fn variant(&self) -> CMP0LK_A[src]
Get enumerated values variant
pub fn is_read_write(&self) -> bool[src]
Checks if the value of the field is READWRITE
pub fn is_read_only(&self) -> bool[src]
Checks if the value of the field is READONLY
impl R<bool, WNDEN_A>[src]
pub fn variant(&self) -> WNDEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CS>>[src]
pub fn cmp0en(&self) -> CMP0EN_R[src]
Bit 0 - CMP0 enable
pub fn cmp0sw(&self) -> CMP0SW_R[src]
Bit 1 - CMP0 switch
pub fn cmp0m(&self) -> CMP0M_R[src]
Bits 2:3 - CMP0 mode
pub fn cmp0msel(&self) -> CMP0MSEL_R[src]
Bits 4:6 - CMP0_M input selection
pub fn cmp0osel(&self) -> CMP0OSEL_R[src]
Bits 8:10 - Comparator 0 output selection
pub fn cmp0pl(&self) -> CMP0PL_R[src]
Bit 11 - Polarity of CMP0 output
pub fn cmp0hst(&self) -> CMP0HST_R[src]
Bits 12:13 - CMP0 hysteresis
pub fn cmp0o(&self) -> CMP0O_R[src]
Bit 14 - CMP0 output
pub fn cmp0lk(&self) -> CMP0LK_R[src]
Bit 15 - CMP0 lock
pub fn cmp1en(&self) -> CMP1EN_R[src]
Bit 16 - CMP1 enable
pub fn cmp1m(&self) -> CMP1M_R[src]
Bits 18:19 - CMP1 mode
pub fn cmp1msel(&self) -> CMP1MSEL_R[src]
Bits 20:22 - CMP1_M input selection
pub fn wnden(&self) -> WNDEN_R[src]
Bit 23 - Window mode enable
pub fn cmp1osel(&self) -> CMP1OSEL_R[src]
Bits 24:26 - CMP1 output selection
pub fn cmp1pl(&self) -> CMP1PL_R[src]
Bit 27 - Polarity of CMP1 output
pub fn cmp1hst(&self) -> CMP1HST_R[src]
Bits 28:29 - CMP1 hysteresis
pub fn cmp1o(&self) -> CMP1O_R[src]
Bit 30 - CMP1 output
pub fn cmp1lk(&self) -> CMP1LK_R[src]
Bit 31 - CMP1 lock
impl R<u32, Reg<u32, _DATA>>[src]
impl R<u32, Reg<u32, _FDATA>>[src]
impl R<bool, RST_A>[src]
pub fn variant(&self) -> Variant<bool, RST_A>[src]
Get enumerated values variant
pub fn is_reset(&self) -> bool[src]
Checks if the value of the field is RESET
impl R<u8, REV_I_A>[src]
pub fn variant(&self) -> REV_I_A[src]
Get enumerated values variant
pub fn is_normal(&self) -> bool[src]
Checks if the value of the field is NORMAL
pub fn is_byte(&self) -> bool[src]
Checks if the value of the field is BYTE
pub fn is_half_word(&self) -> bool[src]
Checks if the value of the field is HALFWORD
pub fn is_word(&self) -> bool[src]
Checks if the value of the field is WORD
impl R<bool, REV_O_A>[src]
pub fn variant(&self) -> REV_O_A[src]
Get enumerated values variant
pub fn is_normal(&self) -> bool[src]
Checks if the value of the field is NORMAL
pub fn is_reversed(&self) -> bool[src]
Checks if the value of the field is REVERSED
impl R<u32, Reg<u32, _CTL>>[src]
pub fn rst(&self) -> RST_R[src]
Bit 0 - reset bit
pub fn rev_i(&self) -> REV_I_R[src]
Bits 5:6 - Input Data Reverse Function
pub fn rev_o(&self) -> REV_O_R[src]
Bit 7 - Output Data Reverse Function
impl R<u32, Reg<u32, _IDATA>>[src]
impl R<u32, Reg<u32, _CTL>>[src]
pub fn den0(&self) -> DEN0_R[src]
Bit 0 - DAC0 enable
pub fn dboff0(&self) -> DBOFF0_R[src]
Bit 1 - DAC0 output buffer turn off
pub fn dten0(&self) -> DTEN0_R[src]
Bit 2 - DAC0 trigger enable
pub fn dtsel0(&self) -> DTSEL0_R[src]
Bits 3:5 - DAC0 trigger selection
pub fn ddmaen0(&self) -> DDMAEN0_R[src]
Bit 12 - DAC0 DMA enable
pub fn ddudrie0(&self) -> DDUDRIE0_R[src]
Bit 13 - DAC0 DMA Underrun Interrupt enable
pub fn den1(&self) -> DEN1_R[src]
Bit 16 - DAC1 enable
pub fn dboff1(&self) -> DBOFF1_R[src]
Bit 17 - DAC1 output buffer turn off
pub fn dten1(&self) -> DTEN1_R[src]
Bit 18 - DAC1 trigger enable
pub fn dtsel1(&self) -> DTSEL1_R[src]
Bits 19:21 - DAC1 trigger selection
pub fn ddmaen1(&self) -> DDMAEN1_R[src]
Bit 28 - DAC1 DMA enable
pub fn ddudrie1(&self) -> DDUDRIE1_R[src]
Bit 29 - DAC1 DMA Underrun Interrupt enable
impl R<u32, Reg<u32, _DAC0_R12DH>>[src]
impl R<u32, Reg<u32, _DAC0_L12DH>>[src]
impl R<u32, Reg<u32, _DAC0_R8DH>>[src]
impl R<u32, Reg<u32, _DAC1_R12DH>>[src]
impl R<u32, Reg<u32, _DAC1_L12DH>>[src]
impl R<u32, Reg<u32, _DAC1_R8DH>>[src]
impl R<u32, Reg<u32, _DACC_R12DH>>[src]
pub fn dac0_dh(&self) -> DAC0_DH_R[src]
Bits 0:11 - DAC0 12-bit right-aligned data
pub fn dac1_dh(&self) -> DAC1_DH_R[src]
Bits 16:27 - DAC1 12-bit right-aligned data
impl R<u32, Reg<u32, _DACC_L12DH>>[src]
pub fn dac0_dh(&self) -> DAC0_DH_R[src]
Bits 4:15 - DAC0 12-bit left-aligned data
pub fn dac1_dh(&self) -> DAC1_DH_R[src]
Bits 20:31 - DAC1 12-bit left-aligned data
impl R<u32, Reg<u32, _DACC_R8DH>>[src]
pub fn dac0_dh(&self) -> DAC0_DH_R[src]
Bits 0:7 - DAC0 8-bit right-aligned data
pub fn dac1_dh(&self) -> DAC1_DH_R[src]
Bits 8:15 - DAC1 8-bit right-aligned data
impl R<u32, Reg<u32, _DAC0_DO>>[src]
impl R<u32, Reg<u32, _DAC1_DO>>[src]
impl R<u32, Reg<u32, _STAT>>[src]
pub fn ddudr0(&self) -> DDUDR0_R[src]
Bit 13 - DAC0 DMA underrun flag
pub fn ddudr1(&self) -> DDUDR1_R[src]
Bit 29 - DAC1 DMA underrun flag
impl R<u32, Reg<u32, _ID>>[src]
impl R<bool, SLP_HOLD_A>[src]
pub fn variant(&self) -> SLP_HOLD_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, DSLP_HOLD_A>[src]
pub fn variant(&self) -> DSLP_HOLD_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, STB_HOLD_A>[src]
pub fn variant(&self) -> STB_HOLD_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, FWDGT_HOLD_A>[src]
pub fn variant(&self) -> FWDGT_HOLD_A[src]
Get enumerated values variant
pub fn is_continue_(&self) -> bool[src]
Checks if the value of the field is CONTINUE
pub fn is_stop(&self) -> bool[src]
Checks if the value of the field is STOP
impl R<bool, TIMER0_HOLD_A>[src]
pub fn variant(&self) -> TIMER0_HOLD_A[src]
Get enumerated values variant
pub fn is_continue_(&self) -> bool[src]
Checks if the value of the field is CONTINUE
pub fn is_stop(&self) -> bool[src]
Checks if the value of the field is STOP
impl R<bool, I2C0_HOLD_A>[src]
pub fn variant(&self) -> I2C0_HOLD_A[src]
Get enumerated values variant
pub fn is_continue_(&self) -> bool[src]
Checks if the value of the field is CONTINUE
pub fn is_stop(&self) -> bool[src]
Checks if the value of the field is STOP
impl R<u32, Reg<u32, _CTL0>>[src]
pub fn slp_hold(&self) -> SLP_HOLD_R[src]
Bit 0 - Sleep mode hold register
pub fn dslp_hold(&self) -> DSLP_HOLD_R[src]
Bit 1 - Deep-sleep mode hold register
pub fn stb_hold(&self) -> STB_HOLD_R[src]
Bit 2 - Standby mode hold register
pub fn fwdgt_hold(&self) -> FWDGT_HOLD_R[src]
Bit 8 - FWDGT hold register
pub fn wwdgt_hold(&self) -> WWDGT_HOLD_R[src]
Bit 9 - WWDGT hold register
pub fn timer0_hold(&self) -> TIMER0_HOLD_R[src]
Bit 10 - Timer 0 hold register
pub fn timer1_hold(&self) -> TIMER1_HOLD_R[src]
Bit 11 - Timer 1 hold register
pub fn timer2_hold(&self) -> TIMER2_HOLD_R[src]
Bit 12 - Timer 2 hold register
pub fn can0_hold(&self) -> CAN0_HOLD_R[src]
Bit 14 - CAN 0 hold register
pub fn i2c0_hold(&self) -> I2C0_HOLD_R[src]
Bit 15 - I2C0 hold register
pub fn i2c1_hold(&self) -> I2C1_HOLD_R[src]
Bit 16 - I2C1 hold register
pub fn i2c2_hold(&self) -> I2C2_HOLD_R[src]
Bit 17 - I2C2 hold register
pub fn timer5_hold(&self) -> TIMER5_HOLD_R[src]
Bit 19 - Timer 5 hold register
pub fn can1_hold(&self) -> CAN1_HOLD_R[src]
Bit 21 - CAN1 hold register
pub fn timer13_hold(&self) -> TIMER13_HOLD_R[src]
Bit 27 - Timer 13 hold register
impl R<bool, RTC_HOLD_A>[src]
pub fn variant(&self) -> RTC_HOLD_A[src]
Get enumerated values variant
pub fn is_continue_(&self) -> bool[src]
Checks if the value of the field is CONTINUE
pub fn is_stop(&self) -> bool[src]
Checks if the value of the field is STOP
impl R<bool, TIMER14_HOLD_A>[src]
pub fn variant(&self) -> TIMER14_HOLD_A[src]
Get enumerated values variant
pub fn is_continue_(&self) -> bool[src]
Checks if the value of the field is CONTINUE
pub fn is_stop(&self) -> bool[src]
Checks if the value of the field is STOP
impl R<u32, Reg<u32, _CTL1>>[src]
pub fn rtc_hold(&self) -> RTC_HOLD_R[src]
Bit 10 - RTC hold register
pub fn timer14_hold(&self) -> TIMER14_HOLD_R[src]
Bit 16 - Timer 14 hold register
pub fn timer15_hold(&self) -> TIMER15_HOLD_R[src]
Bit 17 - Timer 15 hold register
pub fn timer16_hold(&self) -> TIMER16_HOLD_R[src]
Bit 18 - Timer 16 hold register
impl R<bool, GIF0_A>[src]
pub fn variant(&self) -> GIF0_A[src]
Get enumerated values variant
pub fn is_no_event(&self) -> bool[src]
Checks if the value of the field is NOEVENT
pub fn is_event(&self) -> bool[src]
Checks if the value of the field is EVENT
impl R<bool, FTFIF0_A>[src]
pub fn variant(&self) -> FTFIF0_A[src]
Get enumerated values variant
pub fn is_not_complete(&self) -> bool[src]
Checks if the value of the field is NOTCOMPLETE
pub fn is_complete(&self) -> bool[src]
Checks if the value of the field is COMPLETE
impl R<bool, HTFIF0_A>[src]
pub fn variant(&self) -> HTFIF0_A[src]
Get enumerated values variant
pub fn is_not_half(&self) -> bool[src]
Checks if the value of the field is NOTHALF
pub fn is_half(&self) -> bool[src]
Checks if the value of the field is HALF
impl R<bool, TAEIF0_A>[src]
pub fn variant(&self) -> TAEIF0_A[src]
Get enumerated values variant
pub fn is_no_error(&self) -> bool[src]
Checks if the value of the field is NOERROR
pub fn is_error(&self) -> bool[src]
Checks if the value of the field is ERROR
impl R<u32, Reg<u32, _INTF>>[src]
pub fn gif0(&self) -> GIF0_R[src]
Bit 0 - Global interrupt flag of channel 0
pub fn ftfif0(&self) -> FTFIF0_R[src]
Bit 1 - Full transfer finish flag of channel 0
pub fn htfif0(&self) -> HTFIF0_R[src]
Bit 2 - Half transfer finish flag of channel 0
pub fn taeif0(&self) -> TAEIF0_R[src]
Bit 3 - Transfer access error flag of channel 0
pub fn gif1(&self) -> GIF1_R[src]
Bit 4 - Global interrupt flag of channel 1
pub fn ftfif1(&self) -> FTFIF1_R[src]
Bit 5 - Full transfer finish flag of channel 1
pub fn htfif1(&self) -> HTFIF1_R[src]
Bit 6 - Half transfer finish flag of channel 1
pub fn taeif1(&self) -> TAEIF1_R[src]
Bit 7 - Transfer access error flag of channel 1
pub fn gif2(&self) -> GIF2_R[src]
Bit 8 - Global interrupt flag of channel 2
pub fn ftfif2(&self) -> FTFIF2_R[src]
Bit 9 - Full transfer finish flag of channel 2
pub fn htfif2(&self) -> HTFIF2_R[src]
Bit 10 - Half transfer finish flag of channel 2
pub fn taeif2(&self) -> TAEIF2_R[src]
Bit 11 - Transfer access error flag of channel 2
pub fn gif3(&self) -> GIF3_R[src]
Bit 12 - Global interrupt flag of channel 3
pub fn ftfif3(&self) -> FTFIF3_R[src]
Bit 13 - Full transfer finish flag of channel 3
pub fn htfif3(&self) -> HTFIF3_R[src]
Bit 14 - Half transfer finish flag of channel 3
pub fn taeif3(&self) -> TAEIF3_R[src]
Bit 15 - Transfer access error flag of channel 3
pub fn gif4(&self) -> GIF4_R[src]
Bit 16 - Global interrupt flag of channel 4
pub fn ftfif4(&self) -> FTFIF4_R[src]
Bit 17 - Full transfer finish flag of channel 4
pub fn htfif4(&self) -> HTFIF4_R[src]
Bit 18 - Half transfer finish flag of channel 4
pub fn taeif4(&self) -> TAEIF4_R[src]
Bit 19 - Transfer access error flag of channel 4
pub fn gif5(&self) -> GIF5_R[src]
Bit 20 - Global interrupt flag of channel 5
pub fn ftfif5(&self) -> FTFIF5_R[src]
Bit 21 - Full transfer finish flag of channel 5
pub fn htfif5(&self) -> HTFIF5_R[src]
Bit 22 - Half transfer finish flag of channel 5
pub fn taeif5(&self) -> TAEIF5_R[src]
Bit 23 - Transfer access error flag of channel 5
pub fn gif6(&self) -> GIF6_R[src]
Bit 24 - Global interrupt flag of channel 6
pub fn ftfif6(&self) -> FTFIF6_R[src]
Bit 25 - Full transfer finish flag of channel 6
pub fn htfif6(&self) -> HTFIF6_R[src]
Bit 26 - Half transfer finish flag of channel 6
pub fn taeif6(&self) -> TAEIF6_R[src]
Bit 27 - Transfer access error flag of channel 6
impl R<bool, CHEN_A>[src]
pub fn variant(&self) -> CHEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, FTFIE_A>[src]
pub fn variant(&self) -> FTFIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, HTFIE_A>[src]
pub fn variant(&self) -> HTFIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, TAEIE_A>[src]
pub fn variant(&self) -> TAEIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, DIR_A>[src]
pub fn variant(&self) -> DIR_A[src]
Get enumerated values variant
pub fn is_from_peripheral(&self) -> bool[src]
Checks if the value of the field is FROMPERIPHERAL
pub fn is_from_memory(&self) -> bool[src]
Checks if the value of the field is FROMMEMORY
impl R<bool, CMEN_A>[src]
pub fn variant(&self) -> CMEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, PNAGA_A>[src]
pub fn variant(&self) -> PNAGA_A[src]
Get enumerated values variant
pub fn is_fixed(&self) -> bool[src]
Checks if the value of the field is FIXED
pub fn is_increment(&self) -> bool[src]
Checks if the value of the field is INCREMENT
impl R<u8, PWIDTH_A>[src]
pub fn variant(&self) -> Variant<u8, PWIDTH_A>[src]
Get enumerated values variant
pub fn is_bits8(&self) -> bool[src]
Checks if the value of the field is BITS8
pub fn is_bits16(&self) -> bool[src]
Checks if the value of the field is BITS16
pub fn is_bits32(&self) -> bool[src]
Checks if the value of the field is BITS32
impl R<u8, PRIO_A>[src]
pub fn variant(&self) -> PRIO_A[src]
Get enumerated values variant
pub fn is_low(&self) -> bool[src]
Checks if the value of the field is LOW
pub fn is_medium(&self) -> bool[src]
Checks if the value of the field is MEDIUM
pub fn is_high(&self) -> bool[src]
Checks if the value of the field is HIGH
pub fn is_very_high(&self) -> bool[src]
Checks if the value of the field is VERYHIGH
impl R<bool, M2M_A>[src]
pub fn variant(&self) -> M2M_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CH0CTL0>>[src]
pub fn chen(&self) -> CHEN_R[src]
Bit 0 - Channel enable
pub fn ftfie(&self) -> FTFIE_R[src]
Bit 1 - Enable bit for full transfer finish interrupt
pub fn htfie(&self) -> HTFIE_R[src]
Bit 2 - Enable bit for half transfer finish interrupt
pub fn taeie(&self) -> TAEIE_R[src]
Bit 3 - Enable bit for tranfer access error interrupt
pub fn dir(&self) -> DIR_R[src]
Bit 4 - Transfer mode
pub fn cmen(&self) -> CMEN_R[src]
Bit 5 - Circular mode enable
pub fn pnaga(&self) -> PNAGA_R[src]
Bit 6 - Next address generation algorithm of peripheral
pub fn mnaga(&self) -> MNAGA_R[src]
Bit 7 - Next address generation algorithm of memory
pub fn pwidth(&self) -> PWIDTH_R[src]
Bits 8:9 - Transfer data size of peripheral
pub fn mwidth(&self) -> MWIDTH_R[src]
Bits 10:11 - Transfer data size of memory
pub fn prio(&self) -> PRIO_R[src]
Bits 12:13 - Priority Level of this channel
pub fn m2m(&self) -> M2M_R[src]
Bit 14 - Memory to memory mode
impl R<u32, Reg<u32, _CH0CNT>>[src]
impl R<u32, Reg<u32, _CH0PADDR>>[src]
impl R<u32, Reg<u32, _CH0MADDR>>[src]
impl R<bool, CHEN_A>[src]
pub fn variant(&self) -> CHEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, FTFIE_A>[src]
pub fn variant(&self) -> FTFIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, HTFIE_A>[src]
pub fn variant(&self) -> HTFIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, TAEIE_A>[src]
pub fn variant(&self) -> TAEIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, DIR_A>[src]
pub fn variant(&self) -> DIR_A[src]
Get enumerated values variant
pub fn is_from_peripheral(&self) -> bool[src]
Checks if the value of the field is FROMPERIPHERAL
pub fn is_from_memory(&self) -> bool[src]
Checks if the value of the field is FROMMEMORY
impl R<bool, CMEN_A>[src]
pub fn variant(&self) -> CMEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, PNAGA_A>[src]
pub fn variant(&self) -> PNAGA_A[src]
Get enumerated values variant
pub fn is_fixed(&self) -> bool[src]
Checks if the value of the field is FIXED
pub fn is_increment(&self) -> bool[src]
Checks if the value of the field is INCREMENT
impl R<u8, PWIDTH_A>[src]
pub fn variant(&self) -> Variant<u8, PWIDTH_A>[src]
Get enumerated values variant
pub fn is_bits8(&self) -> bool[src]
Checks if the value of the field is BITS8
pub fn is_bits16(&self) -> bool[src]
Checks if the value of the field is BITS16
pub fn is_bits32(&self) -> bool[src]
Checks if the value of the field is BITS32
impl R<u8, PRIO_A>[src]
pub fn variant(&self) -> PRIO_A[src]
Get enumerated values variant
pub fn is_low(&self) -> bool[src]
Checks if the value of the field is LOW
pub fn is_medium(&self) -> bool[src]
Checks if the value of the field is MEDIUM
pub fn is_high(&self) -> bool[src]
Checks if the value of the field is HIGH
pub fn is_very_high(&self) -> bool[src]
Checks if the value of the field is VERYHIGH
impl R<bool, M2M_A>[src]
pub fn variant(&self) -> M2M_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CH1CTL0>>[src]
pub fn chen(&self) -> CHEN_R[src]
Bit 0 - Channel enable
pub fn ftfie(&self) -> FTFIE_R[src]
Bit 1 - Enable bit for full transfer finish interrupt
pub fn htfie(&self) -> HTFIE_R[src]
Bit 2 - Enable bit for half transfer finish interrupt
pub fn taeie(&self) -> TAEIE_R[src]
Bit 3 - Enable bit for tranfer access error interrupt
pub fn dir(&self) -> DIR_R[src]
Bit 4 - Transfer mode
pub fn cmen(&self) -> CMEN_R[src]
Bit 5 - Circular mode enable
pub fn pnaga(&self) -> PNAGA_R[src]
Bit 6 - Next address generation algorithm of peripheral
pub fn mnaga(&self) -> MNAGA_R[src]
Bit 7 - Next address generation algorithm of memory
pub fn pwidth(&self) -> PWIDTH_R[src]
Bits 8:9 - Transfer data size of peripheral
pub fn mwidth(&self) -> MWIDTH_R[src]
Bits 10:11 - Transfer data size of memory
pub fn prio(&self) -> PRIO_R[src]
Bits 12:13 - Priority Level of this channel
pub fn m2m(&self) -> M2M_R[src]
Bit 14 - Memory to memory mode
impl R<u32, Reg<u32, _CH1CNT>>[src]
impl R<u32, Reg<u32, _CH1PADDR>>[src]
impl R<u32, Reg<u32, _CH1MADDR>>[src]
impl R<bool, CHEN_A>[src]
pub fn variant(&self) -> CHEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, FTFIE_A>[src]
pub fn variant(&self) -> FTFIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, HTFIE_A>[src]
pub fn variant(&self) -> HTFIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, TAEIE_A>[src]
pub fn variant(&self) -> TAEIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, DIR_A>[src]
pub fn variant(&self) -> DIR_A[src]
Get enumerated values variant
pub fn is_from_peripheral(&self) -> bool[src]
Checks if the value of the field is FROMPERIPHERAL
pub fn is_from_memory(&self) -> bool[src]
Checks if the value of the field is FROMMEMORY
impl R<bool, CMEN_A>[src]
pub fn variant(&self) -> CMEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, PNAGA_A>[src]
pub fn variant(&self) -> PNAGA_A[src]
Get enumerated values variant
pub fn is_fixed(&self) -> bool[src]
Checks if the value of the field is FIXED
pub fn is_increment(&self) -> bool[src]
Checks if the value of the field is INCREMENT
impl R<u8, PWIDTH_A>[src]
pub fn variant(&self) -> Variant<u8, PWIDTH_A>[src]
Get enumerated values variant
pub fn is_bits8(&self) -> bool[src]
Checks if the value of the field is BITS8
pub fn is_bits16(&self) -> bool[src]
Checks if the value of the field is BITS16
pub fn is_bits32(&self) -> bool[src]
Checks if the value of the field is BITS32
impl R<u8, PRIO_A>[src]
pub fn variant(&self) -> PRIO_A[src]
Get enumerated values variant
pub fn is_low(&self) -> bool[src]
Checks if the value of the field is LOW
pub fn is_medium(&self) -> bool[src]
Checks if the value of the field is MEDIUM
pub fn is_high(&self) -> bool[src]
Checks if the value of the field is HIGH
pub fn is_very_high(&self) -> bool[src]
Checks if the value of the field is VERYHIGH
impl R<bool, M2M_A>[src]
pub fn variant(&self) -> M2M_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CH2CTL0>>[src]
pub fn chen(&self) -> CHEN_R[src]
Bit 0 - Channel enable
pub fn ftfie(&self) -> FTFIE_R[src]
Bit 1 - Enable bit for full transfer finish interrupt
pub fn htfie(&self) -> HTFIE_R[src]
Bit 2 - Enable bit for half transfer finish interrupt
pub fn taeie(&self) -> TAEIE_R[src]
Bit 3 - Enable bit for tranfer access error interrupt
pub fn dir(&self) -> DIR_R[src]
Bit 4 - Transfer mode
pub fn cmen(&self) -> CMEN_R[src]
Bit 5 - Circular mode enable
pub fn pnaga(&self) -> PNAGA_R[src]
Bit 6 - Next address generation algorithm of peripheral
pub fn mnaga(&self) -> MNAGA_R[src]
Bit 7 - Next address generation algorithm of memory
pub fn pwidth(&self) -> PWIDTH_R[src]
Bits 8:9 - Transfer data size of peripheral
pub fn mwidth(&self) -> MWIDTH_R[src]
Bits 10:11 - Transfer data size of memory
pub fn prio(&self) -> PRIO_R[src]
Bits 12:13 - Priority Level of this channel
pub fn m2m(&self) -> M2M_R[src]
Bit 14 - Memory to memory mode
impl R<u32, Reg<u32, _CH2CNT>>[src]
impl R<u32, Reg<u32, _CH2PADDR>>[src]
impl R<u32, Reg<u32, _CH2MADDR>>[src]
impl R<bool, CHEN_A>[src]
pub fn variant(&self) -> CHEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, FTFIE_A>[src]
pub fn variant(&self) -> FTFIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, HTFIE_A>[src]
pub fn variant(&self) -> HTFIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, TAEIE_A>[src]
pub fn variant(&self) -> TAEIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, DIR_A>[src]
pub fn variant(&self) -> DIR_A[src]
Get enumerated values variant
pub fn is_from_peripheral(&self) -> bool[src]
Checks if the value of the field is FROMPERIPHERAL
pub fn is_from_memory(&self) -> bool[src]
Checks if the value of the field is FROMMEMORY
impl R<bool, CMEN_A>[src]
pub fn variant(&self) -> CMEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, PNAGA_A>[src]
pub fn variant(&self) -> PNAGA_A[src]
Get enumerated values variant
pub fn is_fixed(&self) -> bool[src]
Checks if the value of the field is FIXED
pub fn is_increment(&self) -> bool[src]
Checks if the value of the field is INCREMENT
impl R<u8, PWIDTH_A>[src]
pub fn variant(&self) -> Variant<u8, PWIDTH_A>[src]
Get enumerated values variant
pub fn is_bits8(&self) -> bool[src]
Checks if the value of the field is BITS8
pub fn is_bits16(&self) -> bool[src]
Checks if the value of the field is BITS16
pub fn is_bits32(&self) -> bool[src]
Checks if the value of the field is BITS32
impl R<u8, PRIO_A>[src]
pub fn variant(&self) -> PRIO_A[src]
Get enumerated values variant
pub fn is_low(&self) -> bool[src]
Checks if the value of the field is LOW
pub fn is_medium(&self) -> bool[src]
Checks if the value of the field is MEDIUM
pub fn is_high(&self) -> bool[src]
Checks if the value of the field is HIGH
pub fn is_very_high(&self) -> bool[src]
Checks if the value of the field is VERYHIGH
impl R<bool, M2M_A>[src]
pub fn variant(&self) -> M2M_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CH3CTL0>>[src]
pub fn chen(&self) -> CHEN_R[src]
Bit 0 - Channel enable
pub fn ftfie(&self) -> FTFIE_R[src]
Bit 1 - Enable bit for full transfer finish interrupt
pub fn htfie(&self) -> HTFIE_R[src]
Bit 2 - Enable bit for half transfer finish interrupt
pub fn taeie(&self) -> TAEIE_R[src]
Bit 3 - Enable bit for tranfer access error interrupt
pub fn dir(&self) -> DIR_R[src]
Bit 4 - Transfer mode
pub fn cmen(&self) -> CMEN_R[src]
Bit 5 - Circular mode enable
pub fn pnaga(&self) -> PNAGA_R[src]
Bit 6 - Next address generation algorithm of peripheral
pub fn mnaga(&self) -> MNAGA_R[src]
Bit 7 - Next address generation algorithm of memory
pub fn pwidth(&self) -> PWIDTH_R[src]
Bits 8:9 - Transfer data size of peripheral
pub fn mwidth(&self) -> MWIDTH_R[src]
Bits 10:11 - Transfer data size of memory
pub fn prio(&self) -> PRIO_R[src]
Bits 12:13 - Priority Level of this channel
pub fn m2m(&self) -> M2M_R[src]
Bit 14 - Memory to memory mode
impl R<u32, Reg<u32, _CH3CNT>>[src]
impl R<u32, Reg<u32, _CH3PADDR>>[src]
impl R<u32, Reg<u32, _CH3MADDR>>[src]
impl R<bool, CHEN_A>[src]
pub fn variant(&self) -> CHEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, FTFIE_A>[src]
pub fn variant(&self) -> FTFIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, HTFIE_A>[src]
pub fn variant(&self) -> HTFIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, TAEIE_A>[src]
pub fn variant(&self) -> TAEIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, DIR_A>[src]
pub fn variant(&self) -> DIR_A[src]
Get enumerated values variant
pub fn is_from_peripheral(&self) -> bool[src]
Checks if the value of the field is FROMPERIPHERAL
pub fn is_from_memory(&self) -> bool[src]
Checks if the value of the field is FROMMEMORY
impl R<bool, CMEN_A>[src]
pub fn variant(&self) -> CMEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, PNAGA_A>[src]
pub fn variant(&self) -> PNAGA_A[src]
Get enumerated values variant
pub fn is_fixed(&self) -> bool[src]
Checks if the value of the field is FIXED
pub fn is_increment(&self) -> bool[src]
Checks if the value of the field is INCREMENT
impl R<u8, PWIDTH_A>[src]
pub fn variant(&self) -> Variant<u8, PWIDTH_A>[src]
Get enumerated values variant
pub fn is_bits8(&self) -> bool[src]
Checks if the value of the field is BITS8
pub fn is_bits16(&self) -> bool[src]
Checks if the value of the field is BITS16
pub fn is_bits32(&self) -> bool[src]
Checks if the value of the field is BITS32
impl R<u8, PRIO_A>[src]
pub fn variant(&self) -> PRIO_A[src]
Get enumerated values variant
pub fn is_low(&self) -> bool[src]
Checks if the value of the field is LOW
pub fn is_medium(&self) -> bool[src]
Checks if the value of the field is MEDIUM
pub fn is_high(&self) -> bool[src]
Checks if the value of the field is HIGH
pub fn is_very_high(&self) -> bool[src]
Checks if the value of the field is VERYHIGH
impl R<bool, M2M_A>[src]
pub fn variant(&self) -> M2M_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CH4CTL0>>[src]
pub fn chen(&self) -> CHEN_R[src]
Bit 0 - Channel enable
pub fn ftfie(&self) -> FTFIE_R[src]
Bit 1 - Enable bit for full transfer finish interrupt
pub fn htfie(&self) -> HTFIE_R[src]
Bit 2 - Enable bit for half transfer finish interrupt
pub fn taeie(&self) -> TAEIE_R[src]
Bit 3 - Enable bit for tranfer access error interrupt
pub fn dir(&self) -> DIR_R[src]
Bit 4 - Transfer mode
pub fn cmen(&self) -> CMEN_R[src]
Bit 5 - Circular mode enable
pub fn pnaga(&self) -> PNAGA_R[src]
Bit 6 - Next address generation algorithm of peripheral
pub fn mnaga(&self) -> MNAGA_R[src]
Bit 7 - Next address generation algorithm of memory
pub fn pwidth(&self) -> PWIDTH_R[src]
Bits 8:9 - Transfer data size of peripheral
pub fn mwidth(&self) -> MWIDTH_R[src]
Bits 10:11 - Transfer data size of memory
pub fn prio(&self) -> PRIO_R[src]
Bits 12:13 - Priority Level of this channel
pub fn m2m(&self) -> M2M_R[src]
Bit 14 - Memory to memory mode
impl R<u32, Reg<u32, _CH4CNT>>[src]
impl R<u32, Reg<u32, _CH4PADDR>>[src]
impl R<u32, Reg<u32, _CH4MADDR>>[src]
impl R<bool, CHEN_A>[src]
pub fn variant(&self) -> CHEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, FTFIE_A>[src]
pub fn variant(&self) -> FTFIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, HTFIE_A>[src]
pub fn variant(&self) -> HTFIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, TAEIE_A>[src]
pub fn variant(&self) -> TAEIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, DIR_A>[src]
pub fn variant(&self) -> DIR_A[src]
Get enumerated values variant
pub fn is_from_peripheral(&self) -> bool[src]
Checks if the value of the field is FROMPERIPHERAL
pub fn is_from_memory(&self) -> bool[src]
Checks if the value of the field is FROMMEMORY
impl R<bool, CMEN_A>[src]
pub fn variant(&self) -> CMEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, PNAGA_A>[src]
pub fn variant(&self) -> PNAGA_A[src]
Get enumerated values variant
pub fn is_fixed(&self) -> bool[src]
Checks if the value of the field is FIXED
pub fn is_increment(&self) -> bool[src]
Checks if the value of the field is INCREMENT
impl R<u8, PWIDTH_A>[src]
pub fn variant(&self) -> Variant<u8, PWIDTH_A>[src]
Get enumerated values variant
pub fn is_bits8(&self) -> bool[src]
Checks if the value of the field is BITS8
pub fn is_bits16(&self) -> bool[src]
Checks if the value of the field is BITS16
pub fn is_bits32(&self) -> bool[src]
Checks if the value of the field is BITS32
impl R<u8, PRIO_A>[src]
pub fn variant(&self) -> PRIO_A[src]
Get enumerated values variant
pub fn is_low(&self) -> bool[src]
Checks if the value of the field is LOW
pub fn is_medium(&self) -> bool[src]
Checks if the value of the field is MEDIUM
pub fn is_high(&self) -> bool[src]
Checks if the value of the field is HIGH
pub fn is_very_high(&self) -> bool[src]
Checks if the value of the field is VERYHIGH
impl R<bool, M2M_A>[src]
pub fn variant(&self) -> M2M_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CH5CTL0>>[src]
pub fn chen(&self) -> CHEN_R[src]
Bit 0 - Channel enable
pub fn ftfie(&self) -> FTFIE_R[src]
Bit 1 - Enable bit for full transfer finish interrupt
pub fn htfie(&self) -> HTFIE_R[src]
Bit 2 - Enable bit for half transfer finish interrupt
pub fn taeie(&self) -> TAEIE_R[src]
Bit 3 - Enable bit for tranfer access error interrupt
pub fn dir(&self) -> DIR_R[src]
Bit 4 - Transfer mode
pub fn cmen(&self) -> CMEN_R[src]
Bit 5 - Circular mode enable
pub fn pnaga(&self) -> PNAGA_R[src]
Bit 6 - Next address generation algorithm of peripheral
pub fn mnaga(&self) -> MNAGA_R[src]
Bit 7 - Next address generation algorithm of memory
pub fn pwidth(&self) -> PWIDTH_R[src]
Bits 8:9 - Transfer data size of peripheral
pub fn mwidth(&self) -> MWIDTH_R[src]
Bits 10:11 - Transfer data size of memory
pub fn prio(&self) -> PRIO_R[src]
Bits 12:13 - Priority Level of this channel
pub fn m2m(&self) -> M2M_R[src]
Bit 14 - Memory to memory mode
impl R<u32, Reg<u32, _CH5CNT>>[src]
impl R<u32, Reg<u32, _CH5PADDR>>[src]
impl R<u32, Reg<u32, _CH5MADDR>>[src]
impl R<bool, CHEN_A>[src]
pub fn variant(&self) -> CHEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, FTFIE_A>[src]
pub fn variant(&self) -> FTFIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, HTFIE_A>[src]
pub fn variant(&self) -> HTFIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, TAEIE_A>[src]
pub fn variant(&self) -> TAEIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, DIR_A>[src]
pub fn variant(&self) -> DIR_A[src]
Get enumerated values variant
pub fn is_from_peripheral(&self) -> bool[src]
Checks if the value of the field is FROMPERIPHERAL
pub fn is_from_memory(&self) -> bool[src]
Checks if the value of the field is FROMMEMORY
impl R<bool, CMEN_A>[src]
pub fn variant(&self) -> CMEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, PNAGA_A>[src]
pub fn variant(&self) -> PNAGA_A[src]
Get enumerated values variant
pub fn is_fixed(&self) -> bool[src]
Checks if the value of the field is FIXED
pub fn is_increment(&self) -> bool[src]
Checks if the value of the field is INCREMENT
impl R<u8, PWIDTH_A>[src]
pub fn variant(&self) -> Variant<u8, PWIDTH_A>[src]
Get enumerated values variant
pub fn is_bits8(&self) -> bool[src]
Checks if the value of the field is BITS8
pub fn is_bits16(&self) -> bool[src]
Checks if the value of the field is BITS16
pub fn is_bits32(&self) -> bool[src]
Checks if the value of the field is BITS32
impl R<u8, PRIO_A>[src]
pub fn variant(&self) -> PRIO_A[src]
Get enumerated values variant
pub fn is_low(&self) -> bool[src]
Checks if the value of the field is LOW
pub fn is_medium(&self) -> bool[src]
Checks if the value of the field is MEDIUM
pub fn is_high(&self) -> bool[src]
Checks if the value of the field is HIGH
pub fn is_very_high(&self) -> bool[src]
Checks if the value of the field is VERYHIGH
impl R<bool, M2M_A>[src]
pub fn variant(&self) -> M2M_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CH6CTL0>>[src]
pub fn chen(&self) -> CHEN_R[src]
Bit 0 - Channel enable
pub fn ftfie(&self) -> FTFIE_R[src]
Bit 1 - Enable bit for full transfer finish interrupt
pub fn htfie(&self) -> HTFIE_R[src]
Bit 2 - Enable bit for full transfer finish interrupt
pub fn taeie(&self) -> TAEIE_R[src]
Bit 3 - Enable bit for tranfer access error interrupt
pub fn dir(&self) -> DIR_R[src]
Bit 4 - Transfer mode
pub fn cmen(&self) -> CMEN_R[src]
Bit 5 - Circular mode enable
pub fn pnaga(&self) -> PNAGA_R[src]
Bit 6 - Next address generation algorithm of peripheral
pub fn mnaga(&self) -> MNAGA_R[src]
Bit 7 - Next address generation algorithm of memory
pub fn pwidth(&self) -> PWIDTH_R[src]
Bits 8:9 - Transfer data size of peripheral
pub fn mwidth(&self) -> MWIDTH_R[src]
Bits 10:11 - Transfer data size of memory
pub fn prio(&self) -> PRIO_R[src]
Bits 12:13 - Priority Level of this channel
pub fn m2m(&self) -> M2M_R[src]
Bit 14 - Memory to memory mode
impl R<u32, Reg<u32, _CH6CNT>>[src]
impl R<u32, Reg<u32, _CH6PADDR>>[src]
impl R<u32, Reg<u32, _CH6MADDR>>[src]
impl R<bool, INTEN0_A>[src]
pub fn variant(&self) -> INTEN0_A[src]
Get enumerated values variant
pub fn is_masked(&self) -> bool[src]
Checks if the value of the field is MASKED
pub fn is_unmasked(&self) -> bool[src]
Checks if the value of the field is UNMASKED
impl R<u32, Reg<u32, _INTEN>>[src]
pub fn inten0(&self) -> INTEN0_R[src]
Bit 0 - Interrupt mask on line 0
pub fn inten1(&self) -> INTEN1_R[src]
Bit 1 - Interrupt mask on line 1
pub fn inten2(&self) -> INTEN2_R[src]
Bit 2 - Interrupt mask on line 2
pub fn inten3(&self) -> INTEN3_R[src]
Bit 3 - Interrupt mask on line 3
pub fn inten4(&self) -> INTEN4_R[src]
Bit 4 - Interrupt mask on line 4
pub fn inten5(&self) -> INTEN5_R[src]
Bit 5 - Interrupt mask on line 5
pub fn inten6(&self) -> INTEN6_R[src]
Bit 6 - Interrupt mask on line 6
pub fn inten7(&self) -> INTEN7_R[src]
Bit 7 - Interrupt mask on line 7
pub fn inten8(&self) -> INTEN8_R[src]
Bit 8 - Interrupt mask on line 8
pub fn inten9(&self) -> INTEN9_R[src]
Bit 9 - Interrupt mask on line 9
pub fn inten10(&self) -> INTEN10_R[src]
Bit 10 - Interrupt mask on line 10
pub fn inten11(&self) -> INTEN11_R[src]
Bit 11 - Interrupt mask on line 11
pub fn inten12(&self) -> INTEN12_R[src]
Bit 12 - Interrupt mask on line 12
pub fn inten13(&self) -> INTEN13_R[src]
Bit 13 - Interrupt mask on line 13
pub fn inten14(&self) -> INTEN14_R[src]
Bit 14 - Interrupt mask on line 14
pub fn inten15(&self) -> INTEN15_R[src]
Bit 15 - Interrupt mask on line 15
pub fn inten16(&self) -> INTEN16_R[src]
Bit 16 - Interrupt mask on line 16
pub fn inten17(&self) -> INTEN17_R[src]
Bit 17 - Interrupt mask on line 17
pub fn inten18(&self) -> INTEN18_R[src]
Bit 18 - Interrupt mask on line 18
pub fn inten19(&self) -> INTEN19_R[src]
Bit 19 - Interrupt mask on line 19
pub fn inten20(&self) -> INTEN20_R[src]
Bit 20 - Interrupt mask on line 20
pub fn inten21(&self) -> INTEN21_R[src]
Bit 21 - Interrupt mask on line 21
pub fn inten22(&self) -> INTEN22_R[src]
Bit 22 - Interrupt mask on line 22
pub fn inten23(&self) -> INTEN23_R[src]
Bit 23 - Interrupt mask on line 23
pub fn inten24(&self) -> INTEN24_R[src]
Bit 24 - Interrupt mask on line 24
pub fn inten25(&self) -> INTEN25_R[src]
Bit 25 - Interrupt mask on line 25
pub fn inten26(&self) -> INTEN26_R[src]
Bit 26 - Interrupt mask on line 26
pub fn inten27(&self) -> INTEN27_R[src]
Bit 27 - Interrupt mask on line 27
impl R<bool, EVEN0_A>[src]
pub fn variant(&self) -> EVEN0_A[src]
Get enumerated values variant
pub fn is_masked(&self) -> bool[src]
Checks if the value of the field is MASKED
pub fn is_unmasked(&self) -> bool[src]
Checks if the value of the field is UNMASKED
impl R<u32, Reg<u32, _EVEN>>[src]
pub fn even0(&self) -> EVEN0_R[src]
Bit 0 - Event enable on line 0
pub fn even1(&self) -> EVEN1_R[src]
Bit 1 - Event enable on line 1
pub fn even2(&self) -> EVEN2_R[src]
Bit 2 - Event enable on line 2
pub fn even3(&self) -> EVEN3_R[src]
Bit 3 - Event enable on line 3
pub fn even4(&self) -> EVEN4_R[src]
Bit 4 - Event enable on line 4
pub fn even5(&self) -> EVEN5_R[src]
Bit 5 - Event enable on line 5
pub fn even6(&self) -> EVEN6_R[src]
Bit 6 - Event enable on line 6
pub fn even7(&self) -> EVEN7_R[src]
Bit 7 - Event enable on line 7
pub fn even8(&self) -> EVEN8_R[src]
Bit 8 - Event enable on line 8
pub fn even9(&self) -> EVEN9_R[src]
Bit 9 - Event enable on line 9
pub fn even10(&self) -> EVEN10_R[src]
Bit 10 - Event enable on line 10
pub fn even11(&self) -> EVEN11_R[src]
Bit 11 - Event enable on line 11
pub fn even12(&self) -> EVEN12_R[src]
Bit 12 - Event enable on line 12
pub fn even13(&self) -> EVEN13_R[src]
Bit 13 - Event enable on line 13
pub fn even14(&self) -> EVEN14_R[src]
Bit 14 - Event enable on line 14
pub fn even15(&self) -> EVEN15_R[src]
Bit 15 - Event enable on line 15
pub fn even16(&self) -> EVEN16_R[src]
Bit 16 - Event enable on line 16
pub fn even17(&self) -> EVEN17_R[src]
Bit 17 - Event enable on line 17
pub fn even18(&self) -> EVEN18_R[src]
Bit 18 - Event enable on line 18
pub fn even19(&self) -> EVEN19_R[src]
Bit 19 - Event enable on line 19
pub fn even20(&self) -> EVEN20_R[src]
Bit 20 - Event enable on line 20
pub fn even21(&self) -> EVEN21_R[src]
Bit 21 - Event enable on line 21
pub fn even22(&self) -> EVEN22_R[src]
Bit 22 - Event enable on line 22
pub fn even23(&self) -> EVEN23_R[src]
Bit 23 - Event enable on line 23
pub fn even24(&self) -> EVEN24_R[src]
Bit 24 - Event enable on line 24
pub fn even25(&self) -> EVEN25_R[src]
Bit 25 - Event enable on line 25
pub fn even26(&self) -> EVEN26_R[src]
Bit 26 - Event enable on line 26
pub fn even27(&self) -> EVEN27_R[src]
Bit 27 - Event enable on line 27
impl R<bool, RTEN0_A>[src]
pub fn variant(&self) -> RTEN0_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _RTEN>>[src]
pub fn rten0(&self) -> RTEN0_R[src]
Bit 0 - Rising edge trigger enable of line 0
pub fn rten1(&self) -> RTEN1_R[src]
Bit 1 - Rising edge trigger enable of line 1
pub fn rten2(&self) -> RTEN2_R[src]
Bit 2 - Rising edge trigger enable of line 2
pub fn rten3(&self) -> RTEN3_R[src]
Bit 3 - Rising edge trigger enable of line 3
pub fn rten4(&self) -> RTEN4_R[src]
Bit 4 - Rising edge trigger enable of line 4
pub fn rten5(&self) -> RTEN5_R[src]
Bit 5 - Rising edge trigger enable of line 5
pub fn rten6(&self) -> RTEN6_R[src]
Bit 6 - Rising edge trigger enable of line 6
pub fn rten7(&self) -> RTEN7_R[src]
Bit 7 - Rising edge trigger enable of line 7
pub fn rten8(&self) -> RTEN8_R[src]
Bit 8 - Rising edge trigger enable of line 8
pub fn rten9(&self) -> RTEN9_R[src]
Bit 9 - Rising edge trigger enable of line 9
pub fn rten10(&self) -> RTEN10_R[src]
Bit 10 - Rising edge trigger enable of line 10
pub fn rten11(&self) -> RTEN11_R[src]
Bit 11 - Rising edge trigger enable of line 11
pub fn rten12(&self) -> RTEN12_R[src]
Bit 12 - Rising edge trigger enable of line 12
pub fn rten13(&self) -> RTEN13_R[src]
Bit 13 - Rising edge trigger enable of line 13
pub fn rten14(&self) -> RTEN14_R[src]
Bit 14 - Rising edge trigger enable of line 14
pub fn rten15(&self) -> RTEN15_R[src]
Bit 15 - Rising edge trigger enable of line 15
pub fn rten16(&self) -> RTEN16_R[src]
Bit 16 - Rising edge trigger enable of line 16
pub fn rten17(&self) -> RTEN17_R[src]
Bit 17 - Rising edge trigger enable of line 17
pub fn rten18(&self) -> RTEN18_R[src]
Bit 18 - Rising edge trigger enable of line 18
pub fn rten19(&self) -> RTEN19_R[src]
Bit 19 - Rising edge trigger enable of line 19
pub fn rten21(&self) -> RTEN21_R[src]
Bit 21 - Rising edge trigger enable of line 21
pub fn rten22(&self) -> RTEN22_R[src]
Bit 22 - Rising edge trigger enable of line 22
impl R<bool, FTEN0_A>[src]
pub fn variant(&self) -> FTEN0_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _FTEN>>[src]
pub fn ften0(&self) -> FTEN0_R[src]
Bit 0 - Falling edge trigger enable of line 0
pub fn ften1(&self) -> FTEN1_R[src]
Bit 1 - Falling edge trigger enable of line 1
pub fn ften2(&self) -> FTEN2_R[src]
Bit 2 - Falling edge trigger enable of line 2
pub fn ften3(&self) -> FTEN3_R[src]
Bit 3 - Falling edge trigger enable of line 3
pub fn ften4(&self) -> FTEN4_R[src]
Bit 4 - Falling edge trigger enable of line 4
pub fn ften5(&self) -> FTEN5_R[src]
Bit 5 - Falling edge trigger enable of line 5
pub fn ften6(&self) -> FTEN6_R[src]
Bit 6 - Falling edge trigger enable of line 6
pub fn ften7(&self) -> FTEN7_R[src]
Bit 7 - Falling edge trigger enable of line 7
pub fn ften8(&self) -> FTEN8_R[src]
Bit 8 - Falling edge trigger enable of line 8
pub fn ften9(&self) -> FTEN9_R[src]
Bit 9 - Falling edge trigger enable of line 9
pub fn ften10(&self) -> FTEN10_R[src]
Bit 10 - Falling edge trigger enable of line 10
pub fn ften11(&self) -> FTEN11_R[src]
Bit 11 - Falling edge trigger enable of line 11
pub fn ften12(&self) -> FTEN12_R[src]
Bit 12 - Falling edge trigger enable of line 12
pub fn ften13(&self) -> FTEN13_R[src]
Bit 13 - Falling edge trigger enable of line 13
pub fn ften14(&self) -> FTEN14_R[src]
Bit 14 - Falling edge trigger enable of line 14
pub fn ften15(&self) -> FTEN15_R[src]
Bit 15 - Falling edge trigger enable of line 15
pub fn ften16(&self) -> FTEN16_R[src]
Bit 16 - Falling edge trigger enable of line 16
pub fn ften17(&self) -> FTEN17_R[src]
Bit 17 - Falling edge trigger enable of line 17
pub fn ften18(&self) -> FTEN18_R[src]
Bit 18 - Falling edge trigger enable of line 18
pub fn ften19(&self) -> FTEN19_R[src]
Bit 19 - Falling edge trigger enable of line 19
pub fn ften21(&self) -> FTEN21_R[src]
Bit 21 - Falling edge trigger enable of line 21
pub fn ften22(&self) -> FTEN22_R[src]
Bit 22 - Falling edge trigger enable of line 22
impl R<bool, SWIEV0_A>[src]
pub fn variant(&self) -> Variant<bool, SWIEV0_A>[src]
Get enumerated values variant
pub fn is_pend(&self) -> bool[src]
Checks if the value of the field is PEND
impl R<u32, Reg<u32, _SWIEV>>[src]
pub fn swiev0(&self) -> SWIEV0_R[src]
Bit 0 - Interrupt/Event software trigger on line 0
pub fn swiev1(&self) -> SWIEV1_R[src]
Bit 1 - Interrupt/Event software trigger on line 1
pub fn swiev2(&self) -> SWIEV2_R[src]
Bit 2 - Interrupt/Event software trigger on line 2
pub fn swiev3(&self) -> SWIEV3_R[src]
Bit 3 - Interrupt/Event software trigger on line 3
pub fn swiev4(&self) -> SWIEV4_R[src]
Bit 4 - Interrupt/Event software trigger on line 4
pub fn swiev5(&self) -> SWIEV5_R[src]
Bit 5 - Interrupt/Event software trigger on line 5
pub fn swiev6(&self) -> SWIEV6_R[src]
Bit 6 - Interrupt/Event software trigger on line 6
pub fn swiev7(&self) -> SWIEV7_R[src]
Bit 7 - Interrupt/Event software trigger on line 7
pub fn swiev8(&self) -> SWIEV8_R[src]
Bit 8 - Interrupt/Event software trigger on line 8
pub fn swiev9(&self) -> SWIEV9_R[src]
Bit 9 - Interrupt/Event software trigger on line 9
pub fn swiev10(&self) -> SWIEV10_R[src]
Bit 10 - Interrupt/Event software trigger on line 10
pub fn swiev11(&self) -> SWIEV11_R[src]
Bit 11 - Interrupt/Event software trigger on line 11
pub fn swiev12(&self) -> SWIEV12_R[src]
Bit 12 - Interrupt/Event software trigger on line 12
pub fn swiev13(&self) -> SWIEV13_R[src]
Bit 13 - Interrupt/Event software trigger on line 13
pub fn swiev14(&self) -> SWIEV14_R[src]
Bit 14 - Interrupt/Event software trigger on line 14
pub fn swiev15(&self) -> SWIEV15_R[src]
Bit 15 - Interrupt/Event software trigger on line 15
pub fn swiev16(&self) -> SWIEV16_R[src]
Bit 16 - Interrupt/Event software trigger on line 16
pub fn swiev17(&self) -> SWIEV17_R[src]
Bit 17 - Interrupt/Event software trigger on line 17
pub fn swiev18(&self) -> SWIEV18_R[src]
Bit 18 - Interrupt/Event software trigger on line 18
pub fn swiev19(&self) -> SWIEV19_R[src]
Bit 19 - Interrupt/Event software trigger on line 19
pub fn swiev21(&self) -> SWIEV21_R[src]
Bit 21 - Interrupt/Event software trigger on line 21
pub fn swiev22(&self) -> SWIEV22_R[src]
Bit 22 - Interrupt/Event software trigger on line 22
impl R<bool, PD0_A>[src]
pub fn variant(&self) -> PD0_A[src]
Get enumerated values variant
pub fn is_not_pending(&self) -> bool[src]
Checks if the value of the field is NOTPENDING
pub fn is_pending(&self) -> bool[src]
Checks if the value of the field is PENDING
impl R<u32, Reg<u32, _PD>>[src]
pub fn pd0(&self) -> PD0_R[src]
Bit 0 - Interrupt pending status of line 0
pub fn pd1(&self) -> PD1_R[src]
Bit 1 - Interrupt pending status of line 1
pub fn pd2(&self) -> PD2_R[src]
Bit 2 - Interrupt pending status of line 2
pub fn pd3(&self) -> PD3_R[src]
Bit 3 - Interrupt pending status of line 3
pub fn pd4(&self) -> PD4_R[src]
Bit 4 - Interrupt pending status of line 4
pub fn pd5(&self) -> PD5_R[src]
Bit 5 - Interrupt pending status of line 5
pub fn pd6(&self) -> PD6_R[src]
Bit 6 - Interrupt pending status of line 6
pub fn pd7(&self) -> PD7_R[src]
Bit 7 - Interrupt pending status of line 7
pub fn pd8(&self) -> PD8_R[src]
Bit 8 - Interrupt pending status of line 8
pub fn pd9(&self) -> PD9_R[src]
Bit 9 - Interrupt pending status of line 9
pub fn pd10(&self) -> PD10_R[src]
Bit 10 - Interrupt pending status of line 10
pub fn pd11(&self) -> PD11_R[src]
Bit 11 - Interrupt pending status of line 11
pub fn pd12(&self) -> PD12_R[src]
Bit 12 - Interrupt pending status of line 12
pub fn pd13(&self) -> PD13_R[src]
Bit 13 - Interrupt pending status of line 13
pub fn pd14(&self) -> PD14_R[src]
Bit 14 - Interrupt pending status of line 14
pub fn pd15(&self) -> PD15_R[src]
Bit 15 - Interrupt pending status of line 15
pub fn pd16(&self) -> PD16_R[src]
Bit 16 - Interrupt pending status of line 16
pub fn pd17(&self) -> PD17_R[src]
Bit 17 - Interrupt pending status of line 17
pub fn pd18(&self) -> PD18_R[src]
Bit 18 - Interrupt pending status of line 18
pub fn pd19(&self) -> PD19_R[src]
Bit 19 - Interrupt pending status of line 19
pub fn pd21(&self) -> PD21_R[src]
Bit 21 - Interrupt pending status of line 21
pub fn pd22(&self) -> PD22_R[src]
Bit 22 - Interrupt pending status of line 22
impl R<u8, WSCNT_A>[src]
pub fn variant(&self) -> Variant<u8, WSCNT_A>[src]
Get enumerated values variant
pub fn is_ws0(&self) -> bool[src]
Checks if the value of the field is WS0
pub fn is_ws1(&self) -> bool[src]
Checks if the value of the field is WS1
pub fn is_ws2(&self) -> bool[src]
Checks if the value of the field is WS2
impl R<u32, Reg<u32, _WS>>[src]
impl R<bool, ENDF_A>[src]
pub fn variant(&self) -> ENDF_A[src]
Get enumerated values variant
pub fn is_no_event(&self) -> bool[src]
Checks if the value of the field is NOEVENT
pub fn is_event(&self) -> bool[src]
Checks if the value of the field is EVENT
impl R<bool, WPERR_A>[src]
pub fn variant(&self) -> WPERR_A[src]
Get enumerated values variant
pub fn is_no_error(&self) -> bool[src]
Checks if the value of the field is NOERROR
pub fn is_error(&self) -> bool[src]
Checks if the value of the field is ERROR
impl R<bool, PGERR_A>[src]
pub fn variant(&self) -> PGERR_A[src]
Get enumerated values variant
pub fn is_no_error(&self) -> bool[src]
Checks if the value of the field is NOERROR
pub fn is_error(&self) -> bool[src]
Checks if the value of the field is ERROR
impl R<bool, BUSY_A>[src]
pub fn variant(&self) -> BUSY_A[src]
Get enumerated values variant
pub fn is_inactive(&self) -> bool[src]
Checks if the value of the field is INACTIVE
pub fn is_active(&self) -> bool[src]
Checks if the value of the field is ACTIVE
impl R<u32, Reg<u32, _STAT>>[src]
pub fn endf(&self) -> ENDF_R[src]
Bit 5 - End of operation flag bit
pub fn wperr(&self) -> WPERR_R[src]
Bit 4 - Erase/Program protection error flag bit
pub fn pgerr(&self) -> PGERR_R[src]
Bit 2 - Program error flag bit
pub fn busy(&self) -> BUSY_R[src]
Bit 0 - The flash busy bit
impl R<bool, OBRLD_A>[src]
pub fn variant(&self) -> Variant<bool, OBRLD_A>[src]
Get enumerated values variant
pub fn is_reload(&self) -> bool[src]
Checks if the value of the field is RELOAD
impl R<bool, ENDIE_A>[src]
pub fn variant(&self) -> ENDIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, ERRIE_A>[src]
pub fn variant(&self) -> ERRIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, OBWEN_A>[src]
pub fn variant(&self) -> OBWEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, LK_A>[src]
pub fn variant(&self) -> LK_A[src]
Get enumerated values variant
pub fn is_unlocked(&self) -> bool[src]
Checks if the value of the field is UNLOCKED
pub fn is_locked(&self) -> bool[src]
Checks if the value of the field is LOCKED
impl R<bool, START_A>[src]
pub fn variant(&self) -> Variant<bool, START_A>[src]
Get enumerated values variant
pub fn is_start(&self) -> bool[src]
Checks if the value of the field is START
impl R<bool, OBER_A>[src]
pub fn variant(&self) -> Variant<bool, OBER_A>[src]
Get enumerated values variant
pub fn is_option_byte_erase(&self) -> bool[src]
Checks if the value of the field is OPTIONBYTEERASE
impl R<bool, OBPG_A>[src]
pub fn variant(&self) -> Variant<bool, OBPG_A>[src]
Get enumerated values variant
pub fn is_option_byte_programming(&self) -> bool[src]
Checks if the value of the field is OPTIONBYTEPROGRAMMING
impl R<bool, MER_A>[src]
pub fn variant(&self) -> Variant<bool, MER_A>[src]
Get enumerated values variant
pub fn is_mass_erase(&self) -> bool[src]
Checks if the value of the field is MASSERASE
impl R<bool, PER_A>[src]
pub fn variant(&self) -> Variant<bool, PER_A>[src]
Get enumerated values variant
pub fn is_page_erase(&self) -> bool[src]
Checks if the value of the field is PAGEERASE
impl R<bool, PG_A>[src]
pub fn variant(&self) -> Variant<bool, PG_A>[src]
Get enumerated values variant
pub fn is_program(&self) -> bool[src]
Checks if the value of the field is PROGRAM
impl R<u32, Reg<u32, _CTL>>[src]
pub fn obrld(&self) -> OBRLD_R[src]
Bit 13 - Option byte reload bit
pub fn endie(&self) -> ENDIE_R[src]
Bit 12 - End of operation interrupt enable
pub fn errie(&self) -> ERRIE_R[src]
Bit 10 - Error interrupt enable
pub fn obwen(&self) -> OBWEN_R[src]
Bit 9 - Option byte erase/program enable bit
pub fn lk(&self) -> LK_R[src]
Bit 7 - FMC_CTL lock bit
pub fn start(&self) -> START_R[src]
Bit 6 - Send erase command to FMC bit
pub fn ober(&self) -> OBER_R[src]
Bit 5 - Option byte erase command bit
pub fn obpg(&self) -> OBPG_R[src]
Bit 4 - Option byte program command bit
pub fn mer(&self) -> MER_R[src]
Bit 2 - Main flash mass erase command bit
pub fn per(&self) -> PER_R[src]
Bit 1 - Main flash page erase command bit
pub fn pg(&self) -> PG_R[src]
Bit 0 - Main flash page program command bit
impl R<u32, Reg<u32, _ADDR>>[src]
impl R<u8, PLEVEL_A>[src]
pub fn variant(&self) -> Variant<u8, PLEVEL_A>[src]
Get enumerated values variant
pub fn is_none(&self) -> bool[src]
Checks if the value of the field is NONE
pub fn is_low(&self) -> bool[src]
Checks if the value of the field is LOW
pub fn is_high(&self) -> bool[src]
Checks if the value of the field is HIGH
impl R<bool, OBERR_A>[src]
pub fn variant(&self) -> OBERR_A[src]
Get enumerated values variant
pub fn is_no_error(&self) -> bool[src]
Checks if the value of the field is NOERROR
pub fn is_error(&self) -> bool[src]
Checks if the value of the field is ERROR
impl R<u32, Reg<u32, _OBSTAT>>[src]
pub fn ob_data(&self) -> OB_DATA_R[src]
Bits 16:31 - Store OB_DATA[15:0] of option byte block after system reset
pub fn ob_user(&self) -> OB_USER_R[src]
Bits 8:15 - Store OB_USER byte of option byte block after system reset
pub fn plevel(&self) -> PLEVEL_R[src]
Bits 1:2 - Security Protection level
pub fn oberr(&self) -> OBERR_R[src]
Bit 0 - Option byte read error
impl R<u32, Reg<u32, _WP>>[src]
pub fn ob_wp(&self) -> OB_WP_R[src]
Bits 0:15 - Store OB_WP[15:0] of option byte block after system reset
impl R<bool, WSEN_A>[src]
pub fn variant(&self) -> WSEN_A[src]
Get enumerated values variant
pub fn is_no_wait_state(&self) -> bool[src]
Checks if the value of the field is NOWAITSTATE
pub fn is_wait_state(&self) -> bool[src]
Checks if the value of the field is WAITSTATE
impl R<u32, Reg<u32, _WSEN>>[src]
pub fn wsen(&self) -> WSEN_R[src]
Bit 0 - FMC wait state enable register
pub fn bpen(&self) -> BPEN_R[src]
Bit 1 - FMC bit program enable register
impl R<u32, Reg<u32, _PID>>[src]
impl R<u8, PSC_A>[src]
pub fn variant(&self) -> PSC_A[src]
Get enumerated values variant
pub fn is_divide_by4(&self) -> bool[src]
Checks if the value of the field is DIVIDEBY4
pub fn is_divide_by8(&self) -> bool[src]
Checks if the value of the field is DIVIDEBY8
pub fn is_divide_by16(&self) -> bool[src]
Checks if the value of the field is DIVIDEBY16
pub fn is_divide_by32(&self) -> bool[src]
Checks if the value of the field is DIVIDEBY32
pub fn is_divide_by64(&self) -> bool[src]
Checks if the value of the field is DIVIDEBY64
pub fn is_divide_by128(&self) -> bool[src]
Checks if the value of the field is DIVIDEBY128
pub fn is_divide_by256(&self) -> bool[src]
Checks if the value of the field is DIVIDEBY256
pub fn is_divide_by256bis(&self) -> bool[src]
Checks if the value of the field is DIVIDEBY256BIS
impl R<u32, Reg<u32, _PSC>>[src]
impl R<u32, Reg<u32, _RLD>>[src]
impl R<bool, PUD_A>[src]
pub fn variant(&self) -> PUD_A[src]
Get enumerated values variant
pub fn is_valid(&self) -> bool[src]
Checks if the value of the field is VALID
pub fn is_ongoing(&self) -> bool[src]
Checks if the value of the field is ONGOING
impl R<bool, RUD_A>[src]
pub fn variant(&self) -> RUD_A[src]
Get enumerated values variant
pub fn is_valid(&self) -> bool[src]
Checks if the value of the field is VALID
pub fn is_ongoing(&self) -> bool[src]
Checks if the value of the field is ONGOING
impl R<bool, WUD_A>[src]
pub fn variant(&self) -> WUD_A[src]
Get enumerated values variant
pub fn is_valid(&self) -> bool[src]
Checks if the value of the field is VALID
pub fn is_ongoing(&self) -> bool[src]
Checks if the value of the field is ONGOING
impl R<u32, Reg<u32, _STAT>>[src]
pub fn pud(&self) -> PUD_R[src]
Bit 0 - Free watchdog timer prescaler value update
pub fn rud(&self) -> RUD_R[src]
Bit 1 - Free watchdog timer counter reload value update
pub fn wud(&self) -> WUD_R[src]
Bit 2 - Watchdog counter window value update
impl R<u32, Reg<u32, _WND>>[src]
impl R<u8, CTL15_A>[src]
pub fn variant(&self) -> CTL15_A[src]
Get enumerated values variant
pub fn is_input(&self) -> bool[src]
Checks if the value of the field is INPUT
pub fn is_output(&self) -> bool[src]
Checks if the value of the field is OUTPUT
pub fn is_alternate(&self) -> bool[src]
Checks if the value of the field is ALTERNATE
pub fn is_analog(&self) -> bool[src]
Checks if the value of the field is ANALOG
impl R<u32, Reg<u32, _CTL>>[src]
pub fn ctl15(&self) -> CTL15_R[src]
Bits 30:31 - Pin 15 configuration bits
pub fn ctl14(&self) -> CTL14_R[src]
Bits 28:29 - Pin 14 configuration bits
pub fn ctl13(&self) -> CTL13_R[src]
Bits 26:27 - Pin 13 configuration bits
pub fn ctl12(&self) -> CTL12_R[src]
Bits 24:25 - Pin 12 configuration bits
pub fn ctl11(&self) -> CTL11_R[src]
Bits 22:23 - Pin 11 configuration bits
pub fn ctl10(&self) -> CTL10_R[src]
Bits 20:21 - Pin 10 configuration bits
pub fn ctl9(&self) -> CTL9_R[src]
Bits 18:19 - Pin 9 configuration bits
pub fn ctl8(&self) -> CTL8_R[src]
Bits 16:17 - Pin 8 configuration bits
pub fn ctl7(&self) -> CTL7_R[src]
Bits 14:15 - Pin 7 configuration bits
pub fn ctl6(&self) -> CTL6_R[src]
Bits 12:13 - Pin 6 configuration bits
pub fn ctl5(&self) -> CTL5_R[src]
Bits 10:11 - Pin 5 configuration bits
pub fn ctl4(&self) -> CTL4_R[src]
Bits 8:9 - Pin 4 configuration bits
pub fn ctl3(&self) -> CTL3_R[src]
Bits 6:7 - Pin 3 configuration bits
pub fn ctl2(&self) -> CTL2_R[src]
Bits 4:5 - Pin 2 configuration bits
pub fn ctl1(&self) -> CTL1_R[src]
Bits 2:3 - Pin 1 configuration bits
pub fn ctl0(&self) -> CTL0_R[src]
Bits 0:1 - Pin 0 configuration bits
impl R<bool, OM15_A>[src]
pub fn variant(&self) -> OM15_A[src]
Get enumerated values variant
pub fn is_push_pull(&self) -> bool[src]
Checks if the value of the field is PUSHPULL
pub fn is_open_drain(&self) -> bool[src]
Checks if the value of the field is OPENDRAIN
impl R<u32, Reg<u32, _OMODE>>[src]
pub fn om15(&self) -> OM15_R[src]
Bit 15 - Pin 15 output mode
pub fn om14(&self) -> OM14_R[src]
Bit 14 - Pin 14 output mode
pub fn om13(&self) -> OM13_R[src]
Bit 13 - Pin 13 output mode
pub fn om12(&self) -> OM12_R[src]
Bit 12 - Pin 12 output mode
pub fn om11(&self) -> OM11_R[src]
Bit 11 - Pin 11 output mode
pub fn om10(&self) -> OM10_R[src]
Bit 10 - Pin 10 output mode
pub fn om9(&self) -> OM9_R[src]
Bit 9 - Pin 9 output mode
pub fn om8(&self) -> OM8_R[src]
Bit 8 - Pin 8 output mode
pub fn om7(&self) -> OM7_R[src]
Bit 7 - Pin 7 output mode
pub fn om6(&self) -> OM6_R[src]
Bit 6 - Pin 6 output mode
pub fn om5(&self) -> OM5_R[src]
Bit 5 - Pin 5 output mode
pub fn om4(&self) -> OM4_R[src]
Bit 4 - Pin 4 output mode
pub fn om3(&self) -> OM3_R[src]
Bit 3 - Pin 3 output mode
pub fn om2(&self) -> OM2_R[src]
Bit 2 - Pin 2 output mode
pub fn om1(&self) -> OM1_R[src]
Bit 1 - Pin 1 output mode
pub fn om0(&self) -> OM0_R[src]
Bit 0 - Pin 0 output mode
impl R<u8, OSPD15_A>[src]
pub fn variant(&self) -> Variant<u8, OSPD15_A>[src]
Get enumerated values variant
pub fn is_speed2m(&self) -> bool[src]
Checks if the value of the field is SPEED2M
pub fn is_speed10m(&self) -> bool[src]
Checks if the value of the field is SPEED10M
pub fn is_speed50m(&self) -> bool[src]
Checks if the value of the field is SPEED50M
impl R<u32, Reg<u32, _OSPD>>[src]
pub fn ospd15(&self) -> OSPD15_R[src]
Bits 30:31 - Pin 15 output max speed bits
pub fn ospd14(&self) -> OSPD14_R[src]
Bits 28:29 - Pin 14 output max speed bits
pub fn ospd13(&self) -> OSPD13_R[src]
Bits 26:27 - Pin 13 output max speed bits
pub fn ospd12(&self) -> OSPD12_R[src]
Bits 24:25 - Pin 12 output max speed bits
pub fn ospd11(&self) -> OSPD11_R[src]
Bits 22:23 - Pin 11 output max speed bits
pub fn ospd10(&self) -> OSPD10_R[src]
Bits 20:21 - Pin 10 output max speed bits
pub fn ospd9(&self) -> OSPD9_R[src]
Bits 18:19 - Pin 9 output max speed bits
pub fn ospd8(&self) -> OSPD8_R[src]
Bits 16:17 - Pin 8 output max speed bits
pub fn ospd7(&self) -> OSPD7_R[src]
Bits 14:15 - Pin 7 output max speed bits
pub fn ospd6(&self) -> OSPD6_R[src]
Bits 12:13 - Pin 6 output max speed bits
pub fn ospd5(&self) -> OSPD5_R[src]
Bits 10:11 - Pin 5 output max speed bits
pub fn ospd4(&self) -> OSPD4_R[src]
Bits 8:9 - Pin 4 output max speed bits
pub fn ospd3(&self) -> OSPD3_R[src]
Bits 6:7 - Pin 3 output max speed bits
pub fn ospd2(&self) -> OSPD2_R[src]
Bits 4:5 - Pin 2 output max speed bits
pub fn ospd1(&self) -> OSPD1_R[src]
Bits 2:3 - Pin 1 output max speed bits
pub fn ospd0(&self) -> OSPD0_R[src]
Bits 0:1 - Pin 0 output max speed bits
impl R<u8, PUD15_A>[src]
pub fn variant(&self) -> Variant<u8, PUD15_A>[src]
Get enumerated values variant
pub fn is_floating(&self) -> bool[src]
Checks if the value of the field is FLOATING
pub fn is_pull_up(&self) -> bool[src]
Checks if the value of the field is PULLUP
pub fn is_pull_down(&self) -> bool[src]
Checks if the value of the field is PULLDOWN
impl R<u32, Reg<u32, _PUD>>[src]
pub fn pud15(&self) -> PUD15_R[src]
Bits 30:31 - Pin 15 pull-up or pull-down bits
pub fn pud14(&self) -> PUD14_R[src]
Bits 28:29 - Pin 14 pull-up or pull-down bits
pub fn pud13(&self) -> PUD13_R[src]
Bits 26:27 - Pin 13 pull-up or pull-down bits
pub fn pud12(&self) -> PUD12_R[src]
Bits 24:25 - Pin 12 pull-up or pull-down bits
pub fn pud11(&self) -> PUD11_R[src]
Bits 22:23 - Pin 11 pull-up or pull-down bits
pub fn pud10(&self) -> PUD10_R[src]
Bits 20:21 - Pin 10 pull-up or pull-down bits
pub fn pud9(&self) -> PUD9_R[src]
Bits 18:19 - Pin 9 pull-up or pull-down bits
pub fn pud8(&self) -> PUD8_R[src]
Bits 16:17 - Pin 8 pull-up or pull-down bits
pub fn pud7(&self) -> PUD7_R[src]
Bits 14:15 - Pin 7 pull-up or pull-down bits
pub fn pud6(&self) -> PUD6_R[src]
Bits 12:13 - Pin 6 pull-up or pull-down bits
pub fn pud5(&self) -> PUD5_R[src]
Bits 10:11 - Pin 5 pull-up or pull-down bits
pub fn pud4(&self) -> PUD4_R[src]
Bits 8:9 - Pin 4 pull-up or pull-down bits
pub fn pud3(&self) -> PUD3_R[src]
Bits 6:7 - Pin 3 pull-up or pull-down bits
pub fn pud2(&self) -> PUD2_R[src]
Bits 4:5 - Pin 2 pull-up or pull-down bits
pub fn pud1(&self) -> PUD1_R[src]
Bits 2:3 - Pin 1 pull-up or pull-down bits
pub fn pud0(&self) -> PUD0_R[src]
Bits 0:1 - Pin 0 pull-up or pull-down bits
impl R<bool, ISTAT15_A>[src]
pub fn variant(&self) -> ISTAT15_A[src]
Get enumerated values variant
pub fn is_low(&self) -> bool[src]
Checks if the value of the field is LOW
pub fn is_high(&self) -> bool[src]
Checks if the value of the field is HIGH
impl R<u32, Reg<u32, _ISTAT>>[src]
pub fn istat15(&self) -> ISTAT15_R[src]
Bit 15 - Port input data 14
pub fn istat14(&self) -> ISTAT14_R[src]
Bit 14 - Port input data 14
pub fn istat13(&self) -> ISTAT13_R[src]
Bit 13 - Port input data 13
pub fn istat12(&self) -> ISTAT12_R[src]
Bit 12 - Port input data 12
pub fn istat11(&self) -> ISTAT11_R[src]
Bit 11 - Port input data 11
pub fn istat10(&self) -> ISTAT10_R[src]
Bit 10 - Port input data 10
pub fn istat9(&self) -> ISTAT9_R[src]
Bit 9 - Port input data 9
pub fn istat8(&self) -> ISTAT8_R[src]
Bit 8 - Port input data 8
pub fn istat7(&self) -> ISTAT7_R[src]
Bit 7 - Port input data 7
pub fn istat6(&self) -> ISTAT6_R[src]
Bit 6 - Port input data 6
pub fn istat5(&self) -> ISTAT5_R[src]
Bit 5 - Port input data 5
pub fn istat4(&self) -> ISTAT4_R[src]
Bit 4 - Port input data 4
pub fn istat3(&self) -> ISTAT3_R[src]
Bit 3 - Port input data 3
pub fn istat2(&self) -> ISTAT2_R[src]
Bit 2 - Port input data 2
pub fn istat1(&self) -> ISTAT1_R[src]
Bit 1 - Port input data 1
pub fn istat0(&self) -> ISTAT0_R[src]
Bit 0 - Port input data 0
impl R<bool, OCTL15_A>[src]
pub fn variant(&self) -> OCTL15_A[src]
Get enumerated values variant
pub fn is_low(&self) -> bool[src]
Checks if the value of the field is LOW
pub fn is_high(&self) -> bool[src]
Checks if the value of the field is HIGH
impl R<u32, Reg<u32, _OCTL>>[src]
pub fn octl15(&self) -> OCTL15_R[src]
Bit 15 - Port output data 15
pub fn octl14(&self) -> OCTL14_R[src]
Bit 14 - Port output data 14
pub fn octl13(&self) -> OCTL13_R[src]
Bit 13 - Port output data 13
pub fn octl12(&self) -> OCTL12_R[src]
Bit 12 - Port output data 12
pub fn octl11(&self) -> OCTL11_R[src]
Bit 11 - Port output data 11
pub fn octl10(&self) -> OCTL10_R[src]
Bit 10 - Port output data 10
pub fn octl9(&self) -> OCTL9_R[src]
Bit 9 - Port output data 9
pub fn octl8(&self) -> OCTL8_R[src]
Bit 8 - Port output data 8
pub fn octl7(&self) -> OCTL7_R[src]
Bit 7 - Port output data 7
pub fn octl6(&self) -> OCTL6_R[src]
Bit 6 - Port output data 6
pub fn octl5(&self) -> OCTL5_R[src]
Bit 5 - Port output data 5
pub fn octl4(&self) -> OCTL4_R[src]
Bit 4 - Port output data 4
pub fn octl3(&self) -> OCTL3_R[src]
Bit 3 - Port output data 3
pub fn octl2(&self) -> OCTL2_R[src]
Bit 2 - Port output data 2
pub fn octl1(&self) -> OCTL1_R[src]
Bit 1 - Port output data 1
pub fn octl0(&self) -> OCTL0_R[src]
Bit 0 - Port output data 0
impl R<bool, LKK_A>[src]
pub fn variant(&self) -> LKK_A[src]
Get enumerated values variant
pub fn is_not_active(&self) -> bool[src]
Checks if the value of the field is NOTACTIVE
pub fn is_active(&self) -> bool[src]
Checks if the value of the field is ACTIVE
impl R<bool, LK15_A>[src]
pub fn variant(&self) -> LK15_A[src]
Get enumerated values variant
pub fn is_unlocked(&self) -> bool[src]
Checks if the value of the field is UNLOCKED
pub fn is_locked(&self) -> bool[src]
Checks if the value of the field is LOCKED
impl R<bool, LK9_A>[src]
pub fn variant(&self) -> LK9_A[src]
Get enumerated values variant
pub fn is_unlocked(&self) -> bool[src]
Checks if the value of the field is UNLOCKED
pub fn is_locked(&self) -> bool[src]
Checks if the value of the field is LOCKED
impl R<u32, Reg<u32, _LOCK>>[src]
pub fn lkk(&self) -> LKK_R[src]
Bit 16 - Lock key
pub fn lk15(&self) -> LK15_R[src]
Bit 15 - Port lock bit 15
pub fn lk14(&self) -> LK14_R[src]
Bit 14 - Port lock bit 14
pub fn lk13(&self) -> LK13_R[src]
Bit 13 - Port lock bit 13
pub fn lk12(&self) -> LK12_R[src]
Bit 12 - Port lock bit 12
pub fn lk11(&self) -> LK11_R[src]
Bit 11 - Port lock bit 11
pub fn lk10(&self) -> LK10_R[src]
Bit 10 - Port lock bit 10
pub fn lk9(&self) -> LK9_R[src]
Bit 9 - Port lock bit 9
pub fn lk8(&self) -> LK8_R[src]
Bit 8 - Port lock bit 8
pub fn lk7(&self) -> LK7_R[src]
Bit 7 - Port lock bit 7
pub fn lk6(&self) -> LK6_R[src]
Bit 6 - Port lock bit 6
pub fn lk5(&self) -> LK5_R[src]
Bit 5 - Port lock bit 5
pub fn lk4(&self) -> LK4_R[src]
Bit 4 - Port lock bit 4
pub fn lk3(&self) -> LK3_R[src]
Bit 3 - Port lock bit 3
pub fn lk2(&self) -> LK2_R[src]
Bit 2 - Port lock bit 2
pub fn lk1(&self) -> LK1_R[src]
Bit 1 - Port lock bit 1
pub fn lk0(&self) -> LK0_R[src]
Bit 0 - Port lock bit 0
impl R<u8, SEL7_A>[src]
pub fn variant(&self) -> Variant<u8, SEL7_A>[src]
Get enumerated values variant
pub fn is_af0(&self) -> bool[src]
Checks if the value of the field is AF0
pub fn is_af1(&self) -> bool[src]
Checks if the value of the field is AF1
pub fn is_af2(&self) -> bool[src]
Checks if the value of the field is AF2
pub fn is_af3(&self) -> bool[src]
Checks if the value of the field is AF3
pub fn is_af4(&self) -> bool[src]
Checks if the value of the field is AF4
pub fn is_af5(&self) -> bool[src]
Checks if the value of the field is AF5
pub fn is_af6(&self) -> bool[src]
Checks if the value of the field is AF6
pub fn is_af7(&self) -> bool[src]
Checks if the value of the field is AF7
pub fn is_af9(&self) -> bool[src]
Checks if the value of the field is AF9
pub fn is_af11(&self) -> bool[src]
Checks if the value of the field is AF11
impl R<u32, Reg<u32, _AFSEL0>>[src]
pub fn sel7(&self) -> SEL7_R[src]
Bits 28:31 - Pin 7 alternate function selected
pub fn sel6(&self) -> SEL6_R[src]
Bits 24:27 - Pin 6 alternate function selected
pub fn sel5(&self) -> SEL5_R[src]
Bits 20:23 - Pin 5 alternate function selected
pub fn sel4(&self) -> SEL4_R[src]
Bits 16:19 - Pin 4 alternate function selected
pub fn sel3(&self) -> SEL3_R[src]
Bits 12:15 - Pin 3 alternate function selected
pub fn sel2(&self) -> SEL2_R[src]
Bits 8:11 - Pin 2 alternate function selected
pub fn sel1(&self) -> SEL1_R[src]
Bits 4:7 - Pin 1 alternate function selected
pub fn sel0(&self) -> SEL0_R[src]
Bits 0:3 - Pin 0 alternate function selected
impl R<u8, SEL15_A>[src]
pub fn variant(&self) -> Variant<u8, SEL15_A>[src]
Get enumerated values variant
pub fn is_af0(&self) -> bool[src]
Checks if the value of the field is AF0
pub fn is_af1(&self) -> bool[src]
Checks if the value of the field is AF1
pub fn is_af2(&self) -> bool[src]
Checks if the value of the field is AF2
pub fn is_af3(&self) -> bool[src]
Checks if the value of the field is AF3
pub fn is_af4(&self) -> bool[src]
Checks if the value of the field is AF4
pub fn is_af5(&self) -> bool[src]
Checks if the value of the field is AF5
pub fn is_af6(&self) -> bool[src]
Checks if the value of the field is AF6
pub fn is_af7(&self) -> bool[src]
Checks if the value of the field is AF7
pub fn is_af9(&self) -> bool[src]
Checks if the value of the field is AF9
pub fn is_af11(&self) -> bool[src]
Checks if the value of the field is AF11
impl R<u32, Reg<u32, _AFSEL1>>[src]
pub fn sel15(&self) -> SEL15_R[src]
Bits 28:31 - Pin 15 alternate function selected
pub fn sel14(&self) -> SEL14_R[src]
Bits 24:27 - Pin 14 alternate function selected
pub fn sel13(&self) -> SEL13_R[src]
Bits 20:23 - Pin 13 alternate function selected
pub fn sel12(&self) -> SEL12_R[src]
Bits 16:19 - Pin 12 alternate function selected
pub fn sel11(&self) -> SEL11_R[src]
Bits 12:15 - Pin 11 alternate function selected
pub fn sel10(&self) -> SEL10_R[src]
Bits 8:11 - Pin 10 alternate function selected
pub fn sel9(&self) -> SEL9_R[src]
Bits 4:7 - Pin 9 alternate function selected
pub fn sel8(&self) -> SEL8_R[src]
Bits 0:3 - Pin 8 alternate function selected
impl R<u8, CTL15_A>[src]
pub fn variant(&self) -> CTL15_A[src]
Get enumerated values variant
pub fn is_input(&self) -> bool[src]
Checks if the value of the field is INPUT
pub fn is_output(&self) -> bool[src]
Checks if the value of the field is OUTPUT
pub fn is_alternate(&self) -> bool[src]
Checks if the value of the field is ALTERNATE
pub fn is_analog(&self) -> bool[src]
Checks if the value of the field is ANALOG
impl R<u32, Reg<u32, _CTL>>[src]
pub fn ctl15(&self) -> CTL15_R[src]
Bits 30:31 - Pin 15 configuration bits
pub fn ctl14(&self) -> CTL14_R[src]
Bits 28:29 - Pin 14 configuration bits
pub fn ctl13(&self) -> CTL13_R[src]
Bits 26:27 - Pin 13 configuration bits
pub fn ctl12(&self) -> CTL12_R[src]
Bits 24:25 - Pin 12 configuration bits
pub fn ctl11(&self) -> CTL11_R[src]
Bits 22:23 - Pin 11 configuration bits
pub fn ctl10(&self) -> CTL10_R[src]
Bits 20:21 - Pin 10 configuration bits
pub fn ctl9(&self) -> CTL9_R[src]
Bits 18:19 - Pin 9 configuration bits
pub fn ctl8(&self) -> CTL8_R[src]
Bits 16:17 - Pin 8 configuration bits
pub fn ctl7(&self) -> CTL7_R[src]
Bits 14:15 - Pin 7 configuration bits
pub fn ctl6(&self) -> CTL6_R[src]
Bits 12:13 - Pin 6 configuration bits
pub fn ctl5(&self) -> CTL5_R[src]
Bits 10:11 - Pin 5 configuration bits
pub fn ctl4(&self) -> CTL4_R[src]
Bits 8:9 - Pin 4 configuration bits
pub fn ctl3(&self) -> CTL3_R[src]
Bits 6:7 - Pin 3 configuration bits
pub fn ctl2(&self) -> CTL2_R[src]
Bits 4:5 - Pin 2 configuration bits
pub fn ctl1(&self) -> CTL1_R[src]
Bits 2:3 - Pin 1 configuration bits
pub fn ctl0(&self) -> CTL0_R[src]
Bits 0:1 - Pin 0 configuration bits
impl R<bool, OM15_A>[src]
pub fn variant(&self) -> OM15_A[src]
Get enumerated values variant
pub fn is_push_pull(&self) -> bool[src]
Checks if the value of the field is PUSHPULL
pub fn is_open_drain(&self) -> bool[src]
Checks if the value of the field is OPENDRAIN
impl R<u32, Reg<u32, _OMODE>>[src]
pub fn om15(&self) -> OM15_R[src]
Bit 15 - Pin 15 output mode
pub fn om14(&self) -> OM14_R[src]
Bit 14 - Pin 14 output mode
pub fn om13(&self) -> OM13_R[src]
Bit 13 - Pin 13 output mode
pub fn om12(&self) -> OM12_R[src]
Bit 12 - Pin 12 output mode
pub fn om11(&self) -> OM11_R[src]
Bit 11 - Pin 11 output mode
pub fn om10(&self) -> OM10_R[src]
Bit 10 - Pin 10 output mode
pub fn om9(&self) -> OM9_R[src]
Bit 9 - Pin 9 output mode
pub fn om8(&self) -> OM8_R[src]
Bit 8 - Pin 8 output mode
pub fn om7(&self) -> OM7_R[src]
Bit 7 - Pin 7 output mode
pub fn om6(&self) -> OM6_R[src]
Bit 6 - Pin 6 output mode
pub fn om5(&self) -> OM5_R[src]
Bit 5 - Pin 5 output mode
pub fn om4(&self) -> OM4_R[src]
Bit 4 - Pin 4 output mode
pub fn om3(&self) -> OM3_R[src]
Bit 3 - Pin 3 output mode
pub fn om2(&self) -> OM2_R[src]
Bit 2 - Pin 2 output mode
pub fn om1(&self) -> OM1_R[src]
Bit 1 - Pin 1 output mode
pub fn om0(&self) -> OM0_R[src]
Bit 0 - Pin 0 output mode
impl R<u8, OSPD15_A>[src]
pub fn variant(&self) -> Variant<u8, OSPD15_A>[src]
Get enumerated values variant
pub fn is_speed2m(&self) -> bool[src]
Checks if the value of the field is SPEED2M
pub fn is_speed10m(&self) -> bool[src]
Checks if the value of the field is SPEED10M
pub fn is_speed50m(&self) -> bool[src]
Checks if the value of the field is SPEED50M
impl R<u32, Reg<u32, _OSPD>>[src]
pub fn ospd15(&self) -> OSPD15_R[src]
Bits 30:31 - Pin 15 output max speed bits
pub fn ospd14(&self) -> OSPD14_R[src]
Bits 28:29 - Pin 14 output max speed bits
pub fn ospd13(&self) -> OSPD13_R[src]
Bits 26:27 - Pin 13 output max speed bits
pub fn ospd12(&self) -> OSPD12_R[src]
Bits 24:25 - Pin 12 output max speed bits
pub fn ospd11(&self) -> OSPD11_R[src]
Bits 22:23 - Pin 11 output max speed bits
pub fn ospd10(&self) -> OSPD10_R[src]
Bits 20:21 - Pin 10 output max speed bits
pub fn ospd9(&self) -> OSPD9_R[src]
Bits 18:19 - Pin 9 output max speed bits
pub fn ospd8(&self) -> OSPD8_R[src]
Bits 16:17 - Pin 8 output max speed bits
pub fn ospd7(&self) -> OSPD7_R[src]
Bits 14:15 - Pin 7 output max speed bits
pub fn ospd6(&self) -> OSPD6_R[src]
Bits 12:13 - Pin 6 output max speed bits
pub fn ospd5(&self) -> OSPD5_R[src]
Bits 10:11 - Pin 5 output max speed bits
pub fn ospd4(&self) -> OSPD4_R[src]
Bits 8:9 - Pin 4 output max speed bits
pub fn ospd3(&self) -> OSPD3_R[src]
Bits 6:7 - Pin 3 output max speed bits
pub fn ospd2(&self) -> OSPD2_R[src]
Bits 4:5 - Pin 2 output max speed bits
pub fn ospd1(&self) -> OSPD1_R[src]
Bits 2:3 - Pin 1 output max speed bits
pub fn ospd0(&self) -> OSPD0_R[src]
Bits 0:1 - Pin 0 output max speed bits
impl R<u8, PUD15_A>[src]
pub fn variant(&self) -> Variant<u8, PUD15_A>[src]
Get enumerated values variant
pub fn is_floating(&self) -> bool[src]
Checks if the value of the field is FLOATING
pub fn is_pull_up(&self) -> bool[src]
Checks if the value of the field is PULLUP
pub fn is_pull_down(&self) -> bool[src]
Checks if the value of the field is PULLDOWN
impl R<u32, Reg<u32, _PUD>>[src]
pub fn pud15(&self) -> PUD15_R[src]
Bits 30:31 - Pin 15 pull-up or pull-down bits
pub fn pud14(&self) -> PUD14_R[src]
Bits 28:29 - Pin 14 pull-up or pull-down bits
pub fn pud13(&self) -> PUD13_R[src]
Bits 26:27 - Pin 13 pull-up or pull-down bits
pub fn pud12(&self) -> PUD12_R[src]
Bits 24:25 - Pin 12 pull-up or pull-down bits
pub fn pud11(&self) -> PUD11_R[src]
Bits 22:23 - Pin 11 pull-up or pull-down bits
pub fn pud10(&self) -> PUD10_R[src]
Bits 20:21 - Pin 10 pull-up or pull-down bits
pub fn pud9(&self) -> PUD9_R[src]
Bits 18:19 - Pin 9 pull-up or pull-down bits
pub fn pud8(&self) -> PUD8_R[src]
Bits 16:17 - Pin 8 pull-up or pull-down bits
pub fn pud7(&self) -> PUD7_R[src]
Bits 14:15 - Pin 7 pull-up or pull-down bits
pub fn pud6(&self) -> PUD6_R[src]
Bits 12:13 - Pin 6 pull-up or pull-down bits
pub fn pud5(&self) -> PUD5_R[src]
Bits 10:11 - Pin 5 pull-up or pull-down bits
pub fn pud4(&self) -> PUD4_R[src]
Bits 8:9 - Pin 4 pull-up or pull-down bits
pub fn pud3(&self) -> PUD3_R[src]
Bits 6:7 - Pin 3 pull-up or pull-down bits
pub fn pud2(&self) -> PUD2_R[src]
Bits 4:5 - Pin 2 pull-up or pull-down bits
pub fn pud1(&self) -> PUD1_R[src]
Bits 2:3 - Pin 1 pull-up or pull-down bits
pub fn pud0(&self) -> PUD0_R[src]
Bits 0:1 - Pin 0 pull-up or pull-down bits
impl R<bool, ISTAT15_A>[src]
pub fn variant(&self) -> ISTAT15_A[src]
Get enumerated values variant
pub fn is_low(&self) -> bool[src]
Checks if the value of the field is LOW
pub fn is_high(&self) -> bool[src]
Checks if the value of the field is HIGH
impl R<u32, Reg<u32, _ISTAT>>[src]
pub fn istat15(&self) -> ISTAT15_R[src]
Bit 15 - Port input data 14
pub fn istat14(&self) -> ISTAT14_R[src]
Bit 14 - Port input data 14
pub fn istat13(&self) -> ISTAT13_R[src]
Bit 13 - Port input data 13
pub fn istat12(&self) -> ISTAT12_R[src]
Bit 12 - Port input data 12
pub fn istat11(&self) -> ISTAT11_R[src]
Bit 11 - Port input data 11
pub fn istat10(&self) -> ISTAT10_R[src]
Bit 10 - Port input data 10
pub fn istat9(&self) -> ISTAT9_R[src]
Bit 9 - Port input data 9
pub fn istat8(&self) -> ISTAT8_R[src]
Bit 8 - Port input data 8
pub fn istat7(&self) -> ISTAT7_R[src]
Bit 7 - Port input data 7
pub fn istat6(&self) -> ISTAT6_R[src]
Bit 6 - Port input data 6
pub fn istat5(&self) -> ISTAT5_R[src]
Bit 5 - Port input data 5
pub fn istat4(&self) -> ISTAT4_R[src]
Bit 4 - Port input data 4
pub fn istat3(&self) -> ISTAT3_R[src]
Bit 3 - Port input data 3
pub fn istat2(&self) -> ISTAT2_R[src]
Bit 2 - Port input data 2
pub fn istat1(&self) -> ISTAT1_R[src]
Bit 1 - Port input data 1
pub fn istat0(&self) -> ISTAT0_R[src]
Bit 0 - Port input data 0
impl R<bool, OCTL15_A>[src]
pub fn variant(&self) -> OCTL15_A[src]
Get enumerated values variant
pub fn is_low(&self) -> bool[src]
Checks if the value of the field is LOW
pub fn is_high(&self) -> bool[src]
Checks if the value of the field is HIGH
impl R<u32, Reg<u32, _OCTL>>[src]
pub fn octl15(&self) -> OCTL15_R[src]
Bit 15 - Port output data 15
pub fn octl14(&self) -> OCTL14_R[src]
Bit 14 - Port output data 14
pub fn octl13(&self) -> OCTL13_R[src]
Bit 13 - Port output data 13
pub fn octl12(&self) -> OCTL12_R[src]
Bit 12 - Port output data 12
pub fn octl11(&self) -> OCTL11_R[src]
Bit 11 - Port output data 11
pub fn octl10(&self) -> OCTL10_R[src]
Bit 10 - Port output data 10
pub fn octl9(&self) -> OCTL9_R[src]
Bit 9 - Port output data 9
pub fn octl8(&self) -> OCTL8_R[src]
Bit 8 - Port output data 8
pub fn octl7(&self) -> OCTL7_R[src]
Bit 7 - Port output data 7
pub fn octl6(&self) -> OCTL6_R[src]
Bit 6 - Port output data 6
pub fn octl5(&self) -> OCTL5_R[src]
Bit 5 - Port output data 5
pub fn octl4(&self) -> OCTL4_R[src]
Bit 4 - Port output data 4
pub fn octl3(&self) -> OCTL3_R[src]
Bit 3 - Port output data 3
pub fn octl2(&self) -> OCTL2_R[src]
Bit 2 - Port output data 2
pub fn octl1(&self) -> OCTL1_R[src]
Bit 1 - Port output data 1
pub fn octl0(&self) -> OCTL0_R[src]
Bit 0 - Port output data 0
impl R<bool, LKK_A>[src]
pub fn variant(&self) -> LKK_A[src]
Get enumerated values variant
pub fn is_not_active(&self) -> bool[src]
Checks if the value of the field is NOTACTIVE
pub fn is_active(&self) -> bool[src]
Checks if the value of the field is ACTIVE
impl R<bool, LK15_A>[src]
pub fn variant(&self) -> LK15_A[src]
Get enumerated values variant
pub fn is_unlocked(&self) -> bool[src]
Checks if the value of the field is UNLOCKED
pub fn is_locked(&self) -> bool[src]
Checks if the value of the field is LOCKED
impl R<bool, LK9_A>[src]
pub fn variant(&self) -> LK9_A[src]
Get enumerated values variant
pub fn is_unlocked(&self) -> bool[src]
Checks if the value of the field is UNLOCKED
pub fn is_locked(&self) -> bool[src]
Checks if the value of the field is LOCKED
impl R<u32, Reg<u32, _LOCK>>[src]
pub fn lkk(&self) -> LKK_R[src]
Bit 16 - Lock key
pub fn lk15(&self) -> LK15_R[src]
Bit 15 - Port lock bit 15
pub fn lk14(&self) -> LK14_R[src]
Bit 14 - Port lock bit 14
pub fn lk13(&self) -> LK13_R[src]
Bit 13 - Port lock bit 13
pub fn lk12(&self) -> LK12_R[src]
Bit 12 - Port lock bit 12
pub fn lk11(&self) -> LK11_R[src]
Bit 11 - Port lock bit 11
pub fn lk10(&self) -> LK10_R[src]
Bit 10 - Port lock bit 10
pub fn lk9(&self) -> LK9_R[src]
Bit 9 - Port lock bit 9
pub fn lk8(&self) -> LK8_R[src]
Bit 8 - Port lock bit 8
pub fn lk7(&self) -> LK7_R[src]
Bit 7 - Port lock bit 7
pub fn lk6(&self) -> LK6_R[src]
Bit 6 - Port lock bit 6
pub fn lk5(&self) -> LK5_R[src]
Bit 5 - Port lock bit 5
pub fn lk4(&self) -> LK4_R[src]
Bit 4 - Port lock bit 4
pub fn lk3(&self) -> LK3_R[src]
Bit 3 - Port lock bit 3
pub fn lk2(&self) -> LK2_R[src]
Bit 2 - Port lock bit 2
pub fn lk1(&self) -> LK1_R[src]
Bit 1 - Port lock bit 1
pub fn lk0(&self) -> LK0_R[src]
Bit 0 - Port lock bit 0
impl R<u8, SEL7_A>[src]
pub fn variant(&self) -> Variant<u8, SEL7_A>[src]
Get enumerated values variant
pub fn is_af0(&self) -> bool[src]
Checks if the value of the field is AF0
pub fn is_af1(&self) -> bool[src]
Checks if the value of the field is AF1
pub fn is_af2(&self) -> bool[src]
Checks if the value of the field is AF2
pub fn is_af3(&self) -> bool[src]
Checks if the value of the field is AF3
pub fn is_af4(&self) -> bool[src]
Checks if the value of the field is AF4
pub fn is_af5(&self) -> bool[src]
Checks if the value of the field is AF5
pub fn is_af6(&self) -> bool[src]
Checks if the value of the field is AF6
pub fn is_af7(&self) -> bool[src]
Checks if the value of the field is AF7
pub fn is_af9(&self) -> bool[src]
Checks if the value of the field is AF9
pub fn is_af11(&self) -> bool[src]
Checks if the value of the field is AF11
impl R<u32, Reg<u32, _AFSEL0>>[src]
pub fn sel7(&self) -> SEL7_R[src]
Bits 28:31 - Pin 7 alternate function selected
pub fn sel6(&self) -> SEL6_R[src]
Bits 24:27 - Pin 6 alternate function selected
pub fn sel5(&self) -> SEL5_R[src]
Bits 20:23 - Pin 5 alternate function selected
pub fn sel4(&self) -> SEL4_R[src]
Bits 16:19 - Pin 4 alternate function selected
pub fn sel3(&self) -> SEL3_R[src]
Bits 12:15 - Pin 3 alternate function selected
pub fn sel2(&self) -> SEL2_R[src]
Bits 8:11 - Pin 2 alternate function selected
pub fn sel1(&self) -> SEL1_R[src]
Bits 4:7 - Pin 1 alternate function selected
pub fn sel0(&self) -> SEL0_R[src]
Bits 0:3 - Pin 0 alternate function selected
impl R<u8, SEL15_A>[src]
pub fn variant(&self) -> Variant<u8, SEL15_A>[src]
Get enumerated values variant
pub fn is_af0(&self) -> bool[src]
Checks if the value of the field is AF0
pub fn is_af1(&self) -> bool[src]
Checks if the value of the field is AF1
pub fn is_af2(&self) -> bool[src]
Checks if the value of the field is AF2
pub fn is_af3(&self) -> bool[src]
Checks if the value of the field is AF3
pub fn is_af4(&self) -> bool[src]
Checks if the value of the field is AF4
pub fn is_af5(&self) -> bool[src]
Checks if the value of the field is AF5
pub fn is_af6(&self) -> bool[src]
Checks if the value of the field is AF6
pub fn is_af7(&self) -> bool[src]
Checks if the value of the field is AF7
pub fn is_af9(&self) -> bool[src]
Checks if the value of the field is AF9
pub fn is_af11(&self) -> bool[src]
Checks if the value of the field is AF11
impl R<u32, Reg<u32, _AFSEL1>>[src]
pub fn sel15(&self) -> SEL15_R[src]
Bits 28:31 - Pin 15 alternate function selected
pub fn sel14(&self) -> SEL14_R[src]
Bits 24:27 - Pin 14 alternate function selected
pub fn sel13(&self) -> SEL13_R[src]
Bits 20:23 - Pin 13 alternate function selected
pub fn sel12(&self) -> SEL12_R[src]
Bits 16:19 - Pin 12 alternate function selected
pub fn sel11(&self) -> SEL11_R[src]
Bits 12:15 - Pin 11 alternate function selected
pub fn sel10(&self) -> SEL10_R[src]
Bits 8:11 - Pin 10 alternate function selected
pub fn sel9(&self) -> SEL9_R[src]
Bits 4:7 - Pin 9 alternate function selected
pub fn sel8(&self) -> SEL8_R[src]
Bits 0:3 - Pin 8 alternate function selected
impl R<u8, CTL15_A>[src]
pub fn variant(&self) -> CTL15_A[src]
Get enumerated values variant
pub fn is_input(&self) -> bool[src]
Checks if the value of the field is INPUT
pub fn is_output(&self) -> bool[src]
Checks if the value of the field is OUTPUT
pub fn is_alternate(&self) -> bool[src]
Checks if the value of the field is ALTERNATE
pub fn is_analog(&self) -> bool[src]
Checks if the value of the field is ANALOG
impl R<u32, Reg<u32, _CTL>>[src]
pub fn ctl15(&self) -> CTL15_R[src]
Bits 30:31 - Port x configuration bits (y = 0..15)
pub fn ctl14(&self) -> CTL14_R[src]
Bits 28:29 - Port x configuration bits (y = 0..15)
pub fn ctl13(&self) -> CTL13_R[src]
Bits 26:27 - Port x configuration bits (y = 0..15)
pub fn ctl12(&self) -> CTL12_R[src]
Bits 24:25 - Port x configuration bits (y = 0..15)
pub fn ctl11(&self) -> CTL11_R[src]
Bits 22:23 - Port x configuration bits (y = 0..15)
pub fn ctl10(&self) -> CTL10_R[src]
Bits 20:21 - Port x configuration bits (y = 0..15)
pub fn ctl9(&self) -> CTL9_R[src]
Bits 18:19 - Port x configuration bits (y = 0..15)
pub fn ctl8(&self) -> CTL8_R[src]
Bits 16:17 - Port x configuration bits (y = 0..15)
pub fn ctl7(&self) -> CTL7_R[src]
Bits 14:15 - Port x configuration bits (y = 0..15)
pub fn ctl6(&self) -> CTL6_R[src]
Bits 12:13 - Port x configuration bits (y = 0..15)
pub fn ctl5(&self) -> CTL5_R[src]
Bits 10:11 - Port x configuration bits (y = 0..15)
pub fn ctl4(&self) -> CTL4_R[src]
Bits 8:9 - Port x configuration bits (y = 0..15)
pub fn ctl3(&self) -> CTL3_R[src]
Bits 6:7 - Port x configuration bits (y = 0..15)
pub fn ctl2(&self) -> CTL2_R[src]
Bits 4:5 - Port x configuration bits (y = 0..15)
pub fn ctl1(&self) -> CTL1_R[src]
Bits 2:3 - Port x configuration bits (y = 0..15)
pub fn ctl0(&self) -> CTL0_R[src]
Bits 0:1 - Port x configuration bits (y = 0..15)
impl R<bool, OM15_A>[src]
pub fn variant(&self) -> OM15_A[src]
Get enumerated values variant
pub fn is_push_pull(&self) -> bool[src]
Checks if the value of the field is PUSHPULL
pub fn is_open_drain(&self) -> bool[src]
Checks if the value of the field is OPENDRAIN
impl R<u32, Reg<u32, _OMODE>>[src]
pub fn om15(&self) -> OM15_R[src]
Bit 15 - Pin 15 output mode
pub fn om14(&self) -> OM14_R[src]
Bit 14 - Pin 14 output mode
pub fn om13(&self) -> OM13_R[src]
Bit 13 - Pin 13 output mode
pub fn om12(&self) -> OM12_R[src]
Bit 12 - Pin 12 output mode
pub fn om11(&self) -> OM11_R[src]
Bit 11 - Pin 11 output mode
pub fn om10(&self) -> OM10_R[src]
Bit 10 - Pin 10 output mode
pub fn om9(&self) -> OM9_R[src]
Bit 9 - Pin 9 output mode
pub fn om8(&self) -> OM8_R[src]
Bit 8 - Pin 8 output mode
pub fn om7(&self) -> OM7_R[src]
Bit 7 - Pin 7 output mode
pub fn om6(&self) -> OM6_R[src]
Bit 6 - Pin 6 output mode
pub fn om5(&self) -> OM5_R[src]
Bit 5 - Pin 5 output mode
pub fn om4(&self) -> OM4_R[src]
Bit 4 - Pin 4 output mode
pub fn om3(&self) -> OM3_R[src]
Bit 3 - Pin 3 output mode
pub fn om2(&self) -> OM2_R[src]
Bit 2 - Pin 2 output mode
pub fn om1(&self) -> OM1_R[src]
Bit 1 - Pin 1 output mode
pub fn om0(&self) -> OM0_R[src]
Bit 0 - Pin 0 output mode
impl R<u8, OSPD15_A>[src]
pub fn variant(&self) -> Variant<u8, OSPD15_A>[src]
Get enumerated values variant
pub fn is_speed2m(&self) -> bool[src]
Checks if the value of the field is SPEED2M
pub fn is_speed10m(&self) -> bool[src]
Checks if the value of the field is SPEED10M
pub fn is_speed50m(&self) -> bool[src]
Checks if the value of the field is SPEED50M
impl R<u32, Reg<u32, _OSPD>>[src]
pub fn ospd15(&self) -> OSPD15_R[src]
Bits 30:31 - Pin 15 output max speed bits
pub fn ospd14(&self) -> OSPD14_R[src]
Bits 28:29 - Pin 14 output max speed bits
pub fn ospd13(&self) -> OSPD13_R[src]
Bits 26:27 - Pin 13 output max speed bits
pub fn ospd12(&self) -> OSPD12_R[src]
Bits 24:25 - Pin 12 output max speed bits
pub fn ospd11(&self) -> OSPD11_R[src]
Bits 22:23 - Pin 11 output max speed bits
pub fn ospd10(&self) -> OSPD10_R[src]
Bits 20:21 - Pin 10 output max speed bits
pub fn ospd9(&self) -> OSPD9_R[src]
Bits 18:19 - Pin 9 output max speed bits
pub fn ospd8(&self) -> OSPD8_R[src]
Bits 16:17 - Pin 8 output max speed bits
pub fn ospd7(&self) -> OSPD7_R[src]
Bits 14:15 - Pin 7 output max speed bits
pub fn ospd6(&self) -> OSPD6_R[src]
Bits 12:13 - Pin 6 output max speed bits
pub fn ospd5(&self) -> OSPD5_R[src]
Bits 10:11 - Pin 5 output max speed bits
pub fn ospd4(&self) -> OSPD4_R[src]
Bits 8:9 - Pin 4 output max speed bits
pub fn ospd3(&self) -> OSPD3_R[src]
Bits 6:7 - Pin 3 output max speed bits
pub fn ospd2(&self) -> OSPD2_R[src]
Bits 4:5 - Pin 2 output max speed bits
pub fn ospd1(&self) -> OSPD1_R[src]
Bits 2:3 - Pin 1 output max speed bits
pub fn ospd0(&self) -> OSPD0_R[src]
Bits 0:1 - Pin 0 output max speed bits
impl R<u8, PUD15_A>[src]
pub fn variant(&self) -> Variant<u8, PUD15_A>[src]
Get enumerated values variant
pub fn is_floating(&self) -> bool[src]
Checks if the value of the field is FLOATING
pub fn is_pull_up(&self) -> bool[src]
Checks if the value of the field is PULLUP
pub fn is_pull_down(&self) -> bool[src]
Checks if the value of the field is PULLDOWN
impl R<u32, Reg<u32, _PUD>>[src]
pub fn pud15(&self) -> PUD15_R[src]
Bits 30:31 - Pin 15 pull-up or pull-down bits
pub fn pud14(&self) -> PUD14_R[src]
Bits 28:29 - Pin 14 pull-up or pull-down bits
pub fn pud13(&self) -> PUD13_R[src]
Bits 26:27 - Pin 13 pull-up or pull-down bits
pub fn pud12(&self) -> PUD12_R[src]
Bits 24:25 - Pin 12 pull-up or pull-down bits
pub fn pud11(&self) -> PUD11_R[src]
Bits 22:23 - Pin 11 pull-up or pull-down bits
pub fn pud10(&self) -> PUD10_R[src]
Bits 20:21 - Pin 10 pull-up or pull-down bits
pub fn pud9(&self) -> PUD9_R[src]
Bits 18:19 - Pin 9 pull-up or pull-down bits
pub fn pud8(&self) -> PUD8_R[src]
Bits 16:17 - Pin 8 pull-up or pull-down bits
pub fn pud7(&self) -> PUD7_R[src]
Bits 14:15 - Pin 7 pull-up or pull-down bits
pub fn pud6(&self) -> PUD6_R[src]
Bits 12:13 - Pin 6 pull-up or pull-down bits
pub fn pud5(&self) -> PUD5_R[src]
Bits 10:11 - Pin 5 pull-up or pull-down bits
pub fn pud4(&self) -> PUD4_R[src]
Bits 8:9 - Pin 4 pull-up or pull-down bits
pub fn pud3(&self) -> PUD3_R[src]
Bits 6:7 - Pin 3 pull-up or pull-down bits
pub fn pud2(&self) -> PUD2_R[src]
Bits 4:5 - Pin 2 pull-up or pull-down bits
pub fn pud1(&self) -> PUD1_R[src]
Bits 2:3 - Pin 1 pull-up or pull-down bits
pub fn pud0(&self) -> PUD0_R[src]
Bits 0:1 - Pin 0 pull-up or pull-down bits
impl R<bool, ISTAT15_A>[src]
pub fn variant(&self) -> ISTAT15_A[src]
Get enumerated values variant
pub fn is_low(&self) -> bool[src]
Checks if the value of the field is LOW
pub fn is_high(&self) -> bool[src]
Checks if the value of the field is HIGH
impl R<u32, Reg<u32, _ISTAT>>[src]
pub fn istat15(&self) -> ISTAT15_R[src]
Bit 15 - Port input data 14
pub fn istat14(&self) -> ISTAT14_R[src]
Bit 14 - Port input data 14
pub fn istat13(&self) -> ISTAT13_R[src]
Bit 13 - Port input data 13
pub fn istat12(&self) -> ISTAT12_R[src]
Bit 12 - Port input data 12
pub fn istat11(&self) -> ISTAT11_R[src]
Bit 11 - Port input data 11
pub fn istat10(&self) -> ISTAT10_R[src]
Bit 10 - Port input data 10
pub fn istat9(&self) -> ISTAT9_R[src]
Bit 9 - Port input data 9
pub fn istat8(&self) -> ISTAT8_R[src]
Bit 8 - Port input data 8
pub fn istat7(&self) -> ISTAT7_R[src]
Bit 7 - Port input data 7
pub fn istat6(&self) -> ISTAT6_R[src]
Bit 6 - Port input data 6
pub fn istat5(&self) -> ISTAT5_R[src]
Bit 5 - Port input data 5
pub fn istat4(&self) -> ISTAT4_R[src]
Bit 4 - Port input data 4
pub fn istat3(&self) -> ISTAT3_R[src]
Bit 3 - Port input data 3
pub fn istat2(&self) -> ISTAT2_R[src]
Bit 2 - Port input data 2
pub fn istat1(&self) -> ISTAT1_R[src]
Bit 1 - Port input data 1
pub fn istat0(&self) -> ISTAT0_R[src]
Bit 0 - Port input data 0
impl R<bool, OCTL15_A>[src]
pub fn variant(&self) -> OCTL15_A[src]
Get enumerated values variant
pub fn is_low(&self) -> bool[src]
Checks if the value of the field is LOW
pub fn is_high(&self) -> bool[src]
Checks if the value of the field is HIGH
impl R<u32, Reg<u32, _OCTL>>[src]
pub fn octl15(&self) -> OCTL15_R[src]
Bit 15 - Port output data 15
pub fn octl14(&self) -> OCTL14_R[src]
Bit 14 - Port output data 14
pub fn octl13(&self) -> OCTL13_R[src]
Bit 13 - Port output data 13
pub fn octl12(&self) -> OCTL12_R[src]
Bit 12 - Port output data 12
pub fn octl11(&self) -> OCTL11_R[src]
Bit 11 - Port output data 11
pub fn octl10(&self) -> OCTL10_R[src]
Bit 10 - Port output data 10
pub fn octl9(&self) -> OCTL9_R[src]
Bit 9 - Port output data 9
pub fn octl8(&self) -> OCTL8_R[src]
Bit 8 - Port output data 8
pub fn octl7(&self) -> OCTL7_R[src]
Bit 7 - Port output data 7
pub fn octl6(&self) -> OCTL6_R[src]
Bit 6 - Port output data 6
pub fn octl5(&self) -> OCTL5_R[src]
Bit 5 - Port output data 5
pub fn octl4(&self) -> OCTL4_R[src]
Bit 4 - Port output data 4
pub fn octl3(&self) -> OCTL3_R[src]
Bit 3 - Port output data 3
pub fn octl2(&self) -> OCTL2_R[src]
Bit 2 - Port output data 2
pub fn octl1(&self) -> OCTL1_R[src]
Bit 1 - Port output data 1
pub fn octl0(&self) -> OCTL0_R[src]
Bit 0 - Port output data 0
impl R<u8, SEL7_A>[src]
pub fn variant(&self) -> Variant<u8, SEL7_A>[src]
Get enumerated values variant
pub fn is_af0(&self) -> bool[src]
Checks if the value of the field is AF0
pub fn is_af1(&self) -> bool[src]
Checks if the value of the field is AF1
pub fn is_af2(&self) -> bool[src]
Checks if the value of the field is AF2
pub fn is_af3(&self) -> bool[src]
Checks if the value of the field is AF3
pub fn is_af4(&self) -> bool[src]
Checks if the value of the field is AF4
pub fn is_af5(&self) -> bool[src]
Checks if the value of the field is AF5
pub fn is_af6(&self) -> bool[src]
Checks if the value of the field is AF6
pub fn is_af7(&self) -> bool[src]
Checks if the value of the field is AF7
pub fn is_af9(&self) -> bool[src]
Checks if the value of the field is AF9
pub fn is_af11(&self) -> bool[src]
Checks if the value of the field is AF11
impl R<u32, Reg<u32, _AFSEL0>>[src]
pub fn sel7(&self) -> SEL7_R[src]
Bits 28:31 - Pin 7 alternate function selected
pub fn sel6(&self) -> SEL6_R[src]
Bits 24:27 - Pin 6 alternate function selected
pub fn sel5(&self) -> SEL5_R[src]
Bits 20:23 - Pin 5 alternate function selected
pub fn sel4(&self) -> SEL4_R[src]
Bits 16:19 - Pin 4 alternate function selected
pub fn sel3(&self) -> SEL3_R[src]
Bits 12:15 - Pin 3 alternate function selected
pub fn sel2(&self) -> SEL2_R[src]
Bits 8:11 - Pin 2 alternate function selected
pub fn sel1(&self) -> SEL1_R[src]
Bits 4:7 - Pin 1 alternate function selected
pub fn sel0(&self) -> SEL0_R[src]
Bits 0:3 - Pin 0 alternate function selected
impl R<u8, SEL15_A>[src]
pub fn variant(&self) -> Variant<u8, SEL15_A>[src]
Get enumerated values variant
pub fn is_af0(&self) -> bool[src]
Checks if the value of the field is AF0
pub fn is_af1(&self) -> bool[src]
Checks if the value of the field is AF1
pub fn is_af2(&self) -> bool[src]
Checks if the value of the field is AF2
pub fn is_af3(&self) -> bool[src]
Checks if the value of the field is AF3
pub fn is_af4(&self) -> bool[src]
Checks if the value of the field is AF4
pub fn is_af5(&self) -> bool[src]
Checks if the value of the field is AF5
pub fn is_af6(&self) -> bool[src]
Checks if the value of the field is AF6
pub fn is_af7(&self) -> bool[src]
Checks if the value of the field is AF7
pub fn is_af9(&self) -> bool[src]
Checks if the value of the field is AF9
pub fn is_af11(&self) -> bool[src]
Checks if the value of the field is AF11
impl R<u32, Reg<u32, _AFSEL1>>[src]
pub fn sel15(&self) -> SEL15_R[src]
Bits 28:31 - Pin 15 alternate function selected
pub fn sel14(&self) -> SEL14_R[src]
Bits 24:27 - Pin 14 alternate function selected
pub fn sel13(&self) -> SEL13_R[src]
Bits 20:23 - Pin 13 alternate function selected
pub fn sel12(&self) -> SEL12_R[src]
Bits 16:19 - Pin 12 alternate function selected
pub fn sel11(&self) -> SEL11_R[src]
Bits 12:15 - Pin 11 alternate function selected
pub fn sel10(&self) -> SEL10_R[src]
Bits 8:11 - Pin 10 alternate function selected
pub fn sel9(&self) -> SEL9_R[src]
Bits 4:7 - Pin 9 alternate function selected
pub fn sel8(&self) -> SEL8_R[src]
Bits 0:3 - Pin 8 alternate function selected
impl R<u8, CTL15_A>[src]
pub fn variant(&self) -> CTL15_A[src]
Get enumerated values variant
pub fn is_input(&self) -> bool[src]
Checks if the value of the field is INPUT
pub fn is_output(&self) -> bool[src]
Checks if the value of the field is OUTPUT
pub fn is_alternate(&self) -> bool[src]
Checks if the value of the field is ALTERNATE
pub fn is_analog(&self) -> bool[src]
Checks if the value of the field is ANALOG
impl R<u32, Reg<u32, _CTL>>[src]
pub fn ctl15(&self) -> CTL15_R[src]
Bits 30:31 - Port x configuration bits (y = 0..15)
pub fn ctl14(&self) -> CTL14_R[src]
Bits 28:29 - Port x configuration bits (y = 0..15)
pub fn ctl13(&self) -> CTL13_R[src]
Bits 26:27 - Port x configuration bits (y = 0..15)
pub fn ctl12(&self) -> CTL12_R[src]
Bits 24:25 - Port x configuration bits (y = 0..15)
pub fn ctl11(&self) -> CTL11_R[src]
Bits 22:23 - Port x configuration bits (y = 0..15)
pub fn ctl10(&self) -> CTL10_R[src]
Bits 20:21 - Port x configuration bits (y = 0..15)
pub fn ctl9(&self) -> CTL9_R[src]
Bits 18:19 - Port x configuration bits (y = 0..15)
pub fn ctl8(&self) -> CTL8_R[src]
Bits 16:17 - Port x configuration bits (y = 0..15)
pub fn ctl7(&self) -> CTL7_R[src]
Bits 14:15 - Port x configuration bits (y = 0..15)
pub fn ctl6(&self) -> CTL6_R[src]
Bits 12:13 - Port x configuration bits (y = 0..15)
pub fn ctl5(&self) -> CTL5_R[src]
Bits 10:11 - Port x configuration bits (y = 0..15)
pub fn ctl4(&self) -> CTL4_R[src]
Bits 8:9 - Port x configuration bits (y = 0..15)
pub fn ctl3(&self) -> CTL3_R[src]
Bits 6:7 - Port x configuration bits (y = 0..15)
pub fn ctl2(&self) -> CTL2_R[src]
Bits 4:5 - Port x configuration bits (y = 0..15)
pub fn ctl1(&self) -> CTL1_R[src]
Bits 2:3 - Port x configuration bits (y = 0..15)
pub fn ctl0(&self) -> CTL0_R[src]
Bits 0:1 - Port x configuration bits (y = 0..15)
impl R<bool, OM15_A>[src]
pub fn variant(&self) -> OM15_A[src]
Get enumerated values variant
pub fn is_push_pull(&self) -> bool[src]
Checks if the value of the field is PUSHPULL
pub fn is_open_drain(&self) -> bool[src]
Checks if the value of the field is OPENDRAIN
impl R<u32, Reg<u32, _OMODE>>[src]
pub fn om15(&self) -> OM15_R[src]
Bit 15 - Pin 15 output mode
pub fn om14(&self) -> OM14_R[src]
Bit 14 - Pin 14 output mode
pub fn om13(&self) -> OM13_R[src]
Bit 13 - Pin 13 output mode
pub fn om12(&self) -> OM12_R[src]
Bit 12 - Pin 12 output mode
pub fn om11(&self) -> OM11_R[src]
Bit 11 - Pin 11 output mode
pub fn om10(&self) -> OM10_R[src]
Bit 10 - Pin 10 output mode
pub fn om9(&self) -> OM9_R[src]
Bit 9 - Pin 9 output mode
pub fn om8(&self) -> OM8_R[src]
Bit 8 - Pin 8 output mode
pub fn om7(&self) -> OM7_R[src]
Bit 7 - Pin 7 output mode
pub fn om6(&self) -> OM6_R[src]
Bit 6 - Pin 6 output mode
pub fn om5(&self) -> OM5_R[src]
Bit 5 - Pin 5 output mode
pub fn om4(&self) -> OM4_R[src]
Bit 4 - Pin 4 output mode
pub fn om3(&self) -> OM3_R[src]
Bit 3 - Pin 3 output mode
pub fn om2(&self) -> OM2_R[src]
Bit 2 - Pin 2 output mode
pub fn om1(&self) -> OM1_R[src]
Bit 1 - Pin 1 output mode
pub fn om0(&self) -> OM0_R[src]
Bit 0 - Pin 0 output mode
impl R<u8, OSPD15_A>[src]
pub fn variant(&self) -> Variant<u8, OSPD15_A>[src]
Get enumerated values variant
pub fn is_speed2m(&self) -> bool[src]
Checks if the value of the field is SPEED2M
pub fn is_speed10m(&self) -> bool[src]
Checks if the value of the field is SPEED10M
pub fn is_speed50m(&self) -> bool[src]
Checks if the value of the field is SPEED50M
impl R<u32, Reg<u32, _OSPD>>[src]
pub fn ospd15(&self) -> OSPD15_R[src]
Bits 30:31 - Pin 15 output max speed bits
pub fn ospd14(&self) -> OSPD14_R[src]
Bits 28:29 - Pin 14 output max speed bits
pub fn ospd13(&self) -> OSPD13_R[src]
Bits 26:27 - Pin 13 output max speed bits
pub fn ospd12(&self) -> OSPD12_R[src]
Bits 24:25 - Pin 12 output max speed bits
pub fn ospd11(&self) -> OSPD11_R[src]
Bits 22:23 - Pin 11 output max speed bits
pub fn ospd10(&self) -> OSPD10_R[src]
Bits 20:21 - Pin 10 output max speed bits
pub fn ospd9(&self) -> OSPD9_R[src]
Bits 18:19 - Pin 9 output max speed bits
pub fn ospd8(&self) -> OSPD8_R[src]
Bits 16:17 - Pin 8 output max speed bits
pub fn ospd7(&self) -> OSPD7_R[src]
Bits 14:15 - Pin 7 output max speed bits
pub fn ospd6(&self) -> OSPD6_R[src]
Bits 12:13 - Pin 6 output max speed bits
pub fn ospd5(&self) -> OSPD5_R[src]
Bits 10:11 - Pin 5 output max speed bits
pub fn ospd4(&self) -> OSPD4_R[src]
Bits 8:9 - Pin 4 output max speed bits
pub fn ospd3(&self) -> OSPD3_R[src]
Bits 6:7 - Pin 3 output max speed bits
pub fn ospd2(&self) -> OSPD2_R[src]
Bits 4:5 - Pin 2 output max speed bits
pub fn ospd1(&self) -> OSPD1_R[src]
Bits 2:3 - Pin 1 output max speed bits
pub fn ospd0(&self) -> OSPD0_R[src]
Bits 0:1 - Pin 0 output max speed bits
impl R<u8, PUD15_A>[src]
pub fn variant(&self) -> Variant<u8, PUD15_A>[src]
Get enumerated values variant
pub fn is_floating(&self) -> bool[src]
Checks if the value of the field is FLOATING
pub fn is_pull_up(&self) -> bool[src]
Checks if the value of the field is PULLUP
pub fn is_pull_down(&self) -> bool[src]
Checks if the value of the field is PULLDOWN
impl R<u32, Reg<u32, _PUD>>[src]
pub fn pud15(&self) -> PUD15_R[src]
Bits 30:31 - Pin 15 pull-up or pull-down bits
pub fn pud14(&self) -> PUD14_R[src]
Bits 28:29 - Pin 14 pull-up or pull-down bits
pub fn pud13(&self) -> PUD13_R[src]
Bits 26:27 - Pin 13 pull-up or pull-down bits
pub fn pud12(&self) -> PUD12_R[src]
Bits 24:25 - Pin 12 pull-up or pull-down bits
pub fn pud11(&self) -> PUD11_R[src]
Bits 22:23 - Pin 11 pull-up or pull-down bits
pub fn pud10(&self) -> PUD10_R[src]
Bits 20:21 - Pin 10 pull-up or pull-down bits
pub fn pud9(&self) -> PUD9_R[src]
Bits 18:19 - Pin 9 pull-up or pull-down bits
pub fn pud8(&self) -> PUD8_R[src]
Bits 16:17 - Pin 8 pull-up or pull-down bits
pub fn pud7(&self) -> PUD7_R[src]
Bits 14:15 - Pin 7 pull-up or pull-down bits
pub fn pud6(&self) -> PUD6_R[src]
Bits 12:13 - Pin 6 pull-up or pull-down bits
pub fn pud5(&self) -> PUD5_R[src]
Bits 10:11 - Pin 5 pull-up or pull-down bits
pub fn pud4(&self) -> PUD4_R[src]
Bits 8:9 - Pin 4 pull-up or pull-down bits
pub fn pud3(&self) -> PUD3_R[src]
Bits 6:7 - Pin 3 pull-up or pull-down bits
pub fn pud2(&self) -> PUD2_R[src]
Bits 4:5 - Pin 2 pull-up or pull-down bits
pub fn pud1(&self) -> PUD1_R[src]
Bits 2:3 - Pin 1 pull-up or pull-down bits
pub fn pud0(&self) -> PUD0_R[src]
Bits 0:1 - Pin 0 pull-up or pull-down bits
impl R<bool, ISTAT15_A>[src]
pub fn variant(&self) -> ISTAT15_A[src]
Get enumerated values variant
pub fn is_low(&self) -> bool[src]
Checks if the value of the field is LOW
pub fn is_high(&self) -> bool[src]
Checks if the value of the field is HIGH
impl R<u32, Reg<u32, _ISTAT>>[src]
pub fn istat15(&self) -> ISTAT15_R[src]
Bit 15 - Port input data 14
pub fn istat14(&self) -> ISTAT14_R[src]
Bit 14 - Port input data 14
pub fn istat13(&self) -> ISTAT13_R[src]
Bit 13 - Port input data 13
pub fn istat12(&self) -> ISTAT12_R[src]
Bit 12 - Port input data 12
pub fn istat11(&self) -> ISTAT11_R[src]
Bit 11 - Port input data 11
pub fn istat10(&self) -> ISTAT10_R[src]
Bit 10 - Port input data 10
pub fn istat9(&self) -> ISTAT9_R[src]
Bit 9 - Port input data 9
pub fn istat8(&self) -> ISTAT8_R[src]
Bit 8 - Port input data 8
pub fn istat7(&self) -> ISTAT7_R[src]
Bit 7 - Port input data 7
pub fn istat6(&self) -> ISTAT6_R[src]
Bit 6 - Port input data 6
pub fn istat5(&self) -> ISTAT5_R[src]
Bit 5 - Port input data 5
pub fn istat4(&self) -> ISTAT4_R[src]
Bit 4 - Port input data 4
pub fn istat3(&self) -> ISTAT3_R[src]
Bit 3 - Port input data 3
pub fn istat2(&self) -> ISTAT2_R[src]
Bit 2 - Port input data 2
pub fn istat1(&self) -> ISTAT1_R[src]
Bit 1 - Port input data 1
pub fn istat0(&self) -> ISTAT0_R[src]
Bit 0 - Port input data 0
impl R<bool, OCTL15_A>[src]
pub fn variant(&self) -> OCTL15_A[src]
Get enumerated values variant
pub fn is_low(&self) -> bool[src]
Checks if the value of the field is LOW
pub fn is_high(&self) -> bool[src]
Checks if the value of the field is HIGH
impl R<u32, Reg<u32, _OCTL>>[src]
pub fn octl15(&self) -> OCTL15_R[src]
Bit 15 - Port output data 15
pub fn octl14(&self) -> OCTL14_R[src]
Bit 14 - Port output data 14
pub fn octl13(&self) -> OCTL13_R[src]
Bit 13 - Port output data 13
pub fn octl12(&self) -> OCTL12_R[src]
Bit 12 - Port output data 12
pub fn octl11(&self) -> OCTL11_R[src]
Bit 11 - Port output data 11
pub fn octl10(&self) -> OCTL10_R[src]
Bit 10 - Port output data 10
pub fn octl9(&self) -> OCTL9_R[src]
Bit 9 - Port output data 9
pub fn octl8(&self) -> OCTL8_R[src]
Bit 8 - Port output data 8
pub fn octl7(&self) -> OCTL7_R[src]
Bit 7 - Port output data 7
pub fn octl6(&self) -> OCTL6_R[src]
Bit 6 - Port output data 6
pub fn octl5(&self) -> OCTL5_R[src]
Bit 5 - Port output data 5
pub fn octl4(&self) -> OCTL4_R[src]
Bit 4 - Port output data 4
pub fn octl3(&self) -> OCTL3_R[src]
Bit 3 - Port output data 3
pub fn octl2(&self) -> OCTL2_R[src]
Bit 2 - Port output data 2
pub fn octl1(&self) -> OCTL1_R[src]
Bit 1 - Port output data 1
pub fn octl0(&self) -> OCTL0_R[src]
Bit 0 - Port output data 0
impl R<u8, CTL15_A>[src]
pub fn variant(&self) -> CTL15_A[src]
Get enumerated values variant
pub fn is_input(&self) -> bool[src]
Checks if the value of the field is INPUT
pub fn is_output(&self) -> bool[src]
Checks if the value of the field is OUTPUT
pub fn is_alternate(&self) -> bool[src]
Checks if the value of the field is ALTERNATE
pub fn is_analog(&self) -> bool[src]
Checks if the value of the field is ANALOG
impl R<u32, Reg<u32, _CTL>>[src]
pub fn ctl15(&self) -> CTL15_R[src]
Bits 30:31 - Port x configuration bits (y = 0..15)
pub fn ctl14(&self) -> CTL14_R[src]
Bits 28:29 - Port x configuration bits (y = 0..15)
pub fn ctl13(&self) -> CTL13_R[src]
Bits 26:27 - Port x configuration bits (y = 0..15)
pub fn ctl12(&self) -> CTL12_R[src]
Bits 24:25 - Port x configuration bits (y = 0..15)
pub fn ctl11(&self) -> CTL11_R[src]
Bits 22:23 - Port x configuration bits (y = 0..15)
pub fn ctl10(&self) -> CTL10_R[src]
Bits 20:21 - Port x configuration bits (y = 0..15)
pub fn ctl9(&self) -> CTL9_R[src]
Bits 18:19 - Port x configuration bits (y = 0..15)
pub fn ctl8(&self) -> CTL8_R[src]
Bits 16:17 - Port x configuration bits (y = 0..15)
pub fn ctl7(&self) -> CTL7_R[src]
Bits 14:15 - Port x configuration bits (y = 0..15)
pub fn ctl6(&self) -> CTL6_R[src]
Bits 12:13 - Port x configuration bits (y = 0..15)
pub fn ctl5(&self) -> CTL5_R[src]
Bits 10:11 - Port x configuration bits (y = 0..15)
pub fn ctl4(&self) -> CTL4_R[src]
Bits 8:9 - Port x configuration bits (y = 0..15)
pub fn ctl3(&self) -> CTL3_R[src]
Bits 6:7 - Port x configuration bits (y = 0..15)
pub fn ctl2(&self) -> CTL2_R[src]
Bits 4:5 - Port x configuration bits (y = 0..15)
pub fn ctl1(&self) -> CTL1_R[src]
Bits 2:3 - Port x configuration bits (y = 0..15)
pub fn ctl0(&self) -> CTL0_R[src]
Bits 0:1 - Port x configuration bits (y = 0..15)
impl R<bool, OM15_A>[src]
pub fn variant(&self) -> OM15_A[src]
Get enumerated values variant
pub fn is_push_pull(&self) -> bool[src]
Checks if the value of the field is PUSHPULL
pub fn is_open_drain(&self) -> bool[src]
Checks if the value of the field is OPENDRAIN
impl R<u32, Reg<u32, _OMODE>>[src]
pub fn om15(&self) -> OM15_R[src]
Bit 15 - Pin 15 output mode
pub fn om14(&self) -> OM14_R[src]
Bit 14 - Pin 14 output mode
pub fn om13(&self) -> OM13_R[src]
Bit 13 - Pin 13 output mode
pub fn om12(&self) -> OM12_R[src]
Bit 12 - Pin 12 output mode
pub fn om11(&self) -> OM11_R[src]
Bit 11 - Pin 11 output mode
pub fn om10(&self) -> OM10_R[src]
Bit 10 - Pin 10 output mode
pub fn om9(&self) -> OM9_R[src]
Bit 9 - Pin 9 output mode
pub fn om8(&self) -> OM8_R[src]
Bit 8 - Pin 8 output mode
pub fn om7(&self) -> OM7_R[src]
Bit 7 - Pin 7 output mode
pub fn om6(&self) -> OM6_R[src]
Bit 6 - Pin 6 output mode
pub fn om5(&self) -> OM5_R[src]
Bit 5 - Pin 5 output mode
pub fn om4(&self) -> OM4_R[src]
Bit 4 - Pin 4 output mode
pub fn om3(&self) -> OM3_R[src]
Bit 3 - Pin 3 output mode
pub fn om2(&self) -> OM2_R[src]
Bit 2 - Pin 2 output mode
pub fn om1(&self) -> OM1_R[src]
Bit 1 - Pin 1 output mode
pub fn om0(&self) -> OM0_R[src]
Bit 0 - Pin 0 output mode
impl R<u8, OSPD15_A>[src]
pub fn variant(&self) -> Variant<u8, OSPD15_A>[src]
Get enumerated values variant
pub fn is_speed2m(&self) -> bool[src]
Checks if the value of the field is SPEED2M
pub fn is_speed10m(&self) -> bool[src]
Checks if the value of the field is SPEED10M
pub fn is_speed50m(&self) -> bool[src]
Checks if the value of the field is SPEED50M
impl R<u32, Reg<u32, _OSPD>>[src]
pub fn ospd15(&self) -> OSPD15_R[src]
Bits 30:31 - Pin 15 output max speed bits
pub fn ospd14(&self) -> OSPD14_R[src]
Bits 28:29 - Pin 14 output max speed bits
pub fn ospd13(&self) -> OSPD13_R[src]
Bits 26:27 - Pin 13 output max speed bits
pub fn ospd12(&self) -> OSPD12_R[src]
Bits 24:25 - Pin 12 output max speed bits
pub fn ospd11(&self) -> OSPD11_R[src]
Bits 22:23 - Pin 11 output max speed bits
pub fn ospd10(&self) -> OSPD10_R[src]
Bits 20:21 - Pin 10 output max speed bits
pub fn ospd9(&self) -> OSPD9_R[src]
Bits 18:19 - Pin 9 output max speed bits
pub fn ospd8(&self) -> OSPD8_R[src]
Bits 16:17 - Pin 8 output max speed bits
pub fn ospd7(&self) -> OSPD7_R[src]
Bits 14:15 - Pin 7 output max speed bits
pub fn ospd6(&self) -> OSPD6_R[src]
Bits 12:13 - Pin 6 output max speed bits
pub fn ospd5(&self) -> OSPD5_R[src]
Bits 10:11 - Pin 5 output max speed bits
pub fn ospd4(&self) -> OSPD4_R[src]
Bits 8:9 - Pin 4 output max speed bits
pub fn ospd3(&self) -> OSPD3_R[src]
Bits 6:7 - Pin 3 output max speed bits
pub fn ospd2(&self) -> OSPD2_R[src]
Bits 4:5 - Pin 2 output max speed bits
pub fn ospd1(&self) -> OSPD1_R[src]
Bits 2:3 - Pin 1 output max speed bits
pub fn ospd0(&self) -> OSPD0_R[src]
Bits 0:1 - Pin 0 output max speed bits
impl R<u8, PUD15_A>[src]
pub fn variant(&self) -> Variant<u8, PUD15_A>[src]
Get enumerated values variant
pub fn is_floating(&self) -> bool[src]
Checks if the value of the field is FLOATING
pub fn is_pull_up(&self) -> bool[src]
Checks if the value of the field is PULLUP
pub fn is_pull_down(&self) -> bool[src]
Checks if the value of the field is PULLDOWN
impl R<u32, Reg<u32, _PUD>>[src]
pub fn pud15(&self) -> PUD15_R[src]
Bits 30:31 - Pin 15 pull-up or pull-down bits
pub fn pud14(&self) -> PUD14_R[src]
Bits 28:29 - Pin 14 pull-up or pull-down bits
pub fn pud13(&self) -> PUD13_R[src]
Bits 26:27 - Pin 13 pull-up or pull-down bits
pub fn pud12(&self) -> PUD12_R[src]
Bits 24:25 - Pin 12 pull-up or pull-down bits
pub fn pud11(&self) -> PUD11_R[src]
Bits 22:23 - Pin 11 pull-up or pull-down bits
pub fn pud10(&self) -> PUD10_R[src]
Bits 20:21 - Pin 10 pull-up or pull-down bits
pub fn pud9(&self) -> PUD9_R[src]
Bits 18:19 - Pin 9 pull-up or pull-down bits
pub fn pud8(&self) -> PUD8_R[src]
Bits 16:17 - Pin 8 pull-up or pull-down bits
pub fn pud7(&self) -> PUD7_R[src]
Bits 14:15 - Pin 7 pull-up or pull-down bits
pub fn pud6(&self) -> PUD6_R[src]
Bits 12:13 - Pin 6 pull-up or pull-down bits
pub fn pud5(&self) -> PUD5_R[src]
Bits 10:11 - Pin 5 pull-up or pull-down bits
pub fn pud4(&self) -> PUD4_R[src]
Bits 8:9 - Pin 4 pull-up or pull-down bits
pub fn pud3(&self) -> PUD3_R[src]
Bits 6:7 - Pin 3 pull-up or pull-down bits
pub fn pud2(&self) -> PUD2_R[src]
Bits 4:5 - Pin 2 pull-up or pull-down bits
pub fn pud1(&self) -> PUD1_R[src]
Bits 2:3 - Pin 1 pull-up or pull-down bits
pub fn pud0(&self) -> PUD0_R[src]
Bits 0:1 - Pin 0 pull-up or pull-down bits
impl R<bool, ISTAT15_A>[src]
pub fn variant(&self) -> ISTAT15_A[src]
Get enumerated values variant
pub fn is_low(&self) -> bool[src]
Checks if the value of the field is LOW
pub fn is_high(&self) -> bool[src]
Checks if the value of the field is HIGH
impl R<u32, Reg<u32, _ISTAT>>[src]
pub fn istat15(&self) -> ISTAT15_R[src]
Bit 15 - Port input data 14
pub fn istat14(&self) -> ISTAT14_R[src]
Bit 14 - Port input data 14
pub fn istat13(&self) -> ISTAT13_R[src]
Bit 13 - Port input data 13
pub fn istat12(&self) -> ISTAT12_R[src]
Bit 12 - Port input data 12
pub fn istat11(&self) -> ISTAT11_R[src]
Bit 11 - Port input data 11
pub fn istat10(&self) -> ISTAT10_R[src]
Bit 10 - Port input data 10
pub fn istat9(&self) -> ISTAT9_R[src]
Bit 9 - Port input data 9
pub fn istat8(&self) -> ISTAT8_R[src]
Bit 8 - Port input data 8
pub fn istat7(&self) -> ISTAT7_R[src]
Bit 7 - Port input data 7
pub fn istat6(&self) -> ISTAT6_R[src]
Bit 6 - Port input data 6
pub fn istat5(&self) -> ISTAT5_R[src]
Bit 5 - Port input data 5
pub fn istat4(&self) -> ISTAT4_R[src]
Bit 4 - Port input data 4
pub fn istat3(&self) -> ISTAT3_R[src]
Bit 3 - Port input data 3
pub fn istat2(&self) -> ISTAT2_R[src]
Bit 2 - Port input data 2
pub fn istat1(&self) -> ISTAT1_R[src]
Bit 1 - Port input data 1
pub fn istat0(&self) -> ISTAT0_R[src]
Bit 0 - Port input data 0
impl R<bool, OCTL15_A>[src]
pub fn variant(&self) -> OCTL15_A[src]
Get enumerated values variant
pub fn is_low(&self) -> bool[src]
Checks if the value of the field is LOW
pub fn is_high(&self) -> bool[src]
Checks if the value of the field is HIGH
impl R<u32, Reg<u32, _OCTL>>[src]
pub fn octl15(&self) -> OCTL15_R[src]
Bit 15 - Port output data 15
pub fn octl14(&self) -> OCTL14_R[src]
Bit 14 - Port output data 14
pub fn octl13(&self) -> OCTL13_R[src]
Bit 13 - Port output data 13
pub fn octl12(&self) -> OCTL12_R[src]
Bit 12 - Port output data 12
pub fn octl11(&self) -> OCTL11_R[src]
Bit 11 - Port output data 11
pub fn octl10(&self) -> OCTL10_R[src]
Bit 10 - Port output data 10
pub fn octl9(&self) -> OCTL9_R[src]
Bit 9 - Port output data 9
pub fn octl8(&self) -> OCTL8_R[src]
Bit 8 - Port output data 8
pub fn octl7(&self) -> OCTL7_R[src]
Bit 7 - Port output data 7
pub fn octl6(&self) -> OCTL6_R[src]
Bit 6 - Port output data 6
pub fn octl5(&self) -> OCTL5_R[src]
Bit 5 - Port output data 5
pub fn octl4(&self) -> OCTL4_R[src]
Bit 4 - Port output data 4
pub fn octl3(&self) -> OCTL3_R[src]
Bit 3 - Port output data 3
pub fn octl2(&self) -> OCTL2_R[src]
Bit 2 - Port output data 2
pub fn octl1(&self) -> OCTL1_R[src]
Bit 1 - Port output data 1
pub fn octl0(&self) -> OCTL0_R[src]
Bit 0 - Port output data 0
impl R<u16, Reg<u16, _CTL0>>[src]
pub fn sreset(&self) -> SRESET_R[src]
Bit 15 - Software reset I2C
pub fn salt(&self) -> SALT_R[src]
Bit 13 - SMBus alert
pub fn pectrans(&self) -> PECTRANS_R[src]
Bit 12 - PEC Transfer
pub fn poap(&self) -> POAP_R[src]
Bit 11 - Position of ACK meaning
pub fn acken(&self) -> ACKEN_R[src]
Bit 10 - Whether or not to send an ACK
pub fn stop(&self) -> STOP_R[src]
Bit 9 - Generate a STOP condition on I2C bus
pub fn start(&self) -> START_R[src]
Bit 8 - Generate a START condition on I2C bus
pub fn disstrc(&self) -> DISSTRC_R[src]
Bit 7 - Whether to stretch SCL low when data is not ready in slave mode
pub fn gcen(&self) -> GCEN_R[src]
Bit 6 - Whether or not to response to a General Call (0x00)
pub fn pecen(&self) -> PECEN_R[src]
Bit 5 - PEC Calculation Switch
pub fn arpen(&self) -> ARPEN_R[src]
Bit 4 - ARP protocol in SMBus switch
pub fn smbsel(&self) -> SMBSEL_R[src]
Bit 3 - SMBusType Selection
pub fn smben(&self) -> SMBEN_R[src]
Bit 1 - SMBus/I2C mode switch
pub fn i2cen(&self) -> I2CEN_R[src]
Bit 0 - I2C peripheral enable
impl R<u16, Reg<u16, _CTL1>>[src]
pub fn dmalst(&self) -> DMALST_R[src]
Bit 12 - Flag indicating DMA last transfer
pub fn dmaon(&self) -> DMAON_R[src]
Bit 11 - DMA mode switch
pub fn bufie(&self) -> BUFIE_R[src]
Bit 10 - Buffer interrupt enable
pub fn evie(&self) -> EVIE_R[src]
Bit 9 - Event interrupt enable
pub fn errie(&self) -> ERRIE_R[src]
Bit 8 - Error interrupt enable
pub fn i2cclk(&self) -> I2CCLK_R[src]
Bits 0:5 - I2C Peripheral clock frequency
impl R<u16, Reg<u16, _SADDR0>>[src]
pub fn addformat(&self) -> ADDFORMAT_R[src]
Bit 15 - Address mode for the I2C slave
pub fn address(&self) -> ADDRESS_R[src]
Bits 0:9 - Interface address
impl R<u16, Reg<u16, _SADDR1>>[src]
pub fn address2(&self) -> ADDRESS2_R[src]
Bits 1:7 - Second I2C address for the slave in Dual-Address mode
pub fn duaden(&self) -> DUADEN_R[src]
Bit 0 - Dual-Address mode switch
impl R<u16, Reg<u16, _DATA>>[src]
impl R<u16, Reg<u16, _STAT0>>[src]
pub fn smbalts(&self) -> SMBALTS_R[src]
Bit 15 - SMBus Alert status
pub fn smbto(&self) -> SMBTO_R[src]
Bit 14 - Timeout signal in SMBus mode
pub fn pecerr(&self) -> PECERR_R[src]
Bit 12 - PEC error when receiving data
pub fn ouerr(&self) -> OUERR_R[src]
Bit 11 - Over-run or under-run situation occurs in slave mode
pub fn aerr(&self) -> AERR_R[src]
Bit 10 - Acknowledge error
pub fn lostarb(&self) -> LOSTARB_R[src]
Bit 9 - Arbitration Lost in master mode
pub fn be(&self) -> BE_R[src]
Bit 8 - Bus error
pub fn tbe(&self) -> TBE_R[src]
Bit 7 - I2C_DATA is Empty during transmitting
pub fn rbne(&self) -> RBNE_R[src]
Bit 6 - TRBR is not Empty during receiving
pub fn stpdet(&self) -> STPDET_R[src]
Bit 4 - STOP condition detected in slave mode
pub fn add10send(&self) -> ADD10SEND_R[src]
Bit 3 - Header of 10-bit address is sent in master mode
pub fn btc(&self) -> BTC_R[src]
Bit 2 - Byte transmission completed
pub fn addsend(&self) -> ADDSEND_R[src]
Bit 1 - Address is sent in master mode or received and matches in slave mode
pub fn sbsend(&self) -> SBSEND_R[src]
Bit 0 - START condition sent out in master mode
impl R<u16, Reg<u16, _STAT1>>[src]
pub fn ecv(&self) -> ECV_R[src]
Bits 8:15 - Packet Error Checking Value
pub fn dumodf(&self) -> DUMODF_R[src]
Bit 7 - Dual Flag in slave mode
pub fn hstsmb(&self) -> HSTSMB_R[src]
Bit 6 - SMBus Host Header detected in slave mode
pub fn defsmb(&self) -> DEFSMB_R[src]
Bit 5 - SMBus host header in slave mode
pub fn rxgc(&self) -> RXGC_R[src]
Bit 4 - General call address (00h) received
pub fn trs(&self) -> TRS_R[src]
Bit 2 - Whether the I2C is a transmitter or a receiver
pub fn i2cbsy(&self) -> I2CBSY_R[src]
Bit 1 - Busy flag
pub fn master(&self) -> MASTER_R[src]
Bit 0 - A flag indicating whether I2C block is in master or slave mode
impl R<u16, Reg<u16, _CKCFG>>[src]
pub fn fast(&self) -> FAST_R[src]
Bit 15 - I2C speed selection in master mode
pub fn dtcy(&self) -> DTCY_R[src]
Bit 14 - Duty cycle in fast mode
pub fn clkc(&self) -> CLKC_R[src]
Bits 0:11 - I2C Clock control in master mode
impl R<u32, Reg<u32, _RT>>[src]
pub fn risetime(&self) -> RISETIME_R[src]
Bits 0:5 - Maximum rise time in master mode
impl R<u32, Reg<u32, _SAMCS>>[src]
pub fn samen(&self) -> SAMEN_R[src]
Bit 0 - SAM_V interface enable
pub fn stoen(&self) -> STOEN_R[src]
Bit 1 - SAM_V interface timeout detect enable
pub fn tffie(&self) -> TFFIE_R[src]
Bit 4 - Txframe fall interrupt enable
pub fn tfrie(&self) -> TFRIE_R[src]
Bit 5 - Txframe rise interrupt enable
pub fn rffie(&self) -> RFFIE_R[src]
Bit 6 - Rxframe fall interrupt enable
pub fn rfrie(&self) -> RFRIE_R[src]
Bit 7 - Rxframe rise interrupt enable
pub fn txf(&self) -> TXF_R[src]
Bit 8 - Level of Txframe signal
pub fn rxf(&self) -> RXF_R[src]
Bit 9 - Level of Rxframe signal
pub fn tff(&self) -> TFF_R[src]
Bit 12 - Txframe fall flag
pub fn tfr(&self) -> TFR_R[src]
Bit 13 - Txframe rise flag
pub fn rff(&self) -> RFF_R[src]
Bit 14 - Rxframe fall flag
pub fn rfr(&self) -> RFR_R[src]
Bit 15 - Rxframe rise flag
impl R<u32, Reg<u32, _OPA_CTL>>[src]
pub fn opa0pd(&self) -> OPA0PD_R[src]
Bit 0 - OPA0 power down
pub fn t3opa0(&self) -> T3OPA0_R[src]
Bit 1 - T3 switch enable for OPA0
pub fn s1opa0(&self) -> S1OPA0_R[src]
Bit 2 - S1 switch enable for OPA0
pub fn s2opa0(&self) -> S2OPA0_R[src]
Bit 3 - S2 switch enable for OPA0
pub fn s3opa0(&self) -> S3OPA0_R[src]
Bit 4 - S3 switch enable for OPA0
pub fn opa0cal_l(&self) -> OPA0CAL_L_R[src]
Bit 5 - OPA0 offset calibration for P diff
pub fn opa0cal_h(&self) -> OPA0CAL_H_R[src]
Bit 6 - OPA0 offset calibration for N diff
pub fn opa0lpm(&self) -> OPA0LPM_R[src]
Bit 7 - OPA0 low power mode
pub fn opa1pd(&self) -> OPA1PD_R[src]
Bit 8 - OPA1 power down
pub fn t3opa1(&self) -> T3OPA1_R[src]
Bit 9 - T3 switch enable for OPA1
pub fn s1opa1(&self) -> S1OPA1_R[src]
Bit 10 - S1 switch enable for OPA1
pub fn s2opa1(&self) -> S2OPA1_R[src]
Bit 11 - S2 switch enable for OPA1
pub fn s3opa1(&self) -> S3OPA1_R[src]
Bit 12 - S3 switch enable for OPA1
pub fn opa1cal_l(&self) -> OPA1CAL_L_R[src]
Bit 13 - OPA1 offset calibration for P diff
pub fn opa1cal_h(&self) -> OPA1CAL_H_R[src]
Bit 14 - OPA1 offset calibration for N diff
pub fn opa1lpm(&self) -> OPA1LPM_R[src]
Bit 15 - OPA1 low power mode
pub fn opa2pd(&self) -> OPA2PD_R[src]
Bit 16 - OPA2 power down
pub fn t3opa2(&self) -> T3OPA2_R[src]
Bit 17 - T3 switch enable for OPA2
pub fn s1opa2(&self) -> S1OPA2_R[src]
Bit 18 - S1 switch enable for OPA2
pub fn s2opa2(&self) -> S2OPA2_R[src]
Bit 19 - S2 switch enable for OPA2
pub fn s3opa2(&self) -> S3OPA2_R[src]
Bit 20 - S3 switch enable for OPA2
pub fn opa2cal_l(&self) -> OPA2CAL_L_R[src]
Bit 21 - OPA2 offset calibration for P diff
pub fn opa2cal_h(&self) -> OPA2CAL_H_R[src]
Bit 22 - OPA2 offset calibration for N diff
pub fn opa2lpm(&self) -> OPA2LPM_R[src]
Bit 23 - OPA2 low power mode
pub fn s4opa1(&self) -> S4OPA1_R[src]
Bit 27 - S4 switch enable for OPA1
pub fn opa_range(&self) -> OPA_RANGE_R[src]
Bit 28 - Power supply range
pub fn opa0calout(&self) -> OPA0CALOUT_R[src]
Bit 29 - OPA0 calibration output
pub fn opa1calout(&self) -> OPA1CALOUT_R[src]
Bit 30 - OPA1 calibration output
pub fn opa2calout(&self) -> OPA2CALOUT_R[src]
Bit 31 - OPA2 calibration output
impl R<u32, Reg<u32, _OPA_BT>>[src]
pub fn oa0_trim_low(&self) -> OA0_TRIM_LOW_R[src]
Bits 0:4 - OPA0, normal mode 5-bit offset trim value for PMOS pairs
pub fn oa0_trim_high(&self) -> OA0_TRIM_HIGH_R[src]
Bits 5:9 - OPA0, normal mode 5-bit offset trim value for NMOS pairs
pub fn oa1_trim_low(&self) -> OA1_TRIM_LOW_R[src]
Bits 10:14 - OPA1, normal mode 5-bit offset trim value for PMOS pairs
pub fn oa1_trim_high(&self) -> OA1_TRIM_HIGH_R[src]
Bits 15:19 - OPA1, normal mode 5-bit offset trim value for NMOS pairs
pub fn oa2_trim_low(&self) -> OA2_TRIM_LOW_R[src]
Bits 20:24 - OPA2, normal mode 5-bit offset trim value for PMOS pairs
pub fn oa2_trim_high(&self) -> OA2_TRIM_HIGH_R[src]
Bits 25:29 - OPA2, normal mode 5-bit offset trim value for NMOS pairs
pub fn ot_user(&self) -> OT_USER_R[src]
Bit 31 - user programmed trimming value
impl R<u32, Reg<u32, _OPA_LPBT>>[src]
pub fn oa0_trim_lp_low(&self) -> OA0_TRIM_LP_LOW_R[src]
Bits 0:4 - OPA0, low power mode 5-bit offset trim value for PMOS pairs
pub fn oa0_trim_lp_high(&self) -> OA0_TRIM_LP_HIGH_R[src]
Bits 5:9 - OPA0, low power mode 5-bit offset trim value for NMOS pairs
pub fn oa1_trim_lp_low(&self) -> OA1_TRIM_LP_LOW_R[src]
Bits 10:14 - OPA1, low power mode 5-bit offset trim value for PMOS pairs
pub fn oa1_trim_lp_high(&self) -> OA1_TRIM_LP_HIGH_R[src]
Bits 15:19 - OPA1, low power mode 5-bit offset trim value for NMOS pairs
pub fn oa2_trim_lp_low(&self) -> OA2_TRIM_LP_LOW_R[src]
Bits 20:24 - OPA2, low power mode 5-bit offset trim value for PMOS pairs
pub fn oa2_trim_lp_high(&self) -> OA2_TRIM_LP_HIGH_R[src]
Bits 25:29 - OPA2, low power mode 5-bit offset trim value for NMOS pairs
impl R<u32, Reg<u32, _IVREF_CTL>>[src]
pub fn csdt(&self) -> CSDT_R[src]
Bits 0:5 - Current step data
pub fn scmod(&self) -> SCMOD_R[src]
Bit 7 - Sink current mode
pub fn cpt(&self) -> CPT_R[src]
Bits 8:12 - Current precision trim
pub fn ssel(&self) -> SSEL_R[src]
Bit 14 - Step selection
pub fn cren(&self) -> CREN_R[src]
Bit 15 - Current reference enable
pub fn vpt(&self) -> VPT_R[src]
Bits 24:28 - Voltage precision tirm
pub fn decap(&self) -> DECAP_R[src]
Bit 30 - Disconnect external capacitor
pub fn vren(&self) -> VREN_R[src]
Bit 31 - Voltage reference enable
impl R<bool, BKPWEN_A>[src]
pub fn variant(&self) -> BKPWEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u8, LVDT_A>[src]
pub fn variant(&self) -> LVDT_A[src]
Get enumerated values variant
pub fn is_v2_2(&self) -> bool[src]
Checks if the value of the field is V2_2
pub fn is_v2_3(&self) -> bool[src]
Checks if the value of the field is V2_3
pub fn is_v2_4(&self) -> bool[src]
Checks if the value of the field is V2_4
pub fn is_v2_5(&self) -> bool[src]
Checks if the value of the field is V2_5
pub fn is_v2_6(&self) -> bool[src]
Checks if the value of the field is V2_6
pub fn is_v2_7(&self) -> bool[src]
Checks if the value of the field is V2_7
pub fn is_v2_8(&self) -> bool[src]
Checks if the value of the field is V2_8
pub fn is_v2_9(&self) -> bool[src]
Checks if the value of the field is V2_9
impl R<bool, LVDEN_A>[src]
pub fn variant(&self) -> LVDEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, STBRST_A>[src]
pub fn variant(&self) -> Variant<bool, STBRST_A>[src]
Get enumerated values variant
pub fn is_clear(&self) -> bool[src]
Checks if the value of the field is CLEAR
impl R<bool, WURST_A>[src]
pub fn variant(&self) -> Variant<bool, WURST_A>[src]
Get enumerated values variant
pub fn is_clear(&self) -> bool[src]
Checks if the value of the field is CLEAR
impl R<bool, STBMOD_A>[src]
pub fn variant(&self) -> STBMOD_A[src]
Get enumerated values variant
pub fn is_deep_sleep(&self) -> bool[src]
Checks if the value of the field is DEEPSLEEP
pub fn is_standby(&self) -> bool[src]
Checks if the value of the field is STANDBY
impl R<bool, LDOLP_A>[src]
pub fn variant(&self) -> LDOLP_A[src]
Get enumerated values variant
pub fn is_normal(&self) -> bool[src]
Checks if the value of the field is NORMAL
pub fn is_low_power(&self) -> bool[src]
Checks if the value of the field is LOWPOWER
impl R<u32, Reg<u32, _CTL>>[src]
pub fn bkpwen(&self) -> BKPWEN_R[src]
Bit 8 - Backup Domain Write Enable
pub fn lvdt(&self) -> LVDT_R[src]
Bits 5:7 - Low Voltage Detector Threshold
pub fn lvden(&self) -> LVDEN_R[src]
Bit 4 - Low Voltage Detector Enable
pub fn stbrst(&self) -> STBRST_R[src]
Bit 3 - Standby Flag Reset
pub fn wurst(&self) -> WURST_R[src]
Bit 2 - Wakeup Flag Reset
pub fn stbmod(&self) -> STBMOD_R[src]
Bit 1 - Standby Mode
pub fn ldolp(&self) -> LDOLP_R[src]
Bit 0 - LDO Low Power Mode
impl R<bool, WUPEN1_A>[src]
pub fn variant(&self) -> WUPEN1_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, WUPEN0_A>[src]
pub fn variant(&self) -> WUPEN0_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, LVDF_A>[src]
pub fn variant(&self) -> LVDF_A[src]
Get enumerated values variant
pub fn is_above_threshold(&self) -> bool[src]
Checks if the value of the field is ABOVETHRESHOLD
pub fn is_below_threshold(&self) -> bool[src]
Checks if the value of the field is BELOWTHRESHOLD
impl R<bool, STBF_A>[src]
pub fn variant(&self) -> STBF_A[src]
Get enumerated values variant
pub fn is_no_standby_event(&self) -> bool[src]
Checks if the value of the field is NOSTANDBYEVENT
pub fn is_standby_event(&self) -> bool[src]
Checks if the value of the field is STANDBYEVENT
impl R<bool, WUF_A>[src]
pub fn variant(&self) -> WUF_A[src]
Get enumerated values variant
pub fn is_no_wakeup_event(&self) -> bool[src]
Checks if the value of the field is NOWAKEUPEVENT
pub fn is_wakeup_event(&self) -> bool[src]
Checks if the value of the field is WAKEUPEVENT
impl R<u32, Reg<u32, _CS>>[src]
pub fn wupen1(&self) -> WUPEN1_R[src]
Bit 9 - WKUPN1 Pin Enable
pub fn wupen0(&self) -> WUPEN0_R[src]
Bit 8 - Enable WKUP pin
pub fn lvdf(&self) -> LVDF_R[src]
Bit 2 - Low Voltage Detector Status Flag
pub fn stbf(&self) -> STBF_R[src]
Bit 1 - Standby flag
pub fn wuf(&self) -> WUF_R[src]
Bit 0 - Wakeup flag
impl R<bool, IRC8MEN_A>[src]
pub fn variant(&self) -> IRC8MEN_A[src]
Get enumerated values variant
pub fn is_off(&self) -> bool[src]
Checks if the value of the field is OFF
pub fn is_on(&self) -> bool[src]
Checks if the value of the field is ON
impl R<bool, IRC8MSTB_A>[src]
pub fn variant(&self) -> IRC8MSTB_A[src]
Get enumerated values variant
pub fn is_not_ready(&self) -> bool[src]
Checks if the value of the field is NOTREADY
pub fn is_ready(&self) -> bool[src]
Checks if the value of the field is READY
impl R<bool, HXTALSTB_A>[src]
pub fn variant(&self) -> HXTALSTB_A[src]
Get enumerated values variant
pub fn is_not_ready(&self) -> bool[src]
Checks if the value of the field is NOTREADY
pub fn is_ready(&self) -> bool[src]
Checks if the value of the field is READY
impl R<bool, HXTALBPS_A>[src]
pub fn variant(&self) -> HXTALBPS_A[src]
Get enumerated values variant
pub fn is_not_bypassed(&self) -> bool[src]
Checks if the value of the field is NOTBYPASSED
pub fn is_bypassed(&self) -> bool[src]
Checks if the value of the field is BYPASSED
impl R<bool, CKMEN_A>[src]
pub fn variant(&self) -> CKMEN_A[src]
Get enumerated values variant
pub fn is_off(&self) -> bool[src]
Checks if the value of the field is OFF
pub fn is_on(&self) -> bool[src]
Checks if the value of the field is ON
impl R<bool, PLLSTB_A>[src]
pub fn variant(&self) -> PLLSTB_A[src]
Get enumerated values variant
pub fn is_not_ready(&self) -> bool[src]
Checks if the value of the field is NOTREADY
pub fn is_ready(&self) -> bool[src]
Checks if the value of the field is READY
impl R<u32, Reg<u32, _CTL0>>[src]
pub fn irc8men(&self) -> IRC8MEN_R[src]
Bit 0 - Internal High Speed oscillator Enable
pub fn irc8mstb(&self) -> IRC8MSTB_R[src]
Bit 1 - IRC8M High Speed Internal Oscillator stabilization Flag
pub fn irc8madj(&self) -> IRC8MADJ_R[src]
Bits 3:7 - High Speed Internal Oscillator clock trim adjust value
pub fn irc8mcalib(&self) -> IRC8MCALIB_R[src]
Bits 8:15 - High Speed Internal Oscillator calibration value register
pub fn hxtalen(&self) -> HXTALEN_R[src]
Bit 16 - External High Speed oscillator Enable
pub fn hxtalstb(&self) -> HXTALSTB_R[src]
Bit 17 - External crystal oscillator (HXTAL) clock stabilization flag
pub fn hxtalbps(&self) -> HXTALBPS_R[src]
Bit 18 - External crystal oscillator (HXTAL) clock bypass mode enable
pub fn ckmen(&self) -> CKMEN_R[src]
Bit 19 - HXTAL Clock Monitor Enable
pub fn pllen(&self) -> PLLEN_R[src]
Bit 24 - PLL enable
pub fn pllstb(&self) -> PLLSTB_R[src]
Bit 25 - PLL Clock Stabilization Flag
impl R<u8, SCS_A>[src]
pub fn variant(&self) -> Variant<u8, SCS_A>[src]
Get enumerated values variant
pub fn is_irc8m(&self) -> bool[src]
Checks if the value of the field is IRC8M
pub fn is_hxtal(&self) -> bool[src]
Checks if the value of the field is HXTAL
pub fn is_pll(&self) -> bool[src]
Checks if the value of the field is PLL
impl R<u8, SCSS_A>[src]
pub fn variant(&self) -> Variant<u8, SCSS_A>[src]
Get enumerated values variant
pub fn is_irc8m(&self) -> bool[src]
Checks if the value of the field is IRC8M
pub fn is_hxtal(&self) -> bool[src]
Checks if the value of the field is HXTAL
pub fn is_pll(&self) -> bool[src]
Checks if the value of the field is PLL
impl R<u8, AHBPSC_A>[src]
pub fn variant(&self) -> Variant<u8, AHBPSC_A>[src]
Get enumerated values variant
pub fn is_div1(&self) -> bool[src]
Checks if the value of the field is DIV1
pub fn is_div2(&self) -> bool[src]
Checks if the value of the field is DIV2
pub fn is_div4(&self) -> bool[src]
Checks if the value of the field is DIV4
pub fn is_div8(&self) -> bool[src]
Checks if the value of the field is DIV8
pub fn is_div16(&self) -> bool[src]
Checks if the value of the field is DIV16
pub fn is_div64(&self) -> bool[src]
Checks if the value of the field is DIV64
pub fn is_div128(&self) -> bool[src]
Checks if the value of the field is DIV128
pub fn is_div256(&self) -> bool[src]
Checks if the value of the field is DIV256
pub fn is_div512(&self) -> bool[src]
Checks if the value of the field is DIV512
impl R<u8, APB1PSC_A>[src]
pub fn variant(&self) -> Variant<u8, APB1PSC_A>[src]
Get enumerated values variant
pub fn is_div1(&self) -> bool[src]
Checks if the value of the field is DIV1
pub fn is_div2(&self) -> bool[src]
Checks if the value of the field is DIV2
pub fn is_div4(&self) -> bool[src]
Checks if the value of the field is DIV4
pub fn is_div8(&self) -> bool[src]
Checks if the value of the field is DIV8
pub fn is_div16(&self) -> bool[src]
Checks if the value of the field is DIV16
impl R<u8, ADCPSC_A>[src]
pub fn variant(&self) -> ADCPSC_A[src]
Get enumerated values variant
pub fn is_div2(&self) -> bool[src]
Checks if the value of the field is DIV2
pub fn is_div4(&self) -> bool[src]
Checks if the value of the field is DIV4
pub fn is_div6(&self) -> bool[src]
Checks if the value of the field is DIV6
pub fn is_div8(&self) -> bool[src]
Checks if the value of the field is DIV8
impl R<bool, PLLSEL_A>[src]
pub fn variant(&self) -> PLLSEL_A[src]
Get enumerated values variant
pub fn is_irc8m_2(&self) -> bool[src]
Checks if the value of the field is IRC8M_2
pub fn is_hxtal(&self) -> bool[src]
Checks if the value of the field is HXTAL
impl R<bool, PLLPREDV_A>[src]
pub fn variant(&self) -> PLLPREDV_A[src]
Get enumerated values variant
pub fn is_div1(&self) -> bool[src]
Checks if the value of the field is DIV1
pub fn is_div2(&self) -> bool[src]
Checks if the value of the field is DIV2
impl R<u8, PLLMF_A>[src]
pub fn variant(&self) -> PLLMF_A[src]
Get enumerated values variant
pub fn is_mul2(&self) -> bool[src]
Checks if the value of the field is MUL2
pub fn is_mul3(&self) -> bool[src]
Checks if the value of the field is MUL3
pub fn is_mul4(&self) -> bool[src]
Checks if the value of the field is MUL4
pub fn is_mul5(&self) -> bool[src]
Checks if the value of the field is MUL5
pub fn is_mul6(&self) -> bool[src]
Checks if the value of the field is MUL6
pub fn is_mul7(&self) -> bool[src]
Checks if the value of the field is MUL7
pub fn is_mul8(&self) -> bool[src]
Checks if the value of the field is MUL8
pub fn is_mul9(&self) -> bool[src]
Checks if the value of the field is MUL9
pub fn is_mul10(&self) -> bool[src]
Checks if the value of the field is MUL10
pub fn is_mul11(&self) -> bool[src]
Checks if the value of the field is MUL11
pub fn is_mul12(&self) -> bool[src]
Checks if the value of the field is MUL12
pub fn is_mul13(&self) -> bool[src]
Checks if the value of the field is MUL13
pub fn is_mul14(&self) -> bool[src]
Checks if the value of the field is MUL14
pub fn is_mul15(&self) -> bool[src]
Checks if the value of the field is MUL15
pub fn is_mul16(&self) -> bool[src]
Checks if the value of the field is MUL16
pub fn is_mul16x(&self) -> bool[src]
Checks if the value of the field is MUL16X
impl R<u8, USBDPSC_A>[src]
pub fn variant(&self) -> USBDPSC_A[src]
Get enumerated values variant
pub fn is_div1_5(&self) -> bool[src]
Checks if the value of the field is DIV1_5
pub fn is_div1(&self) -> bool[src]
Checks if the value of the field is DIV1
pub fn is_div2_5(&self) -> bool[src]
Checks if the value of the field is DIV2_5
pub fn is_div2(&self) -> bool[src]
Checks if the value of the field is DIV2
impl R<u8, CKOUTSEL_A>[src]
pub fn variant(&self) -> CKOUTSEL_A[src]
Get enumerated values variant
pub fn is_none(&self) -> bool[src]
Checks if the value of the field is NONE
pub fn is_irc14m(&self) -> bool[src]
Checks if the value of the field is IRC14M
pub fn is_lsi40k(&self) -> bool[src]
Checks if the value of the field is LSI40K
pub fn is_lxtal(&self) -> bool[src]
Checks if the value of the field is LXTAL
pub fn is_sysclk(&self) -> bool[src]
Checks if the value of the field is SYSCLK
pub fn is_irc8m(&self) -> bool[src]
Checks if the value of the field is IRC8M
pub fn is_hxtal(&self) -> bool[src]
Checks if the value of the field is HXTAL
pub fn is_pll(&self) -> bool[src]
Checks if the value of the field is PLL
impl R<bool, PLLMF_MSB_A>[src]
pub fn variant(&self) -> PLLMF_MSB_A[src]
Get enumerated values variant
pub fn is_none(&self) -> bool[src]
Checks if the value of the field is NONE
pub fn is_plus15(&self) -> bool[src]
Checks if the value of the field is PLUS15
impl R<u8, CKOUTDIV_A>[src]
pub fn variant(&self) -> CKOUTDIV_A[src]
Get enumerated values variant
pub fn is_div1(&self) -> bool[src]
Checks if the value of the field is DIV1
pub fn is_div2(&self) -> bool[src]
Checks if the value of the field is DIV2
pub fn is_div4(&self) -> bool[src]
Checks if the value of the field is DIV4
pub fn is_div8(&self) -> bool[src]
Checks if the value of the field is DIV8
pub fn is_div16(&self) -> bool[src]
Checks if the value of the field is DIV16
pub fn is_div32(&self) -> bool[src]
Checks if the value of the field is DIV32
pub fn is_div64(&self) -> bool[src]
Checks if the value of the field is DIV64
pub fn is_div128(&self) -> bool[src]
Checks if the value of the field is DIV128
impl R<bool, PLLDV_A>[src]
pub fn variant(&self) -> PLLDV_A[src]
Get enumerated values variant
pub fn is_div2(&self) -> bool[src]
Checks if the value of the field is DIV2
pub fn is_div1(&self) -> bool[src]
Checks if the value of the field is DIV1
impl R<u32, Reg<u32, _CFG0>>[src]
pub fn scs(&self) -> SCS_R[src]
Bits 0:1 - System clock switch
pub fn scss(&self) -> SCSS_R[src]
Bits 2:3 - System clock switch status
pub fn ahbpsc(&self) -> AHBPSC_R[src]
Bits 4:7 - AHB prescaler selection
pub fn apb1psc(&self) -> APB1PSC_R[src]
Bits 8:10 - APB1 prescaler selection
pub fn apb2psc(&self) -> APB2PSC_R[src]
Bits 11:13 - APB2 prescaler selection
pub fn adcpsc(&self) -> ADCPSC_R[src]
Bits 14:15 - ADC clock prescaler selection
pub fn pllsel(&self) -> PLLSEL_R[src]
Bit 16 - PLL Clock Source Selection
pub fn pllpredv(&self) -> PLLPREDV_R[src]
Bit 17 - HXTAL divider for PLL source clock selection.
pub fn pllmf(&self) -> PLLMF_R[src]
Bits 18:21 - PLL multiply factor
pub fn usbdpsc(&self) -> USBDPSC_R[src]
Bits 22:23 - USBD clock prescaler selection
pub fn ckoutsel(&self) -> CKOUTSEL_R[src]
Bits 24:26 - CK_OUT Clock Source Selection
pub fn pllmf_msb(&self) -> PLLMF_MSB_R[src]
Bit 27 - Bit 4 of PLLMF register
pub fn ckoutdiv(&self) -> CKOUTDIV_R[src]
Bits 28:30 - The CK_OUT divider which the CK_OUT frequency can be reduced
pub fn plldv(&self) -> PLLDV_R[src]
Bit 31 - The CK_PLL divide by 1 or 2 for CK_OUT
impl R<bool, IRC40KSTBIF_A>[src]
pub fn variant(&self) -> IRC40KSTBIF_A[src]
Get enumerated values variant
pub fn is_not_interrupted(&self) -> bool[src]
Checks if the value of the field is NOTINTERRUPTED
pub fn is_interrupted(&self) -> bool[src]
Checks if the value of the field is INTERRUPTED
impl R<bool, LXTALSTBIF_A>[src]
pub fn variant(&self) -> LXTALSTBIF_A[src]
Get enumerated values variant
pub fn is_not_interrupted(&self) -> bool[src]
Checks if the value of the field is NOTINTERRUPTED
pub fn is_interrupted(&self) -> bool[src]
Checks if the value of the field is INTERRUPTED
impl R<bool, IRC8MSTBIF_A>[src]
pub fn variant(&self) -> IRC8MSTBIF_A[src]
Get enumerated values variant
pub fn is_not_interrupted(&self) -> bool[src]
Checks if the value of the field is NOTINTERRUPTED
pub fn is_interrupted(&self) -> bool[src]
Checks if the value of the field is INTERRUPTED
impl R<bool, HXTALSTBIF_A>[src]
pub fn variant(&self) -> HXTALSTBIF_A[src]
Get enumerated values variant
pub fn is_not_interrupted(&self) -> bool[src]
Checks if the value of the field is NOTINTERRUPTED
pub fn is_interrupted(&self) -> bool[src]
Checks if the value of the field is INTERRUPTED
impl R<bool, PLLSTBIF_A>[src]
pub fn variant(&self) -> PLLSTBIF_A[src]
Get enumerated values variant
pub fn is_not_interrupted(&self) -> bool[src]
Checks if the value of the field is NOTINTERRUPTED
pub fn is_interrupted(&self) -> bool[src]
Checks if the value of the field is INTERRUPTED
impl R<bool, IRC14MSTBIF_A>[src]
pub fn variant(&self) -> IRC14MSTBIF_A[src]
Get enumerated values variant
pub fn is_not_interrupted(&self) -> bool[src]
Checks if the value of the field is NOTINTERRUPTED
pub fn is_interrupted(&self) -> bool[src]
Checks if the value of the field is INTERRUPTED
impl R<bool, CKMIF_A>[src]
pub fn variant(&self) -> CKMIF_A[src]
Get enumerated values variant
pub fn is_not_interrupted(&self) -> bool[src]
Checks if the value of the field is NOTINTERRUPTED
pub fn is_interrupted(&self) -> bool[src]
Checks if the value of the field is INTERRUPTED
impl R<bool, IRC40KSTBIE_A>[src]
pub fn variant(&self) -> IRC40KSTBIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, LXTALSTBIE_A>[src]
pub fn variant(&self) -> LXTALSTBIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, IRC8MSTBIE_A>[src]
pub fn variant(&self) -> IRC8MSTBIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, HXTALSTBIE_A>[src]
pub fn variant(&self) -> HXTALSTBIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, PLLSTBIE_A>[src]
pub fn variant(&self) -> PLLSTBIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, IRC14MSTBIE_A>[src]
pub fn variant(&self) -> IRC14MSTBIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _INT>>[src]
pub fn irc40kstbif(&self) -> IRC40KSTBIF_R[src]
Bit 0 - IRC40K stabilization interrupt flag
pub fn lxtalstbif(&self) -> LXTALSTBIF_R[src]
Bit 1 - LXTAL stabilization interrupt flag
pub fn irc8mstbif(&self) -> IRC8MSTBIF_R[src]
Bit 2 - IRC8M stabilization interrupt flag
pub fn hxtalstbif(&self) -> HXTALSTBIF_R[src]
Bit 3 - HXTAL stabilization interrupt flag
pub fn pllstbif(&self) -> PLLSTBIF_R[src]
Bit 4 - PLL stabilization interrupt flag
pub fn irc14mstbif(&self) -> IRC14MSTBIF_R[src]
Bit 5 - IRC14M stabilization interrupt flag
pub fn ckmif(&self) -> CKMIF_R[src]
Bit 7 - HXTAL Clock Stuck Interrupt Flag
pub fn irc40kstbie(&self) -> IRC40KSTBIE_R[src]
Bit 8 - IRC40K Stabilization interrupt enable
pub fn lxtalstbie(&self) -> LXTALSTBIE_R[src]
Bit 9 - LXTAL Stabilization Interrupt Enable
pub fn irc8mstbie(&self) -> IRC8MSTBIE_R[src]
Bit 10 - IRC8M Stabilization Interrupt Enable
pub fn hxtalstbie(&self) -> HXTALSTBIE_R[src]
Bit 11 - HXTAL Stabilization Interrupt Enable
pub fn pllstbie(&self) -> PLLSTBIE_R[src]
Bit 12 - PLL Stabilization Interrupt Enable
pub fn irc14mstbie(&self) -> IRC14MSTBIE_R[src]
Bit 13 - IRC14M Stabilization Interrupt Enable
impl R<bool, CFGRST_A>[src]
pub fn variant(&self) -> Variant<bool, CFGRST_A>[src]
Get enumerated values variant
pub fn is_reset(&self) -> bool[src]
Checks if the value of the field is RESET
impl R<u32, Reg<u32, _APB2RST>>[src]
pub fn cfgrst(&self) -> CFGRST_R[src]
Bit 0 - System configuration reset
pub fn adcrst(&self) -> ADCRST_R[src]
Bit 9 - ADC reset
pub fn timer0rst(&self) -> TIMER0RST_R[src]
Bit 11 - TIMER0 reset
pub fn spi0rst(&self) -> SPI0RST_R[src]
Bit 12 - SPI0 Reset
pub fn usart0rst(&self) -> USART0RST_R[src]
Bit 14 - USART0 Reset
pub fn timer14rst(&self) -> TIMER14RST_R[src]
Bit 16 - TIMER14 reset
pub fn timer15rst(&self) -> TIMER15RST_R[src]
Bit 17 - TIMER15 reset
pub fn timer16rst(&self) -> TIMER16RST_R[src]
Bit 18 - TIMER16 reset
impl R<bool, TIMER1RST_A>[src]
pub fn variant(&self) -> Variant<bool, TIMER1RST_A>[src]
Get enumerated values variant
pub fn is_reset(&self) -> bool[src]
Checks if the value of the field is RESET
impl R<u32, Reg<u32, _APB1RST>>[src]
pub fn timer1rst(&self) -> TIMER1RST_R[src]
Bit 0 - TIMER1 timer reset
pub fn timer2rst(&self) -> TIMER2RST_R[src]
Bit 1 - TIMER2 timer reset
pub fn timer5rst(&self) -> TIMER5RST_R[src]
Bit 4 - TIMER5 timer reset
pub fn timer13rst(&self) -> TIMER13RST_R[src]
Bit 8 - TIMER13 timer reset
pub fn slcdrst(&self) -> SLCDRST_R[src]
Bit 9 - SLCD reset
pub fn wwdgtrst(&self) -> WWDGTRST_R[src]
Bit 11 - Window watchdog timer reset
pub fn spi1rst(&self) -> SPI1RST_R[src]
Bit 14 - SPI1 reset
pub fn spi2rst(&self) -> SPI2RST_R[src]
Bit 15 - SPI2 reset
pub fn usart1rst(&self) -> USART1RST_R[src]
Bit 17 - USART1 reset
pub fn i2c0rst(&self) -> I2C0RST_R[src]
Bit 21 - I2C0 reset
pub fn i2c1rst(&self) -> I2C1RST_R[src]
Bit 22 - I2C1 reset
pub fn usbdrst(&self) -> USBDRST_R[src]
Bit 23 - USBD reset
pub fn can0rst(&self) -> CAN0RST_R[src]
Bit 25 - CAN0 reset
pub fn can1rst(&self) -> CAN1RST_R[src]
Bit 26 - CAN1 reset
pub fn pmurst(&self) -> PMURST_R[src]
Bit 28 - Power control reset
pub fn dacrst(&self) -> DACRST_R[src]
Bit 29 - DAC reset
pub fn cecrst(&self) -> CECRST_R[src]
Bit 30 - HDMI CEC reset
pub fn opaivrefrst(&self) -> OPAIVREFRST_R[src]
Bit 31 - OPA and IVREF reset
impl R<bool, DMAEN_A>[src]
pub fn variant(&self) -> DMAEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _AHBEN>>[src]
pub fn dmaen(&self) -> DMAEN_R[src]
Bit 0 - DMA clock enable
pub fn sramen(&self) -> SRAMEN_R[src]
Bit 2 - SRAM interface clock enable
pub fn fmcen(&self) -> FMCEN_R[src]
Bit 4 - FMC clock enable
pub fn crcen(&self) -> CRCEN_R[src]
Bit 6 - CRC clock enable
pub fn paen(&self) -> PAEN_R[src]
Bit 17 - GPIO port A clock enable
pub fn pben(&self) -> PBEN_R[src]
Bit 18 - GPIO port B clock enable
pub fn pcen(&self) -> PCEN_R[src]
Bit 19 - GPIO port C clock enable
pub fn pden(&self) -> PDEN_R[src]
Bit 20 - GPIO port D clock enable
pub fn pfen(&self) -> PFEN_R[src]
Bit 22 - GPIO port F clock enable
pub fn tsien(&self) -> TSIEN_R[src]
Bit 24 - TSI clock enable
impl R<bool, CFGCMPEN_A>[src]
pub fn variant(&self) -> CFGCMPEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _APB2EN>>[src]
pub fn cfgcmpen(&self) -> CFGCMPEN_R[src]
Bit 0 - System configuration and comparator clock enable
pub fn adcen(&self) -> ADCEN_R[src]
Bit 9 - ADC interface clock enable
pub fn timer0en(&self) -> TIMER0EN_R[src]
Bit 11 - TIMER0 timer clock enable
pub fn spi0en(&self) -> SPI0EN_R[src]
Bit 12 - SPI0 clock enable
pub fn usart0en(&self) -> USART0EN_R[src]
Bit 14 - USART0 clock enable
pub fn timer14en(&self) -> TIMER14EN_R[src]
Bit 16 - TIMER14 timer clock enable
pub fn timer15en(&self) -> TIMER15EN_R[src]
Bit 17 - TIMER15 timer clock enable
pub fn timer16en(&self) -> TIMER16EN_R[src]
Bit 18 - TIMER16 timer clock enable
impl R<bool, TIMER1EN_A>[src]
pub fn variant(&self) -> TIMER1EN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _APB1EN>>[src]
pub fn timer1en(&self) -> TIMER1EN_R[src]
Bit 0 - TIMER1 timer clock enable
pub fn timer2en(&self) -> TIMER2EN_R[src]
Bit 1 - TIMER2 timer clock enable
pub fn timer5en(&self) -> TIMER5EN_R[src]
Bit 4 - TIMER5 timer clock enable
pub fn timer13en(&self) -> TIMER13EN_R[src]
Bit 8 - TIMER13 timer clock enable
pub fn slcden(&self) -> SLCDEN_R[src]
Bit 9 - SLCD clock enable
pub fn wwdgten(&self) -> WWDGTEN_R[src]
Bit 11 - Window watchdog timer clock enable
pub fn spi1en(&self) -> SPI1EN_R[src]
Bit 14 - SPI1 clock enable
pub fn spi2en(&self) -> SPI2EN_R[src]
Bit 15 - SPI2 clock enable
pub fn usart1en(&self) -> USART1EN_R[src]
Bit 17 - USART1 clock enable
pub fn i2c0en(&self) -> I2C0EN_R[src]
Bit 21 - I2C0 clock enable
pub fn i2c1en(&self) -> I2C1EN_R[src]
Bit 22 - I2C1 clock enable
pub fn usbden(&self) -> USBDEN_R[src]
Bit 23 - USBD clock enable
pub fn can0en(&self) -> CAN0EN_R[src]
Bit 25 - CAN0 clock enable
pub fn can1en(&self) -> CAN1EN_R[src]
Bit 26 - CAN1 clock enable
pub fn pmuen(&self) -> PMUEN_R[src]
Bit 28 - Power interface clock enable
pub fn dacen(&self) -> DACEN_R[src]
Bit 29 - DAC interface clock enable
pub fn cecen(&self) -> CECEN_R[src]
Bit 30 - HDMI CEC interface clock enable
pub fn opaivrefen(&self) -> OPAIVREFEN_R[src]
Bit 31 - OPA and IVREF clock enable
impl R<bool, LXTALEN_A>[src]
pub fn variant(&self) -> LXTALEN_A[src]
Get enumerated values variant
pub fn is_off(&self) -> bool[src]
Checks if the value of the field is OFF
pub fn is_on(&self) -> bool[src]
Checks if the value of the field is ON
impl R<bool, LXTALSTB_A>[src]
pub fn variant(&self) -> LXTALSTB_A[src]
Get enumerated values variant
pub fn is_not_ready(&self) -> bool[src]
Checks if the value of the field is NOTREADY
pub fn is_ready(&self) -> bool[src]
Checks if the value of the field is READY
impl R<bool, LXTALBPS_A>[src]
pub fn variant(&self) -> LXTALBPS_A[src]
Get enumerated values variant
pub fn is_not_bypassed(&self) -> bool[src]
Checks if the value of the field is NOTBYPASSED
pub fn is_bypassed(&self) -> bool[src]
Checks if the value of the field is BYPASSED
impl R<u8, LXTALDRI_A>[src]
pub fn variant(&self) -> LXTALDRI_A[src]
Get enumerated values variant
pub fn is_low(&self) -> bool[src]
Checks if the value of the field is LOW
pub fn is_medium_low(&self) -> bool[src]
Checks if the value of the field is MEDIUMLOW
pub fn is_medium_high(&self) -> bool[src]
Checks if the value of the field is MEDIUMHIGH
pub fn is_high(&self) -> bool[src]
Checks if the value of the field is HIGH
impl R<u8, RTCSRC_A>[src]
pub fn variant(&self) -> RTCSRC_A[src]
Get enumerated values variant
pub fn is_no_clock(&self) -> bool[src]
Checks if the value of the field is NOCLOCK
pub fn is_lxtal(&self) -> bool[src]
Checks if the value of the field is LXTAL
pub fn is_irc40k(&self) -> bool[src]
Checks if the value of the field is IRC40K
pub fn is_hxtal(&self) -> bool[src]
Checks if the value of the field is HXTAL
impl R<bool, RTCEN_A>[src]
pub fn variant(&self) -> RTCEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, BKPRST_A>[src]
pub fn variant(&self) -> BKPRST_A[src]
Get enumerated values variant
pub fn is_no_reset(&self) -> bool[src]
Checks if the value of the field is NORESET
pub fn is_reset(&self) -> bool[src]
Checks if the value of the field is RESET
impl R<u32, Reg<u32, _BDCTL>>[src]
pub fn lxtalen(&self) -> LXTALEN_R[src]
Bit 0 - LXTAL enable
pub fn lxtalstb(&self) -> LXTALSTB_R[src]
Bit 1 - External low-speed oscillator stabilization
pub fn lxtalbps(&self) -> LXTALBPS_R[src]
Bit 2 - LXTAL bypass mode enable
pub fn lxtaldri(&self) -> LXTALDRI_R[src]
Bits 3:4 - LXTAL drive capability
pub fn rtcsrc(&self) -> RTCSRC_R[src]
Bits 8:9 - RTC clock entry selection
pub fn rtcen(&self) -> RTCEN_R[src]
Bit 15 - RTC clock enable
pub fn bkprst(&self) -> BKPRST_R[src]
Bit 16 - Backup domain reset
impl R<bool, IRC40KEN_A>[src]
pub fn variant(&self) -> IRC40KEN_A[src]
Get enumerated values variant
pub fn is_off(&self) -> bool[src]
Checks if the value of the field is OFF
pub fn is_on(&self) -> bool[src]
Checks if the value of the field is ON
impl R<bool, IRC40KSTB_A>[src]
pub fn variant(&self) -> IRC40KSTB_A[src]
Get enumerated values variant
pub fn is_not_ready(&self) -> bool[src]
Checks if the value of the field is NOTREADY
pub fn is_ready(&self) -> bool[src]
Checks if the value of the field is READY
impl R<bool, V12RSTF_A>[src]
pub fn variant(&self) -> V12RSTF_A[src]
Get enumerated values variant
pub fn is_no_reset(&self) -> bool[src]
Checks if the value of the field is NORESET
pub fn is_reset(&self) -> bool[src]
Checks if the value of the field is RESET
impl R<bool, RSTFC_A>[src]
pub fn variant(&self) -> Variant<bool, RSTFC_A>[src]
Get enumerated values variant
pub fn is_clear(&self) -> bool[src]
Checks if the value of the field is CLEAR
impl R<u32, Reg<u32, _RSTSCK>>[src]
pub fn irc40ken(&self) -> IRC40KEN_R[src]
Bit 0 - IRC40K enable
pub fn irc40kstb(&self) -> IRC40KSTB_R[src]
Bit 1 - IRC40K stabilization
pub fn v12rstf(&self) -> V12RSTF_R[src]
Bit 23 - V12 domain Power reset flag
pub fn rstfc(&self) -> RSTFC_R[src]
Bit 24 - Reset flag clear
pub fn oblrstf(&self) -> OBLRSTF_R[src]
Bit 25 - Option byte loader reset flag
pub fn eprstf(&self) -> EPRSTF_R[src]
Bit 26 - External PIN reset flag
pub fn porrstf(&self) -> PORRSTF_R[src]
Bit 27 - Power reset flag
pub fn swrstf(&self) -> SWRSTF_R[src]
Bit 28 - Software reset flag
pub fn fwdgtrstf(&self) -> FWDGTRSTF_R[src]
Bit 29 - Free Watchdog timer reset flag
pub fn wwdgtrstf(&self) -> WWDGTRSTF_R[src]
Bit 30 - Window watchdog timer reset flag
pub fn lprstf(&self) -> LPRSTF_R[src]
Bit 31 - Low-power reset flag
impl R<bool, PARST_A>[src]
pub fn variant(&self) -> Variant<bool, PARST_A>[src]
Get enumerated values variant
pub fn is_reset(&self) -> bool[src]
Checks if the value of the field is RESET
impl R<u32, Reg<u32, _AHBRST>>[src]
pub fn parst(&self) -> PARST_R[src]
Bit 17 - GPIO port A reset
pub fn pbrst(&self) -> PBRST_R[src]
Bit 18 - GPIO port B reset
pub fn pcrst(&self) -> PCRST_R[src]
Bit 19 - GPIO port C reset
pub fn pdrst(&self) -> PDRST_R[src]
Bit 20 - GPIO port D reset
pub fn pfrst(&self) -> PFRST_R[src]
Bit 22 - GPIO port F reset
pub fn tsirst(&self) -> TSIRST_R[src]
Bit 24 - TSI unit reset
impl R<u8, HXTALPREDV_A>[src]
pub fn variant(&self) -> HXTALPREDV_A[src]
Get enumerated values variant
pub fn is_div1(&self) -> bool[src]
Checks if the value of the field is DIV1
pub fn is_div2(&self) -> bool[src]
Checks if the value of the field is DIV2
pub fn is_div3(&self) -> bool[src]
Checks if the value of the field is DIV3
pub fn is_div4(&self) -> bool[src]
Checks if the value of the field is DIV4
pub fn is_div5(&self) -> bool[src]
Checks if the value of the field is DIV5
pub fn is_div6(&self) -> bool[src]
Checks if the value of the field is DIV6
pub fn is_div7(&self) -> bool[src]
Checks if the value of the field is DIV7
pub fn is_div8(&self) -> bool[src]
Checks if the value of the field is DIV8
pub fn is_div9(&self) -> bool[src]
Checks if the value of the field is DIV9
pub fn is_div10(&self) -> bool[src]
Checks if the value of the field is DIV10
pub fn is_div11(&self) -> bool[src]
Checks if the value of the field is DIV11
pub fn is_div12(&self) -> bool[src]
Checks if the value of the field is DIV12
pub fn is_div13(&self) -> bool[src]
Checks if the value of the field is DIV13
pub fn is_div14(&self) -> bool[src]
Checks if the value of the field is DIV14
pub fn is_div15(&self) -> bool[src]
Checks if the value of the field is DIV15
pub fn is_div16(&self) -> bool[src]
Checks if the value of the field is DIV16
impl R<u32, Reg<u32, _CFG1>>[src]
pub fn hxtalpredv(&self) -> HXTALPREDV_R[src]
Bits 0:3 - CK_HXTAL divider previous PLL
impl R<u8, USART0SEL_A>[src]
pub fn variant(&self) -> USART0SEL_A[src]
Get enumerated values variant
pub fn is_apb2(&self) -> bool[src]
Checks if the value of the field is APB2
pub fn is_sys(&self) -> bool[src]
Checks if the value of the field is SYS
pub fn is_lxtal(&self) -> bool[src]
Checks if the value of the field is LXTAL
pub fn is_irc8m(&self) -> bool[src]
Checks if the value of the field is IRC8M
impl R<bool, CECSEL_A>[src]
pub fn variant(&self) -> CECSEL_A[src]
Get enumerated values variant
pub fn is_irc8m_div244(&self) -> bool[src]
Checks if the value of the field is IRC8M_DIV244
pub fn is_lxtal(&self) -> bool[src]
Checks if the value of the field is LXTAL
impl R<bool, ADCSEL_A>[src]
pub fn variant(&self) -> ADCSEL_A[src]
Get enumerated values variant
pub fn is_irc14m(&self) -> bool[src]
Checks if the value of the field is IRC14M
pub fn is_apb2(&self) -> bool[src]
Checks if the value of the field is APB2
impl R<u32, Reg<u32, _CFG2>>[src]
pub fn usart0sel(&self) -> USART0SEL_R[src]
Bits 0:1 - CK_USART0 clock source selection
pub fn cecsel(&self) -> CECSEL_R[src]
Bit 6 - CK_CEC clock source selection
pub fn adcsel(&self) -> ADCSEL_R[src]
Bit 8 - CK_ADC clock source selection
pub fn irc28mdiv(&self) -> IRC28MDIV_R[src]
Bit 16 - CK_IRC28M divider 2 or not
impl R<bool, IRC14MEN_A>[src]
pub fn variant(&self) -> IRC14MEN_A[src]
Get enumerated values variant
pub fn is_off(&self) -> bool[src]
Checks if the value of the field is OFF
pub fn is_on(&self) -> bool[src]
Checks if the value of the field is ON
impl R<bool, IRC14MSTB_A>[src]
pub fn variant(&self) -> IRC14MSTB_A[src]
Get enumerated values variant
pub fn is_not_ready(&self) -> bool[src]
Checks if the value of the field is NOTREADY
pub fn is_ready(&self) -> bool[src]
Checks if the value of the field is READY
impl R<u32, Reg<u32, _CTL1>>[src]
pub fn irc14men(&self) -> IRC14MEN_R[src]
Bit 0 - IRC14M Internal 14M RC oscillator Enable
pub fn irc14mstb(&self) -> IRC14MSTB_R[src]
Bit 1 - IRC14M Internal 14M RC Oscillator stabilization Flag
pub fn irc14madj(&self) -> IRC14MADJ_R[src]
Bits 3:7 - Internal 14M RC Oscillator clock trim adjust value
pub fn irc14mcalib(&self) -> IRC14MCALIB_R[src]
Bits 8:15 - Internal 14M RC Oscillator calibration value register
impl R<u32, Reg<u32, _CFG3>>[src]
pub fn ckout1src(&self) -> CKOUT1SRC_R[src]
Bits 0:2 - CKOUT1 Clock Source Selection
pub fn ckout1div(&self) -> CKOUT1DIV_R[src]
Bits 8:13 - The CK_OUT1 divider which the CK_OUT1 frequency can be reduced see bits 2:0 of RCU_CFG3 for CK_OUT1
impl R<u32, Reg<u32, _ADDEN>>[src]
impl R<u32, Reg<u32, _ADDRST>>[src]
impl R<u32, KEY_A>[src]
pub fn variant(&self) -> Variant<u32, KEY_A>[src]
Get enumerated values variant
pub fn is_enable(&self) -> bool[src]
Checks if the value of the field is ENABLE
impl R<u32, Reg<u32, _VKEY>>[src]
impl R<u8, DSLPVS_A>[src]
pub fn variant(&self) -> Variant<u8, DSLPVS_A>[src]
Get enumerated values variant
pub fn is_v1_2(&self) -> bool[src]
Checks if the value of the field is V1_2
pub fn is_v1_1(&self) -> bool[src]
Checks if the value of the field is V1_1
pub fn is_v1_0(&self) -> bool[src]
Checks if the value of the field is V1_0
pub fn is_v0_9(&self) -> bool[src]
Checks if the value of the field is V0_9
impl R<u32, Reg<u32, _DSV>>[src]
impl R<bool, PDRVS_A>[src]
pub fn variant(&self) -> PDRVS_A[src]
Get enumerated values variant
pub fn is_v2_6(&self) -> bool[src]
Checks if the value of the field is V2_6
pub fn is_v1_8(&self) -> bool[src]
Checks if the value of the field is V1_8
impl R<u32, Reg<u32, _PDVSEL>>[src]
impl R<u32, Reg<u32, _TIME>>[src]
pub fn pm(&self) -> PM_R[src]
Bit 22 - AM/PM mark
pub fn hrt(&self) -> HRT_R[src]
Bits 20:21 - Hour tens in BCD format
pub fn hru(&self) -> HRU_R[src]
Bits 16:19 - Hour units in BCD format
pub fn mnt(&self) -> MNT_R[src]
Bits 12:14 - Minute tens in BCD format
pub fn mnu(&self) -> MNU_R[src]
Bits 8:11 - Minute units in BCD format
pub fn sct(&self) -> SCT_R[src]
Bits 4:6 - Second tens in BCD format
pub fn scu(&self) -> SCU_R[src]
Bits 0:3 - Second units in BCD format
impl R<u32, Reg<u32, _DATE>>[src]
pub fn yrt(&self) -> YRT_R[src]
Bits 20:23 - Year tens in BCD format
pub fn yru(&self) -> YRU_R[src]
Bits 16:19 - Year units in BCD format
pub fn dow(&self) -> DOW_R[src]
Bits 13:15 - Week day units
pub fn mont(&self) -> MONT_R[src]
Bit 12 - Month tens in BCD format
pub fn monu(&self) -> MONU_R[src]
Bits 8:11 - Month units in BCD format
pub fn dayt(&self) -> DAYT_R[src]
Bits 4:5 - Date tens in BCD format
pub fn dayu(&self) -> DAYU_R[src]
Bits 0:3 - Date units in BCD format
impl R<u32, Reg<u32, _CTL>>[src]
pub fn tseg(&self) -> TSEG_R[src]
Bit 3 - Valid event edge of time-stamp
pub fn refen(&self) -> REFEN_R[src]
Bit 4 - Reference clock detection function enable
pub fn bpshad(&self) -> BPSHAD_R[src]
Bit 5 - Shadow registers bypass control
pub fn cs(&self) -> CS_R[src]
Bit 6 - Clock System
pub fn alrm0en(&self) -> ALRM0EN_R[src]
Bit 8 - Alarm-0 function enable
pub fn tsen(&self) -> TSEN_R[src]
Bit 11 - time-stamp function enable
pub fn alrm0ie(&self) -> ALRM0IE_R[src]
Bit 12 - RTC alarm-0 interrupt enable
pub fn tsie(&self) -> TSIE_R[src]
Bit 15 - Time-stamp interrupt enable
pub fn dsm(&self) -> DSM_R[src]
Bit 18 - Daylight saving mark
pub fn cos(&self) -> COS_R[src]
Bit 19 - Calibration output selection
pub fn opol(&self) -> OPOL_R[src]
Bit 20 - Output polarity
pub fn os(&self) -> OS_R[src]
Bits 21:22 - Output selection
pub fn coen(&self) -> COEN_R[src]
Bit 23 - Calibration output enable
impl R<u32, Reg<u32, _STAT>>[src]
pub fn alrm0wf(&self) -> ALRM0WF_R[src]
Bit 0 - Alarm 0 configuration can be write flag
pub fn sopf(&self) -> SOPF_R[src]
Bit 3 - Shift function operation pending flag
pub fn ycm(&self) -> YCM_R[src]
Bit 4 - Year configuration mark
pub fn rsynf(&self) -> RSYNF_R[src]
Bit 5 - Register synchronization flag
pub fn initf(&self) -> INITF_R[src]
Bit 6 - Initialization state flag
pub fn initm(&self) -> INITM_R[src]
Bit 7 - enter initialization mode
pub fn alrm0f(&self) -> ALRM0F_R[src]
Bit 8 - Alarm-0 occurs flag
pub fn tsf(&self) -> TSF_R[src]
Bit 11 - Time-stamp flag
pub fn tsovrf(&self) -> TSOVRF_R[src]
Bit 12 - Time-stamp overflow flag
pub fn tp0f(&self) -> TP0F_R[src]
Bit 13 - RTC_TAMP0 detected flag
pub fn tp1f(&self) -> TP1F_R[src]
Bit 14 - RTC_TAMP1 detected flag
pub fn scpf(&self) -> SCPF_R[src]
Bit 16 - Smooth calibration pending flag
impl R<u32, Reg<u32, _PSC>>[src]
pub fn factor_a(&self) -> FACTOR_A_R[src]
Bits 16:22 - Asynchronous prescaler factor
pub fn factor_s(&self) -> FACTOR_S_R[src]
Bits 0:14 - Synchronous prescaler factor
impl R<u32, Reg<u32, _ALRM0TD>>[src]
pub fn mskd(&self) -> MSKD_R[src]
Bit 31 - Alarm date mask bit
pub fn dows(&self) -> DOWS_R[src]
Bit 30 - Day of the week selected
pub fn dayt(&self) -> DAYT_R[src]
Bits 28:29 - Date tens in BCD code
pub fn dayu(&self) -> DAYU_R[src]
Bits 24:27 - Date units or week day in BCD code
pub fn mskh(&self) -> MSKH_R[src]
Bit 23 - Alarm hour mask bit
pub fn pm(&self) -> PM_R[src]
Bit 22 - AM/PM flag
pub fn hrt(&self) -> HRT_R[src]
Bits 20:21 - Hour tens in BCD code
pub fn hru(&self) -> HRU_R[src]
Bits 16:19 - Hour units in BCD code
pub fn mskm(&self) -> MSKM_R[src]
Bit 15 - Alarm minutes mask bit
pub fn mnt(&self) -> MNT_R[src]
Bits 12:14 - Minutes tens in BCD code
pub fn mnu(&self) -> MNU_R[src]
Bits 8:11 - Minutes units in BCD code
pub fn msks(&self) -> MSKS_R[src]
Bit 7 - Alarm second mask bit
pub fn sct(&self) -> SCT_R[src]
Bits 4:6 - Second tens in BCD code
pub fn scu(&self) -> SCU_R[src]
Bits 0:3 - Second units in BCD code
impl R<u32, Reg<u32, _SS>>[src]
impl R<u32, Reg<u32, _TTS>>[src]
pub fn pm(&self) -> PM_R[src]
Bit 22 - AM/PM mark
pub fn hrt(&self) -> HRT_R[src]
Bits 20:21 - Hour tens in BCD code
pub fn hru(&self) -> HRU_R[src]
Bits 16:19 - Hour units in BCD code
pub fn mnt(&self) -> MNT_R[src]
Bits 12:14 - Minute tens in BCD code
pub fn mnu(&self) -> MNU_R[src]
Bits 8:11 - Minute units in BCD code
pub fn sct(&self) -> SCT_R[src]
Bits 4:6 - Second tens in BCD code
pub fn scu(&self) -> SCU_R[src]
Bits 0:3 - Second units in BCD code
impl R<u32, Reg<u32, _DTS>>[src]
pub fn dow(&self) -> DOW_R[src]
Bits 13:15 - Week day units
pub fn mont(&self) -> MONT_R[src]
Bit 12 - Month tens in BCD code
pub fn monu(&self) -> MONU_R[src]
Bits 8:11 - Month units in BCD code
pub fn dayt(&self) -> DAYT_R[src]
Bits 4:5 - Date tens in BCD code
pub fn dayu(&self) -> DAYU_R[src]
Bits 0:3 - Date units in BCD code
impl R<u32, Reg<u32, _SSTS>>[src]
impl R<u32, Reg<u32, _HRFC>>[src]
pub fn freqi(&self) -> FREQI_R[src]
Bit 15 - Increase RTC frequency by 488.5ppm
pub fn cwnd8(&self) -> CWND8_R[src]
Bit 14 - Frequency compensation window 8 second selected
pub fn cwnd16(&self) -> CWND16_R[src]
Bit 13 - Frequency compensation window 16 second selected
pub fn cmsk(&self) -> CMSK_R[src]
Bits 0:8 - Calibration mask number
impl R<u32, Reg<u32, _TAMP>>[src]
pub fn pc15mde(&self) -> PC15MDE_R[src]
Bit 23 - PC15 mode
pub fn pc15val(&self) -> PC15VAL_R[src]
Bit 22 - PC15 value
pub fn pc14mde(&self) -> PC14MDE_R[src]
Bit 21 - PC14 mode
pub fn pc14val(&self) -> PC14VAL_R[src]
Bit 20 - PC14 value
pub fn pc13mde(&self) -> PC13MDE_R[src]
Bit 19 - PC13 mode
pub fn pc13val(&self) -> PC13VAL_R[src]
Bit 18 - Alarm output type control/PC13 output value
pub fn dispu(&self) -> DISPU_R[src]
Bit 15 - RTC_TAMPx pull up disable bit
pub fn prch(&self) -> PRCH_R[src]
Bits 13:14 - Precharge duration time of RTC_TAMPx
pub fn flt(&self) -> FLT_R[src]
Bits 11:12 - RTC_TAMPx filter count setting
pub fn freq(&self) -> FREQ_R[src]
Bits 8:10 - Sample frequency of tamper event detection
pub fn tpts(&self) -> TPTS_R[src]
Bit 7 - Make tamper function used for timestamp function
pub fn tp1eg(&self) -> TP1EG_R[src]
Bit 4 - Tamper 1 event trigger edge for RTC_TAMP1 input
pub fn tp1en(&self) -> TP1EN_R[src]
Bit 3 - Tamper 1 detection enable
pub fn tpie(&self) -> TPIE_R[src]
Bit 2 - Tamper detection interrupt enable
pub fn tp0eg(&self) -> TP0EG_R[src]
Bit 1 - Tamper 0 event trigger edge for RTC_TAMP0 input
pub fn tp0en(&self) -> TP0EN_R[src]
Bit 0 - RTC_TAMP1 input detection enable
impl R<u32, Reg<u32, _ALRM0SS>>[src]
pub fn mskssc(&self) -> MSKSSC_R[src]
Bits 24:27 - Mask control bit of SSC
pub fn ssc(&self) -> SSC_R[src]
Bits 0:14 - Alarm sub second value
impl R<u32, Reg<u32, _BKP0>>[src]
impl R<u32, Reg<u32, _BKP1>>[src]
impl R<u32, Reg<u32, _BKP2>>[src]
impl R<u32, Reg<u32, _BKP3>>[src]
impl R<u32, Reg<u32, _BKP4>>[src]
impl R<u32, Reg<u32, _CTL>>[src]
pub fn slcdon(&self) -> SLCDON_R[src]
Bit 0 - SLCD controller start
pub fn vsrc(&self) -> VSRC_R[src]
Bit 1 - SLCD voltage source
pub fn duty(&self) -> DUTY_R[src]
Bits 2:4 - Duty select
pub fn bias(&self) -> BIAS_R[src]
Bits 5:6 - Bias select
pub fn coms(&self) -> COMS_R[src]
Bit 7 - Common/segment padselect
impl R<u32, Reg<u32, _CFG>>[src]
pub fn hden(&self) -> HDEN_R[src]
Bit 0 - High drive enable
pub fn sofie(&self) -> SOFIE_R[src]
Bit 1 - Start of frame interrupt enable
pub fn updie(&self) -> UPDIE_R[src]
Bit 3 - SLCD update done interrupt enable
pub fn pulse(&self) -> PULSE_R[src]
Bits 4:6 - Pulse on duration
pub fn dtd(&self) -> DTD_R[src]
Bits 7:9 - Dead time duration
pub fn conr(&self) -> CONR_R[src]
Bits 10:12 - Contrast ratio
pub fn blkdiv(&self) -> BLKDIV_R[src]
Bits 13:15 - Blink frequency divider
pub fn blkmod(&self) -> BLKMOD_R[src]
Bits 16:17 - Blink mode
pub fn div(&self) -> DIV_R[src]
Bits 18:21 - SLCD clock divider
pub fn psc(&self) -> PSC_R[src]
Bits 22:25 - SLCD clock prescaler
impl R<u32, Reg<u32, _STAT>>[src]
pub fn onf(&self) -> ONF_R[src]
Bit 0 - SLCD controller on flag
pub fn sof(&self) -> SOF_R[src]
Bit 1 - Start of frame flag
pub fn uprf(&self) -> UPRF_R[src]
Bit 2 - Update SLCD data request flag
pub fn updf(&self) -> UPDF_R[src]
Bit 3 - Update SLCD data done flag
pub fn vrdyf(&self) -> VRDYF_R[src]
Bit 4 - SLCD voltage ready flag
pub fn synf(&self) -> SYNF_R[src]
Bit 5 - SLCD_CFG register synchronization flag
impl R<u32, Reg<u32, _STATC>>[src]
pub fn sofc(&self) -> SOFC_R[src]
Bit 1 - Start of frame flag clear
pub fn updc(&self) -> UPDC_R[src]
Bit 3 - SLCD data update done clear bit
impl R<u32, Reg<u32, _DATA0>>[src]
pub fn seg_data0(&self) -> SEG_DATA0_R[src]
Bits 0:31 - Each bit corresponds to one segment to display
impl R<u32, Reg<u32, _DATA1>>[src]
pub fn seg_data1(&self) -> SEG_DATA1_R[src]
Bits 0:31 - Each bit corresponds to one segment to display
impl R<u32, Reg<u32, _DATA2>>[src]
pub fn seg_data2(&self) -> SEG_DATA2_R[src]
Bits 0:31 - Each bit corresponds to one segment to display
impl R<u32, Reg<u32, _DATA3>>[src]
pub fn seg_data3(&self) -> SEG_DATA3_R[src]
Bits 0:31 - Each bit corresponds to one segment to display
impl R<u32, Reg<u32, _DATA4>>[src]
pub fn seg_data4(&self) -> SEG_DATA4_R[src]
Bits 0:31 - Each bit corresponds to one segment to display
impl R<u32, Reg<u32, _DATA5>>[src]
pub fn seg_data5(&self) -> SEG_DATA5_R[src]
Bits 0:31 - Each bit corresponds to one segment to display
impl R<u32, Reg<u32, _DATA6>>[src]
pub fn seg_data6(&self) -> SEG_DATA6_R[src]
Bits 0:31 - Each bit corresponds to one segment to display
impl R<u32, Reg<u32, _DATA7>>[src]
pub fn seg_data7(&self) -> SEG_DATA7_R[src]
Bits 0:31 - Each bit corresponds to one segment to display
impl R<u16, Reg<u16, _CTL0>>[src]
pub fn bden(&self) -> BDEN_R[src]
Bit 15 - Bidirectional enable
pub fn bdoen(&self) -> BDOEN_R[src]
Bit 14 - Bidirectional Transmit output enable
pub fn crcen(&self) -> CRCEN_R[src]
Bit 13 - Hardware CRC calculation enable
pub fn crcnt(&self) -> CRCNT_R[src]
Bit 12 - CRC transfer next
pub fn ff16(&self) -> FF16_R[src]
Bit 11 - Data frame format
pub fn ro(&self) -> RO_R[src]
Bit 10 - Receive only
pub fn swnssen(&self) -> SWNSSEN_R[src]
Bit 9 - NSS Software Mode Selection
pub fn swnss(&self) -> SWNSS_R[src]
Bit 8 - NSS Pin Selection In NSS Software Mode
pub fn lf(&self) -> LF_R[src]
Bit 7 - LSB First Mode
pub fn spien(&self) -> SPIEN_R[src]
Bit 6 - SPI enable
pub fn psc(&self) -> PSC_R[src]
Bits 3:5 - Master Clock Prescaler Selection
pub fn mstmod(&self) -> MSTMOD_R[src]
Bit 2 - Master selection
pub fn ckpl(&self) -> CKPL_R[src]
Bit 1 - Clock Polarity Selection
pub fn ckph(&self) -> CKPH_R[src]
Bit 0 - Clock Phase Selection
impl R<u16, Reg<u16, _CTL1>>[src]
pub fn tbeie(&self) -> TBEIE_R[src]
Bit 7 - Tx buffer empty interrupt enable
pub fn rbneie(&self) -> RBNEIE_R[src]
Bit 6 - RX buffer not empty interrupt enable
pub fn errie(&self) -> ERRIE_R[src]
Bit 5 - Error interrupt enable
pub fn nssdrv(&self) -> NSSDRV_R[src]
Bit 2 - Drive NSS Output
pub fn dmaten(&self) -> DMATEN_R[src]
Bit 1 - Transmit Buffer DMA Enable
pub fn dmaren(&self) -> DMAREN_R[src]
Bit 0 - Receive Buffer DMA Enable
impl R<u16, Reg<u16, _STAT>>[src]
pub fn trans(&self) -> TRANS_R[src]
Bit 7 - Transmitting On-going Bit
pub fn rxorerr(&self) -> RXORERR_R[src]
Bit 6 - Reception Overrun Error Bit
pub fn confe(&self) -> CONFE_R[src]
Bit 5 - SPI Configuration error
pub fn crcerr(&self) -> CRCERR_R[src]
Bit 4 - SPI CRC Error Bit
pub fn txurerr(&self) -> TXURERR_R[src]
Bit 3 - Transmission underrun error bit
pub fn i2sch(&self) -> I2SCH_R[src]
Bit 2 - I2S channel side
pub fn tbe(&self) -> TBE_R[src]
Bit 1 - Transmit Buffer Empty
pub fn rbne(&self) -> RBNE_R[src]
Bit 0 - Receive Buffer Not Empty
impl R<u16, Reg<u16, _DATA>>[src]
impl R<u16, Reg<u16, _CPCPOLY>>[src]
impl R<u16, Reg<u16, _RCRC>>[src]
impl R<u16, Reg<u16, _TCRC>>[src]
impl R<u16, Reg<u16, _I2SCTL>>[src]
pub fn i2ssel(&self) -> I2SSEL_R[src]
Bit 11 - I2S mode selection
pub fn i2sen(&self) -> I2SEN_R[src]
Bit 10 - I2S Enable
pub fn i2sopmod(&self) -> I2SOPMOD_R[src]
Bits 8:9 - I2S configuration mode
pub fn pcmsmod(&self) -> PCMSMOD_R[src]
Bit 7 - PCM frame synchronization mode
pub fn i2sstd(&self) -> I2SSTD_R[src]
Bits 4:5 - I2S standard selection
pub fn ckpl(&self) -> CKPL_R[src]
Bit 3 - Idle state clock polarity
pub fn dtlen(&self) -> DTLEN_R[src]
Bits 1:2 - Data length
pub fn chlen(&self) -> CHLEN_R[src]
Bit 0 - Channel length
impl R<u16, Reg<u16, _I2SPSC>>[src]
pub fn mckoen(&self) -> MCKOEN_R[src]
Bit 9 - I2S_MCK output enable
pub fn of(&self) -> OF_R[src]
Bit 8 - Odd factor for the prescaler
pub fn div(&self) -> DIV_R[src]
Bits 0:7 - Dividing factor for the prescaler
impl R<u16, Reg<u16, _QCTL>>[src]
pub fn io23_drv(&self) -> IO23_DRV_R[src]
Bit 2 - Drive IO2 and IO3 enable
pub fn qrd(&self) -> QRD_R[src]
Bit 1 - Quad wire read select
pub fn qmod(&self) -> QMOD_R[src]
Bit 0 - Quad wire mode enable
impl R<u32, Reg<u32, _CFG0>>[src]
pub fn pb9_hcce(&self) -> PB9_HCCE_R[src]
Bit 19 - PB9 pin high current capability enable
pub fn timer16_dma_rmp(&self) -> TIMER16_DMA_RMP_R[src]
Bit 12 - Timer 16 DMA request remapping enable
pub fn timer15_dma_rmp(&self) -> TIMER15_DMA_RMP_R[src]
Bit 11 - Timer 15 DMA request remapping enable
pub fn usart0_rx_dma_rmp(&self) -> USART0_RX_DMA_RMP_R[src]
Bit 10 - USART0_RX DMA request remapping enable
pub fn usart0_tx_dma_rmp(&self) -> USART0_TX_DMA_RMP_R[src]
Bit 9 - USART0_TX DMA request remapping enable
pub fn adc_dma_rmp(&self) -> ADC_DMA_RMP_R[src]
Bit 8 - ADC DMA request remapping enable
pub fn boot_mode(&self) -> BOOT_MODE_R[src]
Bits 0:1 - Boot mode
impl R<u32, Reg<u32, _CFG1>>[src]
pub fn slcd_deca(&self) -> SLCD_DECA_R[src]
Bits 1:3 - Decoupling capacitance connection for SLCD
impl R<u32, Reg<u32, _EXTISS0>>[src]
pub fn exti3_ss(&self) -> EXTI3_SS_R[src]
Bits 12:15 - EXTI 3 sources selection
pub fn exti2_ss(&self) -> EXTI2_SS_R[src]
Bits 8:11 - EXTI 2 sources selection
pub fn exti1_ss(&self) -> EXTI1_SS_R[src]
Bits 4:7 - EXTI 1 sources selection
pub fn exti0_ss(&self) -> EXTI0_SS_R[src]
Bits 0:3 - EXTI 0 sources selection
impl R<u32, Reg<u32, _EXTISS1>>[src]
pub fn exti7_ss(&self) -> EXTI7_SS_R[src]
Bits 12:15 - EXTI 7 sources selection
pub fn exti6_ss(&self) -> EXTI6_SS_R[src]
Bits 8:11 - EXTI 6 sources selection
pub fn exti5_ss(&self) -> EXTI5_SS_R[src]
Bits 4:7 - EXTI 5 sources selection
pub fn exti4_ss(&self) -> EXTI4_SS_R[src]
Bits 0:3 - EXTI 4 sources selection
impl R<u32, Reg<u32, _EXTISS2>>[src]
pub fn exti11_ss(&self) -> EXTI11_SS_R[src]
Bits 12:15 - EXTI 11 sources selection
pub fn exti10_ss(&self) -> EXTI10_SS_R[src]
Bits 8:11 - EXTI 10 sources selection
pub fn exti9_ss(&self) -> EXTI9_SS_R[src]
Bits 4:7 - EXTI 9 sources selection
pub fn exti8_ss(&self) -> EXTI8_SS_R[src]
Bits 0:3 - EXTI 8 sources selection
impl R<u32, Reg<u32, _EXTISS3>>[src]
pub fn exti15_ss(&self) -> EXTI15_SS_R[src]
Bits 12:15 - EXTI 15 sources selection
pub fn exti14_ss(&self) -> EXTI14_SS_R[src]
Bits 8:11 - EXTI 14 sources selection
pub fn exti13_ss(&self) -> EXTI13_SS_R[src]
Bits 4:7 - EXTI 13 sources selection
pub fn exti12_ss(&self) -> EXTI12_SS_R[src]
Bits 0:3 - EXTI 12 sources selection
impl R<u32, Reg<u32, _CFG2>>[src]
pub fn sram_pcef(&self) -> SRAM_PCEF_R[src]
Bit 8 - SRAM parity check error flag
pub fn lvd_lock(&self) -> LVD_LOCK_R[src]
Bit 2 - LVD lock
pub fn sram_parity_error_lock(&self) -> SRAM_PARITY_ERROR_LOCK_R[src]
Bit 1 - SRAM parity check error lock
pub fn lockup_lock(&self) -> LOCKUP_LOCK_R[src]
Bit 0 - Cortex-M3 LOCKUP output lock
impl R<u8, CKDIV_A>[src]
pub fn variant(&self) -> Variant<u8, CKDIV_A>[src]
Get enumerated values variant
pub fn is_div1(&self) -> bool[src]
Checks if the value of the field is DIV1
pub fn is_div2(&self) -> bool[src]
Checks if the value of the field is DIV2
pub fn is_div4(&self) -> bool[src]
Checks if the value of the field is DIV4
impl R<bool, ARSE_A>[src]
pub fn variant(&self) -> ARSE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u8, CAM_A>[src]
pub fn variant(&self) -> CAM_A[src]
Get enumerated values variant
pub fn is_edge_aligned(&self) -> bool[src]
Checks if the value of the field is EDGEALIGNED
pub fn is_center_aligned_counting_down(&self) -> bool[src]
Checks if the value of the field is CENTERALIGNEDCOUNTINGDOWN
pub fn is_center_aligned_counting_up(&self) -> bool[src]
Checks if the value of the field is CENTERALIGNEDCOUNTINGUP
pub fn is_center_aligned_counting_up_down(&self) -> bool[src]
Checks if the value of the field is CENTERALIGNEDCOUNTINGUPDOWN
impl R<bool, DIR_A>[src]
pub fn variant(&self) -> DIR_A[src]
Get enumerated values variant
pub fn is_up(&self) -> bool[src]
Checks if the value of the field is UP
pub fn is_down(&self) -> bool[src]
Checks if the value of the field is DOWN
impl R<bool, SPM_A>[src]
pub fn variant(&self) -> SPM_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, UPS_A>[src]
pub fn variant(&self) -> UPS_A[src]
Get enumerated values variant
pub fn is_any_event(&self) -> bool[src]
Checks if the value of the field is ANYEVENT
pub fn is_counter_only(&self) -> bool[src]
Checks if the value of the field is COUNTERONLY
impl R<bool, UPDIS_A>[src]
pub fn variant(&self) -> UPDIS_A[src]
Get enumerated values variant
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
impl R<bool, CEN_A>[src]
pub fn variant(&self) -> CEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u16, Reg<u16, _CTL0>>[src]
pub fn ckdiv(&self) -> CKDIV_R[src]
Bits 8:9 - Clock division
pub fn arse(&self) -> ARSE_R[src]
Bit 7 - Auto-reload shadow enable
pub fn cam(&self) -> CAM_R[src]
Bits 5:6 - Counter aligns mode selection
pub fn dir(&self) -> DIR_R[src]
Bit 4 - Direction
pub fn spm(&self) -> SPM_R[src]
Bit 3 - Single pulse mode
pub fn ups(&self) -> UPS_R[src]
Bit 2 - Update source
pub fn updis(&self) -> UPDIS_R[src]
Bit 1 - Update disable
pub fn cen(&self) -> CEN_R[src]
Bit 0 - Counter enable
impl R<bool, ISO3_A>[src]
pub fn variant(&self) -> ISO3_A[src]
Get enumerated values variant
pub fn is_low(&self) -> bool[src]
Checks if the value of the field is LOW
pub fn is_high(&self) -> bool[src]
Checks if the value of the field is HIGH
impl R<bool, ISO2N_A>[src]
pub fn variant(&self) -> ISO2N_A[src]
Get enumerated values variant
pub fn is_low(&self) -> bool[src]
Checks if the value of the field is LOW
pub fn is_high(&self) -> bool[src]
Checks if the value of the field is HIGH
impl R<bool, ISO2_A>[src]
pub fn variant(&self) -> ISO2_A[src]
Get enumerated values variant
pub fn is_low(&self) -> bool[src]
Checks if the value of the field is LOW
pub fn is_high(&self) -> bool[src]
Checks if the value of the field is HIGH
impl R<bool, ISO1N_A>[src]
pub fn variant(&self) -> ISO1N_A[src]
Get enumerated values variant
pub fn is_low(&self) -> bool[src]
Checks if the value of the field is LOW
pub fn is_high(&self) -> bool[src]
Checks if the value of the field is HIGH
impl R<bool, ISO1_A>[src]
pub fn variant(&self) -> ISO1_A[src]
Get enumerated values variant
pub fn is_low(&self) -> bool[src]
Checks if the value of the field is LOW
pub fn is_high(&self) -> bool[src]
Checks if the value of the field is HIGH
impl R<bool, ISO0N_A>[src]
pub fn variant(&self) -> ISO0N_A[src]
Get enumerated values variant
pub fn is_low(&self) -> bool[src]
Checks if the value of the field is LOW
pub fn is_high(&self) -> bool[src]
Checks if the value of the field is HIGH
impl R<bool, ISO0_A>[src]
pub fn variant(&self) -> ISO0_A[src]
Get enumerated values variant
pub fn is_low(&self) -> bool[src]
Checks if the value of the field is LOW
pub fn is_high(&self) -> bool[src]
Checks if the value of the field is HIGH
impl R<bool, TI0S_A>[src]
pub fn variant(&self) -> TI0S_A[src]
Get enumerated values variant
pub fn is_normal(&self) -> bool[src]
Checks if the value of the field is NORMAL
pub fn is_xor(&self) -> bool[src]
Checks if the value of the field is XOR
impl R<u8, MMC_A>[src]
pub fn variant(&self) -> MMC_A[src]
Get enumerated values variant
pub fn is_reset(&self) -> bool[src]
Checks if the value of the field is RESET
pub fn is_enable(&self) -> bool[src]
Checks if the value of the field is ENABLE
pub fn is_update(&self) -> bool[src]
Checks if the value of the field is UPDATE
pub fn is_capture_compare_pulse(&self) -> bool[src]
Checks if the value of the field is CAPTURECOMPAREPULSE
pub fn is_compare_o0c(&self) -> bool[src]
Checks if the value of the field is COMPAREO0C
pub fn is_compare_o1c(&self) -> bool[src]
Checks if the value of the field is COMPAREO1C
pub fn is_compare_o2c(&self) -> bool[src]
Checks if the value of the field is COMPAREO2C
pub fn is_compare_o3c(&self) -> bool[src]
Checks if the value of the field is COMPAREO3C
impl R<bool, DMAS_A>[src]
pub fn variant(&self) -> DMAS_A[src]
Get enumerated values variant
pub fn is_on_compare(&self) -> bool[src]
Checks if the value of the field is ONCOMPARE
pub fn is_on_update(&self) -> bool[src]
Checks if the value of the field is ONUPDATE
impl R<bool, CCUC_A>[src]
pub fn variant(&self) -> CCUC_A[src]
Get enumerated values variant
pub fn is_default(&self) -> bool[src]
Checks if the value of the field is DEFAULT
pub fn is_with_rising_edge(&self) -> bool[src]
Checks if the value of the field is WITHRISINGEDGE
impl R<bool, CCSE_A>[src]
pub fn variant(&self) -> CCSE_A[src]
Get enumerated values variant
pub fn is_not_preloaded(&self) -> bool[src]
Checks if the value of the field is NOTPRELOADED
pub fn is_preloaded(&self) -> bool[src]
Checks if the value of the field is PRELOADED
impl R<u16, Reg<u16, _CTL1>>[src]
pub fn iso3(&self) -> ISO3_R[src]
Bit 14 - Idle state of channel 3 output
pub fn iso2n(&self) -> ISO2N_R[src]
Bit 13 - Idle state of channel 2 complementary output
pub fn iso2(&self) -> ISO2_R[src]
Bit 12 - Idle state of channel 2 output
pub fn iso1n(&self) -> ISO1N_R[src]
Bit 11 - Idle state of channel 1 complementary output
pub fn iso1(&self) -> ISO1_R[src]
Bit 10 - Idle state of channel 1 output
pub fn iso0n(&self) -> ISO0N_R[src]
Bit 9 - Idle state of channel 0 complementary output
pub fn iso0(&self) -> ISO0_R[src]
Bit 8 - Idle state of channel 0 output
pub fn ti0s(&self) -> TI0S_R[src]
Bit 7 - Channel 0 trigger input selection
pub fn mmc(&self) -> MMC_R[src]
Bits 4:6 - Master mode control
pub fn dmas(&self) -> DMAS_R[src]
Bit 3 - DMA request source selection
pub fn ccuc(&self) -> CCUC_R[src]
Bit 2 - Commutation control shadow register update control
pub fn ccse(&self) -> CCSE_R[src]
Bit 0 - Commutation control shadow register enable
impl R<bool, ETP_A>[src]
pub fn variant(&self) -> ETP_A[src]
Get enumerated values variant
pub fn is_not_inverted(&self) -> bool[src]
Checks if the value of the field is NOTINVERTED
pub fn is_inverted(&self) -> bool[src]
Checks if the value of the field is INVERTED
impl R<bool, SMC1_A>[src]
pub fn variant(&self) -> SMC1_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u8, ETPSC_A>[src]
pub fn variant(&self) -> ETPSC_A[src]
Get enumerated values variant
pub fn is_div1(&self) -> bool[src]
Checks if the value of the field is DIV1
pub fn is_div2(&self) -> bool[src]
Checks if the value of the field is DIV2
pub fn is_div4(&self) -> bool[src]
Checks if the value of the field is DIV4
pub fn is_div8(&self) -> bool[src]
Checks if the value of the field is DIV8
impl R<u8, ETFC_A>[src]
pub fn variant(&self) -> ETFC_A[src]
Get enumerated values variant
pub fn is_no_filter(&self) -> bool[src]
Checks if the value of the field is NOFILTER
pub fn is_fck_int_n2(&self) -> bool[src]
Checks if the value of the field is FCK_INT_N2
pub fn is_fck_int_n4(&self) -> bool[src]
Checks if the value of the field is FCK_INT_N4
pub fn is_fck_int_n8(&self) -> bool[src]
Checks if the value of the field is FCK_INT_N8
pub fn is_fdts_div2_n6(&self) -> bool[src]
Checks if the value of the field is FDTS_DIV2_N6
pub fn is_fdts_div2_n8(&self) -> bool[src]
Checks if the value of the field is FDTS_DIV2_N8
pub fn is_fdts_div4_n6(&self) -> bool[src]
Checks if the value of the field is FDTS_DIV4_N6
pub fn is_fdts_div4_n8(&self) -> bool[src]
Checks if the value of the field is FDTS_DIV4_N8
pub fn is_fdts_div8_n6(&self) -> bool[src]
Checks if the value of the field is FDTS_DIV8_N6
pub fn is_fdts_div8_n8(&self) -> bool[src]
Checks if the value of the field is FDTS_DIV8_N8
pub fn is_fdts_div16_n5(&self) -> bool[src]
Checks if the value of the field is FDTS_DIV16_N5
pub fn is_fdts_div16_n6(&self) -> bool[src]
Checks if the value of the field is FDTS_DIV16_N6
pub fn is_fdts_div16_n8(&self) -> bool[src]
Checks if the value of the field is FDTS_DIV16_N8
pub fn is_fdts_div32_n5(&self) -> bool[src]
Checks if the value of the field is FDTS_DIV32_N5
pub fn is_fdts_div32_n6(&self) -> bool[src]
Checks if the value of the field is FDTS_DIV32_N6
pub fn is_fdts_div32_n8(&self) -> bool[src]
Checks if the value of the field is FDTS_DIV32_N8
impl R<bool, MSM_A>[src]
pub fn variant(&self) -> MSM_A[src]
Get enumerated values variant
pub fn is_no_sync(&self) -> bool[src]
Checks if the value of the field is NOSYNC
pub fn is_sync(&self) -> bool[src]
Checks if the value of the field is SYNC
impl R<u8, TRGS_A>[src]
pub fn variant(&self) -> Variant<u8, TRGS_A>[src]
Get enumerated values variant
pub fn is_iti0(&self) -> bool[src]
Checks if the value of the field is ITI0
pub fn is_iti1(&self) -> bool[src]
Checks if the value of the field is ITI1
pub fn is_iti2(&self) -> bool[src]
Checks if the value of the field is ITI2
pub fn is_ci0f_ed(&self) -> bool[src]
Checks if the value of the field is CI0F_ED
pub fn is_ci0fe0(&self) -> bool[src]
Checks if the value of the field is CI0FE0
pub fn is_ci1fe1(&self) -> bool[src]
Checks if the value of the field is CI1FE1
pub fn is_etifp(&self) -> bool[src]
Checks if the value of the field is ETIFP
impl R<bool, OCRC_A>[src]
pub fn variant(&self) -> OCRC_A[src]
Get enumerated values variant
pub fn is_input(&self) -> bool[src]
Checks if the value of the field is INPUT
pub fn is_etif(&self) -> bool[src]
Checks if the value of the field is ETIF
impl R<u8, SMC_A>[src]
pub fn variant(&self) -> SMC_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_quadrature_decoder_mode0(&self) -> bool[src]
Checks if the value of the field is QUADRATUREDECODERMODE0
pub fn is_quadrature_decoder_mode1(&self) -> bool[src]
Checks if the value of the field is QUADRATUREDECODERMODE1
pub fn is_quadrature_decoder_mode2(&self) -> bool[src]
Checks if the value of the field is QUADRATUREDECODERMODE2
pub fn is_restart_mode(&self) -> bool[src]
Checks if the value of the field is RESTARTMODE
pub fn is_pause_mode(&self) -> bool[src]
Checks if the value of the field is PAUSEMODE
pub fn is_event_mode(&self) -> bool[src]
Checks if the value of the field is EVENTMODE
pub fn is_external_clock_mode(&self) -> bool[src]
Checks if the value of the field is EXTERNALCLOCKMODE
impl R<u16, Reg<u16, _SMCFG>>[src]
pub fn etp(&self) -> ETP_R[src]
Bit 15 - External trigger polarity
pub fn smc1(&self) -> SMC1_R[src]
Bit 14 - Part of SMC for enable External clock mode1
pub fn etpsc(&self) -> ETPSC_R[src]
Bits 12:13 - External trigger prescaler
pub fn etfc(&self) -> ETFC_R[src]
Bits 8:11 - External trigger filter control
pub fn msm(&self) -> MSM_R[src]
Bit 7 - Master/Slave mode
pub fn trgs(&self) -> TRGS_R[src]
Bits 4:6 - Trigger selection
pub fn ocrc(&self) -> OCRC_R[src]
Bit 3 - OCPRE clear source selection
pub fn smc(&self) -> SMC_R[src]
Bits 0:2 - Slave mode control
impl R<bool, UPDEN_A>[src]
pub fn variant(&self) -> UPDEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, UPIE_A>[src]
pub fn variant(&self) -> UPIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u16, Reg<u16, _DMAINTEN>>[src]
pub fn trgden(&self) -> TRGDEN_R[src]
Bit 14 - Trigger DMA request enable
pub fn cmtden(&self) -> CMTDEN_R[src]
Bit 13 - CMT DMA request enable
pub fn ch3den(&self) -> CH3DEN_R[src]
Bit 12 - Channel 3 Capture/Compare DMA request enable
pub fn ch2den(&self) -> CH2DEN_R[src]
Bit 11 - Channel 2 Capture/Compare DMA request enable
pub fn ch1den(&self) -> CH1DEN_R[src]
Bit 10 - Channel 1 Capture/Compare DMA request enable
pub fn ch0den(&self) -> CH0DEN_R[src]
Bit 9 - Channel 0 Capture/Compare DMA request enable
pub fn upden(&self) -> UPDEN_R[src]
Bit 8 - Update DMA request enable
pub fn brkie(&self) -> BRKIE_R[src]
Bit 7 - Break interrupt enable
pub fn trgie(&self) -> TRGIE_R[src]
Bit 6 - Trigger interrupt enable
pub fn cmtie(&self) -> CMTIE_R[src]
Bit 5 - CMT interrupt enable
pub fn ch3ie(&self) -> CH3IE_R[src]
Bit 4 - Channel 3 Capture/Compare interrupt enable
pub fn ch2ie(&self) -> CH2IE_R[src]
Bit 3 - Channel 2 Capture/Compare interrupt enable
pub fn ch1ie(&self) -> CH1IE_R[src]
Bit 2 - Channel 1 Capture/Compare interrupt enable
pub fn ch0ie(&self) -> CH0IE_R[src]
Bit 1 - Channel 0 Capture/Compare interrupt enable
pub fn upie(&self) -> UPIE_R[src]
Bit 0 - Update interrupt enable
impl R<bool, UPIF_A>[src]
pub fn variant(&self) -> UPIF_A[src]
Get enumerated values variant
pub fn is_clear(&self) -> bool[src]
Checks if the value of the field is CLEAR
pub fn is_update_pending(&self) -> bool[src]
Checks if the value of the field is UPDATEPENDING
impl R<u16, Reg<u16, _INTF>>[src]
pub fn ch3of(&self) -> CH3OF_R[src]
Bit 12 - Channel 3 Capture overflow flag
pub fn ch2of(&self) -> CH2OF_R[src]
Bit 11 - Channel 2 Capture overflow flag
pub fn ch1of(&self) -> CH1OF_R[src]
Bit 10 - Channel 2 Capture overflow flag
pub fn ch0of(&self) -> CH0OF_R[src]
Bit 9 - Channel 0 Capture overflow flag
pub fn brkif(&self) -> BRKIF_R[src]
Bit 7 - Break interrupt flag
pub fn trgif(&self) -> TRGIF_R[src]
Bit 6 - Trigger interrupt flag
pub fn cmtif(&self) -> CMTIF_R[src]
Bit 5 - Channel commutation interrupt flag
pub fn ch3if(&self) -> CH3IF_R[src]
Bit 4 - Channel 3 Capture/Compare interrupt enable
pub fn ch2if(&self) -> CH2IF_R[src]
Bit 3 - Channel 2 Capture/Compare interrupt enable
pub fn ch1if(&self) -> CH1IF_R[src]
Bit 2 - Channel 1s Capture/Compare interrupt enable
pub fn ch0if(&self) -> CH0IF_R[src]
Bit 1 - Channel 0s Capture/Compare interrupt flag
pub fn upif(&self) -> UPIF_R[src]
Bit 0 - Update interrupt flag
impl R<bool, CH1COMCEN_A>[src]
pub fn variant(&self) -> CH1COMCEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u8, CH1COMCTL_A>[src]
pub fn variant(&self) -> CH1COMCTL_A[src]
Get enumerated values variant
pub fn is_frozen(&self) -> bool[src]
Checks if the value of the field is FROZEN
pub fn is_active_on_match(&self) -> bool[src]
Checks if the value of the field is ACTIVEONMATCH
pub fn is_inactive_on_match(&self) -> bool[src]
Checks if the value of the field is INACTIVEONMATCH
pub fn is_toggle(&self) -> bool[src]
Checks if the value of the field is TOGGLE
pub fn is_force_inactive(&self) -> bool[src]
Checks if the value of the field is FORCEINACTIVE
pub fn is_force_active(&self) -> bool[src]
Checks if the value of the field is FORCEACTIVE
pub fn is_pwm_mode1(&self) -> bool[src]
Checks if the value of the field is PWMMODE1
pub fn is_pwm_mode2(&self) -> bool[src]
Checks if the value of the field is PWMMODE2
impl R<bool, CH1COMSEN_A>[src]
pub fn variant(&self) -> CH1COMSEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, CH1COMFEN_A>[src]
pub fn variant(&self) -> CH1COMFEN_A[src]
Get enumerated values variant
pub fn is_slow(&self) -> bool[src]
Checks if the value of the field is SLOW
pub fn is_fast(&self) -> bool[src]
Checks if the value of the field is FAST
impl R<u8, CH1MS_A>[src]
pub fn variant(&self) -> CH1MS_A[src]
Get enumerated values variant
pub fn is_output(&self) -> bool[src]
Checks if the value of the field is OUTPUT
pub fn is_ci1(&self) -> bool[src]
Checks if the value of the field is CI1
pub fn is_ci2(&self) -> bool[src]
Checks if the value of the field is CI2
pub fn is_its(&self) -> bool[src]
Checks if the value of the field is ITS
impl R<u16, Reg<u16, _CHCTL0_OUTPUT>>[src]
pub fn ch1comcen(&self) -> CH1COMCEN_R[src]
Bit 15 - Channel 1 output compare clear enable
pub fn ch1comctl(&self) -> CH1COMCTL_R[src]
Bits 12:14 - Channel 1 output compare mode
pub fn ch1comsen(&self) -> CH1COMSEN_R[src]
Bit 11 - Channel 1 output compare shadow enable
pub fn ch1comfen(&self) -> CH1COMFEN_R[src]
Bit 10 - Channel 1 output compare fast enable
pub fn ch1ms(&self) -> CH1MS_R[src]
Bits 8:9 - Channel 1 mode selection
pub fn ch0comcen(&self) -> CH0COMCEN_R[src]
Bit 7 - Channel 0 output compare clear enable
pub fn ch0comctl(&self) -> CH0COMCTL_R[src]
Bits 4:6 - Channel 0 compare output control
pub fn ch0comsen(&self) -> CH0COMSEN_R[src]
Bit 3 - Channel 0 output compare shadow enable
pub fn ch0comfen(&self) -> CH0COMFEN_R[src]
Bit 2 - Channel 0 output compare fast enable
pub fn ch0ms(&self) -> CH0MS_R[src]
Bits 0:1 - Channel 0 I/O mode selection
impl R<u16, Reg<u16, _CHCTL0_INPUT>>[src]
pub fn ch1capflt(&self) -> CH1CAPFLT_R[src]
Bits 12:15 - Channel 1 input capture filter control
pub fn ch1cappsc(&self) -> CH1CAPPSC_R[src]
Bits 10:11 - Channel 1 input capture prescaler
pub fn ch1ms(&self) -> CH1MS_R[src]
Bits 8:9 - Channel 1 mode selection
pub fn ch0capflt(&self) -> CH0CAPFLT_R[src]
Bits 4:7 - Channel 0 input capture filter control
pub fn ch0cappsc(&self) -> CH0CAPPSC_R[src]
Bits 2:3 - Channel 0 input capture prescaler
pub fn ch0ms(&self) -> CH0MS_R[src]
Bits 0:1 - Channel 0 mode selection
impl R<bool, CH3COMCEN_A>[src]
pub fn variant(&self) -> CH3COMCEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u8, CH3COMCTL_A>[src]
pub fn variant(&self) -> CH3COMCTL_A[src]
Get enumerated values variant
pub fn is_frozen(&self) -> bool[src]
Checks if the value of the field is FROZEN
pub fn is_active_on_match(&self) -> bool[src]
Checks if the value of the field is ACTIVEONMATCH
pub fn is_inactive_on_match(&self) -> bool[src]
Checks if the value of the field is INACTIVEONMATCH
pub fn is_toggle(&self) -> bool[src]
Checks if the value of the field is TOGGLE
pub fn is_force_inactive(&self) -> bool[src]
Checks if the value of the field is FORCEINACTIVE
pub fn is_force_active(&self) -> bool[src]
Checks if the value of the field is FORCEACTIVE
pub fn is_pwm_mode1(&self) -> bool[src]
Checks if the value of the field is PWMMODE1
pub fn is_pwm_mode2(&self) -> bool[src]
Checks if the value of the field is PWMMODE2
impl R<bool, CH3COMSEN_A>[src]
pub fn variant(&self) -> CH3COMSEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, CH3COMFEN_A>[src]
pub fn variant(&self) -> CH3COMFEN_A[src]
Get enumerated values variant
pub fn is_slow(&self) -> bool[src]
Checks if the value of the field is SLOW
pub fn is_fast(&self) -> bool[src]
Checks if the value of the field is FAST
impl R<u8, CH3MS_A>[src]
pub fn variant(&self) -> CH3MS_A[src]
Get enumerated values variant
pub fn is_output(&self) -> bool[src]
Checks if the value of the field is OUTPUT
pub fn is_ci1(&self) -> bool[src]
Checks if the value of the field is CI1
pub fn is_ci2(&self) -> bool[src]
Checks if the value of the field is CI2
pub fn is_its(&self) -> bool[src]
Checks if the value of the field is ITS
impl R<u16, Reg<u16, _CHCTL1_OUTPUT>>[src]
pub fn ch3comcen(&self) -> CH3COMCEN_R[src]
Bit 15 - Channel 3 output compare clear enable
pub fn ch3comctl(&self) -> CH3COMCTL_R[src]
Bits 12:14 - Channel 3 compare output control
pub fn ch3comsen(&self) -> CH3COMSEN_R[src]
Bit 11 - Channel 3 output compare shadow enable
pub fn ch3comfen(&self) -> CH3COMFEN_R[src]
Bit 10 - Channel 3 output compare fast enable
pub fn ch3ms(&self) -> CH3MS_R[src]
Bits 8:9 - Channel 3 mode selection
pub fn ch2comcen(&self) -> CH2COMCEN_R[src]
Bit 7 - Channel 2 output compare clear enable
pub fn ch2comctl(&self) -> CH2COMCTL_R[src]
Bits 4:6 - Channel 2 compare output control
pub fn ch2comsen(&self) -> CH2COMSEN_R[src]
Bit 3 - Channel 2 output compare shadow enable
pub fn ch2comfen(&self) -> CH2COMFEN_R[src]
Bit 2 - Channel 2 output compare fast enable
pub fn ch2ms(&self) -> CH2MS_R[src]
Bits 0:1 - Channel 2 mode selection
impl R<u16, Reg<u16, _CHCTL1_INPUT>>[src]
pub fn ch3capflt(&self) -> CH3CAPFLT_R[src]
Bits 12:15 - Channel 3 input capture filter control
pub fn ch3cappsc(&self) -> CH3CAPPSC_R[src]
Bits 10:11 - Channel 3 input capture prescaler
pub fn ch3ms(&self) -> CH3MS_R[src]
Bits 8:9 - Channel 3 mode selection
pub fn ch2capflt(&self) -> CH2CAPFLT_R[src]
Bits 4:7 - Channel 2 input capture filter control
pub fn ch2cappsc(&self) -> CH2CAPPSC_R[src]
Bits 2:3 - Channel 2 input capture prescaler
pub fn ch2ms(&self) -> CH2MS_R[src]
Bits 0:1 - Channel 2 mode selection
impl R<bool, CH3P_A>[src]
pub fn variant(&self) -> CH3P_A[src]
Get enumerated values variant
pub fn is_not_inverted(&self) -> bool[src]
Checks if the value of the field is NOTINVERTED
pub fn is_inverted(&self) -> bool[src]
Checks if the value of the field is INVERTED
impl R<bool, CH3EN_A>[src]
pub fn variant(&self) -> CH3EN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, CH2NP_A>[src]
pub fn variant(&self) -> CH2NP_A[src]
Get enumerated values variant
pub fn is_not_inverted(&self) -> bool[src]
Checks if the value of the field is NOTINVERTED
pub fn is_inverted(&self) -> bool[src]
Checks if the value of the field is INVERTED
impl R<bool, CH2NEN_A>[src]
pub fn variant(&self) -> CH2NEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u16, Reg<u16, _CHCTL2>>[src]
pub fn ch3p(&self) -> CH3P_R[src]
Bit 13 - Channel 3 polarity
pub fn ch3en(&self) -> CH3EN_R[src]
Bit 12 - Channel 3 enable
pub fn ch2np(&self) -> CH2NP_R[src]
Bit 11 - Channel 2 complementary output polarity
pub fn ch2nen(&self) -> CH2NEN_R[src]
Bit 10 - Channel 2 complementary output enable
pub fn ch2p(&self) -> CH2P_R[src]
Bit 9 - Channel 2 polarity
pub fn ch2en(&self) -> CH2EN_R[src]
Bit 8 - Channel 2 enable
pub fn ch1np(&self) -> CH1NP_R[src]
Bit 7 - Channel 1 complementary output polarity
pub fn ch1nen(&self) -> CH1NEN_R[src]
Bit 6 - Channel 1 complementary output enable
pub fn ch1p(&self) -> CH1P_R[src]
Bit 5 - Channel 1 polarity
pub fn ch1en(&self) -> CH1EN_R[src]
Bit 4 - Channel 1 enable
pub fn ch0np(&self) -> CH0NP_R[src]
Bit 3 - Channel 0 complementary output polarity
pub fn ch0nen(&self) -> CH0NEN_R[src]
Bit 2 - Channel 0 complementary output enable
pub fn ch0p(&self) -> CH0P_R[src]
Bit 1 - Channel 0 polarity
pub fn ch0en(&self) -> CH0EN_R[src]
Bit 0 - Channel 0 enable
impl R<u16, Reg<u16, _CNT>>[src]
impl R<u16, Reg<u16, _PSC>>[src]
impl R<u16, Reg<u16, _CAR>>[src]
impl R<u16, Reg<u16, _CREP>>[src]
impl R<u16, Reg<u16, _CH0CV>>[src]
impl R<u16, Reg<u16, _CH1CV>>[src]
impl R<u16, Reg<u16, _CH2CV>>[src]
impl R<u16, Reg<u16, _CH3CV>>[src]
impl R<bool, POEN_A>[src]
pub fn variant(&self) -> POEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, OAEN_A>[src]
pub fn variant(&self) -> OAEN_A[src]
Get enumerated values variant
pub fn is_manual(&self) -> bool[src]
Checks if the value of the field is MANUAL
pub fn is_automatic(&self) -> bool[src]
Checks if the value of the field is AUTOMATIC
impl R<bool, BRKP_A>[src]
pub fn variant(&self) -> BRKP_A[src]
Get enumerated values variant
pub fn is_inverted(&self) -> bool[src]
Checks if the value of the field is INVERTED
pub fn is_not_inverted(&self) -> bool[src]
Checks if the value of the field is NOTINVERTED
impl R<bool, BRKEN_A>[src]
pub fn variant(&self) -> BRKEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, ROS_A>[src]
pub fn variant(&self) -> ROS_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, IOS_A>[src]
pub fn variant(&self) -> IOS_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u8, PROT_A>[src]
pub fn variant(&self) -> PROT_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_mode0(&self) -> bool[src]
Checks if the value of the field is MODE0
pub fn is_mode1(&self) -> bool[src]
Checks if the value of the field is MODE1
pub fn is_mode2(&self) -> bool[src]
Checks if the value of the field is MODE2
impl R<u16, Reg<u16, _CCHP>>[src]
pub fn poen(&self) -> POEN_R[src]
Bit 15 - Primary output enable
pub fn oaen(&self) -> OAEN_R[src]
Bit 14 - Output automatic enable
pub fn brkp(&self) -> BRKP_R[src]
Bit 13 - Break polarity
pub fn brken(&self) -> BRKEN_R[src]
Bit 12 - Break enable
pub fn ros(&self) -> ROS_R[src]
Bit 11 - Run mode off-state configure
pub fn ios(&self) -> IOS_R[src]
Bit 10 - Idle mode off-state configure
pub fn prot(&self) -> PROT_R[src]
Bits 8:9 - Complementary register protect control
pub fn dtcfg(&self) -> DTCFG_R[src]
Bits 0:7 - Dead time configure
impl R<u16, Reg<u16, _DMACFG>>[src]
pub fn dmatc(&self) -> DMATC_R[src]
Bits 8:12 - DMA transfer count
pub fn dmata(&self) -> DMATA_R[src]
Bits 0:4 - DMA transfer access start address
impl R<u16, Reg<u16, _DMATB>>[src]
impl R<u16, Reg<u16, _CFG>>[src]
pub fn outsel(&self) -> OUTSEL_R[src]
Bit 0 - The output value selection
pub fn ccsel(&self) -> CCSEL_R[src]
Bit 1 - Write Capture/Compare register selection
impl R<u8, CKDIV_A>[src]
pub fn variant(&self) -> Variant<u8, CKDIV_A>[src]
Get enumerated values variant
pub fn is_div1(&self) -> bool[src]
Checks if the value of the field is DIV1
pub fn is_div2(&self) -> bool[src]
Checks if the value of the field is DIV2
pub fn is_div4(&self) -> bool[src]
Checks if the value of the field is DIV4
impl R<bool, ARSE_A>[src]
pub fn variant(&self) -> ARSE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u8, CAM_A>[src]
pub fn variant(&self) -> CAM_A[src]
Get enumerated values variant
pub fn is_edge_aligned(&self) -> bool[src]
Checks if the value of the field is EDGEALIGNED
pub fn is_center_aligned_counting_down(&self) -> bool[src]
Checks if the value of the field is CENTERALIGNEDCOUNTINGDOWN
pub fn is_center_aligned_counting_up(&self) -> bool[src]
Checks if the value of the field is CENTERALIGNEDCOUNTINGUP
pub fn is_center_aligned_counting_up_down(&self) -> bool[src]
Checks if the value of the field is CENTERALIGNEDCOUNTINGUPDOWN
impl R<bool, DIR_A>[src]
pub fn variant(&self) -> DIR_A[src]
Get enumerated values variant
pub fn is_up(&self) -> bool[src]
Checks if the value of the field is UP
pub fn is_down(&self) -> bool[src]
Checks if the value of the field is DOWN
impl R<bool, SPM_A>[src]
pub fn variant(&self) -> SPM_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, UPS_A>[src]
pub fn variant(&self) -> UPS_A[src]
Get enumerated values variant
pub fn is_any_event(&self) -> bool[src]
Checks if the value of the field is ANYEVENT
pub fn is_counter_only(&self) -> bool[src]
Checks if the value of the field is COUNTERONLY
impl R<bool, UPDIS_A>[src]
pub fn variant(&self) -> UPDIS_A[src]
Get enumerated values variant
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
impl R<bool, CEN_A>[src]
pub fn variant(&self) -> CEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u16, Reg<u16, _CTL0>>[src]
pub fn ckdiv(&self) -> CKDIV_R[src]
Bits 8:9 - Clock division
pub fn arse(&self) -> ARSE_R[src]
Bit 7 - Auto-reload shadow enable
pub fn cam(&self) -> CAM_R[src]
Bits 5:6 - Counter aligns mode selection
pub fn dir(&self) -> DIR_R[src]
Bit 4 - Direction
pub fn spm(&self) -> SPM_R[src]
Bit 3 - Single pulse mode
pub fn ups(&self) -> UPS_R[src]
Bit 2 - Update request source
pub fn updis(&self) -> UPDIS_R[src]
Bit 1 - Update disable
pub fn cen(&self) -> CEN_R[src]
Bit 0 - Counter enable
impl R<u8, MMC_A>[src]
pub fn variant(&self) -> Variant<u8, MMC_A>[src]
Get enumerated values variant
pub fn is_reset(&self) -> bool[src]
Checks if the value of the field is RESET
pub fn is_enable(&self) -> bool[src]
Checks if the value of the field is ENABLE
pub fn is_update(&self) -> bool[src]
Checks if the value of the field is UPDATE
impl R<u16, Reg<u16, _CTL1>>[src]
pub fn ti0s(&self) -> TI0S_R[src]
Bit 7 - Channel 0 trigger input selection
pub fn mmc(&self) -> MMC_R[src]
Bits 4:6 - Master mode control
pub fn dmas(&self) -> DMAS_R[src]
Bit 3 - DMA request source selection
impl R<u16, Reg<u16, _SMCFG>>[src]
pub fn etp(&self) -> ETP_R[src]
Bit 15 - External trigger polarity
pub fn smc1(&self) -> SMC1_R[src]
Bit 14 - Part of SMC for enable External clock mode1
pub fn etpsc(&self) -> ETPSC_R[src]
Bits 12:13 - External trigger prescaler
pub fn etfc(&self) -> ETFC_R[src]
Bits 8:11 - External trigger filter control
pub fn msm(&self) -> MSM_R[src]
Bit 7 - Master/Slave mode
pub fn trgs(&self) -> TRGS_R[src]
Bits 4:6 - Trigger selection
pub fn ocrc(&self) -> OCRC_R[src]
Bit 3 - OCREF clear source selection
pub fn smc(&self) -> SMC_R[src]
Bits 0:2 - Slave mode control
impl R<bool, UPDEN_A>[src]
pub fn variant(&self) -> UPDEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, UPIE_A>[src]
pub fn variant(&self) -> UPIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u16, Reg<u16, _DMAINTEN>>[src]
pub fn trgden(&self) -> TRGDEN_R[src]
Bit 14 - Trigger DMA request enable
pub fn ch3den(&self) -> CH3DEN_R[src]
Bit 12 - Channel 3 Capture/Compare DMA request enable
pub fn ch2den(&self) -> CH2DEN_R[src]
Bit 11 - Channel 2 Capture/Compare DMA request enable
pub fn ch1den(&self) -> CH1DEN_R[src]
Bit 10 - Channel 1 Capture/Compare DMA request enable
pub fn ch0den(&self) -> CH0DEN_R[src]
Bit 9 - Channel 0 Capture/Compare DMA request enable
pub fn upden(&self) -> UPDEN_R[src]
Bit 8 - Update DMA request enable
pub fn trgie(&self) -> TRGIE_R[src]
Bit 6 - Trigger interrupt enable
pub fn ch3ie(&self) -> CH3IE_R[src]
Bit 4 - Channel 3 Capture/Compare interrupt enable
pub fn ch2ie(&self) -> CH2IE_R[src]
Bit 3 - Channel 2 Capture/Compare interrupt enable
pub fn ch1ie(&self) -> CH1IE_R[src]
Bit 2 - Channel 1 Capture/Compare interrupt enable
pub fn ch0ie(&self) -> CH0IE_R[src]
Bit 1 - Channel 0 Capture/Compare interrupt enable
pub fn upie(&self) -> UPIE_R[src]
Bit 0 - Update Capture/Compare interrupt enable
impl R<bool, UPIF_A>[src]
pub fn variant(&self) -> UPIF_A[src]
Get enumerated values variant
pub fn is_clear(&self) -> bool[src]
Checks if the value of the field is CLEAR
pub fn is_update_pending(&self) -> bool[src]
Checks if the value of the field is UPDATEPENDING
impl R<u16, Reg<u16, _INTF>>[src]
pub fn ch3of(&self) -> CH3OF_R[src]
Bit 12 - Channel 3 Capture overflow flag
pub fn ch2of(&self) -> CH2OF_R[src]
Bit 11 - Channel 2 Capture overflow flag
pub fn ch1of(&self) -> CH1OF_R[src]
Bit 10 - Channel 1 Capture overflow flag
pub fn ch0of(&self) -> CH0OF_R[src]
Bit 9 - Channel 0 Capture overflow flag
pub fn trgif(&self) -> TRGIF_R[src]
Bit 6 - Trigger interrupt flag
pub fn ch3if(&self) -> CH3IF_R[src]
Bit 4 - Channel 3 Capture/Compare interrupt enable
pub fn ch2if(&self) -> CH2IF_R[src]
Bit 3 - Channel 2 Capture/Compare interrupt enable
pub fn ch1if(&self) -> CH1IF_R[src]
Bit 2 - Channel 1 Capture/Compare interrupt enable
pub fn ch0if(&self) -> CH0IF_R[src]
Bit 1 - Channel 0 Capture/Compare interrupt flag
pub fn upif(&self) -> UPIF_R[src]
Bit 0 - Update interrupt flag
impl R<bool, CH1COMCEN_A>[src]
pub fn variant(&self) -> CH1COMCEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u8, CH1COMCTL_A>[src]
pub fn variant(&self) -> CH1COMCTL_A[src]
Get enumerated values variant
pub fn is_frozen(&self) -> bool[src]
Checks if the value of the field is FROZEN
pub fn is_active_on_match(&self) -> bool[src]
Checks if the value of the field is ACTIVEONMATCH
pub fn is_inactive_on_match(&self) -> bool[src]
Checks if the value of the field is INACTIVEONMATCH
pub fn is_toggle(&self) -> bool[src]
Checks if the value of the field is TOGGLE
pub fn is_force_inactive(&self) -> bool[src]
Checks if the value of the field is FORCEINACTIVE
pub fn is_force_active(&self) -> bool[src]
Checks if the value of the field is FORCEACTIVE
pub fn is_pwm_mode1(&self) -> bool[src]
Checks if the value of the field is PWMMODE1
pub fn is_pwm_mode2(&self) -> bool[src]
Checks if the value of the field is PWMMODE2
impl R<bool, CH1COMSEN_A>[src]
pub fn variant(&self) -> CH1COMSEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, CH1COMFEN_A>[src]
pub fn variant(&self) -> CH1COMFEN_A[src]
Get enumerated values variant
pub fn is_slow(&self) -> bool[src]
Checks if the value of the field is SLOW
pub fn is_fast(&self) -> bool[src]
Checks if the value of the field is FAST
impl R<u8, CH1MS_A>[src]
pub fn variant(&self) -> CH1MS_A[src]
Get enumerated values variant
pub fn is_output(&self) -> bool[src]
Checks if the value of the field is OUTPUT
pub fn is_ci1(&self) -> bool[src]
Checks if the value of the field is CI1
pub fn is_ci2(&self) -> bool[src]
Checks if the value of the field is CI2
pub fn is_its(&self) -> bool[src]
Checks if the value of the field is ITS
impl R<u16, Reg<u16, _CHCTL0_OUTPUT>>[src]
pub fn ch1comcen(&self) -> CH1COMCEN_R[src]
Bit 15 - Channel 1 output compare clear enable
pub fn ch1comctl(&self) -> CH1COMCTL_R[src]
Bits 12:14 - Channel 1 output compare mode
pub fn ch1comsen(&self) -> CH1COMSEN_R[src]
Bit 11 - Channel 1 output compare shadow enable
pub fn ch1comfen(&self) -> CH1COMFEN_R[src]
Bit 10 - Channel 1 output compare fast enable
pub fn ch1ms(&self) -> CH1MS_R[src]
Bits 8:9 - Channel 1 mode selection
pub fn ch0comcen(&self) -> CH0COMCEN_R[src]
Bit 7 - Channel 0 output compare clear enable
pub fn ch0comctl(&self) -> CH0COMCTL_R[src]
Bits 4:6 - Channel 0 compare output control
pub fn ch0comsen(&self) -> CH0COMSEN_R[src]
Bit 3 - Channel 0 output compare shadow enable
pub fn ch0comfen(&self) -> CH0COMFEN_R[src]
Bit 2 - Channel 0 output compare fast enable
pub fn ch0ms(&self) -> CH0MS_R[src]
Bits 0:1 - Channel 0 mode selection
impl R<u16, Reg<u16, _CHCTL0_INPUT>>[src]
pub fn ch1capflt(&self) -> CH1CAPFLT_R[src]
Bits 12:15 - Channel 1 input capture filter control
pub fn ch1cappsc(&self) -> CH1CAPPSC_R[src]
Bits 10:11 - Channel 1 input capture prescaler
pub fn ch1ms(&self) -> CH1MS_R[src]
Bits 8:9 - Channel 1 mode selection
pub fn ch0capflt(&self) -> CH0CAPFLT_R[src]
Bits 4:7 - Channel 0 input capture filter control
pub fn ch0cappsc(&self) -> CH0CAPPSC_R[src]
Bits 2:3 - Channel 0 input capture prescaler
pub fn ch0ms(&self) -> CH0MS_R[src]
Bits 0:1 - Channel 0 mode selection
impl R<bool, CH3COMCEN_A>[src]
pub fn variant(&self) -> CH3COMCEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u8, CH3COMCTL_A>[src]
pub fn variant(&self) -> CH3COMCTL_A[src]
Get enumerated values variant
pub fn is_frozen(&self) -> bool[src]
Checks if the value of the field is FROZEN
pub fn is_active_on_match(&self) -> bool[src]
Checks if the value of the field is ACTIVEONMATCH
pub fn is_inactive_on_match(&self) -> bool[src]
Checks if the value of the field is INACTIVEONMATCH
pub fn is_toggle(&self) -> bool[src]
Checks if the value of the field is TOGGLE
pub fn is_force_inactive(&self) -> bool[src]
Checks if the value of the field is FORCEINACTIVE
pub fn is_force_active(&self) -> bool[src]
Checks if the value of the field is FORCEACTIVE
pub fn is_pwm_mode1(&self) -> bool[src]
Checks if the value of the field is PWMMODE1
pub fn is_pwm_mode2(&self) -> bool[src]
Checks if the value of the field is PWMMODE2
impl R<bool, CH3COMSEN_A>[src]
pub fn variant(&self) -> CH3COMSEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, CH3COMFEN_A>[src]
pub fn variant(&self) -> CH3COMFEN_A[src]
Get enumerated values variant
pub fn is_slow(&self) -> bool[src]
Checks if the value of the field is SLOW
pub fn is_fast(&self) -> bool[src]
Checks if the value of the field is FAST
impl R<u8, CH3MS_A>[src]
pub fn variant(&self) -> CH3MS_A[src]
Get enumerated values variant
pub fn is_output(&self) -> bool[src]
Checks if the value of the field is OUTPUT
pub fn is_ci1(&self) -> bool[src]
Checks if the value of the field is CI1
pub fn is_ci2(&self) -> bool[src]
Checks if the value of the field is CI2
pub fn is_its(&self) -> bool[src]
Checks if the value of the field is ITS
impl R<u16, Reg<u16, _CHCTL1_OUTPUT>>[src]
pub fn ch3comcen(&self) -> CH3COMCEN_R[src]
Bit 15 - Channel 3 output compare clear enable
pub fn ch3comctl(&self) -> CH3COMCTL_R[src]
Bits 12:14 - Channel 3 compare output control
pub fn ch3comsen(&self) -> CH3COMSEN_R[src]
Bit 11 - Channel 3 compare output control
pub fn ch3comfen(&self) -> CH3COMFEN_R[src]
Bit 10 - Channel 3 output compare fast enable
pub fn ch3ms(&self) -> CH3MS_R[src]
Bits 8:9 - Channel 3 mode selection
pub fn ch2comcen(&self) -> CH2COMCEN_R[src]
Bit 7 - Channel 2 output compare clear enable
pub fn ch2comctl(&self) -> CH2COMCTL_R[src]
Bits 4:6 - Channel 2 compare output control
pub fn ch2comsen(&self) -> CH2COMSEN_R[src]
Bit 3 - Channel 2 output compare shadow enable
pub fn ch2comfen(&self) -> CH2COMFEN_R[src]
Bit 2 - Channel 2 output compare fast enable
pub fn ch2ms(&self) -> CH2MS_R[src]
Bits 0:1 - Channel 2 mode selection
impl R<u16, Reg<u16, _CHCTL1_INPUT>>[src]
pub fn ch3capflt(&self) -> CH3CAPFLT_R[src]
Bits 12:15 - Channel 3 input capture filter control
pub fn ch3cappsc(&self) -> CH3CAPPSC_R[src]
Bits 10:11 - Channel 3 input capture prescaler
pub fn ch3ms(&self) -> CH3MS_R[src]
Bits 8:9 - Channel 3 mode selection
pub fn ch2capflt(&self) -> CH2CAPFLT_R[src]
Bits 4:7 - Channel 2 input capture filter control
pub fn ch2cappsc(&self) -> CH2CAPPSC_R[src]
Bits 2:3 - Channel 2 input capture prescaler
pub fn ch2ms(&self) -> CH2MS_R[src]
Bits 0:1 - Channel 2 mode selection
impl R<bool, CH3NP_A>[src]
pub fn variant(&self) -> CH3NP_A[src]
Get enumerated values variant
pub fn is_not_inverted(&self) -> bool[src]
Checks if the value of the field is NOTINVERTED
pub fn is_inverted(&self) -> bool[src]
Checks if the value of the field is INVERTED
impl R<bool, CH3P_A>[src]
pub fn variant(&self) -> CH3P_A[src]
Get enumerated values variant
pub fn is_not_inverted(&self) -> bool[src]
Checks if the value of the field is NOTINVERTED
pub fn is_inverted(&self) -> bool[src]
Checks if the value of the field is INVERTED
impl R<bool, CH3EN_A>[src]
pub fn variant(&self) -> CH3EN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u16, Reg<u16, _CHCTL2>>[src]
pub fn ch3np(&self) -> CH3NP_R[src]
Bit 15 - Channel 3 complementary output polarity
pub fn ch3p(&self) -> CH3P_R[src]
Bit 13 - Channel 3 polarity
pub fn ch3en(&self) -> CH3EN_R[src]
Bit 12 - Channel 3 enable
pub fn ch2np(&self) -> CH2NP_R[src]
Bit 11 - Channel 2 complementary output polarity
pub fn ch2p(&self) -> CH2P_R[src]
Bit 9 - Channel 2 polarity
pub fn ch2en(&self) -> CH2EN_R[src]
Bit 8 - Channel 2 enable
pub fn ch1np(&self) -> CH1NP_R[src]
Bit 7 - Channel 1 complementary output polarity
pub fn ch1p(&self) -> CH1P_R[src]
Bit 5 - Channel 1 polarity
pub fn ch1en(&self) -> CH1EN_R[src]
Bit 4 - Channel 1 enable
pub fn ch0np(&self) -> CH0NP_R[src]
Bit 3 - Channel 0 complementary output polarity
pub fn ch0p(&self) -> CH0P_R[src]
Bit 1 - Channel 0 polarity
pub fn ch0en(&self) -> CH0EN_R[src]
Bit 0 - Channel 0 enable
impl R<u32, Reg<u32, _CNT>>[src]
impl R<u16, Reg<u16, _PSC>>[src]
impl R<u32, Reg<u32, _CAR>>[src]
impl R<u32, Reg<u32, _CH0CV>>[src]
impl R<u32, Reg<u32, _CH1CV>>[src]
impl R<u32, Reg<u32, _CH2CV>>[src]
impl R<u32, Reg<u32, _CH3CV>>[src]
impl R<u16, Reg<u16, _DMACFG>>[src]
pub fn dmatc(&self) -> DMATC_R[src]
Bits 8:12 - DMA transfer count
pub fn dmata(&self) -> DMATA_R[src]
Bits 0:4 - DMA transfer access start address
impl R<u32, Reg<u32, _DMATB>>[src]
impl R<u16, Reg<u16, _CFG>>[src]
impl R<bool, ARSE_A>[src]
pub fn variant(&self) -> ARSE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, SPM_A>[src]
pub fn variant(&self) -> SPM_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, UPS_A>[src]
pub fn variant(&self) -> UPS_A[src]
Get enumerated values variant
pub fn is_any_event(&self) -> bool[src]
Checks if the value of the field is ANYEVENT
pub fn is_counter_only(&self) -> bool[src]
Checks if the value of the field is COUNTERONLY
impl R<bool, UPDIS_A>[src]
pub fn variant(&self) -> UPDIS_A[src]
Get enumerated values variant
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
impl R<bool, CEN_A>[src]
pub fn variant(&self) -> CEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u16, Reg<u16, _CTL0>>[src]
pub fn arse(&self) -> ARSE_R[src]
Bit 7 - Auto-reload shadow enable
pub fn spm(&self) -> SPM_R[src]
Bit 3 - Single pulse mode
pub fn ups(&self) -> UPS_R[src]
Bit 2 - Update source
pub fn updis(&self) -> UPDIS_R[src]
Bit 1 - Update disable
pub fn cen(&self) -> CEN_R[src]
Bit 0 - Counter enable
impl R<u8, MMC_A>[src]
pub fn variant(&self) -> Variant<u8, MMC_A>[src]
Get enumerated values variant
pub fn is_reset(&self) -> bool[src]
Checks if the value of the field is RESET
pub fn is_enable(&self) -> bool[src]
Checks if the value of the field is ENABLE
pub fn is_update(&self) -> bool[src]
Checks if the value of the field is UPDATE
impl R<u16, Reg<u16, _CTL1>>[src]
impl R<bool, UPDEN_A>[src]
pub fn variant(&self) -> UPDEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, UPIE_A>[src]
pub fn variant(&self) -> UPIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u16, Reg<u16, _DMAINTEN>>[src]
pub fn upden(&self) -> UPDEN_R[src]
Bit 8 - Update DMA request enable
pub fn upie(&self) -> UPIE_R[src]
Bit 0 - Update interrupt enable
impl R<bool, UPIF_A>[src]
pub fn variant(&self) -> UPIF_A[src]
Get enumerated values variant
pub fn is_clear(&self) -> bool[src]
Checks if the value of the field is CLEAR
pub fn is_update_pending(&self) -> bool[src]
Checks if the value of the field is UPDATEPENDING
impl R<u16, Reg<u16, _INTF>>[src]
impl R<u16, Reg<u16, _CNT>>[src]
impl R<u16, Reg<u16, _PSC>>[src]
impl R<u16, Reg<u16, _CAR>>[src]
impl R<bool, ARSE_A>[src]
pub fn variant(&self) -> ARSE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, UPS_A>[src]
pub fn variant(&self) -> UPS_A[src]
Get enumerated values variant
pub fn is_any_event(&self) -> bool[src]
Checks if the value of the field is ANYEVENT
pub fn is_counter_only(&self) -> bool[src]
Checks if the value of the field is COUNTERONLY
impl R<bool, UPDIS_A>[src]
pub fn variant(&self) -> UPDIS_A[src]
Get enumerated values variant
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
impl R<bool, CEN_A>[src]
pub fn variant(&self) -> CEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u16, Reg<u16, _CTL0>>[src]
pub fn ckdiv(&self) -> CKDIV_R[src]
Bits 8:9 - Clock division
pub fn arse(&self) -> ARSE_R[src]
Bit 7 - Auto-reload shadow enable
pub fn ups(&self) -> UPS_R[src]
Bit 2 - Update source
pub fn updis(&self) -> UPDIS_R[src]
Bit 1 - Update disable
pub fn cen(&self) -> CEN_R[src]
Bit 0 - Counter enable
impl R<bool, UPIE_A>[src]
pub fn variant(&self) -> UPIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u16, Reg<u16, _DMAINTEN>>[src]
pub fn ch0ie(&self) -> CH0IE_R[src]
Bit 1 - Channel 0 interrupt enable
pub fn upie(&self) -> UPIE_R[src]
Bit 0 - Update interrupt enable
impl R<bool, UPIF_A>[src]
pub fn variant(&self) -> UPIF_A[src]
Get enumerated values variant
pub fn is_clear(&self) -> bool[src]
Checks if the value of the field is CLEAR
pub fn is_update_pending(&self) -> bool[src]
Checks if the value of the field is UPDATEPENDING
impl R<u16, Reg<u16, _INTF>>[src]
pub fn ch0of(&self) -> CH0OF_R[src]
Bit 9 - Channel 0 Capture overflow flag
pub fn ch0if(&self) -> CH0IF_R[src]
Bit 1 - Channel 0 interrupt flag
pub fn upif(&self) -> UPIF_R[src]
Bit 0 - Update interrupt flag
impl R<u8, CH0MS_A>[src]
pub fn variant(&self) -> CH0MS_A[src]
Get enumerated values variant
pub fn is_output(&self) -> bool[src]
Checks if the value of the field is OUTPUT
pub fn is_ci1(&self) -> bool[src]
Checks if the value of the field is CI1
pub fn is_ci2(&self) -> bool[src]
Checks if the value of the field is CI2
pub fn is_its(&self) -> bool[src]
Checks if the value of the field is ITS
impl R<bool, CH0COMFEN_A>[src]
pub fn variant(&self) -> CH0COMFEN_A[src]
Get enumerated values variant
pub fn is_slow(&self) -> bool[src]
Checks if the value of the field is SLOW
pub fn is_fast(&self) -> bool[src]
Checks if the value of the field is FAST
impl R<bool, CH0COMSEN_A>[src]
pub fn variant(&self) -> CH0COMSEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u8, CH0COMCTL_A>[src]
pub fn variant(&self) -> CH0COMCTL_A[src]
Get enumerated values variant
pub fn is_frozen(&self) -> bool[src]
Checks if the value of the field is FROZEN
pub fn is_active_on_match(&self) -> bool[src]
Checks if the value of the field is ACTIVEONMATCH
pub fn is_inactive_on_match(&self) -> bool[src]
Checks if the value of the field is INACTIVEONMATCH
pub fn is_toggle(&self) -> bool[src]
Checks if the value of the field is TOGGLE
pub fn is_force_inactive(&self) -> bool[src]
Checks if the value of the field is FORCEINACTIVE
pub fn is_force_active(&self) -> bool[src]
Checks if the value of the field is FORCEACTIVE
pub fn is_pwm_mode1(&self) -> bool[src]
Checks if the value of the field is PWMMODE1
pub fn is_pwm_mode2(&self) -> bool[src]
Checks if the value of the field is PWMMODE2
impl R<bool, CH0COMCEN_A>[src]
pub fn variant(&self) -> CH0COMCEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u16, Reg<u16, _CHCTL0_OUTPUT>>[src]
pub fn ch0ms(&self) -> CH0MS_R[src]
Bits 0:1 - Channel 0 mode selection
pub fn ch0comfen(&self) -> CH0COMFEN_R[src]
Bit 2 - Channel 0 output compare fast enable
pub fn ch0comsen(&self) -> CH0COMSEN_R[src]
Bit 3 - Channel 0 output compare shadow enable
pub fn ch0comctl(&self) -> CH0COMCTL_R[src]
Bits 4:6 - Channel 0 compare output control
pub fn ch0comcen(&self) -> CH0COMCEN_R[src]
Bit 7 - Channel 0 output compare clear enable
impl R<u16, Reg<u16, _CHCTL0_INPUT>>[src]
pub fn ch0capflt(&self) -> CH0CAPFLT_R[src]
Bits 4:7 - Channel 0 input capture filter control
pub fn ch0cappsc(&self) -> CH0CAPPSC_R[src]
Bits 2:3 - Channel 0 input capture prescaler
pub fn ch0ms(&self) -> CH0MS_R[src]
Bits 0:1 - Channel 0 mode selection
impl R<bool, CH0NP_A>[src]
pub fn variant(&self) -> CH0NP_A[src]
Get enumerated values variant
pub fn is_not_inverted(&self) -> bool[src]
Checks if the value of the field is NOTINVERTED
pub fn is_inverted(&self) -> bool[src]
Checks if the value of the field is INVERTED
impl R<bool, CH0P_A>[src]
pub fn variant(&self) -> CH0P_A[src]
Get enumerated values variant
pub fn is_not_inverted(&self) -> bool[src]
Checks if the value of the field is NOTINVERTED
pub fn is_inverted(&self) -> bool[src]
Checks if the value of the field is INVERTED
impl R<bool, CH0EN_A>[src]
pub fn variant(&self) -> CH0EN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u16, Reg<u16, _CHCTL2>>[src]
pub fn ch0np(&self) -> CH0NP_R[src]
Bit 3 - Channel 0 complementary output polarity
pub fn ch0p(&self) -> CH0P_R[src]
Bit 1 - Channel 0 polarity
pub fn ch0en(&self) -> CH0EN_R[src]
Bit 0 - Channel 0 enable
impl R<u16, Reg<u16, _CNT>>[src]
impl R<u16, Reg<u16, _PSC>>[src]
impl R<u16, Reg<u16, _CAR>>[src]
impl R<u16, Reg<u16, _CH0CV>>[src]
impl R<u16, Reg<u16, _IRMP>>[src]
impl R<u16, Reg<u16, _CFG>>[src]
impl R<bool, ARSE_A>[src]
pub fn variant(&self) -> ARSE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, SPM_A>[src]
pub fn variant(&self) -> SPM_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, UPS_A>[src]
pub fn variant(&self) -> UPS_A[src]
Get enumerated values variant
pub fn is_any_event(&self) -> bool[src]
Checks if the value of the field is ANYEVENT
pub fn is_counter_only(&self) -> bool[src]
Checks if the value of the field is COUNTERONLY
impl R<bool, UPDIS_A>[src]
pub fn variant(&self) -> UPDIS_A[src]
Get enumerated values variant
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
impl R<bool, CEN_A>[src]
pub fn variant(&self) -> CEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u16, Reg<u16, _CTL0>>[src]
pub fn ckdiv(&self) -> CKDIV_R[src]
Bits 8:9 - Clock division
pub fn arse(&self) -> ARSE_R[src]
Bit 7 - Auto-reload shadow enable
pub fn spm(&self) -> SPM_R[src]
Bit 3 - Single pulse mode
pub fn ups(&self) -> UPS_R[src]
Bit 2 - Update source
pub fn updis(&self) -> UPDIS_R[src]
Bit 1 - Update disable
pub fn cen(&self) -> CEN_R[src]
Bit 0 - Counter enable
impl R<u8, MMC_A>[src]
pub fn variant(&self) -> Variant<u8, MMC_A>[src]
Get enumerated values variant
pub fn is_reset(&self) -> bool[src]
Checks if the value of the field is RESET
pub fn is_enable(&self) -> bool[src]
Checks if the value of the field is ENABLE
pub fn is_update(&self) -> bool[src]
Checks if the value of the field is UPDATE
impl R<u16, Reg<u16, _CTL1>>[src]
pub fn iso1(&self) -> ISO1_R[src]
Bit 10 - Idle state of channel 1 output
pub fn iso0n(&self) -> ISO0N_R[src]
Bit 9 - Idle state of channel 1 output
pub fn iso0(&self) -> ISO0_R[src]
Bit 8 - Idle state of channel 0 output
pub fn mmc(&self) -> MMC_R[src]
Bits 4:6 - Master mode control
pub fn dmas(&self) -> DMAS_R[src]
Bit 3 - DMA request source selection
pub fn ccuc(&self) -> CCUC_R[src]
Bit 2 - Commutation control shadow register update control
pub fn ccse(&self) -> CCSE_R[src]
Bit 0 - Commutation control shadow register enable
impl R<u16, Reg<u16, _SMCFG>>[src]
pub fn msm(&self) -> MSM_R[src]
Bit 7 - Master/Slave mode
pub fn trgs(&self) -> TRGS_R[src]
Bits 4:6 - Trigger selection
pub fn smc(&self) -> SMC_R[src]
Bits 0:2 - Slave mode control
impl R<bool, UPDEN_A>[src]
pub fn variant(&self) -> UPDEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, UPIE_A>[src]
pub fn variant(&self) -> UPIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u16, Reg<u16, _DMAINTEN>>[src]
pub fn trgden(&self) -> TRGDEN_R[src]
Bit 14 - DMA and interrupt enable register
pub fn ch1den(&self) -> CH1DEN_R[src]
Bit 10 - Channel 1 Capture/Compare DMA request enable
pub fn ch0den(&self) -> CH0DEN_R[src]
Bit 9 - Channel 0 Capture/Compare DMA request enable
pub fn upden(&self) -> UPDEN_R[src]
Bit 8 - Update DMA request enable
pub fn brkie(&self) -> BRKIE_R[src]
Bit 7 - Break interrupt enable
pub fn trgie(&self) -> TRGIE_R[src]
Bit 6 - Trigger interrupt enable
pub fn cmtie(&self) -> CMTIE_R[src]
Bit 5 - CMT interrupt enable
pub fn ch1ie(&self) -> CH1IE_R[src]
Bit 2 - Channel 1 Capture/Compare interrupt enable
pub fn ch0ie(&self) -> CH0IE_R[src]
Bit 1 - Channel 0 Capture/Compare interrupt enable
pub fn upie(&self) -> UPIE_R[src]
Bit 0 - Update interrupt enable
impl R<bool, UPIF_A>[src]
pub fn variant(&self) -> UPIF_A[src]
Get enumerated values variant
pub fn is_clear(&self) -> bool[src]
Checks if the value of the field is CLEAR
pub fn is_update_pending(&self) -> bool[src]
Checks if the value of the field is UPDATEPENDING
impl R<u16, Reg<u16, _INTF>>[src]
pub fn ch1of(&self) -> CH1OF_R[src]
Bit 10 - Channel 1 Capture overflow flag
pub fn ch0of(&self) -> CH0OF_R[src]
Bit 9 - Channel 0 Capture overflow flag
pub fn brkif(&self) -> BRKIF_R[src]
Bit 7 - Break interrupt flag
pub fn trgif(&self) -> TRGIF_R[src]
Bit 6 - Trigger interrupt flag
pub fn cmtif(&self) -> CMTIF_R[src]
Bit 5 - Channel commutation interrupt flag
pub fn ch1if(&self) -> CH1IF_R[src]
Bit 2 - Channel 1 interrupt enable
pub fn ch0if(&self) -> CH0IF_R[src]
Bit 1 - Channel 0 interrupt enable
pub fn upif(&self) -> UPIF_R[src]
Bit 0 - Update interrupt flag
impl R<bool, CH1COMCEN_A>[src]
pub fn variant(&self) -> CH1COMCEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u8, CH1COMCTL_A>[src]
pub fn variant(&self) -> CH1COMCTL_A[src]
Get enumerated values variant
pub fn is_frozen(&self) -> bool[src]
Checks if the value of the field is FROZEN
pub fn is_active_on_match(&self) -> bool[src]
Checks if the value of the field is ACTIVEONMATCH
pub fn is_inactive_on_match(&self) -> bool[src]
Checks if the value of the field is INACTIVEONMATCH
pub fn is_toggle(&self) -> bool[src]
Checks if the value of the field is TOGGLE
pub fn is_force_inactive(&self) -> bool[src]
Checks if the value of the field is FORCEINACTIVE
pub fn is_force_active(&self) -> bool[src]
Checks if the value of the field is FORCEACTIVE
pub fn is_pwm_mode1(&self) -> bool[src]
Checks if the value of the field is PWMMODE1
pub fn is_pwm_mode2(&self) -> bool[src]
Checks if the value of the field is PWMMODE2
impl R<bool, CH1COMSEN_A>[src]
pub fn variant(&self) -> CH1COMSEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, CH1COMFEN_A>[src]
pub fn variant(&self) -> CH1COMFEN_A[src]
Get enumerated values variant
pub fn is_slow(&self) -> bool[src]
Checks if the value of the field is SLOW
pub fn is_fast(&self) -> bool[src]
Checks if the value of the field is FAST
impl R<u8, CH1MS_A>[src]
pub fn variant(&self) -> CH1MS_A[src]
Get enumerated values variant
pub fn is_output(&self) -> bool[src]
Checks if the value of the field is OUTPUT
pub fn is_ci1(&self) -> bool[src]
Checks if the value of the field is CI1
pub fn is_ci2(&self) -> bool[src]
Checks if the value of the field is CI2
pub fn is_its(&self) -> bool[src]
Checks if the value of the field is ITS
impl R<u16, Reg<u16, _CHCTL0_OUTPUT>>[src]
pub fn ch1comcen(&self) -> CH1COMCEN_R[src]
Bit 15 - Channel 1 output compare clear enable
pub fn ch1comctl(&self) -> CH1COMCTL_R[src]
Bits 12:14 - Channel 1 output compare mode
pub fn ch1comsen(&self) -> CH1COMSEN_R[src]
Bit 11 - Channel 1 output compare shadow enable
pub fn ch1comfen(&self) -> CH1COMFEN_R[src]
Bit 10 - Channel 1 output compare fast enable
pub fn ch1ms(&self) -> CH1MS_R[src]
Bits 8:9 - Channel 1 mode selection
pub fn ch0comcen(&self) -> CH0COMCEN_R[src]
Bit 7 - Channel 0 output compare clear enable
pub fn ch0comctl(&self) -> CH0COMCTL_R[src]
Bits 4:6 - Channel 0 compare output control
pub fn ch0comsen(&self) -> CH0COMSEN_R[src]
Bit 3 - Channel 0 output compare shadow enable
pub fn ch0comfen(&self) -> CH0COMFEN_R[src]
Bit 2 - Channel 0 output compare fast enable
pub fn ch0ms(&self) -> CH0MS_R[src]
Bits 0:1 - Channel 0 mode selection
impl R<u16, Reg<u16, _CHCTL0_INPUT>>[src]
pub fn ch1capflt(&self) -> CH1CAPFLT_R[src]
Bits 12:15 - Channel 1 input capture filter control
pub fn ch1cappsc(&self) -> CH1CAPPSC_R[src]
Bits 10:11 - Channel 1 input capture prescaler
pub fn ch1ms(&self) -> CH1MS_R[src]
Bits 8:9 - Channel 1 mode selection
pub fn ch0capflt(&self) -> CH0CAPFLT_R[src]
Bits 4:7 - Channel 0 input capture filter control
pub fn ch0cappsc(&self) -> CH0CAPPSC_R[src]
Bits 2:3 - Channel 0 input capture prescaler
pub fn ch0ms(&self) -> CH0MS_R[src]
Bits 0:1 - Channel 0 mode selection
impl R<bool, CH1NP_A>[src]
pub fn variant(&self) -> CH1NP_A[src]
Get enumerated values variant
pub fn is_not_inverted(&self) -> bool[src]
Checks if the value of the field is NOTINVERTED
pub fn is_inverted(&self) -> bool[src]
Checks if the value of the field is INVERTED
impl R<bool, CH1P_A>[src]
pub fn variant(&self) -> CH1P_A[src]
Get enumerated values variant
pub fn is_not_inverted(&self) -> bool[src]
Checks if the value of the field is NOTINVERTED
pub fn is_inverted(&self) -> bool[src]
Checks if the value of the field is INVERTED
impl R<bool, CH1EN_A>[src]
pub fn variant(&self) -> CH1EN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, CH0NEN_A>[src]
pub fn variant(&self) -> CH0NEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u16, Reg<u16, _CHCTL2>>[src]
pub fn ch1np(&self) -> CH1NP_R[src]
Bit 7 - Channel 1 complementary output polarity
pub fn ch1p(&self) -> CH1P_R[src]
Bit 5 - Channel 1 polarity
pub fn ch1en(&self) -> CH1EN_R[src]
Bit 4 - Channel 1 polarity
pub fn ch0np(&self) -> CH0NP_R[src]
Bit 3 - Channel 0 complementary output polarity
pub fn ch0nen(&self) -> CH0NEN_R[src]
Bit 2 - Channel 0 complementary output enable
pub fn ch0p(&self) -> CH0P_R[src]
Bit 1 - Channel 0 polarity
pub fn ch0en(&self) -> CH0EN_R[src]
Bit 0 - Channel 0 enable
impl R<u16, Reg<u16, _CNT>>[src]
impl R<u16, Reg<u16, _PSC>>[src]
impl R<u32, Reg<u32, _CAR>>[src]
impl R<u16, Reg<u16, _CREP>>[src]
impl R<u16, Reg<u16, _CH0CV>>[src]
impl R<u16, Reg<u16, _CH1CV>>[src]
impl R<bool, POEN_A>[src]
pub fn variant(&self) -> POEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, OAEN_A>[src]
pub fn variant(&self) -> OAEN_A[src]
Get enumerated values variant
pub fn is_manual(&self) -> bool[src]
Checks if the value of the field is MANUAL
pub fn is_automatic(&self) -> bool[src]
Checks if the value of the field is AUTOMATIC
impl R<bool, BRKP_A>[src]
pub fn variant(&self) -> BRKP_A[src]
Get enumerated values variant
pub fn is_inverted(&self) -> bool[src]
Checks if the value of the field is INVERTED
pub fn is_not_inverted(&self) -> bool[src]
Checks if the value of the field is NOTINVERTED
impl R<bool, BRKEN_A>[src]
pub fn variant(&self) -> BRKEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, ROS_A>[src]
pub fn variant(&self) -> ROS_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, IOS_A>[src]
pub fn variant(&self) -> IOS_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u8, PROT_A>[src]
pub fn variant(&self) -> PROT_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_mode0(&self) -> bool[src]
Checks if the value of the field is MODE0
pub fn is_mode1(&self) -> bool[src]
Checks if the value of the field is MODE1
pub fn is_mode2(&self) -> bool[src]
Checks if the value of the field is MODE2
impl R<u16, Reg<u16, _CCHP>>[src]
pub fn poen(&self) -> POEN_R[src]
Bit 15 - Primary output enable
pub fn oaen(&self) -> OAEN_R[src]
Bit 14 - Output automatic enable
pub fn brkp(&self) -> BRKP_R[src]
Bit 13 - Break polarity
pub fn brken(&self) -> BRKEN_R[src]
Bit 12 - Break enable
pub fn ros(&self) -> ROS_R[src]
Bit 11 - Run mode off-state configure
pub fn ios(&self) -> IOS_R[src]
Bit 10 - Idle mode off-state configure
pub fn prot(&self) -> PROT_R[src]
Bits 8:9 - Complementary register protect control
pub fn dtcfg(&self) -> DTCFG_R[src]
Bits 0:7 - Dead time configure
impl R<u16, Reg<u16, _DMACFG>>[src]
pub fn dmatc(&self) -> DMATC_R[src]
Bits 8:12 - DMA transfer count
pub fn dmata(&self) -> DMATA_R[src]
Bits 0:4 - DMA transfer access start address
impl R<u16, Reg<u16, _DMATB>>[src]
impl R<u16, Reg<u16, _CFG>>[src]
pub fn ccsel(&self) -> CCSEL_R[src]
Bit 1 - Write Capture/Compare register selection
pub fn outsel(&self) -> OUTSEL_R[src]
Bit 0 - The output value selection
impl R<bool, ARSE_A>[src]
pub fn variant(&self) -> ARSE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, SPM_A>[src]
pub fn variant(&self) -> SPM_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, UPS_A>[src]
pub fn variant(&self) -> UPS_A[src]
Get enumerated values variant
pub fn is_any_event(&self) -> bool[src]
Checks if the value of the field is ANYEVENT
pub fn is_counter_only(&self) -> bool[src]
Checks if the value of the field is COUNTERONLY
impl R<bool, UPDIS_A>[src]
pub fn variant(&self) -> UPDIS_A[src]
Get enumerated values variant
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
impl R<bool, CEN_A>[src]
pub fn variant(&self) -> CEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u16, Reg<u16, _CTL0>>[src]
pub fn ckdiv(&self) -> CKDIV_R[src]
Bits 8:9 - Clock division
pub fn arse(&self) -> ARSE_R[src]
Bit 7 - Auto-reload shadow enable
pub fn spm(&self) -> SPM_R[src]
Bit 3 - Single pulse mode
pub fn ups(&self) -> UPS_R[src]
Bit 2 - Update source
pub fn updis(&self) -> UPDIS_R[src]
Bit 1 - Update disable
pub fn cen(&self) -> CEN_R[src]
Bit 0 - Counter enable
impl R<u16, Reg<u16, _CTL1>>[src]
pub fn iso0n(&self) -> ISO0N_R[src]
Bit 9 - Idle state of channel 0 complementary output
pub fn iso0(&self) -> ISO0_R[src]
Bit 8 - Idle state of channel 0 output
pub fn dmas(&self) -> DMAS_R[src]
Bit 3 - DMA request source selection
pub fn ccuc(&self) -> CCUC_R[src]
Bit 2 - Commutation control shadow register update control
pub fn ccse(&self) -> CCSE_R[src]
Bit 0 - Commutation control shadow register enable
impl R<bool, UPDEN_A>[src]
pub fn variant(&self) -> UPDEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, UPIE_A>[src]
pub fn variant(&self) -> UPIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u16, Reg<u16, _DMAINTEN>>[src]
pub fn ch0den(&self) -> CH0DEN_R[src]
Bit 9 - Channel 0 Capture/Compare DMA request enable
pub fn upden(&self) -> UPDEN_R[src]
Bit 8 - Update DMA request enable
pub fn brkie(&self) -> BRKIE_R[src]
Bit 7 - Break interrupt enable
pub fn cmtie(&self) -> CMTIE_R[src]
Bit 5 - CMT interrupt enable
pub fn ch0ie(&self) -> CH0IE_R[src]
Bit 1 - Channel 0 Capture/Compare interrupt enable
pub fn upie(&self) -> UPIE_R[src]
Bit 0 - Update interrupt enable
impl R<bool, UPIF_A>[src]
pub fn variant(&self) -> UPIF_A[src]
Get enumerated values variant
pub fn is_clear(&self) -> bool[src]
Checks if the value of the field is CLEAR
pub fn is_update_pending(&self) -> bool[src]
Checks if the value of the field is UPDATEPENDING
impl R<u16, Reg<u16, _INTF>>[src]
pub fn ch0of(&self) -> CH0OF_R[src]
Bit 9 - Channel 0 Capture overflow flag
pub fn brkif(&self) -> BRKIF_R[src]
Bit 7 - Break interrupt flag
pub fn cmtif(&self) -> CMTIF_R[src]
Bit 5 - Channel commutation interrupt flag
pub fn ch0if(&self) -> CH0IF_R[src]
Bit 1 - Channel 0 interrupt flag
pub fn upif(&self) -> UPIF_R[src]
Bit 0 - Update interrupt flag
impl R<bool, CH0COMCEN_A>[src]
pub fn variant(&self) -> CH0COMCEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u8, CH0COMCTL_A>[src]
pub fn variant(&self) -> CH0COMCTL_A[src]
Get enumerated values variant
pub fn is_frozen(&self) -> bool[src]
Checks if the value of the field is FROZEN
pub fn is_active_on_match(&self) -> bool[src]
Checks if the value of the field is ACTIVEONMATCH
pub fn is_inactive_on_match(&self) -> bool[src]
Checks if the value of the field is INACTIVEONMATCH
pub fn is_toggle(&self) -> bool[src]
Checks if the value of the field is TOGGLE
pub fn is_force_inactive(&self) -> bool[src]
Checks if the value of the field is FORCEINACTIVE
pub fn is_force_active(&self) -> bool[src]
Checks if the value of the field is FORCEACTIVE
pub fn is_pwm_mode1(&self) -> bool[src]
Checks if the value of the field is PWMMODE1
pub fn is_pwm_mode2(&self) -> bool[src]
Checks if the value of the field is PWMMODE2
impl R<bool, CH0COMSEN_A>[src]
pub fn variant(&self) -> CH0COMSEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, CH0COMFEN_A>[src]
pub fn variant(&self) -> CH0COMFEN_A[src]
Get enumerated values variant
pub fn is_slow(&self) -> bool[src]
Checks if the value of the field is SLOW
pub fn is_fast(&self) -> bool[src]
Checks if the value of the field is FAST
impl R<u8, CH0MS_A>[src]
pub fn variant(&self) -> CH0MS_A[src]
Get enumerated values variant
pub fn is_output(&self) -> bool[src]
Checks if the value of the field is OUTPUT
pub fn is_ci1(&self) -> bool[src]
Checks if the value of the field is CI1
pub fn is_ci2(&self) -> bool[src]
Checks if the value of the field is CI2
pub fn is_its(&self) -> bool[src]
Checks if the value of the field is ITS
impl R<u16, Reg<u16, _CHCTL0_OUTPUT>>[src]
pub fn ch0comcen(&self) -> CH0COMCEN_R[src]
Bit 7 - Channel 0 output compare clear enable
pub fn ch0comctl(&self) -> CH0COMCTL_R[src]
Bits 4:6 - Channel 0 compare output control
pub fn ch0comsen(&self) -> CH0COMSEN_R[src]
Bit 3 - Channel 0 output compare shadow enable
pub fn ch0comfen(&self) -> CH0COMFEN_R[src]
Bit 2 - Channel 0 output compare fast enable
pub fn ch0ms(&self) -> CH0MS_R[src]
Bits 0:1 - Channel 0 mode selection
impl R<u16, Reg<u16, _CHCTL0_INPUT>>[src]
pub fn ch0capflt(&self) -> CH0CAPFLT_R[src]
Bits 4:7 - Channel 0 input capture filter control
pub fn ch0cappsc(&self) -> CH0CAPPSC_R[src]
Bits 2:3 - Channel 0 input capture prescaler
pub fn ch0ms(&self) -> CH0MS_R[src]
Bits 0:1 - Channel 0 mode selection
impl R<bool, CH0NP_A>[src]
pub fn variant(&self) -> CH0NP_A[src]
Get enumerated values variant
pub fn is_not_inverted(&self) -> bool[src]
Checks if the value of the field is NOTINVERTED
pub fn is_inverted(&self) -> bool[src]
Checks if the value of the field is INVERTED
impl R<bool, CH0NEN_A>[src]
pub fn variant(&self) -> CH0NEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, CH0P_A>[src]
pub fn variant(&self) -> CH0P_A[src]
Get enumerated values variant
pub fn is_not_inverted(&self) -> bool[src]
Checks if the value of the field is NOTINVERTED
pub fn is_inverted(&self) -> bool[src]
Checks if the value of the field is INVERTED
impl R<bool, CH0EN_A>[src]
pub fn variant(&self) -> CH0EN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u16, Reg<u16, _CHCTL2>>[src]
pub fn ch0np(&self) -> CH0NP_R[src]
Bit 3 - Channel 0 complementary output polarity
pub fn ch0nen(&self) -> CH0NEN_R[src]
Bit 2 - Channel 0 complementary output enable
pub fn ch0p(&self) -> CH0P_R[src]
Bit 1 - Channel 0 polarity
pub fn ch0en(&self) -> CH0EN_R[src]
Bit 0 - Channel 0 enable
impl R<u16, Reg<u16, _CNT>>[src]
impl R<u16, Reg<u16, _PSC>>[src]
impl R<u16, Reg<u16, _CAR>>[src]
impl R<u16, Reg<u16, _CREP>>[src]
impl R<u16, Reg<u16, _CH0CV>>[src]
impl R<bool, POEN_A>[src]
pub fn variant(&self) -> POEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, OAEN_A>[src]
pub fn variant(&self) -> OAEN_A[src]
Get enumerated values variant
pub fn is_manual(&self) -> bool[src]
Checks if the value of the field is MANUAL
pub fn is_automatic(&self) -> bool[src]
Checks if the value of the field is AUTOMATIC
impl R<bool, BRKP_A>[src]
pub fn variant(&self) -> BRKP_A[src]
Get enumerated values variant
pub fn is_inverted(&self) -> bool[src]
Checks if the value of the field is INVERTED
pub fn is_not_inverted(&self) -> bool[src]
Checks if the value of the field is NOTINVERTED
impl R<bool, BRKEN_A>[src]
pub fn variant(&self) -> BRKEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, ROS_A>[src]
pub fn variant(&self) -> ROS_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, IOS_A>[src]
pub fn variant(&self) -> IOS_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u8, PROT_A>[src]
pub fn variant(&self) -> PROT_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_mode0(&self) -> bool[src]
Checks if the value of the field is MODE0
pub fn is_mode1(&self) -> bool[src]
Checks if the value of the field is MODE1
pub fn is_mode2(&self) -> bool[src]
Checks if the value of the field is MODE2
impl R<u16, Reg<u16, _CCHP>>[src]
pub fn poen(&self) -> POEN_R[src]
Bit 15 - Primary output enable
pub fn oaen(&self) -> OAEN_R[src]
Bit 14 - Output automatic enable
pub fn brkp(&self) -> BRKP_R[src]
Bit 13 - Break polarity
pub fn brken(&self) -> BRKEN_R[src]
Bit 12 - Break enable
pub fn ros(&self) -> ROS_R[src]
Bit 11 - Run mode off-state configure
pub fn ios(&self) -> IOS_R[src]
Bit 10 - Idle mode off-state configure
pub fn prot(&self) -> PROT_R[src]
Bits 8:9 - Complementary register protect control
pub fn dtcfg(&self) -> DTCFG_R[src]
Bits 0:7 - Dead time configure
impl R<u16, Reg<u16, _DMACFG>>[src]
pub fn dmatc(&self) -> DMATC_R[src]
Bits 8:12 - DMA transfer count
pub fn dmata(&self) -> DMATA_R[src]
Bits 0:4 - DMA transfer access start address
impl R<u16, Reg<u16, _DMATB>>[src]
impl R<u16, Reg<u16, _CFG>>[src]
pub fn outsel(&self) -> OUTSEL_R[src]
Bit 0 - The output value selection
pub fn ccsel(&self) -> CCSEL_R[src]
Bit 1 - Write Capture/Compare register selection
impl R<u32, Reg<u32, _CTL>>[src]
pub fn cdt(&self) -> CDT_R[src]
Bits 28:31 - Charge State Duration Time
pub fn ctdt(&self) -> CTDT_R[src]
Bits 24:27 - Charge Transfer State Duration Time
pub fn ecdt(&self) -> ECDT_R[src]
Bits 17:23 - Extend Charge State Maximum Duration Time
pub fn ecen(&self) -> ECEN_R[src]
Bit 16 - Extend Charge State Enable
pub fn ecdiv(&self) -> ECDIV_R[src]
Bit 15 - ECCLK clock division factor
pub fn ctcdiv(&self) -> CTCDIV_R[src]
Bits 12:14 - CTCLK clock division factor
pub fn mcn(&self) -> MCN_R[src]
Bits 5:7 - Max cycle number of a sequence
pub fn pinmod(&self) -> PINMOD_R[src]
Bit 4 - Pin mode
pub fn egsel(&self) -> EGSEL_R[src]
Bit 3 - Edge selection
pub fn trgmod(&self) -> TRGMOD_R[src]
Bit 2 - Trigger mode selection
pub fn tsis(&self) -> TSIS_R[src]
Bit 1 - TSI start
pub fn tsien(&self) -> TSIEN_R[src]
Bit 0 - TSI enable
impl R<u32, Reg<u32, _INTEN>>[src]
pub fn mnerrie(&self) -> MNERRIE_R[src]
Bit 1 - Max Cycle Number Error Interrupt Enable
pub fn ctcfie(&self) -> CTCFIE_R[src]
Bit 0 - Charge-transfer complete flag Interrupt Enable
impl R<u32, Reg<u32, _INTC>>[src]
pub fn cmnerr(&self) -> CMNERR_R[src]
Bit 1 - Clear max cycle number error
pub fn cctcf(&self) -> CCTCF_R[src]
Bit 0 - Clear charge-transfer complete flag
impl R<u32, Reg<u32, _INTF>>[src]
pub fn mnerr(&self) -> MNERR_R[src]
Bit 1 - Max count error flag
pub fn ctcf(&self) -> CTCF_R[src]
Bit 0 - Charge-Transfer complete flag
impl R<u32, Reg<u32, _PHM>>[src]
pub fn g5p3(&self) -> G5P3_R[src]
Bit 23 - G5P3 Schmitt trigger hysteresis mode
pub fn g5p2(&self) -> G5P2_R[src]
Bit 22 - G5P2 Schmitt trigger hysteresis mode
pub fn g5p1(&self) -> G5P1_R[src]
Bit 21 - G5P1 Schmitt trigger hysteresis mode
pub fn g5p0(&self) -> G5P0_R[src]
Bit 20 - G5P0 Schmitt trigger hysteresis mode
pub fn g4p3(&self) -> G4P3_R[src]
Bit 19 - G4P3 Schmitt trigger hysteresis mode
pub fn g4p2(&self) -> G4P2_R[src]
Bit 18 - G4P2 Schmitt trigger hysteresis mode
pub fn g4p1(&self) -> G4P1_R[src]
Bit 17 - G4P1 Schmitt trigger hysteresis mode
pub fn g4p0(&self) -> G4P0_R[src]
Bit 16 - G4P0 Schmitt trigger hysteresis mode
pub fn g3p3(&self) -> G3P3_R[src]
Bit 15 - G3P3 Schmitt trigger hysteresis mode
pub fn g3p2(&self) -> G3P2_R[src]
Bit 14 - G3P2 Schmitt trigger hysteresis mode
pub fn g3p1(&self) -> G3P1_R[src]
Bit 13 - G3P1 Schmitt trigger hysteresis mode
pub fn g3p0(&self) -> G3P0_R[src]
Bit 12 - G3P0 Schmitt trigger hysteresis mode
pub fn g2p3(&self) -> G2P3_R[src]
Bit 11 - G2P3 Schmitt trigger hysteresis mode
pub fn g2p2(&self) -> G2P2_R[src]
Bit 10 - G2P2 Schmitt trigger hysteresis mode
pub fn g2p1(&self) -> G2P1_R[src]
Bit 9 - G2P1 Schmitt trigger hysteresis mode
pub fn g2p0(&self) -> G2P0_R[src]
Bit 8 - G2P0 Schmitt trigger hysteresis mode
pub fn g1p3(&self) -> G1P3_R[src]
Bit 7 - G1P3 Schmitt trigger hysteresis mode
pub fn g1p2(&self) -> G1P2_R[src]
Bit 6 - G1P2 Schmitt trigger hysteresis mode
pub fn g1p1(&self) -> G1P1_R[src]
Bit 5 - G1P1 Schmitt trigger hysteresis mode
pub fn g1p0(&self) -> G1P0_R[src]
Bit 4 - G1P0 Schmitt trigger hysteresis mode
pub fn g0p3(&self) -> G0P3_R[src]
Bit 3 - G0P3 Schmitt trigger hysteresis mode
pub fn g0p2(&self) -> G0P2_R[src]
Bit 2 - G0P2 Schmitt trigger hysteresis mode
pub fn g0p1(&self) -> G0P1_R[src]
Bit 1 - G0P1 Schmitt trigger hysteresis mode
pub fn g0p0(&self) -> G0P0_R[src]
Bit 0 - G0P0 Schmitt trigger hysteresis mode
impl R<u32, Reg<u32, _ASW>>[src]
pub fn g5p3(&self) -> G5P3_R[src]
Bit 23 - G5P3 analog switch enable
pub fn g5p2(&self) -> G5P2_R[src]
Bit 22 - G5P2 analog switch enable
pub fn g5p1(&self) -> G5P1_R[src]
Bit 21 - G5P1 analog switch enable
pub fn g5p0(&self) -> G5P0_R[src]
Bit 20 - G5P0 analog switch enable
pub fn g4p3(&self) -> G4P3_R[src]
Bit 19 - G4P3 analog switch enable
pub fn g4p2(&self) -> G4P2_R[src]
Bit 18 - G4P2 analog switch enable
pub fn g4p1(&self) -> G4P1_R[src]
Bit 17 - G4P1 analog switch enable
pub fn g4p0(&self) -> G4P0_R[src]
Bit 16 - G4P0 analog switch enable
pub fn g3p3(&self) -> G3P3_R[src]
Bit 15 - G3P3 analog switch enable
pub fn g3p2(&self) -> G3P2_R[src]
Bit 14 - G3P2 analog switch enable
pub fn g3p1(&self) -> G3P1_R[src]
Bit 13 - G3P1 analog switch enable
pub fn g3p0(&self) -> G3P0_R[src]
Bit 12 - G3P0 analog switch enable
pub fn g2p3(&self) -> G2P3_R[src]
Bit 11 - G2P3 analog switch enable
pub fn g2p2(&self) -> G2P2_R[src]
Bit 10 - G2P2 analog switch enable
pub fn g2p1(&self) -> G2P1_R[src]
Bit 9 - G2P1 analog switch enable
pub fn g2p0(&self) -> G2P0_R[src]
Bit 8 - G2P0 analog switch enable
pub fn g1p3(&self) -> G1P3_R[src]
Bit 7 - G1P3 analog switch enable
pub fn g1p2(&self) -> G1P2_R[src]
Bit 6 - G1P2 analog switch enable
pub fn g1p1(&self) -> G1P1_R[src]
Bit 5 - G1P1 analog switch enable
pub fn g1p0(&self) -> G1P0_R[src]
Bit 4 - G1P0 analog switch enable
pub fn g0p3(&self) -> G0P3_R[src]
Bit 3 - G0P3 analog switch enable
pub fn g0p2(&self) -> G0P2_R[src]
Bit 2 - G0P2 analog switch enable
pub fn g0p1(&self) -> G0P1_R[src]
Bit 1 - G0P1 analog switch enable
pub fn g0p0(&self) -> G0P0_R[src]
Bit 0 - G0P0 analog switch enable
impl R<u32, Reg<u32, _SAMPCFG>>[src]
pub fn g5p3(&self) -> G5P3_R[src]
Bit 23 - G5P3 sampling mode
pub fn g5p2(&self) -> G5P2_R[src]
Bit 22 - G5P2 sampling mode
pub fn g5p1(&self) -> G5P1_R[src]
Bit 21 - G5P1 sampling mode
pub fn g5p0(&self) -> G5P0_R[src]
Bit 20 - G5P0 sampling mode
pub fn g4p3(&self) -> G4P3_R[src]
Bit 19 - G4P3 sampling mode
pub fn g4p2(&self) -> G4P2_R[src]
Bit 18 - G4P2 sampling mode
pub fn g4p1(&self) -> G4P1_R[src]
Bit 17 - G4P1 sampling mode
pub fn g4p0(&self) -> G4P0_R[src]
Bit 16 - G4P0 sampling mode
pub fn g3p3(&self) -> G3P3_R[src]
Bit 15 - G3P3 sampling mode
pub fn g3p2(&self) -> G3P2_R[src]
Bit 14 - G3P2 sampling mode
pub fn g3p1(&self) -> G3P1_R[src]
Bit 13 - G3P1 sampling mode
pub fn g3p0(&self) -> G3P0_R[src]
Bit 12 - G3P0 sampling mode
pub fn g2p3(&self) -> G2P3_R[src]
Bit 11 - G2P3 sampling mode
pub fn g2p2(&self) -> G2P2_R[src]
Bit 10 - G2P2 sampling mode
pub fn g2p1(&self) -> G2P1_R[src]
Bit 9 - G2P1 sampling mode
pub fn g2p0(&self) -> G2P0_R[src]
Bit 8 - G2P0 sampling mode
pub fn g1p3(&self) -> G1P3_R[src]
Bit 7 - G1P3 sampling mode
pub fn g1p2(&self) -> G1P2_R[src]
Bit 6 - G1P2 sampling mode
pub fn g1p1(&self) -> G1P1_R[src]
Bit 5 - G1P1 sampling mode
pub fn g1p0(&self) -> G1P0_R[src]
Bit 4 - G1P0 sampling mode
pub fn g0p3(&self) -> G0P3_R[src]
Bit 3 - G0P3 sampling mode
pub fn g0p2(&self) -> G0P2_R[src]
Bit 2 - G0P2 sampling mode
pub fn g0p1(&self) -> G0P1_R[src]
Bit 1 - G0P1 sampling mode
pub fn g0p0(&self) -> G0P0_R[src]
Bit 0 - G0P0 sampling mode
impl R<u32, Reg<u32, _CHCFG>>[src]
pub fn g5p3(&self) -> G5P3_R[src]
Bit 23 - G5P3 channel mode
pub fn g5p2(&self) -> G5P2_R[src]
Bit 22 - G5P2 channel mode
pub fn g5p1(&self) -> G5P1_R[src]
Bit 21 - G5P1 channel mode
pub fn g5p0(&self) -> G5P0_R[src]
Bit 20 - G5P0 channel mode
pub fn g4p3(&self) -> G4P3_R[src]
Bit 19 - G4P3 channel mode
pub fn g4p2(&self) -> G4P2_R[src]
Bit 18 - G4P2 channel mode
pub fn g4p1(&self) -> G4P1_R[src]
Bit 17 - G4P1 channel mode
pub fn g4p0(&self) -> G4P0_R[src]
Bit 16 - G4P0 channel mode
pub fn g3p3(&self) -> G3P3_R[src]
Bit 15 - G3P3 channel mode
pub fn g3p2(&self) -> G3P2_R[src]
Bit 14 - G3P2 channel mode
pub fn g3p1(&self) -> G3P1_R[src]
Bit 13 - G3P1 channel mode
pub fn g3p0(&self) -> G3P0_R[src]
Bit 12 - G3P0 channel mode
pub fn g2p3(&self) -> G2P3_R[src]
Bit 11 - G2P3 channel mode
pub fn g2p2(&self) -> G2P2_R[src]
Bit 10 - G2P2 channel mode
pub fn g2p1(&self) -> G2P1_R[src]
Bit 9 - G2P1 channel mode
pub fn g2p0(&self) -> G2P0_R[src]
Bit 8 - G2P0 channel mode
pub fn g1p3(&self) -> G1P3_R[src]
Bit 7 - G1P3 channel mode
pub fn g1p2(&self) -> G1P2_R[src]
Bit 6 - G1P2 channel mode
pub fn g1p1(&self) -> G1P1_R[src]
Bit 5 - G1P1 channel mode
pub fn g1p0(&self) -> G1P0_R[src]
Bit 4 - G1P0 channel mode
pub fn g0p3(&self) -> G0P3_R[src]
Bit 3 - G0P3 channel mode
pub fn g0p2(&self) -> G0P2_R[src]
Bit 2 - G0P2 channel mode
pub fn g0p1(&self) -> G0P1_R[src]
Bit 1 - G0P1 channel mode
pub fn g0p0(&self) -> G0P0_R[src]
Bit 0 - G0P0 channel mode
impl R<u32, Reg<u32, _GCTL>>[src]
pub fn gc5(&self) -> GC5_R[src]
Bit 21 - Analog I/O group 5 status
pub fn gc4(&self) -> GC4_R[src]
Bit 20 - Analog I/O group 4 status
pub fn gc3(&self) -> GC3_R[src]
Bit 19 - Analog I/O group 3 status
pub fn gc2(&self) -> GC2_R[src]
Bit 18 - Analog I/O group 2 status
pub fn gc1(&self) -> GC1_R[src]
Bit 17 - Analog I/O group 1 status
pub fn gc0(&self) -> GC0_R[src]
Bit 16 - Analog I/O group 0 status
pub fn ge5(&self) -> GE5_R[src]
Bit 5 - Analog I/O group 5 enable
pub fn ge4(&self) -> GE4_R[src]
Bit 4 - Analog I/O group 4 enable
pub fn ge3(&self) -> GE3_R[src]
Bit 3 - Analog I/O group 3 enable
pub fn ge2(&self) -> GE2_R[src]
Bit 2 - Analog I/O group 2 enable
pub fn ge1(&self) -> GE1_R[src]
Bit 1 - Analog I/O group 1 enable
pub fn ge0(&self) -> GE0_R[src]
Bit 0 - Analog I/O group 0 enable
impl R<u32, Reg<u32, _G0CYCN>>[src]
impl R<u32, Reg<u32, _G1CYCN>>[src]
impl R<u32, Reg<u32, _G2CYCN>>[src]
impl R<u32, Reg<u32, _G3CYCN>>[src]
impl R<u32, Reg<u32, _G4CYCN>>[src]
impl R<u32, Reg<u32, _G5CYCN>>[src]
impl R<bool, EBIE_A>[src]
pub fn variant(&self) -> EBIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, RTIE_A>[src]
pub fn variant(&self) -> RTIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, OVSMOD_A>[src]
pub fn variant(&self) -> OVSMOD_A[src]
Get enumerated values variant
pub fn is_oversampling16(&self) -> bool[src]
Checks if the value of the field is OVERSAMPLING16
pub fn is_oversampling8(&self) -> bool[src]
Checks if the value of the field is OVERSAMPLING8
impl R<bool, AMIE_A>[src]
pub fn variant(&self) -> AMIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, MEN_A>[src]
pub fn variant(&self) -> MEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, WL_A>[src]
pub fn variant(&self) -> WL_A[src]
Get enumerated values variant
pub fn is_bit8(&self) -> bool[src]
Checks if the value of the field is BIT8
pub fn is_bit9(&self) -> bool[src]
Checks if the value of the field is BIT9
impl R<bool, WM_A>[src]
pub fn variant(&self) -> WM_A[src]
Get enumerated values variant
pub fn is_idle(&self) -> bool[src]
Checks if the value of the field is IDLE
pub fn is_address(&self) -> bool[src]
Checks if the value of the field is ADDRESS
impl R<bool, PCEN_A>[src]
pub fn variant(&self) -> PCEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, PM_A>[src]
pub fn variant(&self) -> PM_A[src]
Get enumerated values variant
pub fn is_even(&self) -> bool[src]
Checks if the value of the field is EVEN
pub fn is_odd(&self) -> bool[src]
Checks if the value of the field is ODD
impl R<bool, PERRIE_A>[src]
pub fn variant(&self) -> PERRIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, TBEIE_A>[src]
pub fn variant(&self) -> TBEIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, TCIE_A>[src]
pub fn variant(&self) -> TCIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, RBNEIE_A>[src]
pub fn variant(&self) -> RBNEIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, IDLEIE_A>[src]
pub fn variant(&self) -> IDLEIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, TEN_A>[src]
pub fn variant(&self) -> TEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, REN_A>[src]
pub fn variant(&self) -> REN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, UESM_A>[src]
pub fn variant(&self) -> UESM_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, UEN_A>[src]
pub fn variant(&self) -> UEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CTL0>>[src]
pub fn ebie(&self) -> EBIE_R[src]
Bit 27 - End of Block interrupt enable
pub fn rtie(&self) -> RTIE_R[src]
Bit 26 - Receiver timeout interrupt enable
pub fn dea(&self) -> DEA_R[src]
Bits 21:25 - Driver Enable assertion time
pub fn ded(&self) -> DED_R[src]
Bits 16:20 - Driver Enable deassertion time
pub fn ovsmod(&self) -> OVSMOD_R[src]
Bit 15 - Oversampling mode
pub fn amie(&self) -> AMIE_R[src]
Bit 14 - ADDR match interrupt enable
pub fn men(&self) -> MEN_R[src]
Bit 13 - Mute mode enable
pub fn wl(&self) -> WL_R[src]
Bit 12 - Word length
pub fn wm(&self) -> WM_R[src]
Bit 11 - Wakeup method in mute mode
pub fn pcen(&self) -> PCEN_R[src]
Bit 10 - Parity control enable
pub fn pm(&self) -> PM_R[src]
Bit 9 - Parity selection
pub fn perrie(&self) -> PERRIE_R[src]
Bit 8 - Parity error interrupt enable
pub fn tbeie(&self) -> TBEIE_R[src]
Bit 7 - Transmitter register empty interrupt enable
pub fn tcie(&self) -> TCIE_R[src]
Bit 6 - Transmission complete interrupt enable
pub fn rbneie(&self) -> RBNEIE_R[src]
Bit 5 - Read data buffer not empty interrupt and overrun error interrupt enable
pub fn idleie(&self) -> IDLEIE_R[src]
Bit 4 - IDLE line detected interrupt enable
pub fn ten(&self) -> TEN_R[src]
Bit 3 - Transmitter enable
pub fn ren(&self) -> REN_R[src]
Bit 2 - Receiver enable
pub fn uesm(&self) -> UESM_R[src]
Bit 1 - USART enable in Deep-sleep mode
pub fn uen(&self) -> UEN_R[src]
Bit 0 - USART enable
impl R<bool, RTEN_A>[src]
pub fn variant(&self) -> RTEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u8, ABDM_A>[src]
pub fn variant(&self) -> Variant<u8, ABDM_A>[src]
Get enumerated values variant
pub fn is_start(&self) -> bool[src]
Checks if the value of the field is START
pub fn is_edge(&self) -> bool[src]
Checks if the value of the field is EDGE
impl R<bool, ABDEN_A>[src]
pub fn variant(&self) -> ABDEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, MSBF_A>[src]
pub fn variant(&self) -> MSBF_A[src]
Get enumerated values variant
pub fn is_lsb(&self) -> bool[src]
Checks if the value of the field is LSB
pub fn is_msb(&self) -> bool[src]
Checks if the value of the field is MSB
impl R<bool, DINV_A>[src]
pub fn variant(&self) -> DINV_A[src]
Get enumerated values variant
pub fn is_positive(&self) -> bool[src]
Checks if the value of the field is POSITIVE
pub fn is_negative(&self) -> bool[src]
Checks if the value of the field is NEGATIVE
impl R<bool, TINV_A>[src]
pub fn variant(&self) -> TINV_A[src]
Get enumerated values variant
pub fn is_standard(&self) -> bool[src]
Checks if the value of the field is STANDARD
pub fn is_inverted(&self) -> bool[src]
Checks if the value of the field is INVERTED
impl R<bool, RINV_A>[src]
pub fn variant(&self) -> RINV_A[src]
Get enumerated values variant
pub fn is_standard(&self) -> bool[src]
Checks if the value of the field is STANDARD
pub fn is_inverted(&self) -> bool[src]
Checks if the value of the field is INVERTED
impl R<bool, STRP_A>[src]
pub fn variant(&self) -> STRP_A[src]
Get enumerated values variant
pub fn is_standard(&self) -> bool[src]
Checks if the value of the field is STANDARD
pub fn is_swapped(&self) -> bool[src]
Checks if the value of the field is SWAPPED
impl R<bool, LMEN_A>[src]
pub fn variant(&self) -> LMEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u8, STB_A>[src]
pub fn variant(&self) -> STB_A[src]
Get enumerated values variant
pub fn is_stop1(&self) -> bool[src]
Checks if the value of the field is STOP1
pub fn is_stop0p5(&self) -> bool[src]
Checks if the value of the field is STOP0P5
pub fn is_stop2(&self) -> bool[src]
Checks if the value of the field is STOP2
pub fn is_stop1p5(&self) -> bool[src]
Checks if the value of the field is STOP1P5
impl R<bool, CKEN_A>[src]
pub fn variant(&self) -> CKEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, CPL_A>[src]
pub fn variant(&self) -> CPL_A[src]
Get enumerated values variant
pub fn is_not_inverted(&self) -> bool[src]
Checks if the value of the field is NOTINVERTED
pub fn is_inverted(&self) -> bool[src]
Checks if the value of the field is INVERTED
impl R<bool, CPH_A>[src]
pub fn variant(&self) -> CPH_A[src]
Get enumerated values variant
pub fn is_first(&self) -> bool[src]
Checks if the value of the field is FIRST
pub fn is_second(&self) -> bool[src]
Checks if the value of the field is SECOND
impl R<bool, CLEN_A>[src]
pub fn variant(&self) -> CLEN_A[src]
Get enumerated values variant
pub fn is_not_output(&self) -> bool[src]
Checks if the value of the field is NOTOUTPUT
pub fn is_output(&self) -> bool[src]
Checks if the value of the field is OUTPUT
impl R<bool, LBDIE_A>[src]
pub fn variant(&self) -> LBDIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, LBLEN_A>[src]
pub fn variant(&self) -> LBLEN_A[src]
Get enumerated values variant
pub fn is_bit10(&self) -> bool[src]
Checks if the value of the field is BIT10
pub fn is_bit11(&self) -> bool[src]
Checks if the value of the field is BIT11
impl R<bool, ADDM_A>[src]
pub fn variant(&self) -> ADDM_A[src]
Get enumerated values variant
pub fn is_bit4(&self) -> bool[src]
Checks if the value of the field is BIT4
pub fn is_full(&self) -> bool[src]
Checks if the value of the field is FULL
impl R<u32, Reg<u32, _CTL1>>[src]
pub fn addr(&self) -> ADDR_R[src]
Bits 24:31 - Address of the USART terminal
pub fn rten(&self) -> RTEN_R[src]
Bit 23 - Receiver timeout enable
pub fn abdm(&self) -> ABDM_R[src]
Bits 21:22 - Auto baud rate mode
pub fn abden(&self) -> ABDEN_R[src]
Bit 20 - Auto baud rate enable
pub fn msbf(&self) -> MSBF_R[src]
Bit 19 - Most significant bit first
pub fn dinv(&self) -> DINV_R[src]
Bit 18 - Data bit level inversion
pub fn tinv(&self) -> TINV_R[src]
Bit 17 - TX pin level inversion
pub fn rinv(&self) -> RINV_R[src]
Bit 16 - RX pin level inversion
pub fn strp(&self) -> STRP_R[src]
Bit 15 - Swap TX/RX pins
pub fn lmen(&self) -> LMEN_R[src]
Bit 14 - LIN mode enable
pub fn stb(&self) -> STB_R[src]
Bits 12:13 - STOP bits length
pub fn cken(&self) -> CKEN_R[src]
Bit 11 - CK pin enable
pub fn cpl(&self) -> CPL_R[src]
Bit 10 - Clock polarity
pub fn cph(&self) -> CPH_R[src]
Bit 9 - Clock phase
pub fn clen(&self) -> CLEN_R[src]
Bit 8 - CK length
pub fn lbdie(&self) -> LBDIE_R[src]
Bit 6 - LIN break detection interrupt enable
pub fn lblen(&self) -> LBLEN_R[src]
Bit 5 - LIN break frame length
pub fn addm(&self) -> ADDM_R[src]
Bit 4 - Address detection mode
impl R<bool, WUIE_A>[src]
pub fn variant(&self) -> WUIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u8, WUM_A>[src]
pub fn variant(&self) -> Variant<u8, WUM_A>[src]
Get enumerated values variant
pub fn is_address(&self) -> bool[src]
Checks if the value of the field is ADDRESS
pub fn is_start(&self) -> bool[src]
Checks if the value of the field is START
pub fn is_rxne(&self) -> bool[src]
Checks if the value of the field is RXNE
impl R<bool, DEP_A>[src]
pub fn variant(&self) -> DEP_A[src]
Get enumerated values variant
pub fn is_high(&self) -> bool[src]
Checks if the value of the field is HIGH
pub fn is_low(&self) -> bool[src]
Checks if the value of the field is LOW
impl R<bool, DEM_A>[src]
pub fn variant(&self) -> DEM_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, DDRE_A>[src]
pub fn variant(&self) -> DDRE_A[src]
Get enumerated values variant
pub fn is_not_disabled(&self) -> bool[src]
Checks if the value of the field is NOTDISABLED
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
impl R<bool, OVRD_A>[src]
pub fn variant(&self) -> OVRD_A[src]
Get enumerated values variant
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
impl R<bool, OSB_A>[src]
pub fn variant(&self) -> OSB_A[src]
Get enumerated values variant
pub fn is_sample3(&self) -> bool[src]
Checks if the value of the field is SAMPLE3
pub fn is_sample1(&self) -> bool[src]
Checks if the value of the field is SAMPLE1
impl R<bool, CTSIE_A>[src]
pub fn variant(&self) -> CTSIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, CTSEN_A>[src]
pub fn variant(&self) -> CTSEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, RTSEN_A>[src]
pub fn variant(&self) -> RTSEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, DENT_A>[src]
pub fn variant(&self) -> DENT_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, DENR_A>[src]
pub fn variant(&self) -> DENR_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, SCEN_A>[src]
pub fn variant(&self) -> SCEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, NKEN_A>[src]
pub fn variant(&self) -> NKEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, HDEN_A>[src]
pub fn variant(&self) -> HDEN_A[src]
Get enumerated values variant
pub fn is_not_selected(&self) -> bool[src]
Checks if the value of the field is NOTSELECTED
pub fn is_selected(&self) -> bool[src]
Checks if the value of the field is SELECTED
impl R<bool, IRLP_A>[src]
pub fn variant(&self) -> IRLP_A[src]
Get enumerated values variant
pub fn is_normal(&self) -> bool[src]
Checks if the value of the field is NORMAL
pub fn is_low_power(&self) -> bool[src]
Checks if the value of the field is LOWPOWER
impl R<bool, IREN_A>[src]
pub fn variant(&self) -> IREN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, ERRIE_A>[src]
pub fn variant(&self) -> ERRIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CTL2>>[src]
pub fn wuie(&self) -> WUIE_R[src]
Bit 22 - Wakeup from Deep-sleep mode interrupt enable
pub fn wum(&self) -> WUM_R[src]
Bits 20:21 - Wakeup mode from Deep-sleep mode
pub fn scrtnum(&self) -> SCRTNUM_R[src]
Bits 17:19 - Smartcard auto-retry number
pub fn dep(&self) -> DEP_R[src]
Bit 15 - Driver enable polarity mode
pub fn dem(&self) -> DEM_R[src]
Bit 14 - Driver enable mode
pub fn ddre(&self) -> DDRE_R[src]
Bit 13 - Disable DMA on reception error
pub fn ovrd(&self) -> OVRD_R[src]
Bit 12 - Overrun Disable
pub fn osb(&self) -> OSB_R[src]
Bit 11 - One sample bit method
pub fn ctsie(&self) -> CTSIE_R[src]
Bit 10 - CTS interrupt enable
pub fn ctsen(&self) -> CTSEN_R[src]
Bit 9 - CTS enable
pub fn rtsen(&self) -> RTSEN_R[src]
Bit 8 - RTS enable
pub fn dent(&self) -> DENT_R[src]
Bit 7 - DMA enable transmitter
pub fn denr(&self) -> DENR_R[src]
Bit 6 - DMA enable for reception
pub fn scen(&self) -> SCEN_R[src]
Bit 5 - Smartcard mode enable
pub fn nken(&self) -> NKEN_R[src]
Bit 4 - NKEN enable in Smartcard mode
pub fn hden(&self) -> HDEN_R[src]
Bit 3 - Half-duplex selection
pub fn irlp(&self) -> IRLP_R[src]
Bit 2 - IrDA low-power
pub fn iren(&self) -> IREN_R[src]
Bit 1 - IrDA mode enable
pub fn errie(&self) -> ERRIE_R[src]
Bit 0 - Error interrupt enable
impl R<u32, Reg<u32, _BAUD>>[src]
pub fn intdiv(&self) -> INTDIV_R[src]
Bits 4:15 - Integer part of baud-rate divider
pub fn fradiv(&self) -> FRADIV_R[src]
Bits 0:3 - Fraction part of baud-rate divider
impl R<u32, Reg<u32, _GP>>[src]
pub fn guat(&self) -> GUAT_R[src]
Bits 8:15 - Guard time value in smartcard mode
pub fn psc(&self) -> PSC_R[src]
Bits 0:7 - Prescaler value for dividing the system clock
impl R<u32, Reg<u32, _RT>>[src]
pub fn bl(&self) -> BL_R[src]
Bits 24:31 - Block Length
pub fn rt(&self) -> RT_R[src]
Bits 0:23 - Receiver timeout value
impl R<u32, Reg<u32, _STAT>>[src]
pub fn rea(&self) -> REA_R[src]
Bit 22 - Receive enable acknowledge flag
pub fn tea(&self) -> TEA_R[src]
Bit 21 - Transmit enable acknowledge flag
pub fn wuf(&self) -> WUF_R[src]
Bit 20 - Wakeup from Deep-sleep mode flag
pub fn rwu(&self) -> RWU_R[src]
Bit 19 - Receiver wakeup from Mute mode
pub fn sbf(&self) -> SBF_R[src]
Bit 18 - Send break flag
pub fn amf(&self) -> AMF_R[src]
Bit 17 - ADDR match flag
pub fn bsy(&self) -> BSY_R[src]
Bit 16 - Busy flag
pub fn abdf(&self) -> ABDF_R[src]
Bit 15 - Auto baudrate detection flag
pub fn abde(&self) -> ABDE_R[src]
Bit 14 - Auto baudrate detection error
pub fn ebf(&self) -> EBF_R[src]
Bit 12 - End of block flag
pub fn rtf(&self) -> RTF_R[src]
Bit 11 - Receiver timeout
pub fn cts(&self) -> CTS_R[src]
Bit 10 - CTS level
pub fn ctsf(&self) -> CTSF_R[src]
Bit 9 - CTS change flag
pub fn lbdf(&self) -> LBDF_R[src]
Bit 8 - LIN break detection flag
pub fn tbe(&self) -> TBE_R[src]
Bit 7 - Transmit data register empty
pub fn tc(&self) -> TC_R[src]
Bit 6 - Transmission complete
pub fn rbne(&self) -> RBNE_R[src]
Bit 5 - Read data buffer not empty
pub fn idlef(&self) -> IDLEF_R[src]
Bit 4 - IDLE line detected flag
pub fn orerr(&self) -> ORERR_R[src]
Bit 3 - Overrun error
pub fn nerr(&self) -> NERR_R[src]
Bit 2 - Noise error flag
pub fn ferr(&self) -> FERR_R[src]
Bit 1 - Frame error flag
pub fn perr(&self) -> PERR_R[src]
Bit 0 - Parity error flag
impl R<u32, Reg<u32, _RDATA>>[src]
impl R<u32, Reg<u32, _TDATA>>[src]
impl R<u16, Reg<u16, _EP0CS>>[src]
pub fn ep_ar(&self) -> EP_AR_R[src]
Bits 0:3 - Endpoint address
pub fn tx_sta(&self) -> TX_STA_R[src]
Bits 4:5 - Status bits, for transmission transfers
pub fn tx_dtg(&self) -> TX_DTG_R[src]
Bit 6 - Transmission Data PID Toggle
pub fn tx_st(&self) -> TX_ST_R[src]
Bit 7 - Transmission Successful Transfer
pub fn ep_kctl(&self) -> EP_KCTL_R[src]
Bit 8 - Endpoint kind control
pub fn ep_ctl(&self) -> EP_CTL_R[src]
Bits 9:10 - Endpoint type control
pub fn setup(&self) -> SETUP_R[src]
Bit 11 - Setup transaction completed
pub fn rx_sta(&self) -> RX_STA_R[src]
Bits 12:13 - Reception status bits
pub fn rx_dtg(&self) -> RX_DTG_R[src]
Bit 14 - Reception Data PID Toggle
pub fn rx_st(&self) -> RX_ST_R[src]
Bit 15 - Reception Successful Transferred
impl R<u16, Reg<u16, _EP1CS>>[src]
pub fn ep_ar(&self) -> EP_AR_R[src]
Bits 0:3 - Endpoint address
pub fn tx_sta(&self) -> TX_STA_R[src]
Bits 4:5 - Status bits, for transmission transfers
pub fn tx_dtg(&self) -> TX_DTG_R[src]
Bit 6 - Transmission Data PID Toggle
pub fn tx_st(&self) -> TX_ST_R[src]
Bit 7 - Transmission Successful Transfer
pub fn ep_kctl(&self) -> EP_KCTL_R[src]
Bit 8 - Endpoint kind control
pub fn ep_ctl(&self) -> EP_CTL_R[src]
Bits 9:10 - Endpoint type control
pub fn setup(&self) -> SETUP_R[src]
Bit 11 - Setup transaction completed
pub fn rx_sta(&self) -> RX_STA_R[src]
Bits 12:13 - Reception status bits
pub fn rx_dtg(&self) -> RX_DTG_R[src]
Bit 14 - Reception Data PID Toggle
pub fn rx_st(&self) -> RX_ST_R[src]
Bit 15 - Reception Successful Transferred
impl R<u16, Reg<u16, _EP2CS>>[src]
pub fn ep_ar(&self) -> EP_AR_R[src]
Bits 0:3 - Endpoint address
pub fn tx_sta(&self) -> TX_STA_R[src]
Bits 4:5 - Status bits, for transmission transfers
pub fn tx_dtg(&self) -> TX_DTG_R[src]
Bit 6 - Transmission Data PID Toggle
pub fn tx_st(&self) -> TX_ST_R[src]
Bit 7 - Transmission Successful Transfer
pub fn ep_kctl(&self) -> EP_KCTL_R[src]
Bit 8 - Endpoint kind control
pub fn ep_ctl(&self) -> EP_CTL_R[src]
Bits 9:10 - Endpoint type control
pub fn setup(&self) -> SETUP_R[src]
Bit 11 - Setup transaction completed
pub fn rx_sta(&self) -> RX_STA_R[src]
Bits 12:13 - Reception status bits
pub fn rx_dtg(&self) -> RX_DTG_R[src]
Bit 14 - Reception Data PID Toggle
pub fn rx_st(&self) -> RX_ST_R[src]
Bit 15 - Reception Successful Transferred
impl R<u16, Reg<u16, _EP3CS>>[src]
pub fn ep_ar(&self) -> EP_AR_R[src]
Bits 0:3 - Endpoint address
pub fn tx_sta(&self) -> TX_STA_R[src]
Bits 4:5 - Status bits, for transmission transfers
pub fn tx_dtg(&self) -> TX_DTG_R[src]
Bit 6 - Transmission Data PID Toggle
pub fn tx_st(&self) -> TX_ST_R[src]
Bit 7 - Transmission Successful Transfer
pub fn ep_kctl(&self) -> EP_KCTL_R[src]
Bit 8 - Endpoint kind control
pub fn ep_ctl(&self) -> EP_CTL_R[src]
Bits 9:10 - Endpoint type control
pub fn setup(&self) -> SETUP_R[src]
Bit 11 - Setup transaction completed
pub fn rx_sta(&self) -> RX_STA_R[src]
Bits 12:13 - Reception status bits
pub fn rx_dtg(&self) -> RX_DTG_R[src]
Bit 14 - Reception Data PID Toggle
pub fn rx_st(&self) -> RX_ST_R[src]
Bit 15 - Reception Successful Transferred
impl R<u16, Reg<u16, _EP4CS>>[src]
pub fn ep_ar(&self) -> EP_AR_R[src]
Bits 0:3 - Endpoint address
pub fn tx_sta(&self) -> TX_STA_R[src]
Bits 4:5 - Status bits, for transmission transfers
pub fn tx_dtg(&self) -> TX_DTG_R[src]
Bit 6 - Transmission Data PID Toggle
pub fn tx_st(&self) -> TX_ST_R[src]
Bit 7 - Transmission Successful Transfer
pub fn ep_kctl(&self) -> EP_KCTL_R[src]
Bit 8 - Endpoint kind control
pub fn ep_ctl(&self) -> EP_CTL_R[src]
Bits 9:10 - Endpoint type control
pub fn setup(&self) -> SETUP_R[src]
Bit 11 - Setup transaction completed
pub fn rx_sta(&self) -> RX_STA_R[src]
Bits 12:13 - Reception status bits
pub fn rx_dtg(&self) -> RX_DTG_R[src]
Bit 14 - Reception Data PID Toggle
pub fn rx_st(&self) -> RX_ST_R[src]
Bit 15 - Reception Successful Transferred
impl R<u16, Reg<u16, _EP5CS>>[src]
pub fn ep_ar(&self) -> EP_AR_R[src]
Bits 0:3 - Endpoint address
pub fn tx_sta(&self) -> TX_STA_R[src]
Bits 4:5 - Status bits, for transmission transfers
pub fn tx_dtg(&self) -> TX_DTG_R[src]
Bit 6 - Transmission Data PID Toggle
pub fn tx_st(&self) -> TX_ST_R[src]
Bit 7 - Transmission Successful Transfer
pub fn ep_kctl(&self) -> EP_KCTL_R[src]
Bit 8 - Endpoint kind control
pub fn ep_ctl(&self) -> EP_CTL_R[src]
Bits 9:10 - Endpoint type control
pub fn setup(&self) -> SETUP_R[src]
Bit 11 - Setup transaction completed
pub fn rx_sta(&self) -> RX_STA_R[src]
Bits 12:13 - Reception status bits
pub fn rx_dtg(&self) -> RX_DTG_R[src]
Bit 14 - Reception Data PID Toggle
pub fn rx_st(&self) -> RX_ST_R[src]
Bit 15 - Reception Successful Transferred
impl R<u16, Reg<u16, _EP6CS>>[src]
pub fn ep_ar(&self) -> EP_AR_R[src]
Bits 0:3 - Endpoint address
pub fn tx_sta(&self) -> TX_STA_R[src]
Bits 4:5 - Status bits, for transmission transfers
pub fn tx_dtg(&self) -> TX_DTG_R[src]
Bit 6 - Transmission Data PID Toggle
pub fn tx_st(&self) -> TX_ST_R[src]
Bit 7 - Transmission Successful Transfer
pub fn ep_kctl(&self) -> EP_KCTL_R[src]
Bit 8 - Endpoint kind control
pub fn ep_ctl(&self) -> EP_CTL_R[src]
Bits 9:10 - Endpoint type control
pub fn setup(&self) -> SETUP_R[src]
Bit 11 - Setup transaction completed
pub fn rx_sta(&self) -> RX_STA_R[src]
Bits 12:13 - Reception status bits
pub fn rx_dtg(&self) -> RX_DTG_R[src]
Bit 14 - Reception Data PID Toggle
pub fn rx_st(&self) -> RX_ST_R[src]
Bit 15 - Reception Successful Transferred
impl R<u16, Reg<u16, _EP7CS>>[src]
pub fn ep_ar(&self) -> EP_AR_R[src]
Bits 0:3 - Endpoint address
pub fn tx_sta(&self) -> TX_STA_R[src]
Bits 4:5 - Status bits, for transmission transfers
pub fn tx_dtg(&self) -> TX_DTG_R[src]
Bit 6 - Transmission Data PID Toggle
pub fn tx_st(&self) -> TX_ST_R[src]
Bit 7 - Transmission Successful Transfer
pub fn ep_kctl(&self) -> EP_KCTL_R[src]
Bit 8 - Endpoint kind control
pub fn ep_ctl(&self) -> EP_CTL_R[src]
Bits 9:10 - Endpoint type control
pub fn setup(&self) -> SETUP_R[src]
Bit 11 - Setup transaction completed
pub fn rx_sta(&self) -> RX_STA_R[src]
Bits 12:13 - Reception status bits
pub fn rx_dtg(&self) -> RX_DTG_R[src]
Bit 14 - Reception Data PID Toggle
pub fn rx_st(&self) -> RX_ST_R[src]
Bit 15 - Reception Successful Transferred
impl R<u16, Reg<u16, _CTL>>[src]
pub fn setrst(&self) -> SETRST_R[src]
Bit 0 - USB Reset
pub fn close(&self) -> CLOSE_R[src]
Bit 1 - USB close
pub fn lowm(&self) -> LOWM_R[src]
Bit 2 - Low-power mode
pub fn setsps(&self) -> SETSPS_R[src]
Bit 3 - Set suspend state
pub fn rsreq(&self) -> RSREQ_R[src]
Bit 4 - Send resume request
pub fn esofie(&self) -> ESOFIE_R[src]
Bit 8 - Expected start of frame interrupt enable
pub fn sofie(&self) -> SOFIE_R[src]
Bit 9 - Start of frame interrupt enable
pub fn rstie(&self) -> RSTIE_R[src]
Bit 10 - USB reset interrupt enable
pub fn spsie(&self) -> SPSIE_R[src]
Bit 11 - Suspend state interrupt enable
pub fn wkupie(&self) -> WKUPIE_R[src]
Bit 12 - Wakeup interrupt mask
pub fn errie(&self) -> ERRIE_R[src]
Bit 13 - Error interrupt mask
pub fn pmouie(&self) -> PMOUIE_R[src]
Bit 14 - Packet memory overrun / underrun interrupt enable
pub fn stie(&self) -> STIE_R[src]
Bit 15 - Successful transfer interrupt enable
impl R<u16, Reg<u16, _INTF>>[src]
pub fn epnum(&self) -> EPNUM_R[src]
Bits 0:3 - Endpoint Number
pub fn dir(&self) -> DIR_R[src]
Bit 4 - Direction of transaction
pub fn esofif(&self) -> ESOFIF_R[src]
Bit 8 - Expected start of frame interrupt flag
pub fn sofif(&self) -> SOFIF_R[src]
Bit 9 - Start of frame interrupt flag
pub fn rstif(&self) -> RSTIF_R[src]
Bit 10 - USB reset interrupt flag
pub fn spsif(&self) -> SPSIF_R[src]
Bit 11 - Suspend state interrupt flag
pub fn wkupif(&self) -> WKUPIF_R[src]
Bit 12 - Wakeup interrupt flag
pub fn errif(&self) -> ERRIF_R[src]
Bit 13 - Error interrupt flag
pub fn pmouif(&self) -> PMOUIF_R[src]
Bit 14 - Packet memory overrun / underrun interrupt flag
pub fn stif(&self) -> STIF_R[src]
Bit 15 - Successful transfer interrupt flag
impl R<u16, Reg<u16, _STAT>>[src]
pub fn fcnt(&self) -> FCNT_R[src]
Bits 0:10 - Frame number counter
pub fn sofln(&self) -> SOFLN_R[src]
Bits 11:12 - SOF lost number
pub fn lock(&self) -> LOCK_R[src]
Bit 13 - Locked the USB
pub fn rx_dm(&self) -> RX_DM_R[src]
Bit 14 - Receive data - line status
pub fn rx_dp(&self) -> RX_DP_R[src]
Bit 15 - Receive data + line status
impl R<u16, Reg<u16, _DADDR>>[src]
pub fn usbaddr(&self) -> USBADDR_R[src]
Bits 0:6 - USB device address
pub fn usben(&self) -> USBEN_R[src]
Bit 7 - USB device enable
impl R<u16, Reg<u16, _BADDR>>[src]
impl R<u16, Reg<u16, _SEP0>>[src]
pub fn sub_st(&self) -> SUB_ST_R[src]
Bit 15 - Successful Receive for LPM Token
pub fn sub_sta(&self) -> SUB_STA_R[src]
Bits 12:13 - Status bits, for the handshake of receiving subpid LPM
pub fn subpid_attr(&self) -> SUBPID_ATTR_R[src]
Bits 0:10 - LPM Token bmAttribute Field.
impl R<u16, Reg<u16, _SEP1>>[src]
pub fn sub_st(&self) -> SUB_ST_R[src]
Bit 15 - Successful Receive for LPM Token
pub fn sub_sta(&self) -> SUB_STA_R[src]
Bits 12:13 - Status bits, for the handshake of receiving subpid LPM
pub fn subpid_attr(&self) -> SUBPID_ATTR_R[src]
Bits 0:10 - LPM Token bmAttribute Field.
impl R<u16, Reg<u16, _SEP2>>[src]
pub fn sub_st(&self) -> SUB_ST_R[src]
Bit 15 - Successful Receive for LPM Token
pub fn sub_sta(&self) -> SUB_STA_R[src]
Bits 12:13 - Status bits, for the handshake of receiving subpid LPM
pub fn subpid_attr(&self) -> SUBPID_ATTR_R[src]
Bits 0:10 - LPM Token bmAttribute Field.
impl R<u16, Reg<u16, _SEP3>>[src]
pub fn sub_st(&self) -> SUB_ST_R[src]
Bit 15 - Successful Receive for LPM Token
pub fn sub_sta(&self) -> SUB_STA_R[src]
Bits 12:13 - Status bits, for the handshake of receiving subpid LPM
pub fn subpid_attr(&self) -> SUBPID_ATTR_R[src]
Bits 0:10 - LPM Token bmAttribute Field.
impl R<u16, Reg<u16, _SEP4>>[src]
pub fn sub_st(&self) -> SUB_ST_R[src]
Bit 15 - Successful Receive for LPM Token
pub fn sub_sta(&self) -> SUB_STA_R[src]
Bits 12:13 - Status bits, for the handshake of receiving subpid LPM
pub fn subpid_attr(&self) -> SUBPID_ATTR_R[src]
Bits 0:10 - LPM Token bmAttribute Field.
impl R<u16, Reg<u16, _SEP5>>[src]
pub fn sub_st(&self) -> SUB_ST_R[src]
Bit 15 - Successful Receive for LPM Token
pub fn sub_sta(&self) -> SUB_STA_R[src]
Bits 12:13 - Status bits, for the handshake of receiving subpid LPM
pub fn subpid_attr(&self) -> SUBPID_ATTR_R[src]
Bits 0:10 - LPM Token bmAttribute Field.
impl R<u16, Reg<u16, _SEP6>>[src]
pub fn sub_st(&self) -> SUB_ST_R[src]
Bit 15 - Successful Receive for LPM Token
pub fn sub_sta(&self) -> SUB_STA_R[src]
Bits 12:13 - Status bits, for the handshake of receiving subpid LPM
pub fn subpid_attr(&self) -> SUBPID_ATTR_R[src]
Bits 0:10 - LPM Token bmAttribute Field.
impl R<u16, Reg<u16, _SEP7>>[src]
pub fn sub_st(&self) -> SUB_ST_R[src]
Bit 15 - Successful Receive for LPM Token
pub fn sub_sta(&self) -> SUB_STA_R[src]
Bits 12:13 - Status bits, for the handshake of receiving subpid LPM
pub fn subpid_attr(&self) -> SUBPID_ATTR_R[src]
Bits 0:10 - LPM Token bmAttribute Field.
impl R<u16, Reg<u16, _LPMCTL>>[src]
impl R<u16, Reg<u16, _LPMINTF>>[src]
impl R<bool, WDGTEN_A>[src]
pub fn variant(&self) -> WDGTEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CTL>>[src]
pub fn wdgten(&self) -> WDGTEN_R[src]
Bit 7 - Start the Window watchdog timer
pub fn cnt(&self) -> CNT_R[src]
Bits 0:6 - watchdog timer counter
impl R<bool, EWIE_A>[src]
pub fn variant(&self) -> Variant<bool, EWIE_A>[src]
Get enumerated values variant
pub fn is_enable(&self) -> bool[src]
Checks if the value of the field is ENABLE
impl R<u8, PSC_A>[src]
pub fn variant(&self) -> PSC_A[src]
Get enumerated values variant
pub fn is_div1(&self) -> bool[src]
Checks if the value of the field is DIV1
pub fn is_div2(&self) -> bool[src]
Checks if the value of the field is DIV2
pub fn is_div4(&self) -> bool[src]
Checks if the value of the field is DIV4
pub fn is_div8(&self) -> bool[src]
Checks if the value of the field is DIV8
impl R<u32, Reg<u32, _CFG>>[src]
pub fn ewie(&self) -> EWIE_R[src]
Bit 9 - Early wakeup interrupt enable
pub fn psc(&self) -> PSC_R[src]
Bits 7:8 - Prescaler
pub fn win(&self) -> WIN_R[src]
Bits 0:6 - The Window value
impl R<bool, EWIF_A>[src]
pub fn variant(&self) -> EWIF_A[src]
Get enumerated values variant
pub fn is_pending(&self) -> bool[src]
Checks if the value of the field is PENDING
pub fn is_finished(&self) -> bool[src]
Checks if the value of the field is FINISHED
impl R<u32, Reg<u32, _STAT>>[src]
impl R<bool, STRC_A>[src]
pub fn variant(&self) -> STRC_A[src]
Get enumerated values variant
pub fn is_not_started(&self) -> bool[src]
Checks if the value of the field is NOTSTARTED
pub fn is_started(&self) -> bool[src]
Checks if the value of the field is STARTED
impl R<bool, STIC_A>[src]
pub fn variant(&self) -> STIC_A[src]
Get enumerated values variant
pub fn is_not_started(&self) -> bool[src]
Checks if the value of the field is NOTSTARTED
pub fn is_started(&self) -> bool[src]
Checks if the value of the field is STARTED
impl R<bool, EOIC_A>[src]
pub fn variant(&self) -> EOIC_A[src]
Get enumerated values variant
pub fn is_not_complete(&self) -> bool[src]
Checks if the value of the field is NOTCOMPLETE
pub fn is_complete(&self) -> bool[src]
Checks if the value of the field is COMPLETE
impl R<bool, EOC_A>[src]
pub fn variant(&self) -> EOC_A[src]
Get enumerated values variant
pub fn is_not_complete(&self) -> bool[src]
Checks if the value of the field is NOTCOMPLETE
pub fn is_complete(&self) -> bool[src]
Checks if the value of the field is COMPLETE
impl R<bool, WDE_A>[src]
pub fn variant(&self) -> WDE_A[src]
Get enumerated values variant
pub fn is_no_event(&self) -> bool[src]
Checks if the value of the field is NOEVENT
pub fn is_event(&self) -> bool[src]
Checks if the value of the field is EVENT
impl R<u32, Reg<u32, _STAT>>[src]
pub fn strc(&self) -> STRC_R[src]
Bit 4 - Start flag of regular channel group
pub fn stic(&self) -> STIC_R[src]
Bit 3 - Start flag of inserted channel group
pub fn eoic(&self) -> EOIC_R[src]
Bit 2 - End of inserted group conversion flag
pub fn eoc(&self) -> EOC_R[src]
Bit 1 - End of group conversion flag
pub fn wde(&self) -> WDE_R[src]
Bit 0 - Analog watchdog event flag
impl R<u8, DRES_A>[src]
pub fn variant(&self) -> DRES_A[src]
Get enumerated values variant
pub fn is_bits12(&self) -> bool[src]
Checks if the value of the field is BITS12
pub fn is_bits10(&self) -> bool[src]
Checks if the value of the field is BITS10
pub fn is_bits8(&self) -> bool[src]
Checks if the value of the field is BITS8
pub fn is_bits6(&self) -> bool[src]
Checks if the value of the field is BITS6
impl R<bool, RWDEN_A>[src]
pub fn variant(&self) -> RWDEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, IWDEN_A>[src]
pub fn variant(&self) -> IWDEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, DISIC_A>[src]
pub fn variant(&self) -> DISIC_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, DISRC_A>[src]
pub fn variant(&self) -> DISRC_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, ICA_A>[src]
pub fn variant(&self) -> ICA_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, WDSC_A>[src]
pub fn variant(&self) -> WDSC_A[src]
Get enumerated values variant
pub fn is_all(&self) -> bool[src]
Checks if the value of the field is ALL
pub fn is_single(&self) -> bool[src]
Checks if the value of the field is SINGLE
impl R<bool, SM_A>[src]
pub fn variant(&self) -> SM_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, EOICIE_A>[src]
pub fn variant(&self) -> EOICIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, WDEIE_A>[src]
pub fn variant(&self) -> WDEIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, EOCIE_A>[src]
pub fn variant(&self) -> EOCIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CTL0>>[src]
pub fn dres(&self) -> DRES_R[src]
Bits 24:25 - ADC resolution
pub fn rwden(&self) -> RWDEN_R[src]
Bit 23 - Regular channel analog watchdog enable
pub fn iwden(&self) -> IWDEN_R[src]
Bit 22 - Inserted channel analog watchdog enable
pub fn disnum(&self) -> DISNUM_R[src]
Bits 13:15 - Number of conversions in discontinuous mode
pub fn disic(&self) -> DISIC_R[src]
Bit 12 - Discontinuous mode on injected channels
pub fn disrc(&self) -> DISRC_R[src]
Bit 11 - Discontinuous mode on regular channels
pub fn ica(&self) -> ICA_R[src]
Bit 10 - Inserted channel group convert automatically
pub fn wdsc(&self) -> WDSC_R[src]
Bit 9 - When in scan mode, analog watchdog is effective on a single channel
pub fn sm(&self) -> SM_R[src]
Bit 8 - Scan mode
pub fn eoicie(&self) -> EOICIE_R[src]
Bit 7 - Interrupt enable for EOIC
pub fn wdeie(&self) -> WDEIE_R[src]
Bit 6 - Interrupt enable for WDE
pub fn eocie(&self) -> EOCIE_R[src]
Bit 5 - Interrupt enable for EOC
pub fn wdchsel(&self) -> WDCHSEL_R[src]
Bits 0:4 - Analog watchdog channel select
impl R<bool, VBATEN_A>[src]
pub fn variant(&self) -> VBATEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, TSVREN_A>[src]
pub fn variant(&self) -> TSVREN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, SWRCST_A>[src]
pub fn variant(&self) -> SWRCST_A[src]
Get enumerated values variant
pub fn is_started(&self) -> bool[src]
Checks if the value of the field is STARTED
pub fn is_not_started(&self) -> bool[src]
Checks if the value of the field is NOTSTARTED
impl R<bool, SWICST_A>[src]
pub fn variant(&self) -> SWICST_A[src]
Get enumerated values variant
pub fn is_started(&self) -> bool[src]
Checks if the value of the field is STARTED
pub fn is_not_started(&self) -> bool[src]
Checks if the value of the field is NOTSTARTED
impl R<bool, ETERC_A>[src]
pub fn variant(&self) -> ETERC_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u8, ETSRC_A>[src]
pub fn variant(&self) -> ETSRC_A[src]
Get enumerated values variant
pub fn is_timer0ch0(&self) -> bool[src]
Checks if the value of the field is TIMER0CH0
pub fn is_timer0ch1(&self) -> bool[src]
Checks if the value of the field is TIMER0CH1
pub fn is_timer0ch2(&self) -> bool[src]
Checks if the value of the field is TIMER0CH2
pub fn is_timer1ch1(&self) -> bool[src]
Checks if the value of the field is TIMER1CH1
pub fn is_timer2trgo(&self) -> bool[src]
Checks if the value of the field is TIMER2TRGO
pub fn is_timer14ch0(&self) -> bool[src]
Checks if the value of the field is TIMER14CH0
pub fn is_exti11(&self) -> bool[src]
Checks if the value of the field is EXTI11
pub fn is_swrcst(&self) -> bool[src]
Checks if the value of the field is SWRCST
impl R<bool, ETEIC_A>[src]
pub fn variant(&self) -> ETEIC_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u8, ETSIC_A>[src]
pub fn variant(&self) -> ETSIC_A[src]
Get enumerated values variant
pub fn is_timer0trgo(&self) -> bool[src]
Checks if the value of the field is TIMER0TRGO
pub fn is_timer0ch3(&self) -> bool[src]
Checks if the value of the field is TIMER0CH3
pub fn is_timer1trgo(&self) -> bool[src]
Checks if the value of the field is TIMER1TRGO
pub fn is_timer1ch0(&self) -> bool[src]
Checks if the value of the field is TIMER1CH0
pub fn is_timer2ch2(&self) -> bool[src]
Checks if the value of the field is TIMER2CH2
pub fn is_timer14trgo(&self) -> bool[src]
Checks if the value of the field is TIMER14TRGO
pub fn is_exti15(&self) -> bool[src]
Checks if the value of the field is EXTI15
pub fn is_swicst(&self) -> bool[src]
Checks if the value of the field is SWICST
impl R<bool, DAL_A>[src]
pub fn variant(&self) -> DAL_A[src]
Get enumerated values variant
pub fn is_right(&self) -> bool[src]
Checks if the value of the field is RIGHT
pub fn is_left(&self) -> bool[src]
Checks if the value of the field is LEFT
impl R<bool, DMA_A>[src]
pub fn variant(&self) -> DMA_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, RSTCLB_A>[src]
pub fn variant(&self) -> RSTCLB_A[src]
Get enumerated values variant
pub fn is_complete(&self) -> bool[src]
Checks if the value of the field is COMPLETE
pub fn is_not_complete(&self) -> bool[src]
Checks if the value of the field is NOTCOMPLETE
impl R<bool, CLB_A>[src]
pub fn variant(&self) -> CLB_A[src]
Get enumerated values variant
pub fn is_complete(&self) -> bool[src]
Checks if the value of the field is COMPLETE
pub fn is_not_complete(&self) -> bool[src]
Checks if the value of the field is NOTCOMPLETE
impl R<bool, CTN_A>[src]
pub fn variant(&self) -> CTN_A[src]
Get enumerated values variant
pub fn is_single(&self) -> bool[src]
Checks if the value of the field is SINGLE
pub fn is_continuous(&self) -> bool[src]
Checks if the value of the field is CONTINUOUS
impl R<bool, ADCON_A>[src]
pub fn variant(&self) -> ADCON_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CTL1>>[src]
pub fn vbaten(&self) -> VBATEN_R[src]
Bit 24 - enable/disable the VBAT channel
pub fn tsvren(&self) -> TSVREN_R[src]
Bit 23 - Channel 16 and 17 enable of ADC
pub fn swrcst(&self) -> SWRCST_R[src]
Bit 22 - Start on regular channel
pub fn swicst(&self) -> SWICST_R[src]
Bit 21 - Start on inserted channel
pub fn eterc(&self) -> ETERC_R[src]
Bit 20 - External trigger enable for regular channel
pub fn etsrc(&self) -> ETSRC_R[src]
Bits 17:19 - External trigger select for regular channel
pub fn eteic(&self) -> ETEIC_R[src]
Bit 15 - External trigger enable for inserted channel
pub fn etsic(&self) -> ETSIC_R[src]
Bits 12:14 - External trigger select for inserted channel
pub fn dal(&self) -> DAL_R[src]
Bit 11 - Data alignment
pub fn dma(&self) -> DMA_R[src]
Bit 8 - DMA request enable
pub fn rstclb(&self) -> RSTCLB_R[src]
Bit 3 - Reset calibration
pub fn clb(&self) -> CLB_R[src]
Bit 2 - ADC calibration
pub fn ctn(&self) -> CTN_R[src]
Bit 1 - Continuous mode
pub fn adcon(&self) -> ADCON_R[src]
Bit 0 - ADC ON
impl R<u8, SPT10_A>[src]
pub fn variant(&self) -> SPT10_A[src]
Get enumerated values variant
pub fn is_cycles1_5(&self) -> bool[src]
Checks if the value of the field is CYCLES1_5
pub fn is_cycles7_5(&self) -> bool[src]
Checks if the value of the field is CYCLES7_5
pub fn is_cycles13_5(&self) -> bool[src]
Checks if the value of the field is CYCLES13_5
pub fn is_cycles28_5(&self) -> bool[src]
Checks if the value of the field is CYCLES28_5
pub fn is_cycles41_5(&self) -> bool[src]
Checks if the value of the field is CYCLES41_5
pub fn is_cycles55_5(&self) -> bool[src]
Checks if the value of the field is CYCLES55_5
pub fn is_cycles71_5(&self) -> bool[src]
Checks if the value of the field is CYCLES71_5
pub fn is_cycles239_5(&self) -> bool[src]
Checks if the value of the field is CYCLES239_5
impl R<u32, Reg<u32, _SAMPT0>>[src]
pub fn spt10(&self) -> SPT10_R[src]
Bits 0:2 - Channel 10 sample time selection
pub fn spt11(&self) -> SPT11_R[src]
Bits 3:5 - Channel 11 sample time selection
pub fn spt12(&self) -> SPT12_R[src]
Bits 6:8 - Channel 12 sample time selection
pub fn spt13(&self) -> SPT13_R[src]
Bits 9:11 - Channel 13 sample time selection
pub fn spt14(&self) -> SPT14_R[src]
Bits 12:14 - Channel 14 sample time selection
pub fn spt15(&self) -> SPT15_R[src]
Bits 15:17 - Channel 15 sample time selection
pub fn spt16(&self) -> SPT16_R[src]
Bits 18:20 - Channel 16 sample time selection
pub fn spt17(&self) -> SPT17_R[src]
Bits 21:23 - Channel 17 sample time selection
pub fn spt18(&self) -> SPT18_R[src]
Bits 24:26 - Channel 18 sample time selection
impl R<u8, SPT0_A>[src]
pub fn variant(&self) -> SPT0_A[src]
Get enumerated values variant
pub fn is_cycles1_5(&self) -> bool[src]
Checks if the value of the field is CYCLES1_5
pub fn is_cycles7_5(&self) -> bool[src]
Checks if the value of the field is CYCLES7_5
pub fn is_cycles13_5(&self) -> bool[src]
Checks if the value of the field is CYCLES13_5
pub fn is_cycles28_5(&self) -> bool[src]
Checks if the value of the field is CYCLES28_5
pub fn is_cycles41_5(&self) -> bool[src]
Checks if the value of the field is CYCLES41_5
pub fn is_cycles55_5(&self) -> bool[src]
Checks if the value of the field is CYCLES55_5
pub fn is_cycles71_5(&self) -> bool[src]
Checks if the value of the field is CYCLES71_5
pub fn is_cycles239_5(&self) -> bool[src]
Checks if the value of the field is CYCLES239_5
impl R<u32, Reg<u32, _SAMPT1>>[src]
pub fn spt0(&self) -> SPT0_R[src]
Bits 0:2 - Channel 0 sample time selection
pub fn spt1(&self) -> SPT1_R[src]
Bits 3:5 - Channel 1 sample time selection
pub fn spt2(&self) -> SPT2_R[src]
Bits 6:8 - Channel 2 sample time selection
pub fn spt3(&self) -> SPT3_R[src]
Bits 9:11 - Channel 3 sample time selection
pub fn spt4(&self) -> SPT4_R[src]
Bits 12:14 - Channel 4 sample time selection
pub fn spt5(&self) -> SPT5_R[src]
Bits 15:17 - Channel 5 sample time selection
pub fn spt6(&self) -> SPT6_R[src]
Bits 18:20 - Channel 6 sample time selection
pub fn spt7(&self) -> SPT7_R[src]
Bits 21:23 - Channel 7 sample time selection
pub fn spt8(&self) -> SPT8_R[src]
Bits 24:26 - Channel 8 sample time selection
pub fn spt9(&self) -> SPT9_R[src]
Bits 27:29 - Channel 9 sample time selection
impl R<u32, Reg<u32, _IOFF0>>[src]
impl R<u32, Reg<u32, _IOFF1>>[src]
impl R<u32, Reg<u32, _IOFF2>>[src]
impl R<u32, Reg<u32, _IOFF3>>[src]
impl R<u32, Reg<u32, _WDHT>>[src]
impl R<u32, Reg<u32, _WDLT>>[src]
impl R<u32, Reg<u32, _RSQ0>>[src]
pub fn rl(&self) -> RL_R[src]
Bits 20:23 - Regular channel group length
pub fn rsq16(&self) -> RSQ16_R[src]
Bits 15:19 - 16th conversion in regular sequence
pub fn rsq15(&self) -> RSQ15_R[src]
Bits 10:14 - 15th conversion in regular sequence
pub fn rsq14(&self) -> RSQ14_R[src]
Bits 5:9 - 14th conversion in regular sequence
pub fn rsq13(&self) -> RSQ13_R[src]
Bits 0:4 - 13th conversion in regular sequence
impl R<u32, Reg<u32, _RSQ1>>[src]
pub fn rsq12(&self) -> RSQ12_R[src]
Bits 25:29 - 12th conversion in regular sequence
pub fn rsq11(&self) -> RSQ11_R[src]
Bits 20:24 - 11th conversion in regular sequence
pub fn rsq10(&self) -> RSQ10_R[src]
Bits 15:19 - 10th conversion in regular sequence
pub fn rsq9(&self) -> RSQ9_R[src]
Bits 10:14 - 9th conversion in regular sequence
pub fn rsq8(&self) -> RSQ8_R[src]
Bits 5:9 - 8th conversion in regular sequence
pub fn rsq7(&self) -> RSQ7_R[src]
Bits 0:4 - 7th conversion in regular sequence
impl R<u32, Reg<u32, _RSQ2>>[src]
pub fn rsq6(&self) -> RSQ6_R[src]
Bits 25:29 - 6th conversion in regular sequence
pub fn rsq5(&self) -> RSQ5_R[src]
Bits 20:24 - 5th conversion in regular sequence
pub fn rsq4(&self) -> RSQ4_R[src]
Bits 15:19 - 4th conversion in regular sequence
pub fn rsq3(&self) -> RSQ3_R[src]
Bits 10:14 - 3rd conversion in regular sequence
pub fn rsq2(&self) -> RSQ2_R[src]
Bits 5:9 - 2nd conversion in regular sequence
pub fn rsq1(&self) -> RSQ1_R[src]
Bits 0:4 - 1st conversion in regular sequence
impl R<u32, Reg<u32, _ISQ>>[src]
pub fn il(&self) -> IL_R[src]
Bits 20:21 - Inserted channel group length
pub fn isq4(&self) -> ISQ4_R[src]
Bits 15:19 - 4th conversion in injected sequence
pub fn isq3(&self) -> ISQ3_R[src]
Bits 10:14 - 3rd conversion in injected sequence
pub fn isq2(&self) -> ISQ2_R[src]
Bits 5:9 - 2nd conversion in injected sequence
pub fn isq1(&self) -> ISQ1_R[src]
Bits 0:4 - 1st conversion in injected sequence
impl R<u32, Reg<u32, _IDATA0>>[src]
impl R<u32, Reg<u32, _IDATA1>>[src]
impl R<u32, Reg<u32, _IDATA2>>[src]
impl R<u32, Reg<u32, _IDATA3>>[src]
impl R<u32, Reg<u32, _RDATA>>[src]
impl R<bool, TOVS_A>[src]
pub fn variant(&self) -> TOVS_A[src]
Get enumerated values variant
pub fn is_consecutive(&self) -> bool[src]
Checks if the value of the field is CONSECUTIVE
pub fn is_individual(&self) -> bool[src]
Checks if the value of the field is INDIVIDUAL
impl R<u8, OVSR_A>[src]
pub fn variant(&self) -> OVSR_A[src]
Get enumerated values variant
pub fn is_times2(&self) -> bool[src]
Checks if the value of the field is TIMES2
pub fn is_times4(&self) -> bool[src]
Checks if the value of the field is TIMES4
pub fn is_times8(&self) -> bool[src]
Checks if the value of the field is TIMES8
pub fn is_times16(&self) -> bool[src]
Checks if the value of the field is TIMES16
pub fn is_times32(&self) -> bool[src]
Checks if the value of the field is TIMES32
pub fn is_times64(&self) -> bool[src]
Checks if the value of the field is TIMES64
pub fn is_times128(&self) -> bool[src]
Checks if the value of the field is TIMES128
pub fn is_times256(&self) -> bool[src]
Checks if the value of the field is TIMES256
impl R<bool, OVSEN_A>[src]
pub fn variant(&self) -> OVSEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _OVSAMPCTL>>[src]
pub fn tovs(&self) -> TOVS_R[src]
Bit 9 - Triggered Oversampling
pub fn ovss(&self) -> OVSS_R[src]
Bits 5:8 - Oversampling shift
pub fn ovsr(&self) -> OVSR_R[src]
Bits 2:4 - Oversampling ratio
pub fn ovsen(&self) -> OVSEN_R[src]
Bit 0 - Oversampler Enable
impl R<u32, Reg<u32, _CTL>>[src]
pub fn dfz(&self) -> DFZ_R[src]
Bit 16 - Debug freeze
pub fn swrst(&self) -> SWRST_R[src]
Bit 15 - Software reset
pub fn ttc(&self) -> TTC_R[src]
Bit 7 - Time-triggered communication
pub fn abor(&self) -> ABOR_R[src]
Bit 6 - Automatic bus-off recovery
pub fn awu(&self) -> AWU_R[src]
Bit 5 - Automatic wakeup
pub fn ard(&self) -> ARD_R[src]
Bit 4 - Automatic retransmission disable
pub fn rfod(&self) -> RFOD_R[src]
Bit 3 - Receive FIFO overwrite disable
pub fn tfo(&self) -> TFO_R[src]
Bit 2 - Transmit FIFO order
pub fn slpwmod(&self) -> SLPWMOD_R[src]
Bit 1 - Sleep working mode
pub fn iwmod(&self) -> IWMOD_R[src]
Bit 0 - Initial working mode
impl R<u32, Reg<u32, _STAT>>[src]
pub fn rxl(&self) -> RXL_R[src]
Bit 11 - RX level
pub fn lastrx(&self) -> LASTRX_R[src]
Bit 10 - Last sample value of Rx pin
pub fn rs(&self) -> RS_R[src]
Bit 9 - Receiving state
pub fn ts(&self) -> TS_R[src]
Bit 8 - Transmitting state
pub fn slpif(&self) -> SLPIF_R[src]
Bit 4 - Status change interrupt flag of sleep working mode entering
pub fn wuif(&self) -> WUIF_R[src]
Bit 3 - Status change interrupt flag of wakeup from sleep working mode
pub fn errif(&self) -> ERRIF_R[src]
Bit 2 - Error interrupt flag
pub fn slpws(&self) -> SLPWS_R[src]
Bit 1 - Sleep working state
pub fn iws(&self) -> IWS_R[src]
Bit 0 - Initial working state
impl R<u32, Reg<u32, _TSTAT>>[src]
pub fn tmls2(&self) -> TMLS2_R[src]
Bit 31 - Transmit mailbox 2 last sending in transmit FIFO
pub fn tmls1(&self) -> TMLS1_R[src]
Bit 30 - Transmit mailbox 1 last sending in transmit FIFO
pub fn tmls0(&self) -> TMLS0_R[src]
Bit 29 - Transmit mailbox 0 last sending in transmit FIFO
pub fn tme2(&self) -> TME2_R[src]
Bit 28 - Transmit mailbox 2 empty
pub fn tme1(&self) -> TME1_R[src]
Bit 27 - Transmit mailbox 1 empty
pub fn tme0(&self) -> TME0_R[src]
Bit 26 - Transmit mailbox 0 empty
pub fn num(&self) -> NUM_R[src]
Bits 24:25 - number of the transmit FIFO mailbox in which the frame will be transmitted if at least one mailbox is empty
pub fn mst2(&self) -> MST2_R[src]
Bit 23 - Mailbox 2 stop transmitting
pub fn mte2(&self) -> MTE2_R[src]
Bit 19 - Mailbox 2 transmit error
pub fn mal2(&self) -> MAL2_R[src]
Bit 18 - Mailbox 2 arbitration lost
pub fn mtfnerr2(&self) -> MTFNERR2_R[src]
Bit 17 - Mailbox 2 transmit finished and no error
pub fn mtf2(&self) -> MTF2_R[src]
Bit 16 - Mailbox 2 transmit finished
pub fn mst1(&self) -> MST1_R[src]
Bit 15 - Mailbox 1 stop transmitting
pub fn mte1(&self) -> MTE1_R[src]
Bit 11 - Mailbox 1 transmit error
pub fn mal1(&self) -> MAL1_R[src]
Bit 10 - Mailbox 1 arbitration lost
pub fn mtfnerr1(&self) -> MTFNERR1_R[src]
Bit 9 - Mailbox 1 transmit finished and no error
pub fn mtf1(&self) -> MTF1_R[src]
Bit 8 - Mailbox 1 transmit finished
pub fn mst0(&self) -> MST0_R[src]
Bit 7 - Mailbox 0 stop transmitting
pub fn mte0(&self) -> MTE0_R[src]
Bit 3 - Mailbox 0 transmit error
pub fn mal0(&self) -> MAL0_R[src]
Bit 2 - Mailbox 0 arbitration lost
pub fn mtfnerr0(&self) -> MTFNERR0_R[src]
Bit 1 - Mailbox 0 transmit finished and no error
pub fn mtf0(&self) -> MTF0_R[src]
Bit 0 - Mailbox 0 transmit finished
impl R<u32, Reg<u32, _RFIFO0>>[src]
pub fn rfd0(&self) -> RFD0_R[src]
Bit 5 - Receive FIFO 0 dequeue
pub fn rfo0(&self) -> RFO0_R[src]
Bit 4 - Receive FIFO 0 overfull
pub fn rff0(&self) -> RFF0_R[src]
Bit 3 - Receive FIFO 0 full
pub fn rfl0(&self) -> RFL0_R[src]
Bits 0:1 - Receive FIFO 0 length
impl R<u32, Reg<u32, _RFIFO1>>[src]
pub fn rfd1(&self) -> RFD1_R[src]
Bit 5 - Receive FIFO1 dequeue
pub fn rfo1(&self) -> RFO1_R[src]
Bit 4 - Receive FIFO1 overfull
pub fn rff1(&self) -> RFF1_R[src]
Bit 3 - Receive FIFO1 full
pub fn rfl1(&self) -> RFL1_R[src]
Bits 0:1 - Receive FIFO1 length
impl R<u32, Reg<u32, _INTEN>>[src]
pub fn slpwie(&self) -> SLPWIE_R[src]
Bit 17 - Sleep working interrupt enable
pub fn wie(&self) -> WIE_R[src]
Bit 16 - Wakeup interrupt enable
pub fn errie(&self) -> ERRIE_R[src]
Bit 15 - Error interrupt enable
pub fn errnie(&self) -> ERRNIE_R[src]
Bit 11 - Error number interrupt enable
pub fn boie(&self) -> BOIE_R[src]
Bit 10 - Bus-off interrupt enable
pub fn perrie(&self) -> PERRIE_R[src]
Bit 9 - Passive error interrupt enable
pub fn werrie(&self) -> WERRIE_R[src]
Bit 8 - Warning error interrupt enable
pub fn rfoie1(&self) -> RFOIE1_R[src]
Bit 6 - Receive FIFO1 overfull interrupt enable
pub fn rffie1(&self) -> RFFIE1_R[src]
Bit 5 - Receive FIFO1 full interrupt enable
pub fn rfneie1(&self) -> RFNEIE1_R[src]
Bit 4 - Receive FIFO1 not empty interrupt enable
pub fn rfoie0(&self) -> RFOIE0_R[src]
Bit 3 - Receive FIFO0 overfull interrupt enable
pub fn rffie0(&self) -> RFFIE0_R[src]
Bit 2 - Receive FIFO0 full interrupt enable
pub fn rfneie0(&self) -> RFNEIE0_R[src]
Bit 1 - Receive FIFO0 not empty interrupt enable
pub fn tmeie(&self) -> TMEIE_R[src]
Bit 0 - Transmit mailbox empty interrupt enable
impl R<u32, Reg<u32, _ERR>>[src]
pub fn recnt(&self) -> RECNT_R[src]
Bits 24:31 - Receive Error Count
pub fn tecnt(&self) -> TECNT_R[src]
Bits 16:23 - Transmit Error Count
pub fn errn(&self) -> ERRN_R[src]
Bits 4:6 - Error number
pub fn boerr(&self) -> BOERR_R[src]
Bit 2 - Bus-off error
pub fn perr(&self) -> PERR_R[src]
Bit 1 - Passive error
pub fn werr(&self) -> WERR_R[src]
Bit 0 - Warning error
impl R<u32, Reg<u32, _BT>>[src]
pub fn scmod(&self) -> SCMOD_R[src]
Bit 31 - Silent communication mode
pub fn lcmod(&self) -> LCMOD_R[src]
Bit 30 - Loopback communication mode
pub fn sjw(&self) -> SJW_R[src]
Bits 24:25 - Resynchronization jump width
pub fn bs2(&self) -> BS2_R[src]
Bits 20:22 - Bit segment 2
pub fn bs1(&self) -> BS1_R[src]
Bits 16:19 - Bit segment 1
pub fn buadpsc(&self) -> BUADPSC_R[src]
Bits 0:9 - Baud rate prescaler
impl R<u32, Reg<u32, _TMI0>>[src]
pub fn sfid_efid(&self) -> SFID_EFID_R[src]
Bits 21:31 - The frame identifier
pub fn efid(&self) -> EFID_R[src]
Bits 3:20 - The frame identifier
pub fn ff(&self) -> FF_R[src]
Bit 2 - Frame format
pub fn ft(&self) -> FT_R[src]
Bit 1 - Frame type
pub fn ten(&self) -> TEN_R[src]
Bit 0 - Transmit enable
impl R<u32, Reg<u32, _TMP0>>[src]
pub fn ts(&self) -> TS_R[src]
Bits 16:31 - Time stamp
pub fn tsen(&self) -> TSEN_R[src]
Bit 8 - Time stamp enable
pub fn dlenc(&self) -> DLENC_R[src]
Bits 0:3 - Data length code
impl R<u32, Reg<u32, _TMDATA00>>[src]
pub fn db3(&self) -> DB3_R[src]
Bits 24:31 - Data byte 3
pub fn db2(&self) -> DB2_R[src]
Bits 16:23 - Data byte 2
pub fn db1(&self) -> DB1_R[src]
Bits 8:15 - Data byte 1
pub fn db0(&self) -> DB0_R[src]
Bits 0:7 - Data byte 0
impl R<u32, Reg<u32, _TMDATA10>>[src]
pub fn db7(&self) -> DB7_R[src]
Bits 24:31 - Data byte 7
pub fn db6(&self) -> DB6_R[src]
Bits 16:23 - Data byte 6
pub fn db5(&self) -> DB5_R[src]
Bits 8:15 - Data byte 5
pub fn db4(&self) -> DB4_R[src]
Bits 0:7 - Data byte 4
impl R<u32, Reg<u32, _TMI1>>[src]
pub fn sfid_efid(&self) -> SFID_EFID_R[src]
Bits 21:31 - The frame identifier
pub fn efid(&self) -> EFID_R[src]
Bits 3:20 - The frame identifier
pub fn ff(&self) -> FF_R[src]
Bit 2 - Frame format
pub fn ft(&self) -> FT_R[src]
Bit 1 - Frame type
pub fn ten(&self) -> TEN_R[src]
Bit 0 - Transmit enable
impl R<u32, Reg<u32, _TMP1>>[src]
pub fn ts(&self) -> TS_R[src]
Bits 16:31 - Time stamp
pub fn tsen(&self) -> TSEN_R[src]
Bit 8 - Time stamp enable
pub fn dlenc(&self) -> DLENC_R[src]
Bits 0:3 - Data length code
impl R<u32, Reg<u32, _TMDATA01>>[src]
pub fn db3(&self) -> DB3_R[src]
Bits 24:31 - Data byte 3
pub fn db2(&self) -> DB2_R[src]
Bits 16:23 - Data byte 2
pub fn db1(&self) -> DB1_R[src]
Bits 8:15 - Data byte 1
pub fn db0(&self) -> DB0_R[src]
Bits 0:7 - Data byte 0
impl R<u32, Reg<u32, _TMDATA11>>[src]
pub fn db7(&self) -> DB7_R[src]
Bits 24:31 - Data byte 7
pub fn db6(&self) -> DB6_R[src]
Bits 16:23 - Data byte 6
pub fn db5(&self) -> DB5_R[src]
Bits 8:15 - Data byte 5
pub fn db4(&self) -> DB4_R[src]
Bits 0:7 - Data byte 4
impl R<u32, Reg<u32, _TMI2>>[src]
pub fn sfid_efid(&self) -> SFID_EFID_R[src]
Bits 21:31 - The frame identifier
pub fn efid(&self) -> EFID_R[src]
Bits 3:20 - The frame identifier
pub fn ff(&self) -> FF_R[src]
Bit 2 - Frame format
pub fn ft(&self) -> FT_R[src]
Bit 1 - Frame type
pub fn ten(&self) -> TEN_R[src]
Bit 0 - Transmit enable
impl R<u32, Reg<u32, _TMP2>>[src]
pub fn ts(&self) -> TS_R[src]
Bits 16:31 - Time stamp
pub fn tsen(&self) -> TSEN_R[src]
Bit 8 - Time stamp enable
pub fn dlenc(&self) -> DLENC_R[src]
Bits 0:3 - Data length code
impl R<u32, Reg<u32, _TMDATA02>>[src]
pub fn db3(&self) -> DB3_R[src]
Bits 24:31 - Data byte 3
pub fn db2(&self) -> DB2_R[src]
Bits 16:23 - Data byte 2
pub fn db1(&self) -> DB1_R[src]
Bits 8:15 - Data byte 1
pub fn db0(&self) -> DB0_R[src]
Bits 0:7 - Data byte 0
impl R<u32, Reg<u32, _TMDATA12>>[src]
pub fn db7(&self) -> DB7_R[src]
Bits 24:31 - Data byte 7
pub fn db6(&self) -> DB6_R[src]
Bits 16:23 - Data byte 6
pub fn db5(&self) -> DB5_R[src]
Bits 8:15 - Data byte 5
pub fn db4(&self) -> DB4_R[src]
Bits 0:7 - Data byte 4
impl R<u32, Reg<u32, _RFIFOMI0>>[src]
pub fn sfid_efid(&self) -> SFID_EFID_R[src]
Bits 21:31 - The frame identifier
pub fn efid(&self) -> EFID_R[src]
Bits 3:20 - The frame identifier
pub fn ff(&self) -> FF_R[src]
Bit 2 - Frame format
pub fn ft(&self) -> FT_R[src]
Bit 1 - Frame type
impl R<u32, Reg<u32, _RFIFOMP0>>[src]
pub fn ts(&self) -> TS_R[src]
Bits 16:31 - Time stamp
pub fn fi(&self) -> FI_R[src]
Bits 8:15 - Filtering index
pub fn dlenc(&self) -> DLENC_R[src]
Bits 0:3 - Data length code
impl R<u32, Reg<u32, _RFIFOMDATA00>>[src]
pub fn db3(&self) -> DB3_R[src]
Bits 24:31 - Data byte 3
pub fn db2(&self) -> DB2_R[src]
Bits 16:23 - Data byte 2
pub fn db1(&self) -> DB1_R[src]
Bits 8:15 - Data byte 1
pub fn db0(&self) -> DB0_R[src]
Bits 0:7 - Data byte 0
impl R<u32, Reg<u32, _RFIFOMDATA10>>[src]
pub fn db7(&self) -> DB7_R[src]
Bits 24:31 - Data byte 7
pub fn db6(&self) -> DB6_R[src]
Bits 16:23 - Data byte 6
pub fn db5(&self) -> DB5_R[src]
Bits 8:15 - Data byte 5
pub fn db4(&self) -> DB4_R[src]
Bits 0:7 - Data byte 4
impl R<u32, Reg<u32, _RFIFOMI1>>[src]
pub fn sfid_efid(&self) -> SFID_EFID_R[src]
Bits 21:31 - The frame identifier
pub fn efid(&self) -> EFID_R[src]
Bits 3:20 - The frame identifier
pub fn ff(&self) -> FF_R[src]
Bit 2 - Frame format
pub fn ft(&self) -> FT_R[src]
Bit 1 - Frame type
impl R<u32, Reg<u32, _RFIFOMP1>>[src]
pub fn ts(&self) -> TS_R[src]
Bits 16:31 - Time stamp
pub fn fi(&self) -> FI_R[src]
Bits 8:15 - Filtering index
pub fn dlenc(&self) -> DLENC_R[src]
Bits 0:3 - Data length code
impl R<u32, Reg<u32, _RFIFOMDATA01>>[src]
pub fn db3(&self) -> DB3_R[src]
Bits 24:31 - Data byte 3
pub fn db2(&self) -> DB2_R[src]
Bits 16:23 - Data byte 2
pub fn db1(&self) -> DB1_R[src]
Bits 8:15 - Data byte 1
pub fn db0(&self) -> DB0_R[src]
Bits 0:7 - Data byte 0
impl R<u32, Reg<u32, _RFIFOMDATA11>>[src]
pub fn db7(&self) -> DB7_R[src]
Bits 24:31 - Data byte 7
pub fn db6(&self) -> DB6_R[src]
Bits 16:23 - Data byte 6
pub fn db5(&self) -> DB5_R[src]
Bits 8:15 - Data byte 5
pub fn db4(&self) -> DB4_R[src]
Bits 0:7 - Data byte 4
impl R<u32, Reg<u32, _FCTL>>[src]
pub fn hbc1f(&self) -> HBC1F_R[src]
Bits 8:13 - Header bank of CAN1 filter
pub fn fld(&self) -> FLD_R[src]
Bit 0 - Filter lock disable
impl R<u32, Reg<u32, _FMCFG>>[src]
pub fn fmod27(&self) -> FMOD27_R[src]
Bit 27 - Filter mode
pub fn fmod26(&self) -> FMOD26_R[src]
Bit 26 - Filter mode
pub fn fmod25(&self) -> FMOD25_R[src]
Bit 25 - Filter mode
pub fn fmod24(&self) -> FMOD24_R[src]
Bit 24 - Filter mode
pub fn fmod23(&self) -> FMOD23_R[src]
Bit 23 - Filter mode
pub fn fmod22(&self) -> FMOD22_R[src]
Bit 22 - Filter mode
pub fn fmod21(&self) -> FMOD21_R[src]
Bit 21 - Filter mode
pub fn fmod20(&self) -> FMOD20_R[src]
Bit 20 - Filter mode
pub fn fmod19(&self) -> FMOD19_R[src]
Bit 19 - Filter mode
pub fn fmod18(&self) -> FMOD18_R[src]
Bit 18 - Filter mode
pub fn fmod17(&self) -> FMOD17_R[src]
Bit 17 - Filter mode
pub fn fmod16(&self) -> FMOD16_R[src]
Bit 16 - Filter mode
pub fn fmod15(&self) -> FMOD15_R[src]
Bit 15 - Filter mode
pub fn fmod14(&self) -> FMOD14_R[src]
Bit 14 - Filter mode
pub fn fmod13(&self) -> FMOD13_R[src]
Bit 13 - Filter mode
pub fn fmod12(&self) -> FMOD12_R[src]
Bit 12 - Filter mode
pub fn fmod11(&self) -> FMOD11_R[src]
Bit 11 - Filter mode
pub fn fmod10(&self) -> FMOD10_R[src]
Bit 10 - Filter mode
pub fn fmod9(&self) -> FMOD9_R[src]
Bit 9 - Filter mode
pub fn fmod8(&self) -> FMOD8_R[src]
Bit 8 - Filter mode
pub fn fmod7(&self) -> FMOD7_R[src]
Bit 7 - Filter mode
pub fn fmod6(&self) -> FMOD6_R[src]
Bit 6 - Filter mode
pub fn fmod5(&self) -> FMOD5_R[src]
Bit 5 - Filter mode
pub fn fmod4(&self) -> FMOD4_R[src]
Bit 4 - Filter mode
pub fn fmod3(&self) -> FMOD3_R[src]
Bit 3 - Filter mode
pub fn fmod2(&self) -> FMOD2_R[src]
Bit 2 - Filter mode
pub fn fmod1(&self) -> FMOD1_R[src]
Bit 1 - Filter mode
pub fn fmod0(&self) -> FMOD0_R[src]
Bit 0 - Filter mode
impl R<u32, Reg<u32, _FSCFG>>[src]
pub fn fs0(&self) -> FS0_R[src]
Bit 0 - Filter scale
pub fn fs1(&self) -> FS1_R[src]
Bit 1 - Filter scale
pub fn fs2(&self) -> FS2_R[src]
Bit 2 - Filter scale
pub fn fs3(&self) -> FS3_R[src]
Bit 3 - Filter scale
pub fn fs4(&self) -> FS4_R[src]
Bit 4 - Filter scale
pub fn fs5(&self) -> FS5_R[src]
Bit 5 - Filter scale
pub fn fs6(&self) -> FS6_R[src]
Bit 6 - Filter scale
pub fn fs7(&self) -> FS7_R[src]
Bit 7 - Filter scale
pub fn fs8(&self) -> FS8_R[src]
Bit 8 - Filter scale
pub fn fs9(&self) -> FS9_R[src]
Bit 9 - Filter scale
pub fn fs10(&self) -> FS10_R[src]
Bit 10 - Filter scale
pub fn fs11(&self) -> FS11_R[src]
Bit 11 - Filter scale
pub fn fs12(&self) -> FS12_R[src]
Bit 12 - Filter scale
pub fn fs13(&self) -> FS13_R[src]
Bit 13 - Filter scale
pub fn fs14(&self) -> FS14_R[src]
Bit 14 - Filter scale
pub fn fs15(&self) -> FS15_R[src]
Bit 15 - Filter scale
pub fn fs16(&self) -> FS16_R[src]
Bit 16 - Filter scale
pub fn fs17(&self) -> FS17_R[src]
Bit 17 - Filter scale
pub fn fs18(&self) -> FS18_R[src]
Bit 18 - Filter scale
pub fn fs19(&self) -> FS19_R[src]
Bit 19 - Filter scale
pub fn fs20(&self) -> FS20_R[src]
Bit 20 - Filter scale
pub fn fs21(&self) -> FS21_R[src]
Bit 21 - Filter scale
pub fn fs22(&self) -> FS22_R[src]
Bit 22 - Filter scale
pub fn fs23(&self) -> FS23_R[src]
Bit 23 - Filter scale
pub fn fs24(&self) -> FS24_R[src]
Bit 24 - Filter scale
pub fn fs25(&self) -> FS25_R[src]
Bit 25 - Filter scale
pub fn fs26(&self) -> FS26_R[src]
Bit 26 - Filter scale
pub fn fs27(&self) -> FS27_R[src]
Bit 27 - Filter scale
impl R<u32, Reg<u32, _FAFIFO>>[src]
pub fn faf0(&self) -> FAF0_R[src]
Bit 0 - Filter 0 associated FIFO
pub fn faf1(&self) -> FAF1_R[src]
Bit 1 - Filter 1 associated FIFO
pub fn faf2(&self) -> FAF2_R[src]
Bit 2 - Filter 2 associated FIFO
pub fn faf3(&self) -> FAF3_R[src]
Bit 3 - Filter 3 associated FIFO
pub fn faf4(&self) -> FAF4_R[src]
Bit 4 - Filter 4 associated FIFO
pub fn faf5(&self) -> FAF5_R[src]
Bit 5 - Filter 5 associated FIFO
pub fn faf6(&self) -> FAF6_R[src]
Bit 6 - Filter 6 associated FIFO
pub fn faf7(&self) -> FAF7_R[src]
Bit 7 - Filter 7 associated FIFO
pub fn faf8(&self) -> FAF8_R[src]
Bit 8 - Filter 8 associated FIFO
pub fn faf9(&self) -> FAF9_R[src]
Bit 9 - Filter 9 associated FIFO
pub fn faf10(&self) -> FAF10_R[src]
Bit 10 - Filter 10 associated FIFO
pub fn faf11(&self) -> FAF11_R[src]
Bit 11 - Filter 11 associated FIFO
pub fn faf12(&self) -> FAF12_R[src]
Bit 12 - Filter 12 associated FIFO
pub fn faf13(&self) -> FAF13_R[src]
Bit 13 - Filter 13 associated FIFO
pub fn faf14(&self) -> FAF14_R[src]
Bit 14 - Filter 14 associated FIFO
pub fn faf15(&self) -> FAF15_R[src]
Bit 15 - Filter 15 associated FIFO
pub fn faf16(&self) -> FAF16_R[src]
Bit 16 - Filter 16 associated FIFO
pub fn faf17(&self) -> FAF17_R[src]
Bit 17 - Filter 17 associated FIFO
pub fn faf18(&self) -> FAF18_R[src]
Bit 18 - Filter 18 associated FIFO
pub fn faf19(&self) -> FAF19_R[src]
Bit 19 - Filter 19 associated FIFO
pub fn faf20(&self) -> FAF20_R[src]
Bit 20 - Filter 20 associated FIFO
pub fn faf21(&self) -> FAF21_R[src]
Bit 21 - Filter 21 associated FIFO
pub fn faf22(&self) -> FAF22_R[src]
Bit 22 - Filter 22 associated FIFO
pub fn faf23(&self) -> FAF23_R[src]
Bit 23 - Filter 23 associated FIFO
pub fn faf24(&self) -> FAF24_R[src]
Bit 24 - Filter 24 associated FIFO
pub fn faf25(&self) -> FAF25_R[src]
Bit 25 - Filter 25 associated FIFO
pub fn faf26(&self) -> FAF26_R[src]
Bit 26 - Filter 26 associated FIFO
pub fn faf27(&self) -> FAF27_R[src]
Bit 27 - Filter 27 associated FIFO
impl R<u32, Reg<u32, _FW>>[src]
pub fn fw0(&self) -> FW0_R[src]
Bit 0 - Filter working
pub fn fw1(&self) -> FW1_R[src]
Bit 1 - Filter working
pub fn fw2(&self) -> FW2_R[src]
Bit 2 - Filter working
pub fn fw3(&self) -> FW3_R[src]
Bit 3 - Filter working
pub fn fw4(&self) -> FW4_R[src]
Bit 4 - Filter working
pub fn fw5(&self) -> FW5_R[src]
Bit 5 - Filter working
pub fn fw6(&self) -> FW6_R[src]
Bit 6 - Filter working
pub fn fw7(&self) -> FW7_R[src]
Bit 7 - Filter working
pub fn fw8(&self) -> FW8_R[src]
Bit 8 - Filter working
pub fn fw9(&self) -> FW9_R[src]
Bit 9 - Filter working
pub fn fw10(&self) -> FW10_R[src]
Bit 10 - Filter working
pub fn fw11(&self) -> FW11_R[src]
Bit 11 - Filter working
pub fn fw12(&self) -> FW12_R[src]
Bit 12 - Filter working
pub fn fw13(&self) -> FW13_R[src]
Bit 13 - Filter working
pub fn fw14(&self) -> FW14_R[src]
Bit 14 - Filter working
pub fn fw15(&self) -> FW15_R[src]
Bit 15 - Filter working
pub fn fw16(&self) -> FW16_R[src]
Bit 16 - Filter working
pub fn fw17(&self) -> FW17_R[src]
Bit 17 - Filter working
pub fn fw18(&self) -> FW18_R[src]
Bit 18 - Filter working
pub fn fw19(&self) -> FW19_R[src]
Bit 19 - Filter working
pub fn fw20(&self) -> FW20_R[src]
Bit 20 - Filter working
pub fn fw21(&self) -> FW21_R[src]
Bit 21 - Filter working
pub fn fw22(&self) -> FW22_R[src]
Bit 22 - Filter working
pub fn fw23(&self) -> FW23_R[src]
Bit 23 - Filter working
pub fn fw24(&self) -> FW24_R[src]
Bit 24 - Filter working
pub fn fw25(&self) -> FW25_R[src]
Bit 25 - Filter working
pub fn fw26(&self) -> FW26_R[src]
Bit 26 - Filter working
pub fn fw27(&self) -> FW27_R[src]
Bit 27 - Filter working
impl R<u32, Reg<u32, _F0DATA0>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F0DATA1>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F1DATA0>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F1DATA1>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F2DATA0>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F2DATA1>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F3DATA0>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F3DATA1>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F4DATA0>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F4DATA1>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F5DATA0>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F5DATA1>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F6DATA0>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F6DATA1>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F7DATA0>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F7DATA1>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F8DATA0>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F8DATA1>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F9DATA0>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F9DATA1>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F10DATA0>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F10DATA1>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F11DATA0>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F11DATA1>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F12DATA0>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F12DATA1>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F13DATA0>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F13DATA1>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F14DATA0>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F14DATA1>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F15DATA0>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F15DATA1>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F16DATA0>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F16DATA1>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F17DATA0>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F17DATA1>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F18DATA0>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F18DATA1>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F19DATA0>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F19DATA1>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F20DATA0>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F20DATA1>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F21DATA0>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F21DATA1>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F22DATA0>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F22DATA1>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F23DATA0>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F23DATA1>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F24DATA0>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F24DATA1>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F25DATA0>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F25DATA1>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F26DATA0>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F26DATA1>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F27DATA0>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _F27DATA1>>[src]
pub fn fd0(&self) -> FD0_R[src]
Bit 0 - Filter data
pub fn fd1(&self) -> FD1_R[src]
Bit 1 - Filter data
pub fn fd2(&self) -> FD2_R[src]
Bit 2 - Filter data
pub fn fd3(&self) -> FD3_R[src]
Bit 3 - Filter data
pub fn fd4(&self) -> FD4_R[src]
Bit 4 - Filter data
pub fn fd5(&self) -> FD5_R[src]
Bit 5 - Filter data
pub fn fd6(&self) -> FD6_R[src]
Bit 6 - Filter data
pub fn fd7(&self) -> FD7_R[src]
Bit 7 - Filter data
pub fn fd8(&self) -> FD8_R[src]
Bit 8 - Filter data
pub fn fd9(&self) -> FD9_R[src]
Bit 9 - Filter data
pub fn fd10(&self) -> FD10_R[src]
Bit 10 - Filter data
pub fn fd11(&self) -> FD11_R[src]
Bit 11 - Filter data
pub fn fd12(&self) -> FD12_R[src]
Bit 12 - Filter data
pub fn fd13(&self) -> FD13_R[src]
Bit 13 - Filter data
pub fn fd14(&self) -> FD14_R[src]
Bit 14 - Filter data
pub fn fd15(&self) -> FD15_R[src]
Bit 15 - Filter data
pub fn fd16(&self) -> FD16_R[src]
Bit 16 - Filter data
pub fn fd17(&self) -> FD17_R[src]
Bit 17 - Filter data
pub fn fd18(&self) -> FD18_R[src]
Bit 18 - Filter data
pub fn fd19(&self) -> FD19_R[src]
Bit 19 - Filter data
pub fn fd20(&self) -> FD20_R[src]
Bit 20 - Filter data
pub fn fd21(&self) -> FD21_R[src]
Bit 21 - Filter data
pub fn fd22(&self) -> FD22_R[src]
Bit 22 - Filter data
pub fn fd23(&self) -> FD23_R[src]
Bit 23 - Filter data
pub fn fd24(&self) -> FD24_R[src]
Bit 24 - Filter data
pub fn fd25(&self) -> FD25_R[src]
Bit 25 - Filter data
pub fn fd26(&self) -> FD26_R[src]
Bit 26 - Filter data
pub fn fd27(&self) -> FD27_R[src]
Bit 27 - Filter data
pub fn fd28(&self) -> FD28_R[src]
Bit 28 - Filter data
pub fn fd29(&self) -> FD29_R[src]
Bit 29 - Filter data
pub fn fd30(&self) -> FD30_R[src]
Bit 30 - Filter data
pub fn fd31(&self) -> FD31_R[src]
Bit 31 - Filter data
impl R<u32, Reg<u32, _PHYCTL>>[src]
pub fn pomod(&self) -> POMOD_R[src]
Bits 8:9 - CAN PHY output driver control
pub fn phyen(&self) -> PHYEN_R[src]
Bit 0 - PHY enable bit
impl R<u32, Reg<u32, _CTL>>[src]
pub fn endom(&self) -> ENDOM_R[src]
Bit 2 - ENDOM bit value in the next frame in TX mode
pub fn som(&self) -> SOM_R[src]
Bit 1 - Start of sending a message
pub fn cecen(&self) -> CECEN_R[src]
Bit 0 - Enable/disable HDMI-CEC controller
impl R<u32, Reg<u32, _CFG>>[src]
pub fn sft(&self) -> SFT_R[src]
Bits 0:2 - Signal Free Time
pub fn rtol(&self) -> RTOL_R[src]
Bit 3 - Reception bit timing tolerance
pub fn rbrestp(&self) -> RBRESTP_R[src]
Bit 4 - Whether stop receive message when detected RBRE
pub fn rbregen(&self) -> RBREGEN_R[src]
Bit 5 - Generate Error-bit when detected RBRE in singlecast
pub fn rlbpegen(&self) -> RLBPEGEN_R[src]
Bit 6 - Generate Error-bit when detected RLBPE in singlecast
pub fn bcng(&self) -> BCNG_R[src]
Bit 7 - Do not generate Error-bit in broadcast message
pub fn sftopt(&self) -> SFTOPT_R[src]
Bit 8 - The SFT start option
pub fn oadr(&self) -> OADR_R[src]
Bits 16:30 - Own Address
pub fn lmen(&self) -> LMEN_R[src]
Bit 31 - Listen mode enable
impl R<u32, Reg<u32, _RDATA>>[src]
impl R<u32, Reg<u32, _INTF>>[src]
pub fn taerr(&self) -> TAERR_R[src]
Bit 12 - Tx ACK Error flag
pub fn terr(&self) -> TERR_R[src]
Bit 11 - Tx-Error
pub fn tu(&self) -> TU_R[src]
Bit 10 - Tx data buffer underrun
pub fn tend(&self) -> TEND_R[src]
Bit 9 - Transmission successfully end
pub fn tbr(&self) -> TBR_R[src]
Bit 8 - Tx-Byte data request
pub fn lstarb(&self) -> LSTARB_R[src]
Bit 7 - Arbitration lost
pub fn rae(&self) -> RAE_R[src]
Bit 6 - Rx ACK Error
pub fn rlbpe(&self) -> RLBPE_R[src]
Bit 5 - Long Bit Period Error
pub fn rsbpe(&self) -> RSBPE_R[src]
Bit 4 - Short Bit Period Error
pub fn rbre(&self) -> RBRE_R[src]
Bit 3 - Bit Rising Error
pub fn ro(&self) -> RO_R[src]
Bit 2 - RX Overrun
pub fn rend(&self) -> REND_R[src]
Bit 1 - End of Reception
pub fn rbr(&self) -> RBR_R[src]
Bit 0 - Rx-Byte data received
impl R<u32, Reg<u32, _INTEN>>[src]
pub fn taerrie(&self) -> TAERRIE_R[src]
Bit 12 - TAERR Interrupt Enable
pub fn terrie(&self) -> TERRIE_R[src]
Bit 11 - TERR Interrupt Enable
pub fn tuie(&self) -> TUIE_R[src]
Bit 10 - TU Interrupt Enable
pub fn txendie(&self) -> TXENDIE_R[src]
Bit 9 - TEND Interrupt Enable
pub fn tbrie(&self) -> TBRIE_R[src]
Bit 8 - TBR Interrupt Enable
pub fn lstarbie(&self) -> LSTARBIE_R[src]
Bit 7 - ALRLST Interrupt Enable
pub fn raeie(&self) -> RAEIE_R[src]
Bit 6 - RAE Interrupt Enable
pub fn rlbpeie(&self) -> RLBPEIE_R[src]
Bit 5 - RLBPE Interrupt Enable
pub fn rsbpeie(&self) -> RSBPEIE_R[src]
Bit 4 - RSBPE Interrupt Enable
pub fn rbreie(&self) -> RBREIE_R[src]
Bit 3 - RBRE Interrupt Enable
pub fn roie(&self) -> ROIE_R[src]
Bit 2 - RO Interrupt Enable
pub fn rendie(&self) -> RENDIE_R[src]
Bit 1 - REND Interrupt Enable
pub fn rbrie(&self) -> RBRIE_R[src]
Bit 0 - RBR Interrupt Enable
impl R<bool, CMP0EN_A>[src]
pub fn variant(&self) -> CMP0EN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, CMP0SW_A>[src]
pub fn variant(&self) -> CMP0SW_A[src]
Get enumerated values variant
pub fn is_open(&self) -> bool[src]
Checks if the value of the field is OPEN
pub fn is_closed(&self) -> bool[src]
Checks if the value of the field is CLOSED
impl R<u8, CMP0M_A>[src]
pub fn variant(&self) -> CMP0M_A[src]
Get enumerated values variant
pub fn is_high_speed(&self) -> bool[src]
Checks if the value of the field is HIGHSPEED
pub fn is_medium_speed(&self) -> bool[src]
Checks if the value of the field is MEDIUMSPEED
pub fn is_low_speed(&self) -> bool[src]
Checks if the value of the field is LOWSPEED
pub fn is_very_low_speed(&self) -> bool[src]
Checks if the value of the field is VERYLOWSPEED
impl R<u8, CMP0MSEL_A>[src]
pub fn variant(&self) -> Variant<u8, CMP0MSEL_A>[src]
Get enumerated values variant
pub fn is_one_quarter_vref(&self) -> bool[src]
Checks if the value of the field is ONEQUARTERVREF
pub fn is_one_half_vref(&self) -> bool[src]
Checks if the value of the field is ONEHALFVREF
pub fn is_three_quarter_vref(&self) -> bool[src]
Checks if the value of the field is THREEQUARTERVREF
pub fn is_vref(&self) -> bool[src]
Checks if the value of the field is VREF
pub fn is_pa4(&self) -> bool[src]
Checks if the value of the field is PA4
pub fn is_pa5(&self) -> bool[src]
Checks if the value of the field is PA5
pub fn is_pa0(&self) -> bool[src]
Checks if the value of the field is PA0
impl R<u8, CMP0OSEL_A>[src]
pub fn variant(&self) -> CMP0OSEL_A[src]
Get enumerated values variant
pub fn is_no_selection(&self) -> bool[src]
Checks if the value of the field is NOSELECTION
pub fn is_timer0break_input(&self) -> bool[src]
Checks if the value of the field is TIMER0BREAKINPUT
pub fn is_timer0input_capture0(&self) -> bool[src]
Checks if the value of the field is TIMER0INPUTCAPTURE0
pub fn is_timer0ocpreclear_input(&self) -> bool[src]
Checks if the value of the field is TIMER0OCPRECLEARINPUT
pub fn is_timer1input_capture3(&self) -> bool[src]
Checks if the value of the field is TIMER1INPUTCAPTURE3
pub fn is_timer1ocpreclear_input(&self) -> bool[src]
Checks if the value of the field is TIMER1OCPRECLEARINPUT
pub fn is_timer2input_capture0(&self) -> bool[src]
Checks if the value of the field is TIMER2INPUTCAPTURE0
pub fn is_timer2ocpreclear_input(&self) -> bool[src]
Checks if the value of the field is TIMER2OCPRECLEARINPUT
impl R<bool, CMP0PL_A>[src]
pub fn variant(&self) -> CMP0PL_A[src]
Get enumerated values variant
pub fn is_not_inverted(&self) -> bool[src]
Checks if the value of the field is NOTINVERTED
pub fn is_inverted(&self) -> bool[src]
Checks if the value of the field is INVERTED
impl R<u8, CMP0HST_A>[src]
pub fn variant(&self) -> CMP0HST_A[src]
Get enumerated values variant
pub fn is_no_hysteresis(&self) -> bool[src]
Checks if the value of the field is NOHYSTERESIS
pub fn is_low_hysteresis(&self) -> bool[src]
Checks if the value of the field is LOWHYSTERESIS
pub fn is_medium_hysteresis(&self) -> bool[src]
Checks if the value of the field is MEDIUMHYSTERESIS
pub fn is_high_hysteresis(&self) -> bool[src]
Checks if the value of the field is HIGHHYSTERESIS
impl R<bool, CMP0O_A>[src]
pub fn variant(&self) -> CMP0O_A[src]
Get enumerated values variant
pub fn is_low(&self) -> bool[src]
Checks if the value of the field is LOW
pub fn is_high(&self) -> bool[src]
Checks if the value of the field is HIGH
impl R<bool, CMP0LK_A>[src]
pub fn variant(&self) -> CMP0LK_A[src]
Get enumerated values variant
pub fn is_read_write(&self) -> bool[src]
Checks if the value of the field is READWRITE
pub fn is_read_only(&self) -> bool[src]
Checks if the value of the field is READONLY
impl R<bool, WNDEN_A>[src]
pub fn variant(&self) -> WNDEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CS>>[src]
pub fn cmp0en(&self) -> CMP0EN_R[src]
Bit 0 - CMP0 enable
pub fn cmp0sw(&self) -> CMP0SW_R[src]
Bit 1 - CMP0 switch
pub fn cmp0m(&self) -> CMP0M_R[src]
Bits 2:3 - CMP0 mode
pub fn cmp0msel(&self) -> CMP0MSEL_R[src]
Bits 4:6 - CMP0_M input selection
pub fn cmp0osel(&self) -> CMP0OSEL_R[src]
Bits 8:10 - Comparator 0 output selection
pub fn cmp0pl(&self) -> CMP0PL_R[src]
Bit 11 - Polarity of CMP0 output
pub fn cmp0hst(&self) -> CMP0HST_R[src]
Bits 12:13 - CMP0 hysteresis
pub fn cmp0o(&self) -> CMP0O_R[src]
Bit 14 - CMP0 output
pub fn cmp0lk(&self) -> CMP0LK_R[src]
Bit 15 - CMP0 lock
pub fn cmp1en(&self) -> CMP1EN_R[src]
Bit 16 - CMP1 enable
pub fn cmp1m(&self) -> CMP1M_R[src]
Bits 18:19 - CMP1 mode
pub fn cmp1msel(&self) -> CMP1MSEL_R[src]
Bits 20:22 - CMP1_M input selection
pub fn wnden(&self) -> WNDEN_R[src]
Bit 23 - Window mode enable
pub fn cmp1osel(&self) -> CMP1OSEL_R[src]
Bits 24:26 - CMP1 output selection
pub fn cmp1pl(&self) -> CMP1PL_R[src]
Bit 27 - Polarity of CMP1 output
pub fn cmp1hst(&self) -> CMP1HST_R[src]
Bits 28:29 - CMP1 hysteresis
pub fn cmp1o(&self) -> CMP1O_R[src]
Bit 30 - CMP1 output
pub fn cmp1lk(&self) -> CMP1LK_R[src]
Bit 31 - CMP1 lock
impl R<u32, Reg<u32, _DATA>>[src]
impl R<u32, Reg<u32, _FDATA>>[src]
impl R<bool, RST_A>[src]
pub fn variant(&self) -> Variant<bool, RST_A>[src]
Get enumerated values variant
pub fn is_reset(&self) -> bool[src]
Checks if the value of the field is RESET
impl R<u8, REV_I_A>[src]
pub fn variant(&self) -> REV_I_A[src]
Get enumerated values variant
pub fn is_normal(&self) -> bool[src]
Checks if the value of the field is NORMAL
pub fn is_byte(&self) -> bool[src]
Checks if the value of the field is BYTE
pub fn is_half_word(&self) -> bool[src]
Checks if the value of the field is HALFWORD
pub fn is_word(&self) -> bool[src]
Checks if the value of the field is WORD
impl R<bool, REV_O_A>[src]
pub fn variant(&self) -> REV_O_A[src]
Get enumerated values variant
pub fn is_normal(&self) -> bool[src]
Checks if the value of the field is NORMAL
pub fn is_reversed(&self) -> bool[src]
Checks if the value of the field is REVERSED
impl R<u32, Reg<u32, _CTL>>[src]
pub fn rst(&self) -> RST_R[src]
Bit 0 - reset bit
pub fn rev_i(&self) -> REV_I_R[src]
Bits 5:6 - Input Data Reverse Function
pub fn rev_o(&self) -> REV_O_R[src]
Bit 7 - Output Data Reverse Function
impl R<u32, Reg<u32, _IDATA>>[src]
impl R<u32, Reg<u32, _CTL>>[src]
pub fn den0(&self) -> DEN0_R[src]
Bit 0 - DAC0 enable
pub fn dboff0(&self) -> DBOFF0_R[src]
Bit 1 - DAC0 output buffer turn off
pub fn dten0(&self) -> DTEN0_R[src]
Bit 2 - DAC0 trigger enable
pub fn dtsel0(&self) -> DTSEL0_R[src]
Bits 3:5 - DAC0 trigger selection
pub fn ddmaen0(&self) -> DDMAEN0_R[src]
Bit 12 - DAC0 DMA enable
pub fn ddudrie0(&self) -> DDUDRIE0_R[src]
Bit 13 - DAC0 DMA Underrun Interrupt enable
pub fn den1(&self) -> DEN1_R[src]
Bit 16 - DAC1 enable
pub fn dboff1(&self) -> DBOFF1_R[src]
Bit 17 - DAC1 output buffer turn off
pub fn dten1(&self) -> DTEN1_R[src]
Bit 18 - DAC1 trigger enable
pub fn dtsel1(&self) -> DTSEL1_R[src]
Bits 19:21 - DAC1 trigger selection
pub fn ddmaen1(&self) -> DDMAEN1_R[src]
Bit 28 - DAC1 DMA enable
pub fn ddudrie1(&self) -> DDUDRIE1_R[src]
Bit 29 - DAC1 DMA Underrun Interrupt enable
impl R<u32, Reg<u32, _DAC0_R12DH>>[src]
impl R<u32, Reg<u32, _DAC0_L12DH>>[src]
impl R<u32, Reg<u32, _DAC0_R8DH>>[src]
impl R<u32, Reg<u32, _DAC1_R12DH>>[src]
impl R<u32, Reg<u32, _DAC1_L12DH>>[src]
impl R<u32, Reg<u32, _DAC1_R8DH>>[src]
impl R<u32, Reg<u32, _DACC_R12DH>>[src]
pub fn dac0_dh(&self) -> DAC0_DH_R[src]
Bits 0:11 - DAC0 12-bit right-aligned data
pub fn dac1_dh(&self) -> DAC1_DH_R[src]
Bits 16:27 - DAC1 12-bit right-aligned data
impl R<u32, Reg<u32, _DACC_L12DH>>[src]
pub fn dac0_dh(&self) -> DAC0_DH_R[src]
Bits 4:15 - DAC0 12-bit left-aligned data
pub fn dac1_dh(&self) -> DAC1_DH_R[src]
Bits 20:31 - DAC1 12-bit left-aligned data
impl R<u32, Reg<u32, _DACC_R8DH>>[src]
pub fn dac0_dh(&self) -> DAC0_DH_R[src]
Bits 0:7 - DAC0 8-bit right-aligned data
pub fn dac1_dh(&self) -> DAC1_DH_R[src]
Bits 8:15 - DAC1 8-bit right-aligned data
impl R<u32, Reg<u32, _DAC0_DO>>[src]
impl R<u32, Reg<u32, _DAC1_DO>>[src]
impl R<u32, Reg<u32, _STAT>>[src]
pub fn ddudr0(&self) -> DDUDR0_R[src]
Bit 13 - DAC0 DMA underrun flag
pub fn ddudr1(&self) -> DDUDR1_R[src]
Bit 29 - DAC1 DMA underrun flag
impl R<u32, Reg<u32, _ID>>[src]
impl R<bool, SLP_HOLD_A>[src]
pub fn variant(&self) -> SLP_HOLD_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, DSLP_HOLD_A>[src]
pub fn variant(&self) -> DSLP_HOLD_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, STB_HOLD_A>[src]
pub fn variant(&self) -> STB_HOLD_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, FWDGT_HOLD_A>[src]
pub fn variant(&self) -> FWDGT_HOLD_A[src]
Get enumerated values variant
pub fn is_continue_(&self) -> bool[src]
Checks if the value of the field is CONTINUE
pub fn is_stop(&self) -> bool[src]
Checks if the value of the field is STOP
impl R<bool, TIMER0_HOLD_A>[src]
pub fn variant(&self) -> TIMER0_HOLD_A[src]
Get enumerated values variant
pub fn is_continue_(&self) -> bool[src]
Checks if the value of the field is CONTINUE
pub fn is_stop(&self) -> bool[src]
Checks if the value of the field is STOP
impl R<bool, CAN0_HOLD_A>[src]
pub fn variant(&self) -> CAN0_HOLD_A[src]
Get enumerated values variant
pub fn is_continue_(&self) -> bool[src]
Checks if the value of the field is CONTINUE
pub fn is_stop(&self) -> bool[src]
Checks if the value of the field is STOP
impl R<bool, I2C0_HOLD_A>[src]
pub fn variant(&self) -> I2C0_HOLD_A[src]
Get enumerated values variant
pub fn is_continue_(&self) -> bool[src]
Checks if the value of the field is CONTINUE
pub fn is_stop(&self) -> bool[src]
Checks if the value of the field is STOP
impl R<u32, Reg<u32, _CTL0>>[src]
pub fn slp_hold(&self) -> SLP_HOLD_R[src]
Bit 0 - Sleep mode hold register
pub fn dslp_hold(&self) -> DSLP_HOLD_R[src]
Bit 1 - Deep-sleep mode hold register
pub fn stb_hold(&self) -> STB_HOLD_R[src]
Bit 2 - Standby mode hold register
pub fn fwdgt_hold(&self) -> FWDGT_HOLD_R[src]
Bit 8 - FWDGT hold register
pub fn wwdgt_hold(&self) -> WWDGT_HOLD_R[src]
Bit 9 - WWDGT hold register
pub fn timer0_hold(&self) -> TIMER0_HOLD_R[src]
Bit 10 - Timer 0 hold register
pub fn timer1_hold(&self) -> TIMER1_HOLD_R[src]
Bit 11 - Timer 1 hold register
pub fn timer2_hold(&self) -> TIMER2_HOLD_R[src]
Bit 12 - Timer 2 hold register
pub fn can0_hold(&self) -> CAN0_HOLD_R[src]
Bit 14 - CAN 0 hold register
pub fn i2c0_hold(&self) -> I2C0_HOLD_R[src]
Bit 15 - I2C0 hold register
pub fn i2c1_hold(&self) -> I2C1_HOLD_R[src]
Bit 16 - I2C1 hold register
pub fn i2c2_hold(&self) -> I2C2_HOLD_R[src]
Bit 17 - I2C2 hold register
pub fn timer5_hold(&self) -> TIMER5_HOLD_R[src]
Bit 19 - Timer 5 hold register
pub fn can1_hold(&self) -> CAN1_HOLD_R[src]
Bit 21 - CAN1 hold register
pub fn timer13_hold(&self) -> TIMER13_HOLD_R[src]
Bit 27 - Timer 13 hold register
impl R<bool, RTC_HOLD_A>[src]
pub fn variant(&self) -> RTC_HOLD_A[src]
Get enumerated values variant
pub fn is_continue_(&self) -> bool[src]
Checks if the value of the field is CONTINUE
pub fn is_stop(&self) -> bool[src]
Checks if the value of the field is STOP
impl R<bool, TIMER14_HOLD_A>[src]
pub fn variant(&self) -> TIMER14_HOLD_A[src]
Get enumerated values variant
pub fn is_continue_(&self) -> bool[src]
Checks if the value of the field is CONTINUE
pub fn is_stop(&self) -> bool[src]
Checks if the value of the field is STOP
impl R<u32, Reg<u32, _CTL1>>[src]
pub fn rtc_hold(&self) -> RTC_HOLD_R[src]
Bit 10 - RTC hold register
pub fn timer14_hold(&self) -> TIMER14_HOLD_R[src]
Bit 16 - Timer 14 hold register
pub fn timer15_hold(&self) -> TIMER15_HOLD_R[src]
Bit 17 - Timer 15 hold register
pub fn timer16_hold(&self) -> TIMER16_HOLD_R[src]
Bit 18 - Timer 16 hold register
impl R<bool, GIF0_A>[src]
pub fn variant(&self) -> GIF0_A[src]
Get enumerated values variant
pub fn is_no_event(&self) -> bool[src]
Checks if the value of the field is NOEVENT
pub fn is_event(&self) -> bool[src]
Checks if the value of the field is EVENT
impl R<bool, FTFIF0_A>[src]
pub fn variant(&self) -> FTFIF0_A[src]
Get enumerated values variant
pub fn is_not_complete(&self) -> bool[src]
Checks if the value of the field is NOTCOMPLETE
pub fn is_complete(&self) -> bool[src]
Checks if the value of the field is COMPLETE
impl R<bool, HTFIF0_A>[src]
pub fn variant(&self) -> HTFIF0_A[src]
Get enumerated values variant
pub fn is_not_half(&self) -> bool[src]
Checks if the value of the field is NOTHALF
pub fn is_half(&self) -> bool[src]
Checks if the value of the field is HALF
impl R<bool, TAEIF0_A>[src]
pub fn variant(&self) -> TAEIF0_A[src]
Get enumerated values variant
pub fn is_no_error(&self) -> bool[src]
Checks if the value of the field is NOERROR
pub fn is_error(&self) -> bool[src]
Checks if the value of the field is ERROR
impl R<u32, Reg<u32, _INTF>>[src]
pub fn gif0(&self) -> GIF0_R[src]
Bit 0 - Global interrupt flag of channel 0
pub fn ftfif0(&self) -> FTFIF0_R[src]
Bit 1 - Full transfer finish flag of channel 0
pub fn htfif0(&self) -> HTFIF0_R[src]
Bit 2 - Half transfer finish flag of channel 0
pub fn taeif0(&self) -> TAEIF0_R[src]
Bit 3 - Transfer access error flag of channel 0
pub fn gif1(&self) -> GIF1_R[src]
Bit 4 - Global interrupt flag of channel 1
pub fn ftfif1(&self) -> FTFIF1_R[src]
Bit 5 - Full transfer finish flag of channel 1
pub fn htfif1(&self) -> HTFIF1_R[src]
Bit 6 - Half transfer finish flag of channel 1
pub fn taeif1(&self) -> TAEIF1_R[src]
Bit 7 - Transfer access error flag of channel 1
pub fn gif2(&self) -> GIF2_R[src]
Bit 8 - Global interrupt flag of channel 2
pub fn ftfif2(&self) -> FTFIF2_R[src]
Bit 9 - Full transfer finish flag of channel 2
pub fn htfif2(&self) -> HTFIF2_R[src]
Bit 10 - Half transfer finish flag of channel 2
pub fn taeif2(&self) -> TAEIF2_R[src]
Bit 11 - Transfer access error flag of channel 2
pub fn gif3(&self) -> GIF3_R[src]
Bit 12 - Global interrupt flag of channel 3
pub fn ftfif3(&self) -> FTFIF3_R[src]
Bit 13 - Full transfer finish flag of channel 3
pub fn htfif3(&self) -> HTFIF3_R[src]
Bit 14 - Half transfer finish flag of channel 3
pub fn taeif3(&self) -> TAEIF3_R[src]
Bit 15 - Transfer access error flag of channel 3
pub fn gif4(&self) -> GIF4_R[src]
Bit 16 - Global interrupt flag of channel 4
pub fn ftfif4(&self) -> FTFIF4_R[src]
Bit 17 - Full transfer finish flag of channel 4
pub fn htfif4(&self) -> HTFIF4_R[src]
Bit 18 - Half transfer finish flag of channel 4
pub fn taeif4(&self) -> TAEIF4_R[src]
Bit 19 - Transfer access error flag of channel 4
pub fn gif5(&self) -> GIF5_R[src]
Bit 20 - Global interrupt flag of channel 5
pub fn ftfif5(&self) -> FTFIF5_R[src]
Bit 21 - Full transfer finish flag of channel 5
pub fn htfif5(&self) -> HTFIF5_R[src]
Bit 22 - Half transfer finish flag of channel 5
pub fn taeif5(&self) -> TAEIF5_R[src]
Bit 23 - Transfer access error flag of channel 5
pub fn gif6(&self) -> GIF6_R[src]
Bit 24 - Global interrupt flag of channel 6
pub fn ftfif6(&self) -> FTFIF6_R[src]
Bit 25 - Full transfer finish flag of channel 6
pub fn htfif6(&self) -> HTFIF6_R[src]
Bit 26 - Half transfer finish flag of channel 6
pub fn taeif6(&self) -> TAEIF6_R[src]
Bit 27 - Transfer access error flag of channel 6
impl R<bool, CHEN_A>[src]
pub fn variant(&self) -> CHEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, FTFIE_A>[src]
pub fn variant(&self) -> FTFIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, HTFIE_A>[src]
pub fn variant(&self) -> HTFIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, TAEIE_A>[src]
pub fn variant(&self) -> TAEIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, DIR_A>[src]
pub fn variant(&self) -> DIR_A[src]
Get enumerated values variant
pub fn is_from_peripheral(&self) -> bool[src]
Checks if the value of the field is FROMPERIPHERAL
pub fn is_from_memory(&self) -> bool[src]
Checks if the value of the field is FROMMEMORY
impl R<bool, CMEN_A>[src]
pub fn variant(&self) -> CMEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, PNAGA_A>[src]
pub fn variant(&self) -> PNAGA_A[src]
Get enumerated values variant
pub fn is_fixed(&self) -> bool[src]
Checks if the value of the field is FIXED
pub fn is_increment(&self) -> bool[src]
Checks if the value of the field is INCREMENT
impl R<u8, PWIDTH_A>[src]
pub fn variant(&self) -> Variant<u8, PWIDTH_A>[src]
Get enumerated values variant
pub fn is_bits8(&self) -> bool[src]
Checks if the value of the field is BITS8
pub fn is_bits16(&self) -> bool[src]
Checks if the value of the field is BITS16
pub fn is_bits32(&self) -> bool[src]
Checks if the value of the field is BITS32
impl R<u8, PRIO_A>[src]
pub fn variant(&self) -> PRIO_A[src]
Get enumerated values variant
pub fn is_low(&self) -> bool[src]
Checks if the value of the field is LOW
pub fn is_medium(&self) -> bool[src]
Checks if the value of the field is MEDIUM
pub fn is_high(&self) -> bool[src]
Checks if the value of the field is HIGH
pub fn is_very_high(&self) -> bool[src]
Checks if the value of the field is VERYHIGH
impl R<bool, M2M_A>[src]
pub fn variant(&self) -> M2M_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CH0CTL0>>[src]
pub fn chen(&self) -> CHEN_R[src]
Bit 0 - Channel enable
pub fn ftfie(&self) -> FTFIE_R[src]
Bit 1 - Enable bit for full transfer finish interrupt
pub fn htfie(&self) -> HTFIE_R[src]
Bit 2 - Enable bit for half transfer finish interrupt
pub fn taeie(&self) -> TAEIE_R[src]
Bit 3 - Enable bit for tranfer access error interrupt
pub fn dir(&self) -> DIR_R[src]
Bit 4 - Transfer mode
pub fn cmen(&self) -> CMEN_R[src]
Bit 5 - Circular mode enable
pub fn pnaga(&self) -> PNAGA_R[src]
Bit 6 - Next address generation algorithm of peripheral
pub fn mnaga(&self) -> MNAGA_R[src]
Bit 7 - Next address generation algorithm of memory
pub fn pwidth(&self) -> PWIDTH_R[src]
Bits 8:9 - Transfer data size of peripheral
pub fn mwidth(&self) -> MWIDTH_R[src]
Bits 10:11 - Transfer data size of memory
pub fn prio(&self) -> PRIO_R[src]
Bits 12:13 - Priority Level of this channel
pub fn m2m(&self) -> M2M_R[src]
Bit 14 - Memory to memory mode
impl R<u32, Reg<u32, _CH0CNT>>[src]
impl R<u32, Reg<u32, _CH0PADDR>>[src]
impl R<u32, Reg<u32, _CH0MADDR>>[src]
impl R<bool, CHEN_A>[src]
pub fn variant(&self) -> CHEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, FTFIE_A>[src]
pub fn variant(&self) -> FTFIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, HTFIE_A>[src]
pub fn variant(&self) -> HTFIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, TAEIE_A>[src]
pub fn variant(&self) -> TAEIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, DIR_A>[src]
pub fn variant(&self) -> DIR_A[src]
Get enumerated values variant
pub fn is_from_peripheral(&self) -> bool[src]
Checks if the value of the field is FROMPERIPHERAL
pub fn is_from_memory(&self) -> bool[src]
Checks if the value of the field is FROMMEMORY
impl R<bool, CMEN_A>[src]
pub fn variant(&self) -> CMEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, PNAGA_A>[src]
pub fn variant(&self) -> PNAGA_A[src]
Get enumerated values variant
pub fn is_fixed(&self) -> bool[src]
Checks if the value of the field is FIXED
pub fn is_increment(&self) -> bool[src]
Checks if the value of the field is INCREMENT
impl R<u8, PWIDTH_A>[src]
pub fn variant(&self) -> Variant<u8, PWIDTH_A>[src]
Get enumerated values variant
pub fn is_bits8(&self) -> bool[src]
Checks if the value of the field is BITS8
pub fn is_bits16(&self) -> bool[src]
Checks if the value of the field is BITS16
pub fn is_bits32(&self) -> bool[src]
Checks if the value of the field is BITS32
impl R<u8, PRIO_A>[src]
pub fn variant(&self) -> PRIO_A[src]
Get enumerated values variant
pub fn is_low(&self) -> bool[src]
Checks if the value of the field is LOW
pub fn is_medium(&self) -> bool[src]
Checks if the value of the field is MEDIUM
pub fn is_high(&self) -> bool[src]
Checks if the value of the field is HIGH
pub fn is_very_high(&self) -> bool[src]
Checks if the value of the field is VERYHIGH
impl R<bool, M2M_A>[src]
pub fn variant(&self) -> M2M_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CH1CTL0>>[src]
pub fn chen(&self) -> CHEN_R[src]
Bit 0 - Channel enable
pub fn ftfie(&self) -> FTFIE_R[src]
Bit 1 - Enable bit for full transfer finish interrupt
pub fn htfie(&self) -> HTFIE_R[src]
Bit 2 - Enable bit for half transfer finish interrupt
pub fn taeie(&self) -> TAEIE_R[src]
Bit 3 - Enable bit for tranfer access error interrupt
pub fn dir(&self) -> DIR_R[src]
Bit 4 - Transfer mode
pub fn cmen(&self) -> CMEN_R[src]
Bit 5 - Circular mode enable
pub fn pnaga(&self) -> PNAGA_R[src]
Bit 6 - Next address generation algorithm of peripheral
pub fn mnaga(&self) -> MNAGA_R[src]
Bit 7 - Next address generation algorithm of memory
pub fn pwidth(&self) -> PWIDTH_R[src]
Bits 8:9 - Transfer data size of peripheral
pub fn mwidth(&self) -> MWIDTH_R[src]
Bits 10:11 - Transfer data size of memory
pub fn prio(&self) -> PRIO_R[src]
Bits 12:13 - Priority Level of this channel
pub fn m2m(&self) -> M2M_R[src]
Bit 14 - Memory to memory mode
impl R<u32, Reg<u32, _CH1CNT>>[src]
impl R<u32, Reg<u32, _CH1PADDR>>[src]
impl R<u32, Reg<u32, _CH1MADDR>>[src]
impl R<bool, CHEN_A>[src]
pub fn variant(&self) -> CHEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, FTFIE_A>[src]
pub fn variant(&self) -> FTFIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, HTFIE_A>[src]
pub fn variant(&self) -> HTFIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, TAEIE_A>[src]
pub fn variant(&self) -> TAEIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, DIR_A>[src]
pub fn variant(&self) -> DIR_A[src]
Get enumerated values variant
pub fn is_from_peripheral(&self) -> bool[src]
Checks if the value of the field is FROMPERIPHERAL
pub fn is_from_memory(&self) -> bool[src]
Checks if the value of the field is FROMMEMORY
impl R<bool, CMEN_A>[src]
pub fn variant(&self) -> CMEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, PNAGA_A>[src]
pub fn variant(&self) -> PNAGA_A[src]
Get enumerated values variant
pub fn is_fixed(&self) -> bool[src]
Checks if the value of the field is FIXED
pub fn is_increment(&self) -> bool[src]
Checks if the value of the field is INCREMENT
impl R<u8, PWIDTH_A>[src]
pub fn variant(&self) -> Variant<u8, PWIDTH_A>[src]
Get enumerated values variant
pub fn is_bits8(&self) -> bool[src]
Checks if the value of the field is BITS8
pub fn is_bits16(&self) -> bool[src]
Checks if the value of the field is BITS16
pub fn is_bits32(&self) -> bool[src]
Checks if the value of the field is BITS32
impl R<u8, PRIO_A>[src]
pub fn variant(&self) -> PRIO_A[src]
Get enumerated values variant
pub fn is_low(&self) -> bool[src]
Checks if the value of the field is LOW
pub fn is_medium(&self) -> bool[src]
Checks if the value of the field is MEDIUM
pub fn is_high(&self) -> bool[src]
Checks if the value of the field is HIGH
pub fn is_very_high(&self) -> bool[src]
Checks if the value of the field is VERYHIGH
impl R<bool, M2M_A>[src]
pub fn variant(&self) -> M2M_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CH2CTL0>>[src]
pub fn chen(&self) -> CHEN_R[src]
Bit 0 - Channel enable
pub fn ftfie(&self) -> FTFIE_R[src]
Bit 1 - Enable bit for full transfer finish interrupt
pub fn htfie(&self) -> HTFIE_R[src]
Bit 2 - Enable bit for half transfer finish interrupt
pub fn taeie(&self) -> TAEIE_R[src]
Bit 3 - Enable bit for tranfer access error interrupt
pub fn dir(&self) -> DIR_R[src]
Bit 4 - Transfer mode
pub fn cmen(&self) -> CMEN_R[src]
Bit 5 - Circular mode enable
pub fn pnaga(&self) -> PNAGA_R[src]
Bit 6 - Next address generation algorithm of peripheral
pub fn mnaga(&self) -> MNAGA_R[src]
Bit 7 - Next address generation algorithm of memory
pub fn pwidth(&self) -> PWIDTH_R[src]
Bits 8:9 - Transfer data size of peripheral
pub fn mwidth(&self) -> MWIDTH_R[src]
Bits 10:11 - Transfer data size of memory
pub fn prio(&self) -> PRIO_R[src]
Bits 12:13 - Priority Level of this channel
pub fn m2m(&self) -> M2M_R[src]
Bit 14 - Memory to memory mode
impl R<u32, Reg<u32, _CH2CNT>>[src]
impl R<u32, Reg<u32, _CH2PADDR>>[src]
impl R<u32, Reg<u32, _CH2MADDR>>[src]
impl R<bool, CHEN_A>[src]
pub fn variant(&self) -> CHEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, FTFIE_A>[src]
pub fn variant(&self) -> FTFIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, HTFIE_A>[src]
pub fn variant(&self) -> HTFIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, TAEIE_A>[src]
pub fn variant(&self) -> TAEIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, DIR_A>[src]
pub fn variant(&self) -> DIR_A[src]
Get enumerated values variant
pub fn is_from_peripheral(&self) -> bool[src]
Checks if the value of the field is FROMPERIPHERAL
pub fn is_from_memory(&self) -> bool[src]
Checks if the value of the field is FROMMEMORY
impl R<bool, CMEN_A>[src]
pub fn variant(&self) -> CMEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, PNAGA_A>[src]
pub fn variant(&self) -> PNAGA_A[src]
Get enumerated values variant
pub fn is_fixed(&self) -> bool[src]
Checks if the value of the field is FIXED
pub fn is_increment(&self) -> bool[src]
Checks if the value of the field is INCREMENT
impl R<u8, PWIDTH_A>[src]
pub fn variant(&self) -> Variant<u8, PWIDTH_A>[src]
Get enumerated values variant
pub fn is_bits8(&self) -> bool[src]
Checks if the value of the field is BITS8
pub fn is_bits16(&self) -> bool[src]
Checks if the value of the field is BITS16
pub fn is_bits32(&self) -> bool[src]
Checks if the value of the field is BITS32
impl R<u8, PRIO_A>[src]
pub fn variant(&self) -> PRIO_A[src]
Get enumerated values variant
pub fn is_low(&self) -> bool[src]
Checks if the value of the field is LOW
pub fn is_medium(&self) -> bool[src]
Checks if the value of the field is MEDIUM
pub fn is_high(&self) -> bool[src]
Checks if the value of the field is HIGH
pub fn is_very_high(&self) -> bool[src]
Checks if the value of the field is VERYHIGH
impl R<bool, M2M_A>[src]
pub fn variant(&self) -> M2M_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CH3CTL0>>[src]
pub fn chen(&self) -> CHEN_R[src]
Bit 0 - Channel enable
pub fn ftfie(&self) -> FTFIE_R[src]
Bit 1 - Enable bit for full transfer finish interrupt
pub fn htfie(&self) -> HTFIE_R[src]
Bit 2 - Enable bit for half transfer finish interrupt
pub fn taeie(&self) -> TAEIE_R[src]
Bit 3 - Enable bit for tranfer access error interrupt
pub fn dir(&self) -> DIR_R[src]
Bit 4 - Transfer mode
pub fn cmen(&self) -> CMEN_R[src]
Bit 5 - Circular mode enable
pub fn pnaga(&self) -> PNAGA_R[src]
Bit 6 - Next address generation algorithm of peripheral
pub fn mnaga(&self) -> MNAGA_R[src]
Bit 7 - Next address generation algorithm of memory
pub fn pwidth(&self) -> PWIDTH_R[src]
Bits 8:9 - Transfer data size of peripheral
pub fn mwidth(&self) -> MWIDTH_R[src]
Bits 10:11 - Transfer data size of memory
pub fn prio(&self) -> PRIO_R[src]
Bits 12:13 - Priority Level of this channel
pub fn m2m(&self) -> M2M_R[src]
Bit 14 - Memory to memory mode
impl R<u32, Reg<u32, _CH3CNT>>[src]
impl R<u32, Reg<u32, _CH3PADDR>>[src]
impl R<u32, Reg<u32, _CH3MADDR>>[src]
impl R<bool, CHEN_A>[src]
pub fn variant(&self) -> CHEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, FTFIE_A>[src]
pub fn variant(&self) -> FTFIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, HTFIE_A>[src]
pub fn variant(&self) -> HTFIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, TAEIE_A>[src]
pub fn variant(&self) -> TAEIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, DIR_A>[src]
pub fn variant(&self) -> DIR_A[src]
Get enumerated values variant
pub fn is_from_peripheral(&self) -> bool[src]
Checks if the value of the field is FROMPERIPHERAL
pub fn is_from_memory(&self) -> bool[src]
Checks if the value of the field is FROMMEMORY
impl R<bool, CMEN_A>[src]
pub fn variant(&self) -> CMEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, PNAGA_A>[src]
pub fn variant(&self) -> PNAGA_A[src]
Get enumerated values variant
pub fn is_fixed(&self) -> bool[src]
Checks if the value of the field is FIXED
pub fn is_increment(&self) -> bool[src]
Checks if the value of the field is INCREMENT
impl R<u8, PWIDTH_A>[src]
pub fn variant(&self) -> Variant<u8, PWIDTH_A>[src]
Get enumerated values variant
pub fn is_bits8(&self) -> bool[src]
Checks if the value of the field is BITS8
pub fn is_bits16(&self) -> bool[src]
Checks if the value of the field is BITS16
pub fn is_bits32(&self) -> bool[src]
Checks if the value of the field is BITS32
impl R<u8, PRIO_A>[src]
pub fn variant(&self) -> PRIO_A[src]
Get enumerated values variant
pub fn is_low(&self) -> bool[src]
Checks if the value of the field is LOW
pub fn is_medium(&self) -> bool[src]
Checks if the value of the field is MEDIUM
pub fn is_high(&self) -> bool[src]
Checks if the value of the field is HIGH
pub fn is_very_high(&self) -> bool[src]
Checks if the value of the field is VERYHIGH
impl R<bool, M2M_A>[src]
pub fn variant(&self) -> M2M_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CH4CTL0>>[src]
pub fn chen(&self) -> CHEN_R[src]
Bit 0 - Channel enable
pub fn ftfie(&self) -> FTFIE_R[src]
Bit 1 - Enable bit for full transfer finish interrupt
pub fn htfie(&self) -> HTFIE_R[src]
Bit 2 - Enable bit for half transfer finish interrupt
pub fn taeie(&self) -> TAEIE_R[src]
Bit 3 - Enable bit for tranfer access error interrupt
pub fn dir(&self) -> DIR_R[src]
Bit 4 - Transfer mode
pub fn cmen(&self) -> CMEN_R[src]
Bit 5 - Circular mode enable
pub fn pnaga(&self) -> PNAGA_R[src]
Bit 6 - Next address generation algorithm of peripheral
pub fn mnaga(&self) -> MNAGA_R[src]
Bit 7 - Next address generation algorithm of memory
pub fn pwidth(&self) -> PWIDTH_R[src]
Bits 8:9 - Transfer data size of peripheral
pub fn mwidth(&self) -> MWIDTH_R[src]
Bits 10:11 - Transfer data size of memory
pub fn prio(&self) -> PRIO_R[src]
Bits 12:13 - Priority Level of this channel
pub fn m2m(&self) -> M2M_R[src]
Bit 14 - Memory to memory mode
impl R<u32, Reg<u32, _CH4CNT>>[src]
impl R<u32, Reg<u32, _CH4PADDR>>[src]
impl R<u32, Reg<u32, _CH4MADDR>>[src]
impl R<bool, CHEN_A>[src]
pub fn variant(&self) -> CHEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, FTFIE_A>[src]
pub fn variant(&self) -> FTFIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, HTFIE_A>[src]
pub fn variant(&self) -> HTFIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, TAEIE_A>[src]
pub fn variant(&self) -> TAEIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, DIR_A>[src]
pub fn variant(&self) -> DIR_A[src]
Get enumerated values variant
pub fn is_from_peripheral(&self) -> bool[src]
Checks if the value of the field is FROMPERIPHERAL
pub fn is_from_memory(&self) -> bool[src]
Checks if the value of the field is FROMMEMORY
impl R<bool, CMEN_A>[src]
pub fn variant(&self) -> CMEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, PNAGA_A>[src]
pub fn variant(&self) -> PNAGA_A[src]
Get enumerated values variant
pub fn is_fixed(&self) -> bool[src]
Checks if the value of the field is FIXED
pub fn is_increment(&self) -> bool[src]
Checks if the value of the field is INCREMENT
impl R<u8, PWIDTH_A>[src]
pub fn variant(&self) -> Variant<u8, PWIDTH_A>[src]
Get enumerated values variant
pub fn is_bits8(&self) -> bool[src]
Checks if the value of the field is BITS8
pub fn is_bits16(&self) -> bool[src]
Checks if the value of the field is BITS16
pub fn is_bits32(&self) -> bool[src]
Checks if the value of the field is BITS32
impl R<u8, PRIO_A>[src]
pub fn variant(&self) -> PRIO_A[src]
Get enumerated values variant
pub fn is_low(&self) -> bool[src]
Checks if the value of the field is LOW
pub fn is_medium(&self) -> bool[src]
Checks if the value of the field is MEDIUM
pub fn is_high(&self) -> bool[src]
Checks if the value of the field is HIGH
pub fn is_very_high(&self) -> bool[src]
Checks if the value of the field is VERYHIGH
impl R<bool, M2M_A>[src]
pub fn variant(&self) -> M2M_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CH5CTL0>>[src]
pub fn chen(&self) -> CHEN_R[src]
Bit 0 - Channel enable
pub fn ftfie(&self) -> FTFIE_R[src]
Bit 1 - Enable bit for full transfer finish interrupt
pub fn htfie(&self) -> HTFIE_R[src]
Bit 2 - Enable bit for half transfer finish interrupt
pub fn taeie(&self) -> TAEIE_R[src]
Bit 3 - Enable bit for tranfer access error interrupt
pub fn dir(&self) -> DIR_R[src]
Bit 4 - Transfer mode
pub fn cmen(&self) -> CMEN_R[src]
Bit 5 - Circular mode enable
pub fn pnaga(&self) -> PNAGA_R[src]
Bit 6 - Next address generation algorithm of peripheral
pub fn mnaga(&self) -> MNAGA_R[src]
Bit 7 - Next address generation algorithm of memory
pub fn pwidth(&self) -> PWIDTH_R[src]
Bits 8:9 - Transfer data size of peripheral
pub fn mwidth(&self) -> MWIDTH_R[src]
Bits 10:11 - Transfer data size of memory
pub fn prio(&self) -> PRIO_R[src]
Bits 12:13 - Priority Level of this channel
pub fn m2m(&self) -> M2M_R[src]
Bit 14 - Memory to memory mode
impl R<u32, Reg<u32, _CH5CNT>>[src]
impl R<u32, Reg<u32, _CH5PADDR>>[src]
impl R<u32, Reg<u32, _CH5MADDR>>[src]
impl R<bool, CHEN_A>[src]
pub fn variant(&self) -> CHEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, FTFIE_A>[src]
pub fn variant(&self) -> FTFIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, HTFIE_A>[src]
pub fn variant(&self) -> HTFIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, TAEIE_A>[src]
pub fn variant(&self) -> TAEIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, DIR_A>[src]
pub fn variant(&self) -> DIR_A[src]
Get enumerated values variant
pub fn is_from_peripheral(&self) -> bool[src]
Checks if the value of the field is FROMPERIPHERAL
pub fn is_from_memory(&self) -> bool[src]
Checks if the value of the field is FROMMEMORY
impl R<bool, CMEN_A>[src]
pub fn variant(&self) -> CMEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, PNAGA_A>[src]
pub fn variant(&self) -> PNAGA_A[src]
Get enumerated values variant
pub fn is_fixed(&self) -> bool[src]
Checks if the value of the field is FIXED
pub fn is_increment(&self) -> bool[src]
Checks if the value of the field is INCREMENT
impl R<u8, PWIDTH_A>[src]
pub fn variant(&self) -> Variant<u8, PWIDTH_A>[src]
Get enumerated values variant
pub fn is_bits8(&self) -> bool[src]
Checks if the value of the field is BITS8
pub fn is_bits16(&self) -> bool[src]
Checks if the value of the field is BITS16
pub fn is_bits32(&self) -> bool[src]
Checks if the value of the field is BITS32
impl R<u8, PRIO_A>[src]
pub fn variant(&self) -> PRIO_A[src]
Get enumerated values variant
pub fn is_low(&self) -> bool[src]
Checks if the value of the field is LOW
pub fn is_medium(&self) -> bool[src]
Checks if the value of the field is MEDIUM
pub fn is_high(&self) -> bool[src]
Checks if the value of the field is HIGH
pub fn is_very_high(&self) -> bool[src]
Checks if the value of the field is VERYHIGH
impl R<bool, M2M_A>[src]
pub fn variant(&self) -> M2M_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CH6CTL0>>[src]
pub fn chen(&self) -> CHEN_R[src]
Bit 0 - Channel enable
pub fn ftfie(&self) -> FTFIE_R[src]
Bit 1 - Enable bit for full transfer finish interrupt
pub fn htfie(&self) -> HTFIE_R[src]
Bit 2 - Enable bit for full transfer finish interrupt
pub fn taeie(&self) -> TAEIE_R[src]
Bit 3 - Enable bit for tranfer access error interrupt
pub fn dir(&self) -> DIR_R[src]
Bit 4 - Transfer mode
pub fn cmen(&self) -> CMEN_R[src]
Bit 5 - Circular mode enable
pub fn pnaga(&self) -> PNAGA_R[src]
Bit 6 - Next address generation algorithm of peripheral
pub fn mnaga(&self) -> MNAGA_R[src]
Bit 7 - Next address generation algorithm of memory
pub fn pwidth(&self) -> PWIDTH_R[src]
Bits 8:9 - Transfer data size of peripheral
pub fn mwidth(&self) -> MWIDTH_R[src]
Bits 10:11 - Transfer data size of memory
pub fn prio(&self) -> PRIO_R[src]
Bits 12:13 - Priority Level of this channel
pub fn m2m(&self) -> M2M_R[src]
Bit 14 - Memory to memory mode
impl R<u32, Reg<u32, _CH6CNT>>[src]
impl R<u32, Reg<u32, _CH6PADDR>>[src]
impl R<u32, Reg<u32, _CH6MADDR>>[src]
impl R<bool, INTEN0_A>[src]
pub fn variant(&self) -> INTEN0_A[src]
Get enumerated values variant
pub fn is_masked(&self) -> bool[src]
Checks if the value of the field is MASKED
pub fn is_unmasked(&self) -> bool[src]
Checks if the value of the field is UNMASKED
impl R<u32, Reg<u32, _INTEN>>[src]
pub fn inten0(&self) -> INTEN0_R[src]
Bit 0 - Interrupt mask on line 0
pub fn inten1(&self) -> INTEN1_R[src]
Bit 1 - Interrupt mask on line 1
pub fn inten2(&self) -> INTEN2_R[src]
Bit 2 - Interrupt mask on line 2
pub fn inten3(&self) -> INTEN3_R[src]
Bit 3 - Interrupt mask on line 3
pub fn inten4(&self) -> INTEN4_R[src]
Bit 4 - Interrupt mask on line 4
pub fn inten5(&self) -> INTEN5_R[src]
Bit 5 - Interrupt mask on line 5
pub fn inten6(&self) -> INTEN6_R[src]
Bit 6 - Interrupt mask on line 6
pub fn inten7(&self) -> INTEN7_R[src]
Bit 7 - Interrupt mask on line 7
pub fn inten8(&self) -> INTEN8_R[src]
Bit 8 - Interrupt mask on line 8
pub fn inten9(&self) -> INTEN9_R[src]
Bit 9 - Interrupt mask on line 9
pub fn inten10(&self) -> INTEN10_R[src]
Bit 10 - Interrupt mask on line 10
pub fn inten11(&self) -> INTEN11_R[src]
Bit 11 - Interrupt mask on line 11
pub fn inten12(&self) -> INTEN12_R[src]
Bit 12 - Interrupt mask on line 12
pub fn inten13(&self) -> INTEN13_R[src]
Bit 13 - Interrupt mask on line 13
pub fn inten14(&self) -> INTEN14_R[src]
Bit 14 - Interrupt mask on line 14
pub fn inten15(&self) -> INTEN15_R[src]
Bit 15 - Interrupt mask on line 15
pub fn inten16(&self) -> INTEN16_R[src]
Bit 16 - Interrupt mask on line 16
pub fn inten17(&self) -> INTEN17_R[src]
Bit 17 - Interrupt mask on line 17
pub fn inten18(&self) -> INTEN18_R[src]
Bit 18 - Interrupt mask on line 18
pub fn inten19(&self) -> INTEN19_R[src]
Bit 19 - Interrupt mask on line 19
pub fn inten20(&self) -> INTEN20_R[src]
Bit 20 - Interrupt mask on line 20
pub fn inten21(&self) -> INTEN21_R[src]
Bit 21 - Interrupt mask on line 21
pub fn inten22(&self) -> INTEN22_R[src]
Bit 22 - Interrupt mask on line 22
pub fn inten23(&self) -> INTEN23_R[src]
Bit 23 - Interrupt mask on line 23
pub fn inten24(&self) -> INTEN24_R[src]
Bit 24 - Interrupt mask on line 24
pub fn inten25(&self) -> INTEN25_R[src]
Bit 25 - Interrupt mask on line 25
pub fn inten26(&self) -> INTEN26_R[src]
Bit 26 - Interrupt mask on line 26
pub fn inten27(&self) -> INTEN27_R[src]
Bit 27 - Interrupt mask on line 27
impl R<bool, EVEN0_A>[src]
pub fn variant(&self) -> EVEN0_A[src]
Get enumerated values variant
pub fn is_masked(&self) -> bool[src]
Checks if the value of the field is MASKED
pub fn is_unmasked(&self) -> bool[src]
Checks if the value of the field is UNMASKED
impl R<u32, Reg<u32, _EVEN>>[src]
pub fn even0(&self) -> EVEN0_R[src]
Bit 0 - Event enable on line 0
pub fn even1(&self) -> EVEN1_R[src]
Bit 1 - Event enable on line 1
pub fn even2(&self) -> EVEN2_R[src]
Bit 2 - Event enable on line 2
pub fn even3(&self) -> EVEN3_R[src]
Bit 3 - Event enable on line 3
pub fn even4(&self) -> EVEN4_R[src]
Bit 4 - Event enable on line 4
pub fn even5(&self) -> EVEN5_R[src]
Bit 5 - Event enable on line 5
pub fn even6(&self) -> EVEN6_R[src]
Bit 6 - Event enable on line 6
pub fn even7(&self) -> EVEN7_R[src]
Bit 7 - Event enable on line 7
pub fn even8(&self) -> EVEN8_R[src]
Bit 8 - Event enable on line 8
pub fn even9(&self) -> EVEN9_R[src]
Bit 9 - Event enable on line 9
pub fn even10(&self) -> EVEN10_R[src]
Bit 10 - Event enable on line 10
pub fn even11(&self) -> EVEN11_R[src]
Bit 11 - Event enable on line 11
pub fn even12(&self) -> EVEN12_R[src]
Bit 12 - Event enable on line 12
pub fn even13(&self) -> EVEN13_R[src]
Bit 13 - Event enable on line 13
pub fn even14(&self) -> EVEN14_R[src]
Bit 14 - Event enable on line 14
pub fn even15(&self) -> EVEN15_R[src]
Bit 15 - Event enable on line 15
pub fn even16(&self) -> EVEN16_R[src]
Bit 16 - Event enable on line 16
pub fn even17(&self) -> EVEN17_R[src]
Bit 17 - Event enable on line 17
pub fn even18(&self) -> EVEN18_R[src]
Bit 18 - Event enable on line 18
pub fn even19(&self) -> EVEN19_R[src]
Bit 19 - Event enable on line 19
pub fn even20(&self) -> EVEN20_R[src]
Bit 20 - Event enable on line 20
pub fn even21(&self) -> EVEN21_R[src]
Bit 21 - Event enable on line 21
pub fn even22(&self) -> EVEN22_R[src]
Bit 22 - Event enable on line 22
pub fn even23(&self) -> EVEN23_R[src]
Bit 23 - Event enable on line 23
pub fn even24(&self) -> EVEN24_R[src]
Bit 24 - Event enable on line 24
pub fn even25(&self) -> EVEN25_R[src]
Bit 25 - Event enable on line 25
pub fn even26(&self) -> EVEN26_R[src]
Bit 26 - Event enable on line 26
pub fn even27(&self) -> EVEN27_R[src]
Bit 27 - Event enable on line 27
impl R<bool, RTEN0_A>[src]
pub fn variant(&self) -> RTEN0_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _RTEN>>[src]
pub fn rten0(&self) -> RTEN0_R[src]
Bit 0 - Rising edge trigger enable of line 0
pub fn rten1(&self) -> RTEN1_R[src]
Bit 1 - Rising edge trigger enable of line 1
pub fn rten2(&self) -> RTEN2_R[src]
Bit 2 - Rising edge trigger enable of line 2
pub fn rten3(&self) -> RTEN3_R[src]
Bit 3 - Rising edge trigger enable of line 3
pub fn rten4(&self) -> RTEN4_R[src]
Bit 4 - Rising edge trigger enable of line 4
pub fn rten5(&self) -> RTEN5_R[src]
Bit 5 - Rising edge trigger enable of line 5
pub fn rten6(&self) -> RTEN6_R[src]
Bit 6 - Rising edge trigger enable of line 6
pub fn rten7(&self) -> RTEN7_R[src]
Bit 7 - Rising edge trigger enable of line 7
pub fn rten8(&self) -> RTEN8_R[src]
Bit 8 - Rising edge trigger enable of line 8
pub fn rten9(&self) -> RTEN9_R[src]
Bit 9 - Rising edge trigger enable of line 9
pub fn rten10(&self) -> RTEN10_R[src]
Bit 10 - Rising edge trigger enable of line 10
pub fn rten11(&self) -> RTEN11_R[src]
Bit 11 - Rising edge trigger enable of line 11
pub fn rten12(&self) -> RTEN12_R[src]
Bit 12 - Rising edge trigger enable of line 12
pub fn rten13(&self) -> RTEN13_R[src]
Bit 13 - Rising edge trigger enable of line 13
pub fn rten14(&self) -> RTEN14_R[src]
Bit 14 - Rising edge trigger enable of line 14
pub fn rten15(&self) -> RTEN15_R[src]
Bit 15 - Rising edge trigger enable of line 15
pub fn rten16(&self) -> RTEN16_R[src]
Bit 16 - Rising edge trigger enable of line 16
pub fn rten17(&self) -> RTEN17_R[src]
Bit 17 - Rising edge trigger enable of line 17
pub fn rten18(&self) -> RTEN18_R[src]
Bit 18 - Rising edge trigger enable of line 18
pub fn rten19(&self) -> RTEN19_R[src]
Bit 19 - Rising edge trigger enable of line 19
pub fn rten21(&self) -> RTEN21_R[src]
Bit 21 - Rising edge trigger enable of line 21
pub fn rten22(&self) -> RTEN22_R[src]
Bit 22 - Rising edge trigger enable of line 22
impl R<bool, FTEN0_A>[src]
pub fn variant(&self) -> FTEN0_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _FTEN>>[src]
pub fn ften0(&self) -> FTEN0_R[src]
Bit 0 - Falling edge trigger enable of line 0
pub fn ften1(&self) -> FTEN1_R[src]
Bit 1 - Falling edge trigger enable of line 1
pub fn ften2(&self) -> FTEN2_R[src]
Bit 2 - Falling edge trigger enable of line 2
pub fn ften3(&self) -> FTEN3_R[src]
Bit 3 - Falling edge trigger enable of line 3
pub fn ften4(&self) -> FTEN4_R[src]
Bit 4 - Falling edge trigger enable of line 4
pub fn ften5(&self) -> FTEN5_R[src]
Bit 5 - Falling edge trigger enable of line 5
pub fn ften6(&self) -> FTEN6_R[src]
Bit 6 - Falling edge trigger enable of line 6
pub fn ften7(&self) -> FTEN7_R[src]
Bit 7 - Falling edge trigger enable of line 7
pub fn ften8(&self) -> FTEN8_R[src]
Bit 8 - Falling edge trigger enable of line 8
pub fn ften9(&self) -> FTEN9_R[src]
Bit 9 - Falling edge trigger enable of line 9
pub fn ften10(&self) -> FTEN10_R[src]
Bit 10 - Falling edge trigger enable of line 10
pub fn ften11(&self) -> FTEN11_R[src]
Bit 11 - Falling edge trigger enable of line 11
pub fn ften12(&self) -> FTEN12_R[src]
Bit 12 - Falling edge trigger enable of line 12
pub fn ften13(&self) -> FTEN13_R[src]
Bit 13 - Falling edge trigger enable of line 13
pub fn ften14(&self) -> FTEN14_R[src]
Bit 14 - Falling edge trigger enable of line 14
pub fn ften15(&self) -> FTEN15_R[src]
Bit 15 - Falling edge trigger enable of line 15
pub fn ften16(&self) -> FTEN16_R[src]
Bit 16 - Falling edge trigger enable of line 16
pub fn ften17(&self) -> FTEN17_R[src]
Bit 17 - Falling edge trigger enable of line 17
pub fn ften18(&self) -> FTEN18_R[src]
Bit 18 - Falling edge trigger enable of line 18
pub fn ften19(&self) -> FTEN19_R[src]
Bit 19 - Falling edge trigger enable of line 19
pub fn ften21(&self) -> FTEN21_R[src]
Bit 21 - Falling edge trigger enable of line 21
pub fn ften22(&self) -> FTEN22_R[src]
Bit 22 - Falling edge trigger enable of line 22
impl R<bool, SWIEV0_A>[src]
pub fn variant(&self) -> Variant<bool, SWIEV0_A>[src]
Get enumerated values variant
pub fn is_pend(&self) -> bool[src]
Checks if the value of the field is PEND
impl R<u32, Reg<u32, _SWIEV>>[src]
pub fn swiev0(&self) -> SWIEV0_R[src]
Bit 0 - Interrupt/Event software trigger on line 0
pub fn swiev1(&self) -> SWIEV1_R[src]
Bit 1 - Interrupt/Event software trigger on line 1
pub fn swiev2(&self) -> SWIEV2_R[src]
Bit 2 - Interrupt/Event software trigger on line 2
pub fn swiev3(&self) -> SWIEV3_R[src]
Bit 3 - Interrupt/Event software trigger on line 3
pub fn swiev4(&self) -> SWIEV4_R[src]
Bit 4 - Interrupt/Event software trigger on line 4
pub fn swiev5(&self) -> SWIEV5_R[src]
Bit 5 - Interrupt/Event software trigger on line 5
pub fn swiev6(&self) -> SWIEV6_R[src]
Bit 6 - Interrupt/Event software trigger on line 6
pub fn swiev7(&self) -> SWIEV7_R[src]
Bit 7 - Interrupt/Event software trigger on line 7
pub fn swiev8(&self) -> SWIEV8_R[src]
Bit 8 - Interrupt/Event software trigger on line 8
pub fn swiev9(&self) -> SWIEV9_R[src]
Bit 9 - Interrupt/Event software trigger on line 9
pub fn swiev10(&self) -> SWIEV10_R[src]
Bit 10 - Interrupt/Event software trigger on line 10
pub fn swiev11(&self) -> SWIEV11_R[src]
Bit 11 - Interrupt/Event software trigger on line 11
pub fn swiev12(&self) -> SWIEV12_R[src]
Bit 12 - Interrupt/Event software trigger on line 12
pub fn swiev13(&self) -> SWIEV13_R[src]
Bit 13 - Interrupt/Event software trigger on line 13
pub fn swiev14(&self) -> SWIEV14_R[src]
Bit 14 - Interrupt/Event software trigger on line 14
pub fn swiev15(&self) -> SWIEV15_R[src]
Bit 15 - Interrupt/Event software trigger on line 15
pub fn swiev16(&self) -> SWIEV16_R[src]
Bit 16 - Interrupt/Event software trigger on line 16
pub fn swiev17(&self) -> SWIEV17_R[src]
Bit 17 - Interrupt/Event software trigger on line 17
pub fn swiev18(&self) -> SWIEV18_R[src]
Bit 18 - Interrupt/Event software trigger on line 18
pub fn swiev19(&self) -> SWIEV19_R[src]
Bit 19 - Interrupt/Event software trigger on line 19
pub fn swiev21(&self) -> SWIEV21_R[src]
Bit 21 - Interrupt/Event software trigger on line 21
pub fn swiev22(&self) -> SWIEV22_R[src]
Bit 22 - Interrupt/Event software trigger on line 22
impl R<bool, PD0_A>[src]
pub fn variant(&self) -> PD0_A[src]
Get enumerated values variant
pub fn is_not_pending(&self) -> bool[src]
Checks if the value of the field is NOTPENDING
pub fn is_pending(&self) -> bool[src]
Checks if the value of the field is PENDING
impl R<u32, Reg<u32, _PD>>[src]
pub fn pd0(&self) -> PD0_R[src]
Bit 0 - Interrupt pending status of line 0
pub fn pd1(&self) -> PD1_R[src]
Bit 1 - Interrupt pending status of line 1
pub fn pd2(&self) -> PD2_R[src]
Bit 2 - Interrupt pending status of line 2
pub fn pd3(&self) -> PD3_R[src]
Bit 3 - Interrupt pending status of line 3
pub fn pd4(&self) -> PD4_R[src]
Bit 4 - Interrupt pending status of line 4
pub fn pd5(&self) -> PD5_R[src]
Bit 5 - Interrupt pending status of line 5
pub fn pd6(&self) -> PD6_R[src]
Bit 6 - Interrupt pending status of line 6
pub fn pd7(&self) -> PD7_R[src]
Bit 7 - Interrupt pending status of line 7
pub fn pd8(&self) -> PD8_R[src]
Bit 8 - Interrupt pending status of line 8
pub fn pd9(&self) -> PD9_R[src]
Bit 9 - Interrupt pending status of line 9
pub fn pd10(&self) -> PD10_R[src]
Bit 10 - Interrupt pending status of line 10
pub fn pd11(&self) -> PD11_R[src]
Bit 11 - Interrupt pending status of line 11
pub fn pd12(&self) -> PD12_R[src]
Bit 12 - Interrupt pending status of line 12
pub fn pd13(&self) -> PD13_R[src]
Bit 13 - Interrupt pending status of line 13
pub fn pd14(&self) -> PD14_R[src]
Bit 14 - Interrupt pending status of line 14
pub fn pd15(&self) -> PD15_R[src]
Bit 15 - Interrupt pending status of line 15
pub fn pd16(&self) -> PD16_R[src]
Bit 16 - Interrupt pending status of line 16
pub fn pd17(&self) -> PD17_R[src]
Bit 17 - Interrupt pending status of line 17
pub fn pd18(&self) -> PD18_R[src]
Bit 18 - Interrupt pending status of line 18
pub fn pd19(&self) -> PD19_R[src]
Bit 19 - Interrupt pending status of line 19
pub fn pd21(&self) -> PD21_R[src]
Bit 21 - Interrupt pending status of line 21
pub fn pd22(&self) -> PD22_R[src]
Bit 22 - Interrupt pending status of line 22
impl R<u8, WSCNT_A>[src]
pub fn variant(&self) -> Variant<u8, WSCNT_A>[src]
Get enumerated values variant
pub fn is_ws0(&self) -> bool[src]
Checks if the value of the field is WS0
pub fn is_ws1(&self) -> bool[src]
Checks if the value of the field is WS1
pub fn is_ws2(&self) -> bool[src]
Checks if the value of the field is WS2
impl R<u32, Reg<u32, _WS>>[src]
impl R<bool, ENDF_A>[src]
pub fn variant(&self) -> ENDF_A[src]
Get enumerated values variant
pub fn is_no_event(&self) -> bool[src]
Checks if the value of the field is NOEVENT
pub fn is_event(&self) -> bool[src]
Checks if the value of the field is EVENT
impl R<bool, WPERR_A>[src]
pub fn variant(&self) -> WPERR_A[src]
Get enumerated values variant
pub fn is_no_error(&self) -> bool[src]
Checks if the value of the field is NOERROR
pub fn is_error(&self) -> bool[src]
Checks if the value of the field is ERROR
impl R<bool, PGERR_A>[src]
pub fn variant(&self) -> PGERR_A[src]
Get enumerated values variant
pub fn is_no_error(&self) -> bool[src]
Checks if the value of the field is NOERROR
pub fn is_error(&self) -> bool[src]
Checks if the value of the field is ERROR
impl R<bool, BUSY_A>[src]
pub fn variant(&self) -> BUSY_A[src]
Get enumerated values variant
pub fn is_inactive(&self) -> bool[src]
Checks if the value of the field is INACTIVE
pub fn is_active(&self) -> bool[src]
Checks if the value of the field is ACTIVE
impl R<u32, Reg<u32, _STAT>>[src]
pub fn endf(&self) -> ENDF_R[src]
Bit 5 - End of operation flag bit
pub fn wperr(&self) -> WPERR_R[src]
Bit 4 - Erase/Program protection error flag bit
pub fn pgerr(&self) -> PGERR_R[src]
Bit 2 - Program error flag bit
pub fn busy(&self) -> BUSY_R[src]
Bit 0 - The flash busy bit
impl R<bool, OBRLD_A>[src]
pub fn variant(&self) -> Variant<bool, OBRLD_A>[src]
Get enumerated values variant
pub fn is_reload(&self) -> bool[src]
Checks if the value of the field is RELOAD
impl R<bool, ENDIE_A>[src]
pub fn variant(&self) -> ENDIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, ERRIE_A>[src]
pub fn variant(&self) -> ERRIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, OBWEN_A>[src]
pub fn variant(&self) -> OBWEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, LK_A>[src]
pub fn variant(&self) -> LK_A[src]
Get enumerated values variant
pub fn is_unlocked(&self) -> bool[src]
Checks if the value of the field is UNLOCKED
pub fn is_locked(&self) -> bool[src]
Checks if the value of the field is LOCKED
impl R<bool, START_A>[src]
pub fn variant(&self) -> Variant<bool, START_A>[src]
Get enumerated values variant
pub fn is_start(&self) -> bool[src]
Checks if the value of the field is START
impl R<bool, OBER_A>[src]
pub fn variant(&self) -> Variant<bool, OBER_A>[src]
Get enumerated values variant
pub fn is_option_byte_erase(&self) -> bool[src]
Checks if the value of the field is OPTIONBYTEERASE
impl R<bool, OBPG_A>[src]
pub fn variant(&self) -> Variant<bool, OBPG_A>[src]
Get enumerated values variant
pub fn is_option_byte_programming(&self) -> bool[src]
Checks if the value of the field is OPTIONBYTEPROGRAMMING
impl R<bool, MER_A>[src]
pub fn variant(&self) -> Variant<bool, MER_A>[src]
Get enumerated values variant
pub fn is_mass_erase(&self) -> bool[src]
Checks if the value of the field is MASSERASE
impl R<bool, PER_A>[src]
pub fn variant(&self) -> Variant<bool, PER_A>[src]
Get enumerated values variant
pub fn is_page_erase(&self) -> bool[src]
Checks if the value of the field is PAGEERASE
impl R<bool, PG_A>[src]
pub fn variant(&self) -> Variant<bool, PG_A>[src]
Get enumerated values variant
pub fn is_program(&self) -> bool[src]
Checks if the value of the field is PROGRAM
impl R<u32, Reg<u32, _CTL>>[src]
pub fn obrld(&self) -> OBRLD_R[src]
Bit 13 - Option byte reload bit
pub fn endie(&self) -> ENDIE_R[src]
Bit 12 - End of operation interrupt enable
pub fn errie(&self) -> ERRIE_R[src]
Bit 10 - Error interrupt enable
pub fn obwen(&self) -> OBWEN_R[src]
Bit 9 - Option byte erase/program enable bit
pub fn lk(&self) -> LK_R[src]
Bit 7 - FMC_CTL lock bit
pub fn start(&self) -> START_R[src]
Bit 6 - Send erase command to FMC bit
pub fn ober(&self) -> OBER_R[src]
Bit 5 - Option byte erase command bit
pub fn obpg(&self) -> OBPG_R[src]
Bit 4 - Option byte program command bit
pub fn mer(&self) -> MER_R[src]
Bit 2 - Main flash mass erase command bit
pub fn per(&self) -> PER_R[src]
Bit 1 - Main flash page erase command bit
pub fn pg(&self) -> PG_R[src]
Bit 0 - Main flash page program command bit
impl R<u32, Reg<u32, _ADDR>>[src]
impl R<u8, PLEVEL_A>[src]
pub fn variant(&self) -> Variant<u8, PLEVEL_A>[src]
Get enumerated values variant
pub fn is_none(&self) -> bool[src]
Checks if the value of the field is NONE
pub fn is_low(&self) -> bool[src]
Checks if the value of the field is LOW
pub fn is_high(&self) -> bool[src]
Checks if the value of the field is HIGH
impl R<bool, OBERR_A>[src]
pub fn variant(&self) -> OBERR_A[src]
Get enumerated values variant
pub fn is_no_error(&self) -> bool[src]
Checks if the value of the field is NOERROR
pub fn is_error(&self) -> bool[src]
Checks if the value of the field is ERROR
impl R<u32, Reg<u32, _OBSTAT>>[src]
pub fn ob_data(&self) -> OB_DATA_R[src]
Bits 16:31 - Store OB_DATA[15:0] of option byte block after system reset
pub fn ob_user(&self) -> OB_USER_R[src]
Bits 8:15 - Store OB_USER byte of option byte block after system reset
pub fn plevel(&self) -> PLEVEL_R[src]
Bits 1:2 - Security Protection level
pub fn oberr(&self) -> OBERR_R[src]
Bit 0 - Option byte read error
impl R<u32, Reg<u32, _WP>>[src]
pub fn ob_wp(&self) -> OB_WP_R[src]
Bits 0:15 - Store OB_WP[15:0] of option byte block after system reset
impl R<bool, WSEN_A>[src]
pub fn variant(&self) -> WSEN_A[src]
Get enumerated values variant
pub fn is_no_wait_state(&self) -> bool[src]
Checks if the value of the field is NOWAITSTATE
pub fn is_wait_state(&self) -> bool[src]
Checks if the value of the field is WAITSTATE
impl R<u32, Reg<u32, _WSEN>>[src]
pub fn wsen(&self) -> WSEN_R[src]
Bit 0 - FMC wait state enable register
pub fn bpen(&self) -> BPEN_R[src]
Bit 1 - FMC bit program enable register
impl R<u32, Reg<u32, _PID>>[src]
impl R<u8, PSC_A>[src]
pub fn variant(&self) -> PSC_A[src]
Get enumerated values variant
pub fn is_divide_by4(&self) -> bool[src]
Checks if the value of the field is DIVIDEBY4
pub fn is_divide_by8(&self) -> bool[src]
Checks if the value of the field is DIVIDEBY8
pub fn is_divide_by16(&self) -> bool[src]
Checks if the value of the field is DIVIDEBY16
pub fn is_divide_by32(&self) -> bool[src]
Checks if the value of the field is DIVIDEBY32
pub fn is_divide_by64(&self) -> bool[src]
Checks if the value of the field is DIVIDEBY64
pub fn is_divide_by128(&self) -> bool[src]
Checks if the value of the field is DIVIDEBY128
pub fn is_divide_by256(&self) -> bool[src]
Checks if the value of the field is DIVIDEBY256
pub fn is_divide_by256bis(&self) -> bool[src]
Checks if the value of the field is DIVIDEBY256BIS
impl R<u32, Reg<u32, _PSC>>[src]
impl R<u32, Reg<u32, _RLD>>[src]
impl R<bool, PUD_A>[src]
pub fn variant(&self) -> PUD_A[src]
Get enumerated values variant
pub fn is_valid(&self) -> bool[src]
Checks if the value of the field is VALID
pub fn is_ongoing(&self) -> bool[src]
Checks if the value of the field is ONGOING
impl R<bool, RUD_A>[src]
pub fn variant(&self) -> RUD_A[src]
Get enumerated values variant
pub fn is_valid(&self) -> bool[src]
Checks if the value of the field is VALID
pub fn is_ongoing(&self) -> bool[src]
Checks if the value of the field is ONGOING
impl R<bool, WUD_A>[src]
pub fn variant(&self) -> WUD_A[src]
Get enumerated values variant
pub fn is_valid(&self) -> bool[src]
Checks if the value of the field is VALID
pub fn is_ongoing(&self) -> bool[src]
Checks if the value of the field is ONGOING
impl R<u32, Reg<u32, _STAT>>[src]
pub fn pud(&self) -> PUD_R[src]
Bit 0 - Free watchdog timer prescaler value update
pub fn rud(&self) -> RUD_R[src]
Bit 1 - Free watchdog timer counter reload value update
pub fn wud(&self) -> WUD_R[src]
Bit 2 - Watchdog counter window value update
impl R<u32, Reg<u32, _WND>>[src]
impl R<u8, CTL15_A>[src]
pub fn variant(&self) -> CTL15_A[src]
Get enumerated values variant
pub fn is_input(&self) -> bool[src]
Checks if the value of the field is INPUT
pub fn is_output(&self) -> bool[src]
Checks if the value of the field is OUTPUT
pub fn is_alternate(&self) -> bool[src]
Checks if the value of the field is ALTERNATE
pub fn is_analog(&self) -> bool[src]
Checks if the value of the field is ANALOG
impl R<u32, Reg<u32, _CTL>>[src]
pub fn ctl15(&self) -> CTL15_R[src]
Bits 30:31 - Pin 15 configuration bits
pub fn ctl14(&self) -> CTL14_R[src]
Bits 28:29 - Pin 14 configuration bits
pub fn ctl13(&self) -> CTL13_R[src]
Bits 26:27 - Pin 13 configuration bits
pub fn ctl12(&self) -> CTL12_R[src]
Bits 24:25 - Pin 12 configuration bits
pub fn ctl11(&self) -> CTL11_R[src]
Bits 22:23 - Pin 11 configuration bits
pub fn ctl10(&self) -> CTL10_R[src]
Bits 20:21 - Pin 10 configuration bits
pub fn ctl9(&self) -> CTL9_R[src]
Bits 18:19 - Pin 9 configuration bits
pub fn ctl8(&self) -> CTL8_R[src]
Bits 16:17 - Pin 8 configuration bits
pub fn ctl7(&self) -> CTL7_R[src]
Bits 14:15 - Pin 7 configuration bits
pub fn ctl6(&self) -> CTL6_R[src]
Bits 12:13 - Pin 6 configuration bits
pub fn ctl5(&self) -> CTL5_R[src]
Bits 10:11 - Pin 5 configuration bits
pub fn ctl4(&self) -> CTL4_R[src]
Bits 8:9 - Pin 4 configuration bits
pub fn ctl3(&self) -> CTL3_R[src]
Bits 6:7 - Pin 3 configuration bits
pub fn ctl2(&self) -> CTL2_R[src]
Bits 4:5 - Pin 2 configuration bits
pub fn ctl1(&self) -> CTL1_R[src]
Bits 2:3 - Pin 1 configuration bits
pub fn ctl0(&self) -> CTL0_R[src]
Bits 0:1 - Pin 0 configuration bits
impl R<bool, OM15_A>[src]
pub fn variant(&self) -> OM15_A[src]
Get enumerated values variant
pub fn is_push_pull(&self) -> bool[src]
Checks if the value of the field is PUSHPULL
pub fn is_open_drain(&self) -> bool[src]
Checks if the value of the field is OPENDRAIN
impl R<u32, Reg<u32, _OMODE>>[src]
pub fn om15(&self) -> OM15_R[src]
Bit 15 - Pin 15 output mode
pub fn om14(&self) -> OM14_R[src]
Bit 14 - Pin 14 output mode
pub fn om13(&self) -> OM13_R[src]
Bit 13 - Pin 13 output mode
pub fn om12(&self) -> OM12_R[src]
Bit 12 - Pin 12 output mode
pub fn om11(&self) -> OM11_R[src]
Bit 11 - Pin 11 output mode
pub fn om10(&self) -> OM10_R[src]
Bit 10 - Pin 10 output mode
pub fn om9(&self) -> OM9_R[src]
Bit 9 - Pin 9 output mode
pub fn om8(&self) -> OM8_R[src]
Bit 8 - Pin 8 output mode
pub fn om7(&self) -> OM7_R[src]
Bit 7 - Pin 7 output mode
pub fn om6(&self) -> OM6_R[src]
Bit 6 - Pin 6 output mode
pub fn om5(&self) -> OM5_R[src]
Bit 5 - Pin 5 output mode
pub fn om4(&self) -> OM4_R[src]
Bit 4 - Pin 4 output mode
pub fn om3(&self) -> OM3_R[src]
Bit 3 - Pin 3 output mode
pub fn om2(&self) -> OM2_R[src]
Bit 2 - Pin 2 output mode
pub fn om1(&self) -> OM1_R[src]
Bit 1 - Pin 1 output mode
pub fn om0(&self) -> OM0_R[src]
Bit 0 - Pin 0 output mode
impl R<u8, OSPD15_A>[src]
pub fn variant(&self) -> Variant<u8, OSPD15_A>[src]
Get enumerated values variant
pub fn is_speed2m(&self) -> bool[src]
Checks if the value of the field is SPEED2M
pub fn is_speed10m(&self) -> bool[src]
Checks if the value of the field is SPEED10M
pub fn is_speed50m(&self) -> bool[src]
Checks if the value of the field is SPEED50M
impl R<u32, Reg<u32, _OSPD>>[src]
pub fn ospd15(&self) -> OSPD15_R[src]
Bits 30:31 - Pin 15 output max speed bits
pub fn ospd14(&self) -> OSPD14_R[src]
Bits 28:29 - Pin 14 output max speed bits
pub fn ospd13(&self) -> OSPD13_R[src]
Bits 26:27 - Pin 13 output max speed bits
pub fn ospd12(&self) -> OSPD12_R[src]
Bits 24:25 - Pin 12 output max speed bits
pub fn ospd11(&self) -> OSPD11_R[src]
Bits 22:23 - Pin 11 output max speed bits
pub fn ospd10(&self) -> OSPD10_R[src]
Bits 20:21 - Pin 10 output max speed bits
pub fn ospd9(&self) -> OSPD9_R[src]
Bits 18:19 - Pin 9 output max speed bits
pub fn ospd8(&self) -> OSPD8_R[src]
Bits 16:17 - Pin 8 output max speed bits
pub fn ospd7(&self) -> OSPD7_R[src]
Bits 14:15 - Pin 7 output max speed bits
pub fn ospd6(&self) -> OSPD6_R[src]
Bits 12:13 - Pin 6 output max speed bits
pub fn ospd5(&self) -> OSPD5_R[src]
Bits 10:11 - Pin 5 output max speed bits
pub fn ospd4(&self) -> OSPD4_R[src]
Bits 8:9 - Pin 4 output max speed bits
pub fn ospd3(&self) -> OSPD3_R[src]
Bits 6:7 - Pin 3 output max speed bits
pub fn ospd2(&self) -> OSPD2_R[src]
Bits 4:5 - Pin 2 output max speed bits
pub fn ospd1(&self) -> OSPD1_R[src]
Bits 2:3 - Pin 1 output max speed bits
pub fn ospd0(&self) -> OSPD0_R[src]
Bits 0:1 - Pin 0 output max speed bits
impl R<u8, PUD15_A>[src]
pub fn variant(&self) -> Variant<u8, PUD15_A>[src]
Get enumerated values variant
pub fn is_floating(&self) -> bool[src]
Checks if the value of the field is FLOATING
pub fn is_pull_up(&self) -> bool[src]
Checks if the value of the field is PULLUP
pub fn is_pull_down(&self) -> bool[src]
Checks if the value of the field is PULLDOWN
impl R<u32, Reg<u32, _PUD>>[src]
pub fn pud15(&self) -> PUD15_R[src]
Bits 30:31 - Pin 15 pull-up or pull-down bits
pub fn pud14(&self) -> PUD14_R[src]
Bits 28:29 - Pin 14 pull-up or pull-down bits
pub fn pud13(&self) -> PUD13_R[src]
Bits 26:27 - Pin 13 pull-up or pull-down bits
pub fn pud12(&self) -> PUD12_R[src]
Bits 24:25 - Pin 12 pull-up or pull-down bits
pub fn pud11(&self) -> PUD11_R[src]
Bits 22:23 - Pin 11 pull-up or pull-down bits
pub fn pud10(&self) -> PUD10_R[src]
Bits 20:21 - Pin 10 pull-up or pull-down bits
pub fn pud9(&self) -> PUD9_R[src]
Bits 18:19 - Pin 9 pull-up or pull-down bits
pub fn pud8(&self) -> PUD8_R[src]
Bits 16:17 - Pin 8 pull-up or pull-down bits
pub fn pud7(&self) -> PUD7_R[src]
Bits 14:15 - Pin 7 pull-up or pull-down bits
pub fn pud6(&self) -> PUD6_R[src]
Bits 12:13 - Pin 6 pull-up or pull-down bits
pub fn pud5(&self) -> PUD5_R[src]
Bits 10:11 - Pin 5 pull-up or pull-down bits
pub fn pud4(&self) -> PUD4_R[src]
Bits 8:9 - Pin 4 pull-up or pull-down bits
pub fn pud3(&self) -> PUD3_R[src]
Bits 6:7 - Pin 3 pull-up or pull-down bits
pub fn pud2(&self) -> PUD2_R[src]
Bits 4:5 - Pin 2 pull-up or pull-down bits
pub fn pud1(&self) -> PUD1_R[src]
Bits 2:3 - Pin 1 pull-up or pull-down bits
pub fn pud0(&self) -> PUD0_R[src]
Bits 0:1 - Pin 0 pull-up or pull-down bits
impl R<bool, ISTAT15_A>[src]
pub fn variant(&self) -> ISTAT15_A[src]
Get enumerated values variant
pub fn is_low(&self) -> bool[src]
Checks if the value of the field is LOW
pub fn is_high(&self) -> bool[src]
Checks if the value of the field is HIGH
impl R<u32, Reg<u32, _ISTAT>>[src]
pub fn istat15(&self) -> ISTAT15_R[src]
Bit 15 - Port input data 14
pub fn istat14(&self) -> ISTAT14_R[src]
Bit 14 - Port input data 14
pub fn istat13(&self) -> ISTAT13_R[src]
Bit 13 - Port input data 13
pub fn istat12(&self) -> ISTAT12_R[src]
Bit 12 - Port input data 12
pub fn istat11(&self) -> ISTAT11_R[src]
Bit 11 - Port input data 11
pub fn istat10(&self) -> ISTAT10_R[src]
Bit 10 - Port input data 10
pub fn istat9(&self) -> ISTAT9_R[src]
Bit 9 - Port input data 9
pub fn istat8(&self) -> ISTAT8_R[src]
Bit 8 - Port input data 8
pub fn istat7(&self) -> ISTAT7_R[src]
Bit 7 - Port input data 7
pub fn istat6(&self) -> ISTAT6_R[src]
Bit 6 - Port input data 6
pub fn istat5(&self) -> ISTAT5_R[src]
Bit 5 - Port input data 5
pub fn istat4(&self) -> ISTAT4_R[src]
Bit 4 - Port input data 4
pub fn istat3(&self) -> ISTAT3_R[src]
Bit 3 - Port input data 3
pub fn istat2(&self) -> ISTAT2_R[src]
Bit 2 - Port input data 2
pub fn istat1(&self) -> ISTAT1_R[src]
Bit 1 - Port input data 1
pub fn istat0(&self) -> ISTAT0_R[src]
Bit 0 - Port input data 0
impl R<bool, OCTL15_A>[src]
pub fn variant(&self) -> OCTL15_A[src]
Get enumerated values variant
pub fn is_low(&self) -> bool[src]
Checks if the value of the field is LOW
pub fn is_high(&self) -> bool[src]
Checks if the value of the field is HIGH
impl R<u32, Reg<u32, _OCTL>>[src]
pub fn octl15(&self) -> OCTL15_R[src]
Bit 15 - Port output data 15
pub fn octl14(&self) -> OCTL14_R[src]
Bit 14 - Port output data 14
pub fn octl13(&self) -> OCTL13_R[src]
Bit 13 - Port output data 13
pub fn octl12(&self) -> OCTL12_R[src]
Bit 12 - Port output data 12
pub fn octl11(&self) -> OCTL11_R[src]
Bit 11 - Port output data 11
pub fn octl10(&self) -> OCTL10_R[src]
Bit 10 - Port output data 10
pub fn octl9(&self) -> OCTL9_R[src]
Bit 9 - Port output data 9
pub fn octl8(&self) -> OCTL8_R[src]
Bit 8 - Port output data 8
pub fn octl7(&self) -> OCTL7_R[src]
Bit 7 - Port output data 7
pub fn octl6(&self) -> OCTL6_R[src]
Bit 6 - Port output data 6
pub fn octl5(&self) -> OCTL5_R[src]
Bit 5 - Port output data 5
pub fn octl4(&self) -> OCTL4_R[src]
Bit 4 - Port output data 4
pub fn octl3(&self) -> OCTL3_R[src]
Bit 3 - Port output data 3
pub fn octl2(&self) -> OCTL2_R[src]
Bit 2 - Port output data 2
pub fn octl1(&self) -> OCTL1_R[src]
Bit 1 - Port output data 1
pub fn octl0(&self) -> OCTL0_R[src]
Bit 0 - Port output data 0
impl R<bool, LKK_A>[src]
pub fn variant(&self) -> LKK_A[src]
Get enumerated values variant
pub fn is_not_active(&self) -> bool[src]
Checks if the value of the field is NOTACTIVE
pub fn is_active(&self) -> bool[src]
Checks if the value of the field is ACTIVE
impl R<bool, LK15_A>[src]
pub fn variant(&self) -> LK15_A[src]
Get enumerated values variant
pub fn is_unlocked(&self) -> bool[src]
Checks if the value of the field is UNLOCKED
pub fn is_locked(&self) -> bool[src]
Checks if the value of the field is LOCKED
impl R<bool, LK9_A>[src]
pub fn variant(&self) -> LK9_A[src]
Get enumerated values variant
pub fn is_unlocked(&self) -> bool[src]
Checks if the value of the field is UNLOCKED
pub fn is_locked(&self) -> bool[src]
Checks if the value of the field is LOCKED
impl R<u32, Reg<u32, _LOCK>>[src]
pub fn lkk(&self) -> LKK_R[src]
Bit 16 - Lock key
pub fn lk15(&self) -> LK15_R[src]
Bit 15 - Port lock bit 15
pub fn lk14(&self) -> LK14_R[src]
Bit 14 - Port lock bit 14
pub fn lk13(&self) -> LK13_R[src]
Bit 13 - Port lock bit 13
pub fn lk12(&self) -> LK12_R[src]
Bit 12 - Port lock bit 12
pub fn lk11(&self) -> LK11_R[src]
Bit 11 - Port lock bit 11
pub fn lk10(&self) -> LK10_R[src]
Bit 10 - Port lock bit 10
pub fn lk9(&self) -> LK9_R[src]
Bit 9 - Port lock bit 9
pub fn lk8(&self) -> LK8_R[src]
Bit 8 - Port lock bit 8
pub fn lk7(&self) -> LK7_R[src]
Bit 7 - Port lock bit 7
pub fn lk6(&self) -> LK6_R[src]
Bit 6 - Port lock bit 6
pub fn lk5(&self) -> LK5_R[src]
Bit 5 - Port lock bit 5
pub fn lk4(&self) -> LK4_R[src]
Bit 4 - Port lock bit 4
pub fn lk3(&self) -> LK3_R[src]
Bit 3 - Port lock bit 3
pub fn lk2(&self) -> LK2_R[src]
Bit 2 - Port lock bit 2
pub fn lk1(&self) -> LK1_R[src]
Bit 1 - Port lock bit 1
pub fn lk0(&self) -> LK0_R[src]
Bit 0 - Port lock bit 0
impl R<u8, SEL7_A>[src]
pub fn variant(&self) -> Variant<u8, SEL7_A>[src]
Get enumerated values variant
pub fn is_af0(&self) -> bool[src]
Checks if the value of the field is AF0
pub fn is_af1(&self) -> bool[src]
Checks if the value of the field is AF1
pub fn is_af2(&self) -> bool[src]
Checks if the value of the field is AF2
pub fn is_af3(&self) -> bool[src]
Checks if the value of the field is AF3
pub fn is_af4(&self) -> bool[src]
Checks if the value of the field is AF4
pub fn is_af5(&self) -> bool[src]
Checks if the value of the field is AF5
pub fn is_af6(&self) -> bool[src]
Checks if the value of the field is AF6
pub fn is_af7(&self) -> bool[src]
Checks if the value of the field is AF7
pub fn is_af9(&self) -> bool[src]
Checks if the value of the field is AF9
pub fn is_af11(&self) -> bool[src]
Checks if the value of the field is AF11
impl R<u32, Reg<u32, _AFSEL0>>[src]
pub fn sel7(&self) -> SEL7_R[src]
Bits 28:31 - Pin 7 alternate function selected
pub fn sel6(&self) -> SEL6_R[src]
Bits 24:27 - Pin 6 alternate function selected
pub fn sel5(&self) -> SEL5_R[src]
Bits 20:23 - Pin 5 alternate function selected
pub fn sel4(&self) -> SEL4_R[src]
Bits 16:19 - Pin 4 alternate function selected
pub fn sel3(&self) -> SEL3_R[src]
Bits 12:15 - Pin 3 alternate function selected
pub fn sel2(&self) -> SEL2_R[src]
Bits 8:11 - Pin 2 alternate function selected
pub fn sel1(&self) -> SEL1_R[src]
Bits 4:7 - Pin 1 alternate function selected
pub fn sel0(&self) -> SEL0_R[src]
Bits 0:3 - Pin 0 alternate function selected
impl R<u8, SEL15_A>[src]
pub fn variant(&self) -> Variant<u8, SEL15_A>[src]
Get enumerated values variant
pub fn is_af0(&self) -> bool[src]
Checks if the value of the field is AF0
pub fn is_af1(&self) -> bool[src]
Checks if the value of the field is AF1
pub fn is_af2(&self) -> bool[src]
Checks if the value of the field is AF2
pub fn is_af3(&self) -> bool[src]
Checks if the value of the field is AF3
pub fn is_af4(&self) -> bool[src]
Checks if the value of the field is AF4
pub fn is_af5(&self) -> bool[src]
Checks if the value of the field is AF5
pub fn is_af6(&self) -> bool[src]
Checks if the value of the field is AF6
pub fn is_af7(&self) -> bool[src]
Checks if the value of the field is AF7
pub fn is_af9(&self) -> bool[src]
Checks if the value of the field is AF9
pub fn is_af11(&self) -> bool[src]
Checks if the value of the field is AF11
impl R<u32, Reg<u32, _AFSEL1>>[src]
pub fn sel15(&self) -> SEL15_R[src]
Bits 28:31 - Pin 15 alternate function selected
pub fn sel14(&self) -> SEL14_R[src]
Bits 24:27 - Pin 14 alternate function selected
pub fn sel13(&self) -> SEL13_R[src]
Bits 20:23 - Pin 13 alternate function selected
pub fn sel12(&self) -> SEL12_R[src]
Bits 16:19 - Pin 12 alternate function selected
pub fn sel11(&self) -> SEL11_R[src]
Bits 12:15 - Pin 11 alternate function selected
pub fn sel10(&self) -> SEL10_R[src]
Bits 8:11 - Pin 10 alternate function selected
pub fn sel9(&self) -> SEL9_R[src]
Bits 4:7 - Pin 9 alternate function selected
pub fn sel8(&self) -> SEL8_R[src]
Bits 0:3 - Pin 8 alternate function selected
impl R<u8, CTL15_A>[src]
pub fn variant(&self) -> CTL15_A[src]
Get enumerated values variant
pub fn is_input(&self) -> bool[src]
Checks if the value of the field is INPUT
pub fn is_output(&self) -> bool[src]
Checks if the value of the field is OUTPUT
pub fn is_alternate(&self) -> bool[src]
Checks if the value of the field is ALTERNATE
pub fn is_analog(&self) -> bool[src]
Checks if the value of the field is ANALOG
impl R<u32, Reg<u32, _CTL>>[src]
pub fn ctl15(&self) -> CTL15_R[src]
Bits 30:31 - Pin 15 configuration bits
pub fn ctl14(&self) -> CTL14_R[src]
Bits 28:29 - Pin 14 configuration bits
pub fn ctl13(&self) -> CTL13_R[src]
Bits 26:27 - Pin 13 configuration bits
pub fn ctl12(&self) -> CTL12_R[src]
Bits 24:25 - Pin 12 configuration bits
pub fn ctl11(&self) -> CTL11_R[src]
Bits 22:23 - Pin 11 configuration bits
pub fn ctl10(&self) -> CTL10_R[src]
Bits 20:21 - Pin 10 configuration bits
pub fn ctl9(&self) -> CTL9_R[src]
Bits 18:19 - Pin 9 configuration bits
pub fn ctl8(&self) -> CTL8_R[src]
Bits 16:17 - Pin 8 configuration bits
pub fn ctl7(&self) -> CTL7_R[src]
Bits 14:15 - Pin 7 configuration bits
pub fn ctl6(&self) -> CTL6_R[src]
Bits 12:13 - Pin 6 configuration bits
pub fn ctl5(&self) -> CTL5_R[src]
Bits 10:11 - Pin 5 configuration bits
pub fn ctl4(&self) -> CTL4_R[src]
Bits 8:9 - Pin 4 configuration bits
pub fn ctl3(&self) -> CTL3_R[src]
Bits 6:7 - Pin 3 configuration bits
pub fn ctl2(&self) -> CTL2_R[src]
Bits 4:5 - Pin 2 configuration bits
pub fn ctl1(&self) -> CTL1_R[src]
Bits 2:3 - Pin 1 configuration bits
pub fn ctl0(&self) -> CTL0_R[src]
Bits 0:1 - Pin 0 configuration bits
impl R<bool, OM15_A>[src]
pub fn variant(&self) -> OM15_A[src]
Get enumerated values variant
pub fn is_push_pull(&self) -> bool[src]
Checks if the value of the field is PUSHPULL
pub fn is_open_drain(&self) -> bool[src]
Checks if the value of the field is OPENDRAIN
impl R<u32, Reg<u32, _OMODE>>[src]
pub fn om15(&self) -> OM15_R[src]
Bit 15 - Pin 15 output mode
pub fn om14(&self) -> OM14_R[src]
Bit 14 - Pin 14 output mode
pub fn om13(&self) -> OM13_R[src]
Bit 13 - Pin 13 output mode
pub fn om12(&self) -> OM12_R[src]
Bit 12 - Pin 12 output mode
pub fn om11(&self) -> OM11_R[src]
Bit 11 - Pin 11 output mode
pub fn om10(&self) -> OM10_R[src]
Bit 10 - Pin 10 output mode
pub fn om9(&self) -> OM9_R[src]
Bit 9 - Pin 9 output mode
pub fn om8(&self) -> OM8_R[src]
Bit 8 - Pin 8 output mode
pub fn om7(&self) -> OM7_R[src]
Bit 7 - Pin 7 output mode
pub fn om6(&self) -> OM6_R[src]
Bit 6 - Pin 6 output mode
pub fn om5(&self) -> OM5_R[src]
Bit 5 - Pin 5 output mode
pub fn om4(&self) -> OM4_R[src]
Bit 4 - Pin 4 output mode
pub fn om3(&self) -> OM3_R[src]
Bit 3 - Pin 3 output mode
pub fn om2(&self) -> OM2_R[src]
Bit 2 - Pin 2 output mode
pub fn om1(&self) -> OM1_R[src]
Bit 1 - Pin 1 output mode
pub fn om0(&self) -> OM0_R[src]
Bit 0 - Pin 0 output mode
impl R<u8, OSPD15_A>[src]
pub fn variant(&self) -> Variant<u8, OSPD15_A>[src]
Get enumerated values variant
pub fn is_speed2m(&self) -> bool[src]
Checks if the value of the field is SPEED2M
pub fn is_speed10m(&self) -> bool[src]
Checks if the value of the field is SPEED10M
pub fn is_speed50m(&self) -> bool[src]
Checks if the value of the field is SPEED50M
impl R<u32, Reg<u32, _OSPD>>[src]
pub fn ospd15(&self) -> OSPD15_R[src]
Bits 30:31 - Pin 15 output max speed bits
pub fn ospd14(&self) -> OSPD14_R[src]
Bits 28:29 - Pin 14 output max speed bits
pub fn ospd13(&self) -> OSPD13_R[src]
Bits 26:27 - Pin 13 output max speed bits
pub fn ospd12(&self) -> OSPD12_R[src]
Bits 24:25 - Pin 12 output max speed bits
pub fn ospd11(&self) -> OSPD11_R[src]
Bits 22:23 - Pin 11 output max speed bits
pub fn ospd10(&self) -> OSPD10_R[src]
Bits 20:21 - Pin 10 output max speed bits
pub fn ospd9(&self) -> OSPD9_R[src]
Bits 18:19 - Pin 9 output max speed bits
pub fn ospd8(&self) -> OSPD8_R[src]
Bits 16:17 - Pin 8 output max speed bits
pub fn ospd7(&self) -> OSPD7_R[src]
Bits 14:15 - Pin 7 output max speed bits
pub fn ospd6(&self) -> OSPD6_R[src]
Bits 12:13 - Pin 6 output max speed bits
pub fn ospd5(&self) -> OSPD5_R[src]
Bits 10:11 - Pin 5 output max speed bits
pub fn ospd4(&self) -> OSPD4_R[src]
Bits 8:9 - Pin 4 output max speed bits
pub fn ospd3(&self) -> OSPD3_R[src]
Bits 6:7 - Pin 3 output max speed bits
pub fn ospd2(&self) -> OSPD2_R[src]
Bits 4:5 - Pin 2 output max speed bits
pub fn ospd1(&self) -> OSPD1_R[src]
Bits 2:3 - Pin 1 output max speed bits
pub fn ospd0(&self) -> OSPD0_R[src]
Bits 0:1 - Pin 0 output max speed bits
impl R<u8, PUD15_A>[src]
pub fn variant(&self) -> Variant<u8, PUD15_A>[src]
Get enumerated values variant
pub fn is_floating(&self) -> bool[src]
Checks if the value of the field is FLOATING
pub fn is_pull_up(&self) -> bool[src]
Checks if the value of the field is PULLUP
pub fn is_pull_down(&self) -> bool[src]
Checks if the value of the field is PULLDOWN
impl R<u32, Reg<u32, _PUD>>[src]
pub fn pud15(&self) -> PUD15_R[src]
Bits 30:31 - Pin 15 pull-up or pull-down bits
pub fn pud14(&self) -> PUD14_R[src]
Bits 28:29 - Pin 14 pull-up or pull-down bits
pub fn pud13(&self) -> PUD13_R[src]
Bits 26:27 - Pin 13 pull-up or pull-down bits
pub fn pud12(&self) -> PUD12_R[src]
Bits 24:25 - Pin 12 pull-up or pull-down bits
pub fn pud11(&self) -> PUD11_R[src]
Bits 22:23 - Pin 11 pull-up or pull-down bits
pub fn pud10(&self) -> PUD10_R[src]
Bits 20:21 - Pin 10 pull-up or pull-down bits
pub fn pud9(&self) -> PUD9_R[src]
Bits 18:19 - Pin 9 pull-up or pull-down bits
pub fn pud8(&self) -> PUD8_R[src]
Bits 16:17 - Pin 8 pull-up or pull-down bits
pub fn pud7(&self) -> PUD7_R[src]
Bits 14:15 - Pin 7 pull-up or pull-down bits
pub fn pud6(&self) -> PUD6_R[src]
Bits 12:13 - Pin 6 pull-up or pull-down bits
pub fn pud5(&self) -> PUD5_R[src]
Bits 10:11 - Pin 5 pull-up or pull-down bits
pub fn pud4(&self) -> PUD4_R[src]
Bits 8:9 - Pin 4 pull-up or pull-down bits
pub fn pud3(&self) -> PUD3_R[src]
Bits 6:7 - Pin 3 pull-up or pull-down bits
pub fn pud2(&self) -> PUD2_R[src]
Bits 4:5 - Pin 2 pull-up or pull-down bits
pub fn pud1(&self) -> PUD1_R[src]
Bits 2:3 - Pin 1 pull-up or pull-down bits
pub fn pud0(&self) -> PUD0_R[src]
Bits 0:1 - Pin 0 pull-up or pull-down bits
impl R<bool, ISTAT15_A>[src]
pub fn variant(&self) -> ISTAT15_A[src]
Get enumerated values variant
pub fn is_low(&self) -> bool[src]
Checks if the value of the field is LOW
pub fn is_high(&self) -> bool[src]
Checks if the value of the field is HIGH
impl R<u32, Reg<u32, _ISTAT>>[src]
pub fn istat15(&self) -> ISTAT15_R[src]
Bit 15 - Port input data 14
pub fn istat14(&self) -> ISTAT14_R[src]
Bit 14 - Port input data 14
pub fn istat13(&self) -> ISTAT13_R[src]
Bit 13 - Port input data 13
pub fn istat12(&self) -> ISTAT12_R[src]
Bit 12 - Port input data 12
pub fn istat11(&self) -> ISTAT11_R[src]
Bit 11 - Port input data 11
pub fn istat10(&self) -> ISTAT10_R[src]
Bit 10 - Port input data 10
pub fn istat9(&self) -> ISTAT9_R[src]
Bit 9 - Port input data 9
pub fn istat8(&self) -> ISTAT8_R[src]
Bit 8 - Port input data 8
pub fn istat7(&self) -> ISTAT7_R[src]
Bit 7 - Port input data 7
pub fn istat6(&self) -> ISTAT6_R[src]
Bit 6 - Port input data 6
pub fn istat5(&self) -> ISTAT5_R[src]
Bit 5 - Port input data 5
pub fn istat4(&self) -> ISTAT4_R[src]
Bit 4 - Port input data 4
pub fn istat3(&self) -> ISTAT3_R[src]
Bit 3 - Port input data 3
pub fn istat2(&self) -> ISTAT2_R[src]
Bit 2 - Port input data 2
pub fn istat1(&self) -> ISTAT1_R[src]
Bit 1 - Port input data 1
pub fn istat0(&self) -> ISTAT0_R[src]
Bit 0 - Port input data 0
impl R<bool, OCTL15_A>[src]
pub fn variant(&self) -> OCTL15_A[src]
Get enumerated values variant
pub fn is_low(&self) -> bool[src]
Checks if the value of the field is LOW
pub fn is_high(&self) -> bool[src]
Checks if the value of the field is HIGH
impl R<u32, Reg<u32, _OCTL>>[src]
pub fn octl15(&self) -> OCTL15_R[src]
Bit 15 - Port output data 15
pub fn octl14(&self) -> OCTL14_R[src]
Bit 14 - Port output data 14
pub fn octl13(&self) -> OCTL13_R[src]
Bit 13 - Port output data 13
pub fn octl12(&self) -> OCTL12_R[src]
Bit 12 - Port output data 12
pub fn octl11(&self) -> OCTL11_R[src]
Bit 11 - Port output data 11
pub fn octl10(&self) -> OCTL10_R[src]
Bit 10 - Port output data 10
pub fn octl9(&self) -> OCTL9_R[src]
Bit 9 - Port output data 9
pub fn octl8(&self) -> OCTL8_R[src]
Bit 8 - Port output data 8
pub fn octl7(&self) -> OCTL7_R[src]
Bit 7 - Port output data 7
pub fn octl6(&self) -> OCTL6_R[src]
Bit 6 - Port output data 6
pub fn octl5(&self) -> OCTL5_R[src]
Bit 5 - Port output data 5
pub fn octl4(&self) -> OCTL4_R[src]
Bit 4 - Port output data 4
pub fn octl3(&self) -> OCTL3_R[src]
Bit 3 - Port output data 3
pub fn octl2(&self) -> OCTL2_R[src]
Bit 2 - Port output data 2
pub fn octl1(&self) -> OCTL1_R[src]
Bit 1 - Port output data 1
pub fn octl0(&self) -> OCTL0_R[src]
Bit 0 - Port output data 0
impl R<bool, LKK_A>[src]
pub fn variant(&self) -> LKK_A[src]
Get enumerated values variant
pub fn is_not_active(&self) -> bool[src]
Checks if the value of the field is NOTACTIVE
pub fn is_active(&self) -> bool[src]
Checks if the value of the field is ACTIVE
impl R<bool, LK15_A>[src]
pub fn variant(&self) -> LK15_A[src]
Get enumerated values variant
pub fn is_unlocked(&self) -> bool[src]
Checks if the value of the field is UNLOCKED
pub fn is_locked(&self) -> bool[src]
Checks if the value of the field is LOCKED
impl R<bool, LK9_A>[src]
pub fn variant(&self) -> LK9_A[src]
Get enumerated values variant
pub fn is_unlocked(&self) -> bool[src]
Checks if the value of the field is UNLOCKED
pub fn is_locked(&self) -> bool[src]
Checks if the value of the field is LOCKED
impl R<u32, Reg<u32, _LOCK>>[src]
pub fn lkk(&self) -> LKK_R[src]
Bit 16 - Lock key
pub fn lk15(&self) -> LK15_R[src]
Bit 15 - Port lock bit 15
pub fn lk14(&self) -> LK14_R[src]
Bit 14 - Port lock bit 14
pub fn lk13(&self) -> LK13_R[src]
Bit 13 - Port lock bit 13
pub fn lk12(&self) -> LK12_R[src]
Bit 12 - Port lock bit 12
pub fn lk11(&self) -> LK11_R[src]
Bit 11 - Port lock bit 11
pub fn lk10(&self) -> LK10_R[src]
Bit 10 - Port lock bit 10
pub fn lk9(&self) -> LK9_R[src]
Bit 9 - Port lock bit 9
pub fn lk8(&self) -> LK8_R[src]
Bit 8 - Port lock bit 8
pub fn lk7(&self) -> LK7_R[src]
Bit 7 - Port lock bit 7
pub fn lk6(&self) -> LK6_R[src]
Bit 6 - Port lock bit 6
pub fn lk5(&self) -> LK5_R[src]
Bit 5 - Port lock bit 5
pub fn lk4(&self) -> LK4_R[src]
Bit 4 - Port lock bit 4
pub fn lk3(&self) -> LK3_R[src]
Bit 3 - Port lock bit 3
pub fn lk2(&self) -> LK2_R[src]
Bit 2 - Port lock bit 2
pub fn lk1(&self) -> LK1_R[src]
Bit 1 - Port lock bit 1
pub fn lk0(&self) -> LK0_R[src]
Bit 0 - Port lock bit 0
impl R<u8, SEL7_A>[src]
pub fn variant(&self) -> Variant<u8, SEL7_A>[src]
Get enumerated values variant
pub fn is_af0(&self) -> bool[src]
Checks if the value of the field is AF0
pub fn is_af1(&self) -> bool[src]
Checks if the value of the field is AF1
pub fn is_af2(&self) -> bool[src]
Checks if the value of the field is AF2
pub fn is_af3(&self) -> bool[src]
Checks if the value of the field is AF3
pub fn is_af4(&self) -> bool[src]
Checks if the value of the field is AF4
pub fn is_af5(&self) -> bool[src]
Checks if the value of the field is AF5
pub fn is_af6(&self) -> bool[src]
Checks if the value of the field is AF6
pub fn is_af7(&self) -> bool[src]
Checks if the value of the field is AF7
pub fn is_af9(&self) -> bool[src]
Checks if the value of the field is AF9
pub fn is_af11(&self) -> bool[src]
Checks if the value of the field is AF11
impl R<u32, Reg<u32, _AFSEL0>>[src]
pub fn sel7(&self) -> SEL7_R[src]
Bits 28:31 - Pin 7 alternate function selected
pub fn sel6(&self) -> SEL6_R[src]
Bits 24:27 - Pin 6 alternate function selected
pub fn sel5(&self) -> SEL5_R[src]
Bits 20:23 - Pin 5 alternate function selected
pub fn sel4(&self) -> SEL4_R[src]
Bits 16:19 - Pin 4 alternate function selected
pub fn sel3(&self) -> SEL3_R[src]
Bits 12:15 - Pin 3 alternate function selected
pub fn sel2(&self) -> SEL2_R[src]
Bits 8:11 - Pin 2 alternate function selected
pub fn sel1(&self) -> SEL1_R[src]
Bits 4:7 - Pin 1 alternate function selected
pub fn sel0(&self) -> SEL0_R[src]
Bits 0:3 - Pin 0 alternate function selected
impl R<u8, SEL15_A>[src]
pub fn variant(&self) -> Variant<u8, SEL15_A>[src]
Get enumerated values variant
pub fn is_af0(&self) -> bool[src]
Checks if the value of the field is AF0
pub fn is_af1(&self) -> bool[src]
Checks if the value of the field is AF1
pub fn is_af2(&self) -> bool[src]
Checks if the value of the field is AF2
pub fn is_af3(&self) -> bool[src]
Checks if the value of the field is AF3
pub fn is_af4(&self) -> bool[src]
Checks if the value of the field is AF4
pub fn is_af5(&self) -> bool[src]
Checks if the value of the field is AF5
pub fn is_af6(&self) -> bool[src]
Checks if the value of the field is AF6
pub fn is_af7(&self) -> bool[src]
Checks if the value of the field is AF7
pub fn is_af9(&self) -> bool[src]
Checks if the value of the field is AF9
pub fn is_af11(&self) -> bool[src]
Checks if the value of the field is AF11
impl R<u32, Reg<u32, _AFSEL1>>[src]
pub fn sel15(&self) -> SEL15_R[src]
Bits 28:31 - Pin 15 alternate function selected
pub fn sel14(&self) -> SEL14_R[src]
Bits 24:27 - Pin 14 alternate function selected
pub fn sel13(&self) -> SEL13_R[src]
Bits 20:23 - Pin 13 alternate function selected
pub fn sel12(&self) -> SEL12_R[src]
Bits 16:19 - Pin 12 alternate function selected
pub fn sel11(&self) -> SEL11_R[src]
Bits 12:15 - Pin 11 alternate function selected
pub fn sel10(&self) -> SEL10_R[src]
Bits 8:11 - Pin 10 alternate function selected
pub fn sel9(&self) -> SEL9_R[src]
Bits 4:7 - Pin 9 alternate function selected
pub fn sel8(&self) -> SEL8_R[src]
Bits 0:3 - Pin 8 alternate function selected
impl R<u8, CTL15_A>[src]
pub fn variant(&self) -> CTL15_A[src]
Get enumerated values variant
pub fn is_input(&self) -> bool[src]
Checks if the value of the field is INPUT
pub fn is_output(&self) -> bool[src]
Checks if the value of the field is OUTPUT
pub fn is_alternate(&self) -> bool[src]
Checks if the value of the field is ALTERNATE
pub fn is_analog(&self) -> bool[src]
Checks if the value of the field is ANALOG
impl R<u32, Reg<u32, _CTL>>[src]
pub fn ctl15(&self) -> CTL15_R[src]
Bits 30:31 - Port x configuration bits (y = 0..15)
pub fn ctl14(&self) -> CTL14_R[src]
Bits 28:29 - Port x configuration bits (y = 0..15)
pub fn ctl13(&self) -> CTL13_R[src]
Bits 26:27 - Port x configuration bits (y = 0..15)
pub fn ctl12(&self) -> CTL12_R[src]
Bits 24:25 - Port x configuration bits (y = 0..15)
pub fn ctl11(&self) -> CTL11_R[src]
Bits 22:23 - Port x configuration bits (y = 0..15)
pub fn ctl10(&self) -> CTL10_R[src]
Bits 20:21 - Port x configuration bits (y = 0..15)
pub fn ctl9(&self) -> CTL9_R[src]
Bits 18:19 - Port x configuration bits (y = 0..15)
pub fn ctl8(&self) -> CTL8_R[src]
Bits 16:17 - Port x configuration bits (y = 0..15)
pub fn ctl7(&self) -> CTL7_R[src]
Bits 14:15 - Port x configuration bits (y = 0..15)
pub fn ctl6(&self) -> CTL6_R[src]
Bits 12:13 - Port x configuration bits (y = 0..15)
pub fn ctl5(&self) -> CTL5_R[src]
Bits 10:11 - Port x configuration bits (y = 0..15)
pub fn ctl4(&self) -> CTL4_R[src]
Bits 8:9 - Port x configuration bits (y = 0..15)
pub fn ctl3(&self) -> CTL3_R[src]
Bits 6:7 - Port x configuration bits (y = 0..15)
pub fn ctl2(&self) -> CTL2_R[src]
Bits 4:5 - Port x configuration bits (y = 0..15)
pub fn ctl1(&self) -> CTL1_R[src]
Bits 2:3 - Port x configuration bits (y = 0..15)
pub fn ctl0(&self) -> CTL0_R[src]
Bits 0:1 - Port x configuration bits (y = 0..15)
impl R<bool, OM15_A>[src]
pub fn variant(&self) -> OM15_A[src]
Get enumerated values variant
pub fn is_push_pull(&self) -> bool[src]
Checks if the value of the field is PUSHPULL
pub fn is_open_drain(&self) -> bool[src]
Checks if the value of the field is OPENDRAIN
impl R<u32, Reg<u32, _OMODE>>[src]
pub fn om15(&self) -> OM15_R[src]
Bit 15 - Pin 15 output mode
pub fn om14(&self) -> OM14_R[src]
Bit 14 - Pin 14 output mode
pub fn om13(&self) -> OM13_R[src]
Bit 13 - Pin 13 output mode
pub fn om12(&self) -> OM12_R[src]
Bit 12 - Pin 12 output mode
pub fn om11(&self) -> OM11_R[src]
Bit 11 - Pin 11 output mode
pub fn om10(&self) -> OM10_R[src]
Bit 10 - Pin 10 output mode
pub fn om9(&self) -> OM9_R[src]
Bit 9 - Pin 9 output mode
pub fn om8(&self) -> OM8_R[src]
Bit 8 - Pin 8 output mode
pub fn om7(&self) -> OM7_R[src]
Bit 7 - Pin 7 output mode
pub fn om6(&self) -> OM6_R[src]
Bit 6 - Pin 6 output mode
pub fn om5(&self) -> OM5_R[src]
Bit 5 - Pin 5 output mode
pub fn om4(&self) -> OM4_R[src]
Bit 4 - Pin 4 output mode
pub fn om3(&self) -> OM3_R[src]
Bit 3 - Pin 3 output mode
pub fn om2(&self) -> OM2_R[src]
Bit 2 - Pin 2 output mode
pub fn om1(&self) -> OM1_R[src]
Bit 1 - Pin 1 output mode
pub fn om0(&self) -> OM0_R[src]
Bit 0 - Pin 0 output mode
impl R<u8, OSPD15_A>[src]
pub fn variant(&self) -> Variant<u8, OSPD15_A>[src]
Get enumerated values variant
pub fn is_speed2m(&self) -> bool[src]
Checks if the value of the field is SPEED2M
pub fn is_speed10m(&self) -> bool[src]
Checks if the value of the field is SPEED10M
pub fn is_speed50m(&self) -> bool[src]
Checks if the value of the field is SPEED50M
impl R<u32, Reg<u32, _OSPD>>[src]
pub fn ospd15(&self) -> OSPD15_R[src]
Bits 30:31 - Pin 15 output max speed bits
pub fn ospd14(&self) -> OSPD14_R[src]
Bits 28:29 - Pin 14 output max speed bits
pub fn ospd13(&self) -> OSPD13_R[src]
Bits 26:27 - Pin 13 output max speed bits
pub fn ospd12(&self) -> OSPD12_R[src]
Bits 24:25 - Pin 12 output max speed bits
pub fn ospd11(&self) -> OSPD11_R[src]
Bits 22:23 - Pin 11 output max speed bits
pub fn ospd10(&self) -> OSPD10_R[src]
Bits 20:21 - Pin 10 output max speed bits
pub fn ospd9(&self) -> OSPD9_R[src]
Bits 18:19 - Pin 9 output max speed bits
pub fn ospd8(&self) -> OSPD8_R[src]
Bits 16:17 - Pin 8 output max speed bits
pub fn ospd7(&self) -> OSPD7_R[src]
Bits 14:15 - Pin 7 output max speed bits
pub fn ospd6(&self) -> OSPD6_R[src]
Bits 12:13 - Pin 6 output max speed bits
pub fn ospd5(&self) -> OSPD5_R[src]
Bits 10:11 - Pin 5 output max speed bits
pub fn ospd4(&self) -> OSPD4_R[src]
Bits 8:9 - Pin 4 output max speed bits
pub fn ospd3(&self) -> OSPD3_R[src]
Bits 6:7 - Pin 3 output max speed bits
pub fn ospd2(&self) -> OSPD2_R[src]
Bits 4:5 - Pin 2 output max speed bits
pub fn ospd1(&self) -> OSPD1_R[src]
Bits 2:3 - Pin 1 output max speed bits
pub fn ospd0(&self) -> OSPD0_R[src]
Bits 0:1 - Pin 0 output max speed bits
impl R<u8, PUD15_A>[src]
pub fn variant(&self) -> Variant<u8, PUD15_A>[src]
Get enumerated values variant
pub fn is_floating(&self) -> bool[src]
Checks if the value of the field is FLOATING
pub fn is_pull_up(&self) -> bool[src]
Checks if the value of the field is PULLUP
pub fn is_pull_down(&self) -> bool[src]
Checks if the value of the field is PULLDOWN
impl R<u32, Reg<u32, _PUD>>[src]
pub fn pud15(&self) -> PUD15_R[src]
Bits 30:31 - Pin 15 pull-up or pull-down bits
pub fn pud14(&self) -> PUD14_R[src]
Bits 28:29 - Pin 14 pull-up or pull-down bits
pub fn pud13(&self) -> PUD13_R[src]
Bits 26:27 - Pin 13 pull-up or pull-down bits
pub fn pud12(&self) -> PUD12_R[src]
Bits 24:25 - Pin 12 pull-up or pull-down bits
pub fn pud11(&self) -> PUD11_R[src]
Bits 22:23 - Pin 11 pull-up or pull-down bits
pub fn pud10(&self) -> PUD10_R[src]
Bits 20:21 - Pin 10 pull-up or pull-down bits
pub fn pud9(&self) -> PUD9_R[src]
Bits 18:19 - Pin 9 pull-up or pull-down bits
pub fn pud8(&self) -> PUD8_R[src]
Bits 16:17 - Pin 8 pull-up or pull-down bits
pub fn pud7(&self) -> PUD7_R[src]
Bits 14:15 - Pin 7 pull-up or pull-down bits
pub fn pud6(&self) -> PUD6_R[src]
Bits 12:13 - Pin 6 pull-up or pull-down bits
pub fn pud5(&self) -> PUD5_R[src]
Bits 10:11 - Pin 5 pull-up or pull-down bits
pub fn pud4(&self) -> PUD4_R[src]
Bits 8:9 - Pin 4 pull-up or pull-down bits
pub fn pud3(&self) -> PUD3_R[src]
Bits 6:7 - Pin 3 pull-up or pull-down bits
pub fn pud2(&self) -> PUD2_R[src]
Bits 4:5 - Pin 2 pull-up or pull-down bits
pub fn pud1(&self) -> PUD1_R[src]
Bits 2:3 - Pin 1 pull-up or pull-down bits
pub fn pud0(&self) -> PUD0_R[src]
Bits 0:1 - Pin 0 pull-up or pull-down bits
impl R<bool, ISTAT15_A>[src]
pub fn variant(&self) -> ISTAT15_A[src]
Get enumerated values variant
pub fn is_low(&self) -> bool[src]
Checks if the value of the field is LOW
pub fn is_high(&self) -> bool[src]
Checks if the value of the field is HIGH
impl R<u32, Reg<u32, _ISTAT>>[src]
pub fn istat15(&self) -> ISTAT15_R[src]
Bit 15 - Port input data 14
pub fn istat14(&self) -> ISTAT14_R[src]
Bit 14 - Port input data 14
pub fn istat13(&self) -> ISTAT13_R[src]
Bit 13 - Port input data 13
pub fn istat12(&self) -> ISTAT12_R[src]
Bit 12 - Port input data 12
pub fn istat11(&self) -> ISTAT11_R[src]
Bit 11 - Port input data 11
pub fn istat10(&self) -> ISTAT10_R[src]
Bit 10 - Port input data 10
pub fn istat9(&self) -> ISTAT9_R[src]
Bit 9 - Port input data 9
pub fn istat8(&self) -> ISTAT8_R[src]
Bit 8 - Port input data 8
pub fn istat7(&self) -> ISTAT7_R[src]
Bit 7 - Port input data 7
pub fn istat6(&self) -> ISTAT6_R[src]
Bit 6 - Port input data 6
pub fn istat5(&self) -> ISTAT5_R[src]
Bit 5 - Port input data 5
pub fn istat4(&self) -> ISTAT4_R[src]
Bit 4 - Port input data 4
pub fn istat3(&self) -> ISTAT3_R[src]
Bit 3 - Port input data 3
pub fn istat2(&self) -> ISTAT2_R[src]
Bit 2 - Port input data 2
pub fn istat1(&self) -> ISTAT1_R[src]
Bit 1 - Port input data 1
pub fn istat0(&self) -> ISTAT0_R[src]
Bit 0 - Port input data 0
impl R<bool, OCTL15_A>[src]
pub fn variant(&self) -> OCTL15_A[src]
Get enumerated values variant
pub fn is_low(&self) -> bool[src]
Checks if the value of the field is LOW
pub fn is_high(&self) -> bool[src]
Checks if the value of the field is HIGH
impl R<u32, Reg<u32, _OCTL>>[src]
pub fn octl15(&self) -> OCTL15_R[src]
Bit 15 - Port output data 15
pub fn octl14(&self) -> OCTL14_R[src]
Bit 14 - Port output data 14
pub fn octl13(&self) -> OCTL13_R[src]
Bit 13 - Port output data 13
pub fn octl12(&self) -> OCTL12_R[src]
Bit 12 - Port output data 12
pub fn octl11(&self) -> OCTL11_R[src]
Bit 11 - Port output data 11
pub fn octl10(&self) -> OCTL10_R[src]
Bit 10 - Port output data 10
pub fn octl9(&self) -> OCTL9_R[src]
Bit 9 - Port output data 9
pub fn octl8(&self) -> OCTL8_R[src]
Bit 8 - Port output data 8
pub fn octl7(&self) -> OCTL7_R[src]
Bit 7 - Port output data 7
pub fn octl6(&self) -> OCTL6_R[src]
Bit 6 - Port output data 6
pub fn octl5(&self) -> OCTL5_R[src]
Bit 5 - Port output data 5
pub fn octl4(&self) -> OCTL4_R[src]
Bit 4 - Port output data 4
pub fn octl3(&self) -> OCTL3_R[src]
Bit 3 - Port output data 3
pub fn octl2(&self) -> OCTL2_R[src]
Bit 2 - Port output data 2
pub fn octl1(&self) -> OCTL1_R[src]
Bit 1 - Port output data 1
pub fn octl0(&self) -> OCTL0_R[src]
Bit 0 - Port output data 0
impl R<u8, SEL7_A>[src]
pub fn variant(&self) -> Variant<u8, SEL7_A>[src]
Get enumerated values variant
pub fn is_af0(&self) -> bool[src]
Checks if the value of the field is AF0
pub fn is_af1(&self) -> bool[src]
Checks if the value of the field is AF1
pub fn is_af2(&self) -> bool[src]
Checks if the value of the field is AF2
pub fn is_af3(&self) -> bool[src]
Checks if the value of the field is AF3
pub fn is_af4(&self) -> bool[src]
Checks if the value of the field is AF4
pub fn is_af5(&self) -> bool[src]
Checks if the value of the field is AF5
pub fn is_af6(&self) -> bool[src]
Checks if the value of the field is AF6
pub fn is_af7(&self) -> bool[src]
Checks if the value of the field is AF7
pub fn is_af9(&self) -> bool[src]
Checks if the value of the field is AF9
pub fn is_af11(&self) -> bool[src]
Checks if the value of the field is AF11
impl R<u32, Reg<u32, _AFSEL0>>[src]
pub fn sel7(&self) -> SEL7_R[src]
Bits 28:31 - Pin 7 alternate function selected
pub fn sel6(&self) -> SEL6_R[src]
Bits 24:27 - Pin 6 alternate function selected
pub fn sel5(&self) -> SEL5_R[src]
Bits 20:23 - Pin 5 alternate function selected
pub fn sel4(&self) -> SEL4_R[src]
Bits 16:19 - Pin 4 alternate function selected
pub fn sel3(&self) -> SEL3_R[src]
Bits 12:15 - Pin 3 alternate function selected
pub fn sel2(&self) -> SEL2_R[src]
Bits 8:11 - Pin 2 alternate function selected
pub fn sel1(&self) -> SEL1_R[src]
Bits 4:7 - Pin 1 alternate function selected
pub fn sel0(&self) -> SEL0_R[src]
Bits 0:3 - Pin 0 alternate function selected
impl R<u8, SEL15_A>[src]
pub fn variant(&self) -> Variant<u8, SEL15_A>[src]
Get enumerated values variant
pub fn is_af0(&self) -> bool[src]
Checks if the value of the field is AF0
pub fn is_af1(&self) -> bool[src]
Checks if the value of the field is AF1
pub fn is_af2(&self) -> bool[src]
Checks if the value of the field is AF2
pub fn is_af3(&self) -> bool[src]
Checks if the value of the field is AF3
pub fn is_af4(&self) -> bool[src]
Checks if the value of the field is AF4
pub fn is_af5(&self) -> bool[src]
Checks if the value of the field is AF5
pub fn is_af6(&self) -> bool[src]
Checks if the value of the field is AF6
pub fn is_af7(&self) -> bool[src]
Checks if the value of the field is AF7
pub fn is_af9(&self) -> bool[src]
Checks if the value of the field is AF9
pub fn is_af11(&self) -> bool[src]
Checks if the value of the field is AF11
impl R<u32, Reg<u32, _AFSEL1>>[src]
pub fn sel15(&self) -> SEL15_R[src]
Bits 28:31 - Pin 15 alternate function selected
pub fn sel14(&self) -> SEL14_R[src]
Bits 24:27 - Pin 14 alternate function selected
pub fn sel13(&self) -> SEL13_R[src]
Bits 20:23 - Pin 13 alternate function selected
pub fn sel12(&self) -> SEL12_R[src]
Bits 16:19 - Pin 12 alternate function selected
pub fn sel11(&self) -> SEL11_R[src]
Bits 12:15 - Pin 11 alternate function selected
pub fn sel10(&self) -> SEL10_R[src]
Bits 8:11 - Pin 10 alternate function selected
pub fn sel9(&self) -> SEL9_R[src]
Bits 4:7 - Pin 9 alternate function selected
pub fn sel8(&self) -> SEL8_R[src]
Bits 0:3 - Pin 8 alternate function selected
impl R<u8, CTL15_A>[src]
pub fn variant(&self) -> CTL15_A[src]
Get enumerated values variant
pub fn is_input(&self) -> bool[src]
Checks if the value of the field is INPUT
pub fn is_output(&self) -> bool[src]
Checks if the value of the field is OUTPUT
pub fn is_alternate(&self) -> bool[src]
Checks if the value of the field is ALTERNATE
pub fn is_analog(&self) -> bool[src]
Checks if the value of the field is ANALOG
impl R<u32, Reg<u32, _CTL>>[src]
pub fn ctl15(&self) -> CTL15_R[src]
Bits 30:31 - Port x configuration bits (y = 0..15)
pub fn ctl14(&self) -> CTL14_R[src]
Bits 28:29 - Port x configuration bits (y = 0..15)
pub fn ctl13(&self) -> CTL13_R[src]
Bits 26:27 - Port x configuration bits (y = 0..15)
pub fn ctl12(&self) -> CTL12_R[src]
Bits 24:25 - Port x configuration bits (y = 0..15)
pub fn ctl11(&self) -> CTL11_R[src]
Bits 22:23 - Port x configuration bits (y = 0..15)
pub fn ctl10(&self) -> CTL10_R[src]
Bits 20:21 - Port x configuration bits (y = 0..15)
pub fn ctl9(&self) -> CTL9_R[src]
Bits 18:19 - Port x configuration bits (y = 0..15)
pub fn ctl8(&self) -> CTL8_R[src]
Bits 16:17 - Port x configuration bits (y = 0..15)
pub fn ctl7(&self) -> CTL7_R[src]
Bits 14:15 - Port x configuration bits (y = 0..15)
pub fn ctl6(&self) -> CTL6_R[src]
Bits 12:13 - Port x configuration bits (y = 0..15)
pub fn ctl5(&self) -> CTL5_R[src]
Bits 10:11 - Port x configuration bits (y = 0..15)
pub fn ctl4(&self) -> CTL4_R[src]
Bits 8:9 - Port x configuration bits (y = 0..15)
pub fn ctl3(&self) -> CTL3_R[src]
Bits 6:7 - Port x configuration bits (y = 0..15)
pub fn ctl2(&self) -> CTL2_R[src]
Bits 4:5 - Port x configuration bits (y = 0..15)
pub fn ctl1(&self) -> CTL1_R[src]
Bits 2:3 - Port x configuration bits (y = 0..15)
pub fn ctl0(&self) -> CTL0_R[src]
Bits 0:1 - Port x configuration bits (y = 0..15)
impl R<bool, OM15_A>[src]
pub fn variant(&self) -> OM15_A[src]
Get enumerated values variant
pub fn is_push_pull(&self) -> bool[src]
Checks if the value of the field is PUSHPULL
pub fn is_open_drain(&self) -> bool[src]
Checks if the value of the field is OPENDRAIN
impl R<u32, Reg<u32, _OMODE>>[src]
pub fn om15(&self) -> OM15_R[src]
Bit 15 - Pin 15 output mode
pub fn om14(&self) -> OM14_R[src]
Bit 14 - Pin 14 output mode
pub fn om13(&self) -> OM13_R[src]
Bit 13 - Pin 13 output mode
pub fn om12(&self) -> OM12_R[src]
Bit 12 - Pin 12 output mode
pub fn om11(&self) -> OM11_R[src]
Bit 11 - Pin 11 output mode
pub fn om10(&self) -> OM10_R[src]
Bit 10 - Pin 10 output mode
pub fn om9(&self) -> OM9_R[src]
Bit 9 - Pin 9 output mode
pub fn om8(&self) -> OM8_R[src]
Bit 8 - Pin 8 output mode
pub fn om7(&self) -> OM7_R[src]
Bit 7 - Pin 7 output mode
pub fn om6(&self) -> OM6_R[src]
Bit 6 - Pin 6 output mode
pub fn om5(&self) -> OM5_R[src]
Bit 5 - Pin 5 output mode
pub fn om4(&self) -> OM4_R[src]
Bit 4 - Pin 4 output mode
pub fn om3(&self) -> OM3_R[src]
Bit 3 - Pin 3 output mode
pub fn om2(&self) -> OM2_R[src]
Bit 2 - Pin 2 output mode
pub fn om1(&self) -> OM1_R[src]
Bit 1 - Pin 1 output mode
pub fn om0(&self) -> OM0_R[src]
Bit 0 - Pin 0 output mode
impl R<u8, OSPD15_A>[src]
pub fn variant(&self) -> Variant<u8, OSPD15_A>[src]
Get enumerated values variant
pub fn is_speed2m(&self) -> bool[src]
Checks if the value of the field is SPEED2M
pub fn is_speed10m(&self) -> bool[src]
Checks if the value of the field is SPEED10M
pub fn is_speed50m(&self) -> bool[src]
Checks if the value of the field is SPEED50M
impl R<u32, Reg<u32, _OSPD>>[src]
pub fn ospd15(&self) -> OSPD15_R[src]
Bits 30:31 - Pin 15 output max speed bits
pub fn ospd14(&self) -> OSPD14_R[src]
Bits 28:29 - Pin 14 output max speed bits
pub fn ospd13(&self) -> OSPD13_R[src]
Bits 26:27 - Pin 13 output max speed bits
pub fn ospd12(&self) -> OSPD12_R[src]
Bits 24:25 - Pin 12 output max speed bits
pub fn ospd11(&self) -> OSPD11_R[src]
Bits 22:23 - Pin 11 output max speed bits
pub fn ospd10(&self) -> OSPD10_R[src]
Bits 20:21 - Pin 10 output max speed bits
pub fn ospd9(&self) -> OSPD9_R[src]
Bits 18:19 - Pin 9 output max speed bits
pub fn ospd8(&self) -> OSPD8_R[src]
Bits 16:17 - Pin 8 output max speed bits
pub fn ospd7(&self) -> OSPD7_R[src]
Bits 14:15 - Pin 7 output max speed bits
pub fn ospd6(&self) -> OSPD6_R[src]
Bits 12:13 - Pin 6 output max speed bits
pub fn ospd5(&self) -> OSPD5_R[src]
Bits 10:11 - Pin 5 output max speed bits
pub fn ospd4(&self) -> OSPD4_R[src]
Bits 8:9 - Pin 4 output max speed bits
pub fn ospd3(&self) -> OSPD3_R[src]
Bits 6:7 - Pin 3 output max speed bits
pub fn ospd2(&self) -> OSPD2_R[src]
Bits 4:5 - Pin 2 output max speed bits
pub fn ospd1(&self) -> OSPD1_R[src]
Bits 2:3 - Pin 1 output max speed bits
pub fn ospd0(&self) -> OSPD0_R[src]
Bits 0:1 - Pin 0 output max speed bits
impl R<u8, PUD15_A>[src]
pub fn variant(&self) -> Variant<u8, PUD15_A>[src]
Get enumerated values variant
pub fn is_floating(&self) -> bool[src]
Checks if the value of the field is FLOATING
pub fn is_pull_up(&self) -> bool[src]
Checks if the value of the field is PULLUP
pub fn is_pull_down(&self) -> bool[src]
Checks if the value of the field is PULLDOWN
impl R<u32, Reg<u32, _PUD>>[src]
pub fn pud15(&self) -> PUD15_R[src]
Bits 30:31 - Pin 15 pull-up or pull-down bits
pub fn pud14(&self) -> PUD14_R[src]
Bits 28:29 - Pin 14 pull-up or pull-down bits
pub fn pud13(&self) -> PUD13_R[src]
Bits 26:27 - Pin 13 pull-up or pull-down bits
pub fn pud12(&self) -> PUD12_R[src]
Bits 24:25 - Pin 12 pull-up or pull-down bits
pub fn pud11(&self) -> PUD11_R[src]
Bits 22:23 - Pin 11 pull-up or pull-down bits
pub fn pud10(&self) -> PUD10_R[src]
Bits 20:21 - Pin 10 pull-up or pull-down bits
pub fn pud9(&self) -> PUD9_R[src]
Bits 18:19 - Pin 9 pull-up or pull-down bits
pub fn pud8(&self) -> PUD8_R[src]
Bits 16:17 - Pin 8 pull-up or pull-down bits
pub fn pud7(&self) -> PUD7_R[src]
Bits 14:15 - Pin 7 pull-up or pull-down bits
pub fn pud6(&self) -> PUD6_R[src]
Bits 12:13 - Pin 6 pull-up or pull-down bits
pub fn pud5(&self) -> PUD5_R[src]
Bits 10:11 - Pin 5 pull-up or pull-down bits
pub fn pud4(&self) -> PUD4_R[src]
Bits 8:9 - Pin 4 pull-up or pull-down bits
pub fn pud3(&self) -> PUD3_R[src]
Bits 6:7 - Pin 3 pull-up or pull-down bits
pub fn pud2(&self) -> PUD2_R[src]
Bits 4:5 - Pin 2 pull-up or pull-down bits
pub fn pud1(&self) -> PUD1_R[src]
Bits 2:3 - Pin 1 pull-up or pull-down bits
pub fn pud0(&self) -> PUD0_R[src]
Bits 0:1 - Pin 0 pull-up or pull-down bits
impl R<bool, ISTAT15_A>[src]
pub fn variant(&self) -> ISTAT15_A[src]
Get enumerated values variant
pub fn is_low(&self) -> bool[src]
Checks if the value of the field is LOW
pub fn is_high(&self) -> bool[src]
Checks if the value of the field is HIGH
impl R<u32, Reg<u32, _ISTAT>>[src]
pub fn istat15(&self) -> ISTAT15_R[src]
Bit 15 - Port input data 14
pub fn istat14(&self) -> ISTAT14_R[src]
Bit 14 - Port input data 14
pub fn istat13(&self) -> ISTAT13_R[src]
Bit 13 - Port input data 13
pub fn istat12(&self) -> ISTAT12_R[src]
Bit 12 - Port input data 12
pub fn istat11(&self) -> ISTAT11_R[src]
Bit 11 - Port input data 11
pub fn istat10(&self) -> ISTAT10_R[src]
Bit 10 - Port input data 10
pub fn istat9(&self) -> ISTAT9_R[src]
Bit 9 - Port input data 9
pub fn istat8(&self) -> ISTAT8_R[src]
Bit 8 - Port input data 8
pub fn istat7(&self) -> ISTAT7_R[src]
Bit 7 - Port input data 7
pub fn istat6(&self) -> ISTAT6_R[src]
Bit 6 - Port input data 6
pub fn istat5(&self) -> ISTAT5_R[src]
Bit 5 - Port input data 5
pub fn istat4(&self) -> ISTAT4_R[src]
Bit 4 - Port input data 4
pub fn istat3(&self) -> ISTAT3_R[src]
Bit 3 - Port input data 3
pub fn istat2(&self) -> ISTAT2_R[src]
Bit 2 - Port input data 2
pub fn istat1(&self) -> ISTAT1_R[src]
Bit 1 - Port input data 1
pub fn istat0(&self) -> ISTAT0_R[src]
Bit 0 - Port input data 0
impl R<bool, OCTL15_A>[src]
pub fn variant(&self) -> OCTL15_A[src]
Get enumerated values variant
pub fn is_low(&self) -> bool[src]
Checks if the value of the field is LOW
pub fn is_high(&self) -> bool[src]
Checks if the value of the field is HIGH
impl R<u32, Reg<u32, _OCTL>>[src]
pub fn octl15(&self) -> OCTL15_R[src]
Bit 15 - Port output data 15
pub fn octl14(&self) -> OCTL14_R[src]
Bit 14 - Port output data 14
pub fn octl13(&self) -> OCTL13_R[src]
Bit 13 - Port output data 13
pub fn octl12(&self) -> OCTL12_R[src]
Bit 12 - Port output data 12
pub fn octl11(&self) -> OCTL11_R[src]
Bit 11 - Port output data 11
pub fn octl10(&self) -> OCTL10_R[src]
Bit 10 - Port output data 10
pub fn octl9(&self) -> OCTL9_R[src]
Bit 9 - Port output data 9
pub fn octl8(&self) -> OCTL8_R[src]
Bit 8 - Port output data 8
pub fn octl7(&self) -> OCTL7_R[src]
Bit 7 - Port output data 7
pub fn octl6(&self) -> OCTL6_R[src]
Bit 6 - Port output data 6
pub fn octl5(&self) -> OCTL5_R[src]
Bit 5 - Port output data 5
pub fn octl4(&self) -> OCTL4_R[src]
Bit 4 - Port output data 4
pub fn octl3(&self) -> OCTL3_R[src]
Bit 3 - Port output data 3
pub fn octl2(&self) -> OCTL2_R[src]
Bit 2 - Port output data 2
pub fn octl1(&self) -> OCTL1_R[src]
Bit 1 - Port output data 1
pub fn octl0(&self) -> OCTL0_R[src]
Bit 0 - Port output data 0
impl R<u8, CTL15_A>[src]
pub fn variant(&self) -> CTL15_A[src]
Get enumerated values variant
pub fn is_input(&self) -> bool[src]
Checks if the value of the field is INPUT
pub fn is_output(&self) -> bool[src]
Checks if the value of the field is OUTPUT
pub fn is_alternate(&self) -> bool[src]
Checks if the value of the field is ALTERNATE
pub fn is_analog(&self) -> bool[src]
Checks if the value of the field is ANALOG
impl R<u32, Reg<u32, _CTL>>[src]
pub fn ctl15(&self) -> CTL15_R[src]
Bits 30:31 - Port x configuration bits (y = 0..15)
pub fn ctl14(&self) -> CTL14_R[src]
Bits 28:29 - Port x configuration bits (y = 0..15)
pub fn ctl13(&self) -> CTL13_R[src]
Bits 26:27 - Port x configuration bits (y = 0..15)
pub fn ctl12(&self) -> CTL12_R[src]
Bits 24:25 - Port x configuration bits (y = 0..15)
pub fn ctl11(&self) -> CTL11_R[src]
Bits 22:23 - Port x configuration bits (y = 0..15)
pub fn ctl10(&self) -> CTL10_R[src]
Bits 20:21 - Port x configuration bits (y = 0..15)
pub fn ctl9(&self) -> CTL9_R[src]
Bits 18:19 - Port x configuration bits (y = 0..15)
pub fn ctl8(&self) -> CTL8_R[src]
Bits 16:17 - Port x configuration bits (y = 0..15)
pub fn ctl7(&self) -> CTL7_R[src]
Bits 14:15 - Port x configuration bits (y = 0..15)
pub fn ctl6(&self) -> CTL6_R[src]
Bits 12:13 - Port x configuration bits (y = 0..15)
pub fn ctl5(&self) -> CTL5_R[src]
Bits 10:11 - Port x configuration bits (y = 0..15)
pub fn ctl4(&self) -> CTL4_R[src]
Bits 8:9 - Port x configuration bits (y = 0..15)
pub fn ctl3(&self) -> CTL3_R[src]
Bits 6:7 - Port x configuration bits (y = 0..15)
pub fn ctl2(&self) -> CTL2_R[src]
Bits 4:5 - Port x configuration bits (y = 0..15)
pub fn ctl1(&self) -> CTL1_R[src]
Bits 2:3 - Port x configuration bits (y = 0..15)
pub fn ctl0(&self) -> CTL0_R[src]
Bits 0:1 - Port x configuration bits (y = 0..15)
impl R<bool, OM15_A>[src]
pub fn variant(&self) -> OM15_A[src]
Get enumerated values variant
pub fn is_push_pull(&self) -> bool[src]
Checks if the value of the field is PUSHPULL
pub fn is_open_drain(&self) -> bool[src]
Checks if the value of the field is OPENDRAIN
impl R<u32, Reg<u32, _OMODE>>[src]
pub fn om15(&self) -> OM15_R[src]
Bit 15 - Pin 15 output mode
pub fn om14(&self) -> OM14_R[src]
Bit 14 - Pin 14 output mode
pub fn om13(&self) -> OM13_R[src]
Bit 13 - Pin 13 output mode
pub fn om12(&self) -> OM12_R[src]
Bit 12 - Pin 12 output mode
pub fn om11(&self) -> OM11_R[src]
Bit 11 - Pin 11 output mode
pub fn om10(&self) -> OM10_R[src]
Bit 10 - Pin 10 output mode
pub fn om9(&self) -> OM9_R[src]
Bit 9 - Pin 9 output mode
pub fn om8(&self) -> OM8_R[src]
Bit 8 - Pin 8 output mode
pub fn om7(&self) -> OM7_R[src]
Bit 7 - Pin 7 output mode
pub fn om6(&self) -> OM6_R[src]
Bit 6 - Pin 6 output mode
pub fn om5(&self) -> OM5_R[src]
Bit 5 - Pin 5 output mode
pub fn om4(&self) -> OM4_R[src]
Bit 4 - Pin 4 output mode
pub fn om3(&self) -> OM3_R[src]
Bit 3 - Pin 3 output mode
pub fn om2(&self) -> OM2_R[src]
Bit 2 - Pin 2 output mode
pub fn om1(&self) -> OM1_R[src]
Bit 1 - Pin 1 output mode
pub fn om0(&self) -> OM0_R[src]
Bit 0 - Pin 0 output mode
impl R<u8, OSPD15_A>[src]
pub fn variant(&self) -> Variant<u8, OSPD15_A>[src]
Get enumerated values variant
pub fn is_speed2m(&self) -> bool[src]
Checks if the value of the field is SPEED2M
pub fn is_speed10m(&self) -> bool[src]
Checks if the value of the field is SPEED10M
pub fn is_speed50m(&self) -> bool[src]
Checks if the value of the field is SPEED50M
impl R<u32, Reg<u32, _OSPD>>[src]
pub fn ospd15(&self) -> OSPD15_R[src]
Bits 30:31 - Pin 15 output max speed bits
pub fn ospd14(&self) -> OSPD14_R[src]
Bits 28:29 - Pin 14 output max speed bits
pub fn ospd13(&self) -> OSPD13_R[src]
Bits 26:27 - Pin 13 output max speed bits
pub fn ospd12(&self) -> OSPD12_R[src]
Bits 24:25 - Pin 12 output max speed bits
pub fn ospd11(&self) -> OSPD11_R[src]
Bits 22:23 - Pin 11 output max speed bits
pub fn ospd10(&self) -> OSPD10_R[src]
Bits 20:21 - Pin 10 output max speed bits
pub fn ospd9(&self) -> OSPD9_R[src]
Bits 18:19 - Pin 9 output max speed bits
pub fn ospd8(&self) -> OSPD8_R[src]
Bits 16:17 - Pin 8 output max speed bits
pub fn ospd7(&self) -> OSPD7_R[src]
Bits 14:15 - Pin 7 output max speed bits
pub fn ospd6(&self) -> OSPD6_R[src]
Bits 12:13 - Pin 6 output max speed bits
pub fn ospd5(&self) -> OSPD5_R[src]
Bits 10:11 - Pin 5 output max speed bits
pub fn ospd4(&self) -> OSPD4_R[src]
Bits 8:9 - Pin 4 output max speed bits
pub fn ospd3(&self) -> OSPD3_R[src]
Bits 6:7 - Pin 3 output max speed bits
pub fn ospd2(&self) -> OSPD2_R[src]
Bits 4:5 - Pin 2 output max speed bits
pub fn ospd1(&self) -> OSPD1_R[src]
Bits 2:3 - Pin 1 output max speed bits
pub fn ospd0(&self) -> OSPD0_R[src]
Bits 0:1 - Pin 0 output max speed bits
impl R<u8, PUD15_A>[src]
pub fn variant(&self) -> Variant<u8, PUD15_A>[src]
Get enumerated values variant
pub fn is_floating(&self) -> bool[src]
Checks if the value of the field is FLOATING
pub fn is_pull_up(&self) -> bool[src]
Checks if the value of the field is PULLUP
pub fn is_pull_down(&self) -> bool[src]
Checks if the value of the field is PULLDOWN
impl R<u32, Reg<u32, _PUD>>[src]
pub fn pud15(&self) -> PUD15_R[src]
Bits 30:31 - Pin 15 pull-up or pull-down bits
pub fn pud14(&self) -> PUD14_R[src]
Bits 28:29 - Pin 14 pull-up or pull-down bits
pub fn pud13(&self) -> PUD13_R[src]
Bits 26:27 - Pin 13 pull-up or pull-down bits
pub fn pud12(&self) -> PUD12_R[src]
Bits 24:25 - Pin 12 pull-up or pull-down bits
pub fn pud11(&self) -> PUD11_R[src]
Bits 22:23 - Pin 11 pull-up or pull-down bits
pub fn pud10(&self) -> PUD10_R[src]
Bits 20:21 - Pin 10 pull-up or pull-down bits
pub fn pud9(&self) -> PUD9_R[src]
Bits 18:19 - Pin 9 pull-up or pull-down bits
pub fn pud8(&self) -> PUD8_R[src]
Bits 16:17 - Pin 8 pull-up or pull-down bits
pub fn pud7(&self) -> PUD7_R[src]
Bits 14:15 - Pin 7 pull-up or pull-down bits
pub fn pud6(&self) -> PUD6_R[src]
Bits 12:13 - Pin 6 pull-up or pull-down bits
pub fn pud5(&self) -> PUD5_R[src]
Bits 10:11 - Pin 5 pull-up or pull-down bits
pub fn pud4(&self) -> PUD4_R[src]
Bits 8:9 - Pin 4 pull-up or pull-down bits
pub fn pud3(&self) -> PUD3_R[src]
Bits 6:7 - Pin 3 pull-up or pull-down bits
pub fn pud2(&self) -> PUD2_R[src]
Bits 4:5 - Pin 2 pull-up or pull-down bits
pub fn pud1(&self) -> PUD1_R[src]
Bits 2:3 - Pin 1 pull-up or pull-down bits
pub fn pud0(&self) -> PUD0_R[src]
Bits 0:1 - Pin 0 pull-up or pull-down bits
impl R<bool, ISTAT15_A>[src]
pub fn variant(&self) -> ISTAT15_A[src]
Get enumerated values variant
pub fn is_low(&self) -> bool[src]
Checks if the value of the field is LOW
pub fn is_high(&self) -> bool[src]
Checks if the value of the field is HIGH
impl R<u32, Reg<u32, _ISTAT>>[src]
pub fn istat15(&self) -> ISTAT15_R[src]
Bit 15 - Port input data 14
pub fn istat14(&self) -> ISTAT14_R[src]
Bit 14 - Port input data 14
pub fn istat13(&self) -> ISTAT13_R[src]
Bit 13 - Port input data 13
pub fn istat12(&self) -> ISTAT12_R[src]
Bit 12 - Port input data 12
pub fn istat11(&self) -> ISTAT11_R[src]
Bit 11 - Port input data 11
pub fn istat10(&self) -> ISTAT10_R[src]
Bit 10 - Port input data 10
pub fn istat9(&self) -> ISTAT9_R[src]
Bit 9 - Port input data 9
pub fn istat8(&self) -> ISTAT8_R[src]
Bit 8 - Port input data 8
pub fn istat7(&self) -> ISTAT7_R[src]
Bit 7 - Port input data 7
pub fn istat6(&self) -> ISTAT6_R[src]
Bit 6 - Port input data 6
pub fn istat5(&self) -> ISTAT5_R[src]
Bit 5 - Port input data 5
pub fn istat4(&self) -> ISTAT4_R[src]
Bit 4 - Port input data 4
pub fn istat3(&self) -> ISTAT3_R[src]
Bit 3 - Port input data 3
pub fn istat2(&self) -> ISTAT2_R[src]
Bit 2 - Port input data 2
pub fn istat1(&self) -> ISTAT1_R[src]
Bit 1 - Port input data 1
pub fn istat0(&self) -> ISTAT0_R[src]
Bit 0 - Port input data 0
impl R<bool, OCTL15_A>[src]
pub fn variant(&self) -> OCTL15_A[src]
Get enumerated values variant
pub fn is_low(&self) -> bool[src]
Checks if the value of the field is LOW
pub fn is_high(&self) -> bool[src]
Checks if the value of the field is HIGH
impl R<u32, Reg<u32, _OCTL>>[src]
pub fn octl15(&self) -> OCTL15_R[src]
Bit 15 - Port output data 15
pub fn octl14(&self) -> OCTL14_R[src]
Bit 14 - Port output data 14
pub fn octl13(&self) -> OCTL13_R[src]
Bit 13 - Port output data 13
pub fn octl12(&self) -> OCTL12_R[src]
Bit 12 - Port output data 12
pub fn octl11(&self) -> OCTL11_R[src]
Bit 11 - Port output data 11
pub fn octl10(&self) -> OCTL10_R[src]
Bit 10 - Port output data 10
pub fn octl9(&self) -> OCTL9_R[src]
Bit 9 - Port output data 9
pub fn octl8(&self) -> OCTL8_R[src]
Bit 8 - Port output data 8
pub fn octl7(&self) -> OCTL7_R[src]
Bit 7 - Port output data 7
pub fn octl6(&self) -> OCTL6_R[src]
Bit 6 - Port output data 6
pub fn octl5(&self) -> OCTL5_R[src]
Bit 5 - Port output data 5
pub fn octl4(&self) -> OCTL4_R[src]
Bit 4 - Port output data 4
pub fn octl3(&self) -> OCTL3_R[src]
Bit 3 - Port output data 3
pub fn octl2(&self) -> OCTL2_R[src]
Bit 2 - Port output data 2
pub fn octl1(&self) -> OCTL1_R[src]
Bit 1 - Port output data 1
pub fn octl0(&self) -> OCTL0_R[src]
Bit 0 - Port output data 0
impl R<u16, Reg<u16, _CTL0>>[src]
pub fn sreset(&self) -> SRESET_R[src]
Bit 15 - Software reset I2C
pub fn salt(&self) -> SALT_R[src]
Bit 13 - SMBus alert
pub fn pectrans(&self) -> PECTRANS_R[src]
Bit 12 - PEC Transfer
pub fn poap(&self) -> POAP_R[src]
Bit 11 - Position of ACK meaning
pub fn acken(&self) -> ACKEN_R[src]
Bit 10 - Whether or not to send an ACK
pub fn stop(&self) -> STOP_R[src]
Bit 9 - Generate a STOP condition on I2C bus
pub fn start(&self) -> START_R[src]
Bit 8 - Generate a START condition on I2C bus
pub fn disstrc(&self) -> DISSTRC_R[src]
Bit 7 - Whether to stretch SCL low when data is not ready in slave mode
pub fn gcen(&self) -> GCEN_R[src]
Bit 6 - Whether or not to response to a General Call (0x00)
pub fn pecen(&self) -> PECEN_R[src]
Bit 5 - PEC Calculation Switch
pub fn arpen(&self) -> ARPEN_R[src]
Bit 4 - ARP protocol in SMBus switch
pub fn smbsel(&self) -> SMBSEL_R[src]
Bit 3 - SMBusType Selection
pub fn smben(&self) -> SMBEN_R[src]
Bit 1 - SMBus/I2C mode switch
pub fn i2cen(&self) -> I2CEN_R[src]
Bit 0 - I2C peripheral enable
impl R<u16, Reg<u16, _CTL1>>[src]
pub fn dmalst(&self) -> DMALST_R[src]
Bit 12 - Flag indicating DMA last transfer
pub fn dmaon(&self) -> DMAON_R[src]
Bit 11 - DMA mode switch
pub fn bufie(&self) -> BUFIE_R[src]
Bit 10 - Buffer interrupt enable
pub fn evie(&self) -> EVIE_R[src]
Bit 9 - Event interrupt enable
pub fn errie(&self) -> ERRIE_R[src]
Bit 8 - Error interrupt enable
pub fn i2cclk(&self) -> I2CCLK_R[src]
Bits 0:5 - I2C Peripheral clock frequency
impl R<u16, Reg<u16, _SADDR0>>[src]
pub fn addformat(&self) -> ADDFORMAT_R[src]
Bit 15 - Address mode for the I2C slave
pub fn address(&self) -> ADDRESS_R[src]
Bits 0:9 - Interface address
impl R<u16, Reg<u16, _SADDR1>>[src]
pub fn address2(&self) -> ADDRESS2_R[src]
Bits 1:7 - Second I2C address for the slave in Dual-Address mode
pub fn duaden(&self) -> DUADEN_R[src]
Bit 0 - Dual-Address mode switch
impl R<u16, Reg<u16, _DATA>>[src]
impl R<u16, Reg<u16, _STAT0>>[src]
pub fn smbalts(&self) -> SMBALTS_R[src]
Bit 15 - SMBus Alert status
pub fn smbto(&self) -> SMBTO_R[src]
Bit 14 - Timeout signal in SMBus mode
pub fn pecerr(&self) -> PECERR_R[src]
Bit 12 - PEC error when receiving data
pub fn ouerr(&self) -> OUERR_R[src]
Bit 11 - Over-run or under-run situation occurs in slave mode
pub fn aerr(&self) -> AERR_R[src]
Bit 10 - Acknowledge error
pub fn lostarb(&self) -> LOSTARB_R[src]
Bit 9 - Arbitration Lost in master mode
pub fn be(&self) -> BE_R[src]
Bit 8 - Bus error
pub fn tbe(&self) -> TBE_R[src]
Bit 7 - I2C_DATA is Empty during transmitting
pub fn rbne(&self) -> RBNE_R[src]
Bit 6 - TRBR is not Empty during receiving
pub fn stpdet(&self) -> STPDET_R[src]
Bit 4 - STOP condition detected in slave mode
pub fn add10send(&self) -> ADD10SEND_R[src]
Bit 3 - Header of 10-bit address is sent in master mode
pub fn btc(&self) -> BTC_R[src]
Bit 2 - Byte transmission completed
pub fn addsend(&self) -> ADDSEND_R[src]
Bit 1 - Address is sent in master mode or received and matches in slave mode
pub fn sbsend(&self) -> SBSEND_R[src]
Bit 0 - START condition sent out in master mode
impl R<u16, Reg<u16, _STAT1>>[src]
pub fn ecv(&self) -> ECV_R[src]
Bits 8:15 - Packet Error Checking Value
pub fn dumodf(&self) -> DUMODF_R[src]
Bit 7 - Dual Flag in slave mode
pub fn hstsmb(&self) -> HSTSMB_R[src]
Bit 6 - SMBus Host Header detected in slave mode
pub fn defsmb(&self) -> DEFSMB_R[src]
Bit 5 - SMBus host header in slave mode
pub fn rxgc(&self) -> RXGC_R[src]
Bit 4 - General call address (00h) received
pub fn trs(&self) -> TRS_R[src]
Bit 2 - Whether the I2C is a transmitter or a receiver
pub fn i2cbsy(&self) -> I2CBSY_R[src]
Bit 1 - Busy flag
pub fn master(&self) -> MASTER_R[src]
Bit 0 - A flag indicating whether I2C block is in master or slave mode
impl R<u16, Reg<u16, _CKCFG>>[src]
pub fn fast(&self) -> FAST_R[src]
Bit 15 - I2C speed selection in master mode
pub fn dtcy(&self) -> DTCY_R[src]
Bit 14 - Duty cycle in fast mode
pub fn clkc(&self) -> CLKC_R[src]
Bits 0:11 - I2C Clock control in master mode
impl R<u32, Reg<u32, _RT>>[src]
pub fn risetime(&self) -> RISETIME_R[src]
Bits 0:5 - Maximum rise time in master mode
impl R<u32, Reg<u32, _SAMCS>>[src]
pub fn samen(&self) -> SAMEN_R[src]
Bit 0 - SAM_V interface enable
pub fn stoen(&self) -> STOEN_R[src]
Bit 1 - SAM_V interface timeout detect enable
pub fn tffie(&self) -> TFFIE_R[src]
Bit 4 - Txframe fall interrupt enable
pub fn tfrie(&self) -> TFRIE_R[src]
Bit 5 - Txframe rise interrupt enable
pub fn rffie(&self) -> RFFIE_R[src]
Bit 6 - Rxframe fall interrupt enable
pub fn rfrie(&self) -> RFRIE_R[src]
Bit 7 - Rxframe rise interrupt enable
pub fn txf(&self) -> TXF_R[src]
Bit 8 - Level of Txframe signal
pub fn rxf(&self) -> RXF_R[src]
Bit 9 - Level of Rxframe signal
pub fn tff(&self) -> TFF_R[src]
Bit 12 - Txframe fall flag
pub fn tfr(&self) -> TFR_R[src]
Bit 13 - Txframe rise flag
pub fn rff(&self) -> RFF_R[src]
Bit 14 - Rxframe fall flag
pub fn rfr(&self) -> RFR_R[src]
Bit 15 - Rxframe rise flag
impl R<u32, Reg<u32, _OPA_CTL>>[src]
pub fn opa0pd(&self) -> OPA0PD_R[src]
Bit 0 - OPA0 power down
pub fn t3opa0(&self) -> T3OPA0_R[src]
Bit 1 - T3 switch enable for OPA0
pub fn s1opa0(&self) -> S1OPA0_R[src]
Bit 2 - S1 switch enable for OPA0
pub fn s2opa0(&self) -> S2OPA0_R[src]
Bit 3 - S2 switch enable for OPA0
pub fn s3opa0(&self) -> S3OPA0_R[src]
Bit 4 - S3 switch enable for OPA0
pub fn opa0cal_l(&self) -> OPA0CAL_L_R[src]
Bit 5 - OPA0 offset calibration for P diff
pub fn opa0cal_h(&self) -> OPA0CAL_H_R[src]
Bit 6 - OPA0 offset calibration for N diff
pub fn opa0lpm(&self) -> OPA0LPM_R[src]
Bit 7 - OPA0 low power mode
pub fn opa1pd(&self) -> OPA1PD_R[src]
Bit 8 - OPA1 power down
pub fn t3opa1(&self) -> T3OPA1_R[src]
Bit 9 - T3 switch enable for OPA1
pub fn s1opa1(&self) -> S1OPA1_R[src]
Bit 10 - S1 switch enable for OPA1
pub fn s2opa1(&self) -> S2OPA1_R[src]
Bit 11 - S2 switch enable for OPA1
pub fn s3opa1(&self) -> S3OPA1_R[src]
Bit 12 - S3 switch enable for OPA1
pub fn opa1cal_l(&self) -> OPA1CAL_L_R[src]
Bit 13 - OPA1 offset calibration for P diff
pub fn opa1cal_h(&self) -> OPA1CAL_H_R[src]
Bit 14 - OPA1 offset calibration for N diff
pub fn opa1lpm(&self) -> OPA1LPM_R[src]
Bit 15 - OPA1 low power mode
pub fn opa2pd(&self) -> OPA2PD_R[src]
Bit 16 - OPA2 power down
pub fn t3opa2(&self) -> T3OPA2_R[src]
Bit 17 - T3 switch enable for OPA2
pub fn s1opa2(&self) -> S1OPA2_R[src]
Bit 18 - S1 switch enable for OPA2
pub fn s2opa2(&self) -> S2OPA2_R[src]
Bit 19 - S2 switch enable for OPA2
pub fn s3opa2(&self) -> S3OPA2_R[src]
Bit 20 - S3 switch enable for OPA2
pub fn opa2cal_l(&self) -> OPA2CAL_L_R[src]
Bit 21 - OPA2 offset calibration for P diff
pub fn opa2cal_h(&self) -> OPA2CAL_H_R[src]
Bit 22 - OPA2 offset calibration for N diff
pub fn opa2lpm(&self) -> OPA2LPM_R[src]
Bit 23 - OPA2 low power mode
pub fn s4opa1(&self) -> S4OPA1_R[src]
Bit 27 - S4 switch enable for OPA1
pub fn opa_range(&self) -> OPA_RANGE_R[src]
Bit 28 - Power supply range
pub fn opa0calout(&self) -> OPA0CALOUT_R[src]
Bit 29 - OPA0 calibration output
pub fn opa1calout(&self) -> OPA1CALOUT_R[src]
Bit 30 - OPA1 calibration output
pub fn opa2calout(&self) -> OPA2CALOUT_R[src]
Bit 31 - OPA2 calibration output
impl R<u32, Reg<u32, _OPA_BT>>[src]
pub fn oa0_trim_low(&self) -> OA0_TRIM_LOW_R[src]
Bits 0:4 - OPA0, normal mode 5-bit offset trim value for PMOS pairs
pub fn oa0_trim_high(&self) -> OA0_TRIM_HIGH_R[src]
Bits 5:9 - OPA0, normal mode 5-bit offset trim value for NMOS pairs
pub fn oa1_trim_low(&self) -> OA1_TRIM_LOW_R[src]
Bits 10:14 - OPA1, normal mode 5-bit offset trim value for PMOS pairs
pub fn oa1_trim_high(&self) -> OA1_TRIM_HIGH_R[src]
Bits 15:19 - OPA1, normal mode 5-bit offset trim value for NMOS pairs
pub fn oa2_trim_low(&self) -> OA2_TRIM_LOW_R[src]
Bits 20:24 - OPA2, normal mode 5-bit offset trim value for PMOS pairs
pub fn oa2_trim_high(&self) -> OA2_TRIM_HIGH_R[src]
Bits 25:29 - OPA2, normal mode 5-bit offset trim value for NMOS pairs
pub fn ot_user(&self) -> OT_USER_R[src]
Bit 31 - user programmed trimming value
impl R<u32, Reg<u32, _OPA_LPBT>>[src]
pub fn oa0_trim_lp_low(&self) -> OA0_TRIM_LP_LOW_R[src]
Bits 0:4 - OPA0, low power mode 5-bit offset trim value for PMOS pairs
pub fn oa0_trim_lp_high(&self) -> OA0_TRIM_LP_HIGH_R[src]
Bits 5:9 - OPA0, low power mode 5-bit offset trim value for NMOS pairs
pub fn oa1_trim_lp_low(&self) -> OA1_TRIM_LP_LOW_R[src]
Bits 10:14 - OPA1, low power mode 5-bit offset trim value for PMOS pairs
pub fn oa1_trim_lp_high(&self) -> OA1_TRIM_LP_HIGH_R[src]
Bits 15:19 - OPA1, low power mode 5-bit offset trim value for NMOS pairs
pub fn oa2_trim_lp_low(&self) -> OA2_TRIM_LP_LOW_R[src]
Bits 20:24 - OPA2, low power mode 5-bit offset trim value for PMOS pairs
pub fn oa2_trim_lp_high(&self) -> OA2_TRIM_LP_HIGH_R[src]
Bits 25:29 - OPA2, low power mode 5-bit offset trim value for NMOS pairs
impl R<u32, Reg<u32, _IVREF_CTL>>[src]
pub fn csdt(&self) -> CSDT_R[src]
Bits 0:5 - Current step data
pub fn scmod(&self) -> SCMOD_R[src]
Bit 7 - Sink current mode
pub fn cpt(&self) -> CPT_R[src]
Bits 8:12 - Current precision trim
pub fn ssel(&self) -> SSEL_R[src]
Bit 14 - Step selection
pub fn cren(&self) -> CREN_R[src]
Bit 15 - Current reference enable
pub fn vpt(&self) -> VPT_R[src]
Bits 24:28 - Voltage precision tirm
pub fn decap(&self) -> DECAP_R[src]
Bit 30 - Disconnect external capacitor
pub fn vren(&self) -> VREN_R[src]
Bit 31 - Voltage reference enable
impl R<bool, BKPWEN_A>[src]
pub fn variant(&self) -> BKPWEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u8, LVDT_A>[src]
pub fn variant(&self) -> LVDT_A[src]
Get enumerated values variant
pub fn is_v2_2(&self) -> bool[src]
Checks if the value of the field is V2_2
pub fn is_v2_3(&self) -> bool[src]
Checks if the value of the field is V2_3
pub fn is_v2_4(&self) -> bool[src]
Checks if the value of the field is V2_4
pub fn is_v2_5(&self) -> bool[src]
Checks if the value of the field is V2_5
pub fn is_v2_6(&self) -> bool[src]
Checks if the value of the field is V2_6
pub fn is_v2_7(&self) -> bool[src]
Checks if the value of the field is V2_7
pub fn is_v2_8(&self) -> bool[src]
Checks if the value of the field is V2_8
pub fn is_v2_9(&self) -> bool[src]
Checks if the value of the field is V2_9
impl R<bool, LVDEN_A>[src]
pub fn variant(&self) -> LVDEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, STBRST_A>[src]
pub fn variant(&self) -> Variant<bool, STBRST_A>[src]
Get enumerated values variant
pub fn is_clear(&self) -> bool[src]
Checks if the value of the field is CLEAR
impl R<bool, WURST_A>[src]
pub fn variant(&self) -> Variant<bool, WURST_A>[src]
Get enumerated values variant
pub fn is_clear(&self) -> bool[src]
Checks if the value of the field is CLEAR
impl R<bool, STBMOD_A>[src]
pub fn variant(&self) -> STBMOD_A[src]
Get enumerated values variant
pub fn is_deep_sleep(&self) -> bool[src]
Checks if the value of the field is DEEPSLEEP
pub fn is_standby(&self) -> bool[src]
Checks if the value of the field is STANDBY
impl R<bool, LDOLP_A>[src]
pub fn variant(&self) -> LDOLP_A[src]
Get enumerated values variant
pub fn is_normal(&self) -> bool[src]
Checks if the value of the field is NORMAL
pub fn is_low_power(&self) -> bool[src]
Checks if the value of the field is LOWPOWER
impl R<u32, Reg<u32, _CTL>>[src]
pub fn bkpwen(&self) -> BKPWEN_R[src]
Bit 8 - Backup Domain Write Enable
pub fn lvdt(&self) -> LVDT_R[src]
Bits 5:7 - Low Voltage Detector Threshold
pub fn lvden(&self) -> LVDEN_R[src]
Bit 4 - Low Voltage Detector Enable
pub fn stbrst(&self) -> STBRST_R[src]
Bit 3 - Standby Flag Reset
pub fn wurst(&self) -> WURST_R[src]
Bit 2 - Wakeup Flag Reset
pub fn stbmod(&self) -> STBMOD_R[src]
Bit 1 - Standby Mode
pub fn ldolp(&self) -> LDOLP_R[src]
Bit 0 - LDO Low Power Mode
impl R<bool, WUPEN1_A>[src]
pub fn variant(&self) -> WUPEN1_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, WUPEN0_A>[src]
pub fn variant(&self) -> WUPEN0_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, LVDF_A>[src]
pub fn variant(&self) -> LVDF_A[src]
Get enumerated values variant
pub fn is_above_threshold(&self) -> bool[src]
Checks if the value of the field is ABOVETHRESHOLD
pub fn is_below_threshold(&self) -> bool[src]
Checks if the value of the field is BELOWTHRESHOLD
impl R<bool, STBF_A>[src]
pub fn variant(&self) -> STBF_A[src]
Get enumerated values variant
pub fn is_no_standby_event(&self) -> bool[src]
Checks if the value of the field is NOSTANDBYEVENT
pub fn is_standby_event(&self) -> bool[src]
Checks if the value of the field is STANDBYEVENT
impl R<bool, WUF_A>[src]
pub fn variant(&self) -> WUF_A[src]
Get enumerated values variant
pub fn is_no_wakeup_event(&self) -> bool[src]
Checks if the value of the field is NOWAKEUPEVENT
pub fn is_wakeup_event(&self) -> bool[src]
Checks if the value of the field is WAKEUPEVENT
impl R<u32, Reg<u32, _CS>>[src]
pub fn wupen1(&self) -> WUPEN1_R[src]
Bit 9 - WKUPN1 Pin Enable
pub fn wupen0(&self) -> WUPEN0_R[src]
Bit 8 - Enable WKUP pin
pub fn lvdf(&self) -> LVDF_R[src]
Bit 2 - Low Voltage Detector Status Flag
pub fn stbf(&self) -> STBF_R[src]
Bit 1 - Standby flag
pub fn wuf(&self) -> WUF_R[src]
Bit 0 - Wakeup flag
impl R<bool, IRC8MEN_A>[src]
pub fn variant(&self) -> IRC8MEN_A[src]
Get enumerated values variant
pub fn is_off(&self) -> bool[src]
Checks if the value of the field is OFF
pub fn is_on(&self) -> bool[src]
Checks if the value of the field is ON
impl R<bool, IRC8MSTB_A>[src]
pub fn variant(&self) -> IRC8MSTB_A[src]
Get enumerated values variant
pub fn is_not_ready(&self) -> bool[src]
Checks if the value of the field is NOTREADY
pub fn is_ready(&self) -> bool[src]
Checks if the value of the field is READY
impl R<bool, HXTALSTB_A>[src]
pub fn variant(&self) -> HXTALSTB_A[src]
Get enumerated values variant
pub fn is_not_ready(&self) -> bool[src]
Checks if the value of the field is NOTREADY
pub fn is_ready(&self) -> bool[src]
Checks if the value of the field is READY
impl R<bool, HXTALBPS_A>[src]
pub fn variant(&self) -> HXTALBPS_A[src]
Get enumerated values variant
pub fn is_not_bypassed(&self) -> bool[src]
Checks if the value of the field is NOTBYPASSED
pub fn is_bypassed(&self) -> bool[src]
Checks if the value of the field is BYPASSED
impl R<bool, CKMEN_A>[src]
pub fn variant(&self) -> CKMEN_A[src]
Get enumerated values variant
pub fn is_off(&self) -> bool[src]
Checks if the value of the field is OFF
pub fn is_on(&self) -> bool[src]
Checks if the value of the field is ON
impl R<bool, PLLSTB_A>[src]
pub fn variant(&self) -> PLLSTB_A[src]
Get enumerated values variant
pub fn is_not_ready(&self) -> bool[src]
Checks if the value of the field is NOTREADY
pub fn is_ready(&self) -> bool[src]
Checks if the value of the field is READY
impl R<u32, Reg<u32, _CTL0>>[src]
pub fn irc8men(&self) -> IRC8MEN_R[src]
Bit 0 - Internal High Speed oscillator Enable
pub fn irc8mstb(&self) -> IRC8MSTB_R[src]
Bit 1 - IRC8M High Speed Internal Oscillator stabilization Flag
pub fn irc8madj(&self) -> IRC8MADJ_R[src]
Bits 3:7 - High Speed Internal Oscillator clock trim adjust value
pub fn irc8mcalib(&self) -> IRC8MCALIB_R[src]
Bits 8:15 - High Speed Internal Oscillator calibration value register
pub fn hxtalen(&self) -> HXTALEN_R[src]
Bit 16 - External High Speed oscillator Enable
pub fn hxtalstb(&self) -> HXTALSTB_R[src]
Bit 17 - External crystal oscillator (HXTAL) clock stabilization flag
pub fn hxtalbps(&self) -> HXTALBPS_R[src]
Bit 18 - External crystal oscillator (HXTAL) clock bypass mode enable
pub fn ckmen(&self) -> CKMEN_R[src]
Bit 19 - HXTAL Clock Monitor Enable
pub fn pllen(&self) -> PLLEN_R[src]
Bit 24 - PLL enable
pub fn pllstb(&self) -> PLLSTB_R[src]
Bit 25 - PLL Clock Stabilization Flag
impl R<u8, SCS_A>[src]
pub fn variant(&self) -> Variant<u8, SCS_A>[src]
Get enumerated values variant
pub fn is_irc8m(&self) -> bool[src]
Checks if the value of the field is IRC8M
pub fn is_hxtal(&self) -> bool[src]
Checks if the value of the field is HXTAL
pub fn is_pll(&self) -> bool[src]
Checks if the value of the field is PLL
impl R<u8, SCSS_A>[src]
pub fn variant(&self) -> Variant<u8, SCSS_A>[src]
Get enumerated values variant
pub fn is_irc8m(&self) -> bool[src]
Checks if the value of the field is IRC8M
pub fn is_hxtal(&self) -> bool[src]
Checks if the value of the field is HXTAL
pub fn is_pll(&self) -> bool[src]
Checks if the value of the field is PLL
impl R<u8, AHBPSC_A>[src]
pub fn variant(&self) -> Variant<u8, AHBPSC_A>[src]
Get enumerated values variant
pub fn is_div1(&self) -> bool[src]
Checks if the value of the field is DIV1
pub fn is_div2(&self) -> bool[src]
Checks if the value of the field is DIV2
pub fn is_div4(&self) -> bool[src]
Checks if the value of the field is DIV4
pub fn is_div8(&self) -> bool[src]
Checks if the value of the field is DIV8
pub fn is_div16(&self) -> bool[src]
Checks if the value of the field is DIV16
pub fn is_div64(&self) -> bool[src]
Checks if the value of the field is DIV64
pub fn is_div128(&self) -> bool[src]
Checks if the value of the field is DIV128
pub fn is_div256(&self) -> bool[src]
Checks if the value of the field is DIV256
pub fn is_div512(&self) -> bool[src]
Checks if the value of the field is DIV512
impl R<u8, APB1PSC_A>[src]
pub fn variant(&self) -> Variant<u8, APB1PSC_A>[src]
Get enumerated values variant
pub fn is_div1(&self) -> bool[src]
Checks if the value of the field is DIV1
pub fn is_div2(&self) -> bool[src]
Checks if the value of the field is DIV2
pub fn is_div4(&self) -> bool[src]
Checks if the value of the field is DIV4
pub fn is_div8(&self) -> bool[src]
Checks if the value of the field is DIV8
pub fn is_div16(&self) -> bool[src]
Checks if the value of the field is DIV16
impl R<u8, ADCPSC_A>[src]
pub fn variant(&self) -> ADCPSC_A[src]
Get enumerated values variant
pub fn is_div2(&self) -> bool[src]
Checks if the value of the field is DIV2
pub fn is_div4(&self) -> bool[src]
Checks if the value of the field is DIV4
pub fn is_div6(&self) -> bool[src]
Checks if the value of the field is DIV6
pub fn is_div8(&self) -> bool[src]
Checks if the value of the field is DIV8
impl R<bool, PLLSEL_A>[src]
pub fn variant(&self) -> PLLSEL_A[src]
Get enumerated values variant
pub fn is_irc8m_2(&self) -> bool[src]
Checks if the value of the field is IRC8M_2
pub fn is_hxtal(&self) -> bool[src]
Checks if the value of the field is HXTAL
impl R<bool, PLLPREDV_A>[src]
pub fn variant(&self) -> PLLPREDV_A[src]
Get enumerated values variant
pub fn is_div1(&self) -> bool[src]
Checks if the value of the field is DIV1
pub fn is_div2(&self) -> bool[src]
Checks if the value of the field is DIV2
impl R<u8, PLLMF_A>[src]
pub fn variant(&self) -> PLLMF_A[src]
Get enumerated values variant
pub fn is_mul2(&self) -> bool[src]
Checks if the value of the field is MUL2
pub fn is_mul3(&self) -> bool[src]
Checks if the value of the field is MUL3
pub fn is_mul4(&self) -> bool[src]
Checks if the value of the field is MUL4
pub fn is_mul5(&self) -> bool[src]
Checks if the value of the field is MUL5
pub fn is_mul6(&self) -> bool[src]
Checks if the value of the field is MUL6
pub fn is_mul7(&self) -> bool[src]
Checks if the value of the field is MUL7
pub fn is_mul8(&self) -> bool[src]
Checks if the value of the field is MUL8
pub fn is_mul9(&self) -> bool[src]
Checks if the value of the field is MUL9
pub fn is_mul10(&self) -> bool[src]
Checks if the value of the field is MUL10
pub fn is_mul11(&self) -> bool[src]
Checks if the value of the field is MUL11
pub fn is_mul12(&self) -> bool[src]
Checks if the value of the field is MUL12
pub fn is_mul13(&self) -> bool[src]
Checks if the value of the field is MUL13
pub fn is_mul14(&self) -> bool[src]
Checks if the value of the field is MUL14
pub fn is_mul15(&self) -> bool[src]
Checks if the value of the field is MUL15
pub fn is_mul16(&self) -> bool[src]
Checks if the value of the field is MUL16
pub fn is_mul16x(&self) -> bool[src]
Checks if the value of the field is MUL16X
impl R<u8, USBDPSC_A>[src]
pub fn variant(&self) -> USBDPSC_A[src]
Get enumerated values variant
pub fn is_div1_5(&self) -> bool[src]
Checks if the value of the field is DIV1_5
pub fn is_div1(&self) -> bool[src]
Checks if the value of the field is DIV1
pub fn is_div2_5(&self) -> bool[src]
Checks if the value of the field is DIV2_5
pub fn is_div2(&self) -> bool[src]
Checks if the value of the field is DIV2
impl R<u8, CKOUTSEL_A>[src]
pub fn variant(&self) -> CKOUTSEL_A[src]
Get enumerated values variant
pub fn is_none(&self) -> bool[src]
Checks if the value of the field is NONE
pub fn is_irc14m(&self) -> bool[src]
Checks if the value of the field is IRC14M
pub fn is_lsi40k(&self) -> bool[src]
Checks if the value of the field is LSI40K
pub fn is_lxtal(&self) -> bool[src]
Checks if the value of the field is LXTAL
pub fn is_sysclk(&self) -> bool[src]
Checks if the value of the field is SYSCLK
pub fn is_irc8m(&self) -> bool[src]
Checks if the value of the field is IRC8M
pub fn is_hxtal(&self) -> bool[src]
Checks if the value of the field is HXTAL
pub fn is_pll(&self) -> bool[src]
Checks if the value of the field is PLL
impl R<bool, PLLMF_MSB_A>[src]
pub fn variant(&self) -> PLLMF_MSB_A[src]
Get enumerated values variant
pub fn is_none(&self) -> bool[src]
Checks if the value of the field is NONE
pub fn is_plus15(&self) -> bool[src]
Checks if the value of the field is PLUS15
impl R<u8, CKOUTDIV_A>[src]
pub fn variant(&self) -> CKOUTDIV_A[src]
Get enumerated values variant
pub fn is_div1(&self) -> bool[src]
Checks if the value of the field is DIV1
pub fn is_div2(&self) -> bool[src]
Checks if the value of the field is DIV2
pub fn is_div4(&self) -> bool[src]
Checks if the value of the field is DIV4
pub fn is_div8(&self) -> bool[src]
Checks if the value of the field is DIV8
pub fn is_div16(&self) -> bool[src]
Checks if the value of the field is DIV16
pub fn is_div32(&self) -> bool[src]
Checks if the value of the field is DIV32
pub fn is_div64(&self) -> bool[src]
Checks if the value of the field is DIV64
pub fn is_div128(&self) -> bool[src]
Checks if the value of the field is DIV128
impl R<bool, PLLDV_A>[src]
pub fn variant(&self) -> PLLDV_A[src]
Get enumerated values variant
pub fn is_div2(&self) -> bool[src]
Checks if the value of the field is DIV2
pub fn is_div1(&self) -> bool[src]
Checks if the value of the field is DIV1
impl R<u32, Reg<u32, _CFG0>>[src]
pub fn scs(&self) -> SCS_R[src]
Bits 0:1 - System clock switch
pub fn scss(&self) -> SCSS_R[src]
Bits 2:3 - System clock switch status
pub fn ahbpsc(&self) -> AHBPSC_R[src]
Bits 4:7 - AHB prescaler selection
pub fn apb1psc(&self) -> APB1PSC_R[src]
Bits 8:10 - APB1 prescaler selection
pub fn apb2psc(&self) -> APB2PSC_R[src]
Bits 11:13 - APB2 prescaler selection
pub fn adcpsc(&self) -> ADCPSC_R[src]
Bits 14:15 - ADC clock prescaler selection
pub fn pllsel(&self) -> PLLSEL_R[src]
Bit 16 - PLL Clock Source Selection
pub fn pllpredv(&self) -> PLLPREDV_R[src]
Bit 17 - HXTAL divider for PLL source clock selection.
pub fn pllmf(&self) -> PLLMF_R[src]
Bits 18:21 - PLL multiply factor
pub fn usbdpsc(&self) -> USBDPSC_R[src]
Bits 22:23 - USBD clock prescaler selection
pub fn ckoutsel(&self) -> CKOUTSEL_R[src]
Bits 24:26 - CK_OUT Clock Source Selection
pub fn pllmf_msb(&self) -> PLLMF_MSB_R[src]
Bit 27 - Bit 4 of PLLMF register
pub fn ckoutdiv(&self) -> CKOUTDIV_R[src]
Bits 28:30 - The CK_OUT divider which the CK_OUT frequency can be reduced
pub fn plldv(&self) -> PLLDV_R[src]
Bit 31 - The CK_PLL divide by 1 or 2 for CK_OUT
impl R<bool, IRC40KSTBIF_A>[src]
pub fn variant(&self) -> IRC40KSTBIF_A[src]
Get enumerated values variant
pub fn is_not_interrupted(&self) -> bool[src]
Checks if the value of the field is NOTINTERRUPTED
pub fn is_interrupted(&self) -> bool[src]
Checks if the value of the field is INTERRUPTED
impl R<bool, LXTALSTBIF_A>[src]
pub fn variant(&self) -> LXTALSTBIF_A[src]
Get enumerated values variant
pub fn is_not_interrupted(&self) -> bool[src]
Checks if the value of the field is NOTINTERRUPTED
pub fn is_interrupted(&self) -> bool[src]
Checks if the value of the field is INTERRUPTED
impl R<bool, IRC8MSTBIF_A>[src]
pub fn variant(&self) -> IRC8MSTBIF_A[src]
Get enumerated values variant
pub fn is_not_interrupted(&self) -> bool[src]
Checks if the value of the field is NOTINTERRUPTED
pub fn is_interrupted(&self) -> bool[src]
Checks if the value of the field is INTERRUPTED
impl R<bool, HXTALSTBIF_A>[src]
pub fn variant(&self) -> HXTALSTBIF_A[src]
Get enumerated values variant
pub fn is_not_interrupted(&self) -> bool[src]
Checks if the value of the field is NOTINTERRUPTED
pub fn is_interrupted(&self) -> bool[src]
Checks if the value of the field is INTERRUPTED
impl R<bool, PLLSTBIF_A>[src]
pub fn variant(&self) -> PLLSTBIF_A[src]
Get enumerated values variant
pub fn is_not_interrupted(&self) -> bool[src]
Checks if the value of the field is NOTINTERRUPTED
pub fn is_interrupted(&self) -> bool[src]
Checks if the value of the field is INTERRUPTED
impl R<bool, IRC14MSTBIF_A>[src]
pub fn variant(&self) -> IRC14MSTBIF_A[src]
Get enumerated values variant
pub fn is_not_interrupted(&self) -> bool[src]
Checks if the value of the field is NOTINTERRUPTED
pub fn is_interrupted(&self) -> bool[src]
Checks if the value of the field is INTERRUPTED
impl R<bool, CKMIF_A>[src]
pub fn variant(&self) -> CKMIF_A[src]
Get enumerated values variant
pub fn is_not_interrupted(&self) -> bool[src]
Checks if the value of the field is NOTINTERRUPTED
pub fn is_interrupted(&self) -> bool[src]
Checks if the value of the field is INTERRUPTED
impl R<bool, IRC40KSTBIE_A>[src]
pub fn variant(&self) -> IRC40KSTBIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, LXTALSTBIE_A>[src]
pub fn variant(&self) -> LXTALSTBIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, IRC8MSTBIE_A>[src]
pub fn variant(&self) -> IRC8MSTBIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, HXTALSTBIE_A>[src]
pub fn variant(&self) -> HXTALSTBIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, PLLSTBIE_A>[src]
pub fn variant(&self) -> PLLSTBIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, IRC14MSTBIE_A>[src]
pub fn variant(&self) -> IRC14MSTBIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _INT>>[src]
pub fn irc40kstbif(&self) -> IRC40KSTBIF_R[src]
Bit 0 - IRC40K stabilization interrupt flag
pub fn lxtalstbif(&self) -> LXTALSTBIF_R[src]
Bit 1 - LXTAL stabilization interrupt flag
pub fn irc8mstbif(&self) -> IRC8MSTBIF_R[src]
Bit 2 - IRC8M stabilization interrupt flag
pub fn hxtalstbif(&self) -> HXTALSTBIF_R[src]
Bit 3 - HXTAL stabilization interrupt flag
pub fn pllstbif(&self) -> PLLSTBIF_R[src]
Bit 4 - PLL stabilization interrupt flag
pub fn irc14mstbif(&self) -> IRC14MSTBIF_R[src]
Bit 5 - IRC14M stabilization interrupt flag
pub fn ckmif(&self) -> CKMIF_R[src]
Bit 7 - HXTAL Clock Stuck Interrupt Flag
pub fn irc40kstbie(&self) -> IRC40KSTBIE_R[src]
Bit 8 - IRC40K Stabilization interrupt enable
pub fn lxtalstbie(&self) -> LXTALSTBIE_R[src]
Bit 9 - LXTAL Stabilization Interrupt Enable
pub fn irc8mstbie(&self) -> IRC8MSTBIE_R[src]
Bit 10 - IRC8M Stabilization Interrupt Enable
pub fn hxtalstbie(&self) -> HXTALSTBIE_R[src]
Bit 11 - HXTAL Stabilization Interrupt Enable
pub fn pllstbie(&self) -> PLLSTBIE_R[src]
Bit 12 - PLL Stabilization Interrupt Enable
pub fn irc14mstbie(&self) -> IRC14MSTBIE_R[src]
Bit 13 - IRC14M Stabilization Interrupt Enable
impl R<bool, CFGRST_A>[src]
pub fn variant(&self) -> Variant<bool, CFGRST_A>[src]
Get enumerated values variant
pub fn is_reset(&self) -> bool[src]
Checks if the value of the field is RESET
impl R<u32, Reg<u32, _APB2RST>>[src]
pub fn cfgrst(&self) -> CFGRST_R[src]
Bit 0 - System configuration reset
pub fn adcrst(&self) -> ADCRST_R[src]
Bit 9 - ADC reset
pub fn timer0rst(&self) -> TIMER0RST_R[src]
Bit 11 - TIMER0 reset
pub fn spi0rst(&self) -> SPI0RST_R[src]
Bit 12 - SPI0 Reset
pub fn usart0rst(&self) -> USART0RST_R[src]
Bit 14 - USART0 Reset
pub fn timer14rst(&self) -> TIMER14RST_R[src]
Bit 16 - TIMER14 reset
pub fn timer15rst(&self) -> TIMER15RST_R[src]
Bit 17 - TIMER15 reset
pub fn timer16rst(&self) -> TIMER16RST_R[src]
Bit 18 - TIMER16 reset
impl R<bool, TIMER1RST_A>[src]
pub fn variant(&self) -> Variant<bool, TIMER1RST_A>[src]
Get enumerated values variant
pub fn is_reset(&self) -> bool[src]
Checks if the value of the field is RESET
impl R<u32, Reg<u32, _APB1RST>>[src]
pub fn timer1rst(&self) -> TIMER1RST_R[src]
Bit 0 - TIMER1 timer reset
pub fn timer2rst(&self) -> TIMER2RST_R[src]
Bit 1 - TIMER2 timer reset
pub fn timer5rst(&self) -> TIMER5RST_R[src]
Bit 4 - TIMER5 timer reset
pub fn timer13rst(&self) -> TIMER13RST_R[src]
Bit 8 - TIMER13 timer reset
pub fn slcdrst(&self) -> SLCDRST_R[src]
Bit 9 - SLCD reset
pub fn wwdgtrst(&self) -> WWDGTRST_R[src]
Bit 11 - Window watchdog timer reset
pub fn spi1rst(&self) -> SPI1RST_R[src]
Bit 14 - SPI1 reset
pub fn spi2rst(&self) -> SPI2RST_R[src]
Bit 15 - SPI2 reset
pub fn usart1rst(&self) -> USART1RST_R[src]
Bit 17 - USART1 reset
pub fn i2c0rst(&self) -> I2C0RST_R[src]
Bit 21 - I2C0 reset
pub fn i2c1rst(&self) -> I2C1RST_R[src]
Bit 22 - I2C1 reset
pub fn usbdrst(&self) -> USBDRST_R[src]
Bit 23 - USBD reset
pub fn can0rst(&self) -> CAN0RST_R[src]
Bit 25 - CAN0 reset
pub fn can1rst(&self) -> CAN1RST_R[src]
Bit 26 - CAN1 reset
pub fn pmurst(&self) -> PMURST_R[src]
Bit 28 - Power control reset
pub fn dacrst(&self) -> DACRST_R[src]
Bit 29 - DAC reset
pub fn cecrst(&self) -> CECRST_R[src]
Bit 30 - HDMI CEC reset
pub fn opaivrefrst(&self) -> OPAIVREFRST_R[src]
Bit 31 - OPA and IVREF reset
impl R<bool, DMAEN_A>[src]
pub fn variant(&self) -> DMAEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _AHBEN>>[src]
pub fn dmaen(&self) -> DMAEN_R[src]
Bit 0 - DMA clock enable
pub fn sramen(&self) -> SRAMEN_R[src]
Bit 2 - SRAM interface clock enable
pub fn fmcen(&self) -> FMCEN_R[src]
Bit 4 - FMC clock enable
pub fn crcen(&self) -> CRCEN_R[src]
Bit 6 - CRC clock enable
pub fn paen(&self) -> PAEN_R[src]
Bit 17 - GPIO port A clock enable
pub fn pben(&self) -> PBEN_R[src]
Bit 18 - GPIO port B clock enable
pub fn pcen(&self) -> PCEN_R[src]
Bit 19 - GPIO port C clock enable
pub fn pden(&self) -> PDEN_R[src]
Bit 20 - GPIO port D clock enable
pub fn pfen(&self) -> PFEN_R[src]
Bit 22 - GPIO port F clock enable
pub fn tsien(&self) -> TSIEN_R[src]
Bit 24 - TSI clock enable
impl R<bool, CFGCMPEN_A>[src]
pub fn variant(&self) -> CFGCMPEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _APB2EN>>[src]
pub fn cfgcmpen(&self) -> CFGCMPEN_R[src]
Bit 0 - System configuration and comparator clock enable
pub fn adcen(&self) -> ADCEN_R[src]
Bit 9 - ADC interface clock enable
pub fn timer0en(&self) -> TIMER0EN_R[src]
Bit 11 - TIMER0 timer clock enable
pub fn spi0en(&self) -> SPI0EN_R[src]
Bit 12 - SPI0 clock enable
pub fn usart0en(&self) -> USART0EN_R[src]
Bit 14 - USART0 clock enable
pub fn timer14en(&self) -> TIMER14EN_R[src]
Bit 16 - TIMER14 timer clock enable
pub fn timer15en(&self) -> TIMER15EN_R[src]
Bit 17 - TIMER15 timer clock enable
pub fn timer16en(&self) -> TIMER16EN_R[src]
Bit 18 - TIMER16 timer clock enable
impl R<bool, TIMER1EN_A>[src]
pub fn variant(&self) -> TIMER1EN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _APB1EN>>[src]
pub fn timer1en(&self) -> TIMER1EN_R[src]
Bit 0 - TIMER1 timer clock enable
pub fn timer2en(&self) -> TIMER2EN_R[src]
Bit 1 - TIMER2 timer clock enable
pub fn timer5en(&self) -> TIMER5EN_R[src]
Bit 4 - TIMER5 timer clock enable
pub fn timer13en(&self) -> TIMER13EN_R[src]
Bit 8 - TIMER13 timer clock enable
pub fn slcden(&self) -> SLCDEN_R[src]
Bit 9 - SLCD clock enable
pub fn wwdgten(&self) -> WWDGTEN_R[src]
Bit 11 - Window watchdog timer clock enable
pub fn spi1en(&self) -> SPI1EN_R[src]
Bit 14 - SPI1 clock enable
pub fn spi2en(&self) -> SPI2EN_R[src]
Bit 15 - SPI2 clock enable
pub fn usart1en(&self) -> USART1EN_R[src]
Bit 17 - USART1 clock enable
pub fn i2c0en(&self) -> I2C0EN_R[src]
Bit 21 - I2C0 clock enable
pub fn i2c1en(&self) -> I2C1EN_R[src]
Bit 22 - I2C1 clock enable
pub fn usbden(&self) -> USBDEN_R[src]
Bit 23 - USBD clock enable
pub fn can0en(&self) -> CAN0EN_R[src]
Bit 25 - CAN0 clock enable
pub fn can1en(&self) -> CAN1EN_R[src]
Bit 26 - CAN1 clock enable
pub fn pmuen(&self) -> PMUEN_R[src]
Bit 28 - Power interface clock enable
pub fn dacen(&self) -> DACEN_R[src]
Bit 29 - DAC interface clock enable
pub fn cecen(&self) -> CECEN_R[src]
Bit 30 - HDMI CEC interface clock enable
pub fn opaivrefen(&self) -> OPAIVREFEN_R[src]
Bit 31 - OPA and IVREF clock enable
impl R<bool, LXTALEN_A>[src]
pub fn variant(&self) -> LXTALEN_A[src]
Get enumerated values variant
pub fn is_off(&self) -> bool[src]
Checks if the value of the field is OFF
pub fn is_on(&self) -> bool[src]
Checks if the value of the field is ON
impl R<bool, LXTALSTB_A>[src]
pub fn variant(&self) -> LXTALSTB_A[src]
Get enumerated values variant
pub fn is_not_ready(&self) -> bool[src]
Checks if the value of the field is NOTREADY
pub fn is_ready(&self) -> bool[src]
Checks if the value of the field is READY
impl R<bool, LXTALBPS_A>[src]
pub fn variant(&self) -> LXTALBPS_A[src]
Get enumerated values variant
pub fn is_not_bypassed(&self) -> bool[src]
Checks if the value of the field is NOTBYPASSED
pub fn is_bypassed(&self) -> bool[src]
Checks if the value of the field is BYPASSED
impl R<u8, LXTALDRI_A>[src]
pub fn variant(&self) -> LXTALDRI_A[src]
Get enumerated values variant
pub fn is_low(&self) -> bool[src]
Checks if the value of the field is LOW
pub fn is_medium_low(&self) -> bool[src]
Checks if the value of the field is MEDIUMLOW
pub fn is_medium_high(&self) -> bool[src]
Checks if the value of the field is MEDIUMHIGH
pub fn is_high(&self) -> bool[src]
Checks if the value of the field is HIGH
impl R<u8, RTCSRC_A>[src]
pub fn variant(&self) -> RTCSRC_A[src]
Get enumerated values variant
pub fn is_no_clock(&self) -> bool[src]
Checks if the value of the field is NOCLOCK
pub fn is_lxtal(&self) -> bool[src]
Checks if the value of the field is LXTAL
pub fn is_irc40k(&self) -> bool[src]
Checks if the value of the field is IRC40K
pub fn is_hxtal(&self) -> bool[src]
Checks if the value of the field is HXTAL
impl R<bool, RTCEN_A>[src]
pub fn variant(&self) -> RTCEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, BKPRST_A>[src]
pub fn variant(&self) -> BKPRST_A[src]
Get enumerated values variant
pub fn is_no_reset(&self) -> bool[src]
Checks if the value of the field is NORESET
pub fn is_reset(&self) -> bool[src]
Checks if the value of the field is RESET
impl R<u32, Reg<u32, _BDCTL>>[src]
pub fn lxtalen(&self) -> LXTALEN_R[src]
Bit 0 - LXTAL enable
pub fn lxtalstb(&self) -> LXTALSTB_R[src]
Bit 1 - External low-speed oscillator stabilization
pub fn lxtalbps(&self) -> LXTALBPS_R[src]
Bit 2 - LXTAL bypass mode enable
pub fn lxtaldri(&self) -> LXTALDRI_R[src]
Bits 3:4 - LXTAL drive capability
pub fn rtcsrc(&self) -> RTCSRC_R[src]
Bits 8:9 - RTC clock entry selection
pub fn rtcen(&self) -> RTCEN_R[src]
Bit 15 - RTC clock enable
pub fn bkprst(&self) -> BKPRST_R[src]
Bit 16 - Backup domain reset
impl R<bool, IRC40KEN_A>[src]
pub fn variant(&self) -> IRC40KEN_A[src]
Get enumerated values variant
pub fn is_off(&self) -> bool[src]
Checks if the value of the field is OFF
pub fn is_on(&self) -> bool[src]
Checks if the value of the field is ON
impl R<bool, IRC40KSTB_A>[src]
pub fn variant(&self) -> IRC40KSTB_A[src]
Get enumerated values variant
pub fn is_not_ready(&self) -> bool[src]
Checks if the value of the field is NOTREADY
pub fn is_ready(&self) -> bool[src]
Checks if the value of the field is READY
impl R<bool, V12RSTF_A>[src]
pub fn variant(&self) -> V12RSTF_A[src]
Get enumerated values variant
pub fn is_no_reset(&self) -> bool[src]
Checks if the value of the field is NORESET
pub fn is_reset(&self) -> bool[src]
Checks if the value of the field is RESET
impl R<bool, RSTFC_A>[src]
pub fn variant(&self) -> Variant<bool, RSTFC_A>[src]
Get enumerated values variant
pub fn is_clear(&self) -> bool[src]
Checks if the value of the field is CLEAR
impl R<u32, Reg<u32, _RSTSCK>>[src]
pub fn irc40ken(&self) -> IRC40KEN_R[src]
Bit 0 - IRC40K enable
pub fn irc40kstb(&self) -> IRC40KSTB_R[src]
Bit 1 - IRC40K stabilization
pub fn v12rstf(&self) -> V12RSTF_R[src]
Bit 23 - V12 domain Power reset flag
pub fn rstfc(&self) -> RSTFC_R[src]
Bit 24 - Reset flag clear
pub fn oblrstf(&self) -> OBLRSTF_R[src]
Bit 25 - Option byte loader reset flag
pub fn eprstf(&self) -> EPRSTF_R[src]
Bit 26 - External PIN reset flag
pub fn porrstf(&self) -> PORRSTF_R[src]
Bit 27 - Power reset flag
pub fn swrstf(&self) -> SWRSTF_R[src]
Bit 28 - Software reset flag
pub fn fwdgtrstf(&self) -> FWDGTRSTF_R[src]
Bit 29 - Free Watchdog timer reset flag
pub fn wwdgtrstf(&self) -> WWDGTRSTF_R[src]
Bit 30 - Window watchdog timer reset flag
pub fn lprstf(&self) -> LPRSTF_R[src]
Bit 31 - Low-power reset flag
impl R<bool, PARST_A>[src]
pub fn variant(&self) -> Variant<bool, PARST_A>[src]
Get enumerated values variant
pub fn is_reset(&self) -> bool[src]
Checks if the value of the field is RESET
impl R<u32, Reg<u32, _AHBRST>>[src]
pub fn parst(&self) -> PARST_R[src]
Bit 17 - GPIO port A reset
pub fn pbrst(&self) -> PBRST_R[src]
Bit 18 - GPIO port B reset
pub fn pcrst(&self) -> PCRST_R[src]
Bit 19 - GPIO port C reset
pub fn pdrst(&self) -> PDRST_R[src]
Bit 20 - GPIO port D reset
pub fn pfrst(&self) -> PFRST_R[src]
Bit 22 - GPIO port F reset
pub fn tsirst(&self) -> TSIRST_R[src]
Bit 24 - TSI unit reset
impl R<u8, HXTALPREDV_A>[src]
pub fn variant(&self) -> HXTALPREDV_A[src]
Get enumerated values variant
pub fn is_div1(&self) -> bool[src]
Checks if the value of the field is DIV1
pub fn is_div2(&self) -> bool[src]
Checks if the value of the field is DIV2
pub fn is_div3(&self) -> bool[src]
Checks if the value of the field is DIV3
pub fn is_div4(&self) -> bool[src]
Checks if the value of the field is DIV4
pub fn is_div5(&self) -> bool[src]
Checks if the value of the field is DIV5
pub fn is_div6(&self) -> bool[src]
Checks if the value of the field is DIV6
pub fn is_div7(&self) -> bool[src]
Checks if the value of the field is DIV7
pub fn is_div8(&self) -> bool[src]
Checks if the value of the field is DIV8
pub fn is_div9(&self) -> bool[src]
Checks if the value of the field is DIV9
pub fn is_div10(&self) -> bool[src]
Checks if the value of the field is DIV10
pub fn is_div11(&self) -> bool[src]
Checks if the value of the field is DIV11
pub fn is_div12(&self) -> bool[src]
Checks if the value of the field is DIV12
pub fn is_div13(&self) -> bool[src]
Checks if the value of the field is DIV13
pub fn is_div14(&self) -> bool[src]
Checks if the value of the field is DIV14
pub fn is_div15(&self) -> bool[src]
Checks if the value of the field is DIV15
pub fn is_div16(&self) -> bool[src]
Checks if the value of the field is DIV16
impl R<u32, Reg<u32, _CFG1>>[src]
pub fn hxtalpredv(&self) -> HXTALPREDV_R[src]
Bits 0:3 - CK_HXTAL divider previous PLL
impl R<u8, USART0SEL_A>[src]
pub fn variant(&self) -> USART0SEL_A[src]
Get enumerated values variant
pub fn is_apb2(&self) -> bool[src]
Checks if the value of the field is APB2
pub fn is_sys(&self) -> bool[src]
Checks if the value of the field is SYS
pub fn is_lxtal(&self) -> bool[src]
Checks if the value of the field is LXTAL
pub fn is_irc8m(&self) -> bool[src]
Checks if the value of the field is IRC8M
impl R<bool, CECSEL_A>[src]
pub fn variant(&self) -> CECSEL_A[src]
Get enumerated values variant
pub fn is_irc8m_div244(&self) -> bool[src]
Checks if the value of the field is IRC8M_DIV244
pub fn is_lxtal(&self) -> bool[src]
Checks if the value of the field is LXTAL
impl R<bool, ADCSEL_A>[src]
pub fn variant(&self) -> ADCSEL_A[src]
Get enumerated values variant
pub fn is_irc28m(&self) -> bool[src]
Checks if the value of the field is IRC28M
pub fn is_apb2(&self) -> bool[src]
Checks if the value of the field is APB2
impl R<bool, IRC28MDIV_A>[src]
pub fn variant(&self) -> IRC28MDIV_A[src]
Get enumerated values variant
pub fn is_div2(&self) -> bool[src]
Checks if the value of the field is DIV2
pub fn is_div1(&self) -> bool[src]
Checks if the value of the field is DIV1
impl R<u32, Reg<u32, _CFG2>>[src]
pub fn usart0sel(&self) -> USART0SEL_R[src]
Bits 0:1 - CK_USART0 clock source selection
pub fn cecsel(&self) -> CECSEL_R[src]
Bit 6 - CK_CEC clock source selection
pub fn adcsel(&self) -> ADCSEL_R[src]
Bit 8 - CK_ADC clock source selection
pub fn irc28mdiv(&self) -> IRC28MDIV_R[src]
Bit 16 - CK_IRC28M divider 2 or not
impl R<bool, IRC14MEN_A>[src]
pub fn variant(&self) -> IRC14MEN_A[src]
Get enumerated values variant
pub fn is_off(&self) -> bool[src]
Checks if the value of the field is OFF
pub fn is_on(&self) -> bool[src]
Checks if the value of the field is ON
impl R<bool, IRC14MSTB_A>[src]
pub fn variant(&self) -> IRC14MSTB_A[src]
Get enumerated values variant
pub fn is_not_ready(&self) -> bool[src]
Checks if the value of the field is NOTREADY
pub fn is_ready(&self) -> bool[src]
Checks if the value of the field is READY
impl R<u32, Reg<u32, _CTL1>>[src]
pub fn irc14men(&self) -> IRC14MEN_R[src]
Bit 0 - IRC14M Internal 14M RC oscillator Enable
pub fn irc14mstb(&self) -> IRC14MSTB_R[src]
Bit 1 - IRC14M Internal 14M RC Oscillator stabilization Flag
pub fn irc14madj(&self) -> IRC14MADJ_R[src]
Bits 3:7 - Internal 14M RC Oscillator clock trim adjust value
pub fn irc14mcalib(&self) -> IRC14MCALIB_R[src]
Bits 8:15 - Internal 14M RC Oscillator calibration value register
impl R<u8, CKOUT1SEL_A>[src]
pub fn variant(&self) -> CKOUT1SEL_A[src]
Get enumerated values variant
pub fn is_none(&self) -> bool[src]
Checks if the value of the field is NONE
pub fn is_irc28m(&self) -> bool[src]
Checks if the value of the field is IRC28M
pub fn is_lsi40k(&self) -> bool[src]
Checks if the value of the field is LSI40K
pub fn is_lxtal(&self) -> bool[src]
Checks if the value of the field is LXTAL
pub fn is_sysclk(&self) -> bool[src]
Checks if the value of the field is SYSCLK
pub fn is_irc8m(&self) -> bool[src]
Checks if the value of the field is IRC8M
pub fn is_hxtal(&self) -> bool[src]
Checks if the value of the field is HXTAL
pub fn is_pll(&self) -> bool[src]
Checks if the value of the field is PLL
impl R<u32, Reg<u32, _CFG3>>[src]
pub fn ckout1sel(&self) -> CKOUT1SEL_R[src]
Bits 0:2 - CKOUT1 Clock Source Selection
pub fn ckout1div(&self) -> CKOUT1DIV_R[src]
Bits 8:13 - The CK_OUT1 divider which the CK_OUT1 frequency can be reduced see bits 2:0 of RCU_CFG3 for CK_OUT1
impl R<bool, I2C2EN_A>[src]
pub fn variant(&self) -> I2C2EN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _ADDEN>>[src]
impl R<bool, I2C2RST_A>[src]
pub fn variant(&self) -> Variant<bool, I2C2RST_A>[src]
Get enumerated values variant
pub fn is_reset(&self) -> bool[src]
Checks if the value of the field is RESET
impl R<u32, Reg<u32, _ADDRST>>[src]
impl R<u32, KEY_A>[src]
pub fn variant(&self) -> Variant<u32, KEY_A>[src]
Get enumerated values variant
pub fn is_enable(&self) -> bool[src]
Checks if the value of the field is ENABLE
impl R<u32, Reg<u32, _VKEY>>[src]
impl R<u8, DSLPVS_A>[src]
pub fn variant(&self) -> Variant<u8, DSLPVS_A>[src]
Get enumerated values variant
pub fn is_v1_2(&self) -> bool[src]
Checks if the value of the field is V1_2
pub fn is_v1_1(&self) -> bool[src]
Checks if the value of the field is V1_1
pub fn is_v1_0(&self) -> bool[src]
Checks if the value of the field is V1_0
pub fn is_v0_9(&self) -> bool[src]
Checks if the value of the field is V0_9
impl R<u32, Reg<u32, _DSV>>[src]
impl R<bool, PDRVS_A>[src]
pub fn variant(&self) -> PDRVS_A[src]
Get enumerated values variant
pub fn is_v2_6(&self) -> bool[src]
Checks if the value of the field is V2_6
pub fn is_v1_8(&self) -> bool[src]
Checks if the value of the field is V1_8
impl R<u32, Reg<u32, _PDVSEL>>[src]
impl R<u32, Reg<u32, _TIME>>[src]
pub fn pm(&self) -> PM_R[src]
Bit 22 - AM/PM mark
pub fn hrt(&self) -> HRT_R[src]
Bits 20:21 - Hour tens in BCD format
pub fn hru(&self) -> HRU_R[src]
Bits 16:19 - Hour units in BCD format
pub fn mnt(&self) -> MNT_R[src]
Bits 12:14 - Minute tens in BCD format
pub fn mnu(&self) -> MNU_R[src]
Bits 8:11 - Minute units in BCD format
pub fn sct(&self) -> SCT_R[src]
Bits 4:6 - Second tens in BCD format
pub fn scu(&self) -> SCU_R[src]
Bits 0:3 - Second units in BCD format
impl R<u32, Reg<u32, _DATE>>[src]
pub fn yrt(&self) -> YRT_R[src]
Bits 20:23 - Year tens in BCD format
pub fn yru(&self) -> YRU_R[src]
Bits 16:19 - Year units in BCD format
pub fn dow(&self) -> DOW_R[src]
Bits 13:15 - Week day units
pub fn mont(&self) -> MONT_R[src]
Bit 12 - Month tens in BCD format
pub fn monu(&self) -> MONU_R[src]
Bits 8:11 - Month units in BCD format
pub fn dayt(&self) -> DAYT_R[src]
Bits 4:5 - Date tens in BCD format
pub fn dayu(&self) -> DAYU_R[src]
Bits 0:3 - Date units in BCD format
impl R<u32, Reg<u32, _CTL>>[src]
pub fn tseg(&self) -> TSEG_R[src]
Bit 3 - Valid event edge of time-stamp
pub fn refen(&self) -> REFEN_R[src]
Bit 4 - Reference clock detection function enable
pub fn bpshad(&self) -> BPSHAD_R[src]
Bit 5 - Shadow registers bypass control
pub fn cs(&self) -> CS_R[src]
Bit 6 - Clock System
pub fn alrm0en(&self) -> ALRM0EN_R[src]
Bit 8 - Alarm-0 function enable
pub fn tsen(&self) -> TSEN_R[src]
Bit 11 - time-stamp function enable
pub fn alrm0ie(&self) -> ALRM0IE_R[src]
Bit 12 - RTC alarm-0 interrupt enable
pub fn tsie(&self) -> TSIE_R[src]
Bit 15 - Time-stamp interrupt enable
pub fn dsm(&self) -> DSM_R[src]
Bit 18 - Daylight saving mark
pub fn cos(&self) -> COS_R[src]
Bit 19 - Calibration output selection
pub fn opol(&self) -> OPOL_R[src]
Bit 20 - Output polarity
pub fn os(&self) -> OS_R[src]
Bits 21:22 - Output selection
pub fn coen(&self) -> COEN_R[src]
Bit 23 - Calibration output enable
impl R<u32, Reg<u32, _STAT>>[src]
pub fn alrm0wf(&self) -> ALRM0WF_R[src]
Bit 0 - Alarm 0 configuration can be write flag
pub fn sopf(&self) -> SOPF_R[src]
Bit 3 - Shift function operation pending flag
pub fn ycm(&self) -> YCM_R[src]
Bit 4 - Year configuration mark
pub fn rsynf(&self) -> RSYNF_R[src]
Bit 5 - Register synchronization flag
pub fn initf(&self) -> INITF_R[src]
Bit 6 - Initialization state flag
pub fn initm(&self) -> INITM_R[src]
Bit 7 - enter initialization mode
pub fn alrm0f(&self) -> ALRM0F_R[src]
Bit 8 - Alarm-0 occurs flag
pub fn tsf(&self) -> TSF_R[src]
Bit 11 - Time-stamp flag
pub fn tsovrf(&self) -> TSOVRF_R[src]
Bit 12 - Time-stamp overflow flag
pub fn tp0f(&self) -> TP0F_R[src]
Bit 13 - RTC_TAMP0 detected flag
pub fn tp1f(&self) -> TP1F_R[src]
Bit 14 - RTC_TAMP1 detected flag
pub fn scpf(&self) -> SCPF_R[src]
Bit 16 - Smooth calibration pending flag
impl R<u32, Reg<u32, _PSC>>[src]
pub fn factor_a(&self) -> FACTOR_A_R[src]
Bits 16:22 - Asynchronous prescaler factor
pub fn factor_s(&self) -> FACTOR_S_R[src]
Bits 0:14 - Synchronous prescaler factor
impl R<u32, Reg<u32, _ALRM0TD>>[src]
pub fn mskd(&self) -> MSKD_R[src]
Bit 31 - Alarm date mask bit
pub fn dows(&self) -> DOWS_R[src]
Bit 30 - Day of the week selected
pub fn dayt(&self) -> DAYT_R[src]
Bits 28:29 - Date tens in BCD code
pub fn dayu(&self) -> DAYU_R[src]
Bits 24:27 - Date units or week day in BCD code
pub fn mskh(&self) -> MSKH_R[src]
Bit 23 - Alarm hour mask bit
pub fn pm(&self) -> PM_R[src]
Bit 22 - AM/PM flag
pub fn hrt(&self) -> HRT_R[src]
Bits 20:21 - Hour tens in BCD code
pub fn hru(&self) -> HRU_R[src]
Bits 16:19 - Hour units in BCD code
pub fn mskm(&self) -> MSKM_R[src]
Bit 15 - Alarm minutes mask bit
pub fn mnt(&self) -> MNT_R[src]
Bits 12:14 - Minutes tens in BCD code
pub fn mnu(&self) -> MNU_R[src]
Bits 8:11 - Minutes units in BCD code
pub fn msks(&self) -> MSKS_R[src]
Bit 7 - Alarm second mask bit
pub fn sct(&self) -> SCT_R[src]
Bits 4:6 - Second tens in BCD code
pub fn scu(&self) -> SCU_R[src]
Bits 0:3 - Second units in BCD code
impl R<u32, Reg<u32, _SS>>[src]
impl R<u32, Reg<u32, _TTS>>[src]
pub fn pm(&self) -> PM_R[src]
Bit 22 - AM/PM mark
pub fn hrt(&self) -> HRT_R[src]
Bits 20:21 - Hour tens in BCD code
pub fn hru(&self) -> HRU_R[src]
Bits 16:19 - Hour units in BCD code
pub fn mnt(&self) -> MNT_R[src]
Bits 12:14 - Minute tens in BCD code
pub fn mnu(&self) -> MNU_R[src]
Bits 8:11 - Minute units in BCD code
pub fn sct(&self) -> SCT_R[src]
Bits 4:6 - Second tens in BCD code
pub fn scu(&self) -> SCU_R[src]
Bits 0:3 - Second units in BCD code
impl R<u32, Reg<u32, _DTS>>[src]
pub fn dow(&self) -> DOW_R[src]
Bits 13:15 - Week day units
pub fn mont(&self) -> MONT_R[src]
Bit 12 - Month tens in BCD code
pub fn monu(&self) -> MONU_R[src]
Bits 8:11 - Month units in BCD code
pub fn dayt(&self) -> DAYT_R[src]
Bits 4:5 - Date tens in BCD code
pub fn dayu(&self) -> DAYU_R[src]
Bits 0:3 - Date units in BCD code
impl R<u32, Reg<u32, _SSTS>>[src]
impl R<u32, Reg<u32, _HRFC>>[src]
pub fn freqi(&self) -> FREQI_R[src]
Bit 15 - Increase RTC frequency by 488.5ppm
pub fn cwnd8(&self) -> CWND8_R[src]
Bit 14 - Frequency compensation window 8 second selected
pub fn cwnd16(&self) -> CWND16_R[src]
Bit 13 - Frequency compensation window 16 second selected
pub fn cmsk(&self) -> CMSK_R[src]
Bits 0:8 - Calibration mask number
impl R<u32, Reg<u32, _TAMP>>[src]
pub fn pc15mde(&self) -> PC15MDE_R[src]
Bit 23 - PC15 mode
pub fn pc15val(&self) -> PC15VAL_R[src]
Bit 22 - PC15 value
pub fn pc14mde(&self) -> PC14MDE_R[src]
Bit 21 - PC14 mode
pub fn pc14val(&self) -> PC14VAL_R[src]
Bit 20 - PC14 value
pub fn pc13mde(&self) -> PC13MDE_R[src]
Bit 19 - PC13 mode
pub fn pc13val(&self) -> PC13VAL_R[src]
Bit 18 - Alarm output type control/PC13 output value
pub fn dispu(&self) -> DISPU_R[src]
Bit 15 - RTC_TAMPx pull up disable bit
pub fn prch(&self) -> PRCH_R[src]
Bits 13:14 - Precharge duration time of RTC_TAMPx
pub fn flt(&self) -> FLT_R[src]
Bits 11:12 - RTC_TAMPx filter count setting
pub fn freq(&self) -> FREQ_R[src]
Bits 8:10 - Sample frequency of tamper event detection
pub fn tpts(&self) -> TPTS_R[src]
Bit 7 - Make tamper function used for timestamp function
pub fn tp1eg(&self) -> TP1EG_R[src]
Bit 4 - Tamper 1 event trigger edge for RTC_TAMP1 input
pub fn tp1en(&self) -> TP1EN_R[src]
Bit 3 - Tamper 1 detection enable
pub fn tpie(&self) -> TPIE_R[src]
Bit 2 - Tamper detection interrupt enable
pub fn tp0eg(&self) -> TP0EG_R[src]
Bit 1 - Tamper 0 event trigger edge for RTC_TAMP0 input
pub fn tp0en(&self) -> TP0EN_R[src]
Bit 0 - RTC_TAMP1 input detection enable
impl R<u32, Reg<u32, _ALRM0SS>>[src]
pub fn mskssc(&self) -> MSKSSC_R[src]
Bits 24:27 - Mask control bit of SSC
pub fn ssc(&self) -> SSC_R[src]
Bits 0:14 - Alarm sub second value
impl R<u32, Reg<u32, _BKP0>>[src]
impl R<u32, Reg<u32, _BKP1>>[src]
impl R<u32, Reg<u32, _BKP2>>[src]
impl R<u32, Reg<u32, _BKP3>>[src]
impl R<u32, Reg<u32, _BKP4>>[src]
impl R<u32, Reg<u32, _CTL>>[src]
pub fn slcdon(&self) -> SLCDON_R[src]
Bit 0 - SLCD controller start
pub fn vsrc(&self) -> VSRC_R[src]
Bit 1 - SLCD voltage source
pub fn duty(&self) -> DUTY_R[src]
Bits 2:4 - Duty select
pub fn bias(&self) -> BIAS_R[src]
Bits 5:6 - Bias select
pub fn coms(&self) -> COMS_R[src]
Bit 7 - Common/segment padselect
impl R<u32, Reg<u32, _CFG>>[src]
pub fn hden(&self) -> HDEN_R[src]
Bit 0 - High drive enable
pub fn sofie(&self) -> SOFIE_R[src]
Bit 1 - Start of frame interrupt enable
pub fn updie(&self) -> UPDIE_R[src]
Bit 3 - SLCD update done interrupt enable
pub fn pulse(&self) -> PULSE_R[src]
Bits 4:6 - Pulse on duration
pub fn dtd(&self) -> DTD_R[src]
Bits 7:9 - Dead time duration
pub fn conr(&self) -> CONR_R[src]
Bits 10:12 - Contrast ratio
pub fn blkdiv(&self) -> BLKDIV_R[src]
Bits 13:15 - Blink frequency divider
pub fn blkmod(&self) -> BLKMOD_R[src]
Bits 16:17 - Blink mode
pub fn div(&self) -> DIV_R[src]
Bits 18:21 - SLCD clock divider
pub fn psc(&self) -> PSC_R[src]
Bits 22:25 - SLCD clock prescaler
impl R<u32, Reg<u32, _STAT>>[src]
pub fn onf(&self) -> ONF_R[src]
Bit 0 - SLCD controller on flag
pub fn sof(&self) -> SOF_R[src]
Bit 1 - Start of frame flag
pub fn uprf(&self) -> UPRF_R[src]
Bit 2 - Update SLCD data request flag
pub fn updf(&self) -> UPDF_R[src]
Bit 3 - Update SLCD data done flag
pub fn vrdyf(&self) -> VRDYF_R[src]
Bit 4 - SLCD voltage ready flag
pub fn synf(&self) -> SYNF_R[src]
Bit 5 - SLCD_CFG register synchronization flag
impl R<u32, Reg<u32, _STATC>>[src]
pub fn sofc(&self) -> SOFC_R[src]
Bit 1 - Start of frame flag clear
pub fn updc(&self) -> UPDC_R[src]
Bit 3 - SLCD data update done clear bit
impl R<u32, Reg<u32, _DATA0>>[src]
pub fn seg_data0(&self) -> SEG_DATA0_R[src]
Bits 0:31 - Each bit corresponds to one segment to display
impl R<u32, Reg<u32, _DATA1>>[src]
pub fn seg_data1(&self) -> SEG_DATA1_R[src]
Bits 0:31 - Each bit corresponds to one segment to display
impl R<u32, Reg<u32, _DATA2>>[src]
pub fn seg_data2(&self) -> SEG_DATA2_R[src]
Bits 0:31 - Each bit corresponds to one segment to display
impl R<u32, Reg<u32, _DATA3>>[src]
pub fn seg_data3(&self) -> SEG_DATA3_R[src]
Bits 0:31 - Each bit corresponds to one segment to display
impl R<u32, Reg<u32, _DATA4>>[src]
pub fn seg_data4(&self) -> SEG_DATA4_R[src]
Bits 0:31 - Each bit corresponds to one segment to display
impl R<u32, Reg<u32, _DATA5>>[src]
pub fn seg_data5(&self) -> SEG_DATA5_R[src]
Bits 0:31 - Each bit corresponds to one segment to display
impl R<u32, Reg<u32, _DATA6>>[src]
pub fn seg_data6(&self) -> SEG_DATA6_R[src]
Bits 0:31 - Each bit corresponds to one segment to display
impl R<u32, Reg<u32, _DATA7>>[src]
pub fn seg_data7(&self) -> SEG_DATA7_R[src]
Bits 0:31 - Each bit corresponds to one segment to display
impl R<u16, Reg<u16, _CTL0>>[src]
pub fn bden(&self) -> BDEN_R[src]
Bit 15 - Bidirectional enable
pub fn bdoen(&self) -> BDOEN_R[src]
Bit 14 - Bidirectional Transmit output enable
pub fn crcen(&self) -> CRCEN_R[src]
Bit 13 - Hardware CRC calculation enable
pub fn crcnt(&self) -> CRCNT_R[src]
Bit 12 - CRC transfer next
pub fn ff16(&self) -> FF16_R[src]
Bit 11 - Data frame format
pub fn ro(&self) -> RO_R[src]
Bit 10 - Receive only
pub fn swnssen(&self) -> SWNSSEN_R[src]
Bit 9 - NSS Software Mode Selection
pub fn swnss(&self) -> SWNSS_R[src]
Bit 8 - NSS Pin Selection In NSS Software Mode
pub fn lf(&self) -> LF_R[src]
Bit 7 - LSB First Mode
pub fn spien(&self) -> SPIEN_R[src]
Bit 6 - SPI enable
pub fn psc(&self) -> PSC_R[src]
Bits 3:5 - Master Clock Prescaler Selection
pub fn mstmod(&self) -> MSTMOD_R[src]
Bit 2 - Master selection
pub fn ckpl(&self) -> CKPL_R[src]
Bit 1 - Clock Polarity Selection
pub fn ckph(&self) -> CKPH_R[src]
Bit 0 - Clock Phase Selection
impl R<u16, Reg<u16, _CTL1>>[src]
pub fn tbeie(&self) -> TBEIE_R[src]
Bit 7 - Tx buffer empty interrupt enable
pub fn rbneie(&self) -> RBNEIE_R[src]
Bit 6 - RX buffer not empty interrupt enable
pub fn errie(&self) -> ERRIE_R[src]
Bit 5 - Error interrupt enable
pub fn nssdrv(&self) -> NSSDRV_R[src]
Bit 2 - Drive NSS Output
pub fn dmaten(&self) -> DMATEN_R[src]
Bit 1 - Transmit Buffer DMA Enable
pub fn dmaren(&self) -> DMAREN_R[src]
Bit 0 - Receive Buffer DMA Enable
impl R<u16, Reg<u16, _STAT>>[src]
pub fn trans(&self) -> TRANS_R[src]
Bit 7 - Transmitting On-going Bit
pub fn rxorerr(&self) -> RXORERR_R[src]
Bit 6 - Reception Overrun Error Bit
pub fn confe(&self) -> CONFE_R[src]
Bit 5 - SPI Configuration error
pub fn crcerr(&self) -> CRCERR_R[src]
Bit 4 - SPI CRC Error Bit
pub fn txurerr(&self) -> TXURERR_R[src]
Bit 3 - Transmission underrun error bit
pub fn i2sch(&self) -> I2SCH_R[src]
Bit 2 - I2S channel side
pub fn tbe(&self) -> TBE_R[src]
Bit 1 - Transmit Buffer Empty
pub fn rbne(&self) -> RBNE_R[src]
Bit 0 - Receive Buffer Not Empty
impl R<u16, Reg<u16, _DATA>>[src]
impl R<u16, Reg<u16, _CPCPOLY>>[src]
impl R<u16, Reg<u16, _RCRC>>[src]
impl R<u16, Reg<u16, _TCRC>>[src]
impl R<u16, Reg<u16, _I2SCTL>>[src]
pub fn i2ssel(&self) -> I2SSEL_R[src]
Bit 11 - I2S mode selection
pub fn i2sen(&self) -> I2SEN_R[src]
Bit 10 - I2S Enable
pub fn i2sopmod(&self) -> I2SOPMOD_R[src]
Bits 8:9 - I2S configuration mode
pub fn pcmsmod(&self) -> PCMSMOD_R[src]
Bit 7 - PCM frame synchronization mode
pub fn i2sstd(&self) -> I2SSTD_R[src]
Bits 4:5 - I2S standard selection
pub fn ckpl(&self) -> CKPL_R[src]
Bit 3 - Idle state clock polarity
pub fn dtlen(&self) -> DTLEN_R[src]
Bits 1:2 - Data length
pub fn chlen(&self) -> CHLEN_R[src]
Bit 0 - Channel length
impl R<u16, Reg<u16, _I2SPSC>>[src]
pub fn mckoen(&self) -> MCKOEN_R[src]
Bit 9 - I2S_MCK output enable
pub fn of(&self) -> OF_R[src]
Bit 8 - Odd factor for the prescaler
pub fn div(&self) -> DIV_R[src]
Bits 0:7 - Dividing factor for the prescaler
impl R<u16, Reg<u16, _QCTL>>[src]
pub fn io23_drv(&self) -> IO23_DRV_R[src]
Bit 2 - Drive IO2 and IO3 enable
pub fn qrd(&self) -> QRD_R[src]
Bit 1 - Quad wire read select
pub fn qmod(&self) -> QMOD_R[src]
Bit 0 - Quad wire mode enable
impl R<u32, Reg<u32, _CFG0>>[src]
pub fn pb9_hcce(&self) -> PB9_HCCE_R[src]
Bit 19 - PB9 pin high current capability enable
pub fn timer16_dma_rmp(&self) -> TIMER16_DMA_RMP_R[src]
Bit 12 - Timer 16 DMA request remapping enable
pub fn timer15_dma_rmp(&self) -> TIMER15_DMA_RMP_R[src]
Bit 11 - Timer 15 DMA request remapping enable
pub fn usart0_rx_dma_rmp(&self) -> USART0_RX_DMA_RMP_R[src]
Bit 10 - USART0_RX DMA request remapping enable
pub fn usart0_tx_dma_rmp(&self) -> USART0_TX_DMA_RMP_R[src]
Bit 9 - USART0_TX DMA request remapping enable
pub fn adc_dma_rmp(&self) -> ADC_DMA_RMP_R[src]
Bit 8 - ADC DMA request remapping enable
pub fn boot_mode(&self) -> BOOT_MODE_R[src]
Bits 0:1 - Boot mode
impl R<u32, Reg<u32, _CFG1>>[src]
pub fn slcd_deca(&self) -> SLCD_DECA_R[src]
Bits 1:3 - Decoupling capacitance connection for SLCD
impl R<u32, Reg<u32, _EXTISS0>>[src]
pub fn exti3_ss(&self) -> EXTI3_SS_R[src]
Bits 12:15 - EXTI 3 sources selection
pub fn exti2_ss(&self) -> EXTI2_SS_R[src]
Bits 8:11 - EXTI 2 sources selection
pub fn exti1_ss(&self) -> EXTI1_SS_R[src]
Bits 4:7 - EXTI 1 sources selection
pub fn exti0_ss(&self) -> EXTI0_SS_R[src]
Bits 0:3 - EXTI 0 sources selection
impl R<u32, Reg<u32, _EXTISS1>>[src]
pub fn exti7_ss(&self) -> EXTI7_SS_R[src]
Bits 12:15 - EXTI 7 sources selection
pub fn exti6_ss(&self) -> EXTI6_SS_R[src]
Bits 8:11 - EXTI 6 sources selection
pub fn exti5_ss(&self) -> EXTI5_SS_R[src]
Bits 4:7 - EXTI 5 sources selection
pub fn exti4_ss(&self) -> EXTI4_SS_R[src]
Bits 0:3 - EXTI 4 sources selection
impl R<u32, Reg<u32, _EXTISS2>>[src]
pub fn exti11_ss(&self) -> EXTI11_SS_R[src]
Bits 12:15 - EXTI 11 sources selection
pub fn exti10_ss(&self) -> EXTI10_SS_R[src]
Bits 8:11 - EXTI 10 sources selection
pub fn exti9_ss(&self) -> EXTI9_SS_R[src]
Bits 4:7 - EXTI 9 sources selection
pub fn exti8_ss(&self) -> EXTI8_SS_R[src]
Bits 0:3 - EXTI 8 sources selection
impl R<u32, Reg<u32, _EXTISS3>>[src]
pub fn exti15_ss(&self) -> EXTI15_SS_R[src]
Bits 12:15 - EXTI 15 sources selection
pub fn exti14_ss(&self) -> EXTI14_SS_R[src]
Bits 8:11 - EXTI 14 sources selection
pub fn exti13_ss(&self) -> EXTI13_SS_R[src]
Bits 4:7 - EXTI 13 sources selection
pub fn exti12_ss(&self) -> EXTI12_SS_R[src]
Bits 0:3 - EXTI 12 sources selection
impl R<u32, Reg<u32, _CFG2>>[src]
pub fn sram_pcef(&self) -> SRAM_PCEF_R[src]
Bit 8 - SRAM parity check error flag
pub fn lvd_lock(&self) -> LVD_LOCK_R[src]
Bit 2 - LVD lock
pub fn sram_parity_error_lock(&self) -> SRAM_PARITY_ERROR_LOCK_R[src]
Bit 1 - SRAM parity check error lock
pub fn lockup_lock(&self) -> LOCKUP_LOCK_R[src]
Bit 0 - Cortex-M3 LOCKUP output lock
impl R<u8, CKDIV_A>[src]
pub fn variant(&self) -> Variant<u8, CKDIV_A>[src]
Get enumerated values variant
pub fn is_div1(&self) -> bool[src]
Checks if the value of the field is DIV1
pub fn is_div2(&self) -> bool[src]
Checks if the value of the field is DIV2
pub fn is_div4(&self) -> bool[src]
Checks if the value of the field is DIV4
impl R<bool, ARSE_A>[src]
pub fn variant(&self) -> ARSE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u8, CAM_A>[src]
pub fn variant(&self) -> CAM_A[src]
Get enumerated values variant
pub fn is_edge_aligned(&self) -> bool[src]
Checks if the value of the field is EDGEALIGNED
pub fn is_center_aligned_counting_down(&self) -> bool[src]
Checks if the value of the field is CENTERALIGNEDCOUNTINGDOWN
pub fn is_center_aligned_counting_up(&self) -> bool[src]
Checks if the value of the field is CENTERALIGNEDCOUNTINGUP
pub fn is_center_aligned_counting_up_down(&self) -> bool[src]
Checks if the value of the field is CENTERALIGNEDCOUNTINGUPDOWN
impl R<bool, DIR_A>[src]
pub fn variant(&self) -> DIR_A[src]
Get enumerated values variant
pub fn is_up(&self) -> bool[src]
Checks if the value of the field is UP
pub fn is_down(&self) -> bool[src]
Checks if the value of the field is DOWN
impl R<bool, SPM_A>[src]
pub fn variant(&self) -> SPM_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, UPS_A>[src]
pub fn variant(&self) -> UPS_A[src]
Get enumerated values variant
pub fn is_any_event(&self) -> bool[src]
Checks if the value of the field is ANYEVENT
pub fn is_counter_only(&self) -> bool[src]
Checks if the value of the field is COUNTERONLY
impl R<bool, UPDIS_A>[src]
pub fn variant(&self) -> UPDIS_A[src]
Get enumerated values variant
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
impl R<bool, CEN_A>[src]
pub fn variant(&self) -> CEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u16, Reg<u16, _CTL0>>[src]
pub fn ckdiv(&self) -> CKDIV_R[src]
Bits 8:9 - Clock division
pub fn arse(&self) -> ARSE_R[src]
Bit 7 - Auto-reload shadow enable
pub fn cam(&self) -> CAM_R[src]
Bits 5:6 - Counter aligns mode selection
pub fn dir(&self) -> DIR_R[src]
Bit 4 - Direction
pub fn spm(&self) -> SPM_R[src]
Bit 3 - Single pulse mode
pub fn ups(&self) -> UPS_R[src]
Bit 2 - Update source
pub fn updis(&self) -> UPDIS_R[src]
Bit 1 - Update disable
pub fn cen(&self) -> CEN_R[src]
Bit 0 - Counter enable
impl R<bool, ISO3_A>[src]
pub fn variant(&self) -> ISO3_A[src]
Get enumerated values variant
pub fn is_low(&self) -> bool[src]
Checks if the value of the field is LOW
pub fn is_high(&self) -> bool[src]
Checks if the value of the field is HIGH
impl R<bool, ISO2N_A>[src]
pub fn variant(&self) -> ISO2N_A[src]
Get enumerated values variant
pub fn is_low(&self) -> bool[src]
Checks if the value of the field is LOW
pub fn is_high(&self) -> bool[src]
Checks if the value of the field is HIGH
impl R<bool, ISO2_A>[src]
pub fn variant(&self) -> ISO2_A[src]
Get enumerated values variant
pub fn is_low(&self) -> bool[src]
Checks if the value of the field is LOW
pub fn is_high(&self) -> bool[src]
Checks if the value of the field is HIGH
impl R<bool, ISO1N_A>[src]
pub fn variant(&self) -> ISO1N_A[src]
Get enumerated values variant
pub fn is_low(&self) -> bool[src]
Checks if the value of the field is LOW
pub fn is_high(&self) -> bool[src]
Checks if the value of the field is HIGH
impl R<bool, ISO1_A>[src]
pub fn variant(&self) -> ISO1_A[src]
Get enumerated values variant
pub fn is_low(&self) -> bool[src]
Checks if the value of the field is LOW
pub fn is_high(&self) -> bool[src]
Checks if the value of the field is HIGH
impl R<bool, ISO0N_A>[src]
pub fn variant(&self) -> ISO0N_A[src]
Get enumerated values variant
pub fn is_low(&self) -> bool[src]
Checks if the value of the field is LOW
pub fn is_high(&self) -> bool[src]
Checks if the value of the field is HIGH
impl R<bool, ISO0_A>[src]
pub fn variant(&self) -> ISO0_A[src]
Get enumerated values variant
pub fn is_low(&self) -> bool[src]
Checks if the value of the field is LOW
pub fn is_high(&self) -> bool[src]
Checks if the value of the field is HIGH
impl R<bool, TI0S_A>[src]
pub fn variant(&self) -> TI0S_A[src]
Get enumerated values variant
pub fn is_normal(&self) -> bool[src]
Checks if the value of the field is NORMAL
pub fn is_xor(&self) -> bool[src]
Checks if the value of the field is XOR
impl R<u8, MMC_A>[src]
pub fn variant(&self) -> MMC_A[src]
Get enumerated values variant
pub fn is_reset(&self) -> bool[src]
Checks if the value of the field is RESET
pub fn is_enable(&self) -> bool[src]
Checks if the value of the field is ENABLE
pub fn is_update(&self) -> bool[src]
Checks if the value of the field is UPDATE
pub fn is_capture_compare_pulse(&self) -> bool[src]
Checks if the value of the field is CAPTURECOMPAREPULSE
pub fn is_compare_o0c(&self) -> bool[src]
Checks if the value of the field is COMPAREO0C
pub fn is_compare_o1c(&self) -> bool[src]
Checks if the value of the field is COMPAREO1C
pub fn is_compare_o2c(&self) -> bool[src]
Checks if the value of the field is COMPAREO2C
pub fn is_compare_o3c(&self) -> bool[src]
Checks if the value of the field is COMPAREO3C
impl R<bool, DMAS_A>[src]
pub fn variant(&self) -> DMAS_A[src]
Get enumerated values variant
pub fn is_on_compare(&self) -> bool[src]
Checks if the value of the field is ONCOMPARE
pub fn is_on_update(&self) -> bool[src]
Checks if the value of the field is ONUPDATE
impl R<bool, CCUC_A>[src]
pub fn variant(&self) -> CCUC_A[src]
Get enumerated values variant
pub fn is_default(&self) -> bool[src]
Checks if the value of the field is DEFAULT
pub fn is_with_rising_edge(&self) -> bool[src]
Checks if the value of the field is WITHRISINGEDGE
impl R<bool, CCSE_A>[src]
pub fn variant(&self) -> CCSE_A[src]
Get enumerated values variant
pub fn is_not_preloaded(&self) -> bool[src]
Checks if the value of the field is NOTPRELOADED
pub fn is_preloaded(&self) -> bool[src]
Checks if the value of the field is PRELOADED
impl R<u16, Reg<u16, _CTL1>>[src]
pub fn iso3(&self) -> ISO3_R[src]
Bit 14 - Idle state of channel 3 output
pub fn iso2n(&self) -> ISO2N_R[src]
Bit 13 - Idle state of channel 2 complementary output
pub fn iso2(&self) -> ISO2_R[src]
Bit 12 - Idle state of channel 2 output
pub fn iso1n(&self) -> ISO1N_R[src]
Bit 11 - Idle state of channel 1 complementary output
pub fn iso1(&self) -> ISO1_R[src]
Bit 10 - Idle state of channel 1 output
pub fn iso0n(&self) -> ISO0N_R[src]
Bit 9 - Idle state of channel 0 complementary output
pub fn iso0(&self) -> ISO0_R[src]
Bit 8 - Idle state of channel 0 output
pub fn ti0s(&self) -> TI0S_R[src]
Bit 7 - Channel 0 trigger input selection
pub fn mmc(&self) -> MMC_R[src]
Bits 4:6 - Master mode control
pub fn dmas(&self) -> DMAS_R[src]
Bit 3 - DMA request source selection
pub fn ccuc(&self) -> CCUC_R[src]
Bit 2 - Commutation control shadow register update control
pub fn ccse(&self) -> CCSE_R[src]
Bit 0 - Commutation control shadow register enable
impl R<bool, ETP_A>[src]
pub fn variant(&self) -> ETP_A[src]
Get enumerated values variant
pub fn is_not_inverted(&self) -> bool[src]
Checks if the value of the field is NOTINVERTED
pub fn is_inverted(&self) -> bool[src]
Checks if the value of the field is INVERTED
impl R<bool, SMC1_A>[src]
pub fn variant(&self) -> SMC1_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u8, ETPSC_A>[src]
pub fn variant(&self) -> ETPSC_A[src]
Get enumerated values variant
pub fn is_div1(&self) -> bool[src]
Checks if the value of the field is DIV1
pub fn is_div2(&self) -> bool[src]
Checks if the value of the field is DIV2
pub fn is_div4(&self) -> bool[src]
Checks if the value of the field is DIV4
pub fn is_div8(&self) -> bool[src]
Checks if the value of the field is DIV8
impl R<u8, ETFC_A>[src]
pub fn variant(&self) -> ETFC_A[src]
Get enumerated values variant
pub fn is_no_filter(&self) -> bool[src]
Checks if the value of the field is NOFILTER
pub fn is_fck_int_n2(&self) -> bool[src]
Checks if the value of the field is FCK_INT_N2
pub fn is_fck_int_n4(&self) -> bool[src]
Checks if the value of the field is FCK_INT_N4
pub fn is_fck_int_n8(&self) -> bool[src]
Checks if the value of the field is FCK_INT_N8
pub fn is_fdts_div2_n6(&self) -> bool[src]
Checks if the value of the field is FDTS_DIV2_N6
pub fn is_fdts_div2_n8(&self) -> bool[src]
Checks if the value of the field is FDTS_DIV2_N8
pub fn is_fdts_div4_n6(&self) -> bool[src]
Checks if the value of the field is FDTS_DIV4_N6
pub fn is_fdts_div4_n8(&self) -> bool[src]
Checks if the value of the field is FDTS_DIV4_N8
pub fn is_fdts_div8_n6(&self) -> bool[src]
Checks if the value of the field is FDTS_DIV8_N6
pub fn is_fdts_div8_n8(&self) -> bool[src]
Checks if the value of the field is FDTS_DIV8_N8
pub fn is_fdts_div16_n5(&self) -> bool[src]
Checks if the value of the field is FDTS_DIV16_N5
pub fn is_fdts_div16_n6(&self) -> bool[src]
Checks if the value of the field is FDTS_DIV16_N6
pub fn is_fdts_div16_n8(&self) -> bool[src]
Checks if the value of the field is FDTS_DIV16_N8
pub fn is_fdts_div32_n5(&self) -> bool[src]
Checks if the value of the field is FDTS_DIV32_N5
pub fn is_fdts_div32_n6(&self) -> bool[src]
Checks if the value of the field is FDTS_DIV32_N6
pub fn is_fdts_div32_n8(&self) -> bool[src]
Checks if the value of the field is FDTS_DIV32_N8
impl R<bool, MSM_A>[src]
pub fn variant(&self) -> MSM_A[src]
Get enumerated values variant
pub fn is_no_sync(&self) -> bool[src]
Checks if the value of the field is NOSYNC
pub fn is_sync(&self) -> bool[src]
Checks if the value of the field is SYNC
impl R<u8, TRGS_A>[src]
pub fn variant(&self) -> Variant<u8, TRGS_A>[src]
Get enumerated values variant
pub fn is_iti0(&self) -> bool[src]
Checks if the value of the field is ITI0
pub fn is_iti1(&self) -> bool[src]
Checks if the value of the field is ITI1
pub fn is_iti2(&self) -> bool[src]
Checks if the value of the field is ITI2
pub fn is_ci0f_ed(&self) -> bool[src]
Checks if the value of the field is CI0F_ED
pub fn is_ci0fe0(&self) -> bool[src]
Checks if the value of the field is CI0FE0
pub fn is_ci1fe1(&self) -> bool[src]
Checks if the value of the field is CI1FE1
pub fn is_etifp(&self) -> bool[src]
Checks if the value of the field is ETIFP
impl R<bool, OCRC_A>[src]
pub fn variant(&self) -> OCRC_A[src]
Get enumerated values variant
pub fn is_input(&self) -> bool[src]
Checks if the value of the field is INPUT
pub fn is_etif(&self) -> bool[src]
Checks if the value of the field is ETIF
impl R<u8, SMC_A>[src]
pub fn variant(&self) -> SMC_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_quadrature_decoder_mode0(&self) -> bool[src]
Checks if the value of the field is QUADRATUREDECODERMODE0
pub fn is_quadrature_decoder_mode1(&self) -> bool[src]
Checks if the value of the field is QUADRATUREDECODERMODE1
pub fn is_quadrature_decoder_mode2(&self) -> bool[src]
Checks if the value of the field is QUADRATUREDECODERMODE2
pub fn is_restart_mode(&self) -> bool[src]
Checks if the value of the field is RESTARTMODE
pub fn is_pause_mode(&self) -> bool[src]
Checks if the value of the field is PAUSEMODE
pub fn is_event_mode(&self) -> bool[src]
Checks if the value of the field is EVENTMODE
pub fn is_external_clock_mode(&self) -> bool[src]
Checks if the value of the field is EXTERNALCLOCKMODE
impl R<u16, Reg<u16, _SMCFG>>[src]
pub fn etp(&self) -> ETP_R[src]
Bit 15 - External trigger polarity
pub fn smc1(&self) -> SMC1_R[src]
Bit 14 - Part of SMC for enable External clock mode1
pub fn etpsc(&self) -> ETPSC_R[src]
Bits 12:13 - External trigger prescaler
pub fn etfc(&self) -> ETFC_R[src]
Bits 8:11 - External trigger filter control
pub fn msm(&self) -> MSM_R[src]
Bit 7 - Master/Slave mode
pub fn trgs(&self) -> TRGS_R[src]
Bits 4:6 - Trigger selection
pub fn ocrc(&self) -> OCRC_R[src]
Bit 3 - OCPRE clear source selection
pub fn smc(&self) -> SMC_R[src]
Bits 0:2 - Slave mode control
impl R<bool, UPDEN_A>[src]
pub fn variant(&self) -> UPDEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, UPIE_A>[src]
pub fn variant(&self) -> UPIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u16, Reg<u16, _DMAINTEN>>[src]
pub fn trgden(&self) -> TRGDEN_R[src]
Bit 14 - Trigger DMA request enable
pub fn cmtden(&self) -> CMTDEN_R[src]
Bit 13 - CMT DMA request enable
pub fn ch3den(&self) -> CH3DEN_R[src]
Bit 12 - Channel 3 Capture/Compare DMA request enable
pub fn ch2den(&self) -> CH2DEN_R[src]
Bit 11 - Channel 2 Capture/Compare DMA request enable
pub fn ch1den(&self) -> CH1DEN_R[src]
Bit 10 - Channel 1 Capture/Compare DMA request enable
pub fn ch0den(&self) -> CH0DEN_R[src]
Bit 9 - Channel 0 Capture/Compare DMA request enable
pub fn upden(&self) -> UPDEN_R[src]
Bit 8 - Update DMA request enable
pub fn brkie(&self) -> BRKIE_R[src]
Bit 7 - Break interrupt enable
pub fn trgie(&self) -> TRGIE_R[src]
Bit 6 - Trigger interrupt enable
pub fn cmtie(&self) -> CMTIE_R[src]
Bit 5 - CMT interrupt enable
pub fn ch3ie(&self) -> CH3IE_R[src]
Bit 4 - Channel 3 Capture/Compare interrupt enable
pub fn ch2ie(&self) -> CH2IE_R[src]
Bit 3 - Channel 2 Capture/Compare interrupt enable
pub fn ch1ie(&self) -> CH1IE_R[src]
Bit 2 - Channel 1 Capture/Compare interrupt enable
pub fn ch0ie(&self) -> CH0IE_R[src]
Bit 1 - Channel 0 Capture/Compare interrupt enable
pub fn upie(&self) -> UPIE_R[src]
Bit 0 - Update interrupt enable
impl R<bool, UPIF_A>[src]
pub fn variant(&self) -> UPIF_A[src]
Get enumerated values variant
pub fn is_clear(&self) -> bool[src]
Checks if the value of the field is CLEAR
pub fn is_update_pending(&self) -> bool[src]
Checks if the value of the field is UPDATEPENDING
impl R<u16, Reg<u16, _INTF>>[src]
pub fn ch3of(&self) -> CH3OF_R[src]
Bit 12 - Channel 3 Capture overflow flag
pub fn ch2of(&self) -> CH2OF_R[src]
Bit 11 - Channel 2 Capture overflow flag
pub fn ch1of(&self) -> CH1OF_R[src]
Bit 10 - Channel 2 Capture overflow flag
pub fn ch0of(&self) -> CH0OF_R[src]
Bit 9 - Channel 0 Capture overflow flag
pub fn brkif(&self) -> BRKIF_R[src]
Bit 7 - Break interrupt flag
pub fn trgif(&self) -> TRGIF_R[src]
Bit 6 - Trigger interrupt flag
pub fn cmtif(&self) -> CMTIF_R[src]
Bit 5 - Channel commutation interrupt flag
pub fn ch3if(&self) -> CH3IF_R[src]
Bit 4 - Channel 3 Capture/Compare interrupt enable
pub fn ch2if(&self) -> CH2IF_R[src]
Bit 3 - Channel 2 Capture/Compare interrupt enable
pub fn ch1if(&self) -> CH1IF_R[src]
Bit 2 - Channel 1s Capture/Compare interrupt enable
pub fn ch0if(&self) -> CH0IF_R[src]
Bit 1 - Channel 0s Capture/Compare interrupt flag
pub fn upif(&self) -> UPIF_R[src]
Bit 0 - Update interrupt flag
impl R<bool, CH1COMCEN_A>[src]
pub fn variant(&self) -> CH1COMCEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u8, CH1COMCTL_A>[src]
pub fn variant(&self) -> CH1COMCTL_A[src]
Get enumerated values variant
pub fn is_frozen(&self) -> bool[src]
Checks if the value of the field is FROZEN
pub fn is_active_on_match(&self) -> bool[src]
Checks if the value of the field is ACTIVEONMATCH
pub fn is_inactive_on_match(&self) -> bool[src]
Checks if the value of the field is INACTIVEONMATCH
pub fn is_toggle(&self) -> bool[src]
Checks if the value of the field is TOGGLE
pub fn is_force_inactive(&self) -> bool[src]
Checks if the value of the field is FORCEINACTIVE
pub fn is_force_active(&self) -> bool[src]
Checks if the value of the field is FORCEACTIVE
pub fn is_pwm_mode1(&self) -> bool[src]
Checks if the value of the field is PWMMODE1
pub fn is_pwm_mode2(&self) -> bool[src]
Checks if the value of the field is PWMMODE2
impl R<bool, CH1COMSEN_A>[src]
pub fn variant(&self) -> CH1COMSEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, CH1COMFEN_A>[src]
pub fn variant(&self) -> CH1COMFEN_A[src]
Get enumerated values variant
pub fn is_slow(&self) -> bool[src]
Checks if the value of the field is SLOW
pub fn is_fast(&self) -> bool[src]
Checks if the value of the field is FAST
impl R<u8, CH1MS_A>[src]
pub fn variant(&self) -> CH1MS_A[src]
Get enumerated values variant
pub fn is_output(&self) -> bool[src]
Checks if the value of the field is OUTPUT
pub fn is_ci1(&self) -> bool[src]
Checks if the value of the field is CI1
pub fn is_ci2(&self) -> bool[src]
Checks if the value of the field is CI2
pub fn is_its(&self) -> bool[src]
Checks if the value of the field is ITS
impl R<u16, Reg<u16, _CHCTL0_OUTPUT>>[src]
pub fn ch1comcen(&self) -> CH1COMCEN_R[src]
Bit 15 - Channel 1 output compare clear enable
pub fn ch1comctl(&self) -> CH1COMCTL_R[src]
Bits 12:14 - Channel 1 output compare mode
pub fn ch1comsen(&self) -> CH1COMSEN_R[src]
Bit 11 - Channel 1 output compare shadow enable
pub fn ch1comfen(&self) -> CH1COMFEN_R[src]
Bit 10 - Channel 1 output compare fast enable
pub fn ch1ms(&self) -> CH1MS_R[src]
Bits 8:9 - Channel 1 mode selection
pub fn ch0comcen(&self) -> CH0COMCEN_R[src]
Bit 7 - Channel 0 output compare clear enable
pub fn ch0comctl(&self) -> CH0COMCTL_R[src]
Bits 4:6 - Channel 0 compare output control
pub fn ch0comsen(&self) -> CH0COMSEN_R[src]
Bit 3 - Channel 0 output compare shadow enable
pub fn ch0comfen(&self) -> CH0COMFEN_R[src]
Bit 2 - Channel 0 output compare fast enable
pub fn ch0ms(&self) -> CH0MS_R[src]
Bits 0:1 - Channel 0 I/O mode selection
impl R<u16, Reg<u16, _CHCTL0_INPUT>>[src]
pub fn ch1capflt(&self) -> CH1CAPFLT_R[src]
Bits 12:15 - Channel 1 input capture filter control
pub fn ch1cappsc(&self) -> CH1CAPPSC_R[src]
Bits 10:11 - Channel 1 input capture prescaler
pub fn ch1ms(&self) -> CH1MS_R[src]
Bits 8:9 - Channel 1 mode selection
pub fn ch0capflt(&self) -> CH0CAPFLT_R[src]
Bits 4:7 - Channel 0 input capture filter control
pub fn ch0cappsc(&self) -> CH0CAPPSC_R[src]
Bits 2:3 - Channel 0 input capture prescaler
pub fn ch0ms(&self) -> CH0MS_R[src]
Bits 0:1 - Channel 0 mode selection
impl R<bool, CH3COMCEN_A>[src]
pub fn variant(&self) -> CH3COMCEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u8, CH3COMCTL_A>[src]
pub fn variant(&self) -> CH3COMCTL_A[src]
Get enumerated values variant
pub fn is_frozen(&self) -> bool[src]
Checks if the value of the field is FROZEN
pub fn is_active_on_match(&self) -> bool[src]
Checks if the value of the field is ACTIVEONMATCH
pub fn is_inactive_on_match(&self) -> bool[src]
Checks if the value of the field is INACTIVEONMATCH
pub fn is_toggle(&self) -> bool[src]
Checks if the value of the field is TOGGLE
pub fn is_force_inactive(&self) -> bool[src]
Checks if the value of the field is FORCEINACTIVE
pub fn is_force_active(&self) -> bool[src]
Checks if the value of the field is FORCEACTIVE
pub fn is_pwm_mode1(&self) -> bool[src]
Checks if the value of the field is PWMMODE1
pub fn is_pwm_mode2(&self) -> bool[src]
Checks if the value of the field is PWMMODE2
impl R<bool, CH3COMSEN_A>[src]
pub fn variant(&self) -> CH3COMSEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, CH3COMFEN_A>[src]
pub fn variant(&self) -> CH3COMFEN_A[src]
Get enumerated values variant
pub fn is_slow(&self) -> bool[src]
Checks if the value of the field is SLOW
pub fn is_fast(&self) -> bool[src]
Checks if the value of the field is FAST
impl R<u8, CH3MS_A>[src]
pub fn variant(&self) -> CH3MS_A[src]
Get enumerated values variant
pub fn is_output(&self) -> bool[src]
Checks if the value of the field is OUTPUT
pub fn is_ci1(&self) -> bool[src]
Checks if the value of the field is CI1
pub fn is_ci2(&self) -> bool[src]
Checks if the value of the field is CI2
pub fn is_its(&self) -> bool[src]
Checks if the value of the field is ITS
impl R<u16, Reg<u16, _CHCTL1_OUTPUT>>[src]
pub fn ch3comcen(&self) -> CH3COMCEN_R[src]
Bit 15 - Channel 3 output compare clear enable
pub fn ch3comctl(&self) -> CH3COMCTL_R[src]
Bits 12:14 - Channel 3 compare output control
pub fn ch3comsen(&self) -> CH3COMSEN_R[src]
Bit 11 - Channel 3 output compare shadow enable
pub fn ch3comfen(&self) -> CH3COMFEN_R[src]
Bit 10 - Channel 3 output compare fast enable
pub fn ch3ms(&self) -> CH3MS_R[src]
Bits 8:9 - Channel 3 mode selection
pub fn ch2comcen(&self) -> CH2COMCEN_R[src]
Bit 7 - Channel 2 output compare clear enable
pub fn ch2comctl(&self) -> CH2COMCTL_R[src]
Bits 4:6 - Channel 2 compare output control
pub fn ch2comsen(&self) -> CH2COMSEN_R[src]
Bit 3 - Channel 2 output compare shadow enable
pub fn ch2comfen(&self) -> CH2COMFEN_R[src]
Bit 2 - Channel 2 output compare fast enable
pub fn ch2ms(&self) -> CH2MS_R[src]
Bits 0:1 - Channel 2 mode selection
impl R<u16, Reg<u16, _CHCTL1_INPUT>>[src]
pub fn ch3capflt(&self) -> CH3CAPFLT_R[src]
Bits 12:15 - Channel 3 input capture filter control
pub fn ch3cappsc(&self) -> CH3CAPPSC_R[src]
Bits 10:11 - Channel 3 input capture prescaler
pub fn ch3ms(&self) -> CH3MS_R[src]
Bits 8:9 - Channel 3 mode selection
pub fn ch2capflt(&self) -> CH2CAPFLT_R[src]
Bits 4:7 - Channel 2 input capture filter control
pub fn ch2cappsc(&self) -> CH2CAPPSC_R[src]
Bits 2:3 - Channel 2 input capture prescaler
pub fn ch2ms(&self) -> CH2MS_R[src]
Bits 0:1 - Channel 2 mode selection
impl R<bool, CH3P_A>[src]
pub fn variant(&self) -> CH3P_A[src]
Get enumerated values variant
pub fn is_not_inverted(&self) -> bool[src]
Checks if the value of the field is NOTINVERTED
pub fn is_inverted(&self) -> bool[src]
Checks if the value of the field is INVERTED
impl R<bool, CH3EN_A>[src]
pub fn variant(&self) -> CH3EN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, CH2NP_A>[src]
pub fn variant(&self) -> CH2NP_A[src]
Get enumerated values variant
pub fn is_not_inverted(&self) -> bool[src]
Checks if the value of the field is NOTINVERTED
pub fn is_inverted(&self) -> bool[src]
Checks if the value of the field is INVERTED
impl R<bool, CH2NEN_A>[src]
pub fn variant(&self) -> CH2NEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u16, Reg<u16, _CHCTL2>>[src]
pub fn ch3p(&self) -> CH3P_R[src]
Bit 13 - Channel 3 polarity
pub fn ch3en(&self) -> CH3EN_R[src]
Bit 12 - Channel 3 enable
pub fn ch2np(&self) -> CH2NP_R[src]
Bit 11 - Channel 2 complementary output polarity
pub fn ch2nen(&self) -> CH2NEN_R[src]
Bit 10 - Channel 2 complementary output enable
pub fn ch2p(&self) -> CH2P_R[src]
Bit 9 - Channel 2 polarity
pub fn ch2en(&self) -> CH2EN_R[src]
Bit 8 - Channel 2 enable
pub fn ch1np(&self) -> CH1NP_R[src]
Bit 7 - Channel 1 complementary output polarity
pub fn ch1nen(&self) -> CH1NEN_R[src]
Bit 6 - Channel 1 complementary output enable
pub fn ch1p(&self) -> CH1P_R[src]
Bit 5 - Channel 1 polarity
pub fn ch1en(&self) -> CH1EN_R[src]
Bit 4 - Channel 1 enable
pub fn ch0np(&self) -> CH0NP_R[src]
Bit 3 - Channel 0 complementary output polarity
pub fn ch0nen(&self) -> CH0NEN_R[src]
Bit 2 - Channel 0 complementary output enable
pub fn ch0p(&self) -> CH0P_R[src]
Bit 1 - Channel 0 polarity
pub fn ch0en(&self) -> CH0EN_R[src]
Bit 0 - Channel 0 enable
impl R<u16, Reg<u16, _CNT>>[src]
impl R<u16, Reg<u16, _PSC>>[src]
impl R<u16, Reg<u16, _CAR>>[src]
impl R<u16, Reg<u16, _CREP>>[src]
impl R<u16, Reg<u16, _CH0CV>>[src]
impl R<u16, Reg<u16, _CH1CV>>[src]
impl R<u16, Reg<u16, _CH2CV>>[src]
impl R<u16, Reg<u16, _CH3CV>>[src]
impl R<bool, POEN_A>[src]
pub fn variant(&self) -> POEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, OAEN_A>[src]
pub fn variant(&self) -> OAEN_A[src]
Get enumerated values variant
pub fn is_manual(&self) -> bool[src]
Checks if the value of the field is MANUAL
pub fn is_automatic(&self) -> bool[src]
Checks if the value of the field is AUTOMATIC
impl R<bool, BRKP_A>[src]
pub fn variant(&self) -> BRKP_A[src]
Get enumerated values variant
pub fn is_inverted(&self) -> bool[src]
Checks if the value of the field is INVERTED
pub fn is_not_inverted(&self) -> bool[src]
Checks if the value of the field is NOTINVERTED
impl R<bool, BRKEN_A>[src]
pub fn variant(&self) -> BRKEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, ROS_A>[src]
pub fn variant(&self) -> ROS_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, IOS_A>[src]
pub fn variant(&self) -> IOS_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u8, PROT_A>[src]
pub fn variant(&self) -> PROT_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_mode0(&self) -> bool[src]
Checks if the value of the field is MODE0
pub fn is_mode1(&self) -> bool[src]
Checks if the value of the field is MODE1
pub fn is_mode2(&self) -> bool[src]
Checks if the value of the field is MODE2
impl R<u16, Reg<u16, _CCHP>>[src]
pub fn poen(&self) -> POEN_R[src]
Bit 15 - Primary output enable
pub fn oaen(&self) -> OAEN_R[src]
Bit 14 - Output automatic enable
pub fn brkp(&self) -> BRKP_R[src]
Bit 13 - Break polarity
pub fn brken(&self) -> BRKEN_R[src]
Bit 12 - Break enable
pub fn ros(&self) -> ROS_R[src]
Bit 11 - Run mode off-state configure
pub fn ios(&self) -> IOS_R[src]
Bit 10 - Idle mode off-state configure
pub fn prot(&self) -> PROT_R[src]
Bits 8:9 - Complementary register protect control
pub fn dtcfg(&self) -> DTCFG_R[src]
Bits 0:7 - Dead time configure
impl R<u16, Reg<u16, _DMACFG>>[src]
pub fn dmatc(&self) -> DMATC_R[src]
Bits 8:12 - DMA transfer count
pub fn dmata(&self) -> DMATA_R[src]
Bits 0:4 - DMA transfer access start address
impl R<u16, Reg<u16, _DMATB>>[src]
impl R<u16, Reg<u16, _CFG>>[src]
pub fn outsel(&self) -> OUTSEL_R[src]
Bit 0 - The output value selection
pub fn ccsel(&self) -> CCSEL_R[src]
Bit 1 - Write Capture/Compare register selection
impl R<u8, CKDIV_A>[src]
pub fn variant(&self) -> Variant<u8, CKDIV_A>[src]
Get enumerated values variant
pub fn is_div1(&self) -> bool[src]
Checks if the value of the field is DIV1
pub fn is_div2(&self) -> bool[src]
Checks if the value of the field is DIV2
pub fn is_div4(&self) -> bool[src]
Checks if the value of the field is DIV4
impl R<bool, ARSE_A>[src]
pub fn variant(&self) -> ARSE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u8, CAM_A>[src]
pub fn variant(&self) -> CAM_A[src]
Get enumerated values variant
pub fn is_edge_aligned(&self) -> bool[src]
Checks if the value of the field is EDGEALIGNED
pub fn is_center_aligned_counting_down(&self) -> bool[src]
Checks if the value of the field is CENTERALIGNEDCOUNTINGDOWN
pub fn is_center_aligned_counting_up(&self) -> bool[src]
Checks if the value of the field is CENTERALIGNEDCOUNTINGUP
pub fn is_center_aligned_counting_up_down(&self) -> bool[src]
Checks if the value of the field is CENTERALIGNEDCOUNTINGUPDOWN
impl R<bool, DIR_A>[src]
pub fn variant(&self) -> DIR_A[src]
Get enumerated values variant
pub fn is_up(&self) -> bool[src]
Checks if the value of the field is UP
pub fn is_down(&self) -> bool[src]
Checks if the value of the field is DOWN
impl R<bool, SPM_A>[src]
pub fn variant(&self) -> SPM_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, UPS_A>[src]
pub fn variant(&self) -> UPS_A[src]
Get enumerated values variant
pub fn is_any_event(&self) -> bool[src]
Checks if the value of the field is ANYEVENT
pub fn is_counter_only(&self) -> bool[src]
Checks if the value of the field is COUNTERONLY
impl R<bool, UPDIS_A>[src]
pub fn variant(&self) -> UPDIS_A[src]
Get enumerated values variant
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
impl R<bool, CEN_A>[src]
pub fn variant(&self) -> CEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u16, Reg<u16, _CTL0>>[src]
pub fn ckdiv(&self) -> CKDIV_R[src]
Bits 8:9 - Clock division
pub fn arse(&self) -> ARSE_R[src]
Bit 7 - Auto-reload shadow enable
pub fn cam(&self) -> CAM_R[src]
Bits 5:6 - Counter aligns mode selection
pub fn dir(&self) -> DIR_R[src]
Bit 4 - Direction
pub fn spm(&self) -> SPM_R[src]
Bit 3 - Single pulse mode
pub fn ups(&self) -> UPS_R[src]
Bit 2 - Update request source
pub fn updis(&self) -> UPDIS_R[src]
Bit 1 - Update disable
pub fn cen(&self) -> CEN_R[src]
Bit 0 - Counter enable
impl R<u8, MMC_A>[src]
pub fn variant(&self) -> Variant<u8, MMC_A>[src]
Get enumerated values variant
pub fn is_reset(&self) -> bool[src]
Checks if the value of the field is RESET
pub fn is_enable(&self) -> bool[src]
Checks if the value of the field is ENABLE
pub fn is_update(&self) -> bool[src]
Checks if the value of the field is UPDATE
impl R<u16, Reg<u16, _CTL1>>[src]
pub fn ti0s(&self) -> TI0S_R[src]
Bit 7 - Channel 0 trigger input selection
pub fn mmc(&self) -> MMC_R[src]
Bits 4:6 - Master mode control
pub fn dmas(&self) -> DMAS_R[src]
Bit 3 - DMA request source selection
impl R<u16, Reg<u16, _SMCFG>>[src]
pub fn etp(&self) -> ETP_R[src]
Bit 15 - External trigger polarity
pub fn smc1(&self) -> SMC1_R[src]
Bit 14 - Part of SMC for enable External clock mode1
pub fn etpsc(&self) -> ETPSC_R[src]
Bits 12:13 - External trigger prescaler
pub fn etfc(&self) -> ETFC_R[src]
Bits 8:11 - External trigger filter control
pub fn msm(&self) -> MSM_R[src]
Bit 7 - Master/Slave mode
pub fn trgs(&self) -> TRGS_R[src]
Bits 4:6 - Trigger selection
pub fn ocrc(&self) -> OCRC_R[src]
Bit 3 - OCREF clear source selection
pub fn smc(&self) -> SMC_R[src]
Bits 0:2 - Slave mode control
impl R<bool, UPDEN_A>[src]
pub fn variant(&self) -> UPDEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, UPIE_A>[src]
pub fn variant(&self) -> UPIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u16, Reg<u16, _DMAINTEN>>[src]
pub fn trgden(&self) -> TRGDEN_R[src]
Bit 14 - Trigger DMA request enable
pub fn ch3den(&self) -> CH3DEN_R[src]
Bit 12 - Channel 3 Capture/Compare DMA request enable
pub fn ch2den(&self) -> CH2DEN_R[src]
Bit 11 - Channel 2 Capture/Compare DMA request enable
pub fn ch1den(&self) -> CH1DEN_R[src]
Bit 10 - Channel 1 Capture/Compare DMA request enable
pub fn ch0den(&self) -> CH0DEN_R[src]
Bit 9 - Channel 0 Capture/Compare DMA request enable
pub fn upden(&self) -> UPDEN_R[src]
Bit 8 - Update DMA request enable
pub fn trgie(&self) -> TRGIE_R[src]
Bit 6 - Trigger interrupt enable
pub fn ch3ie(&self) -> CH3IE_R[src]
Bit 4 - Channel 3 Capture/Compare interrupt enable
pub fn ch2ie(&self) -> CH2IE_R[src]
Bit 3 - Channel 2 Capture/Compare interrupt enable
pub fn ch1ie(&self) -> CH1IE_R[src]
Bit 2 - Channel 1 Capture/Compare interrupt enable
pub fn ch0ie(&self) -> CH0IE_R[src]
Bit 1 - Channel 0 Capture/Compare interrupt enable
pub fn upie(&self) -> UPIE_R[src]
Bit 0 - Update Capture/Compare interrupt enable
impl R<bool, UPIF_A>[src]
pub fn variant(&self) -> UPIF_A[src]
Get enumerated values variant
pub fn is_clear(&self) -> bool[src]
Checks if the value of the field is CLEAR
pub fn is_update_pending(&self) -> bool[src]
Checks if the value of the field is UPDATEPENDING
impl R<u16, Reg<u16, _INTF>>[src]
pub fn ch3of(&self) -> CH3OF_R[src]
Bit 12 - Channel 3 Capture overflow flag
pub fn ch2of(&self) -> CH2OF_R[src]
Bit 11 - Channel 2 Capture overflow flag
pub fn ch1of(&self) -> CH1OF_R[src]
Bit 10 - Channel 1 Capture overflow flag
pub fn ch0of(&self) -> CH0OF_R[src]
Bit 9 - Channel 0 Capture overflow flag
pub fn trgif(&self) -> TRGIF_R[src]
Bit 6 - Trigger interrupt flag
pub fn ch3if(&self) -> CH3IF_R[src]
Bit 4 - Channel 3 Capture/Compare interrupt enable
pub fn ch2if(&self) -> CH2IF_R[src]
Bit 3 - Channel 2 Capture/Compare interrupt enable
pub fn ch1if(&self) -> CH1IF_R[src]
Bit 2 - Channel 1 Capture/Compare interrupt enable
pub fn ch0if(&self) -> CH0IF_R[src]
Bit 1 - Channel 0 Capture/Compare interrupt flag
pub fn upif(&self) -> UPIF_R[src]
Bit 0 - Update interrupt flag
impl R<bool, CH1COMCEN_A>[src]
pub fn variant(&self) -> CH1COMCEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u8, CH1COMCTL_A>[src]
pub fn variant(&self) -> CH1COMCTL_A[src]
Get enumerated values variant
pub fn is_frozen(&self) -> bool[src]
Checks if the value of the field is FROZEN
pub fn is_active_on_match(&self) -> bool[src]
Checks if the value of the field is ACTIVEONMATCH
pub fn is_inactive_on_match(&self) -> bool[src]
Checks if the value of the field is INACTIVEONMATCH
pub fn is_toggle(&self) -> bool[src]
Checks if the value of the field is TOGGLE
pub fn is_force_inactive(&self) -> bool[src]
Checks if the value of the field is FORCEINACTIVE
pub fn is_force_active(&self) -> bool[src]
Checks if the value of the field is FORCEACTIVE
pub fn is_pwm_mode1(&self) -> bool[src]
Checks if the value of the field is PWMMODE1
pub fn is_pwm_mode2(&self) -> bool[src]
Checks if the value of the field is PWMMODE2
impl R<bool, CH1COMSEN_A>[src]
pub fn variant(&self) -> CH1COMSEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, CH1COMFEN_A>[src]
pub fn variant(&self) -> CH1COMFEN_A[src]
Get enumerated values variant
pub fn is_slow(&self) -> bool[src]
Checks if the value of the field is SLOW
pub fn is_fast(&self) -> bool[src]
Checks if the value of the field is FAST
impl R<u8, CH1MS_A>[src]
pub fn variant(&self) -> CH1MS_A[src]
Get enumerated values variant
pub fn is_output(&self) -> bool[src]
Checks if the value of the field is OUTPUT
pub fn is_ci1(&self) -> bool[src]
Checks if the value of the field is CI1
pub fn is_ci2(&self) -> bool[src]
Checks if the value of the field is CI2
pub fn is_its(&self) -> bool[src]
Checks if the value of the field is ITS
impl R<u16, Reg<u16, _CHCTL0_OUTPUT>>[src]
pub fn ch1comcen(&self) -> CH1COMCEN_R[src]
Bit 15 - Channel 1 output compare clear enable
pub fn ch1comctl(&self) -> CH1COMCTL_R[src]
Bits 12:14 - Channel 1 output compare mode
pub fn ch1comsen(&self) -> CH1COMSEN_R[src]
Bit 11 - Channel 1 output compare shadow enable
pub fn ch1comfen(&self) -> CH1COMFEN_R[src]
Bit 10 - Channel 1 output compare fast enable
pub fn ch1ms(&self) -> CH1MS_R[src]
Bits 8:9 - Channel 1 mode selection
pub fn ch0comcen(&self) -> CH0COMCEN_R[src]
Bit 7 - Channel 0 output compare clear enable
pub fn ch0comctl(&self) -> CH0COMCTL_R[src]
Bits 4:6 - Channel 0 compare output control
pub fn ch0comsen(&self) -> CH0COMSEN_R[src]
Bit 3 - Channel 0 output compare shadow enable
pub fn ch0comfen(&self) -> CH0COMFEN_R[src]
Bit 2 - Channel 0 output compare fast enable
pub fn ch0ms(&self) -> CH0MS_R[src]
Bits 0:1 - Channel 0 mode selection
impl R<u16, Reg<u16, _CHCTL0_INPUT>>[src]
pub fn ch1capflt(&self) -> CH1CAPFLT_R[src]
Bits 12:15 - Channel 1 input capture filter control
pub fn ch1cappsc(&self) -> CH1CAPPSC_R[src]
Bits 10:11 - Channel 1 input capture prescaler
pub fn ch1ms(&self) -> CH1MS_R[src]
Bits 8:9 - Channel 1 mode selection
pub fn ch0capflt(&self) -> CH0CAPFLT_R[src]
Bits 4:7 - Channel 0 input capture filter control
pub fn ch0cappsc(&self) -> CH0CAPPSC_R[src]
Bits 2:3 - Channel 0 input capture prescaler
pub fn ch0ms(&self) -> CH0MS_R[src]
Bits 0:1 - Channel 0 mode selection
impl R<bool, CH3COMCEN_A>[src]
pub fn variant(&self) -> CH3COMCEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u8, CH3COMCTL_A>[src]
pub fn variant(&self) -> CH3COMCTL_A[src]
Get enumerated values variant
pub fn is_frozen(&self) -> bool[src]
Checks if the value of the field is FROZEN
pub fn is_active_on_match(&self) -> bool[src]
Checks if the value of the field is ACTIVEONMATCH
pub fn is_inactive_on_match(&self) -> bool[src]
Checks if the value of the field is INACTIVEONMATCH
pub fn is_toggle(&self) -> bool[src]
Checks if the value of the field is TOGGLE
pub fn is_force_inactive(&self) -> bool[src]
Checks if the value of the field is FORCEINACTIVE
pub fn is_force_active(&self) -> bool[src]
Checks if the value of the field is FORCEACTIVE
pub fn is_pwm_mode1(&self) -> bool[src]
Checks if the value of the field is PWMMODE1
pub fn is_pwm_mode2(&self) -> bool[src]
Checks if the value of the field is PWMMODE2
impl R<bool, CH3COMSEN_A>[src]
pub fn variant(&self) -> CH3COMSEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, CH3COMFEN_A>[src]
pub fn variant(&self) -> CH3COMFEN_A[src]
Get enumerated values variant
pub fn is_slow(&self) -> bool[src]
Checks if the value of the field is SLOW
pub fn is_fast(&self) -> bool[src]
Checks if the value of the field is FAST
impl R<u8, CH3MS_A>[src]
pub fn variant(&self) -> CH3MS_A[src]
Get enumerated values variant
pub fn is_output(&self) -> bool[src]
Checks if the value of the field is OUTPUT
pub fn is_ci1(&self) -> bool[src]
Checks if the value of the field is CI1
pub fn is_ci2(&self) -> bool[src]
Checks if the value of the field is CI2
pub fn is_its(&self) -> bool[src]
Checks if the value of the field is ITS
impl R<u16, Reg<u16, _CHCTL1_OUTPUT>>[src]
pub fn ch3comcen(&self) -> CH3COMCEN_R[src]
Bit 15 - Channel 3 output compare clear enable
pub fn ch3comctl(&self) -> CH3COMCTL_R[src]
Bits 12:14 - Channel 3 compare output control
pub fn ch3comsen(&self) -> CH3COMSEN_R[src]
Bit 11 - Channel 3 compare output control
pub fn ch3comfen(&self) -> CH3COMFEN_R[src]
Bit 10 - Channel 3 output compare fast enable
pub fn ch3ms(&self) -> CH3MS_R[src]
Bits 8:9 - Channel 3 mode selection
pub fn ch2comcen(&self) -> CH2COMCEN_R[src]
Bit 7 - Channel 2 output compare clear enable
pub fn ch2comctl(&self) -> CH2COMCTL_R[src]
Bits 4:6 - Channel 2 compare output control
pub fn ch2comsen(&self) -> CH2COMSEN_R[src]
Bit 3 - Channel 2 output compare shadow enable
pub fn ch2comfen(&self) -> CH2COMFEN_R[src]
Bit 2 - Channel 2 output compare fast enable
pub fn ch2ms(&self) -> CH2MS_R[src]
Bits 0:1 - Channel 2 mode selection
impl R<u16, Reg<u16, _CHCTL1_INPUT>>[src]
pub fn ch3capflt(&self) -> CH3CAPFLT_R[src]
Bits 12:15 - Channel 3 input capture filter control
pub fn ch3cappsc(&self) -> CH3CAPPSC_R[src]
Bits 10:11 - Channel 3 input capture prescaler
pub fn ch3ms(&self) -> CH3MS_R[src]
Bits 8:9 - Channel 3 mode selection
pub fn ch2capflt(&self) -> CH2CAPFLT_R[src]
Bits 4:7 - Channel 2 input capture filter control
pub fn ch2cappsc(&self) -> CH2CAPPSC_R[src]
Bits 2:3 - Channel 2 input capture prescaler
pub fn ch2ms(&self) -> CH2MS_R[src]
Bits 0:1 - Channel 2 mode selection
impl R<bool, CH3NP_A>[src]
pub fn variant(&self) -> CH3NP_A[src]
Get enumerated values variant
pub fn is_not_inverted(&self) -> bool[src]
Checks if the value of the field is NOTINVERTED
pub fn is_inverted(&self) -> bool[src]
Checks if the value of the field is INVERTED
impl R<bool, CH3P_A>[src]
pub fn variant(&self) -> CH3P_A[src]
Get enumerated values variant
pub fn is_not_inverted(&self) -> bool[src]
Checks if the value of the field is NOTINVERTED
pub fn is_inverted(&self) -> bool[src]
Checks if the value of the field is INVERTED
impl R<bool, CH3EN_A>[src]
pub fn variant(&self) -> CH3EN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u16, Reg<u16, _CHCTL2>>[src]
pub fn ch3np(&self) -> CH3NP_R[src]
Bit 15 - Channel 3 complementary output polarity
pub fn ch3p(&self) -> CH3P_R[src]
Bit 13 - Channel 3 polarity
pub fn ch3en(&self) -> CH3EN_R[src]
Bit 12 - Channel 3 enable
pub fn ch2np(&self) -> CH2NP_R[src]
Bit 11 - Channel 2 complementary output polarity
pub fn ch2p(&self) -> CH2P_R[src]
Bit 9 - Channel 2 polarity
pub fn ch2en(&self) -> CH2EN_R[src]
Bit 8 - Channel 2 enable
pub fn ch1np(&self) -> CH1NP_R[src]
Bit 7 - Channel 1 complementary output polarity
pub fn ch1p(&self) -> CH1P_R[src]
Bit 5 - Channel 1 polarity
pub fn ch1en(&self) -> CH1EN_R[src]
Bit 4 - Channel 1 enable
pub fn ch0np(&self) -> CH0NP_R[src]
Bit 3 - Channel 0 complementary output polarity
pub fn ch0p(&self) -> CH0P_R[src]
Bit 1 - Channel 0 polarity
pub fn ch0en(&self) -> CH0EN_R[src]
Bit 0 - Channel 0 enable
impl R<u32, Reg<u32, _CNT>>[src]
impl R<u16, Reg<u16, _PSC>>[src]
impl R<u32, Reg<u32, _CAR>>[src]
impl R<u32, Reg<u32, _CH0CV>>[src]
impl R<u32, Reg<u32, _CH1CV>>[src]
impl R<u32, Reg<u32, _CH2CV>>[src]
impl R<u32, Reg<u32, _CH3CV>>[src]
impl R<u16, Reg<u16, _DMACFG>>[src]
pub fn dmatc(&self) -> DMATC_R[src]
Bits 8:12 - DMA transfer count
pub fn dmata(&self) -> DMATA_R[src]
Bits 0:4 - DMA transfer access start address
impl R<u32, Reg<u32, _DMATB>>[src]
impl R<u16, Reg<u16, _CFG>>[src]
impl R<bool, ARSE_A>[src]
pub fn variant(&self) -> ARSE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, SPM_A>[src]
pub fn variant(&self) -> SPM_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, UPS_A>[src]
pub fn variant(&self) -> UPS_A[src]
Get enumerated values variant
pub fn is_any_event(&self) -> bool[src]
Checks if the value of the field is ANYEVENT
pub fn is_counter_only(&self) -> bool[src]
Checks if the value of the field is COUNTERONLY
impl R<bool, UPDIS_A>[src]
pub fn variant(&self) -> UPDIS_A[src]
Get enumerated values variant
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
impl R<bool, CEN_A>[src]
pub fn variant(&self) -> CEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u16, Reg<u16, _CTL0>>[src]
pub fn arse(&self) -> ARSE_R[src]
Bit 7 - Auto-reload shadow enable
pub fn spm(&self) -> SPM_R[src]
Bit 3 - Single pulse mode
pub fn ups(&self) -> UPS_R[src]
Bit 2 - Update source
pub fn updis(&self) -> UPDIS_R[src]
Bit 1 - Update disable
pub fn cen(&self) -> CEN_R[src]
Bit 0 - Counter enable
impl R<u8, MMC_A>[src]
pub fn variant(&self) -> Variant<u8, MMC_A>[src]
Get enumerated values variant
pub fn is_reset(&self) -> bool[src]
Checks if the value of the field is RESET
pub fn is_enable(&self) -> bool[src]
Checks if the value of the field is ENABLE
pub fn is_update(&self) -> bool[src]
Checks if the value of the field is UPDATE
impl R<u16, Reg<u16, _CTL1>>[src]
impl R<bool, UPDEN_A>[src]
pub fn variant(&self) -> UPDEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, UPIE_A>[src]
pub fn variant(&self) -> UPIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u16, Reg<u16, _DMAINTEN>>[src]
pub fn upden(&self) -> UPDEN_R[src]
Bit 8 - Update DMA request enable
pub fn upie(&self) -> UPIE_R[src]
Bit 0 - Update interrupt enable
impl R<bool, UPIF_A>[src]
pub fn variant(&self) -> UPIF_A[src]
Get enumerated values variant
pub fn is_clear(&self) -> bool[src]
Checks if the value of the field is CLEAR
pub fn is_update_pending(&self) -> bool[src]
Checks if the value of the field is UPDATEPENDING
impl R<u16, Reg<u16, _INTF>>[src]
impl R<u16, Reg<u16, _CNT>>[src]
impl R<u16, Reg<u16, _PSC>>[src]
impl R<u16, Reg<u16, _CAR>>[src]
impl R<bool, ARSE_A>[src]
pub fn variant(&self) -> ARSE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, UPS_A>[src]
pub fn variant(&self) -> UPS_A[src]
Get enumerated values variant
pub fn is_any_event(&self) -> bool[src]
Checks if the value of the field is ANYEVENT
pub fn is_counter_only(&self) -> bool[src]
Checks if the value of the field is COUNTERONLY
impl R<bool, UPDIS_A>[src]
pub fn variant(&self) -> UPDIS_A[src]
Get enumerated values variant
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
impl R<bool, CEN_A>[src]
pub fn variant(&self) -> CEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u16, Reg<u16, _CTL0>>[src]
pub fn ckdiv(&self) -> CKDIV_R[src]
Bits 8:9 - Clock division
pub fn arse(&self) -> ARSE_R[src]
Bit 7 - Auto-reload shadow enable
pub fn ups(&self) -> UPS_R[src]
Bit 2 - Update source
pub fn updis(&self) -> UPDIS_R[src]
Bit 1 - Update disable
pub fn cen(&self) -> CEN_R[src]
Bit 0 - Counter enable
impl R<bool, UPIE_A>[src]
pub fn variant(&self) -> UPIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u16, Reg<u16, _DMAINTEN>>[src]
pub fn ch0ie(&self) -> CH0IE_R[src]
Bit 1 - Channel 0 interrupt enable
pub fn upie(&self) -> UPIE_R[src]
Bit 0 - Update interrupt enable
impl R<bool, UPIF_A>[src]
pub fn variant(&self) -> UPIF_A[src]
Get enumerated values variant
pub fn is_clear(&self) -> bool[src]
Checks if the value of the field is CLEAR
pub fn is_update_pending(&self) -> bool[src]
Checks if the value of the field is UPDATEPENDING
impl R<u16, Reg<u16, _INTF>>[src]
pub fn ch0of(&self) -> CH0OF_R[src]
Bit 9 - Channel 0 Capture overflow flag
pub fn ch0if(&self) -> CH0IF_R[src]
Bit 1 - Channel 0 interrupt flag
pub fn upif(&self) -> UPIF_R[src]
Bit 0 - Update interrupt flag
impl R<u8, CH0MS_A>[src]
pub fn variant(&self) -> CH0MS_A[src]
Get enumerated values variant
pub fn is_output(&self) -> bool[src]
Checks if the value of the field is OUTPUT
pub fn is_ci1(&self) -> bool[src]
Checks if the value of the field is CI1
pub fn is_ci2(&self) -> bool[src]
Checks if the value of the field is CI2
pub fn is_its(&self) -> bool[src]
Checks if the value of the field is ITS
impl R<bool, CH0COMFEN_A>[src]
pub fn variant(&self) -> CH0COMFEN_A[src]
Get enumerated values variant
pub fn is_slow(&self) -> bool[src]
Checks if the value of the field is SLOW
pub fn is_fast(&self) -> bool[src]
Checks if the value of the field is FAST
impl R<bool, CH0COMSEN_A>[src]
pub fn variant(&self) -> CH0COMSEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u8, CH0COMCTL_A>[src]
pub fn variant(&self) -> CH0COMCTL_A[src]
Get enumerated values variant
pub fn is_frozen(&self) -> bool[src]
Checks if the value of the field is FROZEN
pub fn is_active_on_match(&self) -> bool[src]
Checks if the value of the field is ACTIVEONMATCH
pub fn is_inactive_on_match(&self) -> bool[src]
Checks if the value of the field is INACTIVEONMATCH
pub fn is_toggle(&self) -> bool[src]
Checks if the value of the field is TOGGLE
pub fn is_force_inactive(&self) -> bool[src]
Checks if the value of the field is FORCEINACTIVE
pub fn is_force_active(&self) -> bool[src]
Checks if the value of the field is FORCEACTIVE
pub fn is_pwm_mode1(&self) -> bool[src]
Checks if the value of the field is PWMMODE1
pub fn is_pwm_mode2(&self) -> bool[src]
Checks if the value of the field is PWMMODE2
impl R<bool, CH0COMCEN_A>[src]
pub fn variant(&self) -> CH0COMCEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u16, Reg<u16, _CHCTL0_OUTPUT>>[src]
pub fn ch0ms(&self) -> CH0MS_R[src]
Bits 0:1 - Channel 0 mode selection
pub fn ch0comfen(&self) -> CH0COMFEN_R[src]
Bit 2 - Channel 0 output compare fast enable
pub fn ch0comsen(&self) -> CH0COMSEN_R[src]
Bit 3 - Channel 0 output compare shadow enable
pub fn ch0comctl(&self) -> CH0COMCTL_R[src]
Bits 4:6 - Channel 0 compare output control
pub fn ch0comcen(&self) -> CH0COMCEN_R[src]
Bit 7 - Channel 0 output compare clear enable
impl R<u16, Reg<u16, _CHCTL0_INPUT>>[src]
pub fn ch0capflt(&self) -> CH0CAPFLT_R[src]
Bits 4:7 - Channel 0 input capture filter control
pub fn ch0cappsc(&self) -> CH0CAPPSC_R[src]
Bits 2:3 - Channel 0 input capture prescaler
pub fn ch0ms(&self) -> CH0MS_R[src]
Bits 0:1 - Channel 0 mode selection
impl R<bool, CH0NP_A>[src]
pub fn variant(&self) -> CH0NP_A[src]
Get enumerated values variant
pub fn is_not_inverted(&self) -> bool[src]
Checks if the value of the field is NOTINVERTED
pub fn is_inverted(&self) -> bool[src]
Checks if the value of the field is INVERTED
impl R<bool, CH0P_A>[src]
pub fn variant(&self) -> CH0P_A[src]
Get enumerated values variant
pub fn is_not_inverted(&self) -> bool[src]
Checks if the value of the field is NOTINVERTED
pub fn is_inverted(&self) -> bool[src]
Checks if the value of the field is INVERTED
impl R<bool, CH0EN_A>[src]
pub fn variant(&self) -> CH0EN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u16, Reg<u16, _CHCTL2>>[src]
pub fn ch0np(&self) -> CH0NP_R[src]
Bit 3 - Channel 0 complementary output polarity
pub fn ch0p(&self) -> CH0P_R[src]
Bit 1 - Channel 0 polarity
pub fn ch0en(&self) -> CH0EN_R[src]
Bit 0 - Channel 0 enable
impl R<u16, Reg<u16, _CNT>>[src]
impl R<u16, Reg<u16, _PSC>>[src]
impl R<u16, Reg<u16, _CAR>>[src]
impl R<u16, Reg<u16, _CH0CV>>[src]
impl R<u16, Reg<u16, _IRMP>>[src]
impl R<u16, Reg<u16, _CFG>>[src]
impl R<bool, ARSE_A>[src]
pub fn variant(&self) -> ARSE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, SPM_A>[src]
pub fn variant(&self) -> SPM_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, UPS_A>[src]
pub fn variant(&self) -> UPS_A[src]
Get enumerated values variant
pub fn is_any_event(&self) -> bool[src]
Checks if the value of the field is ANYEVENT
pub fn is_counter_only(&self) -> bool[src]
Checks if the value of the field is COUNTERONLY
impl R<bool, UPDIS_A>[src]
pub fn variant(&self) -> UPDIS_A[src]
Get enumerated values variant
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
impl R<bool, CEN_A>[src]
pub fn variant(&self) -> CEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u16, Reg<u16, _CTL0>>[src]
pub fn ckdiv(&self) -> CKDIV_R[src]
Bits 8:9 - Clock division
pub fn arse(&self) -> ARSE_R[src]
Bit 7 - Auto-reload shadow enable
pub fn spm(&self) -> SPM_R[src]
Bit 3 - Single pulse mode
pub fn ups(&self) -> UPS_R[src]
Bit 2 - Update source
pub fn updis(&self) -> UPDIS_R[src]
Bit 1 - Update disable
pub fn cen(&self) -> CEN_R[src]
Bit 0 - Counter enable
impl R<u8, MMC_A>[src]
pub fn variant(&self) -> Variant<u8, MMC_A>[src]
Get enumerated values variant
pub fn is_reset(&self) -> bool[src]
Checks if the value of the field is RESET
pub fn is_enable(&self) -> bool[src]
Checks if the value of the field is ENABLE
pub fn is_update(&self) -> bool[src]
Checks if the value of the field is UPDATE
impl R<u16, Reg<u16, _CTL1>>[src]
pub fn iso1(&self) -> ISO1_R[src]
Bit 10 - Idle state of channel 1 output
pub fn iso0n(&self) -> ISO0N_R[src]
Bit 9 - Idle state of channel 1 output
pub fn iso0(&self) -> ISO0_R[src]
Bit 8 - Idle state of channel 0 output
pub fn mmc(&self) -> MMC_R[src]
Bits 4:6 - Master mode control
pub fn dmas(&self) -> DMAS_R[src]
Bit 3 - DMA request source selection
pub fn ccuc(&self) -> CCUC_R[src]
Bit 2 - Commutation control shadow register update control
pub fn ccse(&self) -> CCSE_R[src]
Bit 0 - Commutation control shadow register enable
impl R<u16, Reg<u16, _SMCFG>>[src]
pub fn msm(&self) -> MSM_R[src]
Bit 7 - Master/Slave mode
pub fn trgs(&self) -> TRGS_R[src]
Bits 4:6 - Trigger selection
pub fn smc(&self) -> SMC_R[src]
Bits 0:2 - Slave mode control
impl R<bool, UPDEN_A>[src]
pub fn variant(&self) -> UPDEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, UPIE_A>[src]
pub fn variant(&self) -> UPIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u16, Reg<u16, _DMAINTEN>>[src]
pub fn trgden(&self) -> TRGDEN_R[src]
Bit 14 - DMA and interrupt enable register
pub fn ch1den(&self) -> CH1DEN_R[src]
Bit 10 - Channel 1 Capture/Compare DMA request enable
pub fn ch0den(&self) -> CH0DEN_R[src]
Bit 9 - Channel 0 Capture/Compare DMA request enable
pub fn upden(&self) -> UPDEN_R[src]
Bit 8 - Update DMA request enable
pub fn brkie(&self) -> BRKIE_R[src]
Bit 7 - Break interrupt enable
pub fn trgie(&self) -> TRGIE_R[src]
Bit 6 - Trigger interrupt enable
pub fn cmtie(&self) -> CMTIE_R[src]
Bit 5 - CMT interrupt enable
pub fn ch1ie(&self) -> CH1IE_R[src]
Bit 2 - Channel 1 Capture/Compare interrupt enable
pub fn ch0ie(&self) -> CH0IE_R[src]
Bit 1 - Channel 0 Capture/Compare interrupt enable
pub fn upie(&self) -> UPIE_R[src]
Bit 0 - Update interrupt enable
impl R<bool, UPIF_A>[src]
pub fn variant(&self) -> UPIF_A[src]
Get enumerated values variant
pub fn is_clear(&self) -> bool[src]
Checks if the value of the field is CLEAR
pub fn is_update_pending(&self) -> bool[src]
Checks if the value of the field is UPDATEPENDING
impl R<u16, Reg<u16, _INTF>>[src]
pub fn ch1of(&self) -> CH1OF_R[src]
Bit 10 - Channel 1 Capture overflow flag
pub fn ch0of(&self) -> CH0OF_R[src]
Bit 9 - Channel 0 Capture overflow flag
pub fn brkif(&self) -> BRKIF_R[src]
Bit 7 - Break interrupt flag
pub fn trgif(&self) -> TRGIF_R[src]
Bit 6 - Trigger interrupt flag
pub fn cmtif(&self) -> CMTIF_R[src]
Bit 5 - Channel commutation interrupt flag
pub fn ch1if(&self) -> CH1IF_R[src]
Bit 2 - Channel 1 interrupt enable
pub fn ch0if(&self) -> CH0IF_R[src]
Bit 1 - Channel 0 interrupt enable
pub fn upif(&self) -> UPIF_R[src]
Bit 0 - Update interrupt flag
impl R<bool, CH1COMCEN_A>[src]
pub fn variant(&self) -> CH1COMCEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u8, CH1COMCTL_A>[src]
pub fn variant(&self) -> CH1COMCTL_A[src]
Get enumerated values variant
pub fn is_frozen(&self) -> bool[src]
Checks if the value of the field is FROZEN
pub fn is_active_on_match(&self) -> bool[src]
Checks if the value of the field is ACTIVEONMATCH
pub fn is_inactive_on_match(&self) -> bool[src]
Checks if the value of the field is INACTIVEONMATCH
pub fn is_toggle(&self) -> bool[src]
Checks if the value of the field is TOGGLE
pub fn is_force_inactive(&self) -> bool[src]
Checks if the value of the field is FORCEINACTIVE
pub fn is_force_active(&self) -> bool[src]
Checks if the value of the field is FORCEACTIVE
pub fn is_pwm_mode1(&self) -> bool[src]
Checks if the value of the field is PWMMODE1
pub fn is_pwm_mode2(&self) -> bool[src]
Checks if the value of the field is PWMMODE2
impl R<bool, CH1COMSEN_A>[src]
pub fn variant(&self) -> CH1COMSEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, CH1COMFEN_A>[src]
pub fn variant(&self) -> CH1COMFEN_A[src]
Get enumerated values variant
pub fn is_slow(&self) -> bool[src]
Checks if the value of the field is SLOW
pub fn is_fast(&self) -> bool[src]
Checks if the value of the field is FAST
impl R<u8, CH1MS_A>[src]
pub fn variant(&self) -> CH1MS_A[src]
Get enumerated values variant
pub fn is_output(&self) -> bool[src]
Checks if the value of the field is OUTPUT
pub fn is_ci1(&self) -> bool[src]
Checks if the value of the field is CI1
pub fn is_ci2(&self) -> bool[src]
Checks if the value of the field is CI2
pub fn is_its(&self) -> bool[src]
Checks if the value of the field is ITS
impl R<u16, Reg<u16, _CHCTL0_OUTPUT>>[src]
pub fn ch1comcen(&self) -> CH1COMCEN_R[src]
Bit 15 - Channel 1 output compare clear enable
pub fn ch1comctl(&self) -> CH1COMCTL_R[src]
Bits 12:14 - Channel 1 output compare mode
pub fn ch1comsen(&self) -> CH1COMSEN_R[src]
Bit 11 - Channel 1 output compare shadow enable
pub fn ch1comfen(&self) -> CH1COMFEN_R[src]
Bit 10 - Channel 1 output compare fast enable
pub fn ch1ms(&self) -> CH1MS_R[src]
Bits 8:9 - Channel 1 mode selection
pub fn ch0comcen(&self) -> CH0COMCEN_R[src]
Bit 7 - Channel 0 output compare clear enable
pub fn ch0comctl(&self) -> CH0COMCTL_R[src]
Bits 4:6 - Channel 0 compare output control
pub fn ch0comsen(&self) -> CH0COMSEN_R[src]
Bit 3 - Channel 0 output compare shadow enable
pub fn ch0comfen(&self) -> CH0COMFEN_R[src]
Bit 2 - Channel 0 output compare fast enable
pub fn ch0ms(&self) -> CH0MS_R[src]
Bits 0:1 - Channel 0 mode selection
impl R<u16, Reg<u16, _CHCTL0_INPUT>>[src]
pub fn ch1capflt(&self) -> CH1CAPFLT_R[src]
Bits 12:15 - Channel 1 input capture filter control
pub fn ch1cappsc(&self) -> CH1CAPPSC_R[src]
Bits 10:11 - Channel 1 input capture prescaler
pub fn ch1ms(&self) -> CH1MS_R[src]
Bits 8:9 - Channel 1 mode selection
pub fn ch0capflt(&self) -> CH0CAPFLT_R[src]
Bits 4:7 - Channel 0 input capture filter control
pub fn ch0cappsc(&self) -> CH0CAPPSC_R[src]
Bits 2:3 - Channel 0 input capture prescaler
pub fn ch0ms(&self) -> CH0MS_R[src]
Bits 0:1 - Channel 0 mode selection
impl R<bool, CH1NP_A>[src]
pub fn variant(&self) -> CH1NP_A[src]
Get enumerated values variant
pub fn is_not_inverted(&self) -> bool[src]
Checks if the value of the field is NOTINVERTED
pub fn is_inverted(&self) -> bool[src]
Checks if the value of the field is INVERTED
impl R<bool, CH1P_A>[src]
pub fn variant(&self) -> CH1P_A[src]
Get enumerated values variant
pub fn is_not_inverted(&self) -> bool[src]
Checks if the value of the field is NOTINVERTED
pub fn is_inverted(&self) -> bool[src]
Checks if the value of the field is INVERTED
impl R<bool, CH1EN_A>[src]
pub fn variant(&self) -> CH1EN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, CH0NEN_A>[src]
pub fn variant(&self) -> CH0NEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u16, Reg<u16, _CHCTL2>>[src]
pub fn ch1np(&self) -> CH1NP_R[src]
Bit 7 - Channel 1 complementary output polarity
pub fn ch1p(&self) -> CH1P_R[src]
Bit 5 - Channel 1 polarity
pub fn ch1en(&self) -> CH1EN_R[src]
Bit 4 - Channel 1 polarity
pub fn ch0np(&self) -> CH0NP_R[src]
Bit 3 - Channel 0 complementary output polarity
pub fn ch0nen(&self) -> CH0NEN_R[src]
Bit 2 - Channel 0 complementary output enable
pub fn ch0p(&self) -> CH0P_R[src]
Bit 1 - Channel 0 polarity
pub fn ch0en(&self) -> CH0EN_R[src]
Bit 0 - Channel 0 enable
impl R<u16, Reg<u16, _CNT>>[src]
impl R<u16, Reg<u16, _PSC>>[src]
impl R<u32, Reg<u32, _CAR>>[src]
impl R<u16, Reg<u16, _CREP>>[src]
impl R<u16, Reg<u16, _CH0CV>>[src]
impl R<u16, Reg<u16, _CH1CV>>[src]
impl R<bool, POEN_A>[src]
pub fn variant(&self) -> POEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, OAEN_A>[src]
pub fn variant(&self) -> OAEN_A[src]
Get enumerated values variant
pub fn is_manual(&self) -> bool[src]
Checks if the value of the field is MANUAL
pub fn is_automatic(&self) -> bool[src]
Checks if the value of the field is AUTOMATIC
impl R<bool, BRKP_A>[src]
pub fn variant(&self) -> BRKP_A[src]
Get enumerated values variant
pub fn is_inverted(&self) -> bool[src]
Checks if the value of the field is INVERTED
pub fn is_not_inverted(&self) -> bool[src]
Checks if the value of the field is NOTINVERTED
impl R<bool, BRKEN_A>[src]
pub fn variant(&self) -> BRKEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, ROS_A>[src]
pub fn variant(&self) -> ROS_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, IOS_A>[src]
pub fn variant(&self) -> IOS_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u8, PROT_A>[src]
pub fn variant(&self) -> PROT_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_mode0(&self) -> bool[src]
Checks if the value of the field is MODE0
pub fn is_mode1(&self) -> bool[src]
Checks if the value of the field is MODE1
pub fn is_mode2(&self) -> bool[src]
Checks if the value of the field is MODE2
impl R<u16, Reg<u16, _CCHP>>[src]
pub fn poen(&self) -> POEN_R[src]
Bit 15 - Primary output enable
pub fn oaen(&self) -> OAEN_R[src]
Bit 14 - Output automatic enable
pub fn brkp(&self) -> BRKP_R[src]
Bit 13 - Break polarity
pub fn brken(&self) -> BRKEN_R[src]
Bit 12 - Break enable
pub fn ros(&self) -> ROS_R[src]
Bit 11 - Run mode off-state configure
pub fn ios(&self) -> IOS_R[src]
Bit 10 - Idle mode off-state configure
pub fn prot(&self) -> PROT_R[src]
Bits 8:9 - Complementary register protect control
pub fn dtcfg(&self) -> DTCFG_R[src]
Bits 0:7 - Dead time configure
impl R<u16, Reg<u16, _DMACFG>>[src]
pub fn dmatc(&self) -> DMATC_R[src]
Bits 8:12 - DMA transfer count
pub fn dmata(&self) -> DMATA_R[src]
Bits 0:4 - DMA transfer access start address
impl R<u16, Reg<u16, _DMATB>>[src]
impl R<u16, Reg<u16, _CFG>>[src]
pub fn ccsel(&self) -> CCSEL_R[src]
Bit 1 - Write Capture/Compare register selection
pub fn outsel(&self) -> OUTSEL_R[src]
Bit 0 - The output value selection
impl R<bool, ARSE_A>[src]
pub fn variant(&self) -> ARSE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, SPM_A>[src]
pub fn variant(&self) -> SPM_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, UPS_A>[src]
pub fn variant(&self) -> UPS_A[src]
Get enumerated values variant
pub fn is_any_event(&self) -> bool[src]
Checks if the value of the field is ANYEVENT
pub fn is_counter_only(&self) -> bool[src]
Checks if the value of the field is COUNTERONLY
impl R<bool, UPDIS_A>[src]
pub fn variant(&self) -> UPDIS_A[src]
Get enumerated values variant
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
impl R<bool, CEN_A>[src]
pub fn variant(&self) -> CEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u16, Reg<u16, _CTL0>>[src]
pub fn ckdiv(&self) -> CKDIV_R[src]
Bits 8:9 - Clock division
pub fn arse(&self) -> ARSE_R[src]
Bit 7 - Auto-reload shadow enable
pub fn spm(&self) -> SPM_R[src]
Bit 3 - Single pulse mode
pub fn ups(&self) -> UPS_R[src]
Bit 2 - Update source
pub fn updis(&self) -> UPDIS_R[src]
Bit 1 - Update disable
pub fn cen(&self) -> CEN_R[src]
Bit 0 - Counter enable
impl R<u16, Reg<u16, _CTL1>>[src]
pub fn iso0n(&self) -> ISO0N_R[src]
Bit 9 - Idle state of channel 0 complementary output
pub fn iso0(&self) -> ISO0_R[src]
Bit 8 - Idle state of channel 0 output
pub fn dmas(&self) -> DMAS_R[src]
Bit 3 - DMA request source selection
pub fn ccuc(&self) -> CCUC_R[src]
Bit 2 - Commutation control shadow register update control
pub fn ccse(&self) -> CCSE_R[src]
Bit 0 - Commutation control shadow register enable
impl R<bool, UPDEN_A>[src]
pub fn variant(&self) -> UPDEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, UPIE_A>[src]
pub fn variant(&self) -> UPIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u16, Reg<u16, _DMAINTEN>>[src]
pub fn ch0den(&self) -> CH0DEN_R[src]
Bit 9 - Channel 0 Capture/Compare DMA request enable
pub fn upden(&self) -> UPDEN_R[src]
Bit 8 - Update DMA request enable
pub fn brkie(&self) -> BRKIE_R[src]
Bit 7 - Break interrupt enable
pub fn cmtie(&self) -> CMTIE_R[src]
Bit 5 - CMT interrupt enable
pub fn ch0ie(&self) -> CH0IE_R[src]
Bit 1 - Channel 0 Capture/Compare interrupt enable
pub fn upie(&self) -> UPIE_R[src]
Bit 0 - Update interrupt enable
impl R<bool, UPIF_A>[src]
pub fn variant(&self) -> UPIF_A[src]
Get enumerated values variant
pub fn is_clear(&self) -> bool[src]
Checks if the value of the field is CLEAR
pub fn is_update_pending(&self) -> bool[src]
Checks if the value of the field is UPDATEPENDING
impl R<u16, Reg<u16, _INTF>>[src]
pub fn ch0of(&self) -> CH0OF_R[src]
Bit 9 - Channel 0 Capture overflow flag
pub fn brkif(&self) -> BRKIF_R[src]
Bit 7 - Break interrupt flag
pub fn cmtif(&self) -> CMTIF_R[src]
Bit 5 - Channel commutation interrupt flag
pub fn ch0if(&self) -> CH0IF_R[src]
Bit 1 - Channel 0 interrupt flag
pub fn upif(&self) -> UPIF_R[src]
Bit 0 - Update interrupt flag
impl R<bool, CH0COMCEN_A>[src]
pub fn variant(&self) -> CH0COMCEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u8, CH0COMCTL_A>[src]
pub fn variant(&self) -> CH0COMCTL_A[src]
Get enumerated values variant
pub fn is_frozen(&self) -> bool[src]
Checks if the value of the field is FROZEN
pub fn is_active_on_match(&self) -> bool[src]
Checks if the value of the field is ACTIVEONMATCH
pub fn is_inactive_on_match(&self) -> bool[src]
Checks if the value of the field is INACTIVEONMATCH
pub fn is_toggle(&self) -> bool[src]
Checks if the value of the field is TOGGLE
pub fn is_force_inactive(&self) -> bool[src]
Checks if the value of the field is FORCEINACTIVE
pub fn is_force_active(&self) -> bool[src]
Checks if the value of the field is FORCEACTIVE
pub fn is_pwm_mode1(&self) -> bool[src]
Checks if the value of the field is PWMMODE1
pub fn is_pwm_mode2(&self) -> bool[src]
Checks if the value of the field is PWMMODE2
impl R<bool, CH0COMSEN_A>[src]
pub fn variant(&self) -> CH0COMSEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, CH0COMFEN_A>[src]
pub fn variant(&self) -> CH0COMFEN_A[src]
Get enumerated values variant
pub fn is_slow(&self) -> bool[src]
Checks if the value of the field is SLOW
pub fn is_fast(&self) -> bool[src]
Checks if the value of the field is FAST
impl R<u8, CH0MS_A>[src]
pub fn variant(&self) -> CH0MS_A[src]
Get enumerated values variant
pub fn is_output(&self) -> bool[src]
Checks if the value of the field is OUTPUT
pub fn is_ci1(&self) -> bool[src]
Checks if the value of the field is CI1
pub fn is_ci2(&self) -> bool[src]
Checks if the value of the field is CI2
pub fn is_its(&self) -> bool[src]
Checks if the value of the field is ITS
impl R<u16, Reg<u16, _CHCTL0_OUTPUT>>[src]
pub fn ch0comcen(&self) -> CH0COMCEN_R[src]
Bit 7 - Channel 0 output compare clear enable
pub fn ch0comctl(&self) -> CH0COMCTL_R[src]
Bits 4:6 - Channel 0 compare output control
pub fn ch0comsen(&self) -> CH0COMSEN_R[src]
Bit 3 - Channel 0 output compare shadow enable
pub fn ch0comfen(&self) -> CH0COMFEN_R[src]
Bit 2 - Channel 0 output compare fast enable
pub fn ch0ms(&self) -> CH0MS_R[src]
Bits 0:1 - Channel 0 mode selection
impl R<u16, Reg<u16, _CHCTL0_INPUT>>[src]
pub fn ch0capflt(&self) -> CH0CAPFLT_R[src]
Bits 4:7 - Channel 0 input capture filter control
pub fn ch0cappsc(&self) -> CH0CAPPSC_R[src]
Bits 2:3 - Channel 0 input capture prescaler
pub fn ch0ms(&self) -> CH0MS_R[src]
Bits 0:1 - Channel 0 mode selection
impl R<bool, CH0NP_A>[src]
pub fn variant(&self) -> CH0NP_A[src]
Get enumerated values variant
pub fn is_not_inverted(&self) -> bool[src]
Checks if the value of the field is NOTINVERTED
pub fn is_inverted(&self) -> bool[src]
Checks if the value of the field is INVERTED
impl R<bool, CH0NEN_A>[src]
pub fn variant(&self) -> CH0NEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, CH0P_A>[src]
pub fn variant(&self) -> CH0P_A[src]
Get enumerated values variant
pub fn is_not_inverted(&self) -> bool[src]
Checks if the value of the field is NOTINVERTED
pub fn is_inverted(&self) -> bool[src]
Checks if the value of the field is INVERTED
impl R<bool, CH0EN_A>[src]
pub fn variant(&self) -> CH0EN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u16, Reg<u16, _CHCTL2>>[src]
pub fn ch0np(&self) -> CH0NP_R[src]
Bit 3 - Channel 0 complementary output polarity
pub fn ch0nen(&self) -> CH0NEN_R[src]
Bit 2 - Channel 0 complementary output enable
pub fn ch0p(&self) -> CH0P_R[src]
Bit 1 - Channel 0 polarity
pub fn ch0en(&self) -> CH0EN_R[src]
Bit 0 - Channel 0 enable
impl R<u16, Reg<u16, _CNT>>[src]
impl R<u16, Reg<u16, _PSC>>[src]
impl R<u16, Reg<u16, _CAR>>[src]
impl R<u16, Reg<u16, _CREP>>[src]
impl R<u16, Reg<u16, _CH0CV>>[src]
impl R<bool, POEN_A>[src]
pub fn variant(&self) -> POEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, OAEN_A>[src]
pub fn variant(&self) -> OAEN_A[src]
Get enumerated values variant
pub fn is_manual(&self) -> bool[src]
Checks if the value of the field is MANUAL
pub fn is_automatic(&self) -> bool[src]
Checks if the value of the field is AUTOMATIC
impl R<bool, BRKP_A>[src]
pub fn variant(&self) -> BRKP_A[src]
Get enumerated values variant
pub fn is_inverted(&self) -> bool[src]
Checks if the value of the field is INVERTED
pub fn is_not_inverted(&self) -> bool[src]
Checks if the value of the field is NOTINVERTED
impl R<bool, BRKEN_A>[src]
pub fn variant(&self) -> BRKEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, ROS_A>[src]
pub fn variant(&self) -> ROS_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, IOS_A>[src]
pub fn variant(&self) -> IOS_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u8, PROT_A>[src]
pub fn variant(&self) -> PROT_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_mode0(&self) -> bool[src]
Checks if the value of the field is MODE0
pub fn is_mode1(&self) -> bool[src]
Checks if the value of the field is MODE1
pub fn is_mode2(&self) -> bool[src]
Checks if the value of the field is MODE2
impl R<u16, Reg<u16, _CCHP>>[src]
pub fn poen(&self) -> POEN_R[src]
Bit 15 - Primary output enable
pub fn oaen(&self) -> OAEN_R[src]
Bit 14 - Output automatic enable
pub fn brkp(&self) -> BRKP_R[src]
Bit 13 - Break polarity
pub fn brken(&self) -> BRKEN_R[src]
Bit 12 - Break enable
pub fn ros(&self) -> ROS_R[src]
Bit 11 - Run mode off-state configure
pub fn ios(&self) -> IOS_R[src]
Bit 10 - Idle mode off-state configure
pub fn prot(&self) -> PROT_R[src]
Bits 8:9 - Complementary register protect control
pub fn dtcfg(&self) -> DTCFG_R[src]
Bits 0:7 - Dead time configure
impl R<u16, Reg<u16, _DMACFG>>[src]
pub fn dmatc(&self) -> DMATC_R[src]
Bits 8:12 - DMA transfer count
pub fn dmata(&self) -> DMATA_R[src]
Bits 0:4 - DMA transfer access start address
impl R<u16, Reg<u16, _DMATB>>[src]
impl R<u16, Reg<u16, _CFG>>[src]
pub fn outsel(&self) -> OUTSEL_R[src]
Bit 0 - The output value selection
pub fn ccsel(&self) -> CCSEL_R[src]
Bit 1 - Write Capture/Compare register selection
impl R<u32, Reg<u32, _CTL>>[src]
pub fn cdt(&self) -> CDT_R[src]
Bits 28:31 - Charge State Duration Time
pub fn ctdt(&self) -> CTDT_R[src]
Bits 24:27 - Charge Transfer State Duration Time
pub fn ecdt(&self) -> ECDT_R[src]
Bits 17:23 - Extend Charge State Maximum Duration Time
pub fn ecen(&self) -> ECEN_R[src]
Bit 16 - Extend Charge State Enable
pub fn ecdiv(&self) -> ECDIV_R[src]
Bit 15 - ECCLK clock division factor
pub fn ctcdiv(&self) -> CTCDIV_R[src]
Bits 12:14 - CTCLK clock division factor
pub fn mcn(&self) -> MCN_R[src]
Bits 5:7 - Max cycle number of a sequence
pub fn pinmod(&self) -> PINMOD_R[src]
Bit 4 - Pin mode
pub fn egsel(&self) -> EGSEL_R[src]
Bit 3 - Edge selection
pub fn trgmod(&self) -> TRGMOD_R[src]
Bit 2 - Trigger mode selection
pub fn tsis(&self) -> TSIS_R[src]
Bit 1 - TSI start
pub fn tsien(&self) -> TSIEN_R[src]
Bit 0 - TSI enable
impl R<u32, Reg<u32, _INTEN>>[src]
pub fn mnerrie(&self) -> MNERRIE_R[src]
Bit 1 - Max Cycle Number Error Interrupt Enable
pub fn ctcfie(&self) -> CTCFIE_R[src]
Bit 0 - Charge-transfer complete flag Interrupt Enable
impl R<u32, Reg<u32, _INTC>>[src]
pub fn cmnerr(&self) -> CMNERR_R[src]
Bit 1 - Clear max cycle number error
pub fn cctcf(&self) -> CCTCF_R[src]
Bit 0 - Clear charge-transfer complete flag
impl R<u32, Reg<u32, _INTF>>[src]
pub fn mnerr(&self) -> MNERR_R[src]
Bit 1 - Max count error flag
pub fn ctcf(&self) -> CTCF_R[src]
Bit 0 - Charge-Transfer complete flag
impl R<u32, Reg<u32, _PHM>>[src]
pub fn g5p3(&self) -> G5P3_R[src]
Bit 23 - G5P3 Schmitt trigger hysteresis mode
pub fn g5p2(&self) -> G5P2_R[src]
Bit 22 - G5P2 Schmitt trigger hysteresis mode
pub fn g5p1(&self) -> G5P1_R[src]
Bit 21 - G5P1 Schmitt trigger hysteresis mode
pub fn g5p0(&self) -> G5P0_R[src]
Bit 20 - G5P0 Schmitt trigger hysteresis mode
pub fn g4p3(&self) -> G4P3_R[src]
Bit 19 - G4P3 Schmitt trigger hysteresis mode
pub fn g4p2(&self) -> G4P2_R[src]
Bit 18 - G4P2 Schmitt trigger hysteresis mode
pub fn g4p1(&self) -> G4P1_R[src]
Bit 17 - G4P1 Schmitt trigger hysteresis mode
pub fn g4p0(&self) -> G4P0_R[src]
Bit 16 - G4P0 Schmitt trigger hysteresis mode
pub fn g3p3(&self) -> G3P3_R[src]
Bit 15 - G3P3 Schmitt trigger hysteresis mode
pub fn g3p2(&self) -> G3P2_R[src]
Bit 14 - G3P2 Schmitt trigger hysteresis mode
pub fn g3p1(&self) -> G3P1_R[src]
Bit 13 - G3P1 Schmitt trigger hysteresis mode
pub fn g3p0(&self) -> G3P0_R[src]
Bit 12 - G3P0 Schmitt trigger hysteresis mode
pub fn g2p3(&self) -> G2P3_R[src]
Bit 11 - G2P3 Schmitt trigger hysteresis mode
pub fn g2p2(&self) -> G2P2_R[src]
Bit 10 - G2P2 Schmitt trigger hysteresis mode
pub fn g2p1(&self) -> G2P1_R[src]
Bit 9 - G2P1 Schmitt trigger hysteresis mode
pub fn g2p0(&self) -> G2P0_R[src]
Bit 8 - G2P0 Schmitt trigger hysteresis mode
pub fn g1p3(&self) -> G1P3_R[src]
Bit 7 - G1P3 Schmitt trigger hysteresis mode
pub fn g1p2(&self) -> G1P2_R[src]
Bit 6 - G1P2 Schmitt trigger hysteresis mode
pub fn g1p1(&self) -> G1P1_R[src]
Bit 5 - G1P1 Schmitt trigger hysteresis mode
pub fn g1p0(&self) -> G1P0_R[src]
Bit 4 - G1P0 Schmitt trigger hysteresis mode
pub fn g0p3(&self) -> G0P3_R[src]
Bit 3 - G0P3 Schmitt trigger hysteresis mode
pub fn g0p2(&self) -> G0P2_R[src]
Bit 2 - G0P2 Schmitt trigger hysteresis mode
pub fn g0p1(&self) -> G0P1_R[src]
Bit 1 - G0P1 Schmitt trigger hysteresis mode
pub fn g0p0(&self) -> G0P0_R[src]
Bit 0 - G0P0 Schmitt trigger hysteresis mode
impl R<u32, Reg<u32, _ASW>>[src]
pub fn g5p3(&self) -> G5P3_R[src]
Bit 23 - G5P3 analog switch enable
pub fn g5p2(&self) -> G5P2_R[src]
Bit 22 - G5P2 analog switch enable
pub fn g5p1(&self) -> G5P1_R[src]
Bit 21 - G5P1 analog switch enable
pub fn g5p0(&self) -> G5P0_R[src]
Bit 20 - G5P0 analog switch enable
pub fn g4p3(&self) -> G4P3_R[src]
Bit 19 - G4P3 analog switch enable
pub fn g4p2(&self) -> G4P2_R[src]
Bit 18 - G4P2 analog switch enable
pub fn g4p1(&self) -> G4P1_R[src]
Bit 17 - G4P1 analog switch enable
pub fn g4p0(&self) -> G4P0_R[src]
Bit 16 - G4P0 analog switch enable
pub fn g3p3(&self) -> G3P3_R[src]
Bit 15 - G3P3 analog switch enable
pub fn g3p2(&self) -> G3P2_R[src]
Bit 14 - G3P2 analog switch enable
pub fn g3p1(&self) -> G3P1_R[src]
Bit 13 - G3P1 analog switch enable
pub fn g3p0(&self) -> G3P0_R[src]
Bit 12 - G3P0 analog switch enable
pub fn g2p3(&self) -> G2P3_R[src]
Bit 11 - G2P3 analog switch enable
pub fn g2p2(&self) -> G2P2_R[src]
Bit 10 - G2P2 analog switch enable
pub fn g2p1(&self) -> G2P1_R[src]
Bit 9 - G2P1 analog switch enable
pub fn g2p0(&self) -> G2P0_R[src]
Bit 8 - G2P0 analog switch enable
pub fn g1p3(&self) -> G1P3_R[src]
Bit 7 - G1P3 analog switch enable
pub fn g1p2(&self) -> G1P2_R[src]
Bit 6 - G1P2 analog switch enable
pub fn g1p1(&self) -> G1P1_R[src]
Bit 5 - G1P1 analog switch enable
pub fn g1p0(&self) -> G1P0_R[src]
Bit 4 - G1P0 analog switch enable
pub fn g0p3(&self) -> G0P3_R[src]
Bit 3 - G0P3 analog switch enable
pub fn g0p2(&self) -> G0P2_R[src]
Bit 2 - G0P2 analog switch enable
pub fn g0p1(&self) -> G0P1_R[src]
Bit 1 - G0P1 analog switch enable
pub fn g0p0(&self) -> G0P0_R[src]
Bit 0 - G0P0 analog switch enable
impl R<u32, Reg<u32, _SAMPCFG>>[src]
pub fn g5p3(&self) -> G5P3_R[src]
Bit 23 - G5P3 sampling mode
pub fn g5p2(&self) -> G5P2_R[src]
Bit 22 - G5P2 sampling mode
pub fn g5p1(&self) -> G5P1_R[src]
Bit 21 - G5P1 sampling mode
pub fn g5p0(&self) -> G5P0_R[src]
Bit 20 - G5P0 sampling mode
pub fn g4p3(&self) -> G4P3_R[src]
Bit 19 - G4P3 sampling mode
pub fn g4p2(&self) -> G4P2_R[src]
Bit 18 - G4P2 sampling mode
pub fn g4p1(&self) -> G4P1_R[src]
Bit 17 - G4P1 sampling mode
pub fn g4p0(&self) -> G4P0_R[src]
Bit 16 - G4P0 sampling mode
pub fn g3p3(&self) -> G3P3_R[src]
Bit 15 - G3P3 sampling mode
pub fn g3p2(&self) -> G3P2_R[src]
Bit 14 - G3P2 sampling mode
pub fn g3p1(&self) -> G3P1_R[src]
Bit 13 - G3P1 sampling mode
pub fn g3p0(&self) -> G3P0_R[src]
Bit 12 - G3P0 sampling mode
pub fn g2p3(&self) -> G2P3_R[src]
Bit 11 - G2P3 sampling mode
pub fn g2p2(&self) -> G2P2_R[src]
Bit 10 - G2P2 sampling mode
pub fn g2p1(&self) -> G2P1_R[src]
Bit 9 - G2P1 sampling mode
pub fn g2p0(&self) -> G2P0_R[src]
Bit 8 - G2P0 sampling mode
pub fn g1p3(&self) -> G1P3_R[src]
Bit 7 - G1P3 sampling mode
pub fn g1p2(&self) -> G1P2_R[src]
Bit 6 - G1P2 sampling mode
pub fn g1p1(&self) -> G1P1_R[src]
Bit 5 - G1P1 sampling mode
pub fn g1p0(&self) -> G1P0_R[src]
Bit 4 - G1P0 sampling mode
pub fn g0p3(&self) -> G0P3_R[src]
Bit 3 - G0P3 sampling mode
pub fn g0p2(&self) -> G0P2_R[src]
Bit 2 - G0P2 sampling mode
pub fn g0p1(&self) -> G0P1_R[src]
Bit 1 - G0P1 sampling mode
pub fn g0p0(&self) -> G0P0_R[src]
Bit 0 - G0P0 sampling mode
impl R<u32, Reg<u32, _CHCFG>>[src]
pub fn g5p3(&self) -> G5P3_R[src]
Bit 23 - G5P3 channel mode
pub fn g5p2(&self) -> G5P2_R[src]
Bit 22 - G5P2 channel mode
pub fn g5p1(&self) -> G5P1_R[src]
Bit 21 - G5P1 channel mode
pub fn g5p0(&self) -> G5P0_R[src]
Bit 20 - G5P0 channel mode
pub fn g4p3(&self) -> G4P3_R[src]
Bit 19 - G4P3 channel mode
pub fn g4p2(&self) -> G4P2_R[src]
Bit 18 - G4P2 channel mode
pub fn g4p1(&self) -> G4P1_R[src]
Bit 17 - G4P1 channel mode
pub fn g4p0(&self) -> G4P0_R[src]
Bit 16 - G4P0 channel mode
pub fn g3p3(&self) -> G3P3_R[src]
Bit 15 - G3P3 channel mode
pub fn g3p2(&self) -> G3P2_R[src]
Bit 14 - G3P2 channel mode
pub fn g3p1(&self) -> G3P1_R[src]
Bit 13 - G3P1 channel mode
pub fn g3p0(&self) -> G3P0_R[src]
Bit 12 - G3P0 channel mode
pub fn g2p3(&self) -> G2P3_R[src]
Bit 11 - G2P3 channel mode
pub fn g2p2(&self) -> G2P2_R[src]
Bit 10 - G2P2 channel mode
pub fn g2p1(&self) -> G2P1_R[src]
Bit 9 - G2P1 channel mode
pub fn g2p0(&self) -> G2P0_R[src]
Bit 8 - G2P0 channel mode
pub fn g1p3(&self) -> G1P3_R[src]
Bit 7 - G1P3 channel mode
pub fn g1p2(&self) -> G1P2_R[src]
Bit 6 - G1P2 channel mode
pub fn g1p1(&self) -> G1P1_R[src]
Bit 5 - G1P1 channel mode
pub fn g1p0(&self) -> G1P0_R[src]
Bit 4 - G1P0 channel mode
pub fn g0p3(&self) -> G0P3_R[src]
Bit 3 - G0P3 channel mode
pub fn g0p2(&self) -> G0P2_R[src]
Bit 2 - G0P2 channel mode
pub fn g0p1(&self) -> G0P1_R[src]
Bit 1 - G0P1 channel mode
pub fn g0p0(&self) -> G0P0_R[src]
Bit 0 - G0P0 channel mode
impl R<u32, Reg<u32, _GCTL>>[src]
pub fn gc5(&self) -> GC5_R[src]
Bit 21 - Analog I/O group 5 status
pub fn gc4(&self) -> GC4_R[src]
Bit 20 - Analog I/O group 4 status
pub fn gc3(&self) -> GC3_R[src]
Bit 19 - Analog I/O group 3 status
pub fn gc2(&self) -> GC2_R[src]
Bit 18 - Analog I/O group 2 status
pub fn gc1(&self) -> GC1_R[src]
Bit 17 - Analog I/O group 1 status
pub fn gc0(&self) -> GC0_R[src]
Bit 16 - Analog I/O group 0 status
pub fn ge5(&self) -> GE5_R[src]
Bit 5 - Analog I/O group 5 enable
pub fn ge4(&self) -> GE4_R[src]
Bit 4 - Analog I/O group 4 enable
pub fn ge3(&self) -> GE3_R[src]
Bit 3 - Analog I/O group 3 enable
pub fn ge2(&self) -> GE2_R[src]
Bit 2 - Analog I/O group 2 enable
pub fn ge1(&self) -> GE1_R[src]
Bit 1 - Analog I/O group 1 enable
pub fn ge0(&self) -> GE0_R[src]
Bit 0 - Analog I/O group 0 enable
impl R<u32, Reg<u32, _G0CYCN>>[src]
impl R<u32, Reg<u32, _G1CYCN>>[src]
impl R<u32, Reg<u32, _G2CYCN>>[src]
impl R<u32, Reg<u32, _G3CYCN>>[src]
impl R<u32, Reg<u32, _G4CYCN>>[src]
impl R<u32, Reg<u32, _G5CYCN>>[src]
impl R<bool, EBIE_A>[src]
pub fn variant(&self) -> EBIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, RTIE_A>[src]
pub fn variant(&self) -> RTIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, OVSMOD_A>[src]
pub fn variant(&self) -> OVSMOD_A[src]
Get enumerated values variant
pub fn is_oversampling16(&self) -> bool[src]
Checks if the value of the field is OVERSAMPLING16
pub fn is_oversampling8(&self) -> bool[src]
Checks if the value of the field is OVERSAMPLING8
impl R<bool, AMIE_A>[src]
pub fn variant(&self) -> AMIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, MEN_A>[src]
pub fn variant(&self) -> MEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, WL_A>[src]
pub fn variant(&self) -> WL_A[src]
Get enumerated values variant
pub fn is_bit8(&self) -> bool[src]
Checks if the value of the field is BIT8
pub fn is_bit9(&self) -> bool[src]
Checks if the value of the field is BIT9
impl R<bool, WM_A>[src]
pub fn variant(&self) -> WM_A[src]
Get enumerated values variant
pub fn is_idle(&self) -> bool[src]
Checks if the value of the field is IDLE
pub fn is_address(&self) -> bool[src]
Checks if the value of the field is ADDRESS
impl R<bool, PCEN_A>[src]
pub fn variant(&self) -> PCEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, PM_A>[src]
pub fn variant(&self) -> PM_A[src]
Get enumerated values variant
pub fn is_even(&self) -> bool[src]
Checks if the value of the field is EVEN
pub fn is_odd(&self) -> bool[src]
Checks if the value of the field is ODD
impl R<bool, PERRIE_A>[src]
pub fn variant(&self) -> PERRIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, TBEIE_A>[src]
pub fn variant(&self) -> TBEIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, TCIE_A>[src]
pub fn variant(&self) -> TCIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, RBNEIE_A>[src]
pub fn variant(&self) -> RBNEIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, IDLEIE_A>[src]
pub fn variant(&self) -> IDLEIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, TEN_A>[src]
pub fn variant(&self) -> TEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, REN_A>[src]
pub fn variant(&self) -> REN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, UESM_A>[src]
pub fn variant(&self) -> UESM_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, UEN_A>[src]
pub fn variant(&self) -> UEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CTL0>>[src]
pub fn ebie(&self) -> EBIE_R[src]
Bit 27 - End of Block interrupt enable
pub fn rtie(&self) -> RTIE_R[src]
Bit 26 - Receiver timeout interrupt enable
pub fn dea(&self) -> DEA_R[src]
Bits 21:25 - Driver Enable assertion time
pub fn ded(&self) -> DED_R[src]
Bits 16:20 - Driver Enable deassertion time
pub fn ovsmod(&self) -> OVSMOD_R[src]
Bit 15 - Oversampling mode
pub fn amie(&self) -> AMIE_R[src]
Bit 14 - ADDR match interrupt enable
pub fn men(&self) -> MEN_R[src]
Bit 13 - Mute mode enable
pub fn wl(&self) -> WL_R[src]
Bit 12 - Word length
pub fn wm(&self) -> WM_R[src]
Bit 11 - Wakeup method in mute mode
pub fn pcen(&self) -> PCEN_R[src]
Bit 10 - Parity control enable
pub fn pm(&self) -> PM_R[src]
Bit 9 - Parity selection
pub fn perrie(&self) -> PERRIE_R[src]
Bit 8 - Parity error interrupt enable
pub fn tbeie(&self) -> TBEIE_R[src]
Bit 7 - Transmitter register empty interrupt enable
pub fn tcie(&self) -> TCIE_R[src]
Bit 6 - Transmission complete interrupt enable
pub fn rbneie(&self) -> RBNEIE_R[src]
Bit 5 - Read data buffer not empty interrupt and overrun error interrupt enable
pub fn idleie(&self) -> IDLEIE_R[src]
Bit 4 - IDLE line detected interrupt enable
pub fn ten(&self) -> TEN_R[src]
Bit 3 - Transmitter enable
pub fn ren(&self) -> REN_R[src]
Bit 2 - Receiver enable
pub fn uesm(&self) -> UESM_R[src]
Bit 1 - USART enable in Deep-sleep mode
pub fn uen(&self) -> UEN_R[src]
Bit 0 - USART enable
impl R<bool, RTEN_A>[src]
pub fn variant(&self) -> RTEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u8, ABDM_A>[src]
pub fn variant(&self) -> Variant<u8, ABDM_A>[src]
Get enumerated values variant
pub fn is_start(&self) -> bool[src]
Checks if the value of the field is START
pub fn is_edge(&self) -> bool[src]
Checks if the value of the field is EDGE
impl R<bool, ABDEN_A>[src]
pub fn variant(&self) -> ABDEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, MSBF_A>[src]
pub fn variant(&self) -> MSBF_A[src]
Get enumerated values variant
pub fn is_lsb(&self) -> bool[src]
Checks if the value of the field is LSB
pub fn is_msb(&self) -> bool[src]
Checks if the value of the field is MSB
impl R<bool, DINV_A>[src]
pub fn variant(&self) -> DINV_A[src]
Get enumerated values variant
pub fn is_positive(&self) -> bool[src]
Checks if the value of the field is POSITIVE
pub fn is_negative(&self) -> bool[src]
Checks if the value of the field is NEGATIVE
impl R<bool, TINV_A>[src]
pub fn variant(&self) -> TINV_A[src]
Get enumerated values variant
pub fn is_standard(&self) -> bool[src]
Checks if the value of the field is STANDARD
pub fn is_inverted(&self) -> bool[src]
Checks if the value of the field is INVERTED
impl R<bool, RINV_A>[src]
pub fn variant(&self) -> RINV_A[src]
Get enumerated values variant
pub fn is_standard(&self) -> bool[src]
Checks if the value of the field is STANDARD
pub fn is_inverted(&self) -> bool[src]
Checks if the value of the field is INVERTED
impl R<bool, STRP_A>[src]
pub fn variant(&self) -> STRP_A[src]
Get enumerated values variant
pub fn is_standard(&self) -> bool[src]
Checks if the value of the field is STANDARD
pub fn is_swapped(&self) -> bool[src]
Checks if the value of the field is SWAPPED
impl R<bool, LMEN_A>[src]
pub fn variant(&self) -> LMEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u8, STB_A>[src]
pub fn variant(&self) -> STB_A[src]
Get enumerated values variant
pub fn is_stop1(&self) -> bool[src]
Checks if the value of the field is STOP1
pub fn is_stop0p5(&self) -> bool[src]
Checks if the value of the field is STOP0P5
pub fn is_stop2(&self) -> bool[src]
Checks if the value of the field is STOP2
pub fn is_stop1p5(&self) -> bool[src]
Checks if the value of the field is STOP1P5
impl R<bool, CKEN_A>[src]
pub fn variant(&self) -> CKEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, CPL_A>[src]
pub fn variant(&self) -> CPL_A[src]
Get enumerated values variant
pub fn is_not_inverted(&self) -> bool[src]
Checks if the value of the field is NOTINVERTED
pub fn is_inverted(&self) -> bool[src]
Checks if the value of the field is INVERTED
impl R<bool, CPH_A>[src]
pub fn variant(&self) -> CPH_A[src]
Get enumerated values variant
pub fn is_first(&self) -> bool[src]
Checks if the value of the field is FIRST
pub fn is_second(&self) -> bool[src]
Checks if the value of the field is SECOND
impl R<bool, CLEN_A>[src]
pub fn variant(&self) -> CLEN_A[src]
Get enumerated values variant
pub fn is_not_output(&self) -> bool[src]
Checks if the value of the field is NOTOUTPUT
pub fn is_output(&self) -> bool[src]
Checks if the value of the field is OUTPUT
impl R<bool, LBDIE_A>[src]
pub fn variant(&self) -> LBDIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, LBLEN_A>[src]
pub fn variant(&self) -> LBLEN_A[src]
Get enumerated values variant
pub fn is_bit10(&self) -> bool[src]
Checks if the value of the field is BIT10
pub fn is_bit11(&self) -> bool[src]
Checks if the value of the field is BIT11
impl R<bool, ADDM_A>[src]
pub fn variant(&self) -> ADDM_A[src]
Get enumerated values variant
pub fn is_bit4(&self) -> bool[src]
Checks if the value of the field is BIT4
pub fn is_full(&self) -> bool[src]
Checks if the value of the field is FULL
impl R<u32, Reg<u32, _CTL1>>[src]
pub fn addr(&self) -> ADDR_R[src]
Bits 24:31 - Address of the USART terminal
pub fn rten(&self) -> RTEN_R[src]
Bit 23 - Receiver timeout enable
pub fn abdm(&self) -> ABDM_R[src]
Bits 21:22 - Auto baud rate mode
pub fn abden(&self) -> ABDEN_R[src]
Bit 20 - Auto baud rate enable
pub fn msbf(&self) -> MSBF_R[src]
Bit 19 - Most significant bit first
pub fn dinv(&self) -> DINV_R[src]
Bit 18 - Data bit level inversion
pub fn tinv(&self) -> TINV_R[src]
Bit 17 - TX pin level inversion
pub fn rinv(&self) -> RINV_R[src]
Bit 16 - RX pin level inversion
pub fn strp(&self) -> STRP_R[src]
Bit 15 - Swap TX/RX pins
pub fn lmen(&self) -> LMEN_R[src]
Bit 14 - LIN mode enable
pub fn stb(&self) -> STB_R[src]
Bits 12:13 - STOP bits length
pub fn cken(&self) -> CKEN_R[src]
Bit 11 - CK pin enable
pub fn cpl(&self) -> CPL_R[src]
Bit 10 - Clock polarity
pub fn cph(&self) -> CPH_R[src]
Bit 9 - Clock phase
pub fn clen(&self) -> CLEN_R[src]
Bit 8 - CK length
pub fn lbdie(&self) -> LBDIE_R[src]
Bit 6 - LIN break detection interrupt enable
pub fn lblen(&self) -> LBLEN_R[src]
Bit 5 - LIN break frame length
pub fn addm(&self) -> ADDM_R[src]
Bit 4 - Address detection mode
impl R<bool, WUIE_A>[src]
pub fn variant(&self) -> WUIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u8, WUM_A>[src]
pub fn variant(&self) -> Variant<u8, WUM_A>[src]
Get enumerated values variant
pub fn is_address(&self) -> bool[src]
Checks if the value of the field is ADDRESS
pub fn is_start(&self) -> bool[src]
Checks if the value of the field is START
pub fn is_rxne(&self) -> bool[src]
Checks if the value of the field is RXNE
impl R<bool, DEP_A>[src]
pub fn variant(&self) -> DEP_A[src]
Get enumerated values variant
pub fn is_high(&self) -> bool[src]
Checks if the value of the field is HIGH
pub fn is_low(&self) -> bool[src]
Checks if the value of the field is LOW
impl R<bool, DEM_A>[src]
pub fn variant(&self) -> DEM_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, DDRE_A>[src]
pub fn variant(&self) -> DDRE_A[src]
Get enumerated values variant
pub fn is_not_disabled(&self) -> bool[src]
Checks if the value of the field is NOTDISABLED
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
impl R<bool, OVRD_A>[src]
pub fn variant(&self) -> OVRD_A[src]
Get enumerated values variant
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
impl R<bool, OSB_A>[src]
pub fn variant(&self) -> OSB_A[src]
Get enumerated values variant
pub fn is_sample3(&self) -> bool[src]
Checks if the value of the field is SAMPLE3
pub fn is_sample1(&self) -> bool[src]
Checks if the value of the field is SAMPLE1
impl R<bool, CTSIE_A>[src]
pub fn variant(&self) -> CTSIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, CTSEN_A>[src]
pub fn variant(&self) -> CTSEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, RTSEN_A>[src]
pub fn variant(&self) -> RTSEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, DENT_A>[src]
pub fn variant(&self) -> DENT_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, DENR_A>[src]
pub fn variant(&self) -> DENR_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, SCEN_A>[src]
pub fn variant(&self) -> SCEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, NKEN_A>[src]
pub fn variant(&self) -> NKEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, HDEN_A>[src]
pub fn variant(&self) -> HDEN_A[src]
Get enumerated values variant
pub fn is_not_selected(&self) -> bool[src]
Checks if the value of the field is NOTSELECTED
pub fn is_selected(&self) -> bool[src]
Checks if the value of the field is SELECTED
impl R<bool, IRLP_A>[src]
pub fn variant(&self) -> IRLP_A[src]
Get enumerated values variant
pub fn is_normal(&self) -> bool[src]
Checks if the value of the field is NORMAL
pub fn is_low_power(&self) -> bool[src]
Checks if the value of the field is LOWPOWER
impl R<bool, IREN_A>[src]
pub fn variant(&self) -> IREN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, ERRIE_A>[src]
pub fn variant(&self) -> ERRIE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CTL2>>[src]
pub fn wuie(&self) -> WUIE_R[src]
Bit 22 - Wakeup from Deep-sleep mode interrupt enable
pub fn wum(&self) -> WUM_R[src]
Bits 20:21 - Wakeup mode from Deep-sleep mode
pub fn scrtnum(&self) -> SCRTNUM_R[src]
Bits 17:19 - Smartcard auto-retry number
pub fn dep(&self) -> DEP_R[src]
Bit 15 - Driver enable polarity mode
pub fn dem(&self) -> DEM_R[src]
Bit 14 - Driver enable mode
pub fn ddre(&self) -> DDRE_R[src]
Bit 13 - Disable DMA on reception error
pub fn ovrd(&self) -> OVRD_R[src]
Bit 12 - Overrun Disable
pub fn osb(&self) -> OSB_R[src]
Bit 11 - One sample bit method
pub fn ctsie(&self) -> CTSIE_R[src]
Bit 10 - CTS interrupt enable
pub fn ctsen(&self) -> CTSEN_R[src]
Bit 9 - CTS enable
pub fn rtsen(&self) -> RTSEN_R[src]
Bit 8 - RTS enable
pub fn dent(&self) -> DENT_R[src]
Bit 7 - DMA enable transmitter
pub fn denr(&self) -> DENR_R[src]
Bit 6 - DMA enable for reception
pub fn scen(&self) -> SCEN_R[src]
Bit 5 - Smartcard mode enable
pub fn nken(&self) -> NKEN_R[src]
Bit 4 - NKEN enable in Smartcard mode
pub fn hden(&self) -> HDEN_R[src]
Bit 3 - Half-duplex selection
pub fn irlp(&self) -> IRLP_R[src]
Bit 2 - IrDA low-power
pub fn iren(&self) -> IREN_R[src]
Bit 1 - IrDA mode enable
pub fn errie(&self) -> ERRIE_R[src]
Bit 0 - Error interrupt enable
impl R<u32, Reg<u32, _BAUD>>[src]
pub fn intdiv(&self) -> INTDIV_R[src]
Bits 4:15 - Integer part of baud-rate divider
pub fn fradiv(&self) -> FRADIV_R[src]
Bits 0:3 - Fraction part of baud-rate divider
impl R<u32, Reg<u32, _GP>>[src]
pub fn guat(&self) -> GUAT_R[src]
Bits 8:15 - Guard time value in smartcard mode
pub fn psc(&self) -> PSC_R[src]
Bits 0:7 - Prescaler value for dividing the system clock
impl R<u32, Reg<u32, _RT>>[src]
pub fn bl(&self) -> BL_R[src]
Bits 24:31 - Block Length
pub fn rt(&self) -> RT_R[src]
Bits 0:23 - Receiver timeout value
impl R<u32, Reg<u32, _STAT>>[src]
pub fn rea(&self) -> REA_R[src]
Bit 22 - Receive enable acknowledge flag
pub fn tea(&self) -> TEA_R[src]
Bit 21 - Transmit enable acknowledge flag
pub fn wuf(&self) -> WUF_R[src]
Bit 20 - Wakeup from Deep-sleep mode flag
pub fn rwu(&self) -> RWU_R[src]
Bit 19 - Receiver wakeup from Mute mode
pub fn sbf(&self) -> SBF_R[src]
Bit 18 - Send break flag
pub fn amf(&self) -> AMF_R[src]
Bit 17 - ADDR match flag
pub fn bsy(&self) -> BSY_R[src]
Bit 16 - Busy flag
pub fn abdf(&self) -> ABDF_R[src]
Bit 15 - Auto baudrate detection flag
pub fn abde(&self) -> ABDE_R[src]
Bit 14 - Auto baudrate detection error
pub fn ebf(&self) -> EBF_R[src]
Bit 12 - End of block flag
pub fn rtf(&self) -> RTF_R[src]
Bit 11 - Receiver timeout
pub fn cts(&self) -> CTS_R[src]
Bit 10 - CTS level
pub fn ctsf(&self) -> CTSF_R[src]
Bit 9 - CTS change flag
pub fn lbdf(&self) -> LBDF_R[src]
Bit 8 - LIN break detection flag
pub fn tbe(&self) -> TBE_R[src]
Bit 7 - Transmit data register empty
pub fn tc(&self) -> TC_R[src]
Bit 6 - Transmission complete
pub fn rbne(&self) -> RBNE_R[src]
Bit 5 - Read data buffer not empty
pub fn idlef(&self) -> IDLEF_R[src]
Bit 4 - IDLE line detected flag
pub fn orerr(&self) -> ORERR_R[src]
Bit 3 - Overrun error
pub fn nerr(&self) -> NERR_R[src]
Bit 2 - Noise error flag
pub fn ferr(&self) -> FERR_R[src]
Bit 1 - Frame error flag
pub fn perr(&self) -> PERR_R[src]
Bit 0 - Parity error flag
impl R<u32, Reg<u32, _RDATA>>[src]
impl R<u32, Reg<u32, _TDATA>>[src]
impl R<u16, Reg<u16, _EP0CS>>[src]
pub fn ep_ar(&self) -> EP_AR_R[src]
Bits 0:3 - Endpoint address
pub fn tx_sta(&self) -> TX_STA_R[src]
Bits 4:5 - Status bits, for transmission transfers
pub fn tx_dtg(&self) -> TX_DTG_R[src]
Bit 6 - Transmission Data PID Toggle
pub fn tx_st(&self) -> TX_ST_R[src]
Bit 7 - Transmission Successful Transfer
pub fn ep_kctl(&self) -> EP_KCTL_R[src]
Bit 8 - Endpoint kind control
pub fn ep_ctl(&self) -> EP_CTL_R[src]
Bits 9:10 - Endpoint type control
pub fn setup(&self) -> SETUP_R[src]
Bit 11 - Setup transaction completed
pub fn rx_sta(&self) -> RX_STA_R[src]
Bits 12:13 - Reception status bits
pub fn rx_dtg(&self) -> RX_DTG_R[src]
Bit 14 - Reception Data PID Toggle
pub fn rx_st(&self) -> RX_ST_R[src]
Bit 15 - Reception Successful Transferred
impl R<u16, Reg<u16, _EP1CS>>[src]
pub fn ep_ar(&self) -> EP_AR_R[src]
Bits 0:3 - Endpoint address
pub fn tx_sta(&self) -> TX_STA_R[src]
Bits 4:5 - Status bits, for transmission transfers
pub fn tx_dtg(&self) -> TX_DTG_R[src]
Bit 6 - Transmission Data PID Toggle
pub fn tx_st(&self) -> TX_ST_R[src]
Bit 7 - Transmission Successful Transfer
pub fn ep_kctl(&self) -> EP_KCTL_R[src]
Bit 8 - Endpoint kind control
pub fn ep_ctl(&self) -> EP_CTL_R[src]
Bits 9:10 - Endpoint type control
pub fn setup(&self) -> SETUP_R[src]
Bit 11 - Setup transaction completed
pub fn rx_sta(&self) -> RX_STA_R[src]
Bits 12:13 - Reception status bits
pub fn rx_dtg(&self) -> RX_DTG_R[src]
Bit 14 - Reception Data PID Toggle
pub fn rx_st(&self) -> RX_ST_R[src]
Bit 15 - Reception Successful Transferred
impl R<u16, Reg<u16, _EP2CS>>[src]
pub fn ep_ar(&self) -> EP_AR_R[src]
Bits 0:3 - Endpoint address
pub fn tx_sta(&self) -> TX_STA_R[src]
Bits 4:5 - Status bits, for transmission transfers
pub fn tx_dtg(&self) -> TX_DTG_R[src]
Bit 6 - Transmission Data PID Toggle
pub fn tx_st(&self) -> TX_ST_R[src]
Bit 7 - Transmission Successful Transfer
pub fn ep_kctl(&self) -> EP_KCTL_R[src]
Bit 8 - Endpoint kind control
pub fn ep_ctl(&self) -> EP_CTL_R[src]
Bits 9:10 - Endpoint type control
pub fn setup(&self) -> SETUP_R[src]
Bit 11 - Setup transaction completed
pub fn rx_sta(&self) -> RX_STA_R[src]
Bits 12:13 - Reception status bits
pub fn rx_dtg(&self) -> RX_DTG_R[src]
Bit 14 - Reception Data PID Toggle
pub fn rx_st(&self) -> RX_ST_R[src]
Bit 15 - Reception Successful Transferred
impl R<u16, Reg<u16, _EP3CS>>[src]
pub fn ep_ar(&self) -> EP_AR_R[src]
Bits 0:3 - Endpoint address
pub fn tx_sta(&self) -> TX_STA_R[src]
Bits 4:5 - Status bits, for transmission transfers
pub fn tx_dtg(&self) -> TX_DTG_R[src]
Bit 6 - Transmission Data PID Toggle
pub fn tx_st(&self) -> TX_ST_R[src]
Bit 7 - Transmission Successful Transfer
pub fn ep_kctl(&self) -> EP_KCTL_R[src]
Bit 8 - Endpoint kind control
pub fn ep_ctl(&self) -> EP_CTL_R[src]
Bits 9:10 - Endpoint type control
pub fn setup(&self) -> SETUP_R[src]
Bit 11 - Setup transaction completed
pub fn rx_sta(&self) -> RX_STA_R[src]
Bits 12:13 - Reception status bits
pub fn rx_dtg(&self) -> RX_DTG_R[src]
Bit 14 - Reception Data PID Toggle
pub fn rx_st(&self) -> RX_ST_R[src]
Bit 15 - Reception Successful Transferred
impl R<u16, Reg<u16, _EP4CS>>[src]
pub fn ep_ar(&self) -> EP_AR_R[src]
Bits 0:3 - Endpoint address
pub fn tx_sta(&self) -> TX_STA_R[src]
Bits 4:5 - Status bits, for transmission transfers
pub fn tx_dtg(&self) -> TX_DTG_R[src]
Bit 6 - Transmission Data PID Toggle
pub fn tx_st(&self) -> TX_ST_R[src]
Bit 7 - Transmission Successful Transfer
pub fn ep_kctl(&self) -> EP_KCTL_R[src]
Bit 8 - Endpoint kind control
pub fn ep_ctl(&self) -> EP_CTL_R[src]
Bits 9:10 - Endpoint type control
pub fn setup(&self) -> SETUP_R[src]
Bit 11 - Setup transaction completed
pub fn rx_sta(&self) -> RX_STA_R[src]
Bits 12:13 - Reception status bits
pub fn rx_dtg(&self) -> RX_DTG_R[src]
Bit 14 - Reception Data PID Toggle
pub fn rx_st(&self) -> RX_ST_R[src]
Bit 15 - Reception Successful Transferred
impl R<u16, Reg<u16, _EP5CS>>[src]
pub fn ep_ar(&self) -> EP_AR_R[src]
Bits 0:3 - Endpoint address
pub fn tx_sta(&self) -> TX_STA_R[src]
Bits 4:5 - Status bits, for transmission transfers
pub fn tx_dtg(&self) -> TX_DTG_R[src]
Bit 6 - Transmission Data PID Toggle
pub fn tx_st(&self) -> TX_ST_R[src]
Bit 7 - Transmission Successful Transfer
pub fn ep_kctl(&self) -> EP_KCTL_R[src]
Bit 8 - Endpoint kind control
pub fn ep_ctl(&self) -> EP_CTL_R[src]
Bits 9:10 - Endpoint type control
pub fn setup(&self) -> SETUP_R[src]
Bit 11 - Setup transaction completed
pub fn rx_sta(&self) -> RX_STA_R[src]
Bits 12:13 - Reception status bits
pub fn rx_dtg(&self) -> RX_DTG_R[src]
Bit 14 - Reception Data PID Toggle
pub fn rx_st(&self) -> RX_ST_R[src]
Bit 15 - Reception Successful Transferred
impl R<u16, Reg<u16, _EP6CS>>[src]
pub fn ep_ar(&self) -> EP_AR_R[src]
Bits 0:3 - Endpoint address
pub fn tx_sta(&self) -> TX_STA_R[src]
Bits 4:5 - Status bits, for transmission transfers
pub fn tx_dtg(&self) -> TX_DTG_R[src]
Bit 6 - Transmission Data PID Toggle
pub fn tx_st(&self) -> TX_ST_R[src]
Bit 7 - Transmission Successful Transfer
pub fn ep_kctl(&self) -> EP_KCTL_R[src]
Bit 8 - Endpoint kind control
pub fn ep_ctl(&self) -> EP_CTL_R[src]
Bits 9:10 - Endpoint type control
pub fn setup(&self) -> SETUP_R[src]
Bit 11 - Setup transaction completed
pub fn rx_sta(&self) -> RX_STA_R[src]
Bits 12:13 - Reception status bits
pub fn rx_dtg(&self) -> RX_DTG_R[src]
Bit 14 - Reception Data PID Toggle
pub fn rx_st(&self) -> RX_ST_R[src]
Bit 15 - Reception Successful Transferred
impl R<u16, Reg<u16, _EP7CS>>[src]
pub fn ep_ar(&self) -> EP_AR_R[src]
Bits 0:3 - Endpoint address
pub fn tx_sta(&self) -> TX_STA_R[src]
Bits 4:5 - Status bits, for transmission transfers
pub fn tx_dtg(&self) -> TX_DTG_R[src]
Bit 6 - Transmission Data PID Toggle
pub fn tx_st(&self) -> TX_ST_R[src]
Bit 7 - Transmission Successful Transfer
pub fn ep_kctl(&self) -> EP_KCTL_R[src]
Bit 8 - Endpoint kind control
pub fn ep_ctl(&self) -> EP_CTL_R[src]
Bits 9:10 - Endpoint type control
pub fn setup(&self) -> SETUP_R[src]
Bit 11 - Setup transaction completed
pub fn rx_sta(&self) -> RX_STA_R[src]
Bits 12:13 - Reception status bits
pub fn rx_dtg(&self) -> RX_DTG_R[src]
Bit 14 - Reception Data PID Toggle
pub fn rx_st(&self) -> RX_ST_R[src]
Bit 15 - Reception Successful Transferred
impl R<u16, Reg<u16, _CTL>>[src]
pub fn setrst(&self) -> SETRST_R[src]
Bit 0 - USB Reset
pub fn close(&self) -> CLOSE_R[src]
Bit 1 - USB close
pub fn lowm(&self) -> LOWM_R[src]
Bit 2 - Low-power mode
pub fn setsps(&self) -> SETSPS_R[src]
Bit 3 - Set suspend state
pub fn rsreq(&self) -> RSREQ_R[src]
Bit 4 - Send resume request
pub fn esofie(&self) -> ESOFIE_R[src]
Bit 8 - Expected start of frame interrupt enable
pub fn sofie(&self) -> SOFIE_R[src]
Bit 9 - Start of frame interrupt enable
pub fn rstie(&self) -> RSTIE_R[src]
Bit 10 - USB reset interrupt enable
pub fn spsie(&self) -> SPSIE_R[src]
Bit 11 - Suspend state interrupt enable
pub fn wkupie(&self) -> WKUPIE_R[src]
Bit 12 - Wakeup interrupt mask
pub fn errie(&self) -> ERRIE_R[src]
Bit 13 - Error interrupt mask
pub fn pmouie(&self) -> PMOUIE_R[src]
Bit 14 - Packet memory overrun / underrun interrupt enable
pub fn stie(&self) -> STIE_R[src]
Bit 15 - Successful transfer interrupt enable
impl R<u16, Reg<u16, _INTF>>[src]
pub fn epnum(&self) -> EPNUM_R[src]
Bits 0:3 - Endpoint Number
pub fn dir(&self) -> DIR_R[src]
Bit 4 - Direction of transaction
pub fn esofif(&self) -> ESOFIF_R[src]
Bit 8 - Expected start of frame interrupt flag
pub fn sofif(&self) -> SOFIF_R[src]
Bit 9 - Start of frame interrupt flag
pub fn rstif(&self) -> RSTIF_R[src]
Bit 10 - USB reset interrupt flag
pub fn spsif(&self) -> SPSIF_R[src]
Bit 11 - Suspend state interrupt flag
pub fn wkupif(&self) -> WKUPIF_R[src]
Bit 12 - Wakeup interrupt flag
pub fn errif(&self) -> ERRIF_R[src]
Bit 13 - Error interrupt flag
pub fn pmouif(&self) -> PMOUIF_R[src]
Bit 14 - Packet memory overrun / underrun interrupt flag
pub fn stif(&self) -> STIF_R[src]
Bit 15 - Successful transfer interrupt flag
impl R<u16, Reg<u16, _STAT>>[src]
pub fn fcnt(&self) -> FCNT_R[src]
Bits 0:10 - Frame number counter
pub fn sofln(&self) -> SOFLN_R[src]
Bits 11:12 - SOF lost number
pub fn lock(&self) -> LOCK_R[src]
Bit 13 - Locked the USB
pub fn rx_dm(&self) -> RX_DM_R[src]
Bit 14 - Receive data - line status
pub fn rx_dp(&self) -> RX_DP_R[src]
Bit 15 - Receive data + line status
impl R<u16, Reg<u16, _DADDR>>[src]
pub fn usbaddr(&self) -> USBADDR_R[src]
Bits 0:6 - USB device address
pub fn usben(&self) -> USBEN_R[src]
Bit 7 - USB device enable
impl R<u16, Reg<u16, _BADDR>>[src]
impl R<u16, Reg<u16, _SEP0>>[src]
pub fn sub_st(&self) -> SUB_ST_R[src]
Bit 15 - Successful Receive for LPM Token
pub fn sub_sta(&self) -> SUB_STA_R[src]
Bits 12:13 - Status bits, for the handshake of receiving subpid LPM
pub fn subpid_attr(&self) -> SUBPID_ATTR_R[src]
Bits 0:10 - LPM Token bmAttribute Field.
impl R<u16, Reg<u16, _SEP1>>[src]
pub fn sub_st(&self) -> SUB_ST_R[src]
Bit 15 - Successful Receive for LPM Token
pub fn sub_sta(&self) -> SUB_STA_R[src]
Bits 12:13 - Status bits, for the handshake of receiving subpid LPM
pub fn subpid_attr(&self) -> SUBPID_ATTR_R[src]
Bits 0:10 - LPM Token bmAttribute Field.
impl R<u16, Reg<u16, _SEP2>>[src]
pub fn sub_st(&self) -> SUB_ST_R[src]
Bit 15 - Successful Receive for LPM Token
pub fn sub_sta(&self) -> SUB_STA_R[src]
Bits 12:13 - Status bits, for the handshake of receiving subpid LPM
pub fn subpid_attr(&self) -> SUBPID_ATTR_R[src]
Bits 0:10 - LPM Token bmAttribute Field.
impl R<u16, Reg<u16, _SEP3>>[src]
pub fn sub_st(&self) -> SUB_ST_R[src]
Bit 15 - Successful Receive for LPM Token
pub fn sub_sta(&self) -> SUB_STA_R[src]
Bits 12:13 - Status bits, for the handshake of receiving subpid LPM
pub fn subpid_attr(&self) -> SUBPID_ATTR_R[src]
Bits 0:10 - LPM Token bmAttribute Field.
impl R<u16, Reg<u16, _SEP4>>[src]
pub fn sub_st(&self) -> SUB_ST_R[src]
Bit 15 - Successful Receive for LPM Token
pub fn sub_sta(&self) -> SUB_STA_R[src]
Bits 12:13 - Status bits, for the handshake of receiving subpid LPM
pub fn subpid_attr(&self) -> SUBPID_ATTR_R[src]
Bits 0:10 - LPM Token bmAttribute Field.
impl R<u16, Reg<u16, _SEP5>>[src]
pub fn sub_st(&self) -> SUB_ST_R[src]
Bit 15 - Successful Receive for LPM Token
pub fn sub_sta(&self) -> SUB_STA_R[src]
Bits 12:13 - Status bits, for the handshake of receiving subpid LPM
pub fn subpid_attr(&self) -> SUBPID_ATTR_R[src]
Bits 0:10 - LPM Token bmAttribute Field.
impl R<u16, Reg<u16, _SEP6>>[src]
pub fn sub_st(&self) -> SUB_ST_R[src]
Bit 15 - Successful Receive for LPM Token
pub fn sub_sta(&self) -> SUB_STA_R[src]
Bits 12:13 - Status bits, for the handshake of receiving subpid LPM
pub fn subpid_attr(&self) -> SUBPID_ATTR_R[src]
Bits 0:10 - LPM Token bmAttribute Field.
impl R<u16, Reg<u16, _SEP7>>[src]
pub fn sub_st(&self) -> SUB_ST_R[src]
Bit 15 - Successful Receive for LPM Token
pub fn sub_sta(&self) -> SUB_STA_R[src]
Bits 12:13 - Status bits, for the handshake of receiving subpid LPM
pub fn subpid_attr(&self) -> SUBPID_ATTR_R[src]
Bits 0:10 - LPM Token bmAttribute Field.
impl R<u16, Reg<u16, _LPMCTL>>[src]
impl R<u16, Reg<u16, _LPMINTF>>[src]
impl R<bool, WDGTEN_A>[src]
pub fn variant(&self) -> WDGTEN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _CTL>>[src]
pub fn wdgten(&self) -> WDGTEN_R[src]
Bit 7 - Start the Window watchdog timer
pub fn cnt(&self) -> CNT_R[src]
Bits 0:6 - watchdog timer counter
impl R<bool, EWIE_A>[src]
pub fn variant(&self) -> Variant<bool, EWIE_A>[src]
Get enumerated values variant
pub fn is_enable(&self) -> bool[src]
Checks if the value of the field is ENABLE
impl R<u8, PSC_A>[src]
pub fn variant(&self) -> PSC_A[src]
Get enumerated values variant
pub fn is_div1(&self) -> bool[src]
Checks if the value of the field is DIV1
pub fn is_div2(&self) -> bool[src]
Checks if the value of the field is DIV2
pub fn is_div4(&self) -> bool[src]
Checks if the value of the field is DIV4
pub fn is_div8(&self) -> bool[src]
Checks if the value of the field is DIV8
impl R<u32, Reg<u32, _CFG>>[src]
pub fn ewie(&self) -> EWIE_R[src]
Bit 9 - Early wakeup interrupt enable
pub fn psc(&self) -> PSC_R[src]
Bits 7:8 - Prescaler
pub fn win(&self) -> WIN_R[src]
Bits 0:6 - The Window value
impl R<bool, EWIF_A>[src]
pub fn variant(&self) -> EWIF_A[src]
Get enumerated values variant
pub fn is_pending(&self) -> bool[src]
Checks if the value of the field is PENDING
pub fn is_finished(&self) -> bool[src]
Checks if the value of the field is FINISHED
impl R<u32, Reg<u32, _STAT>>[src]
Trait Implementations
Auto Trait Implementations
impl<U, T> Send for R<U, T> where
T: Send,
U: Send,
T: Send,
U: Send,
impl<U, T> Sync for R<U, T> where
T: Sync,
U: Sync,
T: Sync,
U: Sync,
impl<U, T> Unpin for R<U, T> where
T: Unpin,
U: Unpin,
T: Unpin,
U: Unpin,
Blanket Implementations
impl<T> Any for T where
T: 'static + ?Sized, [src]
T: 'static + ?Sized,
impl<T> Borrow<T> for T where
T: ?Sized, [src]
T: ?Sized,
impl<T> BorrowMut<T> for T where
T: ?Sized, [src]
T: ?Sized,
pub fn borrow_mut(&mut self) -> &mut T[src]
impl<T> From<T> for T[src]
impl<T, U> Into<U> for T where
U: From<T>, [src]
U: From<T>,
impl<T, U> TryFrom<U> for T where
U: Into<T>, [src]
U: Into<T>,
type Error = Infallible
The type returned in the event of a conversion error.
pub fn try_from(value: U) -> Result<T, <T as TryFrom<U>>::Error>[src]
impl<T, U> TryInto<U> for T where
U: TryFrom<T>, [src]
U: TryFrom<T>,