Enum gd32f1::gd32f170::timer0::ctl1::TI0S_A[][src]

pub enum TI0S_A {
    NORMAL,
    XOR,
}

Channel 0 trigger input selection

Value on reset: 0

Variants

NORMAL

0: The CH0 pin input is selected as channel 0 trigger input

XOR

1: The XOR of CH0, CH1 and CH2 pins are selected as channel 0 trigger input

Trait Implementations

impl Clone for TI0S_A[src]

impl Copy for TI0S_A[src]

impl Debug for TI0S_A[src]

impl PartialEq<TI0S_A> for TI0S_A[src]

impl StructuralPartialEq for TI0S_A[src]

Auto Trait Implementations

impl Send for TI0S_A

impl Sync for TI0S_A

impl Unpin for TI0S_A

Blanket Implementations

impl<T> Any for T where
    T: 'static + ?Sized
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impl<T> Borrow<T> for T where
    T: ?Sized
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impl<T> BorrowMut<T> for T where
    T: ?Sized
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impl<T> From<T> for T[src]

impl<T, U> Into<U> for T where
    U: From<T>, 
[src]

impl<T, U> TryFrom<U> for T where
    U: Into<T>, 
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type Error = Infallible

The type returned in the event of a conversion error.

impl<T, U> TryInto<U> for T where
    U: TryFrom<T>, 
[src]

type Error = <U as TryFrom<T>>::Error

The type returned in the event of a conversion error.