#[doc = "Reader of register CTL2"]
pub type R = crate::R<u32, super::CTL2>;
#[doc = "Writer for register CTL2"]
pub type W = crate::W<u32, super::CTL2>;
#[doc = "Register CTL2 `reset()`'s with value 0"]
impl crate::ResetValue for super::CTL2 {
type Type = u32;
#[inline(always)]
fn reset_value() -> Self::Type {
0
}
}
#[doc = "Wakeup from Deep-sleep mode interrupt enable\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum WUIE_A {
#[doc = "0: Wake-up from deep-sleep mode interrupt is disabled"]
DISABLED = 0,
#[doc = "1: Wake-up from deep-sleep mode interrupt is generated whenever WUF=1 in the STAT register"]
ENABLED = 1,
}
impl From<WUIE_A> for bool {
#[inline(always)]
fn from(variant: WUIE_A) -> Self {
variant as u8 != 0
}
}
#[doc = "Reader of field `WUIE`"]
pub type WUIE_R = crate::R<bool, WUIE_A>;
impl WUIE_R {
#[doc = r"Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> WUIE_A {
match self.bits {
false => WUIE_A::DISABLED,
true => WUIE_A::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == WUIE_A::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
*self == WUIE_A::ENABLED
}
}
#[doc = "Write proxy for field `WUIE`"]
pub struct WUIE_W<'a> {
w: &'a mut W,
}
impl<'a> WUIE_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: WUIE_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "Wake-up from deep-sleep mode interrupt is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(WUIE_A::DISABLED)
}
#[doc = "Wake-up from deep-sleep mode interrupt is generated whenever WUF=1 in the STAT register"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(WUIE_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 22)) | (((value as u32) & 0x01) << 22);
self.w
}
}
#[doc = "Wakeup mode from Deep-sleep mode\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
#[repr(u8)]
pub enum WUM_A {
#[doc = "0: WUF active on address match"]
ADDRESS = 0,
#[doc = "2: WUF active on start bit detection"]
START = 2,
#[doc = "3: WUF active on RBNE"]
RXNE = 3,
}
impl From<WUM_A> for u8 {
#[inline(always)]
fn from(variant: WUM_A) -> Self {
variant as _
}
}
#[doc = "Reader of field `WUM`"]
pub type WUM_R = crate::R<u8, WUM_A>;
impl WUM_R {
#[doc = r"Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> crate::Variant<u8, WUM_A> {
use crate::Variant::*;
match self.bits {
0 => Val(WUM_A::ADDRESS),
2 => Val(WUM_A::START),
3 => Val(WUM_A::RXNE),
i => Res(i),
}
}
#[doc = "Checks if the value of the field is `ADDRESS`"]
#[inline(always)]
pub fn is_address(&self) -> bool {
*self == WUM_A::ADDRESS
}
#[doc = "Checks if the value of the field is `START`"]
#[inline(always)]
pub fn is_start(&self) -> bool {
*self == WUM_A::START
}
#[doc = "Checks if the value of the field is `RXNE`"]
#[inline(always)]
pub fn is_rxne(&self) -> bool {
*self == WUM_A::RXNE
}
}
#[doc = "Write proxy for field `WUM`"]
pub struct WUM_W<'a> {
w: &'a mut W,
}
impl<'a> WUM_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: WUM_A) -> &'a mut W {
unsafe { self.bits(variant.into()) }
}
#[doc = "WUF active on address match"]
#[inline(always)]
pub fn address(self) -> &'a mut W {
self.variant(WUM_A::ADDRESS)
}
#[doc = "WUF active on start bit detection"]
#[inline(always)]
pub fn start(self) -> &'a mut W {
self.variant(WUM_A::START)
}
#[doc = "WUF active on RBNE"]
#[inline(always)]
pub fn rxne(self) -> &'a mut W {
self.variant(WUM_A::RXNE)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x03 << 20)) | (((value as u32) & 0x03) << 20);
self.w
}
}
#[doc = "Reader of field `SCRTNUM`"]
pub type SCRTNUM_R = crate::R<u8, u8>;
#[doc = "Write proxy for field `SCRTNUM`"]
pub struct SCRTNUM_W<'a> {
w: &'a mut W,
}
impl<'a> SCRTNUM_W<'a> {
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bits(self, value: u8) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x07 << 17)) | (((value as u32) & 0x07) << 17);
self.w
}
}
#[doc = "Driver enable polarity mode\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum DEP_A {
#[doc = "0: DE signal is active high"]
HIGH = 0,
#[doc = "1: DE signal is active low"]
LOW = 1,
}
impl From<DEP_A> for bool {
#[inline(always)]
fn from(variant: DEP_A) -> Self {
variant as u8 != 0
}
}
#[doc = "Reader of field `DEP`"]
pub type DEP_R = crate::R<bool, DEP_A>;
impl DEP_R {
#[doc = r"Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> DEP_A {
match self.bits {
false => DEP_A::HIGH,
true => DEP_A::LOW,
}
}
#[doc = "Checks if the value of the field is `HIGH`"]
#[inline(always)]
pub fn is_high(&self) -> bool {
*self == DEP_A::HIGH
}
#[doc = "Checks if the value of the field is `LOW`"]
#[inline(always)]
pub fn is_low(&self) -> bool {
*self == DEP_A::LOW
}
}
#[doc = "Write proxy for field `DEP`"]
pub struct DEP_W<'a> {
w: &'a mut W,
}
impl<'a> DEP_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: DEP_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "DE signal is active high"]
#[inline(always)]
pub fn high(self) -> &'a mut W {
self.variant(DEP_A::HIGH)
}
#[doc = "DE signal is active low"]
#[inline(always)]
pub fn low(self) -> &'a mut W {
self.variant(DEP_A::LOW)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 15)) | (((value as u32) & 0x01) << 15);
self.w
}
}
#[doc = "Driver enable mode\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum DEM_A {
#[doc = "0: DE function is disabled"]
DISABLED = 0,
#[doc = "1: The DE signal is output on the RTS pin"]
ENABLED = 1,
}
impl From<DEM_A> for bool {
#[inline(always)]
fn from(variant: DEM_A) -> Self {
variant as u8 != 0
}
}
#[doc = "Reader of field `DEM`"]
pub type DEM_R = crate::R<bool, DEM_A>;
impl DEM_R {
#[doc = r"Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> DEM_A {
match self.bits {
false => DEM_A::DISABLED,
true => DEM_A::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == DEM_A::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
*self == DEM_A::ENABLED
}
}
#[doc = "Write proxy for field `DEM`"]
pub struct DEM_W<'a> {
w: &'a mut W,
}
impl<'a> DEM_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: DEM_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "DE function is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(DEM_A::DISABLED)
}
#[doc = "The DE signal is output on the RTS pin"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(DEM_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 14)) | (((value as u32) & 0x01) << 14);
self.w
}
}
#[doc = "Disable DMA on reception error\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum DDRE_A {
#[doc = "0: DMA is not disabled in case of reception error"]
NOTDISABLED = 0,
#[doc = "1: DMA is disabled following a reception error"]
DISABLED = 1,
}
impl From<DDRE_A> for bool {
#[inline(always)]
fn from(variant: DDRE_A) -> Self {
variant as u8 != 0
}
}
#[doc = "Reader of field `DDRE`"]
pub type DDRE_R = crate::R<bool, DDRE_A>;
impl DDRE_R {
#[doc = r"Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> DDRE_A {
match self.bits {
false => DDRE_A::NOTDISABLED,
true => DDRE_A::DISABLED,
}
}
#[doc = "Checks if the value of the field is `NOTDISABLED`"]
#[inline(always)]
pub fn is_not_disabled(&self) -> bool {
*self == DDRE_A::NOTDISABLED
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == DDRE_A::DISABLED
}
}
#[doc = "Write proxy for field `DDRE`"]
pub struct DDRE_W<'a> {
w: &'a mut W,
}
impl<'a> DDRE_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: DDRE_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "DMA is not disabled in case of reception error"]
#[inline(always)]
pub fn not_disabled(self) -> &'a mut W {
self.variant(DDRE_A::NOTDISABLED)
}
#[doc = "DMA is disabled following a reception error"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(DDRE_A::DISABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 13)) | (((value as u32) & 0x01) << 13);
self.w
}
}
#[doc = "Overrun Disable\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum OVRD_A {
#[doc = "0: Overrun Error Flag, ORE, is set when received data is not read before receiving new data"]
ENABLED = 0,
#[doc = "1: Overrun functionality is disabled. If new data is received while the RXNE flag is still set the ORE flag is not set and the new received data overwrites the previous content of the RDATA register"]
DISABLED = 1,
}
impl From<OVRD_A> for bool {
#[inline(always)]
fn from(variant: OVRD_A) -> Self {
variant as u8 != 0
}
}
#[doc = "Reader of field `OVRD`"]
pub type OVRD_R = crate::R<bool, OVRD_A>;
impl OVRD_R {
#[doc = r"Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> OVRD_A {
match self.bits {
false => OVRD_A::ENABLED,
true => OVRD_A::DISABLED,
}
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
*self == OVRD_A::ENABLED
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == OVRD_A::DISABLED
}
}
#[doc = "Write proxy for field `OVRD`"]
pub struct OVRD_W<'a> {
w: &'a mut W,
}
impl<'a> OVRD_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: OVRD_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "Overrun Error Flag, ORE, is set when received data is not read before receiving new data"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(OVRD_A::ENABLED)
}
#[doc = "Overrun functionality is disabled. If new data is received while the RXNE flag is still set the ORE flag is not set and the new received data overwrites the previous content of the RDATA register"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(OVRD_A::DISABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 12)) | (((value as u32) & 0x01) << 12);
self.w
}
}
#[doc = "One sample bit method\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum OSB_A {
#[doc = "0: Three sample bit method"]
SAMPLE3 = 0,
#[doc = "1: One sample bit method"]
SAMPLE1 = 1,
}
impl From<OSB_A> for bool {
#[inline(always)]
fn from(variant: OSB_A) -> Self {
variant as u8 != 0
}
}
#[doc = "Reader of field `OSB`"]
pub type OSB_R = crate::R<bool, OSB_A>;
impl OSB_R {
#[doc = r"Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> OSB_A {
match self.bits {
false => OSB_A::SAMPLE3,
true => OSB_A::SAMPLE1,
}
}
#[doc = "Checks if the value of the field is `SAMPLE3`"]
#[inline(always)]
pub fn is_sample3(&self) -> bool {
*self == OSB_A::SAMPLE3
}
#[doc = "Checks if the value of the field is `SAMPLE1`"]
#[inline(always)]
pub fn is_sample1(&self) -> bool {
*self == OSB_A::SAMPLE1
}
}
#[doc = "Write proxy for field `OSB`"]
pub struct OSB_W<'a> {
w: &'a mut W,
}
impl<'a> OSB_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: OSB_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "Three sample bit method"]
#[inline(always)]
pub fn sample3(self) -> &'a mut W {
self.variant(OSB_A::SAMPLE3)
}
#[doc = "One sample bit method"]
#[inline(always)]
pub fn sample1(self) -> &'a mut W {
self.variant(OSB_A::SAMPLE1)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 11)) | (((value as u32) & 0x01) << 11);
self.w
}
}
#[doc = "CTS interrupt enable\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum CTSIE_A {
#[doc = "0: Interrupt is disabled"]
DISABLED = 0,
#[doc = "1: An interrupt is generated whenever CTS=1 in the STAT register"]
ENABLED = 1,
}
impl From<CTSIE_A> for bool {
#[inline(always)]
fn from(variant: CTSIE_A) -> Self {
variant as u8 != 0
}
}
#[doc = "Reader of field `CTSIE`"]
pub type CTSIE_R = crate::R<bool, CTSIE_A>;
impl CTSIE_R {
#[doc = r"Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> CTSIE_A {
match self.bits {
false => CTSIE_A::DISABLED,
true => CTSIE_A::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == CTSIE_A::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
*self == CTSIE_A::ENABLED
}
}
#[doc = "Write proxy for field `CTSIE`"]
pub struct CTSIE_W<'a> {
w: &'a mut W,
}
impl<'a> CTSIE_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: CTSIE_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "Interrupt is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(CTSIE_A::DISABLED)
}
#[doc = "An interrupt is generated whenever CTS=1 in the STAT register"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(CTSIE_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 10)) | (((value as u32) & 0x01) << 10);
self.w
}
}
#[doc = "CTS enable\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum CTSEN_A {
#[doc = "0: CTS hardware flow control disabled"]
DISABLED = 0,
#[doc = "1: CTS mode enabled, data is only transmitted when the CTS input is asserted"]
ENABLED = 1,
}
impl From<CTSEN_A> for bool {
#[inline(always)]
fn from(variant: CTSEN_A) -> Self {
variant as u8 != 0
}
}
#[doc = "Reader of field `CTSEN`"]
pub type CTSEN_R = crate::R<bool, CTSEN_A>;
impl CTSEN_R {
#[doc = r"Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> CTSEN_A {
match self.bits {
false => CTSEN_A::DISABLED,
true => CTSEN_A::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == CTSEN_A::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
*self == CTSEN_A::ENABLED
}
}
#[doc = "Write proxy for field `CTSEN`"]
pub struct CTSEN_W<'a> {
w: &'a mut W,
}
impl<'a> CTSEN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: CTSEN_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "CTS hardware flow control disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(CTSEN_A::DISABLED)
}
#[doc = "CTS mode enabled, data is only transmitted when the CTS input is asserted"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(CTSEN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 9)) | (((value as u32) & 0x01) << 9);
self.w
}
}
#[doc = "RTS enable\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum RTSEN_A {
#[doc = "0: RTS hardware flow control disabled"]
DISABLED = 0,
#[doc = "1: RTS output enabled, data is only requested when there is space in the receive buffer"]
ENABLED = 1,
}
impl From<RTSEN_A> for bool {
#[inline(always)]
fn from(variant: RTSEN_A) -> Self {
variant as u8 != 0
}
}
#[doc = "Reader of field `RTSEN`"]
pub type RTSEN_R = crate::R<bool, RTSEN_A>;
impl RTSEN_R {
#[doc = r"Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> RTSEN_A {
match self.bits {
false => RTSEN_A::DISABLED,
true => RTSEN_A::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == RTSEN_A::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
*self == RTSEN_A::ENABLED
}
}
#[doc = "Write proxy for field `RTSEN`"]
pub struct RTSEN_W<'a> {
w: &'a mut W,
}
impl<'a> RTSEN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: RTSEN_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "RTS hardware flow control disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(RTSEN_A::DISABLED)
}
#[doc = "RTS output enabled, data is only requested when there is space in the receive buffer"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(RTSEN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 8)) | (((value as u32) & 0x01) << 8);
self.w
}
}
#[doc = "DMA enable transmitter\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum DENT_A {
#[doc = "0: DMA mode is disabled for transmission"]
DISABLED = 0,
#[doc = "1: DMA mode is enabled for transmission"]
ENABLED = 1,
}
impl From<DENT_A> for bool {
#[inline(always)]
fn from(variant: DENT_A) -> Self {
variant as u8 != 0
}
}
#[doc = "Reader of field `DENT`"]
pub type DENT_R = crate::R<bool, DENT_A>;
impl DENT_R {
#[doc = r"Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> DENT_A {
match self.bits {
false => DENT_A::DISABLED,
true => DENT_A::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == DENT_A::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
*self == DENT_A::ENABLED
}
}
#[doc = "Write proxy for field `DENT`"]
pub struct DENT_W<'a> {
w: &'a mut W,
}
impl<'a> DENT_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: DENT_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "DMA mode is disabled for transmission"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(DENT_A::DISABLED)
}
#[doc = "DMA mode is enabled for transmission"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(DENT_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 7)) | (((value as u32) & 0x01) << 7);
self.w
}
}
#[doc = "DMA enable for reception\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum DENR_A {
#[doc = "0: DMA mode is disabled for reception"]
DISABLED = 0,
#[doc = "1: DMA mode is enabled for reception"]
ENABLED = 1,
}
impl From<DENR_A> for bool {
#[inline(always)]
fn from(variant: DENR_A) -> Self {
variant as u8 != 0
}
}
#[doc = "Reader of field `DENR`"]
pub type DENR_R = crate::R<bool, DENR_A>;
impl DENR_R {
#[doc = r"Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> DENR_A {
match self.bits {
false => DENR_A::DISABLED,
true => DENR_A::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == DENR_A::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
*self == DENR_A::ENABLED
}
}
#[doc = "Write proxy for field `DENR`"]
pub struct DENR_W<'a> {
w: &'a mut W,
}
impl<'a> DENR_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: DENR_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "DMA mode is disabled for reception"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(DENR_A::DISABLED)
}
#[doc = "DMA mode is enabled for reception"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(DENR_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 6)) | (((value as u32) & 0x01) << 6);
self.w
}
}
#[doc = "Smartcard mode enable\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum SCEN_A {
#[doc = "0: Smartcard Mode disabled"]
DISABLED = 0,
#[doc = "1: Smartcard Mode enabled"]
ENABLED = 1,
}
impl From<SCEN_A> for bool {
#[inline(always)]
fn from(variant: SCEN_A) -> Self {
variant as u8 != 0
}
}
#[doc = "Reader of field `SCEN`"]
pub type SCEN_R = crate::R<bool, SCEN_A>;
impl SCEN_R {
#[doc = r"Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> SCEN_A {
match self.bits {
false => SCEN_A::DISABLED,
true => SCEN_A::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == SCEN_A::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
*self == SCEN_A::ENABLED
}
}
#[doc = "Write proxy for field `SCEN`"]
pub struct SCEN_W<'a> {
w: &'a mut W,
}
impl<'a> SCEN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: SCEN_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "Smartcard Mode disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(SCEN_A::DISABLED)
}
#[doc = "Smartcard Mode enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(SCEN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u32) & 0x01) << 5);
self.w
}
}
#[doc = "NKEN enable in Smartcard mode\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum NKEN_A {
#[doc = "0: NACK transmission in case of parity error is disabled"]
DISABLED = 0,
#[doc = "1: NACK transmission during parity error is enabled"]
ENABLED = 1,
}
impl From<NKEN_A> for bool {
#[inline(always)]
fn from(variant: NKEN_A) -> Self {
variant as u8 != 0
}
}
#[doc = "Reader of field `NKEN`"]
pub type NKEN_R = crate::R<bool, NKEN_A>;
impl NKEN_R {
#[doc = r"Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> NKEN_A {
match self.bits {
false => NKEN_A::DISABLED,
true => NKEN_A::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == NKEN_A::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
*self == NKEN_A::ENABLED
}
}
#[doc = "Write proxy for field `NKEN`"]
pub struct NKEN_W<'a> {
w: &'a mut W,
}
impl<'a> NKEN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: NKEN_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "NACK transmission in case of parity error is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(NKEN_A::DISABLED)
}
#[doc = "NACK transmission during parity error is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(NKEN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u32) & 0x01) << 4);
self.w
}
}
#[doc = "Half-duplex selection\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum HDEN_A {
#[doc = "0: Half duplex mode is not selected"]
NOTSELECTED = 0,
#[doc = "1: Half duplex mode is selected"]
SELECTED = 1,
}
impl From<HDEN_A> for bool {
#[inline(always)]
fn from(variant: HDEN_A) -> Self {
variant as u8 != 0
}
}
#[doc = "Reader of field `HDEN`"]
pub type HDEN_R = crate::R<bool, HDEN_A>;
impl HDEN_R {
#[doc = r"Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> HDEN_A {
match self.bits {
false => HDEN_A::NOTSELECTED,
true => HDEN_A::SELECTED,
}
}
#[doc = "Checks if the value of the field is `NOTSELECTED`"]
#[inline(always)]
pub fn is_not_selected(&self) -> bool {
*self == HDEN_A::NOTSELECTED
}
#[doc = "Checks if the value of the field is `SELECTED`"]
#[inline(always)]
pub fn is_selected(&self) -> bool {
*self == HDEN_A::SELECTED
}
}
#[doc = "Write proxy for field `HDEN`"]
pub struct HDEN_W<'a> {
w: &'a mut W,
}
impl<'a> HDEN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: HDEN_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "Half duplex mode is not selected"]
#[inline(always)]
pub fn not_selected(self) -> &'a mut W {
self.variant(HDEN_A::NOTSELECTED)
}
#[doc = "Half duplex mode is selected"]
#[inline(always)]
pub fn selected(self) -> &'a mut W {
self.variant(HDEN_A::SELECTED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u32) & 0x01) << 3);
self.w
}
}
#[doc = "IrDA low-power\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum IRLP_A {
#[doc = "0: Normal mode"]
NORMAL = 0,
#[doc = "1: Low-power mode"]
LOWPOWER = 1,
}
impl From<IRLP_A> for bool {
#[inline(always)]
fn from(variant: IRLP_A) -> Self {
variant as u8 != 0
}
}
#[doc = "Reader of field `IRLP`"]
pub type IRLP_R = crate::R<bool, IRLP_A>;
impl IRLP_R {
#[doc = r"Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> IRLP_A {
match self.bits {
false => IRLP_A::NORMAL,
true => IRLP_A::LOWPOWER,
}
}
#[doc = "Checks if the value of the field is `NORMAL`"]
#[inline(always)]
pub fn is_normal(&self) -> bool {
*self == IRLP_A::NORMAL
}
#[doc = "Checks if the value of the field is `LOWPOWER`"]
#[inline(always)]
pub fn is_low_power(&self) -> bool {
*self == IRLP_A::LOWPOWER
}
}
#[doc = "Write proxy for field `IRLP`"]
pub struct IRLP_W<'a> {
w: &'a mut W,
}
impl<'a> IRLP_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: IRLP_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "Normal mode"]
#[inline(always)]
pub fn normal(self) -> &'a mut W {
self.variant(IRLP_A::NORMAL)
}
#[doc = "Low-power mode"]
#[inline(always)]
pub fn low_power(self) -> &'a mut W {
self.variant(IRLP_A::LOWPOWER)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2);
self.w
}
}
#[doc = "IrDA mode enable\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum IREN_A {
#[doc = "0: IrDA disabled"]
DISABLED = 0,
#[doc = "1: IrDA enabled"]
ENABLED = 1,
}
impl From<IREN_A> for bool {
#[inline(always)]
fn from(variant: IREN_A) -> Self {
variant as u8 != 0
}
}
#[doc = "Reader of field `IREN`"]
pub type IREN_R = crate::R<bool, IREN_A>;
impl IREN_R {
#[doc = r"Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> IREN_A {
match self.bits {
false => IREN_A::DISABLED,
true => IREN_A::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == IREN_A::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
*self == IREN_A::ENABLED
}
}
#[doc = "Write proxy for field `IREN`"]
pub struct IREN_W<'a> {
w: &'a mut W,
}
impl<'a> IREN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: IREN_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "IrDA disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(IREN_A::DISABLED)
}
#[doc = "IrDA enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(IREN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1);
self.w
}
}
#[doc = "Error interrupt enable\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum ERRIE_A {
#[doc = "0: Error interrupt is disabled"]
DISABLED = 0,
#[doc = "1: An interrupt is generated when FERR=1 or ORERR=1 or NERR=1 in the STAT register"]
ENABLED = 1,
}
impl From<ERRIE_A> for bool {
#[inline(always)]
fn from(variant: ERRIE_A) -> Self {
variant as u8 != 0
}
}
#[doc = "Reader of field `ERRIE`"]
pub type ERRIE_R = crate::R<bool, ERRIE_A>;
impl ERRIE_R {
#[doc = r"Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> ERRIE_A {
match self.bits {
false => ERRIE_A::DISABLED,
true => ERRIE_A::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == ERRIE_A::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
*self == ERRIE_A::ENABLED
}
}
#[doc = "Write proxy for field `ERRIE`"]
pub struct ERRIE_W<'a> {
w: &'a mut W,
}
impl<'a> ERRIE_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: ERRIE_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "Error interrupt is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(ERRIE_A::DISABLED)
}
#[doc = "An interrupt is generated when FERR=1 or ORERR=1 or NERR=1 in the STAT register"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(ERRIE_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01);
self.w
}
}
impl R {
#[doc = "Bit 22 - Wakeup from Deep-sleep mode interrupt enable"]
#[inline(always)]
pub fn wuie(&self) -> WUIE_R {
WUIE_R::new(((self.bits >> 22) & 0x01) != 0)
}
#[doc = "Bits 20:21 - Wakeup mode from Deep-sleep mode"]
#[inline(always)]
pub fn wum(&self) -> WUM_R {
WUM_R::new(((self.bits >> 20) & 0x03) as u8)
}
#[doc = "Bits 17:19 - Smartcard auto-retry number"]
#[inline(always)]
pub fn scrtnum(&self) -> SCRTNUM_R {
SCRTNUM_R::new(((self.bits >> 17) & 0x07) as u8)
}
#[doc = "Bit 15 - Driver enable polarity mode"]
#[inline(always)]
pub fn dep(&self) -> DEP_R {
DEP_R::new(((self.bits >> 15) & 0x01) != 0)
}
#[doc = "Bit 14 - Driver enable mode"]
#[inline(always)]
pub fn dem(&self) -> DEM_R {
DEM_R::new(((self.bits >> 14) & 0x01) != 0)
}
#[doc = "Bit 13 - Disable DMA on reception error"]
#[inline(always)]
pub fn ddre(&self) -> DDRE_R {
DDRE_R::new(((self.bits >> 13) & 0x01) != 0)
}
#[doc = "Bit 12 - Overrun Disable"]
#[inline(always)]
pub fn ovrd(&self) -> OVRD_R {
OVRD_R::new(((self.bits >> 12) & 0x01) != 0)
}
#[doc = "Bit 11 - One sample bit method"]
#[inline(always)]
pub fn osb(&self) -> OSB_R {
OSB_R::new(((self.bits >> 11) & 0x01) != 0)
}
#[doc = "Bit 10 - CTS interrupt enable"]
#[inline(always)]
pub fn ctsie(&self) -> CTSIE_R {
CTSIE_R::new(((self.bits >> 10) & 0x01) != 0)
}
#[doc = "Bit 9 - CTS enable"]
#[inline(always)]
pub fn ctsen(&self) -> CTSEN_R {
CTSEN_R::new(((self.bits >> 9) & 0x01) != 0)
}
#[doc = "Bit 8 - RTS enable"]
#[inline(always)]
pub fn rtsen(&self) -> RTSEN_R {
RTSEN_R::new(((self.bits >> 8) & 0x01) != 0)
}
#[doc = "Bit 7 - DMA enable transmitter"]
#[inline(always)]
pub fn dent(&self) -> DENT_R {
DENT_R::new(((self.bits >> 7) & 0x01) != 0)
}
#[doc = "Bit 6 - DMA enable for reception"]
#[inline(always)]
pub fn denr(&self) -> DENR_R {
DENR_R::new(((self.bits >> 6) & 0x01) != 0)
}
#[doc = "Bit 5 - Smartcard mode enable"]
#[inline(always)]
pub fn scen(&self) -> SCEN_R {
SCEN_R::new(((self.bits >> 5) & 0x01) != 0)
}
#[doc = "Bit 4 - NKEN enable in Smartcard mode"]
#[inline(always)]
pub fn nken(&self) -> NKEN_R {
NKEN_R::new(((self.bits >> 4) & 0x01) != 0)
}
#[doc = "Bit 3 - Half-duplex selection"]
#[inline(always)]
pub fn hden(&self) -> HDEN_R {
HDEN_R::new(((self.bits >> 3) & 0x01) != 0)
}
#[doc = "Bit 2 - IrDA low-power"]
#[inline(always)]
pub fn irlp(&self) -> IRLP_R {
IRLP_R::new(((self.bits >> 2) & 0x01) != 0)
}
#[doc = "Bit 1 - IrDA mode enable"]
#[inline(always)]
pub fn iren(&self) -> IREN_R {
IREN_R::new(((self.bits >> 1) & 0x01) != 0)
}
#[doc = "Bit 0 - Error interrupt enable"]
#[inline(always)]
pub fn errie(&self) -> ERRIE_R {
ERRIE_R::new((self.bits & 0x01) != 0)
}
}
impl W {
#[doc = "Bit 22 - Wakeup from Deep-sleep mode interrupt enable"]
#[inline(always)]
pub fn wuie(&mut self) -> WUIE_W {
WUIE_W { w: self }
}
#[doc = "Bits 20:21 - Wakeup mode from Deep-sleep mode"]
#[inline(always)]
pub fn wum(&mut self) -> WUM_W {
WUM_W { w: self }
}
#[doc = "Bits 17:19 - Smartcard auto-retry number"]
#[inline(always)]
pub fn scrtnum(&mut self) -> SCRTNUM_W {
SCRTNUM_W { w: self }
}
#[doc = "Bit 15 - Driver enable polarity mode"]
#[inline(always)]
pub fn dep(&mut self) -> DEP_W {
DEP_W { w: self }
}
#[doc = "Bit 14 - Driver enable mode"]
#[inline(always)]
pub fn dem(&mut self) -> DEM_W {
DEM_W { w: self }
}
#[doc = "Bit 13 - Disable DMA on reception error"]
#[inline(always)]
pub fn ddre(&mut self) -> DDRE_W {
DDRE_W { w: self }
}
#[doc = "Bit 12 - Overrun Disable"]
#[inline(always)]
pub fn ovrd(&mut self) -> OVRD_W {
OVRD_W { w: self }
}
#[doc = "Bit 11 - One sample bit method"]
#[inline(always)]
pub fn osb(&mut self) -> OSB_W {
OSB_W { w: self }
}
#[doc = "Bit 10 - CTS interrupt enable"]
#[inline(always)]
pub fn ctsie(&mut self) -> CTSIE_W {
CTSIE_W { w: self }
}
#[doc = "Bit 9 - CTS enable"]
#[inline(always)]
pub fn ctsen(&mut self) -> CTSEN_W {
CTSEN_W { w: self }
}
#[doc = "Bit 8 - RTS enable"]
#[inline(always)]
pub fn rtsen(&mut self) -> RTSEN_W {
RTSEN_W { w: self }
}
#[doc = "Bit 7 - DMA enable transmitter"]
#[inline(always)]
pub fn dent(&mut self) -> DENT_W {
DENT_W { w: self }
}
#[doc = "Bit 6 - DMA enable for reception"]
#[inline(always)]
pub fn denr(&mut self) -> DENR_W {
DENR_W { w: self }
}
#[doc = "Bit 5 - Smartcard mode enable"]
#[inline(always)]
pub fn scen(&mut self) -> SCEN_W {
SCEN_W { w: self }
}
#[doc = "Bit 4 - NKEN enable in Smartcard mode"]
#[inline(always)]
pub fn nken(&mut self) -> NKEN_W {
NKEN_W { w: self }
}
#[doc = "Bit 3 - Half-duplex selection"]
#[inline(always)]
pub fn hden(&mut self) -> HDEN_W {
HDEN_W { w: self }
}
#[doc = "Bit 2 - IrDA low-power"]
#[inline(always)]
pub fn irlp(&mut self) -> IRLP_W {
IRLP_W { w: self }
}
#[doc = "Bit 1 - IrDA mode enable"]
#[inline(always)]
pub fn iren(&mut self) -> IREN_W {
IREN_W { w: self }
}
#[doc = "Bit 0 - Error interrupt enable"]
#[inline(always)]
pub fn errie(&mut self) -> ERRIE_W {
ERRIE_W { w: self }
}
}