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#[doc = "Reader of register CTL1"] pub type R = crate::R<u16, super::CTL1>; #[doc = "Writer for register CTL1"] pub type W = crate::W<u16, super::CTL1>; #[doc = "Register CTL1 `reset()`'s with value 0"] impl crate::ResetValue for super::CTL1 { type Type = u16; #[inline(always)] fn reset_value() -> Self::Type { 0 } } #[doc = "Reader of field `DMALST`"] pub type DMALST_R = crate::R<bool, bool>; #[doc = "Write proxy for field `DMALST`"] pub struct DMALST_W<'a> { w: &'a mut W, } impl<'a> DMALST_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | (((value as u16) & 0x01) << 12); self.w } } #[doc = "Reader of field `DMAON`"] pub type DMAON_R = crate::R<bool, bool>; #[doc = "Write proxy for field `DMAON`"] pub struct DMAON_W<'a> { w: &'a mut W, } impl<'a> DMAON_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | (((value as u16) & 0x01) << 11); self.w } } #[doc = "Reader of field `BUFIE`"] pub type BUFIE_R = crate::R<bool, bool>; #[doc = "Write proxy for field `BUFIE`"] pub struct BUFIE_W<'a> { w: &'a mut W, } impl<'a> BUFIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | (((value as u16) & 0x01) << 10); self.w } } #[doc = "Reader of field `EVIE`"] pub type EVIE_R = crate::R<bool, bool>; #[doc = "Write proxy for field `EVIE`"] pub struct EVIE_W<'a> { w: &'a mut W, } impl<'a> EVIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | (((value as u16) & 0x01) << 9); self.w } } #[doc = "Reader of field `ERRIE`"] pub type ERRIE_R = crate::R<bool, bool>; #[doc = "Write proxy for field `ERRIE`"] pub struct ERRIE_W<'a> { w: &'a mut W, } impl<'a> ERRIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | (((value as u16) & 0x01) << 8); self.w } } #[doc = "Reader of field `I2CCLK`"] pub type I2CCLK_R = crate::R<u8, u8>; #[doc = "Write proxy for field `I2CCLK`"] pub struct I2CCLK_W<'a> { w: &'a mut W, } impl<'a> I2CCLK_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0x3f) | ((value as u16) & 0x3f); self.w } } impl R { #[doc = "Bit 12 - Flag indicating DMA last transfer"] #[inline(always)] pub fn dmalst(&self) -> DMALST_R { DMALST_R::new(((self.bits >> 12) & 0x01) != 0) } #[doc = "Bit 11 - DMA mode switch"] #[inline(always)] pub fn dmaon(&self) -> DMAON_R { DMAON_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 10 - Buffer interrupt enable"] #[inline(always)] pub fn bufie(&self) -> BUFIE_R { BUFIE_R::new(((self.bits >> 10) & 0x01) != 0) } #[doc = "Bit 9 - Event interrupt enable"] #[inline(always)] pub fn evie(&self) -> EVIE_R { EVIE_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 8 - Error interrupt enable"] #[inline(always)] pub fn errie(&self) -> ERRIE_R { ERRIE_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bits 0:5 - I2C Peripheral clock frequency"] #[inline(always)] pub fn i2cclk(&self) -> I2CCLK_R { I2CCLK_R::new((self.bits & 0x3f) as u8) } } impl W { #[doc = "Bit 12 - Flag indicating DMA last transfer"] #[inline(always)] pub fn dmalst(&mut self) -> DMALST_W { DMALST_W { w: self } } #[doc = "Bit 11 - DMA mode switch"] #[inline(always)] pub fn dmaon(&mut self) -> DMAON_W { DMAON_W { w: self } } #[doc = "Bit 10 - Buffer interrupt enable"] #[inline(always)] pub fn bufie(&mut self) -> BUFIE_W { BUFIE_W { w: self } } #[doc = "Bit 9 - Event interrupt enable"] #[inline(always)] pub fn evie(&mut self) -> EVIE_W { EVIE_W { w: self } } #[doc = "Bit 8 - Error interrupt enable"] #[inline(always)] pub fn errie(&mut self) -> ERRIE_W { ERRIE_W { w: self } } #[doc = "Bits 0:5 - I2C Peripheral clock frequency"] #[inline(always)] pub fn i2cclk(&mut self) -> I2CCLK_W { I2CCLK_W { w: self } } }