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#[doc = "Reader of register DSV"]
pub type R = crate::R<u32, super::DSV>;
#[doc = "Writer for register DSV"]
pub type W = crate::W<u32, super::DSV>;
#[doc = "Register DSV `reset()`'s with value 0"]
impl crate::ResetValue for super::DSV {
    type Type = u32;
    #[inline(always)]
    fn reset_value() -> Self::Type {
        0
    }
}
#[doc = "Deep-sleep mode voltage select\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
#[repr(u8)]
pub enum DSLPVS_A {
    #[doc = "0: The core voltage is 1.2 V in deep-sleep mode"]
    V1_2 = 0,
    #[doc = "1: The core voltage is 1.1 V in deep-sleep mode"]
    V1_1 = 1,
    #[doc = "2: The core voltage is 1.0 V in deep-sleep mode"]
    V1_0 = 2,
    #[doc = "3: The core voltage is 0.9 V in deep-sleep mode"]
    V0_9 = 3,
}
impl From<DSLPVS_A> for u8 {
    #[inline(always)]
    fn from(variant: DSLPVS_A) -> Self {
        variant as _
    }
}
#[doc = "Reader of field `DSLPVS`"]
pub type DSLPVS_R = crate::R<u8, DSLPVS_A>;
impl DSLPVS_R {
    #[doc = r"Get enumerated values variant"]
    #[inline(always)]
    pub fn variant(&self) -> crate::Variant<u8, DSLPVS_A> {
        use crate::Variant::*;
        match self.bits {
            0 => Val(DSLPVS_A::V1_2),
            1 => Val(DSLPVS_A::V1_1),
            2 => Val(DSLPVS_A::V1_0),
            3 => Val(DSLPVS_A::V0_9),
            i => Res(i),
        }
    }
    #[doc = "Checks if the value of the field is `V1_2`"]
    #[inline(always)]
    pub fn is_v1_2(&self) -> bool {
        *self == DSLPVS_A::V1_2
    }
    #[doc = "Checks if the value of the field is `V1_1`"]
    #[inline(always)]
    pub fn is_v1_1(&self) -> bool {
        *self == DSLPVS_A::V1_1
    }
    #[doc = "Checks if the value of the field is `V1_0`"]
    #[inline(always)]
    pub fn is_v1_0(&self) -> bool {
        *self == DSLPVS_A::V1_0
    }
    #[doc = "Checks if the value of the field is `V0_9`"]
    #[inline(always)]
    pub fn is_v0_9(&self) -> bool {
        *self == DSLPVS_A::V0_9
    }
}
#[doc = "Write proxy for field `DSLPVS`"]
pub struct DSLPVS_W<'a> {
    w: &'a mut W,
}
impl<'a> DSLPVS_W<'a> {
    #[doc = r"Writes `variant` to the field"]
    #[inline(always)]
    pub fn variant(self, variant: DSLPVS_A) -> &'a mut W {
        unsafe { self.bits(variant.into()) }
    }
    #[doc = "The core voltage is 1.2 V in deep-sleep mode"]
    #[inline(always)]
    pub fn v1_2(self) -> &'a mut W {
        self.variant(DSLPVS_A::V1_2)
    }
    #[doc = "The core voltage is 1.1 V in deep-sleep mode"]
    #[inline(always)]
    pub fn v1_1(self) -> &'a mut W {
        self.variant(DSLPVS_A::V1_1)
    }
    #[doc = "The core voltage is 1.0 V in deep-sleep mode"]
    #[inline(always)]
    pub fn v1_0(self) -> &'a mut W {
        self.variant(DSLPVS_A::V1_0)
    }
    #[doc = "The core voltage is 0.9 V in deep-sleep mode"]
    #[inline(always)]
    pub fn v0_9(self) -> &'a mut W {
        self.variant(DSLPVS_A::V0_9)
    }
    #[doc = r"Writes raw bits to the field"]
    #[inline(always)]
    pub unsafe fn bits(self, value: u8) -> &'a mut W {
        self.w.bits = (self.w.bits & !0x07) | ((value as u32) & 0x07);
        self.w
    }
}
impl R {
    #[doc = "Bits 0:2 - Deep-sleep mode voltage select"]
    #[inline(always)]
    pub fn dslpvs(&self) -> DSLPVS_R {
        DSLPVS_R::new((self.bits & 0x07) as u8)
    }
}
impl W {
    #[doc = "Bits 0:2 - Deep-sleep mode voltage select"]
    #[inline(always)]
    pub fn dslpvs(&mut self) -> DSLPVS_W {
        DSLPVS_W { w: self }
    }
}