#[doc = "Reader of register CTL0"]
pub type R = crate::R<u32, super::CTL0>;
#[doc = "Writer for register CTL0"]
pub type W = crate::W<u32, super::CTL0>;
#[doc = "Register CTL0 `reset()`'s with value 0"]
impl crate::ResetValue for super::CTL0 {
type Type = u32;
#[inline(always)]
fn reset_value() -> Self::Type {
0
}
}
#[doc = "Reader of field `DRES`"]
pub type DRES_R = crate::R<u8, u8>;
#[doc = "Write proxy for field `DRES`"]
pub struct DRES_W<'a> {
w: &'a mut W,
}
impl<'a> DRES_W<'a> {
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x03 << 24)) | (((value as u32) & 0x03) << 24);
self.w
}
}
#[doc = "Regular channel analog watchdog enable\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum RWDEN_A {
#[doc = "0: Analog watchdog disabled on regular channels"]
DISABLED = 0,
#[doc = "1: Analog watchdog enabled on regular channels"]
ENABLED = 1,
}
impl From<RWDEN_A> for bool {
#[inline(always)]
fn from(variant: RWDEN_A) -> Self {
variant as u8 != 0
}
}
#[doc = "Reader of field `RWDEN`"]
pub type RWDEN_R = crate::R<bool, RWDEN_A>;
impl RWDEN_R {
#[doc = r"Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> RWDEN_A {
match self.bits {
false => RWDEN_A::DISABLED,
true => RWDEN_A::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == RWDEN_A::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
*self == RWDEN_A::ENABLED
}
}
#[doc = "Write proxy for field `RWDEN`"]
pub struct RWDEN_W<'a> {
w: &'a mut W,
}
impl<'a> RWDEN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: RWDEN_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "Analog watchdog disabled on regular channels"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(RWDEN_A::DISABLED)
}
#[doc = "Analog watchdog enabled on regular channels"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(RWDEN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 23)) | (((value as u32) & 0x01) << 23);
self.w
}
}
#[doc = "Inserted channel analog watchdog enable\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum IWDEN_A {
#[doc = "0: Analog watchdog disabled on inserted channels"]
DISABLED = 0,
#[doc = "1: Analog watchdog enabled on inserted channels"]
ENABLED = 1,
}
impl From<IWDEN_A> for bool {
#[inline(always)]
fn from(variant: IWDEN_A) -> Self {
variant as u8 != 0
}
}
#[doc = "Reader of field `IWDEN`"]
pub type IWDEN_R = crate::R<bool, IWDEN_A>;
impl IWDEN_R {
#[doc = r"Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> IWDEN_A {
match self.bits {
false => IWDEN_A::DISABLED,
true => IWDEN_A::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == IWDEN_A::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
*self == IWDEN_A::ENABLED
}
}
#[doc = "Write proxy for field `IWDEN`"]
pub struct IWDEN_W<'a> {
w: &'a mut W,
}
impl<'a> IWDEN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: IWDEN_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "Analog watchdog disabled on inserted channels"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(IWDEN_A::DISABLED)
}
#[doc = "Analog watchdog enabled on inserted channels"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(IWDEN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 22)) | (((value as u32) & 0x01) << 22);
self.w
}
}
#[doc = "Reader of field `DISNUM`"]
pub type DISNUM_R = crate::R<u8, u8>;
#[doc = "Write proxy for field `DISNUM`"]
pub struct DISNUM_W<'a> {
w: &'a mut W,
}
impl<'a> DISNUM_W<'a> {
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bits(self, value: u8) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x07 << 13)) | (((value as u32) & 0x07) << 13);
self.w
}
}
#[doc = "Discontinuous mode on injected channels\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum DISIC_A {
#[doc = "0: Discontinuous mode on inserted channels disabled"]
DISABLED = 0,
#[doc = "1: Discontinuous mode on inserted channels enabled"]
ENABLED = 1,
}
impl From<DISIC_A> for bool {
#[inline(always)]
fn from(variant: DISIC_A) -> Self {
variant as u8 != 0
}
}
#[doc = "Reader of field `DISIC`"]
pub type DISIC_R = crate::R<bool, DISIC_A>;
impl DISIC_R {
#[doc = r"Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> DISIC_A {
match self.bits {
false => DISIC_A::DISABLED,
true => DISIC_A::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == DISIC_A::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
*self == DISIC_A::ENABLED
}
}
#[doc = "Write proxy for field `DISIC`"]
pub struct DISIC_W<'a> {
w: &'a mut W,
}
impl<'a> DISIC_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: DISIC_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "Discontinuous mode on inserted channels disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(DISIC_A::DISABLED)
}
#[doc = "Discontinuous mode on inserted channels enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(DISIC_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 12)) | (((value as u32) & 0x01) << 12);
self.w
}
}
#[doc = "Discontinuous mode on regular channels\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum DISRC_A {
#[doc = "0: Discontinuous mode on regular channels disabled"]
DISABLED = 0,
#[doc = "1: Discontinuous mode on regular channels enabled"]
ENABLED = 1,
}
impl From<DISRC_A> for bool {
#[inline(always)]
fn from(variant: DISRC_A) -> Self {
variant as u8 != 0
}
}
#[doc = "Reader of field `DISRC`"]
pub type DISRC_R = crate::R<bool, DISRC_A>;
impl DISRC_R {
#[doc = r"Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> DISRC_A {
match self.bits {
false => DISRC_A::DISABLED,
true => DISRC_A::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == DISRC_A::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
*self == DISRC_A::ENABLED
}
}
#[doc = "Write proxy for field `DISRC`"]
pub struct DISRC_W<'a> {
w: &'a mut W,
}
impl<'a> DISRC_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: DISRC_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "Discontinuous mode on regular channels disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(DISRC_A::DISABLED)
}
#[doc = "Discontinuous mode on regular channels enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(DISRC_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 11)) | (((value as u32) & 0x01) << 11);
self.w
}
}
#[doc = "Inserted channel group convert automatically\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum ICA_A {
#[doc = "0: Automatic inserted group conversion disabled"]
DISABLED = 0,
#[doc = "1: Automatic inserted group conversion enabled"]
ENABLED = 1,
}
impl From<ICA_A> for bool {
#[inline(always)]
fn from(variant: ICA_A) -> Self {
variant as u8 != 0
}
}
#[doc = "Reader of field `ICA`"]
pub type ICA_R = crate::R<bool, ICA_A>;
impl ICA_R {
#[doc = r"Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> ICA_A {
match self.bits {
false => ICA_A::DISABLED,
true => ICA_A::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == ICA_A::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
*self == ICA_A::ENABLED
}
}
#[doc = "Write proxy for field `ICA`"]
pub struct ICA_W<'a> {
w: &'a mut W,
}
impl<'a> ICA_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: ICA_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "Automatic inserted group conversion disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(ICA_A::DISABLED)
}
#[doc = "Automatic inserted group conversion enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(ICA_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 10)) | (((value as u32) & 0x01) << 10);
self.w
}
}
#[doc = "When in scan mode, analog watchdog is effective on a single channel\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum WDSC_A {
#[doc = "0: Analog watchdog enabled on all channels"]
ALL = 0,
#[doc = "1: Analog watchdog enabled on a single channel"]
SINGLE = 1,
}
impl From<WDSC_A> for bool {
#[inline(always)]
fn from(variant: WDSC_A) -> Self {
variant as u8 != 0
}
}
#[doc = "Reader of field `WDSC`"]
pub type WDSC_R = crate::R<bool, WDSC_A>;
impl WDSC_R {
#[doc = r"Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> WDSC_A {
match self.bits {
false => WDSC_A::ALL,
true => WDSC_A::SINGLE,
}
}
#[doc = "Checks if the value of the field is `ALL`"]
#[inline(always)]
pub fn is_all(&self) -> bool {
*self == WDSC_A::ALL
}
#[doc = "Checks if the value of the field is `SINGLE`"]
#[inline(always)]
pub fn is_single(&self) -> bool {
*self == WDSC_A::SINGLE
}
}
#[doc = "Write proxy for field `WDSC`"]
pub struct WDSC_W<'a> {
w: &'a mut W,
}
impl<'a> WDSC_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: WDSC_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "Analog watchdog enabled on all channels"]
#[inline(always)]
pub fn all(self) -> &'a mut W {
self.variant(WDSC_A::ALL)
}
#[doc = "Analog watchdog enabled on a single channel"]
#[inline(always)]
pub fn single(self) -> &'a mut W {
self.variant(WDSC_A::SINGLE)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 9)) | (((value as u32) & 0x01) << 9);
self.w
}
}
#[doc = "Scan mode\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum SM_A {
#[doc = "0: Scan mode disabled"]
DISABLED = 0,
#[doc = "1: Scan mode enabled"]
ENABLED = 1,
}
impl From<SM_A> for bool {
#[inline(always)]
fn from(variant: SM_A) -> Self {
variant as u8 != 0
}
}
#[doc = "Reader of field `SM`"]
pub type SM_R = crate::R<bool, SM_A>;
impl SM_R {
#[doc = r"Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> SM_A {
match self.bits {
false => SM_A::DISABLED,
true => SM_A::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == SM_A::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
*self == SM_A::ENABLED
}
}
#[doc = "Write proxy for field `SM`"]
pub struct SM_W<'a> {
w: &'a mut W,
}
impl<'a> SM_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: SM_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "Scan mode disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(SM_A::DISABLED)
}
#[doc = "Scan mode enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(SM_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 8)) | (((value as u32) & 0x01) << 8);
self.w
}
}
#[doc = "Interrupt enable for EOIC\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum EOICIE_A {
#[doc = "0: EOIC interrupt disabled"]
DISABLED = 0,
#[doc = "1: EOIC interrupt enabled. An interrupt is generated when the EOIC bit is set"]
ENABLED = 1,
}
impl From<EOICIE_A> for bool {
#[inline(always)]
fn from(variant: EOICIE_A) -> Self {
variant as u8 != 0
}
}
#[doc = "Reader of field `EOICIE`"]
pub type EOICIE_R = crate::R<bool, EOICIE_A>;
impl EOICIE_R {
#[doc = r"Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> EOICIE_A {
match self.bits {
false => EOICIE_A::DISABLED,
true => EOICIE_A::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == EOICIE_A::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
*self == EOICIE_A::ENABLED
}
}
#[doc = "Write proxy for field `EOICIE`"]
pub struct EOICIE_W<'a> {
w: &'a mut W,
}
impl<'a> EOICIE_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: EOICIE_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "EOIC interrupt disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(EOICIE_A::DISABLED)
}
#[doc = "EOIC interrupt enabled. An interrupt is generated when the EOIC bit is set"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(EOICIE_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 7)) | (((value as u32) & 0x01) << 7);
self.w
}
}
#[doc = "Interrupt enable for WDE\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum WDEIE_A {
#[doc = "0: WDE interrupt disabled"]
DISABLED = 0,
#[doc = "1: WDE interrupt enabled. An interrupt is generated when the WDE bit is set"]
ENABLED = 1,
}
impl From<WDEIE_A> for bool {
#[inline(always)]
fn from(variant: WDEIE_A) -> Self {
variant as u8 != 0
}
}
#[doc = "Reader of field `WDEIE`"]
pub type WDEIE_R = crate::R<bool, WDEIE_A>;
impl WDEIE_R {
#[doc = r"Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> WDEIE_A {
match self.bits {
false => WDEIE_A::DISABLED,
true => WDEIE_A::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == WDEIE_A::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
*self == WDEIE_A::ENABLED
}
}
#[doc = "Write proxy for field `WDEIE`"]
pub struct WDEIE_W<'a> {
w: &'a mut W,
}
impl<'a> WDEIE_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: WDEIE_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "WDE interrupt disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(WDEIE_A::DISABLED)
}
#[doc = "WDE interrupt enabled. An interrupt is generated when the WDE bit is set"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(WDEIE_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 6)) | (((value as u32) & 0x01) << 6);
self.w
}
}
#[doc = "Interrupt enable for EOC\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum EOCIE_A {
#[doc = "0: EOC interrupt disabled"]
DISABLED = 0,
#[doc = "1: EOC interrupt enabled. An interrupt is generated when the EOC bit is set"]
ENABLED = 1,
}
impl From<EOCIE_A> for bool {
#[inline(always)]
fn from(variant: EOCIE_A) -> Self {
variant as u8 != 0
}
}
#[doc = "Reader of field `EOCIE`"]
pub type EOCIE_R = crate::R<bool, EOCIE_A>;
impl EOCIE_R {
#[doc = r"Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> EOCIE_A {
match self.bits {
false => EOCIE_A::DISABLED,
true => EOCIE_A::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == EOCIE_A::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
*self == EOCIE_A::ENABLED
}
}
#[doc = "Write proxy for field `EOCIE`"]
pub struct EOCIE_W<'a> {
w: &'a mut W,
}
impl<'a> EOCIE_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: EOCIE_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "EOC interrupt disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(EOCIE_A::DISABLED)
}
#[doc = "EOC interrupt enabled. An interrupt is generated when the EOC bit is set"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(EOCIE_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u32) & 0x01) << 5);
self.w
}
}
#[doc = "Reader of field `WDCHSEL`"]
pub type WDCHSEL_R = crate::R<u8, u8>;
#[doc = "Write proxy for field `WDCHSEL`"]
pub struct WDCHSEL_W<'a> {
w: &'a mut W,
}
impl<'a> WDCHSEL_W<'a> {
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
self.w.bits = (self.w.bits & !0x1f) | ((value as u32) & 0x1f);
self.w
}
}
impl R {
#[doc = "Bits 24:25 - ADC resolution"]
#[inline(always)]
pub fn dres(&self) -> DRES_R {
DRES_R::new(((self.bits >> 24) & 0x03) as u8)
}
#[doc = "Bit 23 - Regular channel analog watchdog enable"]
#[inline(always)]
pub fn rwden(&self) -> RWDEN_R {
RWDEN_R::new(((self.bits >> 23) & 0x01) != 0)
}
#[doc = "Bit 22 - Inserted channel analog watchdog enable"]
#[inline(always)]
pub fn iwden(&self) -> IWDEN_R {
IWDEN_R::new(((self.bits >> 22) & 0x01) != 0)
}
#[doc = "Bits 13:15 - Number of conversions in discontinuous mode"]
#[inline(always)]
pub fn disnum(&self) -> DISNUM_R {
DISNUM_R::new(((self.bits >> 13) & 0x07) as u8)
}
#[doc = "Bit 12 - Discontinuous mode on injected channels"]
#[inline(always)]
pub fn disic(&self) -> DISIC_R {
DISIC_R::new(((self.bits >> 12) & 0x01) != 0)
}
#[doc = "Bit 11 - Discontinuous mode on regular channels"]
#[inline(always)]
pub fn disrc(&self) -> DISRC_R {
DISRC_R::new(((self.bits >> 11) & 0x01) != 0)
}
#[doc = "Bit 10 - Inserted channel group convert automatically"]
#[inline(always)]
pub fn ica(&self) -> ICA_R {
ICA_R::new(((self.bits >> 10) & 0x01) != 0)
}
#[doc = "Bit 9 - When in scan mode, analog watchdog is effective on a single channel"]
#[inline(always)]
pub fn wdsc(&self) -> WDSC_R {
WDSC_R::new(((self.bits >> 9) & 0x01) != 0)
}
#[doc = "Bit 8 - Scan mode"]
#[inline(always)]
pub fn sm(&self) -> SM_R {
SM_R::new(((self.bits >> 8) & 0x01) != 0)
}
#[doc = "Bit 7 - Interrupt enable for EOIC"]
#[inline(always)]
pub fn eoicie(&self) -> EOICIE_R {
EOICIE_R::new(((self.bits >> 7) & 0x01) != 0)
}
#[doc = "Bit 6 - Interrupt enable for WDE"]
#[inline(always)]
pub fn wdeie(&self) -> WDEIE_R {
WDEIE_R::new(((self.bits >> 6) & 0x01) != 0)
}
#[doc = "Bit 5 - Interrupt enable for EOC"]
#[inline(always)]
pub fn eocie(&self) -> EOCIE_R {
EOCIE_R::new(((self.bits >> 5) & 0x01) != 0)
}
#[doc = "Bits 0:4 - Analog watchdog channel select"]
#[inline(always)]
pub fn wdchsel(&self) -> WDCHSEL_R {
WDCHSEL_R::new((self.bits & 0x1f) as u8)
}
}
impl W {
#[doc = "Bits 24:25 - ADC resolution"]
#[inline(always)]
pub fn dres(&mut self) -> DRES_W {
DRES_W { w: self }
}
#[doc = "Bit 23 - Regular channel analog watchdog enable"]
#[inline(always)]
pub fn rwden(&mut self) -> RWDEN_W {
RWDEN_W { w: self }
}
#[doc = "Bit 22 - Inserted channel analog watchdog enable"]
#[inline(always)]
pub fn iwden(&mut self) -> IWDEN_W {
IWDEN_W { w: self }
}
#[doc = "Bits 13:15 - Number of conversions in discontinuous mode"]
#[inline(always)]
pub fn disnum(&mut self) -> DISNUM_W {
DISNUM_W { w: self }
}
#[doc = "Bit 12 - Discontinuous mode on injected channels"]
#[inline(always)]
pub fn disic(&mut self) -> DISIC_W {
DISIC_W { w: self }
}
#[doc = "Bit 11 - Discontinuous mode on regular channels"]
#[inline(always)]
pub fn disrc(&mut self) -> DISRC_W {
DISRC_W { w: self }
}
#[doc = "Bit 10 - Inserted channel group convert automatically"]
#[inline(always)]
pub fn ica(&mut self) -> ICA_W {
ICA_W { w: self }
}
#[doc = "Bit 9 - When in scan mode, analog watchdog is effective on a single channel"]
#[inline(always)]
pub fn wdsc(&mut self) -> WDSC_W {
WDSC_W { w: self }
}
#[doc = "Bit 8 - Scan mode"]
#[inline(always)]
pub fn sm(&mut self) -> SM_W {
SM_W { w: self }
}
#[doc = "Bit 7 - Interrupt enable for EOIC"]
#[inline(always)]
pub fn eoicie(&mut self) -> EOICIE_W {
EOICIE_W { w: self }
}
#[doc = "Bit 6 - Interrupt enable for WDE"]
#[inline(always)]
pub fn wdeie(&mut self) -> WDEIE_W {
WDEIE_W { w: self }
}
#[doc = "Bit 5 - Interrupt enable for EOC"]
#[inline(always)]
pub fn eocie(&mut self) -> EOCIE_W {
EOCIE_W { w: self }
}
#[doc = "Bits 0:4 - Analog watchdog channel select"]
#[inline(always)]
pub fn wdchsel(&mut self) -> WDCHSEL_W {
WDCHSEL_W { w: self }
}
}