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#[doc = "Reader of register PDVSEL"] pub type R = crate::R<u32, super::PDVSEL>; #[doc = "Writer for register PDVSEL"] pub type W = crate::W<u32, super::PDVSEL>; #[doc = "Register PDVSEL `reset()`'s with value 0"] impl crate::ResetValue for super::PDVSEL { type Type = u32; #[inline(always)] fn reset_value() -> Self::Type { 0 } } #[doc = "Power down voltage select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq)] pub enum PDRVS_A { #[doc = "0: The power down voltage is 2.6 V"] V2_6 = 0, #[doc = "1: The power down voltage is 1.8 V"] V1_8 = 1, } impl From<PDRVS_A> for bool { #[inline(always)] fn from(variant: PDRVS_A) -> Self { variant as u8 != 0 } } #[doc = "Reader of field `PDRVS`"] pub type PDRVS_R = crate::R<bool, PDRVS_A>; impl PDRVS_R { #[doc = r"Get enumerated values variant"] #[inline(always)] pub fn variant(&self) -> PDRVS_A { match self.bits { false => PDRVS_A::V2_6, true => PDRVS_A::V1_8, } } #[doc = "Checks if the value of the field is `V2_6`"] #[inline(always)] pub fn is_v2_6(&self) -> bool { *self == PDRVS_A::V2_6 } #[doc = "Checks if the value of the field is `V1_8`"] #[inline(always)] pub fn is_v1_8(&self) -> bool { *self == PDRVS_A::V1_8 } } #[doc = "Write proxy for field `PDRVS`"] pub struct PDRVS_W<'a> { w: &'a mut W, } impl<'a> PDRVS_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: PDRVS_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "The power down voltage is 2.6 V"] #[inline(always)] pub fn v2_6(self) -> &'a mut W { self.variant(PDRVS_A::V2_6) } #[doc = "The power down voltage is 1.8 V"] #[inline(always)] pub fn v1_8(self) -> &'a mut W { self.variant(PDRVS_A::V1_8) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01); self.w } } impl R { #[doc = "Bit 0 - Power down voltage select"] #[inline(always)] pub fn pdrvs(&self) -> PDRVS_R { PDRVS_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bit 0 - Power down voltage select"] #[inline(always)] pub fn pdrvs(&mut self) -> PDRVS_W { PDRVS_W { w: self } } }