rk3399-pac 0.1.4

Peripheral Access Crate (PAC) for the RK3399 SoC from Rockchip
Documentation 
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#[doc = "Register `DENALI_CTL_100` reader"]
pub type R = crate::R<DenaliCtl100Spec>;
#[doc = "Register `DENALI_CTL_100` writer"]
pub type W = crate::W<DenaliCtl100Spec>;
#[doc = "Field `LPI_WAKEUP_TIMEOUT` reader - Defines the LPI timeout time, the maximum cycles between a dfi_lp_req de-assertion and a dfi_lp_ack de-assertion. If this value is exceeded, an interrupt will occur."]
pub type LpiWakeupTimeoutR = crate::FieldReader<u16>;
#[doc = "Field `LPI_WAKEUP_TIMEOUT` writer - Defines the LPI timeout time, the maximum cycles between a dfi_lp_req de-assertion and a dfi_lp_ack de-assertion. If this value is exceeded, an interrupt will occur."]
pub type LpiWakeupTimeoutW<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>;
#[doc = "Field `TDFI_LP_RESP` reader - Defines the DFI tLP_RESP timing parameter (in DFI clocks), the maximum cycles between a dfi_lp_req assertion and a dfi_lp_ack assertion."]
pub type TdfiLpRespR = crate::FieldReader;
#[doc = "Field `TDFI_LP_RESP` writer - Defines the DFI tLP_RESP timing parameter (in DFI clocks), the maximum cycles between a dfi_lp_req assertion and a dfi_lp_ack assertion."]
pub type TdfiLpRespW<'a, REG> = crate::FieldWriter<'a, REG, 3>;
#[doc = "Field `LP_STATE` reader - Low power state status parameter. Bits (4:0) indicate the current low power state and bit (5) set indicates that status bits are valid."]
pub type LpStateR = crate::FieldReader;
impl R {
    #[doc = "Bits 0:11 - Defines the LPI timeout time, the maximum cycles between a dfi_lp_req de-assertion and a dfi_lp_ack de-assertion. If this value is exceeded, an interrupt will occur."]
    #[inline(always)]
    pub fn lpi_wakeup_timeout(&self) -> LpiWakeupTimeoutR {
        LpiWakeupTimeoutR::new((self.bits & 0x0fff) as u16)
    }
    #[doc = "Bits 16:18 - Defines the DFI tLP_RESP timing parameter (in DFI clocks), the maximum cycles between a dfi_lp_req assertion and a dfi_lp_ack assertion."]
    #[inline(always)]
    pub fn tdfi_lp_resp(&self) -> TdfiLpRespR {
        TdfiLpRespR::new(((self.bits >> 16) & 7) as u8)
    }
    #[doc = "Bits 24:30 - Low power state status parameter. Bits (4:0) indicate the current low power state and bit (5) set indicates that status bits are valid."]
    #[inline(always)]
    pub fn lp_state(&self) -> LpStateR {
        LpStateR::new(((self.bits >> 24) & 0x7f) as u8)
    }
}
impl W {
    #[doc = "Bits 0:11 - Defines the LPI timeout time, the maximum cycles between a dfi_lp_req de-assertion and a dfi_lp_ack de-assertion. If this value is exceeded, an interrupt will occur."]
    #[inline(always)]
    #[must_use]
    pub fn lpi_wakeup_timeout(&mut self) -> LpiWakeupTimeoutW<DenaliCtl100Spec> {
        LpiWakeupTimeoutW::new(self, 0)
    }
    #[doc = "Bits 16:18 - Defines the DFI tLP_RESP timing parameter (in DFI clocks), the maximum cycles between a dfi_lp_req assertion and a dfi_lp_ack assertion."]
    #[inline(always)]
    #[must_use]
    pub fn tdfi_lp_resp(&mut self) -> TdfiLpRespW<DenaliCtl100Spec> {
        TdfiLpRespW::new(self, 16)
    }
}
#[doc = "\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`denali_ctl_100::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`denali_ctl_100::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
pub struct DenaliCtl100Spec;
impl crate::RegisterSpec for DenaliCtl100Spec {
    type Ux = u32;
}
#[doc = "`read()` method returns [`denali_ctl_100::R`](R) reader structure"]
impl crate::Readable for DenaliCtl100Spec {}
#[doc = "`write(|w| ..)` method takes [`denali_ctl_100::W`](W) writer structure"]
impl crate::Writable for DenaliCtl100Spec {
    type Safety = crate::Unsafe;
    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
}
#[doc = "`reset()` method sets DENALI_CTL_100 to value 0x2000_0000"]
impl crate::Resettable for DenaliCtl100Spec {
    const RESET_VALUE: u32 = 0x2000_0000;
}