rigless 0.3.0

// rigless svd from STM32F427.svd, sha256 5eb6bfd30833147f0cb93b74235b602f835fddd78d3795f67a5873804e80d414. Do not edit.
// Copyright (c) 2024 STMicroelectronics.
// SPDX-License-Identifier: Apache-2.0
//! Registers of `OTG_FS_GLOBAL` and the instances derived from it.

use rigless::soc::{Access, FieldSpec, Layout, ReadAction, RegisterSpec, Width, WriteModify};

/// The registers by name, where a variant's index is its row in [`REGISTERS`].
#[derive(Debug, Clone, Copy, PartialEq, Eq)]
pub enum Register {
    /// `FS_GOTGCTL` at offset `0x0`, resets to `0x0000_0800`, read-write.
    FsGotgctl = 0,
    /// `FS_GOTGINT` at offset `0x4`, resets to `0x0000_0000`, read-write.
    FsGotgint = 1,
    /// `FS_GAHBCFG` at offset `0x8`, resets to `0x0000_0000`, read-write.
    FsGahbcfg = 2,
    /// `FS_GUSBCFG` at offset `0xC`, resets to `0x0000_0A00`, read-write.
    FsGusbcfg = 3,
    /// `FS_GRSTCTL` at offset `0x10`, resets to `0x2000_0000`, read-write.
    FsGrstctl = 4,
    /// `FS_GINTSTS` at offset `0x14`, resets to `0x0400_0020`, read-write.
    FsGintsts = 5,
    /// `FS_GINTMSK` at offset `0x18`, resets to `0x0000_0000`, read-write.
    FsGintmsk = 6,
    /// `FS_GRXSTSR_Device` at offset `0x1C`, resets to `0x0000_0000`, read-only.
    FsGrxstsrDevice = 7,
    /// `FS_GRXSTSR_Host` at offset `0x1C`, resets to `0x0000_0000`, read-only.
    FsGrxstsrHost = 8,
    /// `FS_GRXFSIZ` at offset `0x24`, resets to `0x0000_0200`, read-write.
    FsGrxfsiz = 9,
    /// `FS_GNPTXFSIZ_Device` at offset `0x28`, resets to `0x0000_0200`, read-write.
    FsGnptxfsizDevice = 10,
    /// `FS_GNPTXFSIZ_Host` at offset `0x28`, resets to `0x0000_0200`, read-write.
    FsGnptxfsizHost = 11,
    /// `FS_GNPTXSTS` at offset `0x2C`, resets to `0x0008_0200`, read-only.
    FsGnptxsts = 12,
    /// `FS_GCCFG` at offset `0x38`, resets to `0x0000_0000`, read-write.
    FsGccfg = 13,
    /// `FS_CID` at offset `0x3C`, resets to `0x0000_1000`, read-write.
    FsCid = 14,
    /// `FS_HPTXFSIZ` at offset `0x100`, resets to `0x0200_0600`, read-write.
    FsHptxfsiz = 15,
    /// `FS_DIEPTXF1` at offset `0x104`, resets to `0x0200_0400`, read-write.
    FsDieptxf1 = 16,
    /// `FS_DIEPTXF2` at offset `0x108`, resets to `0x0200_0400`, read-write.
    FsDieptxf2 = 17,
    /// `FS_DIEPTXF3` at offset `0x10C`, resets to `0x0200_0400`, read-write.
    FsDieptxf3 = 18,
}

impl Register {
    /// Every register, in table order.
    pub const ALL: [Self; 19] = [Self::FsGotgctl, Self::FsGotgint, Self::FsGahbcfg, Self::FsGusbcfg, Self::FsGrstctl, Self::FsGintsts, Self::FsGintmsk, Self::FsGrxstsrDevice, Self::FsGrxstsrHost, Self::FsGrxfsiz, Self::FsGnptxfsizDevice, Self::FsGnptxfsizHost, Self::FsGnptxsts, Self::FsGccfg, Self::FsCid, Self::FsHptxfsiz, Self::FsDieptxf1, Self::FsDieptxf2, Self::FsDieptxf3];
}

impl Layout for Register {
    const REGISTERS: &'static [RegisterSpec] = &REGISTERS;
    fn from_index(index: usize) -> Option<Self> {
        Self::ALL.get(index).copied()
    }
    fn index(self) -> usize {
        self as usize
    }
}

/// The fields of `FS_GOTGCTL`.
pub mod fs_gotgctl {
    use super::FieldSpec;
    /// `SRQSCS`, bit 0, read-only.
    pub const SRQSCS: &FieldSpec = &super::REGISTERS[0].fields[0];
    /// `SRQ`, bit 1.
    pub const SRQ: &FieldSpec = &super::REGISTERS[0].fields[1];
    /// `HNGSCS`, bit 8, read-only.
    pub const HNGSCS: &FieldSpec = &super::REGISTERS[0].fields[2];
    /// `HNPRQ`, bit 9.
    pub const HNPRQ: &FieldSpec = &super::REGISTERS[0].fields[3];
    /// `HSHNPEN`, bit 10.
    pub const HSHNPEN: &FieldSpec = &super::REGISTERS[0].fields[4];
    /// `DHNPEN`, bit 11.
    pub const DHNPEN: &FieldSpec = &super::REGISTERS[0].fields[5];
    /// `CIDSTS`, bit 16, read-only.
    pub const CIDSTS: &FieldSpec = &super::REGISTERS[0].fields[6];
    /// `DBCT`, bit 17, read-only.
    pub const DBCT: &FieldSpec = &super::REGISTERS[0].fields[7];
    /// `ASVLD`, bit 18, read-only.
    pub const ASVLD: &FieldSpec = &super::REGISTERS[0].fields[8];
    /// `BSVLD`, bit 19, read-only.
    pub const BSVLD: &FieldSpec = &super::REGISTERS[0].fields[9];
}

/// The fields of `FS_GOTGINT`.
pub mod fs_gotgint {
    use super::FieldSpec;
    /// `SEDET`, bit 2.
    pub const SEDET: &FieldSpec = &super::REGISTERS[1].fields[0];
    /// `SRSSCHG`, bit 8.
    pub const SRSSCHG: &FieldSpec = &super::REGISTERS[1].fields[1];
    /// `HNSSCHG`, bit 9.
    pub const HNSSCHG: &FieldSpec = &super::REGISTERS[1].fields[2];
    /// `HNGDET`, bit 17.
    pub const HNGDET: &FieldSpec = &super::REGISTERS[1].fields[3];
    /// `ADTOCHG`, bit 18.
    pub const ADTOCHG: &FieldSpec = &super::REGISTERS[1].fields[4];
    /// `DBCDNE`, bit 19.
    pub const DBCDNE: &FieldSpec = &super::REGISTERS[1].fields[5];
}

/// The fields of `FS_GAHBCFG`.
pub mod fs_gahbcfg {
    use super::FieldSpec;
    /// `GINT`, bit 0.
    pub const GINT: &FieldSpec = &super::REGISTERS[2].fields[0];
    /// `TXFELVL`, bit 7.
    pub const TXFELVL: &FieldSpec = &super::REGISTERS[2].fields[1];
    /// `PTXFELVL`, bit 8.
    pub const PTXFELVL: &FieldSpec = &super::REGISTERS[2].fields[2];
}

/// The fields of `FS_GUSBCFG`.
pub mod fs_gusbcfg {
    use super::FieldSpec;
    /// `TOCAL`, bits 0..=2.
    pub const TOCAL: &FieldSpec = &super::REGISTERS[3].fields[0];
    /// `PHYSEL`, bit 6, write-only.
    pub const PHYSEL: &FieldSpec = &super::REGISTERS[3].fields[1];
    /// `SRPCAP`, bit 8.
    pub const SRPCAP: &FieldSpec = &super::REGISTERS[3].fields[2];
    /// `HNPCAP`, bit 9.
    pub const HNPCAP: &FieldSpec = &super::REGISTERS[3].fields[3];
    /// `TRDT`, bits 10..=13.
    pub const TRDT: &FieldSpec = &super::REGISTERS[3].fields[4];
    /// `FHMOD`, bit 29.
    pub const FHMOD: &FieldSpec = &super::REGISTERS[3].fields[5];
    /// `FDMOD`, bit 30.
    pub const FDMOD: &FieldSpec = &super::REGISTERS[3].fields[6];
    /// `CTXPKT`, bit 31.
    pub const CTXPKT: &FieldSpec = &super::REGISTERS[3].fields[7];
}

/// The fields of `FS_GRSTCTL`.
pub mod fs_grstctl {
    use super::FieldSpec;
    /// `CSRST`, bit 0.
    pub const CSRST: &FieldSpec = &super::REGISTERS[4].fields[0];
    /// `HSRST`, bit 1.
    pub const HSRST: &FieldSpec = &super::REGISTERS[4].fields[1];
    /// `FCRST`, bit 2.
    pub const FCRST: &FieldSpec = &super::REGISTERS[4].fields[2];
    /// `RXFFLSH`, bit 4.
    pub const RXFFLSH: &FieldSpec = &super::REGISTERS[4].fields[3];
    /// `TXFFLSH`, bit 5.
    pub const TXFFLSH: &FieldSpec = &super::REGISTERS[4].fields[4];
    /// `TXFNUM`, bits 6..=10.
    pub const TXFNUM: &FieldSpec = &super::REGISTERS[4].fields[5];
    /// `AHBIDL`, bit 31, read-only.
    pub const AHBIDL: &FieldSpec = &super::REGISTERS[4].fields[6];
}

/// The fields of `FS_GINTSTS`.
pub mod fs_gintsts {
    use super::FieldSpec;
    /// `CMOD`, bit 0, read-only.
    pub const CMOD: &FieldSpec = &super::REGISTERS[5].fields[0];
    /// `MMIS`, bit 1.
    pub const MMIS: &FieldSpec = &super::REGISTERS[5].fields[1];
    /// `OTGINT`, bit 2, read-only.
    pub const OTGINT: &FieldSpec = &super::REGISTERS[5].fields[2];
    /// `SOF`, bit 3.
    pub const SOF: &FieldSpec = &super::REGISTERS[5].fields[3];
    /// `RXFLVL`, bit 4, read-only.
    pub const RXFLVL: &FieldSpec = &super::REGISTERS[5].fields[4];
    /// `NPTXFE`, bit 5, read-only.
    pub const NPTXFE: &FieldSpec = &super::REGISTERS[5].fields[5];
    /// `GINAKEFF`, bit 6, read-only.
    pub const GINAKEFF: &FieldSpec = &super::REGISTERS[5].fields[6];
    /// `GOUTNAKEFF`, bit 7, read-only.
    pub const GOUTNAKEFF: &FieldSpec = &super::REGISTERS[5].fields[7];
    /// `ESUSP`, bit 10.
    pub const ESUSP: &FieldSpec = &super::REGISTERS[5].fields[8];
    /// `USBSUSP`, bit 11.
    pub const USBSUSP: &FieldSpec = &super::REGISTERS[5].fields[9];
    /// `USBRST`, bit 12.
    pub const USBRST: &FieldSpec = &super::REGISTERS[5].fields[10];
    /// `ENUMDNE`, bit 13.
    pub const ENUMDNE: &FieldSpec = &super::REGISTERS[5].fields[11];
    /// `ISOODRP`, bit 14.
    pub const ISOODRP: &FieldSpec = &super::REGISTERS[5].fields[12];
    /// `EOPF`, bit 15.
    pub const EOPF: &FieldSpec = &super::REGISTERS[5].fields[13];
    /// `IEPINT`, bit 18, read-only.
    pub const IEPINT: &FieldSpec = &super::REGISTERS[5].fields[14];
    /// `OEPINT`, bit 19, read-only.
    pub const OEPINT: &FieldSpec = &super::REGISTERS[5].fields[15];
    /// `IISOIXFR`, bit 20.
    pub const IISOIXFR: &FieldSpec = &super::REGISTERS[5].fields[16];
    /// `IPXFR_INCOMPISOOUT`, bit 21.
    pub const IPXFR_INCOMPISOOUT: &FieldSpec = &super::REGISTERS[5].fields[17];
    /// `HPRTINT`, bit 24, read-only.
    pub const HPRTINT: &FieldSpec = &super::REGISTERS[5].fields[18];
    /// `HCINT`, bit 25, read-only.
    pub const HCINT: &FieldSpec = &super::REGISTERS[5].fields[19];
    /// `PTXFE`, bit 26, read-only.
    pub const PTXFE: &FieldSpec = &super::REGISTERS[5].fields[20];
    /// `CIDSCHG`, bit 28.
    pub const CIDSCHG: &FieldSpec = &super::REGISTERS[5].fields[21];
    /// `DISCINT`, bit 29.
    pub const DISCINT: &FieldSpec = &super::REGISTERS[5].fields[22];
    /// `SRQINT`, bit 30.
    pub const SRQINT: &FieldSpec = &super::REGISTERS[5].fields[23];
    /// `WKUPINT`, bit 31.
    pub const WKUPINT: &FieldSpec = &super::REGISTERS[5].fields[24];
}

/// The fields of `FS_GINTMSK`.
pub mod fs_gintmsk {
    use super::FieldSpec;
    /// `MMISM`, bit 1.
    pub const MMISM: &FieldSpec = &super::REGISTERS[6].fields[0];
    /// `OTGINT`, bit 2.
    pub const OTGINT: &FieldSpec = &super::REGISTERS[6].fields[1];
    /// `SOFM`, bit 3.
    pub const SOFM: &FieldSpec = &super::REGISTERS[6].fields[2];
    /// `RXFLVLM`, bit 4.
    pub const RXFLVLM: &FieldSpec = &super::REGISTERS[6].fields[3];
    /// `NPTXFEM`, bit 5.
    pub const NPTXFEM: &FieldSpec = &super::REGISTERS[6].fields[4];
    /// `GINAKEFFM`, bit 6.
    pub const GINAKEFFM: &FieldSpec = &super::REGISTERS[6].fields[5];
    /// `GONAKEFFM`, bit 7.
    pub const GONAKEFFM: &FieldSpec = &super::REGISTERS[6].fields[6];
    /// `ESUSPM`, bit 10.
    pub const ESUSPM: &FieldSpec = &super::REGISTERS[6].fields[7];
    /// `USBSUSPM`, bit 11.
    pub const USBSUSPM: &FieldSpec = &super::REGISTERS[6].fields[8];
    /// `USBRST`, bit 12.
    pub const USBRST: &FieldSpec = &super::REGISTERS[6].fields[9];
    /// `ENUMDNEM`, bit 13.
    pub const ENUMDNEM: &FieldSpec = &super::REGISTERS[6].fields[10];
    /// `ISOODRPM`, bit 14.
    pub const ISOODRPM: &FieldSpec = &super::REGISTERS[6].fields[11];
    /// `EOPFM`, bit 15.
    pub const EOPFM: &FieldSpec = &super::REGISTERS[6].fields[12];
    /// `EPMISM`, bit 17.
    pub const EPMISM: &FieldSpec = &super::REGISTERS[6].fields[13];
    /// `IEPINT`, bit 18.
    pub const IEPINT: &FieldSpec = &super::REGISTERS[6].fields[14];
    /// `OEPINT`, bit 19.
    pub const OEPINT: &FieldSpec = &super::REGISTERS[6].fields[15];
    /// `IISOIXFRM`, bit 20.
    pub const IISOIXFRM: &FieldSpec = &super::REGISTERS[6].fields[16];
    /// `IPXFRM_IISOOXFRM`, bit 21.
    pub const IPXFRM_IISOOXFRM: &FieldSpec = &super::REGISTERS[6].fields[17];
    /// `PRTIM`, bit 24, read-only.
    pub const PRTIM: &FieldSpec = &super::REGISTERS[6].fields[18];
    /// `HCIM`, bit 25.
    pub const HCIM: &FieldSpec = &super::REGISTERS[6].fields[19];
    /// `PTXFEM`, bit 26.
    pub const PTXFEM: &FieldSpec = &super::REGISTERS[6].fields[20];
    /// `CIDSCHGM`, bit 28.
    pub const CIDSCHGM: &FieldSpec = &super::REGISTERS[6].fields[21];
    /// `DISCINT`, bit 29.
    pub const DISCINT: &FieldSpec = &super::REGISTERS[6].fields[22];
    /// `SRQIM`, bit 30.
    pub const SRQIM: &FieldSpec = &super::REGISTERS[6].fields[23];
    /// `WUIM`, bit 31.
    pub const WUIM: &FieldSpec = &super::REGISTERS[6].fields[24];
}

/// The fields of `FS_GRXSTSR_Device`.
pub mod fs_grxstsr_device {
    use super::FieldSpec;
    /// `EPNUM`, bits 0..=3.
    pub const EPNUM: &FieldSpec = &super::REGISTERS[7].fields[0];
    /// `BCNT`, bits 4..=14.
    pub const BCNT: &FieldSpec = &super::REGISTERS[7].fields[1];
    /// `DPID`, bits 15..=16.
    pub const DPID: &FieldSpec = &super::REGISTERS[7].fields[2];
    /// `PKTSTS`, bits 17..=20.
    pub const PKTSTS: &FieldSpec = &super::REGISTERS[7].fields[3];
    /// `FRMNUM`, bits 21..=24.
    pub const FRMNUM: &FieldSpec = &super::REGISTERS[7].fields[4];
}

/// The fields of `FS_GRXSTSR_Host`.
pub mod fs_grxstsr_host {
    use super::FieldSpec;
    /// `EPNUM`, bits 0..=3.
    pub const EPNUM: &FieldSpec = &super::REGISTERS[8].fields[0];
    /// `BCNT`, bits 4..=14.
    pub const BCNT: &FieldSpec = &super::REGISTERS[8].fields[1];
    /// `DPID`, bits 15..=16.
    pub const DPID: &FieldSpec = &super::REGISTERS[8].fields[2];
    /// `PKTSTS`, bits 17..=20.
    pub const PKTSTS: &FieldSpec = &super::REGISTERS[8].fields[3];
    /// `FRMNUM`, bits 21..=24.
    pub const FRMNUM: &FieldSpec = &super::REGISTERS[8].fields[4];
}

/// The fields of `FS_GRXFSIZ`.
pub mod fs_grxfsiz {
    use super::FieldSpec;
    /// `RXFD`, bits 0..=15.
    pub const RXFD: &FieldSpec = &super::REGISTERS[9].fields[0];
}

/// The fields of `FS_GNPTXFSIZ_Device`.
pub mod fs_gnptxfsiz_device {
    use super::FieldSpec;
    /// `TX0FSA`, bits 0..=15.
    pub const TX0FSA: &FieldSpec = &super::REGISTERS[10].fields[0];
    /// `TX0FD`, bits 16..=31.
    pub const TX0FD: &FieldSpec = &super::REGISTERS[10].fields[1];
}

/// The fields of `FS_GNPTXFSIZ_Host`.
pub mod fs_gnptxfsiz_host {
    use super::FieldSpec;
    /// `NPTXFSA`, bits 0..=15.
    pub const NPTXFSA: &FieldSpec = &super::REGISTERS[11].fields[0];
    /// `NPTXFD`, bits 16..=31.
    pub const NPTXFD: &FieldSpec = &super::REGISTERS[11].fields[1];
}

/// The fields of `FS_GNPTXSTS`.
pub mod fs_gnptxsts {
    use super::FieldSpec;
    /// `NPTXFSAV`, bits 0..=15.
    pub const NPTXFSAV: &FieldSpec = &super::REGISTERS[12].fields[0];
    /// `NPTQXSAV`, bits 16..=23.
    pub const NPTQXSAV: &FieldSpec = &super::REGISTERS[12].fields[1];
    /// `NPTXQTOP`, bits 24..=30.
    pub const NPTXQTOP: &FieldSpec = &super::REGISTERS[12].fields[2];
}

/// The fields of `FS_GCCFG`.
pub mod fs_gccfg {
    use super::FieldSpec;
    /// `PWRDWN`, bit 16.
    pub const PWRDWN: &FieldSpec = &super::REGISTERS[13].fields[0];
    /// `VBUSASEN`, bit 18.
    pub const VBUSASEN: &FieldSpec = &super::REGISTERS[13].fields[1];
    /// `VBUSBSEN`, bit 19.
    pub const VBUSBSEN: &FieldSpec = &super::REGISTERS[13].fields[2];
    /// `SOFOUTEN`, bit 20.
    pub const SOFOUTEN: &FieldSpec = &super::REGISTERS[13].fields[3];
}

/// The fields of `FS_CID`.
pub mod fs_cid {
    use super::FieldSpec;
    /// `PRODUCT_ID`, bits 0..=31.
    pub const PRODUCT_ID: &FieldSpec = &super::REGISTERS[14].fields[0];
}

/// The fields of `FS_HPTXFSIZ`.
pub mod fs_hptxfsiz {
    use super::FieldSpec;
    /// `PTXSA`, bits 0..=15.
    pub const PTXSA: &FieldSpec = &super::REGISTERS[15].fields[0];
    /// `PTXFSIZ`, bits 16..=31.
    pub const PTXFSIZ: &FieldSpec = &super::REGISTERS[15].fields[1];
}

/// The fields of `FS_DIEPTXF1`.
pub mod fs_dieptxf1 {
    use super::FieldSpec;
    /// `INEPTXSA`, bits 0..=15.
    pub const INEPTXSA: &FieldSpec = &super::REGISTERS[16].fields[0];
    /// `INEPTXFD`, bits 16..=31.
    pub const INEPTXFD: &FieldSpec = &super::REGISTERS[16].fields[1];
}

/// The fields of `FS_DIEPTXF2`.
pub mod fs_dieptxf2 {
    use super::FieldSpec;
    /// `INEPTXSA`, bits 0..=15.
    pub const INEPTXSA: &FieldSpec = &super::REGISTERS[17].fields[0];
    /// `INEPTXFD`, bits 16..=31.
    pub const INEPTXFD: &FieldSpec = &super::REGISTERS[17].fields[1];
}

/// The fields of `FS_DIEPTXF3`.
pub mod fs_dieptxf3 {
    use super::FieldSpec;
    /// `INEPTXSA`, bits 0..=15.
    pub const INEPTXSA: &FieldSpec = &super::REGISTERS[18].fields[0];
    /// `INEPTXFD`, bits 16..=31.
    pub const INEPTXFD: &FieldSpec = &super::REGISTERS[18].fields[1];
}

/// The register table.
pub static REGISTERS: [RegisterSpec; 19] = [
    RegisterSpec { name: "FS_GOTGCTL", offset: 0x0, width: Width::W32, reset: 0x0000_0800, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "SRQSCS", bit: 0, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "SRQ", bit: 1, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "HNGSCS", bit: 8, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "HNPRQ", bit: 9, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "HSHNPEN", bit: 10, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DHNPEN", bit: 11, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CIDSTS", bit: 16, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DBCT", bit: 17, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "ASVLD", bit: 18, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "BSVLD", bit: 19, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "FS_GOTGINT", offset: 0x4, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "SEDET", bit: 2, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "SRSSCHG", bit: 8, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "HNSSCHG", bit: 9, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "HNGDET", bit: 17, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "ADTOCHG", bit: 18, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DBCDNE", bit: 19, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "FS_GAHBCFG", offset: 0x8, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "GINT", bit: 0, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TXFELVL", bit: 7, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "PTXFELVL", bit: 8, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "FS_GUSBCFG", offset: 0xC, width: Width::W32, reset: 0x0000_0A00, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "TOCAL", bit: 0, width: 3, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "PHYSEL", bit: 6, width: 1, access: Access::WriteOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "SRPCAP", bit: 8, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "HNPCAP", bit: 9, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TRDT", bit: 10, width: 4, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "FHMOD", bit: 29, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "FDMOD", bit: 30, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CTXPKT", bit: 31, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "FS_GRSTCTL", offset: 0x10, width: Width::W32, reset: 0x2000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "CSRST", bit: 0, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "HSRST", bit: 1, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "FCRST", bit: 2, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "RXFFLSH", bit: 4, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TXFFLSH", bit: 5, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TXFNUM", bit: 6, width: 5, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "AHBIDL", bit: 31, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "FS_GINTSTS", offset: 0x14, width: Width::W32, reset: 0x0400_0020, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "CMOD", bit: 0, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "MMIS", bit: 1, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "OTGINT", bit: 2, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "SOF", bit: 3, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "RXFLVL", bit: 4, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "NPTXFE", bit: 5, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "GINAKEFF", bit: 6, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "GOUTNAKEFF", bit: 7, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "ESUSP", bit: 10, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "USBSUSP", bit: 11, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "USBRST", bit: 12, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "ENUMDNE", bit: 13, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "ISOODRP", bit: 14, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EOPF", bit: 15, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "IEPINT", bit: 18, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "OEPINT", bit: 19, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "IISOIXFR", bit: 20, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "IPXFR_INCOMPISOOUT", bit: 21, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "HPRTINT", bit: 24, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "HCINT", bit: 25, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "PTXFE", bit: 26, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CIDSCHG", bit: 28, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DISCINT", bit: 29, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "SRQINT", bit: 30, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "WKUPINT", bit: 31, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "FS_GINTMSK", offset: 0x18, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "MMISM", bit: 1, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "OTGINT", bit: 2, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "SOFM", bit: 3, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "RXFLVLM", bit: 4, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "NPTXFEM", bit: 5, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "GINAKEFFM", bit: 6, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "GONAKEFFM", bit: 7, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "ESUSPM", bit: 10, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "USBSUSPM", bit: 11, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "USBRST", bit: 12, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "ENUMDNEM", bit: 13, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "ISOODRPM", bit: 14, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EOPFM", bit: 15, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EPMISM", bit: 17, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "IEPINT", bit: 18, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "OEPINT", bit: 19, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "IISOIXFRM", bit: 20, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "IPXFRM_IISOOXFRM", bit: 21, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "PRTIM", bit: 24, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "HCIM", bit: 25, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "PTXFEM", bit: 26, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CIDSCHGM", bit: 28, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DISCINT", bit: 29, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "SRQIM", bit: 30, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "WUIM", bit: 31, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "FS_GRXSTSR_Device", offset: 0x1C, width: Width::W32, reset: 0x0000_0000, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "EPNUM", bit: 0, width: 4, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "BCNT", bit: 4, width: 11, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DPID", bit: 15, width: 2, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "PKTSTS", bit: 17, width: 4, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "FRMNUM", bit: 21, width: 4, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "FS_GRXSTSR_Host", offset: 0x1C, width: Width::W32, reset: 0x0000_0000, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "EPNUM", bit: 0, width: 4, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "BCNT", bit: 4, width: 11, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DPID", bit: 15, width: 2, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "PKTSTS", bit: 17, width: 4, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "FRMNUM", bit: 21, width: 4, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "FS_GRXFSIZ", offset: 0x24, width: Width::W32, reset: 0x0000_0200, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "RXFD", bit: 0, width: 16, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "FS_GNPTXFSIZ_Device", offset: 0x28, width: Width::W32, reset: 0x0000_0200, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "TX0FSA", bit: 0, width: 16, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TX0FD", bit: 16, width: 16, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "FS_GNPTXFSIZ_Host", offset: 0x28, width: Width::W32, reset: 0x0000_0200, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "NPTXFSA", bit: 0, width: 16, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "NPTXFD", bit: 16, width: 16, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "FS_GNPTXSTS", offset: 0x2C, width: Width::W32, reset: 0x0008_0200, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "NPTXFSAV", bit: 0, width: 16, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "NPTQXSAV", bit: 16, width: 8, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "NPTXQTOP", bit: 24, width: 7, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "FS_GCCFG", offset: 0x38, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "PWRDWN", bit: 16, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "VBUSASEN", bit: 18, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "VBUSBSEN", bit: 19, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "SOFOUTEN", bit: 20, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "FS_CID", offset: 0x3C, width: Width::W32, reset: 0x0000_1000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "PRODUCT_ID", bit: 0, width: 32, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "FS_HPTXFSIZ", offset: 0x100, width: Width::W32, reset: 0x0200_0600, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "PTXSA", bit: 0, width: 16, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "PTXFSIZ", bit: 16, width: 16, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "FS_DIEPTXF1", offset: 0x104, width: Width::W32, reset: 0x0200_0400, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "INEPTXSA", bit: 0, width: 16, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "INEPTXFD", bit: 16, width: 16, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "FS_DIEPTXF2", offset: 0x108, width: Width::W32, reset: 0x0200_0400, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "INEPTXSA", bit: 0, width: 16, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "INEPTXFD", bit: 16, width: 16, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "FS_DIEPTXF3", offset: 0x10C, width: Width::W32, reset: 0x0200_0400, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "INEPTXSA", bit: 0, width: 16, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "INEPTXFD", bit: 16, width: 16, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
];