esp32h2/i2c0/
fifo_st.rs

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1#[doc = "Register `FIFO_ST` reader"]
2pub type R = crate::R<FIFO_ST_SPEC>;
3#[doc = "Field `RXFIFO_RADDR` reader - This is the offset address of the APB reading from rxfifo"]
4pub type RXFIFO_RADDR_R = crate::FieldReader;
5#[doc = "Field `RXFIFO_WADDR` reader - This is the offset address of i2c module receiving data and writing to rxfifo."]
6pub type RXFIFO_WADDR_R = crate::FieldReader;
7#[doc = "Field `TXFIFO_RADDR` reader - This is the offset address of i2c module reading from txfifo."]
8pub type TXFIFO_RADDR_R = crate::FieldReader;
9#[doc = "Field `TXFIFO_WADDR` reader - This is the offset address of APB bus writing to txfifo."]
10pub type TXFIFO_WADDR_R = crate::FieldReader;
11#[doc = "Field `SLAVE_RW_POINT` reader - The received data in I2C slave mode."]
12pub type SLAVE_RW_POINT_R = crate::FieldReader;
13impl R {
14    #[doc = "Bits 0:4 - This is the offset address of the APB reading from rxfifo"]
15    #[inline(always)]
16    pub fn rxfifo_raddr(&self) -> RXFIFO_RADDR_R {
17        RXFIFO_RADDR_R::new((self.bits & 0x1f) as u8)
18    }
19    #[doc = "Bits 5:9 - This is the offset address of i2c module receiving data and writing to rxfifo."]
20    #[inline(always)]
21    pub fn rxfifo_waddr(&self) -> RXFIFO_WADDR_R {
22        RXFIFO_WADDR_R::new(((self.bits >> 5) & 0x1f) as u8)
23    }
24    #[doc = "Bits 10:14 - This is the offset address of i2c module reading from txfifo."]
25    #[inline(always)]
26    pub fn txfifo_raddr(&self) -> TXFIFO_RADDR_R {
27        TXFIFO_RADDR_R::new(((self.bits >> 10) & 0x1f) as u8)
28    }
29    #[doc = "Bits 15:19 - This is the offset address of APB bus writing to txfifo."]
30    #[inline(always)]
31    pub fn txfifo_waddr(&self) -> TXFIFO_WADDR_R {
32        TXFIFO_WADDR_R::new(((self.bits >> 15) & 0x1f) as u8)
33    }
34    #[doc = "Bits 22:29 - The received data in I2C slave mode."]
35    #[inline(always)]
36    pub fn slave_rw_point(&self) -> SLAVE_RW_POINT_R {
37        SLAVE_RW_POINT_R::new(((self.bits >> 22) & 0xff) as u8)
38    }
39}
40#[cfg(feature = "impl-register-debug")]
41impl core::fmt::Debug for R {
42    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
43        f.debug_struct("FIFO_ST")
44            .field("rxfifo_raddr", &self.rxfifo_raddr())
45            .field("rxfifo_waddr", &self.rxfifo_waddr())
46            .field("txfifo_raddr", &self.txfifo_raddr())
47            .field("txfifo_waddr", &self.txfifo_waddr())
48            .field("slave_rw_point", &self.slave_rw_point())
49            .finish()
50    }
51}
52#[doc = "FIFO status register.\n\nYou can [`read`](crate::Reg::read) this register and get [`fifo_st::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
53pub struct FIFO_ST_SPEC;
54impl crate::RegisterSpec for FIFO_ST_SPEC {
55    type Ux = u32;
56}
57#[doc = "`read()` method returns [`fifo_st::R`](R) reader structure"]
58impl crate::Readable for FIFO_ST_SPEC {}
59#[doc = "`reset()` method sets FIFO_ST to value 0"]
60impl crate::Resettable for FIFO_ST_SPEC {
61    const RESET_VALUE: u32 = 0;
62}
esp32h2/i2c0/fifo_st.rs

esp32h2/i2c0/
fifo_st.rs
