esp32h2/lp_ana/
int_clr.rs

1#[doc = "Register `INT_CLR` writer"]
2pub type W = crate::W<INT_CLR_SPEC>;
3#[doc = "Field `VDDBAT_CHARGE_UPVOLTAGE` writer - need_des"]
4pub type VDDBAT_CHARGE_UPVOLTAGE_W<'a, REG> = crate::BitWriter1C<'a, REG>;
5#[doc = "Field `VDDBAT_CHARGE_UNDERVOLTAGE` writer - need_des"]
6pub type VDDBAT_CHARGE_UNDERVOLTAGE_W<'a, REG> = crate::BitWriter1C<'a, REG>;
7#[doc = "Field `VDDBAT_UPVOLTAGE` writer - need_des"]
8pub type VDDBAT_UPVOLTAGE_W<'a, REG> = crate::BitWriter1C<'a, REG>;
9#[doc = "Field `VDDBAT_UNDERVOLTAGE` writer - need_des"]
10pub type VDDBAT_UNDERVOLTAGE_W<'a, REG> = crate::BitWriter1C<'a, REG>;
11#[doc = "Field `BOD_MODE0` writer - need_des"]
12pub type BOD_MODE0_W<'a, REG> = crate::BitWriter1C<'a, REG>;
13#[cfg(feature = "impl-register-debug")]
14impl core::fmt::Debug for crate::generic::Reg<INT_CLR_SPEC> {
15    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
16        write!(f, "(not readable)")
17    }
18}
19impl W {
20    #[doc = "Bit 27 - need_des"]
21    #[inline(always)]
22    pub fn vddbat_charge_upvoltage(&mut self) -> VDDBAT_CHARGE_UPVOLTAGE_W<INT_CLR_SPEC> {
23        VDDBAT_CHARGE_UPVOLTAGE_W::new(self, 27)
24    }
25    #[doc = "Bit 28 - need_des"]
26    #[inline(always)]
27    pub fn vddbat_charge_undervoltage(&mut self) -> VDDBAT_CHARGE_UNDERVOLTAGE_W<INT_CLR_SPEC> {
28        VDDBAT_CHARGE_UNDERVOLTAGE_W::new(self, 28)
29    }
30    #[doc = "Bit 29 - need_des"]
31    #[inline(always)]
32    pub fn vddbat_upvoltage(&mut self) -> VDDBAT_UPVOLTAGE_W<INT_CLR_SPEC> {
33        VDDBAT_UPVOLTAGE_W::new(self, 29)
34    }
35    #[doc = "Bit 30 - need_des"]
36    #[inline(always)]
37    pub fn vddbat_undervoltage(&mut self) -> VDDBAT_UNDERVOLTAGE_W<INT_CLR_SPEC> {
38        VDDBAT_UNDERVOLTAGE_W::new(self, 30)
39    }
40    #[doc = "Bit 31 - need_des"]
41    #[inline(always)]
42    pub fn bod_mode0(&mut self) -> BOD_MODE0_W<INT_CLR_SPEC> {
43        BOD_MODE0_W::new(self, 31)
44    }
45}
46#[doc = "need_des\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`int_clr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
47pub struct INT_CLR_SPEC;
48impl crate::RegisterSpec for INT_CLR_SPEC {
49    type Ux = u32;
50}
51#[doc = "`write(|w| ..)` method takes [`int_clr::W`](W) writer structure"]
52impl crate::Writable for INT_CLR_SPEC {
53    type Safety = crate::Unsafe;
54    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
55    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0xf800_0000;
56}
57#[doc = "`reset()` method sets INT_CLR to value 0"]
58impl crate::Resettable for INT_CLR_SPEC {
59    const RESET_VALUE: u32 = 0;
60}
esp32h2/lp_ana/int_clr.rs

esp32h2/lp_ana/
int_clr.rs
