esp32h2/uhci0/
hung_conf.rs

1#[doc = "Register `HUNG_CONF` reader"]
2pub type R = crate::R<HUNG_CONF_SPEC>;
3#[doc = "Register `HUNG_CONF` writer"]
4pub type W = crate::W<HUNG_CONF_SPEC>;
5#[doc = "Field `TXFIFO_TIMEOUT` reader - a"]
6pub type TXFIFO_TIMEOUT_R = crate::FieldReader;
7#[doc = "Field `TXFIFO_TIMEOUT` writer - a"]
8pub type TXFIFO_TIMEOUT_W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
9#[doc = "Field `TXFIFO_TIMEOUT_SHIFT` reader - a"]
10pub type TXFIFO_TIMEOUT_SHIFT_R = crate::FieldReader;
11#[doc = "Field `TXFIFO_TIMEOUT_SHIFT` writer - a"]
12pub type TXFIFO_TIMEOUT_SHIFT_W<'a, REG> = crate::FieldWriter<'a, REG, 3>;
13#[doc = "Field `TXFIFO_TIMEOUT_ENA` reader - a"]
14pub type TXFIFO_TIMEOUT_ENA_R = crate::BitReader;
15#[doc = "Field `TXFIFO_TIMEOUT_ENA` writer - a"]
16pub type TXFIFO_TIMEOUT_ENA_W<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `RXFIFO_TIMEOUT` reader - a"]
18pub type RXFIFO_TIMEOUT_R = crate::FieldReader;
19#[doc = "Field `RXFIFO_TIMEOUT` writer - a"]
20pub type RXFIFO_TIMEOUT_W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
21#[doc = "Field `RXFIFO_TIMEOUT_SHIFT` reader - a"]
22pub type RXFIFO_TIMEOUT_SHIFT_R = crate::FieldReader;
23#[doc = "Field `RXFIFO_TIMEOUT_SHIFT` writer - a"]
24pub type RXFIFO_TIMEOUT_SHIFT_W<'a, REG> = crate::FieldWriter<'a, REG, 3>;
25#[doc = "Field `RXFIFO_TIMEOUT_ENA` reader - a"]
26pub type RXFIFO_TIMEOUT_ENA_R = crate::BitReader;
27#[doc = "Field `RXFIFO_TIMEOUT_ENA` writer - a"]
28pub type RXFIFO_TIMEOUT_ENA_W<'a, REG> = crate::BitWriter<'a, REG>;
29impl R {
30    #[doc = "Bits 0:7 - a"]
31    #[inline(always)]
32    pub fn txfifo_timeout(&self) -> TXFIFO_TIMEOUT_R {
33        TXFIFO_TIMEOUT_R::new((self.bits & 0xff) as u8)
34    }
35    #[doc = "Bits 8:10 - a"]
36    #[inline(always)]
37    pub fn txfifo_timeout_shift(&self) -> TXFIFO_TIMEOUT_SHIFT_R {
38        TXFIFO_TIMEOUT_SHIFT_R::new(((self.bits >> 8) & 7) as u8)
39    }
40    #[doc = "Bit 11 - a"]
41    #[inline(always)]
42    pub fn txfifo_timeout_ena(&self) -> TXFIFO_TIMEOUT_ENA_R {
43        TXFIFO_TIMEOUT_ENA_R::new(((self.bits >> 11) & 1) != 0)
44    }
45    #[doc = "Bits 12:19 - a"]
46    #[inline(always)]
47    pub fn rxfifo_timeout(&self) -> RXFIFO_TIMEOUT_R {
48        RXFIFO_TIMEOUT_R::new(((self.bits >> 12) & 0xff) as u8)
49    }
50    #[doc = "Bits 20:22 - a"]
51    #[inline(always)]
52    pub fn rxfifo_timeout_shift(&self) -> RXFIFO_TIMEOUT_SHIFT_R {
53        RXFIFO_TIMEOUT_SHIFT_R::new(((self.bits >> 20) & 7) as u8)
54    }
55    #[doc = "Bit 23 - a"]
56    #[inline(always)]
57    pub fn rxfifo_timeout_ena(&self) -> RXFIFO_TIMEOUT_ENA_R {
58        RXFIFO_TIMEOUT_ENA_R::new(((self.bits >> 23) & 1) != 0)
59    }
60}
61#[cfg(feature = "impl-register-debug")]
62impl core::fmt::Debug for R {
63    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
64        f.debug_struct("HUNG_CONF")
65            .field("txfifo_timeout", &self.txfifo_timeout())
66            .field("txfifo_timeout_shift", &self.txfifo_timeout_shift())
67            .field("txfifo_timeout_ena", &self.txfifo_timeout_ena())
68            .field("rxfifo_timeout", &self.rxfifo_timeout())
69            .field("rxfifo_timeout_shift", &self.rxfifo_timeout_shift())
70            .field("rxfifo_timeout_ena", &self.rxfifo_timeout_ena())
71            .finish()
72    }
73}
74impl W {
75    #[doc = "Bits 0:7 - a"]
76    #[inline(always)]
77    pub fn txfifo_timeout(&mut self) -> TXFIFO_TIMEOUT_W<HUNG_CONF_SPEC> {
78        TXFIFO_TIMEOUT_W::new(self, 0)
79    }
80    #[doc = "Bits 8:10 - a"]
81    #[inline(always)]
82    pub fn txfifo_timeout_shift(&mut self) -> TXFIFO_TIMEOUT_SHIFT_W<HUNG_CONF_SPEC> {
83        TXFIFO_TIMEOUT_SHIFT_W::new(self, 8)
84    }
85    #[doc = "Bit 11 - a"]
86    #[inline(always)]
87    pub fn txfifo_timeout_ena(&mut self) -> TXFIFO_TIMEOUT_ENA_W<HUNG_CONF_SPEC> {
88        TXFIFO_TIMEOUT_ENA_W::new(self, 11)
89    }
90    #[doc = "Bits 12:19 - a"]
91    #[inline(always)]
92    pub fn rxfifo_timeout(&mut self) -> RXFIFO_TIMEOUT_W<HUNG_CONF_SPEC> {
93        RXFIFO_TIMEOUT_W::new(self, 12)
94    }
95    #[doc = "Bits 20:22 - a"]
96    #[inline(always)]
97    pub fn rxfifo_timeout_shift(&mut self) -> RXFIFO_TIMEOUT_SHIFT_W<HUNG_CONF_SPEC> {
98        RXFIFO_TIMEOUT_SHIFT_W::new(self, 20)
99    }
100    #[doc = "Bit 23 - a"]
101    #[inline(always)]
102    pub fn rxfifo_timeout_ena(&mut self) -> RXFIFO_TIMEOUT_ENA_W<HUNG_CONF_SPEC> {
103        RXFIFO_TIMEOUT_ENA_W::new(self, 23)
104    }
105}
106#[doc = "a\n\nYou can [`read`](crate::Reg::read) this register and get [`hung_conf::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hung_conf::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
107pub struct HUNG_CONF_SPEC;
108impl crate::RegisterSpec for HUNG_CONF_SPEC {
109    type Ux = u32;
110}
111#[doc = "`read()` method returns [`hung_conf::R`](R) reader structure"]
112impl crate::Readable for HUNG_CONF_SPEC {}
113#[doc = "`write(|w| ..)` method takes [`hung_conf::W`](W) writer structure"]
114impl crate::Writable for HUNG_CONF_SPEC {
115    type Safety = crate::Unsafe;
116    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
117    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
118}
119#[doc = "`reset()` method sets HUNG_CONF to value 0x0081_0810"]
120impl crate::Resettable for HUNG_CONF_SPEC {
121    const RESET_VALUE: u32 = 0x0081_0810;
122}
esp32h2/uhci0/hung_conf.rs

esp32h2/uhci0/
hung_conf.rs
