Module stm32mp157

Source
Expand description

Peripheral access API for STM32MP157 microcontrollers (generated using svd2rust v0.24.1 ( ))

You can find an overview of the generated API here.

API features to be included in the next svd2rust release can be generated by cloning the svd2rust repository, checking out the above commit, and running cargo doc --open.

Re-exports§

pub use self::Interrupt as interrupt;
pub use crc1 as crc2;
pub use cryp1 as cryp2;
pub use dlybsd1 as dlybsd2;
pub use dlybsd1 as dlybsd3;
pub use dma1 as dma2;
pub use fdcan1 as fdcan2;
pub use i2c1 as i2c2;
pub use i2c1 as i2c3;
pub use i2c1 as i2c4;
pub use i2c1 as i2c5;
pub use i2c1 as i2c6;
pub use iwdg1 as iwdg2;
pub use lptim1 as lptim2;
pub use lptim1 as lptim3;
pub use lptim1 as lptim4;
pub use lptim1 as lptim5;
pub use rng1 as rng2;
pub use sai1 as sai2;
pub use sai1 as sai3;
pub use sai1 as sai4;
pub use sdmmc1 as sdmmc2;
pub use sdmmc1 as sdmmc3;
pub use spi1 as spi2;
pub use spi1 as spi3;
pub use spi1 as spi4;
pub use spi1 as spi5;
pub use spi1 as spi6;
pub use tim16 as tim17;
pub use usart1 as usart2;
pub use usart1 as usart3;
pub use usart1 as usart4;
pub use usart1 as usart5;
pub use usart1 as usart6;
pub use usart1 as usart7;
pub use usart1 as usart8;

Modules§

adc
ADC
adc2
ADC2
adc_common
Analog-to-Digital Converter
aximc_mx
AXIMC_Mx
bsec
BSEC2
ccu
CCU
crc1
CRC1
cryp1
CRYP1
dac1
DAC1
dcmi
DCMI
ddrctrl
DDRCTRL
ddrperfm
DDRPERFM
ddrphyc
DDRPHYC
dfsdm1
DFSDM1
dlybqs
DLYBQS
dlybsd1
DLYBSD1
dma1
DMA1
dmamux1
DMAMUX1
dsi
DSIHOST1
dts
DTS register block
eth_dma
ETH_DMA
eth_mac_mmc
ETH_MAC_MMC
eth_mtl
ETH_MTL
etzpc
ETZPC
exti
EXTI
fdcan1
FDCAN1
fmc
FMC register block
gicc
GICC
gicd
GICD
gich
GICH
gicv
GICV
gpioa
GPIOA
gpiob
GPIOB
gpioc
GPIOC
gpiod
GPIOD
gpioe
GPIOE
gpiof
GPIOF
gpiog
GPIOG
gpioh
GPIOH
gpioi
GPIOI
gpioj
GPIOJ
gpiok
GPIOK
gpioz
GPIOZ
hash1
HASH register block
hash2
HASH register block
hdmi_cec
HDMI_CEC
hdp
HDP
hsem
HSEM
i2c1
I2C1
ipcc
IPCC
iwdg1
IWDG1
lptim1
LPTIM1
ltdc
LTDC
mdios
MDIOS
mdma
MDMA1
otg
OTG
pwr
PWR
quadspi
QUADSPI1
rcc
RCC
rng1
RNG1
rtc
RTC
sai1
SAI1 register block
sdmmc1
SDMMC1
spdifrx
SPDIFRX
spi1
SPI1
stgenc
STGENC
stgenr
STGENR
syscfg
SYSCFG
tamp
TAMP
tim1
TIM1
tim2
TIM2
tim3
TIM3
tim4
TIM4
tim5
TIM5
tim6
TIM6
tim7
TIM7
tim8
TIM8
tim12
TIM12
tim13
TIM13
tim14
TIM14
tim15
TIM15
tim16
TIM16
tzc
TZC
usart1
Universal synchronous asynchronous receiver transmitter
usbphyc
USBPHYC
vrefbuf
VREFBUF
wwdg1
WWDG1

Structs§

ADC
ADC
ADC2
ADC2
ADC_COMMON
Analog-to-Digital Converter
AXIMC_MX
AXIMC_Mx
BSEC
BSEC2
CBP
Cache and branch predictor maintenance operations
CCU
CCU
CPUID
CPUID
CRC1
CRC1
CRC2
CRC1
CRYP1
CRYP1
CRYP2
CRYP1
CorePeripherals
Core peripherals
DAC1
DAC1
DCB
Debug Control Block
DCMI
DCMI
DDRCTRL
DDRCTRL
DDRPERFM
DDRPERFM
DDRPHYC
DDRPHYC
DFSDM1
DFSDM1
DLYBQS
DLYBQS
DLYBSD1
DLYBSD1
DLYBSD2
DLYBSD1
DLYBSD3
DLYBSD1
DMA1
DMA1
DMA2
DMA1
DMAMUX1
DMAMUX1
DSI
DSIHOST1
DTS
DTS register block
DWT
Data Watchpoint and Trace unit
ETH_DMA
ETH_DMA
ETH_MAC_MMC
ETH_MAC_MMC
ETH_MTL
ETH_MTL
ETZPC
ETZPC
EXTI
EXTI
FDCAN1
FDCAN1
FDCAN2
FDCAN1
FMC
FMC register block
FPB
Flash Patch and Breakpoint unit
FPU
Floating Point Unit
GICC
GICC
GICD
GICD
GICH
GICH
GICV
GICV
GPIOA
GPIOA
GPIOB
GPIOB
GPIOC
GPIOC
GPIOD
GPIOD
GPIOE
GPIOE
GPIOF
GPIOF
GPIOG
GPIOG
GPIOH
GPIOH
GPIOI
GPIOI
GPIOJ
GPIOJ
GPIOK
GPIOK
GPIOZ
GPIOZ
HASH1
HASH register block
HASH2
HASH register block
HDMI_CEC
HDMI_CEC
HDP
HDP
HSEM
HSEM
I2C1
I2C1
I2C2
I2C1
I2C3
I2C1
I2C4
I2C1
I2C5
I2C1
I2C6
I2C1
IPCC
IPCC
ITM
Instrumentation Trace Macrocell
IWDG1
IWDG1
IWDG2
IWDG1
LPTIM1
LPTIM1
LPTIM2
LPTIM1
LPTIM3
LPTIM1
LPTIM4
LPTIM1
LPTIM5
LPTIM1
LTDC
LTDC
MDIOS
MDIOS
MDMA
MDMA1
MPU
Memory Protection Unit
NVIC
Nested Vector Interrupt Controller
OTG
OTG
PWR
PWR
Peripherals
All the peripherals
QUADSPI
QUADSPI1
RCC
RCC
RNG1
RNG1
RNG2
RNG1
RTC
RTC
SAI1
SAI1 register block
SAI2
SAI1 register block
SAI3
SAI1 register block
SAI4
SAI1 register block
SCB
System Control Block
SDMMC1
SDMMC1
SDMMC2
SDMMC1
SDMMC3
SDMMC1
SPDIFRX
SPDIFRX
SPI1
SPI1
SPI2
SPI1
SPI3
SPI1
SPI4
SPI1
SPI5
SPI1
SPI6
SPI1
STGENC
STGENC
STGENR
STGENR
SYSCFG
SYSCFG
SYST
SysTick: System Timer
TAMP
TAMP
TIM1
TIM1
TIM2
TIM2
TIM3
TIM3
TIM4
TIM4
TIM5
TIM5
TIM6
TIM6
TIM7
TIM7
TIM8
TIM8
TIM12
TIM12
TIM13
TIM13
TIM14
TIM14
TIM15
TIM15
TIM16
TIM16
TIM17
TIM16
TPIU
Trace Port Interface Unit
TZC
TZC
USART1
Universal synchronous asynchronous receiver transmitter
USART2
Universal synchronous asynchronous receiver transmitter
USART3
Universal synchronous asynchronous receiver transmitter
USART4
Universal synchronous asynchronous receiver transmitter
USART5
Universal synchronous asynchronous receiver transmitter
USART6
Universal synchronous asynchronous receiver transmitter
USART7
Universal synchronous asynchronous receiver transmitter
USART8
Universal synchronous asynchronous receiver transmitter
USBPHYC
USBPHYC
VREFBUF
VREFBUF
WWDG1
WWDG1

Enums§

Interrupt
Enumeration of all the interrupts.

Constants§

NVIC_PRIO_BITS
Number available in the NVIC for configuring priority

Attribute Macros§

interrupt