Module stm32mp1::stm32mp157::tim6
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TIM6
Modules
TIM6 auto-reload register
As the bits BK2BID, BKBID, BK2DSRM, BKDSRM, BK2P, BK2E, BK2F[3:0], BKF[3:0], AOE, BKP, BKE, OSSI, OSSR and DTG[7:0] can be write-locked depending on the LOCK configuration, it can be necessary to configure all of them during the first write access to the TIMx_BDTR register.
TIM6 capture/compare enable register
The same register can be used for input capture mode (this section) or for output compare mode (next section). The direction of a channel is defined by configuring the corresponding CCxS bits. All the other bits of this register have a different function for input capture and for output compare modes. It is possible to combine both modes independently (e.g. channel 1 in input capture mode and channel 2 in output compare mode). Input capture mode:
The same register can be used for input capture mode (this section) or for output compare mode (next section). The direction of a channel is defined by configuring the corresponding CCxS bits. All the other bits of this register have a different function for input capture and for output compare modes. It is possible to combine both modes independently (e.g. channel 1 in input capture mode and channel 2 in output compare mode). Input capture mode:
The channels 5 and 6 can only be configured in output. Output compare mode:
TIM6 capture/compare register 1
TIM6 capture/compare register 2
TIM6 capture/compare register 3
TIM6 capture/compare register 4
TIM6 capture/compare register 5
TIM6 capture/compare register 6
TIM6 counter
TIM6 control register 1
TIM6 control register 2
TIM6 DMA control register
TIM6 DMA/interrupt enable register
TIM6 DMA address for full transfer
TIM6 event generation register
TIM6 prescaler
TIM6 repetition counter register
TIM6 slave mode control register
TIM6 status register
Structs
Register block
Type Definitions
TIM6_ARR register accessor: an alias for Reg<TIM6_ARR_SPEC>
TIM6_BDTR register accessor: an alias for Reg<TIM6_BDTR_SPEC>
TIM6_CCER register accessor: an alias for Reg<TIM6_CCER_SPEC>
TIM6_CCMR1ALTERNATE6 register accessor: an alias for Reg<TIM6_CCMR1ALTERNATE6_SPEC>
TIM6_CCMR2ALTERNATE22 register accessor: an alias for Reg<TIM6_CCMR2ALTERNATE22_SPEC>
TIM6_CCMR3 register accessor: an alias for Reg<TIM6_CCMR3_SPEC>
TIM6_CCR1 register accessor: an alias for Reg<TIM6_CCR1_SPEC>
TIM6_CCR2 register accessor: an alias for Reg<TIM6_CCR2_SPEC>
TIM6_CCR3 register accessor: an alias for Reg<TIM6_CCR3_SPEC>
TIM6_CCR4 register accessor: an alias for Reg<TIM6_CCR4_SPEC>
TIM6_CCR5 register accessor: an alias for Reg<TIM6_CCR5_SPEC>
TIM6_CCR6 register accessor: an alias for Reg<TIM6_CCR6_SPEC>
TIM6_CNT register accessor: an alias for Reg<TIM6_CNT_SPEC>
TIM6_CR1 register accessor: an alias for Reg<TIM6_CR1_SPEC>
TIM6_CR2 register accessor: an alias for Reg<TIM6_CR2_SPEC>
TIM6_DCR register accessor: an alias for Reg<TIM6_DCR_SPEC>
TIM6_DIER register accessor: an alias for Reg<TIM6_DIER_SPEC>
TIM6_DMAR register accessor: an alias for Reg<TIM6_DMAR_SPEC>
TIM6_EGR register accessor: an alias for Reg<TIM6_EGR_SPEC>
TIM6_PSC register accessor: an alias for Reg<TIM6_PSC_SPEC>
TIM6_RCR register accessor: an alias for Reg<TIM6_RCR_SPEC>
TIM6_SMCR register accessor: an alias for Reg<TIM6_SMCR_SPEC>
TIM6_SR register accessor: an alias for Reg<TIM6_SR_SPEC>