#[doc = "Register `CR` reader"]
pub struct R(crate::R<CR_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<CR_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<CR_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<CR_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `CR` writer"]
pub struct W(crate::W<CR_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<CR_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<CR_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<CR_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `PLLSAI2RDY` reader - SAI2 PLL clock ready flag"]
pub struct PLLSAI2RDY_R(crate::FieldReader<bool, bool>);
impl PLLSAI2RDY_R {
pub(crate) fn new(bits: bool) -> Self {
PLLSAI2RDY_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for PLLSAI2RDY_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `PLLSAI2ON` reader - SAI2 PLL enable"]
pub struct PLLSAI2ON_R(crate::FieldReader<bool, bool>);
impl PLLSAI2ON_R {
pub(crate) fn new(bits: bool) -> Self {
PLLSAI2ON_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for PLLSAI2ON_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `PLLSAI2ON` writer - SAI2 PLL enable"]
pub struct PLLSAI2ON_W<'a> {
w: &'a mut W,
}
impl<'a> PLLSAI2ON_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 28)) | ((value as u32 & 0x01) << 28);
self.w
}
}
#[doc = "Field `PLLSAI1RDY` reader - SAI1 PLL clock ready flag"]
pub struct PLLSAI1RDY_R(crate::FieldReader<bool, bool>);
impl PLLSAI1RDY_R {
pub(crate) fn new(bits: bool) -> Self {
PLLSAI1RDY_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for PLLSAI1RDY_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `PLLSAI1ON` reader - SAI1 PLL enable"]
pub struct PLLSAI1ON_R(crate::FieldReader<bool, bool>);
impl PLLSAI1ON_R {
pub(crate) fn new(bits: bool) -> Self {
PLLSAI1ON_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for PLLSAI1ON_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `PLLSAI1ON` writer - SAI1 PLL enable"]
pub struct PLLSAI1ON_W<'a> {
w: &'a mut W,
}
impl<'a> PLLSAI1ON_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 26)) | ((value as u32 & 0x01) << 26);
self.w
}
}
#[doc = "Field `PLLRDY` reader - Main PLL clock ready flag"]
pub struct PLLRDY_R(crate::FieldReader<bool, bool>);
impl PLLRDY_R {
pub(crate) fn new(bits: bool) -> Self {
PLLRDY_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for PLLRDY_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `PLLON` reader - Main PLL enable"]
pub struct PLLON_R(crate::FieldReader<bool, bool>);
impl PLLON_R {
pub(crate) fn new(bits: bool) -> Self {
PLLON_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for PLLON_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `PLLON` writer - Main PLL enable"]
pub struct PLLON_W<'a> {
w: &'a mut W,
}
impl<'a> PLLON_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 24)) | ((value as u32 & 0x01) << 24);
self.w
}
}
#[doc = "Field `CSSON` writer - Clock security system enable"]
pub struct CSSON_W<'a> {
w: &'a mut W,
}
impl<'a> CSSON_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 19)) | ((value as u32 & 0x01) << 19);
self.w
}
}
#[doc = "Field `HSEBYP` reader - HSE crystal oscillator bypass"]
pub struct HSEBYP_R(crate::FieldReader<bool, bool>);
impl HSEBYP_R {
pub(crate) fn new(bits: bool) -> Self {
HSEBYP_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for HSEBYP_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `HSEBYP` writer - HSE crystal oscillator bypass"]
pub struct HSEBYP_W<'a> {
w: &'a mut W,
}
impl<'a> HSEBYP_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 18)) | ((value as u32 & 0x01) << 18);
self.w
}
}
#[doc = "Field `HSERDY` reader - HSE clock ready flag"]
pub struct HSERDY_R(crate::FieldReader<bool, bool>);
impl HSERDY_R {
pub(crate) fn new(bits: bool) -> Self {
HSERDY_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for HSERDY_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `HSEON` reader - HSE clock enable"]
pub struct HSEON_R(crate::FieldReader<bool, bool>);
impl HSEON_R {
pub(crate) fn new(bits: bool) -> Self {
HSEON_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for HSEON_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `HSEON` writer - HSE clock enable"]
pub struct HSEON_W<'a> {
w: &'a mut W,
}
impl<'a> HSEON_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 16)) | ((value as u32 & 0x01) << 16);
self.w
}
}
#[doc = "Field `HSIASFS` reader - HSI automatic start from Stop"]
pub struct HSIASFS_R(crate::FieldReader<bool, bool>);
impl HSIASFS_R {
pub(crate) fn new(bits: bool) -> Self {
HSIASFS_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for HSIASFS_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `HSIASFS` writer - HSI automatic start from Stop"]
pub struct HSIASFS_W<'a> {
w: &'a mut W,
}
impl<'a> HSIASFS_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11);
self.w
}
}
#[doc = "Field `HSIRDY` reader - HSI clock ready flag"]
pub struct HSIRDY_R(crate::FieldReader<bool, bool>);
impl HSIRDY_R {
pub(crate) fn new(bits: bool) -> Self {
HSIRDY_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for HSIRDY_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `HSIKERON` reader - HSI always enable for peripheral kernels"]
pub struct HSIKERON_R(crate::FieldReader<bool, bool>);
impl HSIKERON_R {
pub(crate) fn new(bits: bool) -> Self {
HSIKERON_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for HSIKERON_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `HSIKERON` writer - HSI always enable for peripheral kernels"]
pub struct HSIKERON_W<'a> {
w: &'a mut W,
}
impl<'a> HSIKERON_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9);
self.w
}
}
#[doc = "Field `HSION` reader - HSI clock enable"]
pub struct HSION_R(crate::FieldReader<bool, bool>);
impl HSION_R {
pub(crate) fn new(bits: bool) -> Self {
HSION_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for HSION_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `HSION` writer - HSI clock enable"]
pub struct HSION_W<'a> {
w: &'a mut W,
}
impl<'a> HSION_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8);
self.w
}
}
#[doc = "MSI clock ranges\n\nValue on reset: 6"]
#[derive(Clone, Copy, Debug, PartialEq)]
#[repr(u8)]
pub enum MSIRANGE_A {
#[doc = "0: range 0 around 100 kHz"]
RANGE100K = 0,
#[doc = "1: range 1 around 200 kHz"]
RANGE200K = 1,
#[doc = "2: range 2 around 400 kHz"]
RANGE400K = 2,
#[doc = "3: range 3 around 800 kHz"]
RANGE800K = 3,
#[doc = "4: range 4 around 1 MHz"]
RANGE1M = 4,
#[doc = "5: range 5 around 2 MHz"]
RANGE2M = 5,
#[doc = "6: range 6 around 4 MHz"]
RANGE4M = 6,
#[doc = "7: range 7 around 8 MHz"]
RANGE8M = 7,
#[doc = "8: range 8 around 16 MHz"]
RANGE16M = 8,
#[doc = "9: range 9 around 24 MHz"]
RANGE24M = 9,
#[doc = "10: range 10 around 32 MHz"]
RANGE32M = 10,
#[doc = "11: range 11 around 48 MHz"]
RANGE48M = 11,
}
impl From<MSIRANGE_A> for u8 {
#[inline(always)]
fn from(variant: MSIRANGE_A) -> Self {
variant as _
}
}
#[doc = "Field `MSIRANGE` reader - MSI clock ranges"]
pub struct MSIRANGE_R(crate::FieldReader<u8, MSIRANGE_A>);
impl MSIRANGE_R {
pub(crate) fn new(bits: u8) -> Self {
MSIRANGE_R(crate::FieldReader::new(bits))
}
#[doc = r"Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> Option<MSIRANGE_A> {
match self.bits {
0 => Some(MSIRANGE_A::RANGE100K),
1 => Some(MSIRANGE_A::RANGE200K),
2 => Some(MSIRANGE_A::RANGE400K),
3 => Some(MSIRANGE_A::RANGE800K),
4 => Some(MSIRANGE_A::RANGE1M),
5 => Some(MSIRANGE_A::RANGE2M),
6 => Some(MSIRANGE_A::RANGE4M),
7 => Some(MSIRANGE_A::RANGE8M),
8 => Some(MSIRANGE_A::RANGE16M),
9 => Some(MSIRANGE_A::RANGE24M),
10 => Some(MSIRANGE_A::RANGE32M),
11 => Some(MSIRANGE_A::RANGE48M),
_ => None,
}
}
#[doc = "Checks if the value of the field is `RANGE100K`"]
#[inline(always)]
pub fn is_range100k(&self) -> bool {
**self == MSIRANGE_A::RANGE100K
}
#[doc = "Checks if the value of the field is `RANGE200K`"]
#[inline(always)]
pub fn is_range200k(&self) -> bool {
**self == MSIRANGE_A::RANGE200K
}
#[doc = "Checks if the value of the field is `RANGE400K`"]
#[inline(always)]
pub fn is_range400k(&self) -> bool {
**self == MSIRANGE_A::RANGE400K
}
#[doc = "Checks if the value of the field is `RANGE800K`"]
#[inline(always)]
pub fn is_range800k(&self) -> bool {
**self == MSIRANGE_A::RANGE800K
}
#[doc = "Checks if the value of the field is `RANGE1M`"]
#[inline(always)]
pub fn is_range1m(&self) -> bool {
**self == MSIRANGE_A::RANGE1M
}
#[doc = "Checks if the value of the field is `RANGE2M`"]
#[inline(always)]
pub fn is_range2m(&self) -> bool {
**self == MSIRANGE_A::RANGE2M
}
#[doc = "Checks if the value of the field is `RANGE4M`"]
#[inline(always)]
pub fn is_range4m(&self) -> bool {
**self == MSIRANGE_A::RANGE4M
}
#[doc = "Checks if the value of the field is `RANGE8M`"]
#[inline(always)]
pub fn is_range8m(&self) -> bool {
**self == MSIRANGE_A::RANGE8M
}
#[doc = "Checks if the value of the field is `RANGE16M`"]
#[inline(always)]
pub fn is_range16m(&self) -> bool {
**self == MSIRANGE_A::RANGE16M
}
#[doc = "Checks if the value of the field is `RANGE24M`"]
#[inline(always)]
pub fn is_range24m(&self) -> bool {
**self == MSIRANGE_A::RANGE24M
}
#[doc = "Checks if the value of the field is `RANGE32M`"]
#[inline(always)]
pub fn is_range32m(&self) -> bool {
**self == MSIRANGE_A::RANGE32M
}
#[doc = "Checks if the value of the field is `RANGE48M`"]
#[inline(always)]
pub fn is_range48m(&self) -> bool {
**self == MSIRANGE_A::RANGE48M
}
}
impl core::ops::Deref for MSIRANGE_R {
type Target = crate::FieldReader<u8, MSIRANGE_A>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `MSIRANGE` writer - MSI clock ranges"]
pub struct MSIRANGE_W<'a> {
w: &'a mut W,
}
impl<'a> MSIRANGE_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: MSIRANGE_A) -> &'a mut W {
unsafe { self.bits(variant.into()) }
}
#[doc = "range 0 around 100 kHz"]
#[inline(always)]
pub fn range100k(self) -> &'a mut W {
self.variant(MSIRANGE_A::RANGE100K)
}
#[doc = "range 1 around 200 kHz"]
#[inline(always)]
pub fn range200k(self) -> &'a mut W {
self.variant(MSIRANGE_A::RANGE200K)
}
#[doc = "range 2 around 400 kHz"]
#[inline(always)]
pub fn range400k(self) -> &'a mut W {
self.variant(MSIRANGE_A::RANGE400K)
}
#[doc = "range 3 around 800 kHz"]
#[inline(always)]
pub fn range800k(self) -> &'a mut W {
self.variant(MSIRANGE_A::RANGE800K)
}
#[doc = "range 4 around 1 MHz"]
#[inline(always)]
pub fn range1m(self) -> &'a mut W {
self.variant(MSIRANGE_A::RANGE1M)
}
#[doc = "range 5 around 2 MHz"]
#[inline(always)]
pub fn range2m(self) -> &'a mut W {
self.variant(MSIRANGE_A::RANGE2M)
}
#[doc = "range 6 around 4 MHz"]
#[inline(always)]
pub fn range4m(self) -> &'a mut W {
self.variant(MSIRANGE_A::RANGE4M)
}
#[doc = "range 7 around 8 MHz"]
#[inline(always)]
pub fn range8m(self) -> &'a mut W {
self.variant(MSIRANGE_A::RANGE8M)
}
#[doc = "range 8 around 16 MHz"]
#[inline(always)]
pub fn range16m(self) -> &'a mut W {
self.variant(MSIRANGE_A::RANGE16M)
}
#[doc = "range 9 around 24 MHz"]
#[inline(always)]
pub fn range24m(self) -> &'a mut W {
self.variant(MSIRANGE_A::RANGE24M)
}
#[doc = "range 10 around 32 MHz"]
#[inline(always)]
pub fn range32m(self) -> &'a mut W {
self.variant(MSIRANGE_A::RANGE32M)
}
#[doc = "range 11 around 48 MHz"]
#[inline(always)]
pub fn range48m(self) -> &'a mut W {
self.variant(MSIRANGE_A::RANGE48M)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x0f << 4)) | ((value as u32 & 0x0f) << 4);
self.w
}
}
#[doc = "Field `MSIRGSEL` writer - MSI clock range selection"]
pub struct MSIRGSEL_W<'a> {
w: &'a mut W,
}
impl<'a> MSIRGSEL_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3);
self.w
}
}
#[doc = "Field `MSIPLLEN` reader - MSI clock PLL enable"]
pub struct MSIPLLEN_R(crate::FieldReader<bool, bool>);
impl MSIPLLEN_R {
pub(crate) fn new(bits: bool) -> Self {
MSIPLLEN_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for MSIPLLEN_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `MSIPLLEN` writer - MSI clock PLL enable"]
pub struct MSIPLLEN_W<'a> {
w: &'a mut W,
}
impl<'a> MSIPLLEN_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2);
self.w
}
}
#[doc = "Field `MSIRDY` reader - MSI clock ready flag"]
pub struct MSIRDY_R(crate::FieldReader<bool, bool>);
impl MSIRDY_R {
pub(crate) fn new(bits: bool) -> Self {
MSIRDY_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for MSIRDY_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `MSION` reader - MSI clock enable"]
pub struct MSION_R(crate::FieldReader<bool, bool>);
impl MSION_R {
pub(crate) fn new(bits: bool) -> Self {
MSION_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for MSION_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `MSION` writer - MSI clock enable"]
pub struct MSION_W<'a> {
w: &'a mut W,
}
impl<'a> MSION_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01);
self.w
}
}
impl R {
#[doc = "Bit 29 - SAI2 PLL clock ready flag"]
#[inline(always)]
pub fn pllsai2rdy(&self) -> PLLSAI2RDY_R {
PLLSAI2RDY_R::new(((self.bits >> 29) & 0x01) != 0)
}
#[doc = "Bit 28 - SAI2 PLL enable"]
#[inline(always)]
pub fn pllsai2on(&self) -> PLLSAI2ON_R {
PLLSAI2ON_R::new(((self.bits >> 28) & 0x01) != 0)
}
#[doc = "Bit 27 - SAI1 PLL clock ready flag"]
#[inline(always)]
pub fn pllsai1rdy(&self) -> PLLSAI1RDY_R {
PLLSAI1RDY_R::new(((self.bits >> 27) & 0x01) != 0)
}
#[doc = "Bit 26 - SAI1 PLL enable"]
#[inline(always)]
pub fn pllsai1on(&self) -> PLLSAI1ON_R {
PLLSAI1ON_R::new(((self.bits >> 26) & 0x01) != 0)
}
#[doc = "Bit 25 - Main PLL clock ready flag"]
#[inline(always)]
pub fn pllrdy(&self) -> PLLRDY_R {
PLLRDY_R::new(((self.bits >> 25) & 0x01) != 0)
}
#[doc = "Bit 24 - Main PLL enable"]
#[inline(always)]
pub fn pllon(&self) -> PLLON_R {
PLLON_R::new(((self.bits >> 24) & 0x01) != 0)
}
#[doc = "Bit 18 - HSE crystal oscillator bypass"]
#[inline(always)]
pub fn hsebyp(&self) -> HSEBYP_R {
HSEBYP_R::new(((self.bits >> 18) & 0x01) != 0)
}
#[doc = "Bit 17 - HSE clock ready flag"]
#[inline(always)]
pub fn hserdy(&self) -> HSERDY_R {
HSERDY_R::new(((self.bits >> 17) & 0x01) != 0)
}
#[doc = "Bit 16 - HSE clock enable"]
#[inline(always)]
pub fn hseon(&self) -> HSEON_R {
HSEON_R::new(((self.bits >> 16) & 0x01) != 0)
}
#[doc = "Bit 11 - HSI automatic start from Stop"]
#[inline(always)]
pub fn hsiasfs(&self) -> HSIASFS_R {
HSIASFS_R::new(((self.bits >> 11) & 0x01) != 0)
}
#[doc = "Bit 10 - HSI clock ready flag"]
#[inline(always)]
pub fn hsirdy(&self) -> HSIRDY_R {
HSIRDY_R::new(((self.bits >> 10) & 0x01) != 0)
}
#[doc = "Bit 9 - HSI always enable for peripheral kernels"]
#[inline(always)]
pub fn hsikeron(&self) -> HSIKERON_R {
HSIKERON_R::new(((self.bits >> 9) & 0x01) != 0)
}
#[doc = "Bit 8 - HSI clock enable"]
#[inline(always)]
pub fn hsion(&self) -> HSION_R {
HSION_R::new(((self.bits >> 8) & 0x01) != 0)
}
#[doc = "Bits 4:7 - MSI clock ranges"]
#[inline(always)]
pub fn msirange(&self) -> MSIRANGE_R {
MSIRANGE_R::new(((self.bits >> 4) & 0x0f) as u8)
}
#[doc = "Bit 2 - MSI clock PLL enable"]
#[inline(always)]
pub fn msipllen(&self) -> MSIPLLEN_R {
MSIPLLEN_R::new(((self.bits >> 2) & 0x01) != 0)
}
#[doc = "Bit 1 - MSI clock ready flag"]
#[inline(always)]
pub fn msirdy(&self) -> MSIRDY_R {
MSIRDY_R::new(((self.bits >> 1) & 0x01) != 0)
}
#[doc = "Bit 0 - MSI clock enable"]
#[inline(always)]
pub fn msion(&self) -> MSION_R {
MSION_R::new((self.bits & 0x01) != 0)
}
}
impl W {
#[doc = "Bit 28 - SAI2 PLL enable"]
#[inline(always)]
pub fn pllsai2on(&mut self) -> PLLSAI2ON_W {
PLLSAI2ON_W { w: self }
}
#[doc = "Bit 26 - SAI1 PLL enable"]
#[inline(always)]
pub fn pllsai1on(&mut self) -> PLLSAI1ON_W {
PLLSAI1ON_W { w: self }
}
#[doc = "Bit 24 - Main PLL enable"]
#[inline(always)]
pub fn pllon(&mut self) -> PLLON_W {
PLLON_W { w: self }
}
#[doc = "Bit 19 - Clock security system enable"]
#[inline(always)]
pub fn csson(&mut self) -> CSSON_W {
CSSON_W { w: self }
}
#[doc = "Bit 18 - HSE crystal oscillator bypass"]
#[inline(always)]
pub fn hsebyp(&mut self) -> HSEBYP_W {
HSEBYP_W { w: self }
}
#[doc = "Bit 16 - HSE clock enable"]
#[inline(always)]
pub fn hseon(&mut self) -> HSEON_W {
HSEON_W { w: self }
}
#[doc = "Bit 11 - HSI automatic start from Stop"]
#[inline(always)]
pub fn hsiasfs(&mut self) -> HSIASFS_W {
HSIASFS_W { w: self }
}
#[doc = "Bit 9 - HSI always enable for peripheral kernels"]
#[inline(always)]
pub fn hsikeron(&mut self) -> HSIKERON_W {
HSIKERON_W { w: self }
}
#[doc = "Bit 8 - HSI clock enable"]
#[inline(always)]
pub fn hsion(&mut self) -> HSION_W {
HSION_W { w: self }
}
#[doc = "Bits 4:7 - MSI clock ranges"]
#[inline(always)]
pub fn msirange(&mut self) -> MSIRANGE_W {
MSIRANGE_W { w: self }
}
#[doc = "Bit 3 - MSI clock range selection"]
#[inline(always)]
pub fn msirgsel(&mut self) -> MSIRGSEL_W {
MSIRGSEL_W { w: self }
}
#[doc = "Bit 2 - MSI clock PLL enable"]
#[inline(always)]
pub fn msipllen(&mut self) -> MSIPLLEN_W {
MSIPLLEN_W { w: self }
}
#[doc = "Bit 0 - MSI clock enable"]
#[inline(always)]
pub fn msion(&mut self) -> MSION_W {
MSION_W { w: self }
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "Clock control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cr](index.html) module"]
pub struct CR_SPEC;
impl crate::RegisterSpec for CR_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [cr::R](R) reader structure"]
impl crate::Readable for CR_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [cr::W](W) writer structure"]
impl crate::Writable for CR_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets CR to value 0x63"]
impl crate::Resettable for CR_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0x63
}
}