#[doc = "Register `AHB2SMENR` reader"]
pub struct R(crate::R<AHB2SMENR_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<AHB2SMENR_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<AHB2SMENR_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<AHB2SMENR_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `AHB2SMENR` writer"]
pub struct W(crate::W<AHB2SMENR_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<AHB2SMENR_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<AHB2SMENR_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<AHB2SMENR_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `RNGSMEN` reader - Random Number Generator clocks enable during Sleep and Stop modes"]
pub struct RNGSMEN_R(crate::FieldReader<bool, bool>);
impl RNGSMEN_R {
pub(crate) fn new(bits: bool) -> Self {
RNGSMEN_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for RNGSMEN_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `RNGSMEN` writer - Random Number Generator clocks enable during Sleep and Stop modes"]
pub struct RNGSMEN_W<'a> {
w: &'a mut W,
}
impl<'a> RNGSMEN_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 18)) | ((value as u32 & 0x01) << 18);
self.w
}
}
#[doc = "Field `AESSMEN` reader - AES accelerator clocks enable during Sleep and Stop modes"]
pub struct AESSMEN_R(crate::FieldReader<bool, bool>);
impl AESSMEN_R {
pub(crate) fn new(bits: bool) -> Self {
AESSMEN_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for AESSMEN_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `AESSMEN` writer - AES accelerator clocks enable during Sleep and Stop modes"]
pub struct AESSMEN_W<'a> {
w: &'a mut W,
}
impl<'a> AESSMEN_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 16)) | ((value as u32 & 0x01) << 16);
self.w
}
}
#[doc = "Field `ADCFSSMEN` reader - ADC clocks enable during Sleep and Stop modes"]
pub struct ADCFSSMEN_R(crate::FieldReader<bool, bool>);
impl ADCFSSMEN_R {
pub(crate) fn new(bits: bool) -> Self {
ADCFSSMEN_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for ADCFSSMEN_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `ADCFSSMEN` writer - ADC clocks enable during Sleep and Stop modes"]
pub struct ADCFSSMEN_W<'a> {
w: &'a mut W,
}
impl<'a> ADCFSSMEN_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13);
self.w
}
}
#[doc = "Field `OTGFSSMEN` reader - OTG full speed clocks enable during Sleep and Stop modes"]
pub struct OTGFSSMEN_R(crate::FieldReader<bool, bool>);
impl OTGFSSMEN_R {
pub(crate) fn new(bits: bool) -> Self {
OTGFSSMEN_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for OTGFSSMEN_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `OTGFSSMEN` writer - OTG full speed clocks enable during Sleep and Stop modes"]
pub struct OTGFSSMEN_W<'a> {
w: &'a mut W,
}
impl<'a> OTGFSSMEN_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12);
self.w
}
}
#[doc = "Field `SRAM2SMEN` reader - SRAM2 interface clocks enable during Sleep and Stop modes"]
pub struct SRAM2SMEN_R(crate::FieldReader<bool, bool>);
impl SRAM2SMEN_R {
pub(crate) fn new(bits: bool) -> Self {
SRAM2SMEN_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for SRAM2SMEN_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `SRAM2SMEN` writer - SRAM2 interface clocks enable during Sleep and Stop modes"]
pub struct SRAM2SMEN_W<'a> {
w: &'a mut W,
}
impl<'a> SRAM2SMEN_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9);
self.w
}
}
#[doc = "Field `GPIOHSMEN` reader - IO port H clocks enable during Sleep and Stop modes"]
pub struct GPIOHSMEN_R(crate::FieldReader<bool, bool>);
impl GPIOHSMEN_R {
pub(crate) fn new(bits: bool) -> Self {
GPIOHSMEN_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for GPIOHSMEN_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `GPIOHSMEN` writer - IO port H clocks enable during Sleep and Stop modes"]
pub struct GPIOHSMEN_W<'a> {
w: &'a mut W,
}
impl<'a> GPIOHSMEN_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7);
self.w
}
}
#[doc = "Field `GPIOGSMEN` reader - IO port G clocks enable during Sleep and Stop modes"]
pub struct GPIOGSMEN_R(crate::FieldReader<bool, bool>);
impl GPIOGSMEN_R {
pub(crate) fn new(bits: bool) -> Self {
GPIOGSMEN_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for GPIOGSMEN_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `GPIOGSMEN` writer - IO port G clocks enable during Sleep and Stop modes"]
pub struct GPIOGSMEN_W<'a> {
w: &'a mut W,
}
impl<'a> GPIOGSMEN_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6);
self.w
}
}
#[doc = "Field `GPIOFSMEN` reader - IO port F clocks enable during Sleep and Stop modes"]
pub struct GPIOFSMEN_R(crate::FieldReader<bool, bool>);
impl GPIOFSMEN_R {
pub(crate) fn new(bits: bool) -> Self {
GPIOFSMEN_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for GPIOFSMEN_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `GPIOFSMEN` writer - IO port F clocks enable during Sleep and Stop modes"]
pub struct GPIOFSMEN_W<'a> {
w: &'a mut W,
}
impl<'a> GPIOFSMEN_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5);
self.w
}
}
#[doc = "Field `GPIOESMEN` reader - IO port E clocks enable during Sleep and Stop modes"]
pub struct GPIOESMEN_R(crate::FieldReader<bool, bool>);
impl GPIOESMEN_R {
pub(crate) fn new(bits: bool) -> Self {
GPIOESMEN_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for GPIOESMEN_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `GPIOESMEN` writer - IO port E clocks enable during Sleep and Stop modes"]
pub struct GPIOESMEN_W<'a> {
w: &'a mut W,
}
impl<'a> GPIOESMEN_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4);
self.w
}
}
#[doc = "Field `GPIODSMEN` reader - IO port D clocks enable during Sleep and Stop modes"]
pub struct GPIODSMEN_R(crate::FieldReader<bool, bool>);
impl GPIODSMEN_R {
pub(crate) fn new(bits: bool) -> Self {
GPIODSMEN_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for GPIODSMEN_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `GPIODSMEN` writer - IO port D clocks enable during Sleep and Stop modes"]
pub struct GPIODSMEN_W<'a> {
w: &'a mut W,
}
impl<'a> GPIODSMEN_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3);
self.w
}
}
#[doc = "Field `GPIOCSMEN` reader - IO port C clocks enable during Sleep and Stop modes"]
pub struct GPIOCSMEN_R(crate::FieldReader<bool, bool>);
impl GPIOCSMEN_R {
pub(crate) fn new(bits: bool) -> Self {
GPIOCSMEN_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for GPIOCSMEN_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `GPIOCSMEN` writer - IO port C clocks enable during Sleep and Stop modes"]
pub struct GPIOCSMEN_W<'a> {
w: &'a mut W,
}
impl<'a> GPIOCSMEN_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2);
self.w
}
}
#[doc = "Field `GPIOBSMEN` reader - IO port B clocks enable during Sleep and Stop modes"]
pub struct GPIOBSMEN_R(crate::FieldReader<bool, bool>);
impl GPIOBSMEN_R {
pub(crate) fn new(bits: bool) -> Self {
GPIOBSMEN_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for GPIOBSMEN_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `GPIOBSMEN` writer - IO port B clocks enable during Sleep and Stop modes"]
pub struct GPIOBSMEN_W<'a> {
w: &'a mut W,
}
impl<'a> GPIOBSMEN_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1);
self.w
}
}
#[doc = "Field `GPIOASMEN` reader - IO port A clocks enable during Sleep and Stop modes"]
pub struct GPIOASMEN_R(crate::FieldReader<bool, bool>);
impl GPIOASMEN_R {
pub(crate) fn new(bits: bool) -> Self {
GPIOASMEN_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for GPIOASMEN_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `GPIOASMEN` writer - IO port A clocks enable during Sleep and Stop modes"]
pub struct GPIOASMEN_W<'a> {
w: &'a mut W,
}
impl<'a> GPIOASMEN_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01);
self.w
}
}
impl R {
#[doc = "Bit 18 - Random Number Generator clocks enable during Sleep and Stop modes"]
#[inline(always)]
pub fn rngsmen(&self) -> RNGSMEN_R {
RNGSMEN_R::new(((self.bits >> 18) & 0x01) != 0)
}
#[doc = "Bit 16 - AES accelerator clocks enable during Sleep and Stop modes"]
#[inline(always)]
pub fn aessmen(&self) -> AESSMEN_R {
AESSMEN_R::new(((self.bits >> 16) & 0x01) != 0)
}
#[doc = "Bit 13 - ADC clocks enable during Sleep and Stop modes"]
#[inline(always)]
pub fn adcfssmen(&self) -> ADCFSSMEN_R {
ADCFSSMEN_R::new(((self.bits >> 13) & 0x01) != 0)
}
#[doc = "Bit 12 - OTG full speed clocks enable during Sleep and Stop modes"]
#[inline(always)]
pub fn otgfssmen(&self) -> OTGFSSMEN_R {
OTGFSSMEN_R::new(((self.bits >> 12) & 0x01) != 0)
}
#[doc = "Bit 9 - SRAM2 interface clocks enable during Sleep and Stop modes"]
#[inline(always)]
pub fn sram2smen(&self) -> SRAM2SMEN_R {
SRAM2SMEN_R::new(((self.bits >> 9) & 0x01) != 0)
}
#[doc = "Bit 7 - IO port H clocks enable during Sleep and Stop modes"]
#[inline(always)]
pub fn gpiohsmen(&self) -> GPIOHSMEN_R {
GPIOHSMEN_R::new(((self.bits >> 7) & 0x01) != 0)
}
#[doc = "Bit 6 - IO port G clocks enable during Sleep and Stop modes"]
#[inline(always)]
pub fn gpiogsmen(&self) -> GPIOGSMEN_R {
GPIOGSMEN_R::new(((self.bits >> 6) & 0x01) != 0)
}
#[doc = "Bit 5 - IO port F clocks enable during Sleep and Stop modes"]
#[inline(always)]
pub fn gpiofsmen(&self) -> GPIOFSMEN_R {
GPIOFSMEN_R::new(((self.bits >> 5) & 0x01) != 0)
}
#[doc = "Bit 4 - IO port E clocks enable during Sleep and Stop modes"]
#[inline(always)]
pub fn gpioesmen(&self) -> GPIOESMEN_R {
GPIOESMEN_R::new(((self.bits >> 4) & 0x01) != 0)
}
#[doc = "Bit 3 - IO port D clocks enable during Sleep and Stop modes"]
#[inline(always)]
pub fn gpiodsmen(&self) -> GPIODSMEN_R {
GPIODSMEN_R::new(((self.bits >> 3) & 0x01) != 0)
}
#[doc = "Bit 2 - IO port C clocks enable during Sleep and Stop modes"]
#[inline(always)]
pub fn gpiocsmen(&self) -> GPIOCSMEN_R {
GPIOCSMEN_R::new(((self.bits >> 2) & 0x01) != 0)
}
#[doc = "Bit 1 - IO port B clocks enable during Sleep and Stop modes"]
#[inline(always)]
pub fn gpiobsmen(&self) -> GPIOBSMEN_R {
GPIOBSMEN_R::new(((self.bits >> 1) & 0x01) != 0)
}
#[doc = "Bit 0 - IO port A clocks enable during Sleep and Stop modes"]
#[inline(always)]
pub fn gpioasmen(&self) -> GPIOASMEN_R {
GPIOASMEN_R::new((self.bits & 0x01) != 0)
}
}
impl W {
#[doc = "Bit 18 - Random Number Generator clocks enable during Sleep and Stop modes"]
#[inline(always)]
pub fn rngsmen(&mut self) -> RNGSMEN_W {
RNGSMEN_W { w: self }
}
#[doc = "Bit 16 - AES accelerator clocks enable during Sleep and Stop modes"]
#[inline(always)]
pub fn aessmen(&mut self) -> AESSMEN_W {
AESSMEN_W { w: self }
}
#[doc = "Bit 13 - ADC clocks enable during Sleep and Stop modes"]
#[inline(always)]
pub fn adcfssmen(&mut self) -> ADCFSSMEN_W {
ADCFSSMEN_W { w: self }
}
#[doc = "Bit 12 - OTG full speed clocks enable during Sleep and Stop modes"]
#[inline(always)]
pub fn otgfssmen(&mut self) -> OTGFSSMEN_W {
OTGFSSMEN_W { w: self }
}
#[doc = "Bit 9 - SRAM2 interface clocks enable during Sleep and Stop modes"]
#[inline(always)]
pub fn sram2smen(&mut self) -> SRAM2SMEN_W {
SRAM2SMEN_W { w: self }
}
#[doc = "Bit 7 - IO port H clocks enable during Sleep and Stop modes"]
#[inline(always)]
pub fn gpiohsmen(&mut self) -> GPIOHSMEN_W {
GPIOHSMEN_W { w: self }
}
#[doc = "Bit 6 - IO port G clocks enable during Sleep and Stop modes"]
#[inline(always)]
pub fn gpiogsmen(&mut self) -> GPIOGSMEN_W {
GPIOGSMEN_W { w: self }
}
#[doc = "Bit 5 - IO port F clocks enable during Sleep and Stop modes"]
#[inline(always)]
pub fn gpiofsmen(&mut self) -> GPIOFSMEN_W {
GPIOFSMEN_W { w: self }
}
#[doc = "Bit 4 - IO port E clocks enable during Sleep and Stop modes"]
#[inline(always)]
pub fn gpioesmen(&mut self) -> GPIOESMEN_W {
GPIOESMEN_W { w: self }
}
#[doc = "Bit 3 - IO port D clocks enable during Sleep and Stop modes"]
#[inline(always)]
pub fn gpiodsmen(&mut self) -> GPIODSMEN_W {
GPIODSMEN_W { w: self }
}
#[doc = "Bit 2 - IO port C clocks enable during Sleep and Stop modes"]
#[inline(always)]
pub fn gpiocsmen(&mut self) -> GPIOCSMEN_W {
GPIOCSMEN_W { w: self }
}
#[doc = "Bit 1 - IO port B clocks enable during Sleep and Stop modes"]
#[inline(always)]
pub fn gpiobsmen(&mut self) -> GPIOBSMEN_W {
GPIOBSMEN_W { w: self }
}
#[doc = "Bit 0 - IO port A clocks enable during Sleep and Stop modes"]
#[inline(always)]
pub fn gpioasmen(&mut self) -> GPIOASMEN_W {
GPIOASMEN_W { w: self }
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "AHB2 peripheral clocks enable in Sleep and Stop modes register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ahb2smenr](index.html) module"]
pub struct AHB2SMENR_SPEC;
impl crate::RegisterSpec for AHB2SMENR_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [ahb2smenr::R](R) reader structure"]
impl crate::Readable for AHB2SMENR_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [ahb2smenr::W](W) writer structure"]
impl crate::Writable for AHB2SMENR_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets AHB2SMENR to value 0x0005_32ff"]
impl crate::Resettable for AHB2SMENR_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0x0005_32ff
}
}