#[doc = "Register `AHB1SMENR` reader"]
pub struct R(crate::R<AHB1SMENR_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<AHB1SMENR_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<AHB1SMENR_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<AHB1SMENR_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `AHB1SMENR` writer"]
pub struct W(crate::W<AHB1SMENR_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<AHB1SMENR_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<AHB1SMENR_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<AHB1SMENR_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `TSCSMEN` reader - Touch Sensing Controller clocks enable during Sleep and Stop modes"]
pub struct TSCSMEN_R(crate::FieldReader<bool, bool>);
impl TSCSMEN_R {
pub(crate) fn new(bits: bool) -> Self {
TSCSMEN_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for TSCSMEN_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `TSCSMEN` writer - Touch Sensing Controller clocks enable during Sleep and Stop modes"]
pub struct TSCSMEN_W<'a> {
w: &'a mut W,
}
impl<'a> TSCSMEN_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 16)) | ((value as u32 & 0x01) << 16);
self.w
}
}
#[doc = "Field `CRCSMEN` reader - CRCSMEN"]
pub struct CRCSMEN_R(crate::FieldReader<bool, bool>);
impl CRCSMEN_R {
pub(crate) fn new(bits: bool) -> Self {
CRCSMEN_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for CRCSMEN_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `CRCSMEN` writer - CRCSMEN"]
pub struct CRCSMEN_W<'a> {
w: &'a mut W,
}
impl<'a> CRCSMEN_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12);
self.w
}
}
#[doc = "Field `SRAM1SMEN` reader - SRAM1 interface clocks enable during Sleep and Stop modes"]
pub struct SRAM1SMEN_R(crate::FieldReader<bool, bool>);
impl SRAM1SMEN_R {
pub(crate) fn new(bits: bool) -> Self {
SRAM1SMEN_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for SRAM1SMEN_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `SRAM1SMEN` writer - SRAM1 interface clocks enable during Sleep and Stop modes"]
pub struct SRAM1SMEN_W<'a> {
w: &'a mut W,
}
impl<'a> SRAM1SMEN_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9);
self.w
}
}
#[doc = "Field `FLASHSMEN` reader - Flash memory interface clocks enable during Sleep and Stop modes"]
pub struct FLASHSMEN_R(crate::FieldReader<bool, bool>);
impl FLASHSMEN_R {
pub(crate) fn new(bits: bool) -> Self {
FLASHSMEN_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for FLASHSMEN_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `FLASHSMEN` writer - Flash memory interface clocks enable during Sleep and Stop modes"]
pub struct FLASHSMEN_W<'a> {
w: &'a mut W,
}
impl<'a> FLASHSMEN_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8);
self.w
}
}
#[doc = "Field `DMA2SMEN` reader - DMA2 clocks enable during Sleep and Stop modes"]
pub struct DMA2SMEN_R(crate::FieldReader<bool, bool>);
impl DMA2SMEN_R {
pub(crate) fn new(bits: bool) -> Self {
DMA2SMEN_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for DMA2SMEN_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `DMA2SMEN` writer - DMA2 clocks enable during Sleep and Stop modes"]
pub struct DMA2SMEN_W<'a> {
w: &'a mut W,
}
impl<'a> DMA2SMEN_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1);
self.w
}
}
#[doc = "Field `DMA1SMEN` reader - DMA1 clocks enable during Sleep and Stop modes"]
pub struct DMA1SMEN_R(crate::FieldReader<bool, bool>);
impl DMA1SMEN_R {
pub(crate) fn new(bits: bool) -> Self {
DMA1SMEN_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for DMA1SMEN_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `DMA1SMEN` writer - DMA1 clocks enable during Sleep and Stop modes"]
pub struct DMA1SMEN_W<'a> {
w: &'a mut W,
}
impl<'a> DMA1SMEN_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01);
self.w
}
}
impl R {
#[doc = "Bit 16 - Touch Sensing Controller clocks enable during Sleep and Stop modes"]
#[inline(always)]
pub fn tscsmen(&self) -> TSCSMEN_R {
TSCSMEN_R::new(((self.bits >> 16) & 0x01) != 0)
}
#[doc = "Bit 12 - CRCSMEN"]
#[inline(always)]
pub fn crcsmen(&self) -> CRCSMEN_R {
CRCSMEN_R::new(((self.bits >> 12) & 0x01) != 0)
}
#[doc = "Bit 9 - SRAM1 interface clocks enable during Sleep and Stop modes"]
#[inline(always)]
pub fn sram1smen(&self) -> SRAM1SMEN_R {
SRAM1SMEN_R::new(((self.bits >> 9) & 0x01) != 0)
}
#[doc = "Bit 8 - Flash memory interface clocks enable during Sleep and Stop modes"]
#[inline(always)]
pub fn flashsmen(&self) -> FLASHSMEN_R {
FLASHSMEN_R::new(((self.bits >> 8) & 0x01) != 0)
}
#[doc = "Bit 1 - DMA2 clocks enable during Sleep and Stop modes"]
#[inline(always)]
pub fn dma2smen(&self) -> DMA2SMEN_R {
DMA2SMEN_R::new(((self.bits >> 1) & 0x01) != 0)
}
#[doc = "Bit 0 - DMA1 clocks enable during Sleep and Stop modes"]
#[inline(always)]
pub fn dma1smen(&self) -> DMA1SMEN_R {
DMA1SMEN_R::new((self.bits & 0x01) != 0)
}
}
impl W {
#[doc = "Bit 16 - Touch Sensing Controller clocks enable during Sleep and Stop modes"]
#[inline(always)]
pub fn tscsmen(&mut self) -> TSCSMEN_W {
TSCSMEN_W { w: self }
}
#[doc = "Bit 12 - CRCSMEN"]
#[inline(always)]
pub fn crcsmen(&mut self) -> CRCSMEN_W {
CRCSMEN_W { w: self }
}
#[doc = "Bit 9 - SRAM1 interface clocks enable during Sleep and Stop modes"]
#[inline(always)]
pub fn sram1smen(&mut self) -> SRAM1SMEN_W {
SRAM1SMEN_W { w: self }
}
#[doc = "Bit 8 - Flash memory interface clocks enable during Sleep and Stop modes"]
#[inline(always)]
pub fn flashsmen(&mut self) -> FLASHSMEN_W {
FLASHSMEN_W { w: self }
}
#[doc = "Bit 1 - DMA2 clocks enable during Sleep and Stop modes"]
#[inline(always)]
pub fn dma2smen(&mut self) -> DMA2SMEN_W {
DMA2SMEN_W { w: self }
}
#[doc = "Bit 0 - DMA1 clocks enable during Sleep and Stop modes"]
#[inline(always)]
pub fn dma1smen(&mut self) -> DMA1SMEN_W {
DMA1SMEN_W { w: self }
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "AHB1 peripheral clocks enable in Sleep and Stop modes register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ahb1smenr](index.html) module"]
pub struct AHB1SMENR_SPEC;
impl crate::RegisterSpec for AHB1SMENR_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [ahb1smenr::R](R) reader structure"]
impl crate::Readable for AHB1SMENR_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [ahb1smenr::W](W) writer structure"]
impl crate::Writable for AHB1SMENR_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets AHB1SMENR to value 0x0001_1303"]
impl crate::Resettable for AHB1SMENR_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0x0001_1303
}
}