#[doc = "Register `APB1ENR1` reader"]
pub struct R(crate::R<APB1ENR1_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<APB1ENR1_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<APB1ENR1_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<APB1ENR1_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `APB1ENR1` writer"]
pub struct W(crate::W<APB1ENR1_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<APB1ENR1_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<APB1ENR1_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<APB1ENR1_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `LPTIM1EN` reader - Low power timer 1 clock enable"]
pub struct LPTIM1EN_R(crate::FieldReader<bool, bool>);
impl LPTIM1EN_R {
pub(crate) fn new(bits: bool) -> Self {
LPTIM1EN_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for LPTIM1EN_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `LPTIM1EN` writer - Low power timer 1 clock enable"]
pub struct LPTIM1EN_W<'a> {
w: &'a mut W,
}
impl<'a> LPTIM1EN_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 31)) | ((value as u32 & 0x01) << 31);
self.w
}
}
#[doc = "Field `OPAMPEN` reader - OPAMP interface clock enable"]
pub struct OPAMPEN_R(crate::FieldReader<bool, bool>);
impl OPAMPEN_R {
pub(crate) fn new(bits: bool) -> Self {
OPAMPEN_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for OPAMPEN_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `OPAMPEN` writer - OPAMP interface clock enable"]
pub struct OPAMPEN_W<'a> {
w: &'a mut W,
}
impl<'a> OPAMPEN_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 30)) | ((value as u32 & 0x01) << 30);
self.w
}
}
#[doc = "Field `DAC1EN` reader - DAC1 interface clock enable"]
pub struct DAC1EN_R(crate::FieldReader<bool, bool>);
impl DAC1EN_R {
pub(crate) fn new(bits: bool) -> Self {
DAC1EN_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for DAC1EN_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `DAC1EN` writer - DAC1 interface clock enable"]
pub struct DAC1EN_W<'a> {
w: &'a mut W,
}
impl<'a> DAC1EN_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 29)) | ((value as u32 & 0x01) << 29);
self.w
}
}
#[doc = "Field `PWREN` reader - Power interface clock enable"]
pub struct PWREN_R(crate::FieldReader<bool, bool>);
impl PWREN_R {
pub(crate) fn new(bits: bool) -> Self {
PWREN_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for PWREN_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `PWREN` writer - Power interface clock enable"]
pub struct PWREN_W<'a> {
w: &'a mut W,
}
impl<'a> PWREN_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 28)) | ((value as u32 & 0x01) << 28);
self.w
}
}
#[doc = "Field `CAN1EN` reader - CAN1 clock enable"]
pub struct CAN1EN_R(crate::FieldReader<bool, bool>);
impl CAN1EN_R {
pub(crate) fn new(bits: bool) -> Self {
CAN1EN_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for CAN1EN_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `CAN1EN` writer - CAN1 clock enable"]
pub struct CAN1EN_W<'a> {
w: &'a mut W,
}
impl<'a> CAN1EN_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 25)) | ((value as u32 & 0x01) << 25);
self.w
}
}
#[doc = "Field `I2C3EN` reader - I2C3 clock enable"]
pub struct I2C3EN_R(crate::FieldReader<bool, bool>);
impl I2C3EN_R {
pub(crate) fn new(bits: bool) -> Self {
I2C3EN_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for I2C3EN_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `I2C3EN` writer - I2C3 clock enable"]
pub struct I2C3EN_W<'a> {
w: &'a mut W,
}
impl<'a> I2C3EN_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 23)) | ((value as u32 & 0x01) << 23);
self.w
}
}
#[doc = "Field `I2C2EN` reader - I2C2 clock enable"]
pub struct I2C2EN_R(crate::FieldReader<bool, bool>);
impl I2C2EN_R {
pub(crate) fn new(bits: bool) -> Self {
I2C2EN_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for I2C2EN_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `I2C2EN` writer - I2C2 clock enable"]
pub struct I2C2EN_W<'a> {
w: &'a mut W,
}
impl<'a> I2C2EN_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 22)) | ((value as u32 & 0x01) << 22);
self.w
}
}
#[doc = "Field `I2C1EN` reader - I2C1 clock enable"]
pub struct I2C1EN_R(crate::FieldReader<bool, bool>);
impl I2C1EN_R {
pub(crate) fn new(bits: bool) -> Self {
I2C1EN_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for I2C1EN_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `I2C1EN` writer - I2C1 clock enable"]
pub struct I2C1EN_W<'a> {
w: &'a mut W,
}
impl<'a> I2C1EN_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 21)) | ((value as u32 & 0x01) << 21);
self.w
}
}
#[doc = "Field `UART5EN` reader - UART5 clock enable"]
pub struct UART5EN_R(crate::FieldReader<bool, bool>);
impl UART5EN_R {
pub(crate) fn new(bits: bool) -> Self {
UART5EN_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for UART5EN_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `UART5EN` writer - UART5 clock enable"]
pub struct UART5EN_W<'a> {
w: &'a mut W,
}
impl<'a> UART5EN_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 20)) | ((value as u32 & 0x01) << 20);
self.w
}
}
#[doc = "Field `UART4EN` reader - UART4 clock enable"]
pub struct UART4EN_R(crate::FieldReader<bool, bool>);
impl UART4EN_R {
pub(crate) fn new(bits: bool) -> Self {
UART4EN_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for UART4EN_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `UART4EN` writer - UART4 clock enable"]
pub struct UART4EN_W<'a> {
w: &'a mut W,
}
impl<'a> UART4EN_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 19)) | ((value as u32 & 0x01) << 19);
self.w
}
}
#[doc = "Field `USART3EN` reader - USART3 clock enable"]
pub struct USART3EN_R(crate::FieldReader<bool, bool>);
impl USART3EN_R {
pub(crate) fn new(bits: bool) -> Self {
USART3EN_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for USART3EN_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `USART3EN` writer - USART3 clock enable"]
pub struct USART3EN_W<'a> {
w: &'a mut W,
}
impl<'a> USART3EN_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 18)) | ((value as u32 & 0x01) << 18);
self.w
}
}
#[doc = "Field `USART2EN` reader - USART2 clock enable"]
pub struct USART2EN_R(crate::FieldReader<bool, bool>);
impl USART2EN_R {
pub(crate) fn new(bits: bool) -> Self {
USART2EN_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for USART2EN_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `USART2EN` writer - USART2 clock enable"]
pub struct USART2EN_W<'a> {
w: &'a mut W,
}
impl<'a> USART2EN_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 17)) | ((value as u32 & 0x01) << 17);
self.w
}
}
#[doc = "Field `SPI3EN` reader - SPI peripheral 3 clock enable"]
pub struct SPI3EN_R(crate::FieldReader<bool, bool>);
impl SPI3EN_R {
pub(crate) fn new(bits: bool) -> Self {
SPI3EN_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for SPI3EN_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `SPI3EN` writer - SPI peripheral 3 clock enable"]
pub struct SPI3EN_W<'a> {
w: &'a mut W,
}
impl<'a> SPI3EN_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15);
self.w
}
}
#[doc = "Field `SPI2EN` reader - SPI2 clock enable"]
pub struct SPI2EN_R(crate::FieldReader<bool, bool>);
impl SPI2EN_R {
pub(crate) fn new(bits: bool) -> Self {
SPI2EN_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for SPI2EN_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `SPI2EN` writer - SPI2 clock enable"]
pub struct SPI2EN_W<'a> {
w: &'a mut W,
}
impl<'a> SPI2EN_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14);
self.w
}
}
#[doc = "Field `WWDGEN` reader - Window watchdog clock enable"]
pub struct WWDGEN_R(crate::FieldReader<bool, bool>);
impl WWDGEN_R {
pub(crate) fn new(bits: bool) -> Self {
WWDGEN_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for WWDGEN_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `WWDGEN` writer - Window watchdog clock enable"]
pub struct WWDGEN_W<'a> {
w: &'a mut W,
}
impl<'a> WWDGEN_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11);
self.w
}
}
#[doc = "Field `LCDEN` reader - LCD clock enable"]
pub struct LCDEN_R(crate::FieldReader<bool, bool>);
impl LCDEN_R {
pub(crate) fn new(bits: bool) -> Self {
LCDEN_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for LCDEN_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `LCDEN` writer - LCD clock enable"]
pub struct LCDEN_W<'a> {
w: &'a mut W,
}
impl<'a> LCDEN_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9);
self.w
}
}
#[doc = "Field `TIM7EN` reader - TIM7 timer clock enable"]
pub struct TIM7EN_R(crate::FieldReader<bool, bool>);
impl TIM7EN_R {
pub(crate) fn new(bits: bool) -> Self {
TIM7EN_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for TIM7EN_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `TIM7EN` writer - TIM7 timer clock enable"]
pub struct TIM7EN_W<'a> {
w: &'a mut W,
}
impl<'a> TIM7EN_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5);
self.w
}
}
#[doc = "Field `TIM6EN` reader - TIM6 timer clock enable"]
pub struct TIM6EN_R(crate::FieldReader<bool, bool>);
impl TIM6EN_R {
pub(crate) fn new(bits: bool) -> Self {
TIM6EN_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for TIM6EN_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `TIM6EN` writer - TIM6 timer clock enable"]
pub struct TIM6EN_W<'a> {
w: &'a mut W,
}
impl<'a> TIM6EN_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4);
self.w
}
}
#[doc = "Field `TIM5EN` reader - TIM5 timer clock enable"]
pub struct TIM5EN_R(crate::FieldReader<bool, bool>);
impl TIM5EN_R {
pub(crate) fn new(bits: bool) -> Self {
TIM5EN_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for TIM5EN_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `TIM5EN` writer - TIM5 timer clock enable"]
pub struct TIM5EN_W<'a> {
w: &'a mut W,
}
impl<'a> TIM5EN_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3);
self.w
}
}
#[doc = "Field `TIM4EN` reader - TIM4 timer clock enable"]
pub struct TIM4EN_R(crate::FieldReader<bool, bool>);
impl TIM4EN_R {
pub(crate) fn new(bits: bool) -> Self {
TIM4EN_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for TIM4EN_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `TIM4EN` writer - TIM4 timer clock enable"]
pub struct TIM4EN_W<'a> {
w: &'a mut W,
}
impl<'a> TIM4EN_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2);
self.w
}
}
#[doc = "Field `TIM3EN` reader - TIM3 timer clock enable"]
pub struct TIM3EN_R(crate::FieldReader<bool, bool>);
impl TIM3EN_R {
pub(crate) fn new(bits: bool) -> Self {
TIM3EN_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for TIM3EN_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `TIM3EN` writer - TIM3 timer clock enable"]
pub struct TIM3EN_W<'a> {
w: &'a mut W,
}
impl<'a> TIM3EN_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1);
self.w
}
}
#[doc = "Field `TIM2EN` reader - TIM2 timer clock enable"]
pub struct TIM2EN_R(crate::FieldReader<bool, bool>);
impl TIM2EN_R {
pub(crate) fn new(bits: bool) -> Self {
TIM2EN_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for TIM2EN_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `TIM2EN` writer - TIM2 timer clock enable"]
pub struct TIM2EN_W<'a> {
w: &'a mut W,
}
impl<'a> TIM2EN_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01);
self.w
}
}
#[doc = "Field `RTCAPBEN` reader - Enables the real time clock (RTC) peripheral"]
pub struct RTCAPBEN_R(crate::FieldReader<bool, bool>);
impl RTCAPBEN_R {
pub(crate) fn new(bits: bool) -> Self {
RTCAPBEN_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for RTCAPBEN_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `RTCAPBEN` writer - Enables the real time clock (RTC) peripheral"]
pub struct RTCAPBEN_W<'a> {
w: &'a mut W,
}
impl<'a> RTCAPBEN_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10);
self.w
}
}
impl R {
#[doc = "Bit 31 - Low power timer 1 clock enable"]
#[inline(always)]
pub fn lptim1en(&self) -> LPTIM1EN_R {
LPTIM1EN_R::new(((self.bits >> 31) & 0x01) != 0)
}
#[doc = "Bit 30 - OPAMP interface clock enable"]
#[inline(always)]
pub fn opampen(&self) -> OPAMPEN_R {
OPAMPEN_R::new(((self.bits >> 30) & 0x01) != 0)
}
#[doc = "Bit 29 - DAC1 interface clock enable"]
#[inline(always)]
pub fn dac1en(&self) -> DAC1EN_R {
DAC1EN_R::new(((self.bits >> 29) & 0x01) != 0)
}
#[doc = "Bit 28 - Power interface clock enable"]
#[inline(always)]
pub fn pwren(&self) -> PWREN_R {
PWREN_R::new(((self.bits >> 28) & 0x01) != 0)
}
#[doc = "Bit 25 - CAN1 clock enable"]
#[inline(always)]
pub fn can1en(&self) -> CAN1EN_R {
CAN1EN_R::new(((self.bits >> 25) & 0x01) != 0)
}
#[doc = "Bit 23 - I2C3 clock enable"]
#[inline(always)]
pub fn i2c3en(&self) -> I2C3EN_R {
I2C3EN_R::new(((self.bits >> 23) & 0x01) != 0)
}
#[doc = "Bit 22 - I2C2 clock enable"]
#[inline(always)]
pub fn i2c2en(&self) -> I2C2EN_R {
I2C2EN_R::new(((self.bits >> 22) & 0x01) != 0)
}
#[doc = "Bit 21 - I2C1 clock enable"]
#[inline(always)]
pub fn i2c1en(&self) -> I2C1EN_R {
I2C1EN_R::new(((self.bits >> 21) & 0x01) != 0)
}
#[doc = "Bit 20 - UART5 clock enable"]
#[inline(always)]
pub fn uart5en(&self) -> UART5EN_R {
UART5EN_R::new(((self.bits >> 20) & 0x01) != 0)
}
#[doc = "Bit 19 - UART4 clock enable"]
#[inline(always)]
pub fn uart4en(&self) -> UART4EN_R {
UART4EN_R::new(((self.bits >> 19) & 0x01) != 0)
}
#[doc = "Bit 18 - USART3 clock enable"]
#[inline(always)]
pub fn usart3en(&self) -> USART3EN_R {
USART3EN_R::new(((self.bits >> 18) & 0x01) != 0)
}
#[doc = "Bit 17 - USART2 clock enable"]
#[inline(always)]
pub fn usart2en(&self) -> USART2EN_R {
USART2EN_R::new(((self.bits >> 17) & 0x01) != 0)
}
#[doc = "Bit 15 - SPI peripheral 3 clock enable"]
#[inline(always)]
pub fn spi3en(&self) -> SPI3EN_R {
SPI3EN_R::new(((self.bits >> 15) & 0x01) != 0)
}
#[doc = "Bit 14 - SPI2 clock enable"]
#[inline(always)]
pub fn spi2en(&self) -> SPI2EN_R {
SPI2EN_R::new(((self.bits >> 14) & 0x01) != 0)
}
#[doc = "Bit 11 - Window watchdog clock enable"]
#[inline(always)]
pub fn wwdgen(&self) -> WWDGEN_R {
WWDGEN_R::new(((self.bits >> 11) & 0x01) != 0)
}
#[doc = "Bit 9 - LCD clock enable"]
#[inline(always)]
pub fn lcden(&self) -> LCDEN_R {
LCDEN_R::new(((self.bits >> 9) & 0x01) != 0)
}
#[doc = "Bit 5 - TIM7 timer clock enable"]
#[inline(always)]
pub fn tim7en(&self) -> TIM7EN_R {
TIM7EN_R::new(((self.bits >> 5) & 0x01) != 0)
}
#[doc = "Bit 4 - TIM6 timer clock enable"]
#[inline(always)]
pub fn tim6en(&self) -> TIM6EN_R {
TIM6EN_R::new(((self.bits >> 4) & 0x01) != 0)
}
#[doc = "Bit 3 - TIM5 timer clock enable"]
#[inline(always)]
pub fn tim5en(&self) -> TIM5EN_R {
TIM5EN_R::new(((self.bits >> 3) & 0x01) != 0)
}
#[doc = "Bit 2 - TIM4 timer clock enable"]
#[inline(always)]
pub fn tim4en(&self) -> TIM4EN_R {
TIM4EN_R::new(((self.bits >> 2) & 0x01) != 0)
}
#[doc = "Bit 1 - TIM3 timer clock enable"]
#[inline(always)]
pub fn tim3en(&self) -> TIM3EN_R {
TIM3EN_R::new(((self.bits >> 1) & 0x01) != 0)
}
#[doc = "Bit 0 - TIM2 timer clock enable"]
#[inline(always)]
pub fn tim2en(&self) -> TIM2EN_R {
TIM2EN_R::new((self.bits & 0x01) != 0)
}
#[doc = "Bit 10 - Enables the real time clock (RTC) peripheral"]
#[inline(always)]
pub fn rtcapben(&self) -> RTCAPBEN_R {
RTCAPBEN_R::new(((self.bits >> 10) & 0x01) != 0)
}
}
impl W {
#[doc = "Bit 31 - Low power timer 1 clock enable"]
#[inline(always)]
pub fn lptim1en(&mut self) -> LPTIM1EN_W {
LPTIM1EN_W { w: self }
}
#[doc = "Bit 30 - OPAMP interface clock enable"]
#[inline(always)]
pub fn opampen(&mut self) -> OPAMPEN_W {
OPAMPEN_W { w: self }
}
#[doc = "Bit 29 - DAC1 interface clock enable"]
#[inline(always)]
pub fn dac1en(&mut self) -> DAC1EN_W {
DAC1EN_W { w: self }
}
#[doc = "Bit 28 - Power interface clock enable"]
#[inline(always)]
pub fn pwren(&mut self) -> PWREN_W {
PWREN_W { w: self }
}
#[doc = "Bit 25 - CAN1 clock enable"]
#[inline(always)]
pub fn can1en(&mut self) -> CAN1EN_W {
CAN1EN_W { w: self }
}
#[doc = "Bit 23 - I2C3 clock enable"]
#[inline(always)]
pub fn i2c3en(&mut self) -> I2C3EN_W {
I2C3EN_W { w: self }
}
#[doc = "Bit 22 - I2C2 clock enable"]
#[inline(always)]
pub fn i2c2en(&mut self) -> I2C2EN_W {
I2C2EN_W { w: self }
}
#[doc = "Bit 21 - I2C1 clock enable"]
#[inline(always)]
pub fn i2c1en(&mut self) -> I2C1EN_W {
I2C1EN_W { w: self }
}
#[doc = "Bit 20 - UART5 clock enable"]
#[inline(always)]
pub fn uart5en(&mut self) -> UART5EN_W {
UART5EN_W { w: self }
}
#[doc = "Bit 19 - UART4 clock enable"]
#[inline(always)]
pub fn uart4en(&mut self) -> UART4EN_W {
UART4EN_W { w: self }
}
#[doc = "Bit 18 - USART3 clock enable"]
#[inline(always)]
pub fn usart3en(&mut self) -> USART3EN_W {
USART3EN_W { w: self }
}
#[doc = "Bit 17 - USART2 clock enable"]
#[inline(always)]
pub fn usart2en(&mut self) -> USART2EN_W {
USART2EN_W { w: self }
}
#[doc = "Bit 15 - SPI peripheral 3 clock enable"]
#[inline(always)]
pub fn spi3en(&mut self) -> SPI3EN_W {
SPI3EN_W { w: self }
}
#[doc = "Bit 14 - SPI2 clock enable"]
#[inline(always)]
pub fn spi2en(&mut self) -> SPI2EN_W {
SPI2EN_W { w: self }
}
#[doc = "Bit 11 - Window watchdog clock enable"]
#[inline(always)]
pub fn wwdgen(&mut self) -> WWDGEN_W {
WWDGEN_W { w: self }
}
#[doc = "Bit 9 - LCD clock enable"]
#[inline(always)]
pub fn lcden(&mut self) -> LCDEN_W {
LCDEN_W { w: self }
}
#[doc = "Bit 5 - TIM7 timer clock enable"]
#[inline(always)]
pub fn tim7en(&mut self) -> TIM7EN_W {
TIM7EN_W { w: self }
}
#[doc = "Bit 4 - TIM6 timer clock enable"]
#[inline(always)]
pub fn tim6en(&mut self) -> TIM6EN_W {
TIM6EN_W { w: self }
}
#[doc = "Bit 3 - TIM5 timer clock enable"]
#[inline(always)]
pub fn tim5en(&mut self) -> TIM5EN_W {
TIM5EN_W { w: self }
}
#[doc = "Bit 2 - TIM4 timer clock enable"]
#[inline(always)]
pub fn tim4en(&mut self) -> TIM4EN_W {
TIM4EN_W { w: self }
}
#[doc = "Bit 1 - TIM3 timer clock enable"]
#[inline(always)]
pub fn tim3en(&mut self) -> TIM3EN_W {
TIM3EN_W { w: self }
}
#[doc = "Bit 0 - TIM2 timer clock enable"]
#[inline(always)]
pub fn tim2en(&mut self) -> TIM2EN_W {
TIM2EN_W { w: self }
}
#[doc = "Bit 10 - Enables the real time clock (RTC) peripheral"]
#[inline(always)]
pub fn rtcapben(&mut self) -> RTCAPBEN_W {
RTCAPBEN_W { w: self }
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "APB1ENR1\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [apb1enr1](index.html) module"]
pub struct APB1ENR1_SPEC;
impl crate::RegisterSpec for APB1ENR1_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [apb1enr1::R](R) reader structure"]
impl crate::Readable for APB1ENR1_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [apb1enr1::W](W) writer structure"]
impl crate::Writable for APB1ENR1_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets APB1ENR1 to value 0"]
impl crate::Resettable for APB1ENR1_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}