#[doc = "Register `CICR` writer"]
pub struct W(crate::W<CICR_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<CICR_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<CICR_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<CICR_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `LSECSSC` writer - LSE Clock security system interrupt clear"]
pub struct LSECSSC_W<'a> {
w: &'a mut W,
}
impl<'a> LSECSSC_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9);
self.w
}
}
#[doc = "Field `CSSC` writer - Clock security system interrupt clear"]
pub struct CSSC_W<'a> {
w: &'a mut W,
}
impl<'a> CSSC_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8);
self.w
}
}
#[doc = "Field `PLLSAI2RDYC` writer - PLLSAI2 ready interrupt clear"]
pub struct PLLSAI2RDYC_W<'a> {
w: &'a mut W,
}
impl<'a> PLLSAI2RDYC_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7);
self.w
}
}
#[doc = "Field `PLLSAI1RDYC` writer - PLLSAI1 ready interrupt clear"]
pub struct PLLSAI1RDYC_W<'a> {
w: &'a mut W,
}
impl<'a> PLLSAI1RDYC_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6);
self.w
}
}
#[doc = "Field `PLLRDYC` writer - PLL ready interrupt clear"]
pub struct PLLRDYC_W<'a> {
w: &'a mut W,
}
impl<'a> PLLRDYC_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5);
self.w
}
}
#[doc = "Field `HSERDYC` writer - HSE ready interrupt clear"]
pub struct HSERDYC_W<'a> {
w: &'a mut W,
}
impl<'a> HSERDYC_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4);
self.w
}
}
#[doc = "Field `HSIRDYC` writer - HSI ready interrupt clear"]
pub struct HSIRDYC_W<'a> {
w: &'a mut W,
}
impl<'a> HSIRDYC_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3);
self.w
}
}
#[doc = "Field `MSIRDYC` writer - MSI ready interrupt clear"]
pub struct MSIRDYC_W<'a> {
w: &'a mut W,
}
impl<'a> MSIRDYC_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2);
self.w
}
}
#[doc = "Field `LSERDYC` writer - LSE ready interrupt clear"]
pub struct LSERDYC_W<'a> {
w: &'a mut W,
}
impl<'a> LSERDYC_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1);
self.w
}
}
#[doc = "Field `LSIRDYC` writer - LSI ready interrupt clear"]
pub struct LSIRDYC_W<'a> {
w: &'a mut W,
}
impl<'a> LSIRDYC_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01);
self.w
}
}
impl W {
#[doc = "Bit 9 - LSE Clock security system interrupt clear"]
#[inline(always)]
pub fn lsecssc(&mut self) -> LSECSSC_W {
LSECSSC_W { w: self }
}
#[doc = "Bit 8 - Clock security system interrupt clear"]
#[inline(always)]
pub fn cssc(&mut self) -> CSSC_W {
CSSC_W { w: self }
}
#[doc = "Bit 7 - PLLSAI2 ready interrupt clear"]
#[inline(always)]
pub fn pllsai2rdyc(&mut self) -> PLLSAI2RDYC_W {
PLLSAI2RDYC_W { w: self }
}
#[doc = "Bit 6 - PLLSAI1 ready interrupt clear"]
#[inline(always)]
pub fn pllsai1rdyc(&mut self) -> PLLSAI1RDYC_W {
PLLSAI1RDYC_W { w: self }
}
#[doc = "Bit 5 - PLL ready interrupt clear"]
#[inline(always)]
pub fn pllrdyc(&mut self) -> PLLRDYC_W {
PLLRDYC_W { w: self }
}
#[doc = "Bit 4 - HSE ready interrupt clear"]
#[inline(always)]
pub fn hserdyc(&mut self) -> HSERDYC_W {
HSERDYC_W { w: self }
}
#[doc = "Bit 3 - HSI ready interrupt clear"]
#[inline(always)]
pub fn hsirdyc(&mut self) -> HSIRDYC_W {
HSIRDYC_W { w: self }
}
#[doc = "Bit 2 - MSI ready interrupt clear"]
#[inline(always)]
pub fn msirdyc(&mut self) -> MSIRDYC_W {
MSIRDYC_W { w: self }
}
#[doc = "Bit 1 - LSE ready interrupt clear"]
#[inline(always)]
pub fn lserdyc(&mut self) -> LSERDYC_W {
LSERDYC_W { w: self }
}
#[doc = "Bit 0 - LSI ready interrupt clear"]
#[inline(always)]
pub fn lsirdyc(&mut self) -> LSIRDYC_W {
LSIRDYC_W { w: self }
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "Clock interrupt clear register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cicr](index.html) module"]
pub struct CICR_SPEC;
impl crate::RegisterSpec for CICR_SPEC {
type Ux = u32;
}
#[doc = "`write(|w| ..)` method takes [cicr::W](W) writer structure"]
impl crate::Writable for CICR_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets CICR to value 0"]
impl crate::Resettable for CICR_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}