#[repr(C)]
#[derive(Copy, Clone, Debug, Default, Eq, Hash, Ord, PartialEq, PartialOrd)]
pub struct __BindgenBitfieldUnit<Storage> {
storage: Storage,
}
impl<Storage> __BindgenBitfieldUnit<Storage> {
#[inline]
pub const fn new(storage: Storage) -> Self {
Self { storage }
}
}
impl<Storage> __BindgenBitfieldUnit<Storage>
where
Storage: AsRef<[u8]> + AsMut<[u8]>,
{
#[inline]
fn extract_bit(byte: u8, index: usize) -> bool {
let bit_index = if cfg!(target_endian = "big") {
7 - (index % 8)
} else {
index % 8
};
let mask = 1 << bit_index;
byte & mask == mask
}
#[inline]
pub fn get_bit(&self, index: usize) -> bool {
debug_assert!(index / 8 < self.storage.as_ref().len());
let byte_index = index / 8;
let byte = self.storage.as_ref()[byte_index];
Self::extract_bit(byte, index)
}
#[inline]
pub unsafe fn raw_get_bit(this: *const Self, index: usize) -> bool {
debug_assert!(index / 8 < core::mem::size_of::<Storage>());
let byte_index = index / 8;
let byte = unsafe {
*(core::ptr::addr_of!((*this).storage) as *const u8).offset(byte_index as isize)
};
Self::extract_bit(byte, index)
}
#[inline]
fn change_bit(byte: u8, index: usize, val: bool) -> u8 {
let bit_index = if cfg!(target_endian = "big") {
7 - (index % 8)
} else {
index % 8
};
let mask = 1 << bit_index;
if val {
byte | mask
} else {
byte & !mask
}
}
#[inline]
pub fn set_bit(&mut self, index: usize, val: bool) {
debug_assert!(index / 8 < self.storage.as_ref().len());
let byte_index = index / 8;
let byte = &mut self.storage.as_mut()[byte_index];
*byte = Self::change_bit(*byte, index, val);
}
#[inline]
pub unsafe fn raw_set_bit(this: *mut Self, index: usize, val: bool) {
debug_assert!(index / 8 < core::mem::size_of::<Storage>());
let byte_index = index / 8;
let byte = unsafe {
(core::ptr::addr_of_mut!((*this).storage) as *mut u8).offset(byte_index as isize)
};
unsafe { *byte = Self::change_bit(*byte, index, val) };
}
#[inline]
pub fn get(&self, bit_offset: usize, bit_width: u8) -> u64 {
debug_assert!(bit_width <= 64);
debug_assert!(bit_offset / 8 < self.storage.as_ref().len());
debug_assert!((bit_offset + (bit_width as usize)) / 8 <= self.storage.as_ref().len());
let mut val = 0;
for i in 0..(bit_width as usize) {
if self.get_bit(i + bit_offset) {
let index = if cfg!(target_endian = "big") {
bit_width as usize - 1 - i
} else {
i
};
val |= 1 << index;
}
}
val
}
#[inline]
pub unsafe fn raw_get(this: *const Self, bit_offset: usize, bit_width: u8) -> u64 {
debug_assert!(bit_width <= 64);
debug_assert!(bit_offset / 8 < core::mem::size_of::<Storage>());
debug_assert!((bit_offset + (bit_width as usize)) / 8 <= core::mem::size_of::<Storage>());
let mut val = 0;
for i in 0..(bit_width as usize) {
if unsafe { Self::raw_get_bit(this, i + bit_offset) } {
let index = if cfg!(target_endian = "big") {
bit_width as usize - 1 - i
} else {
i
};
val |= 1 << index;
}
}
val
}
#[inline]
pub fn set(&mut self, bit_offset: usize, bit_width: u8, val: u64) {
debug_assert!(bit_width <= 64);
debug_assert!(bit_offset / 8 < self.storage.as_ref().len());
debug_assert!((bit_offset + (bit_width as usize)) / 8 <= self.storage.as_ref().len());
for i in 0..(bit_width as usize) {
let mask = 1 << i;
let val_bit_is_set = val & mask == mask;
let index = if cfg!(target_endian = "big") {
bit_width as usize - 1 - i
} else {
i
};
self.set_bit(index + bit_offset, val_bit_is_set);
}
}
#[inline]
pub unsafe fn raw_set(this: *mut Self, bit_offset: usize, bit_width: u8, val: u64) {
debug_assert!(bit_width <= 64);
debug_assert!(bit_offset / 8 < core::mem::size_of::<Storage>());
debug_assert!((bit_offset + (bit_width as usize)) / 8 <= core::mem::size_of::<Storage>());
for i in 0..(bit_width as usize) {
let mask = 1 << i;
let val_bit_is_set = val & mask == mask;
let index = if cfg!(target_endian = "big") {
bit_width as usize - 1 - i
} else {
i
};
unsafe { Self::raw_set_bit(this, index + bit_offset, val_bit_is_set) };
}
}
}
pub const TMR4_CLK_SRC_INTERNCLK: u32 = 0;
pub const TMR4_CLK_SRC_EXTCLK: u32 = 32768;
pub const TMR4_CLK_DIV1: u32 = 0;
pub const TMR4_CLK_DIV2: u32 = 1;
pub const TMR4_CLK_DIV4: u32 = 2;
pub const TMR4_CLK_DIV8: u32 = 3;
pub const TMR4_CLK_DIV16: u32 = 4;
pub const TMR4_CLK_DIV32: u32 = 5;
pub const TMR4_CLK_DIV64: u32 = 6;
pub const TMR4_CLK_DIV128: u32 = 7;
pub const TMR4_CLK_DIV256: u32 = 8;
pub const TMR4_CLK_DIV512: u32 = 9;
pub const TMR4_CLK_DIV1024: u32 = 10;
pub const TMR4_MD_SAWTOOTH: u32 = 0;
pub const TMR4_MD_TRIANGLE: u32 = 32;
pub const TMR4_FLAG_RELOAD_TMR_U: u32 = 1;
pub const TMR4_FLAG_RELOAD_TMR_V: u32 = 16;
pub const TMR4_FLAG_RELOAD_TMR_W: u32 = 256;
pub const TMR4_FLAG_RELOAD_TMR_X: u32 = 4096;
pub const TMR4_FLAG_OC_CMP_UH: u32 = 65536;
pub const TMR4_FLAG_OC_CMP_UL: u32 = 131072;
pub const TMR4_FLAG_OC_CMP_VH: u32 = 262144;
pub const TMR4_FLAG_OC_CMP_VL: u32 = 524288;
pub const TMR4_FLAG_OC_CMP_WH: u32 = 1048576;
pub const TMR4_FLAG_OC_CMP_WL: u32 = 2097152;
pub const TMR4_FLAG_OC_CMP_XH: u32 = 4194304;
pub const TMR4_FLAG_OC_CMP_XL: u32 = 8388608;
pub const TMR4_FLAG_SCMP_EVT0: u32 = 16777216;
pub const TMR4_FLAG_SCMP_EVT1: u32 = 33554432;
pub const TMR4_FLAG_SCMP_EVT2: u32 = 67108864;
pub const TMR4_FLAG_SCMP_EVT3: u32 = 134217728;
pub const TMR4_FLAG_SCMP_EVT4: u32 = 268435456;
pub const TMR4_FLAG_SCMP_EVT5: u32 = 536870912;
pub const TMR4_FLAG_SCMP_EVT6: u32 = 1073741824;
pub const TMR4_FLAG_SCMP_EVT7: u32 = 2147483648;
pub const TMR4_INT_RELOAD_TMR_U: u32 = 1;
pub const TMR4_INT_RELOAD_TMR_V: u32 = 2;
pub const TMR4_INT_RELOAD_TMR_W: u32 = 4;
pub const TMR4_INT_RELOAD_TMR_X: u32 = 8;
pub const TMR4_INT_OC_CMP_UH: u32 = 65536;
pub const TMR4_INT_OC_CMP_UL: u32 = 131072;
pub const TMR4_INT_OC_CMP_VH: u32 = 262144;
pub const TMR4_INT_OC_CMP_VL: u32 = 524288;
pub const TMR4_INT_OC_CMP_WH: u32 = 1048576;
pub const TMR4_INT_OC_CMP_WL: u32 = 2097152;
pub const TMR4_INT_OC_CMP_XH: u32 = 4194304;
pub const TMR4_INT_OC_CMP_XL: u32 = 8388608;
pub const TMR4_INT_SCMP_EVT0: u32 = 16777216;
pub const TMR4_INT_SCMP_EVT1: u32 = 33554432;
pub const TMR4_INT_SCMP_EVT2: u32 = 67108864;
pub const TMR4_INT_SCMP_EVT3: u32 = 134217728;
pub const TMR4_INT_SCMP_EVT4: u32 = 268435456;
pub const TMR4_INT_SCMP_EVT5: u32 = 536870912;
pub const TMR4_INT_SCMP_EVT6: u32 = 1073741824;
pub const TMR4_INT_SCMP_EVT7: u32 = 2147483648;
pub const TMR4_INT_CNT_MASK0: u32 = 0;
pub const TMR4_INT_CNT_MASK1: u32 = 1;
pub const TMR4_INT_CNT_MASK2: u32 = 2;
pub const TMR4_INT_CNT_MASK3: u32 = 3;
pub const TMR4_INT_CNT_MASK4: u32 = 4;
pub const TMR4_INT_CNT_MASK5: u32 = 5;
pub const TMR4_INT_CNT_MASK6: u32 = 6;
pub const TMR4_INT_CNT_MASK7: u32 = 7;
pub const TMR4_INT_CNT_MASK8: u32 = 8;
pub const TMR4_INT_CNT_MASK9: u32 = 9;
pub const TMR4_INT_CNT_MASK10: u32 = 10;
pub const TMR4_INT_CNT_MASK11: u32 = 11;
pub const TMR4_INT_CNT_MASK12: u32 = 12;
pub const TMR4_INT_CNT_MASK13: u32 = 13;
pub const TMR4_INT_CNT_MASK14: u32 = 14;
pub const TMR4_INT_CNT_MASK15: u32 = 15;
pub const TMR4_OC_CH_UH: u32 = 0;
pub const TMR4_OC_CH_UL: u32 = 1;
pub const TMR4_OC_CH_VH: u32 = 2;
pub const TMR4_OC_CH_VL: u32 = 3;
pub const TMR4_OC_CH_WH: u32 = 4;
pub const TMR4_OC_CH_WL: u32 = 5;
pub const TMR4_OC_CH_XH: u32 = 6;
pub const TMR4_OC_CH_XL: u32 = 7;
pub const TMR4_OC_INVD_LOW: u32 = 0;
pub const TMR4_OC_INVD_HIGH: u32 = 4;
pub const TMR4_OC_PORT_LOW: u32 = 0;
pub const TMR4_OC_PORT_HIGH: u32 = 4;
pub const TMR4_OC_BUF_NONE: u32 = 0;
pub const TMR4_OC_BUF_CMP_VALUE: u32 = 1;
pub const TMR4_OC_BUF_CMP_MD: u32 = 2;
pub const TMR4_OC_BUF_COND_IMMED: u32 = 0;
pub const TMR4_OC_BUF_COND_VALLEY: u32 = 1;
pub const TMR4_OC_BUF_COND_PEAK: u32 = 2;
pub const TMR4_OC_BUF_COND_PEAK_VALLEY: u32 = 3;
pub const TMR4_OC_OCF_HOLD: u32 = 0;
pub const TMR4_OC_OCF_SET: u32 = 1;
pub const TMR4_OC_HOLD: u32 = 0;
pub const TMR4_OC_HIGH: u32 = 1;
pub const TMR4_OC_LOW: u32 = 2;
pub const TMR4_OC_INVT: u32 = 3;
pub const TMR4_PWM_CH_U: u32 = 0;
pub const TMR4_PWM_CH_V: u32 = 1;
pub const TMR4_PWM_CH_W: u32 = 2;
pub const TMR4_PWM_CH_X: u32 = 3;
pub const TMR4_PWM_PIN_OUH: u32 = 0;
pub const TMR4_PWM_PIN_OUL: u32 = 1;
pub const TMR4_PWM_PIN_OVH: u32 = 2;
pub const TMR4_PWM_PIN_OVL: u32 = 3;
pub const TMR4_PWM_PIN_OWH: u32 = 4;
pub const TMR4_PWM_PIN_OWL: u32 = 5;
pub const TMR4_PWM_PIN_OXH: u32 = 6;
pub const TMR4_PWM_PIN_OXL: u32 = 7;
pub const TMR4_PWM_CLK_DIV1: u32 = 0;
pub const TMR4_PWM_CLK_DIV2: u32 = 1;
pub const TMR4_PWM_CLK_DIV4: u32 = 2;
pub const TMR4_PWM_CLK_DIV8: u32 = 3;
pub const TMR4_PWM_CLK_DIV16: u32 = 4;
pub const TMR4_PWM_CLK_DIV32: u32 = 5;
pub const TMR4_PWM_CLK_DIV64: u32 = 6;
pub const TMR4_PWM_CLK_DIV128: u32 = 7;
pub const TMR4_PWM_MD_THROUGH: u32 = 0;
pub const TMR4_PWM_MD_DEAD_TMR: u32 = 16;
pub const TMR4_PWM_MD_DEAD_TMR_FILTER: u32 = 32;
pub const TMR4_PWM_OXH_HOLD_OXL_HOLD: u32 = 0;
pub const TMR4_PWM_OXH_INVT_OXL_INVT: u32 = 64;
pub const TMR4_PWM_OXH_INVT_OXL_HOLD: u32 = 128;
pub const TMR4_PWM_OXH_HOLD_OXL_INVT: u32 = 192;
pub const TMR4_PWM_PDAR_IDX: u32 = 0;
pub const TMR4_PWM_PDBR_IDX: u32 = 1;
pub const TMR4_PWM_ABNORMAL_PIN_NORMAL: u32 = 0;
pub const TMR4_PWM_ABNORMAL_PIN_HIZ: u32 = 1;
pub const TMR4_PWM_ABNORMAL_PIN_LOW: u32 = 2;
pub const TMR4_PWM_ABNORMAL_PIN_HIGH: u32 = 3;
pub const TMR4_PWM_PIN_OUTPUT_OS: u32 = 0;
pub const TMR4_PWM_PIN_OUTPUT_NORMAL: u32 = 1;
pub const TMR4_PWM_OE_EFFECT_IMMED: u32 = 1024;
pub const TMR4_PWM_OE_EFFECT_COUNT_PEAK: u32 = 3072;
pub const TMR4_PWM_OE_EFFECT_COUNT_VALLEY: u32 = 2048;
pub const TMR4_EVT_CH_UH: u32 = 0;
pub const TMR4_EVT_CH_UL: u32 = 1;
pub const TMR4_EVT_CH_VH: u32 = 2;
pub const TMR4_EVT_CH_VL: u32 = 3;
pub const TMR4_EVT_CH_WH: u32 = 4;
pub const TMR4_EVT_CH_WL: u32 = 5;
pub const TMR4_EVT_CH_XH: u32 = 6;
pub const TMR4_EVT_CH_XL: u32 = 7;
pub const TMR4_EVT_MATCH_CNT_UP: u32 = 16384;
pub const TMR4_EVT_MATCH_CNT_DOWN: u32 = 4096;
pub const TMR4_EVT_MATCH_CNT_PEAK: u32 = 8192;
pub const TMR4_EVT_MATCH_CNT_VALLEY: u32 = 32768;
pub const TMR4_EVT_MATCH_CNT_ALL: u32 = 61440;
pub const TMR4_EVT_MASK_PEAK: u32 = 128;
pub const TMR4_EVT_MASK_VALLEY: u32 = 64;
pub const TMR4_EVT_MASK_TYPE_ALL: u32 = 192;
pub const TMR4_EVT_BUF_COND_IMMED: u32 = 0;
pub const TMR4_EVT_BUF_COND_VALLEY: u32 = 1;
pub const TMR4_EVT_BUF_COND_PEAK: u32 = 2;
pub const TMR4_EVT_BUF_COND_PEAK_VALLEY: u32 = 3;
pub const TMR4_EVT_MD_CMP: u32 = 0;
pub const TMR4_EVT_MD_DELAY: u32 = 256;
pub const TMR4_EVT_DELAY_OCCRXH: u32 = 0;
pub const TMR4_EVT_DELAY_OCCRXL: u32 = 512;
pub const TMR4_EVT_MASK0: u32 = 0;
pub const TMR4_EVT_MASK1: u32 = 1;
pub const TMR4_EVT_MASK2: u32 = 2;
pub const TMR4_EVT_MASK3: u32 = 3;
pub const TMR4_EVT_MASK4: u32 = 4;
pub const TMR4_EVT_MASK5: u32 = 5;
pub const TMR4_EVT_MASK6: u32 = 6;
pub const TMR4_EVT_MASK7: u32 = 7;
pub const TMR4_EVT_MASK8: u32 = 8;
pub const TMR4_EVT_MASK9: u32 = 9;
pub const TMR4_EVT_MASK10: u32 = 10;
pub const TMR4_EVT_MASK11: u32 = 11;
pub const TMR4_EVT_MASK12: u32 = 12;
pub const TMR4_EVT_MASK13: u32 = 13;
pub const TMR4_EVT_MASK14: u32 = 14;
pub const TMR4_EVT_MASK15: u32 = 15;
pub const TMR4_EVT_OUTPUT_EVT0: u32 = 0;
pub const TMR4_EVT_OUTPUT_EVT1: u32 = 4;
pub const TMR4_EVT_OUTPUT_EVT2: u32 = 8;
pub const TMR4_EVT_OUTPUT_EVT3: u32 = 12;
pub const TMR4_EVT_OUTPUT_EVT4: u32 = 16;
pub const TMR4_EVT_OUTPUT_EVT5: u32 = 20;
pub const TMR4_EVT_OUTPUT_EVT6: u32 = 24;
pub const TMR4_EVT_OUTPUT_EVT7: u32 = 28;
pub const TMR4_EVT_OUTPUT_NONE: u32 = 0;
pub const TMR4_EVT_OUTPUT_EVT0_SIGNAL: u32 = 1;
pub const TMR4_EVT_OUTPUT_EVT1_SIGNAL: u32 = 2;
pub const TMR4_EVT_OUTPUT_EVT2_SIGNAL: u32 = 3;
pub const TMR4_EVT_OUTPUT_EVT3_SIGNAL: u32 = 4;
pub const TMR4_EVT_OUTPUT_EVT4_SIGNAL: u32 = 5;
pub const TMR4_EVT_OUTPUT_EVT5_SIGNAL: u32 = 6;
pub const TMR4_EVT_OUTPUT_EVT6_SIGNAL: u32 = 8;
pub const TMR4_EVT_OUTPUT_EVT7_SIGNAL: u32 = 9;
pub const en_functional_state_t_DISABLE: en_functional_state_t = 0;
pub const en_functional_state_t_ENABLE: en_functional_state_t = 1;
#[doc = " @brief Functional state"]
pub type en_functional_state_t = ::core::ffi::c_uint;
pub const en_flag_status_t_RESET: en_flag_status_t = 0;
pub const en_flag_status_t_SET: en_flag_status_t = 1;
#[doc = " @brief Flag status"]
pub type en_flag_status_t = ::core::ffi::c_uint;
#[doc = " @brief TMR4"]
#[repr(C)]
#[derive(Debug, Copy, Clone, PartialEq)]
pub struct CM_TMR4_TypeDef {
pub OCCRUH: u16,
pub RESERVED0: [u8; 2usize],
pub OCCRUL: u16,
pub RESERVED1: [u8; 2usize],
pub OCCRVH: u16,
pub RESERVED2: [u8; 2usize],
pub OCCRVL: u16,
pub RESERVED3: [u8; 2usize],
pub OCCRWH: u16,
pub RESERVED4: [u8; 2usize],
pub OCCRWL: u16,
pub RESERVED5: [u8; 2usize],
pub OCCRXH: u16,
pub RESERVED6: [u8; 2usize],
pub OCCRXL: u16,
pub RESERVED7: [u8; 2usize],
pub OCSRU: u16,
pub OCERU: u16,
pub OCSRV: u16,
pub OCERV: u16,
pub OCSRW: u16,
pub OCERW: u16,
pub OCSRX: u16,
pub OCERX: u16,
pub OCMRUH: u16,
pub RESERVED8: [u8; 2usize],
pub OCMRUL: u32,
pub OCMRVH: u16,
pub RESERVED9: [u8; 2usize],
pub OCMRVL: u32,
pub OCMRWH: u16,
pub RESERVED10: [u8; 2usize],
pub OCMRWL: u32,
pub OCMRXH: u16,
pub RESERVED11: [u8; 2usize],
pub OCMRXL: u32,
pub CPSR: u16,
pub RESERVED12: [u8; 2usize],
pub CNTR: u16,
pub RESERVED13: [u8; 2usize],
pub CCSR: u16,
pub CVPR: u16,
pub PSCR: u32,
pub RESERVED14: [u8; 34usize],
pub PFSRU: u16,
pub PDARU: u16,
pub PDBRU: u16,
pub RESERVED15: [u8; 2usize],
pub PFSRV: u16,
pub PDARV: u16,
pub PDBRV: u16,
pub RESERVED16: [u8; 2usize],
pub PFSRW: u16,
pub PDARW: u16,
pub PDBRW: u16,
pub RESERVED17: [u8; 2usize],
pub PFSRX: u16,
pub PDARX: u16,
pub PDBRX: u16,
pub POCRU: u16,
pub RESERVED18: [u8; 2usize],
pub POCRV: u16,
pub RESERVED19: [u8; 2usize],
pub POCRW: u16,
pub RESERVED20: [u8; 2usize],
pub POCRX: u16,
pub RESERVED21: [u8; 2usize],
pub SCCRUH: u16,
pub RESERVED22: [u8; 2usize],
pub SCCRUL: u16,
pub RESERVED23: [u8; 2usize],
pub SCCRVH: u16,
pub RESERVED24: [u8; 2usize],
pub SCCRVL: u16,
pub RESERVED25: [u8; 2usize],
pub SCCRWH: u16,
pub RESERVED26: [u8; 2usize],
pub SCCRWL: u16,
pub RESERVED27: [u8; 2usize],
pub SCCRXH: u16,
pub RESERVED28: [u8; 2usize],
pub SCCRXL: u16,
pub RESERVED29: [u8; 2usize],
pub SCSRUH: u16,
pub SCMRUH: u16,
pub SCSRUL: u16,
pub SCMRUL: u16,
pub SCSRVH: u16,
pub SCMRVH: u16,
pub SCSRVL: u16,
pub SCMRVL: u16,
pub SCSRWH: u16,
pub SCMRWH: u16,
pub SCSRWL: u16,
pub SCMRWL: u16,
pub SCSRXH: u16,
pub SCMRXH: u16,
pub SCSRXL: u16,
pub SCMRXL: u16,
pub SCER: u16,
pub RESERVED30: [u8; 2usize],
pub RCSR: u32,
pub SCIR: u16,
pub RESERVED31: [u8; 2usize],
pub SCFR: u16,
}
#[doc = " @brief TMR4 Counter function initialization configuration\n @note The TMR4 division(u16ClockDiv) is valid when clock source is the internal clock."]
#[repr(C)]
#[derive(Debug, Copy, Clone, PartialEq)]
pub struct stc_tmr4_init_t {
#[doc = "< TMR4 counter clock source.\nThis parameter can be a value of @ref TMR4_Count_Clock_Source"]
pub u16ClockSrc: u16,
#[doc = "< TMR4 counter internal clock division.\nThis parameter can be a value of @ref TMR4_Count_Clock_Division."]
pub u16ClockDiv: u16,
#[doc = "< TMR4 counter mode.\nThis parameter can be a value of @ref TMR4_Count_Mode"]
pub u16CountMode: u16,
#[doc = "< TMR4 counter period value.\nThis parameter can be a value of half-word"]
pub u16PeriodValue: u16,
}
#[doc = " @brief The configuration of Output-Compare high channel(OUH/OVH/OWH)"]
#[repr(C)]
#[derive(Copy, Clone)]
pub union un_tmr4_oc_ocmrh_t {
#[doc = "< OCMRxH(x=U/V/W) register"]
pub OCMRx: u16,
pub OCMRx_f: un_tmr4_oc_ocmrh_t__bindgen_ty_1,
}
#[repr(C)]
#[repr(align(2))]
#[derive(Debug, Copy, Clone, PartialEq)]
pub struct un_tmr4_oc_ocmrh_t__bindgen_ty_1 {
pub _bitfield_align_1: [u8; 0],
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 2usize]>,
}
impl un_tmr4_oc_ocmrh_t__bindgen_ty_1 {
#[inline]
pub fn OCFDCH(&self) -> u16 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 1u8) as u16) }
}
#[inline]
pub fn set_OCFDCH(&mut self, val: u16) {
unsafe {
let val: u16 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 1u8, val as u64)
}
}
#[inline]
pub unsafe fn OCFDCH_raw(this: *const Self) -> u16 {
unsafe {
::core::mem::transmute(<__BindgenBitfieldUnit<[u8; 2usize]>>::raw_get(
::core::ptr::addr_of!((*this)._bitfield_1),
0usize,
1u8,
) as u16)
}
}
#[inline]
pub unsafe fn set_OCFDCH_raw(this: *mut Self, val: u16) {
unsafe {
let val: u16 = ::core::mem::transmute(val);
<__BindgenBitfieldUnit<[u8; 2usize]>>::raw_set(
::core::ptr::addr_of_mut!((*this)._bitfield_1),
0usize,
1u8,
val as u64,
)
}
}
#[inline]
pub fn OCFPKH(&self) -> u16 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(1usize, 1u8) as u16) }
}
#[inline]
pub fn set_OCFPKH(&mut self, val: u16) {
unsafe {
let val: u16 = ::core::mem::transmute(val);
self._bitfield_1.set(1usize, 1u8, val as u64)
}
}
#[inline]
pub unsafe fn OCFPKH_raw(this: *const Self) -> u16 {
unsafe {
::core::mem::transmute(<__BindgenBitfieldUnit<[u8; 2usize]>>::raw_get(
::core::ptr::addr_of!((*this)._bitfield_1),
1usize,
1u8,
) as u16)
}
}
#[inline]
pub unsafe fn set_OCFPKH_raw(this: *mut Self, val: u16) {
unsafe {
let val: u16 = ::core::mem::transmute(val);
<__BindgenBitfieldUnit<[u8; 2usize]>>::raw_set(
::core::ptr::addr_of_mut!((*this)._bitfield_1),
1usize,
1u8,
val as u64,
)
}
}
#[inline]
pub fn OCFUCH(&self) -> u16 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(2usize, 1u8) as u16) }
}
#[inline]
pub fn set_OCFUCH(&mut self, val: u16) {
unsafe {
let val: u16 = ::core::mem::transmute(val);
self._bitfield_1.set(2usize, 1u8, val as u64)
}
}
#[inline]
pub unsafe fn OCFUCH_raw(this: *const Self) -> u16 {
unsafe {
::core::mem::transmute(<__BindgenBitfieldUnit<[u8; 2usize]>>::raw_get(
::core::ptr::addr_of!((*this)._bitfield_1),
2usize,
1u8,
) as u16)
}
}
#[inline]
pub unsafe fn set_OCFUCH_raw(this: *mut Self, val: u16) {
unsafe {
let val: u16 = ::core::mem::transmute(val);
<__BindgenBitfieldUnit<[u8; 2usize]>>::raw_set(
::core::ptr::addr_of_mut!((*this)._bitfield_1),
2usize,
1u8,
val as u64,
)
}
}
#[inline]
pub fn OCFZRH(&self) -> u16 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(3usize, 1u8) as u16) }
}
#[inline]
pub fn set_OCFZRH(&mut self, val: u16) {
unsafe {
let val: u16 = ::core::mem::transmute(val);
self._bitfield_1.set(3usize, 1u8, val as u64)
}
}
#[inline]
pub unsafe fn OCFZRH_raw(this: *const Self) -> u16 {
unsafe {
::core::mem::transmute(<__BindgenBitfieldUnit<[u8; 2usize]>>::raw_get(
::core::ptr::addr_of!((*this)._bitfield_1),
3usize,
1u8,
) as u16)
}
}
#[inline]
pub unsafe fn set_OCFZRH_raw(this: *mut Self, val: u16) {
unsafe {
let val: u16 = ::core::mem::transmute(val);
<__BindgenBitfieldUnit<[u8; 2usize]>>::raw_set(
::core::ptr::addr_of_mut!((*this)._bitfield_1),
3usize,
1u8,
val as u64,
)
}
}
#[inline]
pub fn OPDCH(&self) -> u16 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(4usize, 2u8) as u16) }
}
#[inline]
pub fn set_OPDCH(&mut self, val: u16) {
unsafe {
let val: u16 = ::core::mem::transmute(val);
self._bitfield_1.set(4usize, 2u8, val as u64)
}
}
#[inline]
pub unsafe fn OPDCH_raw(this: *const Self) -> u16 {
unsafe {
::core::mem::transmute(<__BindgenBitfieldUnit<[u8; 2usize]>>::raw_get(
::core::ptr::addr_of!((*this)._bitfield_1),
4usize,
2u8,
) as u16)
}
}
#[inline]
pub unsafe fn set_OPDCH_raw(this: *mut Self, val: u16) {
unsafe {
let val: u16 = ::core::mem::transmute(val);
<__BindgenBitfieldUnit<[u8; 2usize]>>::raw_set(
::core::ptr::addr_of_mut!((*this)._bitfield_1),
4usize,
2u8,
val as u64,
)
}
}
#[inline]
pub fn OPPKH(&self) -> u16 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(6usize, 2u8) as u16) }
}
#[inline]
pub fn set_OPPKH(&mut self, val: u16) {
unsafe {
let val: u16 = ::core::mem::transmute(val);
self._bitfield_1.set(6usize, 2u8, val as u64)
}
}
#[inline]
pub unsafe fn OPPKH_raw(this: *const Self) -> u16 {
unsafe {
::core::mem::transmute(<__BindgenBitfieldUnit<[u8; 2usize]>>::raw_get(
::core::ptr::addr_of!((*this)._bitfield_1),
6usize,
2u8,
) as u16)
}
}
#[inline]
pub unsafe fn set_OPPKH_raw(this: *mut Self, val: u16) {
unsafe {
let val: u16 = ::core::mem::transmute(val);
<__BindgenBitfieldUnit<[u8; 2usize]>>::raw_set(
::core::ptr::addr_of_mut!((*this)._bitfield_1),
6usize,
2u8,
val as u64,
)
}
}
#[inline]
pub fn OPUCH(&self) -> u16 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(8usize, 2u8) as u16) }
}
#[inline]
pub fn set_OPUCH(&mut self, val: u16) {
unsafe {
let val: u16 = ::core::mem::transmute(val);
self._bitfield_1.set(8usize, 2u8, val as u64)
}
}
#[inline]
pub unsafe fn OPUCH_raw(this: *const Self) -> u16 {
unsafe {
::core::mem::transmute(<__BindgenBitfieldUnit<[u8; 2usize]>>::raw_get(
::core::ptr::addr_of!((*this)._bitfield_1),
8usize,
2u8,
) as u16)
}
}
#[inline]
pub unsafe fn set_OPUCH_raw(this: *mut Self, val: u16) {
unsafe {
let val: u16 = ::core::mem::transmute(val);
<__BindgenBitfieldUnit<[u8; 2usize]>>::raw_set(
::core::ptr::addr_of_mut!((*this)._bitfield_1),
8usize,
2u8,
val as u64,
)
}
}
#[inline]
pub fn OPZRH(&self) -> u16 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(10usize, 2u8) as u16) }
}
#[inline]
pub fn set_OPZRH(&mut self, val: u16) {
unsafe {
let val: u16 = ::core::mem::transmute(val);
self._bitfield_1.set(10usize, 2u8, val as u64)
}
}
#[inline]
pub unsafe fn OPZRH_raw(this: *const Self) -> u16 {
unsafe {
::core::mem::transmute(<__BindgenBitfieldUnit<[u8; 2usize]>>::raw_get(
::core::ptr::addr_of!((*this)._bitfield_1),
10usize,
2u8,
) as u16)
}
}
#[inline]
pub unsafe fn set_OPZRH_raw(this: *mut Self, val: u16) {
unsafe {
let val: u16 = ::core::mem::transmute(val);
<__BindgenBitfieldUnit<[u8; 2usize]>>::raw_set(
::core::ptr::addr_of_mut!((*this)._bitfield_1),
10usize,
2u8,
val as u64,
)
}
}
#[inline]
pub fn OPNPKH(&self) -> u16 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(12usize, 2u8) as u16) }
}
#[inline]
pub fn set_OPNPKH(&mut self, val: u16) {
unsafe {
let val: u16 = ::core::mem::transmute(val);
self._bitfield_1.set(12usize, 2u8, val as u64)
}
}
#[inline]
pub unsafe fn OPNPKH_raw(this: *const Self) -> u16 {
unsafe {
::core::mem::transmute(<__BindgenBitfieldUnit<[u8; 2usize]>>::raw_get(
::core::ptr::addr_of!((*this)._bitfield_1),
12usize,
2u8,
) as u16)
}
}
#[inline]
pub unsafe fn set_OPNPKH_raw(this: *mut Self, val: u16) {
unsafe {
let val: u16 = ::core::mem::transmute(val);
<__BindgenBitfieldUnit<[u8; 2usize]>>::raw_set(
::core::ptr::addr_of_mut!((*this)._bitfield_1),
12usize,
2u8,
val as u64,
)
}
}
#[inline]
pub fn OPNZRH(&self) -> u16 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(14usize, 2u8) as u16) }
}
#[inline]
pub fn set_OPNZRH(&mut self, val: u16) {
unsafe {
let val: u16 = ::core::mem::transmute(val);
self._bitfield_1.set(14usize, 2u8, val as u64)
}
}
#[inline]
pub unsafe fn OPNZRH_raw(this: *const Self) -> u16 {
unsafe {
::core::mem::transmute(<__BindgenBitfieldUnit<[u8; 2usize]>>::raw_get(
::core::ptr::addr_of!((*this)._bitfield_1),
14usize,
2u8,
) as u16)
}
}
#[inline]
pub unsafe fn set_OPNZRH_raw(this: *mut Self, val: u16) {
unsafe {
let val: u16 = ::core::mem::transmute(val);
<__BindgenBitfieldUnit<[u8; 2usize]>>::raw_set(
::core::ptr::addr_of_mut!((*this)._bitfield_1),
14usize,
2u8,
val as u64,
)
}
}
#[inline]
pub fn new_bitfield_1(
OCFDCH: u16,
OCFPKH: u16,
OCFUCH: u16,
OCFZRH: u16,
OPDCH: u16,
OPPKH: u16,
OPUCH: u16,
OPZRH: u16,
OPNPKH: u16,
OPNZRH: u16,
) -> __BindgenBitfieldUnit<[u8; 2usize]> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 2usize]> = Default::default();
__bindgen_bitfield_unit.set(0usize, 1u8, {
let OCFDCH: u16 = unsafe { ::core::mem::transmute(OCFDCH) };
OCFDCH as u64
});
__bindgen_bitfield_unit.set(1usize, 1u8, {
let OCFPKH: u16 = unsafe { ::core::mem::transmute(OCFPKH) };
OCFPKH as u64
});
__bindgen_bitfield_unit.set(2usize, 1u8, {
let OCFUCH: u16 = unsafe { ::core::mem::transmute(OCFUCH) };
OCFUCH as u64
});
__bindgen_bitfield_unit.set(3usize, 1u8, {
let OCFZRH: u16 = unsafe { ::core::mem::transmute(OCFZRH) };
OCFZRH as u64
});
__bindgen_bitfield_unit.set(4usize, 2u8, {
let OPDCH: u16 = unsafe { ::core::mem::transmute(OPDCH) };
OPDCH as u64
});
__bindgen_bitfield_unit.set(6usize, 2u8, {
let OPPKH: u16 = unsafe { ::core::mem::transmute(OPPKH) };
OPPKH as u64
});
__bindgen_bitfield_unit.set(8usize, 2u8, {
let OPUCH: u16 = unsafe { ::core::mem::transmute(OPUCH) };
OPUCH as u64
});
__bindgen_bitfield_unit.set(10usize, 2u8, {
let OPZRH: u16 = unsafe { ::core::mem::transmute(OPZRH) };
OPZRH as u64
});
__bindgen_bitfield_unit.set(12usize, 2u8, {
let OPNPKH: u16 = unsafe { ::core::mem::transmute(OPNPKH) };
OPNPKH as u64
});
__bindgen_bitfield_unit.set(14usize, 2u8, {
let OPNZRH: u16 = unsafe { ::core::mem::transmute(OPNZRH) };
OPNZRH as u64
});
__bindgen_bitfield_unit
}
}
#[doc = " @brief The configuration of Output-Compare low channel(OUL/OVL/OWL)"]
#[repr(C)]
#[derive(Copy, Clone)]
pub union un_tmr4_oc_ocmrl_t {
#[doc = "< OCMRxL(x=U/V/W) register"]
pub OCMRx: u32,
pub OCMRx_f: un_tmr4_oc_ocmrl_t__bindgen_ty_1,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone, PartialEq)]
pub struct un_tmr4_oc_ocmrl_t__bindgen_ty_1 {
pub _bitfield_align_1: [u8; 0],
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize]>,
}
impl un_tmr4_oc_ocmrl_t__bindgen_ty_1 {
#[inline]
pub fn OCFDCL(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 1u8) as u32) }
}
#[inline]
pub fn set_OCFDCL(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 1u8, val as u64)
}
}
#[inline]
pub unsafe fn OCFDCL_raw(this: *const Self) -> u32 {
unsafe {
::core::mem::transmute(<__BindgenBitfieldUnit<[u8; 4usize]>>::raw_get(
::core::ptr::addr_of!((*this)._bitfield_1),
0usize,
1u8,
) as u32)
}
}
#[inline]
pub unsafe fn set_OCFDCL_raw(this: *mut Self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
<__BindgenBitfieldUnit<[u8; 4usize]>>::raw_set(
::core::ptr::addr_of_mut!((*this)._bitfield_1),
0usize,
1u8,
val as u64,
)
}
}
#[inline]
pub fn OCFPKL(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(1usize, 1u8) as u32) }
}
#[inline]
pub fn set_OCFPKL(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(1usize, 1u8, val as u64)
}
}
#[inline]
pub unsafe fn OCFPKL_raw(this: *const Self) -> u32 {
unsafe {
::core::mem::transmute(<__BindgenBitfieldUnit<[u8; 4usize]>>::raw_get(
::core::ptr::addr_of!((*this)._bitfield_1),
1usize,
1u8,
) as u32)
}
}
#[inline]
pub unsafe fn set_OCFPKL_raw(this: *mut Self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
<__BindgenBitfieldUnit<[u8; 4usize]>>::raw_set(
::core::ptr::addr_of_mut!((*this)._bitfield_1),
1usize,
1u8,
val as u64,
)
}
}
#[inline]
pub fn OCFUCL(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(2usize, 1u8) as u32) }
}
#[inline]
pub fn set_OCFUCL(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(2usize, 1u8, val as u64)
}
}
#[inline]
pub unsafe fn OCFUCL_raw(this: *const Self) -> u32 {
unsafe {
::core::mem::transmute(<__BindgenBitfieldUnit<[u8; 4usize]>>::raw_get(
::core::ptr::addr_of!((*this)._bitfield_1),
2usize,
1u8,
) as u32)
}
}
#[inline]
pub unsafe fn set_OCFUCL_raw(this: *mut Self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
<__BindgenBitfieldUnit<[u8; 4usize]>>::raw_set(
::core::ptr::addr_of_mut!((*this)._bitfield_1),
2usize,
1u8,
val as u64,
)
}
}
#[inline]
pub fn OCFZRL(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(3usize, 1u8) as u32) }
}
#[inline]
pub fn set_OCFZRL(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(3usize, 1u8, val as u64)
}
}
#[inline]
pub unsafe fn OCFZRL_raw(this: *const Self) -> u32 {
unsafe {
::core::mem::transmute(<__BindgenBitfieldUnit<[u8; 4usize]>>::raw_get(
::core::ptr::addr_of!((*this)._bitfield_1),
3usize,
1u8,
) as u32)
}
}
#[inline]
pub unsafe fn set_OCFZRL_raw(this: *mut Self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
<__BindgenBitfieldUnit<[u8; 4usize]>>::raw_set(
::core::ptr::addr_of_mut!((*this)._bitfield_1),
3usize,
1u8,
val as u64,
)
}
}
#[inline]
pub fn OPDCL(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(4usize, 2u8) as u32) }
}
#[inline]
pub fn set_OPDCL(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(4usize, 2u8, val as u64)
}
}
#[inline]
pub unsafe fn OPDCL_raw(this: *const Self) -> u32 {
unsafe {
::core::mem::transmute(<__BindgenBitfieldUnit<[u8; 4usize]>>::raw_get(
::core::ptr::addr_of!((*this)._bitfield_1),
4usize,
2u8,
) as u32)
}
}
#[inline]
pub unsafe fn set_OPDCL_raw(this: *mut Self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
<__BindgenBitfieldUnit<[u8; 4usize]>>::raw_set(
::core::ptr::addr_of_mut!((*this)._bitfield_1),
4usize,
2u8,
val as u64,
)
}
}
#[inline]
pub fn OPPKL(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(6usize, 2u8) as u32) }
}
#[inline]
pub fn set_OPPKL(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(6usize, 2u8, val as u64)
}
}
#[inline]
pub unsafe fn OPPKL_raw(this: *const Self) -> u32 {
unsafe {
::core::mem::transmute(<__BindgenBitfieldUnit<[u8; 4usize]>>::raw_get(
::core::ptr::addr_of!((*this)._bitfield_1),
6usize,
2u8,
) as u32)
}
}
#[inline]
pub unsafe fn set_OPPKL_raw(this: *mut Self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
<__BindgenBitfieldUnit<[u8; 4usize]>>::raw_set(
::core::ptr::addr_of_mut!((*this)._bitfield_1),
6usize,
2u8,
val as u64,
)
}
}
#[inline]
pub fn OPUCL(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(8usize, 2u8) as u32) }
}
#[inline]
pub fn set_OPUCL(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(8usize, 2u8, val as u64)
}
}
#[inline]
pub unsafe fn OPUCL_raw(this: *const Self) -> u32 {
unsafe {
::core::mem::transmute(<__BindgenBitfieldUnit<[u8; 4usize]>>::raw_get(
::core::ptr::addr_of!((*this)._bitfield_1),
8usize,
2u8,
) as u32)
}
}
#[inline]
pub unsafe fn set_OPUCL_raw(this: *mut Self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
<__BindgenBitfieldUnit<[u8; 4usize]>>::raw_set(
::core::ptr::addr_of_mut!((*this)._bitfield_1),
8usize,
2u8,
val as u64,
)
}
}
#[inline]
pub fn OPZRL(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(10usize, 2u8) as u32) }
}
#[inline]
pub fn set_OPZRL(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(10usize, 2u8, val as u64)
}
}
#[inline]
pub unsafe fn OPZRL_raw(this: *const Self) -> u32 {
unsafe {
::core::mem::transmute(<__BindgenBitfieldUnit<[u8; 4usize]>>::raw_get(
::core::ptr::addr_of!((*this)._bitfield_1),
10usize,
2u8,
) as u32)
}
}
#[inline]
pub unsafe fn set_OPZRL_raw(this: *mut Self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
<__BindgenBitfieldUnit<[u8; 4usize]>>::raw_set(
::core::ptr::addr_of_mut!((*this)._bitfield_1),
10usize,
2u8,
val as u64,
)
}
}
#[inline]
pub fn OPNPKL(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(12usize, 2u8) as u32) }
}
#[inline]
pub fn set_OPNPKL(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(12usize, 2u8, val as u64)
}
}
#[inline]
pub unsafe fn OPNPKL_raw(this: *const Self) -> u32 {
unsafe {
::core::mem::transmute(<__BindgenBitfieldUnit<[u8; 4usize]>>::raw_get(
::core::ptr::addr_of!((*this)._bitfield_1),
12usize,
2u8,
) as u32)
}
}
#[inline]
pub unsafe fn set_OPNPKL_raw(this: *mut Self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
<__BindgenBitfieldUnit<[u8; 4usize]>>::raw_set(
::core::ptr::addr_of_mut!((*this)._bitfield_1),
12usize,
2u8,
val as u64,
)
}
}
#[inline]
pub fn OPNZRL(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(14usize, 2u8) as u32) }
}
#[inline]
pub fn set_OPNZRL(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(14usize, 2u8, val as u64)
}
}
#[inline]
pub unsafe fn OPNZRL_raw(this: *const Self) -> u32 {
unsafe {
::core::mem::transmute(<__BindgenBitfieldUnit<[u8; 4usize]>>::raw_get(
::core::ptr::addr_of!((*this)._bitfield_1),
14usize,
2u8,
) as u32)
}
}
#[inline]
pub unsafe fn set_OPNZRL_raw(this: *mut Self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
<__BindgenBitfieldUnit<[u8; 4usize]>>::raw_set(
::core::ptr::addr_of_mut!((*this)._bitfield_1),
14usize,
2u8,
val as u64,
)
}
}
#[inline]
pub fn EOPNDCL(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(16usize, 2u8) as u32) }
}
#[inline]
pub fn set_EOPNDCL(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(16usize, 2u8, val as u64)
}
}
#[inline]
pub unsafe fn EOPNDCL_raw(this: *const Self) -> u32 {
unsafe {
::core::mem::transmute(<__BindgenBitfieldUnit<[u8; 4usize]>>::raw_get(
::core::ptr::addr_of!((*this)._bitfield_1),
16usize,
2u8,
) as u32)
}
}
#[inline]
pub unsafe fn set_EOPNDCL_raw(this: *mut Self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
<__BindgenBitfieldUnit<[u8; 4usize]>>::raw_set(
::core::ptr::addr_of_mut!((*this)._bitfield_1),
16usize,
2u8,
val as u64,
)
}
}
#[inline]
pub fn EOPNUCL(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(18usize, 2u8) as u32) }
}
#[inline]
pub fn set_EOPNUCL(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(18usize, 2u8, val as u64)
}
}
#[inline]
pub unsafe fn EOPNUCL_raw(this: *const Self) -> u32 {
unsafe {
::core::mem::transmute(<__BindgenBitfieldUnit<[u8; 4usize]>>::raw_get(
::core::ptr::addr_of!((*this)._bitfield_1),
18usize,
2u8,
) as u32)
}
}
#[inline]
pub unsafe fn set_EOPNUCL_raw(this: *mut Self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
<__BindgenBitfieldUnit<[u8; 4usize]>>::raw_set(
::core::ptr::addr_of_mut!((*this)._bitfield_1),
18usize,
2u8,
val as u64,
)
}
}
#[inline]
pub fn EOPDCL(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(20usize, 2u8) as u32) }
}
#[inline]
pub fn set_EOPDCL(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(20usize, 2u8, val as u64)
}
}
#[inline]
pub unsafe fn EOPDCL_raw(this: *const Self) -> u32 {
unsafe {
::core::mem::transmute(<__BindgenBitfieldUnit<[u8; 4usize]>>::raw_get(
::core::ptr::addr_of!((*this)._bitfield_1),
20usize,
2u8,
) as u32)
}
}
#[inline]
pub unsafe fn set_EOPDCL_raw(this: *mut Self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
<__BindgenBitfieldUnit<[u8; 4usize]>>::raw_set(
::core::ptr::addr_of_mut!((*this)._bitfield_1),
20usize,
2u8,
val as u64,
)
}
}
#[inline]
pub fn EOPPKL(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(22usize, 2u8) as u32) }
}
#[inline]
pub fn set_EOPPKL(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(22usize, 2u8, val as u64)
}
}
#[inline]
pub unsafe fn EOPPKL_raw(this: *const Self) -> u32 {
unsafe {
::core::mem::transmute(<__BindgenBitfieldUnit<[u8; 4usize]>>::raw_get(
::core::ptr::addr_of!((*this)._bitfield_1),
22usize,
2u8,
) as u32)
}
}
#[inline]
pub unsafe fn set_EOPPKL_raw(this: *mut Self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
<__BindgenBitfieldUnit<[u8; 4usize]>>::raw_set(
::core::ptr::addr_of_mut!((*this)._bitfield_1),
22usize,
2u8,
val as u64,
)
}
}
#[inline]
pub fn EOPUCL(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(24usize, 2u8) as u32) }
}
#[inline]
pub fn set_EOPUCL(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(24usize, 2u8, val as u64)
}
}
#[inline]
pub unsafe fn EOPUCL_raw(this: *const Self) -> u32 {
unsafe {
::core::mem::transmute(<__BindgenBitfieldUnit<[u8; 4usize]>>::raw_get(
::core::ptr::addr_of!((*this)._bitfield_1),
24usize,
2u8,
) as u32)
}
}
#[inline]
pub unsafe fn set_EOPUCL_raw(this: *mut Self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
<__BindgenBitfieldUnit<[u8; 4usize]>>::raw_set(
::core::ptr::addr_of_mut!((*this)._bitfield_1),
24usize,
2u8,
val as u64,
)
}
}
#[inline]
pub fn EOPZRL(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(26usize, 2u8) as u32) }
}
#[inline]
pub fn set_EOPZRL(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(26usize, 2u8, val as u64)
}
}
#[inline]
pub unsafe fn EOPZRL_raw(this: *const Self) -> u32 {
unsafe {
::core::mem::transmute(<__BindgenBitfieldUnit<[u8; 4usize]>>::raw_get(
::core::ptr::addr_of!((*this)._bitfield_1),
26usize,
2u8,
) as u32)
}
}
#[inline]
pub unsafe fn set_EOPZRL_raw(this: *mut Self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
<__BindgenBitfieldUnit<[u8; 4usize]>>::raw_set(
::core::ptr::addr_of_mut!((*this)._bitfield_1),
26usize,
2u8,
val as u64,
)
}
}
#[inline]
pub fn EOPNPKL(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(28usize, 2u8) as u32) }
}
#[inline]
pub fn set_EOPNPKL(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(28usize, 2u8, val as u64)
}
}
#[inline]
pub unsafe fn EOPNPKL_raw(this: *const Self) -> u32 {
unsafe {
::core::mem::transmute(<__BindgenBitfieldUnit<[u8; 4usize]>>::raw_get(
::core::ptr::addr_of!((*this)._bitfield_1),
28usize,
2u8,
) as u32)
}
}
#[inline]
pub unsafe fn set_EOPNPKL_raw(this: *mut Self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
<__BindgenBitfieldUnit<[u8; 4usize]>>::raw_set(
::core::ptr::addr_of_mut!((*this)._bitfield_1),
28usize,
2u8,
val as u64,
)
}
}
#[inline]
pub fn EOPNZRL(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(30usize, 2u8) as u32) }
}
#[inline]
pub fn set_EOPNZRL(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(30usize, 2u8, val as u64)
}
}
#[inline]
pub unsafe fn EOPNZRL_raw(this: *const Self) -> u32 {
unsafe {
::core::mem::transmute(<__BindgenBitfieldUnit<[u8; 4usize]>>::raw_get(
::core::ptr::addr_of!((*this)._bitfield_1),
30usize,
2u8,
) as u32)
}
}
#[inline]
pub unsafe fn set_EOPNZRL_raw(this: *mut Self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
<__BindgenBitfieldUnit<[u8; 4usize]>>::raw_set(
::core::ptr::addr_of_mut!((*this)._bitfield_1),
30usize,
2u8,
val as u64,
)
}
}
#[inline]
pub fn new_bitfield_1(
OCFDCL: u32,
OCFPKL: u32,
OCFUCL: u32,
OCFZRL: u32,
OPDCL: u32,
OPPKL: u32,
OPUCL: u32,
OPZRL: u32,
OPNPKL: u32,
OPNZRL: u32,
EOPNDCL: u32,
EOPNUCL: u32,
EOPDCL: u32,
EOPPKL: u32,
EOPUCL: u32,
EOPZRL: u32,
EOPNPKL: u32,
EOPNZRL: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize]> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize]> = Default::default();
__bindgen_bitfield_unit.set(0usize, 1u8, {
let OCFDCL: u32 = unsafe { ::core::mem::transmute(OCFDCL) };
OCFDCL as u64
});
__bindgen_bitfield_unit.set(1usize, 1u8, {
let OCFPKL: u32 = unsafe { ::core::mem::transmute(OCFPKL) };
OCFPKL as u64
});
__bindgen_bitfield_unit.set(2usize, 1u8, {
let OCFUCL: u32 = unsafe { ::core::mem::transmute(OCFUCL) };
OCFUCL as u64
});
__bindgen_bitfield_unit.set(3usize, 1u8, {
let OCFZRL: u32 = unsafe { ::core::mem::transmute(OCFZRL) };
OCFZRL as u64
});
__bindgen_bitfield_unit.set(4usize, 2u8, {
let OPDCL: u32 = unsafe { ::core::mem::transmute(OPDCL) };
OPDCL as u64
});
__bindgen_bitfield_unit.set(6usize, 2u8, {
let OPPKL: u32 = unsafe { ::core::mem::transmute(OPPKL) };
OPPKL as u64
});
__bindgen_bitfield_unit.set(8usize, 2u8, {
let OPUCL: u32 = unsafe { ::core::mem::transmute(OPUCL) };
OPUCL as u64
});
__bindgen_bitfield_unit.set(10usize, 2u8, {
let OPZRL: u32 = unsafe { ::core::mem::transmute(OPZRL) };
OPZRL as u64
});
__bindgen_bitfield_unit.set(12usize, 2u8, {
let OPNPKL: u32 = unsafe { ::core::mem::transmute(OPNPKL) };
OPNPKL as u64
});
__bindgen_bitfield_unit.set(14usize, 2u8, {
let OPNZRL: u32 = unsafe { ::core::mem::transmute(OPNZRL) };
OPNZRL as u64
});
__bindgen_bitfield_unit.set(16usize, 2u8, {
let EOPNDCL: u32 = unsafe { ::core::mem::transmute(EOPNDCL) };
EOPNDCL as u64
});
__bindgen_bitfield_unit.set(18usize, 2u8, {
let EOPNUCL: u32 = unsafe { ::core::mem::transmute(EOPNUCL) };
EOPNUCL as u64
});
__bindgen_bitfield_unit.set(20usize, 2u8, {
let EOPDCL: u32 = unsafe { ::core::mem::transmute(EOPDCL) };
EOPDCL as u64
});
__bindgen_bitfield_unit.set(22usize, 2u8, {
let EOPPKL: u32 = unsafe { ::core::mem::transmute(EOPPKL) };
EOPPKL as u64
});
__bindgen_bitfield_unit.set(24usize, 2u8, {
let EOPUCL: u32 = unsafe { ::core::mem::transmute(EOPUCL) };
EOPUCL as u64
});
__bindgen_bitfield_unit.set(26usize, 2u8, {
let EOPZRL: u32 = unsafe { ::core::mem::transmute(EOPZRL) };
EOPZRL as u64
});
__bindgen_bitfield_unit.set(28usize, 2u8, {
let EOPNPKL: u32 = unsafe { ::core::mem::transmute(EOPNPKL) };
EOPNPKL as u64
});
__bindgen_bitfield_unit.set(30usize, 2u8, {
let EOPNZRL: u32 = unsafe { ::core::mem::transmute(EOPNZRL) };
EOPNZRL as u64
});
__bindgen_bitfield_unit
}
}
#[doc = " @brief TMR4 Output-Compare(OC) initialization configuration"]
#[repr(C)]
#[derive(Debug, Copy, Clone, PartialEq)]
pub struct stc_tmr4_oc_init_t {
#[doc = "< TMR4 OC compare match value.\nThis parameter can be a value of half-word."]
pub u16CompareValue: u16,
#[doc = "< Port output polarity when OC is disabled.\nThis parameter can be a value of @ref TMR4_OC_Invalid_Output_Polarity."]
pub u16OcInvalidPolarity: u16,
#[doc = "< Register OCMR buffer transfer condition.\nThis parameter can be a value of @ref TMR4_OC_Buffer_Transfer_Condition."]
pub u16CompareModeBufCond: u16,
#[doc = "< Register OCCR buffer transfer condition.\nThis parameter can be a value of @ref TMR4_OC_Buffer_Transfer_Condition."]
pub u16CompareValueBufCond: u16,
#[doc = "< Enable the specified buffer register object linked transfer with the counter interrupt mask.\nThis parameter can be one or any combination of @ref TMR4_OC_Buffer_Object."]
pub u16BufLinkTransObject: u16,
}
#[doc = " @brief TMR4 PWM initialization configuration\n @note The clock division(u16ClockDiv) is valid when TMR4 clock source is the internal clock."]
#[repr(C)]
#[derive(Debug, Copy, Clone, PartialEq)]
pub struct stc_tmr4_pwm_init_t {
#[doc = "< Select PWM mode\nThis parameter can be a value of @ref TMR4_PWM_Mode"]
pub u16Mode: u16,
#[doc = "< The internal clock division of PWM timer.\nThis parameter can be a value of @ref TMR4_PWM_Clock_Division."]
pub u16ClockDiv: u16,
#[doc = "< TMR4 PWM polarity\nThis parameter can be a value of @ref TMR4_PWM_Polarity"]
pub u16Polarity: u16,
}
#[doc = " @brief TMR4 Special-Event(EVT) initialization configuration"]
#[repr(C)]
#[derive(Debug, Copy, Clone, PartialEq)]
pub struct stc_tmr4_evt_init_t {
#[doc = "< TMR4 event mode\nThis parameter can be a value of @ref TMR4_Event_Mode"]
pub u16Mode: u16,
#[doc = "< TMR4 event compare match value.\nThis parameter can be a value of half-word"]
pub u16CompareValue: u16,
#[doc = "< TMR4 event output event when match count compare condition.\nThis parameter can be a value of @ref TMR4_Event_Output_Event"]
pub u16OutputEvent: u16,
#[doc = "< Enable the specified count compare type with counter count to generate event.\nThis parameter can be a value of @ref TMR4_Event_Match_Condition"]
pub u16MatchCond: u16,
}
unsafe extern "C" {
#[doc = " @addtogroup TMR4_Counter_Global_Functions\n @{"]
pub fn TMR4_StructInit(pstcTmr4Init: *mut stc_tmr4_init_t) -> i32;
pub fn TMR4_Init(TMR4x: *mut CM_TMR4_TypeDef, pstcTmr4Init: *const stc_tmr4_init_t) -> i32;
pub fn TMR4_DeInit(TMR4x: *mut CM_TMR4_TypeDef) -> i32;
pub fn TMR4_SetClockSrc(TMR4x: *mut CM_TMR4_TypeDef, u16Src: u16);
pub fn TMR4_SetClockDiv(TMR4x: *mut CM_TMR4_TypeDef, u16Div: u16);
pub fn TMR4_SetCountMode(TMR4x: *mut CM_TMR4_TypeDef, u16Mode: u16);
pub fn TMR4_GetPeriodValue(TMR4x: *const CM_TMR4_TypeDef) -> u16;
pub fn TMR4_SetPeriodValue(TMR4x: *mut CM_TMR4_TypeDef, u16Value: u16);
pub fn TMR4_GetCountValue(TMR4x: *const CM_TMR4_TypeDef) -> u16;
pub fn TMR4_SetCountValue(TMR4x: *mut CM_TMR4_TypeDef, u16Value: u16);
pub fn TMR4_ClearCountValue(TMR4x: *mut CM_TMR4_TypeDef);
pub fn TMR4_Start(TMR4x: *mut CM_TMR4_TypeDef);
pub fn TMR4_Stop(TMR4x: *mut CM_TMR4_TypeDef);
pub fn TMR4_ClearStatus(TMR4x: *mut CM_TMR4_TypeDef, u32Flag: u32);
pub fn TMR4_GetStatus(TMR4x: *const CM_TMR4_TypeDef, u32Flag: u32) -> en_flag_status_t;
pub fn TMR4_IntCmd(
TMR4x: *mut CM_TMR4_TypeDef,
u32IntType: u32,
enNewState: en_functional_state_t,
);
pub fn TMR4_PeriodBufCmd(TMR4x: *mut CM_TMR4_TypeDef, enNewState: en_functional_state_t);
pub fn TMR4_GetCountIntMaskTime(TMR4x: *const CM_TMR4_TypeDef, u32IntType: u32) -> u16;
pub fn TMR4_SetCountIntMaskTime(TMR4x: *mut CM_TMR4_TypeDef, u32IntType: u32, u16MaskTime: u16);
pub fn TMR4_GetCurrentCountIntMaskTime(TMR4x: *const CM_TMR4_TypeDef, u32IntType: u32) -> u16;
pub fn TMR4_PortOutputCmd(TMR4x: *mut CM_TMR4_TypeDef, enNewState: en_functional_state_t);
pub fn TMR4_SyncStartCmd(TMR4x: *mut CM_TMR4_TypeDef, enNewState: en_functional_state_t);
pub fn TMR4_HWStartCmd(TMR4x: *mut CM_TMR4_TypeDef, enNewState: en_functional_state_t);
#[doc = " @addtogroup TMR4_Output_Compare_Global_Functions\n @{"]
pub fn TMR4_OC_StructInit(pstcTmr4OcInit: *mut stc_tmr4_oc_init_t) -> i32;
pub fn TMR4_OC_Init(
TMR4x: *mut CM_TMR4_TypeDef,
u32Ch: u32,
pstcTmr4OcInit: *const stc_tmr4_oc_init_t,
) -> i32;
pub fn TMR4_OC_DeInit(TMR4x: *mut CM_TMR4_TypeDef, u32Ch: u32);
pub fn TMR4_OC_SetCompareValue(TMR4x: *mut CM_TMR4_TypeDef, u32Ch: u32, u16Value: u16);
pub fn TMR4_OC_GetCompareValue(TMR4x: *const CM_TMR4_TypeDef, u32Ch: u32) -> u16;
pub fn TMR4_OC_Cmd(TMR4x: *mut CM_TMR4_TypeDef, u32Ch: u32, enNewState: en_functional_state_t);
pub fn TMR4_OC_ExtendControlCmd(
TMR4x: *mut CM_TMR4_TypeDef,
u32Ch: u32,
enNewState: en_functional_state_t,
);
pub fn TMR4_OC_BufIntervalResponseCmd(
TMR4x: *mut CM_TMR4_TypeDef,
u32Ch: u32,
u16Object: u16,
enNewState: en_functional_state_t,
);
pub fn TMR4_OC_GetPolarity(TMR4x: *const CM_TMR4_TypeDef, u32Ch: u32) -> u16;
pub fn TMR4_OC_SetOcInvalidPolarity(TMR4x: *mut CM_TMR4_TypeDef, u32Ch: u32, u16Polarity: u16);
pub fn TMR4_OC_SetCompareBufCond(
TMR4x: *mut CM_TMR4_TypeDef,
u32Ch: u32,
u16Object: u16,
u16BufCond: u16,
);
pub fn TMR4_OC_GetHighChCompareMode(TMR4x: *const CM_TMR4_TypeDef, u32Ch: u32) -> u16;
pub fn TMR4_OC_SetHighChCompareMode(
TMR4x: *mut CM_TMR4_TypeDef,
u32Ch: u32,
unTmr4Ocmrh: un_tmr4_oc_ocmrh_t,
);
pub fn TMR4_OC_GetLowChCompareMode(TMR4x: *const CM_TMR4_TypeDef, u32Ch: u32) -> u32;
pub fn TMR4_OC_SetLowChCompareMode(
TMR4x: *mut CM_TMR4_TypeDef,
u32Ch: u32,
unTmr4Ocmrl: un_tmr4_oc_ocmrl_t,
);
#[doc = " @addtogroup TMR4_PWM_Global_Functions\n @{"]
pub fn TMR4_PWM_StructInit(pstcTmr4PwmInit: *mut stc_tmr4_pwm_init_t) -> i32;
pub fn TMR4_PWM_Init(
TMR4x: *mut CM_TMR4_TypeDef,
u32Ch: u32,
pstcTmr4PwmInit: *const stc_tmr4_pwm_init_t,
) -> i32;
pub fn TMR4_PWM_DeInit(TMR4x: *mut CM_TMR4_TypeDef, u32Ch: u32);
pub fn TMR4_PWM_SetClockDiv(TMR4x: *mut CM_TMR4_TypeDef, u32Ch: u32, u16Div: u16);
pub fn TMR4_PWM_SetPolarity(TMR4x: *mut CM_TMR4_TypeDef, u32Ch: u32, u16Polarity: u16);
pub fn TMR4_PWM_StartReloadTimer(TMR4x: *mut CM_TMR4_TypeDef, u32Ch: u32);
pub fn TMR4_PWM_StopReloadTimer(TMR4x: *mut CM_TMR4_TypeDef, u32Ch: u32);
pub fn TMR4_PWM_SetFilterCountValue(TMR4x: *mut CM_TMR4_TypeDef, u32Ch: u32, u16Value: u16);
pub fn TMR4_PWM_SetDeadTimeValue(
TMR4x: *mut CM_TMR4_TypeDef,
u32Ch: u32,
u32DeadTimeIndex: u32,
u16Value: u16,
);
pub fn TMR4_PWM_GetDeadTimeValue(
TMR4x: *const CM_TMR4_TypeDef,
u32Ch: u32,
u32DeadTimeIndex: u32,
) -> u16;
pub fn TMR4_PWM_SetAbnormalPinStatus(
TMR4x: *mut CM_TMR4_TypeDef,
u32PwmPin: u32,
u32PinStatus: u32,
);
pub fn TMR4_PWM_SetOEEffectTime(TMR4x: *mut CM_TMR4_TypeDef, u32Time: u32);
pub fn TMR4_PWM_EmbHWMainOutputCmd(
TMR4x: *mut CM_TMR4_TypeDef,
enNewState: en_functional_state_t,
);
pub fn TMR4_PWM_MainOutputCmd(TMR4x: *mut CM_TMR4_TypeDef, enNewState: en_functional_state_t);
pub fn TMR4_PWM_SetPortOutputMode(TMR4x: *mut CM_TMR4_TypeDef, u32PwmPin: u32, u32Mode: u32);
#[doc = " @addtogroup TMR4_Event_Global_Functions\n @{"]
pub fn TMR4_EVT_StructInit(pstcTmr4EventInit: *mut stc_tmr4_evt_init_t) -> i32;
pub fn TMR4_EVT_Init(
TMR4x: *mut CM_TMR4_TypeDef,
u32Ch: u32,
pstcTmr4EventInit: *const stc_tmr4_evt_init_t,
) -> i32;
pub fn TMR4_EVT_DeInit(TMR4x: *mut CM_TMR4_TypeDef, u32Ch: u32);
pub fn TMR4_EVT_SetDelayObject(TMR4x: *mut CM_TMR4_TypeDef, u32Ch: u32, u16Object: u16);
pub fn TMR4_EVT_SetMaskTime(TMR4x: *mut CM_TMR4_TypeDef, u32Ch: u32, u16MaskTime: u16);
pub fn TMR4_EVT_GetMaskTime(TMR4x: *const CM_TMR4_TypeDef, u32Ch: u32) -> u16;
pub fn TMR4_EVT_SetCompareValue(TMR4x: *mut CM_TMR4_TypeDef, u32Ch: u32, u16Value: u16);
pub fn TMR4_EVT_GetCompareValue(TMR4x: *const CM_TMR4_TypeDef, u32Ch: u32) -> u16;
pub fn TMR4_EVT_SetOutputEvent(TMR4x: *mut CM_TMR4_TypeDef, u32Ch: u32, u16Event: u16);
pub fn TMR4_EVT_SetCompareBufCond(TMR4x: *mut CM_TMR4_TypeDef, u32Ch: u32, u16BufCond: u16);
pub fn TMR4_EVT_BufIntervalResponseCmd(
TMR4x: *mut CM_TMR4_TypeDef,
u32Ch: u32,
enNewState: en_functional_state_t,
);
pub fn TMR4_EVT_EventIntervalResponseCmd(
TMR4x: *mut CM_TMR4_TypeDef,
u32Ch: u32,
u16MaskType: u16,
enNewState: en_functional_state_t,
);
pub fn TMR4_EVT_MatchCondCmd(
TMR4x: *mut CM_TMR4_TypeDef,
u32Ch: u32,
u16Cond: u16,
enNewState: en_functional_state_t,
);
pub fn TMR4_EVT_SetOutputEventSignal(TMR4x: *mut CM_TMR4_TypeDef, u16Signal: u16);
}