hc32f448_driver_sys 0.1.1

Provide driver function binding for HDSC's HC32F448 MCU.
Documentation 
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/* automatically generated by rust-bindgen 0.72.1 */

pub const EFM_START_ADDR: u32 = 0;
pub const EFM_END_ADDR: u32 = 262143;
pub const EFM_OTP_END_ADDR1: u32 = 8191;
pub const EFM_OTP_START_ADDR1: u32 = 0;
pub const EFM_OTP_START_ADDR: u32 = 50334720;
pub const EFM_OTP_END_ADDR: u32 = 50335743;
pub const EFM_OTP_LOCK_ADDR_START: u32 = 50334336;
pub const EFM_OTP_LOCK_ADDR_START1: u32 = 50334400;
pub const EFM_OTP_LOCK_ADDR_END: u32 = 50334463;
pub const EFM_OTP_ENABLE_ADDR: u32 = 50334208;
pub const EFM_SECURITY_START_ADDR: u32 = 50339904;
pub const EFM_SECURITY_END_ADDR: u32 = 50339915;
pub const EFM_CHIP_ALL: u32 = 1;
pub const EFM_BUS_HOLD: u32 = 0;
pub const EFM_BUS_RELEASE: u32 = 1;
pub const EFM_WAIT_CYCLE0: u32 = 0;
pub const EFM_WAIT_CYCLE1: u32 = 1;
pub const EFM_WAIT_CYCLE2: u32 = 2;
pub const EFM_WAIT_CYCLE3: u32 = 3;
pub const EFM_WAIT_CYCLE4: u32 = 4;
pub const EFM_WAIT_CYCLE5: u32 = 5;
pub const EFM_WAIT_CYCLE6: u32 = 6;
pub const EFM_WAIT_CYCLE7: u32 = 7;
pub const EFM_WAIT_CYCLE8: u32 = 8;
pub const EFM_WAIT_CYCLE9: u32 = 9;
pub const EFM_WAIT_CYCLE10: u32 = 10;
pub const EFM_WAIT_CYCLE11: u32 = 11;
pub const EFM_WAIT_CYCLE12: u32 = 12;
pub const EFM_WAIT_CYCLE13: u32 = 13;
pub const EFM_WAIT_CYCLE14: u32 = 14;
pub const EFM_WAIT_CYCLE15: u32 = 15;
pub const EFM_RD_ICACHE: u32 = 65536;
pub const EFM_RD_DCACHE: u32 = 131072;
pub const EFM_RD_PREFETCH: u32 = 262144;
pub const EFM_CACHE_ALL: u32 = 458752;
pub const EFM_SWAP_ADDR: u32 = 50339840;
pub const EFM_SWAP_DATA: u32 = 5921370;
pub const EFM_MD_READONLY: u32 = 0;
pub const EFM_MD_PGM_SINGLE: u32 = 1;
pub const EFM_MD_PGM_READBACK: u32 = 2;
pub const EFM_MD_PGM_SEQ: u32 = 3;
pub const EFM_MD_ERASE_SECTOR: u32 = 4;
pub const EFM_MD_ERASE_ALL_CHIP: u32 = 5;
pub const EFM_PGM_PAD_BYTE: u32 = 255;
pub const EFM_PGM_UNIT_BYTES: u32 = 4;
pub const EFM_FLAG_OTPWERR: u32 = 1;
pub const EFM_FLAG_PEPRTERR: u32 = 2;
pub const EFM_FLAG_PGSZERR: u32 = 4;
pub const EFM_FLAG_PGMISMTCH: u32 = 8;
pub const EFM_FLAG_OPTEND: u32 = 16;
pub const EFM_FLAG_COLERR: u32 = 32;
pub const EFM_FLAG_RDY: u32 = 256;
pub const EFM_FLAG_ERR: u32 = 47;
pub const EFM_FLAG_ALL: u32 = 319;
pub const EFM_FLAG_RDY_ALL: u32 = 256;
pub const EFM_INT_PEERR: u32 = 1;
pub const EFM_INT_OPTEND: u32 = 2;
pub const EFM_INT_COLERR: u32 = 4;
pub const EFM_INT_ALL: u32 = 7;
pub const EFM_REG_UNLOCK_KEY1: u32 = 291;
pub const EFM_REG_UNLOCK_KEY2: u32 = 12816;
pub const EFM_REG_LOCK_KEY: u32 = 0;
pub const EFM_SECTOR_SIZE: u32 = 8192;
pub const EFM_OTP_UNLOCK_KEY1: u32 = 271733878;
pub const EFM_OTP_UNLOCK_KEY2: u32 = 4023233417;
pub const EFM_OTP_BASE1_ADDR: u32 = 0;
pub const EFM_OTP_BASE1_SIZE: u32 = 8192;
pub const EFM_OTP_BASE2_ADDR: u32 = 50334720;
pub const EFM_OTP_BASE2_SIZE: u32 = 64;
pub const EFM_OTP_LOCK_ADDR0: u32 = 50334336;
pub const EFM_OTP_LOCK_ADDR1: u32 = 50334400;
pub const EFM_OTP_BLOCK0: u32 = 0;
pub const EFM_OTP_BLOCK1: u32 = 50334720;
pub const EFM_OTP_BLOCK2: u32 = 50334784;
pub const EFM_OTP_BLOCK3: u32 = 50334848;
pub const EFM_OTP_BLOCK4: u32 = 50334912;
pub const EFM_OTP_BLOCK5: u32 = 50334976;
pub const EFM_OTP_BLOCK6: u32 = 50335040;
pub const EFM_OTP_BLOCK7: u32 = 50335104;
pub const EFM_OTP_BLOCK8: u32 = 50335168;
pub const EFM_OTP_BLOCK9: u32 = 50335232;
pub const EFM_OTP_BLOCK10: u32 = 50335296;
pub const EFM_OTP_BLOCK11: u32 = 50335360;
pub const EFM_OTP_BLOCK12: u32 = 50335424;
pub const EFM_OTP_BLOCK13: u32 = 50335488;
pub const EFM_OTP_BLOCK14: u32 = 50335552;
pub const EFM_OTP_BLOCK15: u32 = 50335616;
pub const EFM_OTP_BLOCK16: u32 = 50335680;
pub const EFM_OTP_BLOCK_IDX_MAX: u32 = 16;
pub const EFM_REMAP_REG_LOCK_KEY: u32 = 0;
pub const EFM_REMAP_REG_UNLOCK_KEY1: u32 = 291;
pub const EFM_REMAP_REG_UNLOCK_KEY2: u32 = 12816;
pub const EFM_REMAP_OFF: u32 = 0;
pub const EFM_REMAP_ON: u32 = 2147483648;
pub const EFM_REMAP_4K: u32 = 12;
pub const EFM_REMAP_8K: u32 = 13;
pub const EFM_REMAP_16K: u32 = 14;
pub const EFM_REMAP_32K: u32 = 15;
pub const EFM_REMAP_64K: u32 = 16;
pub const EFM_REMAP_128K: u32 = 17;
pub const EFM_REMAP_256K: u32 = 18;
pub const EFM_REMAP_SIZE_MAX: u32 = 18;
pub const EFM_REMAP_IDX0: u32 = 0;
pub const EFM_REMAP_IDX1: u32 = 1;
pub const EFM_REMAP_BASE_ADDR0: u32 = 33554432;
pub const EFM_REMAP_BASE_ADDR1: u32 = 34078720;
pub const EFM_REMAP_ROM_END_ADDR: u32 = 262143;
pub const EFM_REMAP_RAM_START_ADDR: u32 = 536838144;
pub const EFM_REMAP_RAM_END_ADDR: u32 = 536870911;
pub const EFM_PROTECT_LEVEL1: u32 = 1;
pub const EFM_PROTECT_LEVEL2: u32 = 2;
pub const EFM_PROTECT_LEVEL3: u32 = 4;
pub const EFM_PROTECT_LEVEL_ALL: u32 = 7;
pub const EFM_SECURITY_ADDR: u32 = 50339904;
pub const EFM_MCU_PROTECT1_FREE: u32 = 0;
pub const EFM_MCU_PROTECT1_LOCK: u32 = 1;
pub const EFM_MCU_PROTECT1_UNLOCK: u32 = 2;
pub const EFM_MCU_PROTECT2_LOCK: u32 = 4;
pub const en_functional_state_t_DISABLE: en_functional_state_t = 0;
pub const en_functional_state_t_ENABLE: en_functional_state_t = 1;
#[doc = " @brief Functional state"]
pub type en_functional_state_t = ::core::ffi::c_uint;
pub const en_flag_status_t_RESET: en_flag_status_t = 0;
pub const en_flag_status_t_SET: en_flag_status_t = 1;
#[doc = " @brief Flag status"]
pub type en_flag_status_t = ::core::ffi::c_uint;
#[doc = " @brief EFM unique ID definition"]
#[repr(C)]
#[derive(Debug, Copy, Clone, PartialEq)]
pub struct stc_efm_unique_id_t {
    #[doc = "< unique ID 0."]
    pub u32UniqueID0: u32,
    #[doc = "< unique ID 1."]
    pub u32UniqueID1: u32,
    #[doc = "< unique ID 2."]
    pub u32UniqueID2: u32,
}
#[repr(C)]
#[derive(Debug, Copy, Clone, PartialEq)]
pub struct stc_efm_remap_init_t {
    pub u32State: u32,
    pub u32Addr: u32,
    pub u32Size: u32,
}
#[doc = " @brief EFM location definition"]
#[repr(C)]
#[derive(Debug, Copy, Clone, PartialEq)]
pub struct stc_efm_location_t {
    #[doc = "< X location."]
    pub u8X_Location: u8,
    #[doc = "< Y location."]
    pub u8Y_Location: u8,
}
unsafe extern "C" {
    #[doc = " BASE"]
    pub fn EFM_Cmd(u32Flash: u32, enNewState: en_functional_state_t);
    pub fn EFM_FWMC_Cmd(enNewState: en_functional_state_t);
    pub fn EFM_SetBusStatus(u32Status: u32);
    pub fn EFM_IntCmd(u32EfmInt: u32, enNewState: en_functional_state_t);
    pub fn EFM_GetAnyStatus(u32Flag: u32) -> en_flag_status_t;
    pub fn EFM_GetStatus(u32Flag: u32) -> en_flag_status_t;
    pub fn EFM_ClearStatus(u32Flag: u32);
    pub fn EFM_SetWaitCycle(u32WaitCycle: u32) -> i32;
    pub fn EFM_SetOperateMode(u32Mode: u32) -> i32;
    pub fn EFM_GetUID(pstcUID: *mut stc_efm_unique_id_t);
    pub fn EFM_GetCID() -> u32;
    pub fn EFM_GetWaferID() -> u8;
    pub fn EFM_GetLocation(pstcLocation: *mut stc_efm_location_t);
    pub fn EFM_GetLotID() -> u64;
    pub fn EFM_CacheRamReset(enNewState: en_functional_state_t);
    pub fn EFM_CacheCmd(u32CacheSel: u32, enNewState: en_functional_state_t);
    #[doc = " SWAP"]
    pub fn EFM_SwapCmd(enNewState: en_functional_state_t) -> i32;
    pub fn EFM_GetSwapStatus() -> en_flag_status_t;
    #[doc = " OTP"]
    pub fn EFM_OTP_GetStatus() -> en_flag_status_t;
    pub fn EFM_OTP_Enable() -> i32;
    pub fn EFM_OTP_Lock(u32BlockStartIdx: u32, u16Count: u16) -> i32;
    #[doc = " ERASE"]
    pub fn EFM_SectorErase(u32Addr: u32) -> i32;
    pub fn EFM_SequenceSectorErase(u32StartSectorNum: u32, u16Count: u16) -> i32;
    pub fn EFM_ChipErase(u32Chip: u32) -> i32;
    #[doc = " WRITE"]
    pub fn EFM_Program(u32Addr: u32, pu8DataSrc: *const u8, u32ByteLen: u32) -> i32;
    pub fn EFM_ProgramReadBack(u32Addr: u32, pu8DataSrc: *const u8, u32ByteLen: u32) -> i32;
    pub fn EFM_SequenceProgram(u32Addr: u32, pu8DataSrc: *const u8, u32ByteLen: u32) -> i32;
    pub fn EFM_ProgramWord(u32Addr: u32, u32Data: u32) -> i32;
    pub fn EFM_ProgramWordReadBack(u32Addr: u32, u32Data: u32) -> i32;
    #[doc = " READ"]
    pub fn EFM_ReadByte(u32Addr: u32, pu8ReadBuf: *mut u8, u32ByteLen: u32) -> i32;
    pub fn EFM_LowVoltageReadCmd(enNewState: en_functional_state_t);
    #[doc = " PROTECT"]
    pub fn EFM_Protect_Enable(u8Level: u8);
    pub fn EFM_WriteSecurityCode(pu8Buf: *const u8, u32ByteLen: u32) -> i32;
    pub fn EFM_SectorProtectRegLock(u32RegLock: u32);
    pub fn EFM_SingleSectorOperateCmd(u32SectorNum: u32, enNewState: en_functional_state_t);
    pub fn EFM_SequenceSectorOperateCmd(
        u32StartSectorNum: u32,
        u16Count: u16,
        enNewState: en_functional_state_t,
    );
    #[doc = " REMAP"]
    pub fn EFM_REMAP_StructInit(pstcEfmRemapInit: *mut stc_efm_remap_init_t) -> i32;
    pub fn EFM_REMAP_Init(u8RemapIdx: u8, pstcEfmRemapInit: *mut stc_efm_remap_init_t) -> i32;
    pub fn EFM_REMAP_DeInit();
    pub fn EFM_REMAP_Cmd(u8RemapIdx: u8, enNewState: en_functional_state_t);
    pub fn EFM_REMAP_SetAddr(u8RemapIdx: u8, u32Addr: u32);
    pub fn EFM_REMAP_SetSize(u8RemapIdx: u8, u32Size: u32);
}