#[repr(C)]
#[derive(Copy, Clone, Debug, Default, Eq, Hash, Ord, PartialEq, PartialOrd)]
pub struct __BindgenBitfieldUnit<Storage> {
storage: Storage,
}
impl<Storage> __BindgenBitfieldUnit<Storage> {
#[inline]
pub const fn new(storage: Storage) -> Self {
Self { storage }
}
}
impl<Storage> __BindgenBitfieldUnit<Storage>
where
Storage: AsRef<[u8]> + AsMut<[u8]>,
{
#[inline]
fn extract_bit(byte: u8, index: usize) -> bool {
let bit_index = if cfg!(target_endian = "big") {
7 - (index % 8)
} else {
index % 8
};
let mask = 1 << bit_index;
byte & mask == mask
}
#[inline]
pub fn get_bit(&self, index: usize) -> bool {
debug_assert!(index / 8 < self.storage.as_ref().len());
let byte_index = index / 8;
let byte = self.storage.as_ref()[byte_index];
Self::extract_bit(byte, index)
}
#[inline]
pub unsafe fn raw_get_bit(this: *const Self, index: usize) -> bool {
debug_assert!(index / 8 < core::mem::size_of::<Storage>());
let byte_index = index / 8;
let byte = unsafe {
*(core::ptr::addr_of!((*this).storage) as *const u8).offset(byte_index as isize)
};
Self::extract_bit(byte, index)
}
#[inline]
fn change_bit(byte: u8, index: usize, val: bool) -> u8 {
let bit_index = if cfg!(target_endian = "big") {
7 - (index % 8)
} else {
index % 8
};
let mask = 1 << bit_index;
if val {
byte | mask
} else {
byte & !mask
}
}
#[inline]
pub fn set_bit(&mut self, index: usize, val: bool) {
debug_assert!(index / 8 < self.storage.as_ref().len());
let byte_index = index / 8;
let byte = &mut self.storage.as_mut()[byte_index];
*byte = Self::change_bit(*byte, index, val);
}
#[inline]
pub unsafe fn raw_set_bit(this: *mut Self, index: usize, val: bool) {
debug_assert!(index / 8 < core::mem::size_of::<Storage>());
let byte_index = index / 8;
let byte = unsafe {
(core::ptr::addr_of_mut!((*this).storage) as *mut u8).offset(byte_index as isize)
};
unsafe { *byte = Self::change_bit(*byte, index, val) };
}
#[inline]
pub fn get(&self, bit_offset: usize, bit_width: u8) -> u64 {
debug_assert!(bit_width <= 64);
debug_assert!(bit_offset / 8 < self.storage.as_ref().len());
debug_assert!((bit_offset + (bit_width as usize)) / 8 <= self.storage.as_ref().len());
let mut val = 0;
for i in 0..(bit_width as usize) {
if self.get_bit(i + bit_offset) {
let index = if cfg!(target_endian = "big") {
bit_width as usize - 1 - i
} else {
i
};
val |= 1 << index;
}
}
val
}
#[inline]
pub unsafe fn raw_get(this: *const Self, bit_offset: usize, bit_width: u8) -> u64 {
debug_assert!(bit_width <= 64);
debug_assert!(bit_offset / 8 < core::mem::size_of::<Storage>());
debug_assert!((bit_offset + (bit_width as usize)) / 8 <= core::mem::size_of::<Storage>());
let mut val = 0;
for i in 0..(bit_width as usize) {
if unsafe { Self::raw_get_bit(this, i + bit_offset) } {
let index = if cfg!(target_endian = "big") {
bit_width as usize - 1 - i
} else {
i
};
val |= 1 << index;
}
}
val
}
#[inline]
pub fn set(&mut self, bit_offset: usize, bit_width: u8, val: u64) {
debug_assert!(bit_width <= 64);
debug_assert!(bit_offset / 8 < self.storage.as_ref().len());
debug_assert!((bit_offset + (bit_width as usize)) / 8 <= self.storage.as_ref().len());
for i in 0..(bit_width as usize) {
let mask = 1 << i;
let val_bit_is_set = val & mask == mask;
let index = if cfg!(target_endian = "big") {
bit_width as usize - 1 - i
} else {
i
};
self.set_bit(index + bit_offset, val_bit_is_set);
}
}
#[inline]
pub unsafe fn raw_set(this: *mut Self, bit_offset: usize, bit_width: u8, val: u64) {
debug_assert!(bit_width <= 64);
debug_assert!(bit_offset / 8 < core::mem::size_of::<Storage>());
debug_assert!((bit_offset + (bit_width as usize)) / 8 <= core::mem::size_of::<Storage>());
for i in 0..(bit_width as usize) {
let mask = 1 << i;
let val_bit_is_set = val & mask == mask;
let index = if cfg!(target_endian = "big") {
bit_width as usize - 1 - i
} else {
i
};
unsafe { Self::raw_set_bit(this, index + bit_offset, val_bit_is_set) };
}
}
}
pub const CLK_PLL_OFF: u32 = 1;
pub const CLK_PLL_ON: u32 = 0;
pub const CLK_PLL_SRC_XTAL: u32 = 0;
pub const CLK_PLL_SRC_HRC: u32 = 1;
pub const CLK_XTAL_OFF: u32 = 1;
pub const CLK_XTAL_ON: u32 = 0;
pub const CLK_XTAL_DRV_HIGH: u32 = 0;
pub const CLK_XTAL_DRV_MID: u32 = 16;
pub const CLK_XTAL_DRV_LOW: u32 = 32;
pub const CLK_XTAL_DRV_ULOW: u32 = 48;
pub const CLK_XTAL_MD_OSC: u32 = 0;
pub const CLK_XTAL_MD_EXCLK: u32 = 64;
pub const CLK_XTAL_STB_133US: u32 = 1;
pub const CLK_XTAL_STB_255US: u32 = 2;
pub const CLK_XTAL_STB_499US: u32 = 3;
pub const CLK_XTAL_STB_988US: u32 = 4;
pub const CLK_XTAL_STB_2MS: u32 = 5;
pub const CLK_XTAL_STB_4MS: u32 = 6;
pub const CLK_XTAL_STB_8MS: u32 = 7;
pub const CLK_XTAL_STB_16MS: u32 = 8;
pub const CLK_XTAL_STB_31MS: u32 = 9;
pub const CLK_XTALDIV_OFF: u32 = 0;
pub const CLK_XTALDIV_ON: u32 = 1;
pub const CLK_XTALSTD_OFF: u32 = 0;
pub const CLK_XTALSTD_ON: u32 = 128;
pub const CLK_XTALSTD_EXP_TYPE_NONE: u32 = 0;
pub const CLK_XTALSTD_EXP_TYPE_RST: u32 = 6;
pub const CLK_XTALSTD_EXP_TYPE_INT: u32 = 1;
pub const CLK_XTAL32_OFF: u32 = 1;
pub const CLK_XTAL32_ON: u32 = 0;
pub const CLK_XTAL32_DRV_MID: u32 = 0;
pub const CLK_XTAL32_DRV_HIGH: u32 = 1;
pub const CLK_XTAL32_FILTER_ALL_MD: u32 = 0;
pub const CLK_XTAL32_FILTER_RUN_MD: u32 = 1;
pub const CLK_XTAL32_FILTER_OFF: u32 = 3;
pub const CLK_HRC_OFF: u32 = 1;
pub const CLK_HRC_ON: u32 = 0;
pub const CLK_STB_FLAG_HRC: u32 = 1;
pub const CLK_STB_FLAG_XTAL: u32 = 8;
pub const CLK_STB_FLAG_PLL: u32 = 32;
pub const CLK_STB_FLAG_MASK: u32 = 41;
pub const CLK_SYSCLK_SRC_HRC: u32 = 0;
pub const CLK_SYSCLK_SRC_MRC: u32 = 1;
pub const CLK_SYSCLK_SRC_LRC: u32 = 2;
pub const CLK_SYSCLK_SRC_XTAL: u32 = 3;
pub const CLK_SYSCLK_SRC_XTAL32: u32 = 4;
pub const CLK_SYSCLK_SRC_PLL: u32 = 5;
pub const CLK_BUS_PCLK0: u32 = 7;
pub const CLK_BUS_PCLK1: u32 = 112;
pub const CLK_BUS_PCLK2: u32 = 1792;
pub const CLK_BUS_PCLK3: u32 = 28672;
pub const CLK_BUS_PCLK4: u32 = 458752;
pub const CLK_BUS_EXCLK: u32 = 7340032;
pub const CLK_BUS_HCLK: u32 = 117440512;
pub const CLK_BUS_CLK_ALL: u32 = 125269879;
pub const CLK_SYSCLK_DIV1: u32 = 0;
pub const CLK_SYSCLK_DIV2: u32 = 1;
pub const CLK_SYSCLK_DIV4: u32 = 2;
pub const CLK_SYSCLK_DIV8: u32 = 3;
pub const CLK_SYSCLK_DIV16: u32 = 4;
pub const CLK_SYSCLK_DIV32: u32 = 5;
pub const CLK_SYSCLK_DIV64: u32 = 6;
pub const CLK_HCLK_DIV1: u32 = 0;
pub const CLK_HCLK_DIV2: u32 = 16777216;
pub const CLK_HCLK_DIV4: u32 = 33554432;
pub const CLK_HCLK_DIV8: u32 = 50331648;
pub const CLK_HCLK_DIV16: u32 = 67108864;
pub const CLK_HCLK_DIV32: u32 = 83886080;
pub const CLK_HCLK_DIV64: u32 = 100663296;
pub const CLK_PCLK1_DIV1: u32 = 0;
pub const CLK_PCLK1_DIV2: u32 = 16;
pub const CLK_PCLK1_DIV4: u32 = 32;
pub const CLK_PCLK1_DIV8: u32 = 48;
pub const CLK_PCLK1_DIV16: u32 = 64;
pub const CLK_PCLK1_DIV32: u32 = 80;
pub const CLK_PCLK1_DIV64: u32 = 96;
pub const CLK_PCLK4_DIV1: u32 = 0;
pub const CLK_PCLK4_DIV2: u32 = 65536;
pub const CLK_PCLK4_DIV4: u32 = 131072;
pub const CLK_PCLK4_DIV8: u32 = 196608;
pub const CLK_PCLK4_DIV16: u32 = 262144;
pub const CLK_PCLK4_DIV32: u32 = 327680;
pub const CLK_PCLK4_DIV64: u32 = 393216;
pub const CLK_PCLK3_DIV1: u32 = 0;
pub const CLK_PCLK3_DIV2: u32 = 4096;
pub const CLK_PCLK3_DIV4: u32 = 8192;
pub const CLK_PCLK3_DIV8: u32 = 12288;
pub const CLK_PCLK3_DIV16: u32 = 16384;
pub const CLK_PCLK3_DIV32: u32 = 20480;
pub const CLK_PCLK3_DIV64: u32 = 24576;
pub const CLK_EXCLK_DIV1: u32 = 0;
pub const CLK_EXCLK_DIV2: u32 = 1048576;
pub const CLK_EXCLK_DIV4: u32 = 2097152;
pub const CLK_EXCLK_DIV8: u32 = 3145728;
pub const CLK_EXCLK_DIV16: u32 = 4194304;
pub const CLK_EXCLK_DIV32: u32 = 5242880;
pub const CLK_EXCLK_DIV64: u32 = 6291456;
pub const CLK_PCLK2_DIV1: u32 = 0;
pub const CLK_PCLK2_DIV2: u32 = 256;
pub const CLK_PCLK2_DIV4: u32 = 512;
pub const CLK_PCLK2_DIV8: u32 = 768;
pub const CLK_PCLK2_DIV16: u32 = 1024;
pub const CLK_PCLK2_DIV32: u32 = 1280;
pub const CLK_PCLK2_DIV64: u32 = 1536;
pub const CLK_PCLK0_DIV1: u32 = 0;
pub const CLK_PCLK0_DIV2: u32 = 1;
pub const CLK_PCLK0_DIV4: u32 = 2;
pub const CLK_PCLK0_DIV8: u32 = 3;
pub const CLK_PCLK0_DIV16: u32 = 4;
pub const CLK_PCLK0_DIV32: u32 = 5;
pub const CLK_PCLK0_DIV64: u32 = 6;
pub const CLK_MCANCLK_SYSCLK_DIV2: u32 = 1;
pub const CLK_MCANCLK_SYSCLK_DIV3: u32 = 2;
pub const CLK_MCANCLK_SYSCLK_DIV4: u32 = 3;
pub const CLK_MCANCLK_SYSCLK_DIV5: u32 = 4;
pub const CLK_MCANCLK_SYSCLK_DIV6: u32 = 5;
pub const CLK_MCANCLK_SYSCLK_DIV7: u32 = 6;
pub const CLK_MCANCLK_SYSCLK_DIV8: u32 = 7;
pub const CLK_MCANCLK_PLLQ: u32 = 8;
pub const CLK_MCANCLK_PLLR: u32 = 9;
pub const CLK_MCANCLK_XTAL: u32 = 13;
pub const CLK_MCAN1: u32 = 1;
pub const CLK_MCAN2: u32 = 2;
pub const CLK_PERIPHCLK_PCLK: u32 = 0;
pub const CLK_PERIPHCLK_PLLQ: u32 = 8;
pub const CLK_PERIPHCLK_PLLR: u32 = 9;
pub const CLK_TPIUCLK_DIV1: u32 = 0;
pub const CLK_TPIUCLK_DIV2: u32 = 1;
pub const CLK_TPIUCLK_DIV4: u32 = 2;
pub const CLK_MCO1: u32 = 0;
pub const CLK_MCO2: u32 = 1;
pub const CLK_MCO_SRC_HRC: u32 = 0;
pub const CLK_MCO_SRC_MRC: u32 = 1;
pub const CLK_MCO_SRC_LRC: u32 = 2;
pub const CLK_MCO_SRC_XTAL: u32 = 3;
pub const CLK_MCO_SRC_XTAL32: u32 = 4;
pub const CLK_MCO_SRC_PLLP: u32 = 6;
pub const CLK_MCO_SRC_PLLQ: u32 = 8;
pub const CLK_MCO_SRC_HCLK: u32 = 11;
pub const CLK_MCO_DIV1: u32 = 0;
pub const CLK_MCO_DIV2: u32 = 16;
pub const CLK_MCO_DIV4: u32 = 32;
pub const CLK_MCO_DIV8: u32 = 48;
pub const CLK_MCO_DIV16: u32 = 64;
pub const CLK_MCO_DIV32: u32 = 80;
pub const CLK_MCO_DIV64: u32 = 96;
pub const CLK_MCO_DIV128: u32 = 112;
pub const en_functional_state_t_DISABLE: en_functional_state_t = 0;
pub const en_functional_state_t_ENABLE: en_functional_state_t = 1;
#[doc = " @brief Functional state"]
pub type en_functional_state_t = ::core::ffi::c_uint;
pub const en_flag_status_t_RESET: en_flag_status_t = 0;
pub const en_flag_status_t_SET: en_flag_status_t = 1;
#[doc = " @brief Flag status"]
pub type en_flag_status_t = ::core::ffi::c_uint;
#[doc = " Global type definitions ('typedef')\n/\n/**\n @defgroup CLK_Global_Types CLK Global Types\n @{\n/\n/**\n @brief CLK XTAL configuration structure definition"]
#[repr(C)]
#[derive(Debug, Copy, Clone, PartialEq)]
pub struct stc_clock_xtal_init_t {
#[doc = "< The new state of the XTAL.\nThis parameter can be a value of @ref CLK_XTAL_State"]
pub u8State: u8,
#[doc = "< The XTAL drive ability, only valid in OSC mode.\nThis parameter can be a value of @ref CLK_XTAL_Driver"]
pub u8Drv: u8,
#[doc = "< The XTAL mode selection osc or exclk.\nThis parameter can be a value of @ref CLK_XTAL_Mode_Selection"]
pub u8Mode: u8,
#[doc = "< The XTAL stable time selection.\nThis parameter can be a value of @ref CLK_XTAL_Stable_Time_Selection"]
pub u8StableTime: u8,
}
#[doc = " @brief CLK XTAL divide structure definition"]
#[repr(C)]
#[derive(Debug, Copy, Clone, PartialEq)]
pub struct stc_clock_xtaldiv_init_t {
#[doc = "< The new state of the XTAL divide.\nThis parameter can be a value of @ref CLK_XTALDIV_State"]
pub u32State: u32,
#[doc = "< The numerator of XTAL divide."]
pub u32Num: u32,
#[doc = "< The denominator of XTAL divide."]
pub u32Den: u32,
}
#[doc = " @brief CLK XTAL32 configuration structure definition"]
#[repr(C)]
#[derive(Debug, Copy, Clone, PartialEq)]
pub struct stc_clock_xtal32_init_t {
#[doc = "< The new state of the XTAL32 divide.\nThis parameter can be a value of @ref CLK_XTAL32_State"]
pub u8State: u8,
#[doc = "< The Xtal32 drive ability setting,\nThis parameter can be a value of @ref CLK_XTAL32_Drive"]
pub u8Drv: u8,
#[doc = "< Xtal32 noise filter setting,\nThis parameter can be a value of@ref CLK_XTAL32_Filter_Selection"]
pub u8Filter: u8,
}
#[doc = " @brief CLK clock frequency configuration structure definition"]
#[repr(C)]
#[derive(Copy, Clone)]
pub struct stc_clock_scale_t {
pub __bindgen_anon_1: stc_clock_scale_t__bindgen_ty_1,
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union stc_clock_scale_t__bindgen_ty_1 {
#[doc = "< clock frequency config register"]
pub SCFGR: u32,
pub SCFGR_f: stc_clock_scale_t__bindgen_ty_1__bindgen_ty_1,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone, PartialEq)]
pub struct stc_clock_scale_t__bindgen_ty_1__bindgen_ty_1 {
pub _bitfield_align_1: [u8; 0],
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize]>,
}
impl stc_clock_scale_t__bindgen_ty_1__bindgen_ty_1 {
#[inline]
pub fn PCLK0S(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 3u8) as u32) }
}
#[inline]
pub fn set_PCLK0S(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 3u8, val as u64)
}
}
#[inline]
pub unsafe fn PCLK0S_raw(this: *const Self) -> u32 {
unsafe {
::core::mem::transmute(<__BindgenBitfieldUnit<[u8; 4usize]>>::raw_get(
::core::ptr::addr_of!((*this)._bitfield_1),
0usize,
3u8,
) as u32)
}
}
#[inline]
pub unsafe fn set_PCLK0S_raw(this: *mut Self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
<__BindgenBitfieldUnit<[u8; 4usize]>>::raw_set(
::core::ptr::addr_of_mut!((*this)._bitfield_1),
0usize,
3u8,
val as u64,
)
}
}
#[inline]
pub fn resvd0(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(3usize, 1u8) as u32) }
}
#[inline]
pub fn set_resvd0(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(3usize, 1u8, val as u64)
}
}
#[inline]
pub unsafe fn resvd0_raw(this: *const Self) -> u32 {
unsafe {
::core::mem::transmute(<__BindgenBitfieldUnit<[u8; 4usize]>>::raw_get(
::core::ptr::addr_of!((*this)._bitfield_1),
3usize,
1u8,
) as u32)
}
}
#[inline]
pub unsafe fn set_resvd0_raw(this: *mut Self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
<__BindgenBitfieldUnit<[u8; 4usize]>>::raw_set(
::core::ptr::addr_of_mut!((*this)._bitfield_1),
3usize,
1u8,
val as u64,
)
}
}
#[inline]
pub fn PCLK1S(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(4usize, 3u8) as u32) }
}
#[inline]
pub fn set_PCLK1S(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(4usize, 3u8, val as u64)
}
}
#[inline]
pub unsafe fn PCLK1S_raw(this: *const Self) -> u32 {
unsafe {
::core::mem::transmute(<__BindgenBitfieldUnit<[u8; 4usize]>>::raw_get(
::core::ptr::addr_of!((*this)._bitfield_1),
4usize,
3u8,
) as u32)
}
}
#[inline]
pub unsafe fn set_PCLK1S_raw(this: *mut Self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
<__BindgenBitfieldUnit<[u8; 4usize]>>::raw_set(
::core::ptr::addr_of_mut!((*this)._bitfield_1),
4usize,
3u8,
val as u64,
)
}
}
#[inline]
pub fn resvd1(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(7usize, 1u8) as u32) }
}
#[inline]
pub fn set_resvd1(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(7usize, 1u8, val as u64)
}
}
#[inline]
pub unsafe fn resvd1_raw(this: *const Self) -> u32 {
unsafe {
::core::mem::transmute(<__BindgenBitfieldUnit<[u8; 4usize]>>::raw_get(
::core::ptr::addr_of!((*this)._bitfield_1),
7usize,
1u8,
) as u32)
}
}
#[inline]
pub unsafe fn set_resvd1_raw(this: *mut Self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
<__BindgenBitfieldUnit<[u8; 4usize]>>::raw_set(
::core::ptr::addr_of_mut!((*this)._bitfield_1),
7usize,
1u8,
val as u64,
)
}
}
#[inline]
pub fn PCLK2S(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(8usize, 3u8) as u32) }
}
#[inline]
pub fn set_PCLK2S(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(8usize, 3u8, val as u64)
}
}
#[inline]
pub unsafe fn PCLK2S_raw(this: *const Self) -> u32 {
unsafe {
::core::mem::transmute(<__BindgenBitfieldUnit<[u8; 4usize]>>::raw_get(
::core::ptr::addr_of!((*this)._bitfield_1),
8usize,
3u8,
) as u32)
}
}
#[inline]
pub unsafe fn set_PCLK2S_raw(this: *mut Self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
<__BindgenBitfieldUnit<[u8; 4usize]>>::raw_set(
::core::ptr::addr_of_mut!((*this)._bitfield_1),
8usize,
3u8,
val as u64,
)
}
}
#[inline]
pub fn resvd2(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(11usize, 1u8) as u32) }
}
#[inline]
pub fn set_resvd2(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(11usize, 1u8, val as u64)
}
}
#[inline]
pub unsafe fn resvd2_raw(this: *const Self) -> u32 {
unsafe {
::core::mem::transmute(<__BindgenBitfieldUnit<[u8; 4usize]>>::raw_get(
::core::ptr::addr_of!((*this)._bitfield_1),
11usize,
1u8,
) as u32)
}
}
#[inline]
pub unsafe fn set_resvd2_raw(this: *mut Self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
<__BindgenBitfieldUnit<[u8; 4usize]>>::raw_set(
::core::ptr::addr_of_mut!((*this)._bitfield_1),
11usize,
1u8,
val as u64,
)
}
}
#[inline]
pub fn PCLK3S(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(12usize, 3u8) as u32) }
}
#[inline]
pub fn set_PCLK3S(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(12usize, 3u8, val as u64)
}
}
#[inline]
pub unsafe fn PCLK3S_raw(this: *const Self) -> u32 {
unsafe {
::core::mem::transmute(<__BindgenBitfieldUnit<[u8; 4usize]>>::raw_get(
::core::ptr::addr_of!((*this)._bitfield_1),
12usize,
3u8,
) as u32)
}
}
#[inline]
pub unsafe fn set_PCLK3S_raw(this: *mut Self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
<__BindgenBitfieldUnit<[u8; 4usize]>>::raw_set(
::core::ptr::addr_of_mut!((*this)._bitfield_1),
12usize,
3u8,
val as u64,
)
}
}
#[inline]
pub fn resvd3(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(15usize, 1u8) as u32) }
}
#[inline]
pub fn set_resvd3(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(15usize, 1u8, val as u64)
}
}
#[inline]
pub unsafe fn resvd3_raw(this: *const Self) -> u32 {
unsafe {
::core::mem::transmute(<__BindgenBitfieldUnit<[u8; 4usize]>>::raw_get(
::core::ptr::addr_of!((*this)._bitfield_1),
15usize,
1u8,
) as u32)
}
}
#[inline]
pub unsafe fn set_resvd3_raw(this: *mut Self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
<__BindgenBitfieldUnit<[u8; 4usize]>>::raw_set(
::core::ptr::addr_of_mut!((*this)._bitfield_1),
15usize,
1u8,
val as u64,
)
}
}
#[inline]
pub fn PCLK4S(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(16usize, 3u8) as u32) }
}
#[inline]
pub fn set_PCLK4S(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(16usize, 3u8, val as u64)
}
}
#[inline]
pub unsafe fn PCLK4S_raw(this: *const Self) -> u32 {
unsafe {
::core::mem::transmute(<__BindgenBitfieldUnit<[u8; 4usize]>>::raw_get(
::core::ptr::addr_of!((*this)._bitfield_1),
16usize,
3u8,
) as u32)
}
}
#[inline]
pub unsafe fn set_PCLK4S_raw(this: *mut Self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
<__BindgenBitfieldUnit<[u8; 4usize]>>::raw_set(
::core::ptr::addr_of_mut!((*this)._bitfield_1),
16usize,
3u8,
val as u64,
)
}
}
#[inline]
pub fn resvd4(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(19usize, 1u8) as u32) }
}
#[inline]
pub fn set_resvd4(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(19usize, 1u8, val as u64)
}
}
#[inline]
pub unsafe fn resvd4_raw(this: *const Self) -> u32 {
unsafe {
::core::mem::transmute(<__BindgenBitfieldUnit<[u8; 4usize]>>::raw_get(
::core::ptr::addr_of!((*this)._bitfield_1),
19usize,
1u8,
) as u32)
}
}
#[inline]
pub unsafe fn set_resvd4_raw(this: *mut Self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
<__BindgenBitfieldUnit<[u8; 4usize]>>::raw_set(
::core::ptr::addr_of_mut!((*this)._bitfield_1),
19usize,
1u8,
val as u64,
)
}
}
#[inline]
pub fn EXCKS(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(20usize, 3u8) as u32) }
}
#[inline]
pub fn set_EXCKS(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(20usize, 3u8, val as u64)
}
}
#[inline]
pub unsafe fn EXCKS_raw(this: *const Self) -> u32 {
unsafe {
::core::mem::transmute(<__BindgenBitfieldUnit<[u8; 4usize]>>::raw_get(
::core::ptr::addr_of!((*this)._bitfield_1),
20usize,
3u8,
) as u32)
}
}
#[inline]
pub unsafe fn set_EXCKS_raw(this: *mut Self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
<__BindgenBitfieldUnit<[u8; 4usize]>>::raw_set(
::core::ptr::addr_of_mut!((*this)._bitfield_1),
20usize,
3u8,
val as u64,
)
}
}
#[inline]
pub fn resvd5(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(23usize, 1u8) as u32) }
}
#[inline]
pub fn set_resvd5(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(23usize, 1u8, val as u64)
}
}
#[inline]
pub unsafe fn resvd5_raw(this: *const Self) -> u32 {
unsafe {
::core::mem::transmute(<__BindgenBitfieldUnit<[u8; 4usize]>>::raw_get(
::core::ptr::addr_of!((*this)._bitfield_1),
23usize,
1u8,
) as u32)
}
}
#[inline]
pub unsafe fn set_resvd5_raw(this: *mut Self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
<__BindgenBitfieldUnit<[u8; 4usize]>>::raw_set(
::core::ptr::addr_of_mut!((*this)._bitfield_1),
23usize,
1u8,
val as u64,
)
}
}
#[inline]
pub fn HCLKS(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(24usize, 3u8) as u32) }
}
#[inline]
pub fn set_HCLKS(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(24usize, 3u8, val as u64)
}
}
#[inline]
pub unsafe fn HCLKS_raw(this: *const Self) -> u32 {
unsafe {
::core::mem::transmute(<__BindgenBitfieldUnit<[u8; 4usize]>>::raw_get(
::core::ptr::addr_of!((*this)._bitfield_1),
24usize,
3u8,
) as u32)
}
}
#[inline]
pub unsafe fn set_HCLKS_raw(this: *mut Self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
<__BindgenBitfieldUnit<[u8; 4usize]>>::raw_set(
::core::ptr::addr_of_mut!((*this)._bitfield_1),
24usize,
3u8,
val as u64,
)
}
}
#[inline]
pub fn resvd6(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(27usize, 5u8) as u32) }
}
#[inline]
pub fn set_resvd6(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(27usize, 5u8, val as u64)
}
}
#[inline]
pub unsafe fn resvd6_raw(this: *const Self) -> u32 {
unsafe {
::core::mem::transmute(<__BindgenBitfieldUnit<[u8; 4usize]>>::raw_get(
::core::ptr::addr_of!((*this)._bitfield_1),
27usize,
5u8,
) as u32)
}
}
#[inline]
pub unsafe fn set_resvd6_raw(this: *mut Self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
<__BindgenBitfieldUnit<[u8; 4usize]>>::raw_set(
::core::ptr::addr_of_mut!((*this)._bitfield_1),
27usize,
5u8,
val as u64,
)
}
}
#[inline]
pub fn new_bitfield_1(
PCLK0S: u32,
resvd0: u32,
PCLK1S: u32,
resvd1: u32,
PCLK2S: u32,
resvd2: u32,
PCLK3S: u32,
resvd3: u32,
PCLK4S: u32,
resvd4: u32,
EXCKS: u32,
resvd5: u32,
HCLKS: u32,
resvd6: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize]> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize]> = Default::default();
__bindgen_bitfield_unit.set(0usize, 3u8, {
let PCLK0S: u32 = unsafe { ::core::mem::transmute(PCLK0S) };
PCLK0S as u64
});
__bindgen_bitfield_unit.set(3usize, 1u8, {
let resvd0: u32 = unsafe { ::core::mem::transmute(resvd0) };
resvd0 as u64
});
__bindgen_bitfield_unit.set(4usize, 3u8, {
let PCLK1S: u32 = unsafe { ::core::mem::transmute(PCLK1S) };
PCLK1S as u64
});
__bindgen_bitfield_unit.set(7usize, 1u8, {
let resvd1: u32 = unsafe { ::core::mem::transmute(resvd1) };
resvd1 as u64
});
__bindgen_bitfield_unit.set(8usize, 3u8, {
let PCLK2S: u32 = unsafe { ::core::mem::transmute(PCLK2S) };
PCLK2S as u64
});
__bindgen_bitfield_unit.set(11usize, 1u8, {
let resvd2: u32 = unsafe { ::core::mem::transmute(resvd2) };
resvd2 as u64
});
__bindgen_bitfield_unit.set(12usize, 3u8, {
let PCLK3S: u32 = unsafe { ::core::mem::transmute(PCLK3S) };
PCLK3S as u64
});
__bindgen_bitfield_unit.set(15usize, 1u8, {
let resvd3: u32 = unsafe { ::core::mem::transmute(resvd3) };
resvd3 as u64
});
__bindgen_bitfield_unit.set(16usize, 3u8, {
let PCLK4S: u32 = unsafe { ::core::mem::transmute(PCLK4S) };
PCLK4S as u64
});
__bindgen_bitfield_unit.set(19usize, 1u8, {
let resvd4: u32 = unsafe { ::core::mem::transmute(resvd4) };
resvd4 as u64
});
__bindgen_bitfield_unit.set(20usize, 3u8, {
let EXCKS: u32 = unsafe { ::core::mem::transmute(EXCKS) };
EXCKS as u64
});
__bindgen_bitfield_unit.set(23usize, 1u8, {
let resvd5: u32 = unsafe { ::core::mem::transmute(resvd5) };
resvd5 as u64
});
__bindgen_bitfield_unit.set(24usize, 3u8, {
let HCLKS: u32 = unsafe { ::core::mem::transmute(HCLKS) };
HCLKS as u64
});
__bindgen_bitfield_unit.set(27usize, 5u8, {
let resvd6: u32 = unsafe { ::core::mem::transmute(resvd6) };
resvd6 as u64
});
__bindgen_bitfield_unit
}
}
#[doc = " @brief CLK PLL configuration structure definition"]
#[repr(C)]
#[derive(Copy, Clone)]
pub struct stc_clock_pll_init_t {
#[doc = "< PLL new state, @ref CLK_PLL_State for details"]
pub u8PLLState: u8,
pub __bindgen_anon_1: stc_clock_pll_init_t__bindgen_ty_1,
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union stc_clock_pll_init_t__bindgen_ty_1 {
#[doc = "< PLL config register"]
pub PLLCFGR: u32,
pub PLLCFGR_f: stc_clock_pll_init_t__bindgen_ty_1__bindgen_ty_1,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone, PartialEq)]
pub struct stc_clock_pll_init_t__bindgen_ty_1__bindgen_ty_1 {
pub _bitfield_align_1: [u16; 0],
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize]>,
}
impl stc_clock_pll_init_t__bindgen_ty_1__bindgen_ty_1 {
#[inline]
pub fn PLLM(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 2u8) as u32) }
}
#[inline]
pub fn set_PLLM(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 2u8, val as u64)
}
}
#[inline]
pub unsafe fn PLLM_raw(this: *const Self) -> u32 {
unsafe {
::core::mem::transmute(<__BindgenBitfieldUnit<[u8; 4usize]>>::raw_get(
::core::ptr::addr_of!((*this)._bitfield_1),
0usize,
2u8,
) as u32)
}
}
#[inline]
pub unsafe fn set_PLLM_raw(this: *mut Self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
<__BindgenBitfieldUnit<[u8; 4usize]>>::raw_set(
::core::ptr::addr_of_mut!((*this)._bitfield_1),
0usize,
2u8,
val as u64,
)
}
}
#[inline]
pub fn resvd0(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(2usize, 5u8) as u32) }
}
#[inline]
pub fn set_resvd0(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(2usize, 5u8, val as u64)
}
}
#[inline]
pub unsafe fn resvd0_raw(this: *const Self) -> u32 {
unsafe {
::core::mem::transmute(<__BindgenBitfieldUnit<[u8; 4usize]>>::raw_get(
::core::ptr::addr_of!((*this)._bitfield_1),
2usize,
5u8,
) as u32)
}
}
#[inline]
pub unsafe fn set_resvd0_raw(this: *mut Self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
<__BindgenBitfieldUnit<[u8; 4usize]>>::raw_set(
::core::ptr::addr_of_mut!((*this)._bitfield_1),
2usize,
5u8,
val as u64,
)
}
}
#[inline]
pub fn PLLSRC(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(7usize, 1u8) as u32) }
}
#[inline]
pub fn set_PLLSRC(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(7usize, 1u8, val as u64)
}
}
#[inline]
pub unsafe fn PLLSRC_raw(this: *const Self) -> u32 {
unsafe {
::core::mem::transmute(<__BindgenBitfieldUnit<[u8; 4usize]>>::raw_get(
::core::ptr::addr_of!((*this)._bitfield_1),
7usize,
1u8,
) as u32)
}
}
#[inline]
pub unsafe fn set_PLLSRC_raw(this: *mut Self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
<__BindgenBitfieldUnit<[u8; 4usize]>>::raw_set(
::core::ptr::addr_of_mut!((*this)._bitfield_1),
7usize,
1u8,
val as u64,
)
}
}
#[inline]
pub fn PLLN(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(8usize, 9u8) as u32) }
}
#[inline]
pub fn set_PLLN(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(8usize, 9u8, val as u64)
}
}
#[inline]
pub unsafe fn PLLN_raw(this: *const Self) -> u32 {
unsafe {
::core::mem::transmute(<__BindgenBitfieldUnit<[u8; 4usize]>>::raw_get(
::core::ptr::addr_of!((*this)._bitfield_1),
8usize,
9u8,
) as u32)
}
}
#[inline]
pub unsafe fn set_PLLN_raw(this: *mut Self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
<__BindgenBitfieldUnit<[u8; 4usize]>>::raw_set(
::core::ptr::addr_of_mut!((*this)._bitfield_1),
8usize,
9u8,
val as u64,
)
}
}
#[inline]
pub fn resvd1(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(17usize, 3u8) as u32) }
}
#[inline]
pub fn set_resvd1(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(17usize, 3u8, val as u64)
}
}
#[inline]
pub unsafe fn resvd1_raw(this: *const Self) -> u32 {
unsafe {
::core::mem::transmute(<__BindgenBitfieldUnit<[u8; 4usize]>>::raw_get(
::core::ptr::addr_of!((*this)._bitfield_1),
17usize,
3u8,
) as u32)
}
}
#[inline]
pub unsafe fn set_resvd1_raw(this: *mut Self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
<__BindgenBitfieldUnit<[u8; 4usize]>>::raw_set(
::core::ptr::addr_of_mut!((*this)._bitfield_1),
17usize,
3u8,
val as u64,
)
}
}
#[inline]
pub fn PLLR(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(20usize, 4u8) as u32) }
}
#[inline]
pub fn set_PLLR(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(20usize, 4u8, val as u64)
}
}
#[inline]
pub unsafe fn PLLR_raw(this: *const Self) -> u32 {
unsafe {
::core::mem::transmute(<__BindgenBitfieldUnit<[u8; 4usize]>>::raw_get(
::core::ptr::addr_of!((*this)._bitfield_1),
20usize,
4u8,
) as u32)
}
}
#[inline]
pub unsafe fn set_PLLR_raw(this: *mut Self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
<__BindgenBitfieldUnit<[u8; 4usize]>>::raw_set(
::core::ptr::addr_of_mut!((*this)._bitfield_1),
20usize,
4u8,
val as u64,
)
}
}
#[inline]
pub fn PLLQ(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(24usize, 4u8) as u32) }
}
#[inline]
pub fn set_PLLQ(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(24usize, 4u8, val as u64)
}
}
#[inline]
pub unsafe fn PLLQ_raw(this: *const Self) -> u32 {
unsafe {
::core::mem::transmute(<__BindgenBitfieldUnit<[u8; 4usize]>>::raw_get(
::core::ptr::addr_of!((*this)._bitfield_1),
24usize,
4u8,
) as u32)
}
}
#[inline]
pub unsafe fn set_PLLQ_raw(this: *mut Self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
<__BindgenBitfieldUnit<[u8; 4usize]>>::raw_set(
::core::ptr::addr_of_mut!((*this)._bitfield_1),
24usize,
4u8,
val as u64,
)
}
}
#[inline]
pub fn PLLP(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(28usize, 4u8) as u32) }
}
#[inline]
pub fn set_PLLP(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(28usize, 4u8, val as u64)
}
}
#[inline]
pub unsafe fn PLLP_raw(this: *const Self) -> u32 {
unsafe {
::core::mem::transmute(<__BindgenBitfieldUnit<[u8; 4usize]>>::raw_get(
::core::ptr::addr_of!((*this)._bitfield_1),
28usize,
4u8,
) as u32)
}
}
#[inline]
pub unsafe fn set_PLLP_raw(this: *mut Self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
<__BindgenBitfieldUnit<[u8; 4usize]>>::raw_set(
::core::ptr::addr_of_mut!((*this)._bitfield_1),
28usize,
4u8,
val as u64,
)
}
}
#[inline]
pub fn new_bitfield_1(
PLLM: u32,
resvd0: u32,
PLLSRC: u32,
PLLN: u32,
resvd1: u32,
PLLR: u32,
PLLQ: u32,
PLLP: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize]> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize]> = Default::default();
__bindgen_bitfield_unit.set(0usize, 2u8, {
let PLLM: u32 = unsafe { ::core::mem::transmute(PLLM) };
PLLM as u64
});
__bindgen_bitfield_unit.set(2usize, 5u8, {
let resvd0: u32 = unsafe { ::core::mem::transmute(resvd0) };
resvd0 as u64
});
__bindgen_bitfield_unit.set(7usize, 1u8, {
let PLLSRC: u32 = unsafe { ::core::mem::transmute(PLLSRC) };
PLLSRC as u64
});
__bindgen_bitfield_unit.set(8usize, 9u8, {
let PLLN: u32 = unsafe { ::core::mem::transmute(PLLN) };
PLLN as u64
});
__bindgen_bitfield_unit.set(17usize, 3u8, {
let resvd1: u32 = unsafe { ::core::mem::transmute(resvd1) };
resvd1 as u64
});
__bindgen_bitfield_unit.set(20usize, 4u8, {
let PLLR: u32 = unsafe { ::core::mem::transmute(PLLR) };
PLLR as u64
});
__bindgen_bitfield_unit.set(24usize, 4u8, {
let PLLQ: u32 = unsafe { ::core::mem::transmute(PLLQ) };
PLLQ as u64
});
__bindgen_bitfield_unit.set(28usize, 4u8, {
let PLLP: u32 = unsafe { ::core::mem::transmute(PLLP) };
PLLP as u64
});
__bindgen_bitfield_unit
}
}
#[doc = " @brief CLK bus frequency structure definition"]
#[repr(C)]
#[derive(Debug, Copy, Clone, PartialEq)]
pub struct stc_clock_freq_t {
#[doc = "< System clock frequency."]
pub u32SysclkFreq: u32,
#[doc = "< Hclk frequency."]
pub u32HclkFreq: u32,
#[doc = "< Pclk0 frequency."]
pub u32Pclk0Freq: u32,
#[doc = "< Pclk1 frequency."]
pub u32Pclk1Freq: u32,
#[doc = "< Pclk2 frequency."]
pub u32Pclk2Freq: u32,
#[doc = "< Pclk3 frequency."]
pub u32Pclk3Freq: u32,
#[doc = "< Pclk4 frequency."]
pub u32Pclk4Freq: u32,
#[doc = "< Exclk frequency."]
pub u32ExclkFreq: u32,
}
#[doc = " @brief CLK PLL clock frequency structure definition"]
#[repr(C)]
#[derive(Debug, Copy, Clone, PartialEq)]
pub struct stc_pll_clock_freq_t {
#[doc = "< PLL vcin clock frequency."]
pub u32PllVcin: u32,
#[doc = "< PLL vco clock frequency."]
pub u32PllVco: u32,
#[doc = "< PLLp clock frequency."]
pub u32PllP: u32,
#[doc = "< PLLq clock frequency."]
pub u32PllQ: u32,
#[doc = "< PLLr clock frequency."]
pub u32PllR: u32,
}
unsafe extern "C" {
#[doc = "Global function prototypes (definition in C source)\n/\n/**\n @addtogroup CLK_Global_Functions\n @{"]
pub fn CLK_HrcCmd(enNewState: en_functional_state_t) -> i32;
pub fn CLK_MrcCmd(enNewState: en_functional_state_t) -> i32;
pub fn CLK_LrcCmd(enNewState: en_functional_state_t) -> i32;
pub fn CLK_HrcTrim(i8TrimVal: i8);
pub fn CLK_MrcTrim(i8TrimVal: i8);
pub fn CLK_LrcTrim(i8TrimVal: i8);
pub fn CLK_XtalStructInit(pstcXtalInit: *mut stc_clock_xtal_init_t) -> i32;
pub fn CLK_XtalInit(pstcXtalInit: *const stc_clock_xtal_init_t) -> i32;
pub fn CLK_XtalCmd(enNewState: en_functional_state_t) -> i32;
pub fn CLK_XtalDivCmd(enNewState: en_functional_state_t);
pub fn CLK_XtalDivStructInit(pstcXtalDivInit: *mut stc_clock_xtaldiv_init_t) -> i32;
pub fn CLK_XtalDivInit(pstcXtalDivInit: *const stc_clock_xtaldiv_init_t) -> i32;
pub fn CLK_XtalStdCmd(enNewState: en_functional_state_t) -> i32;
pub fn CLK_XtalStdInit(u8State: u8, u8ExceptionType: u8) -> i32;
pub fn CLK_SetXtalStdExceptionType(u8ExceptionType: u8) -> i32;
pub fn CLK_ClearXtalStdStatus();
pub fn CLK_GetXtalStdStatus() -> en_flag_status_t;
pub fn CLK_Xtal32StructInit(pstcXtal32Init: *mut stc_clock_xtal32_init_t) -> i32;
pub fn CLK_Xtal32Init(pstcXtal32Init: *const stc_clock_xtal32_init_t) -> i32;
pub fn CLK_Xtal32Cmd(enNewState: en_functional_state_t) -> i32;
pub fn CLK_SetPLLSrc(u32PllSrc: u32);
pub fn CLK_PLLStructInit(pstcPLLInit: *mut stc_clock_pll_init_t) -> i32;
pub fn CLK_PLLInit(pstcPLLInit: *const stc_clock_pll_init_t) -> i32;
pub fn CLK_PLLCmd(enNewState: en_functional_state_t) -> i32;
pub fn CLK_GetPLLClockFreq(pstcPllClkFreq: *mut stc_pll_clock_freq_t) -> i32;
pub fn CLK_MCOConfig(u8Ch: u8, u8Src: u8, u8Div: u8);
pub fn CLK_MCOCmd(u8Ch: u8, enNewState: en_functional_state_t);
pub fn CLK_GetStableStatus(u8Flag: u8) -> en_flag_status_t;
pub fn CLK_SetSysClockSrc(u8Src: u8);
pub fn CLK_SetClockDiv(u32Clock: u32, u32Div: u32);
pub fn CLK_GetClockFreq(pstcClockFreq: *mut stc_clock_freq_t) -> i32;
pub fn CLK_GetBusClockFreq(u32Clock: u32) -> u32;
pub fn CLK_SetPeriClockSrc(u16Src: u16);
pub fn CLK_SetCANClockSrc(u8Unit: u8, u8Src: u8);
pub fn CLK_TpiuClockCmd(enNewState: en_functional_state_t);
pub fn CLK_SetTpiuClockDiv(u8Div: u8);
}