hc32f448_driver_sys 0.1.1

Provide driver function binding for HDSC's HC32F448 MCU.
Documentation 
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/* automatically generated by rust-bindgen 0.72.1 */

pub const MPU_UNIT_DMA1: u32 = 1;
pub const MPU_UNIT_DMA2: u32 = 2;
pub const MPU_UNIT_ALL: u32 = 3;
pub const MPU_REGION_NUM0: u32 = 0;
pub const MPU_REGION_NUM1: u32 = 1;
pub const MPU_REGION_NUM2: u32 = 2;
pub const MPU_REGION_NUM3: u32 = 3;
pub const MPU_REGION_NUM4: u32 = 4;
pub const MPU_REGION_NUM5: u32 = 5;
pub const MPU_REGION_NUM6: u32 = 6;
pub const MPU_REGION_NUM7: u32 = 7;
pub const MPU_REGION_NUM8: u32 = 8;
pub const MPU_REGION_NUM9: u32 = 9;
pub const MPU_REGION_NUM10: u32 = 10;
pub const MPU_REGION_NUM11: u32 = 11;
pub const MPU_REGION_NUM12: u32 = 12;
pub const MPU_REGION_NUM13: u32 = 13;
pub const MPU_REGION_NUM14: u32 = 14;
pub const MPU_REGION_NUM15: u32 = 15;
pub const MPU_BACKGROUND_WR_DISABLE: u32 = 2;
pub const MPU_BACKGROUND_WR_ENABLE: u32 = 0;
pub const MPU_BACKGROUND_RD_DISABLE: u32 = 1;
pub const MPU_BACKGROUND_RD_ENABLE: u32 = 0;
pub const MPU_UNIT_ENABLE: u32 = 128;
pub const MPU_UNIT_DISABLE: u32 = 0;
pub const MPU_EXP_TYPE_NONE: u32 = 0;
pub const MPU_EXP_TYPE_BUS_ERR: u32 = 4;
pub const MPU_EXP_TYPE_NMI: u32 = 8;
pub const MPU_EXP_TYPE_RST: u32 = 12;
pub const MPU_REGION_WR_DISABLE: u32 = 1;
pub const MPU_REGION_WR_ENABLE: u32 = 0;
pub const MPU_REGION_RD_DISABLE: u32 = 1;
pub const MPU_REGION_RD_ENABLE: u32 = 0;
pub const MPU_REGION_SIZE_32BYTE: u32 = 4;
pub const MPU_REGION_SIZE_64BYTE: u32 = 5;
pub const MPU_REGION_SIZE_128BYTE: u32 = 6;
pub const MPU_REGION_SIZE_256BYTE: u32 = 7;
pub const MPU_REGION_SIZE_512BYTE: u32 = 8;
pub const MPU_REGION_SIZE_1KBYTE: u32 = 9;
pub const MPU_REGION_SIZE_2KBYTE: u32 = 10;
pub const MPU_REGION_SIZE_4KBYTE: u32 = 11;
pub const MPU_REGION_SIZE_8KBYTE: u32 = 12;
pub const MPU_REGION_SIZE_16KBYTE: u32 = 13;
pub const MPU_REGION_SIZE_32KBYTE: u32 = 14;
pub const MPU_REGION_SIZE_64KBYTE: u32 = 15;
pub const MPU_REGION_SIZE_128KBYTE: u32 = 16;
pub const MPU_REGION_SIZE_256KBYTE: u32 = 17;
pub const MPU_REGION_SIZE_512KBYTE: u32 = 18;
pub const MPU_REGION_SIZE_1MBYTE: u32 = 19;
pub const MPU_REGION_SIZE_2MBYTE: u32 = 20;
pub const MPU_REGION_SIZE_4MBYTE: u32 = 21;
pub const MPU_REGION_SIZE_8MBYTE: u32 = 22;
pub const MPU_REGION_SIZE_16MBYTE: u32 = 23;
pub const MPU_REGION_SIZE_32MBYTE: u32 = 24;
pub const MPU_REGION_SIZE_64MBYTE: u32 = 25;
pub const MPU_REGION_SIZE_128MBYTE: u32 = 26;
pub const MPU_REGION_SIZE_256MBYTE: u32 = 27;
pub const MPU_REGION_SIZE_512MBYTE: u32 = 28;
pub const MPU_REGION_SIZE_1GBYTE: u32 = 29;
pub const MPU_REGION_SIZE_2GBYTE: u32 = 30;
pub const MPU_REGION_SIZE_4GBYTE: u32 = 31;
pub const MPU_SP_EXP_TYPE_NMI: u32 = 0;
pub const MPU_SP_EXP_TYPE_RST: u32 = 1073741824;
pub const MPU_SP_UNIT_MSP: u32 = 1;
pub const MPU_SP_UNIT_PSP: u32 = 2;
pub const MPU_SP_UNIT_ALL: u32 = 3;
pub const MPU_FLAG_DMA1: u32 = 1;
pub const MPU_FLAG_DMA2: u32 = 2;
pub const MPU_FLAG_PSP: u32 = 4;
pub const MPU_FLAG_MSP: u32 = 8;
pub const MPU_FLAG_ALL: u32 = 15;
pub const MPU_IP_AES: u32 = 1;
pub const MPU_IP_HASH: u32 = 4;
pub const MPU_IP_TRNG: u32 = 16;
pub const MPU_IP_CRC: u32 = 64;
pub const MPU_IP_EFM: u32 = 256;
pub const MPU_IP_WDT: u32 = 4096;
pub const MPU_IP_SWDT: u32 = 16384;
pub const MPU_IP_BKSRAM: u32 = 65536;
pub const MPU_IP_RTC: u32 = 262144;
pub const MPU_IP_MPU: u32 = 1048576;
pub const MPU_IP_SRAMC: u32 = 4194304;
pub const MPU_IP_INTC: u32 = 16777216;
pub const MPU_IP_RMU_CMU_PWC: u32 = 67108864;
pub const MPU_IP_FCG: u32 = 268435456;
pub const MPU_IP_ALL: u32 = 357912917;
pub const MPU_IP_EXP_TYPE_NONE: u32 = 0;
pub const MPU_IP_EXP_TYPE_BUS_ERR: u32 = 2147483648;
pub const MPU_REG_LOCK_KEY: u32 = 38564;
pub const MPU_REG_UNLOCK_KEY: u32 = 38565;
pub const en_functional_state_t_DISABLE: en_functional_state_t = 0;
pub const en_functional_state_t_ENABLE: en_functional_state_t = 1;
#[doc = " @brief Functional state"]
pub type en_functional_state_t = ::core::ffi::c_uint;
pub const en_flag_status_t_RESET: en_flag_status_t = 0;
pub const en_flag_status_t_SET: en_flag_status_t = 1;
#[doc = " @brief Flag status"]
pub type en_flag_status_t = ::core::ffi::c_uint;
#[doc = " @brief MPU Unit configure structure definition"]
#[repr(C)]
#[derive(Debug, Copy, Clone, PartialEq)]
pub struct stc_mpu_unit_config_t {
    #[doc = "< Specifies the type of exception that occurs when the unit accesses a protected region.\nThis parameter can be a value of @ref MPU_Exception_Type"]
    pub u32ExceptionType: u32,
    #[doc = "< Specifies the unit's write permission for the background space.\nThis parameter can be a value of @ref MPU_Background_Write_Permission"]
    pub u32BackgroundWrite: u32,
    #[doc = "< Specifies the unit's read permission for the background space\nThis parameter can be a value of @ref MPU_Background_Read_Permission"]
    pub u32BackgroundRead: u32,
}
#[doc = " @brief MPU Unit initialize structure definition"]
#[repr(C)]
#[derive(Debug, Copy, Clone, PartialEq)]
pub struct stc_mpu_unit_init_t {
    #[doc = "< Specifies the unit's state of mpu\nThis parameter can be a value of @ref MPU_Unit_State"]
    pub u32MpuState: u32,
    #[doc = "< Specifies the type of exception that occurs when the unit accesses a protected region.\nThis parameter can be a value of @ref MPU_Exception_Type"]
    pub u32ExceptionType: u32,
    #[doc = "< Specifies the unit's write permission for the background space.\nThis parameter can be a value of @ref MPU_Background_Write_Permission"]
    pub u32BackgroundWrite: u32,
    #[doc = "< Specifies the unit's read permission for the background space\nThis parameter can be a value of @ref MPU_Background_Read_Permission"]
    pub u32BackgroundRead: u32,
}
#[doc = " @brief MPU Init structure definition"]
#[repr(C)]
#[derive(Debug, Copy, Clone, PartialEq)]
pub struct stc_mpu_init_t {
    #[doc = "< Configure storage protection unit of DMA1"]
    pub stcDma1: stc_mpu_unit_config_t,
    #[doc = "< Configure storage protection unit of DMA2"]
    pub stcDma2: stc_mpu_unit_config_t,
}
#[doc = " @brief MPU Region Permission structure definition"]
#[repr(C)]
#[derive(Debug, Copy, Clone, PartialEq)]
pub struct stc_mpu_region_permission_t {
    #[doc = "< Specifies the unit's write permission for the region.\nThis parameter can be a value of @ref MPU_Region_Write_Permission"]
    pub u32RegionWrite: u32,
    #[doc = "< Specifies the unit's read permission  for the region.\nThis parameter can be a value of @ref MPU_Region_Read_Permission"]
    pub u32RegionRead: u32,
}
#[doc = " @brief MPU region initialization structure definition\n @note  The effective bits of the 'u32BaseAddr' are related to the 'u32Size' of the region,\n        and the low 'u32Size+1' bits are fixed at 0."]
#[repr(C)]
#[derive(Debug, Copy, Clone, PartialEq)]
pub struct stc_mpu_region_init_t {
    #[doc = "< Specifies the base address of the region.\nThis parameter can be a number between 0UL and 0xFFFFFFE0UL"]
    pub u32BaseAddr: u32,
    #[doc = "< Specifies the size of the region.\nThis parameter can be a value of @ref MPU_Region_Size"]
    pub u32Size: u32,
    #[doc = "< Specifies the DMA1 access permission for the region"]
    pub stcDma1: stc_mpu_region_permission_t,
    #[doc = "< Specifies the DMA2 access permission for the region"]
    pub stcDma2: stc_mpu_region_permission_t,
}
#[doc = " @brief MPU Stack Pointer initialization structure definition\n @note  The parameters 'u32Addr' and 'u32Size' must satisfy four-byte alignment."]
#[repr(C)]
#[derive(Debug, Copy, Clone, PartialEq)]
pub struct stc_mpu_sp_init_t {
    #[doc = "< Specifies the type of exception that occurs when the SP access outside specified range.\nThis parameter can be a value of @ref MPU_SP_Exception_Type"]
    pub u32ExceptionType: u32,
    #[doc = "< Specifies the start address that the SP is allowed to access.\nThis parameter can be a number between 0UL and 0xFFFFFFFCUL"]
    pub u32Addr: u32,
    #[doc = "< Specifies the allowed access range for the SP.\nThis parameter can be a number between 4UL and 65536UL"]
    pub u32Size: u32,
}
unsafe extern "C" {
    pub fn MPU_DeInit();
    pub fn MPU_Init(pstcMpuInit: *const stc_mpu_init_t) -> i32;
    pub fn MPU_StructInit(pstcMpuInit: *mut stc_mpu_init_t) -> i32;
    pub fn MPU_UnitInit(u32Unit: u32, pstcUnitInit: *mut stc_mpu_unit_init_t) -> i32;
    pub fn MPU_UnitStructInit(pstcUnitInit: *mut stc_mpu_unit_init_t) -> i32;
    pub fn MPU_SetExceptionType(u32Unit: u32, u32Type: u32);
    pub fn MPU_BackgroundWriteCmd(u32Unit: u32, enNewState: en_functional_state_t);
    pub fn MPU_BackgroundReadCmd(u32Unit: u32, enNewState: en_functional_state_t);
    pub fn MPU_UnitCmd(u32Unit: u32, enNewState: en_functional_state_t);
    pub fn MPU_GetStatus(u32Flag: u32) -> en_flag_status_t;
    pub fn MPU_ClearStatus(u32Flag: u32);
    pub fn MPU_RegionInit(u32Num: u32, pstcRegionInit: *const stc_mpu_region_init_t) -> i32;
    pub fn MPU_RegionStructInit(pstcRegionInit: *mut stc_mpu_region_init_t) -> i32;
    pub fn MPU_SetRegionBaseAddr(u32Num: u32, u32Addr: u32);
    pub fn MPU_SetRegionSize(u32Num: u32, u32Size: u32);
    pub fn MPU_RegionWriteCmd(u32Num: u32, u32Unit: u32, enNewState: en_functional_state_t);
    pub fn MPU_RegionReadCmd(u32Num: u32, u32Unit: u32, enNewState: en_functional_state_t);
    pub fn MPU_RegionCmd(u32Num: u32, u32Unit: u32, enNewState: en_functional_state_t);
    pub fn MPU_SPInit(u32Unit: u32, pstcSpInit: *const stc_mpu_sp_init_t) -> i32;
    pub fn MPU_SPStructInit(pstcSpInit: *mut stc_mpu_sp_init_t) -> i32;
    pub fn MPU_SetSPStartAddr(u32Unit: u32, u32Addr: u32);
    pub fn MPU_SetSPSize(u32Unit: u32, u32Size: u32);
    pub fn MPU_SetSPExceptionType(u32Unit: u32, u32Type: u32);
    pub fn MPU_SPCmd(u32Unit: u32, enNewState: en_functional_state_t);
    pub fn MPU_IP_SetExceptionType(u32Type: u32);
    pub fn MPU_IP_WriteCmd(u32Periph: u32, enNewState: en_functional_state_t);
    pub fn MPU_IP_ReadCmd(u32Periph: u32, enNewState: en_functional_state_t);
}