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#![allow(non_snake_case, non_upper_case_globals)]
#![allow(non_camel_case_types)]
//! WWDG1
//!
//! Used by: stm32mp153, stm32mp157
use crate::{RORegister, RWRegister};
#[cfg(not(feature = "nosync"))]
use core::marker::PhantomData;
/// Control register
pub mod WWDG_CR {
/// T
pub mod T {
/// Offset (0 bits)
pub const offset: u32 = 0;
/// Mask (7 bits: 0x7f << 0)
pub const mask: u32 = 0x7f << offset;
/// Read-only values (empty)
pub mod R {}
/// Write-only values (empty)
pub mod W {}
/// Read-write values (empty)
pub mod RW {}
}
/// WDGA
pub mod WDGA {
/// Offset (7 bits)
pub const offset: u32 = 7;
/// Mask (1 bit: 1 << 7)
pub const mask: u32 = 1 << offset;
/// Read-only values (empty)
pub mod R {}
/// Write-only values (empty)
pub mod W {}
/// Read-write values (empty)
pub mod RW {}
}
}
/// Configuration register
pub mod WWDG_CFR {
/// W
pub mod W {
/// Offset (0 bits)
pub const offset: u32 = 0;
/// Mask (7 bits: 0x7f << 0)
pub const mask: u32 = 0x7f << offset;
/// Read-only values (empty)
pub mod R {}
/// Write-only values (empty)
pub mod W {}
/// Read-write values (empty)
pub mod RW {}
}
/// EWI
pub mod EWI {
/// Offset (9 bits)
pub const offset: u32 = 9;
/// Mask (1 bit: 1 << 9)
pub const mask: u32 = 1 << offset;
/// Read-only values (empty)
pub mod R {}
/// Write-only values (empty)
pub mod W {}
/// Read-write values (empty)
pub mod RW {}
}
/// WDGTB
pub mod WDGTB {
/// Offset (11 bits)
pub const offset: u32 = 11;
/// Mask (3 bits: 0b111 << 11)
pub const mask: u32 = 0b111 << offset;
/// Read-only values (empty)
pub mod R {}
/// Write-only values (empty)
pub mod W {}
/// Read-write values (empty)
pub mod RW {}
}
}
/// Status register
pub mod WWDG_SR {
/// EWIF
pub mod EWIF {
/// Offset (0 bits)
pub const offset: u32 = 0;
/// Mask (1 bit: 1 << 0)
pub const mask: u32 = 1 << offset;
/// Read-only values (empty)
pub mod R {}
/// Write-only values (empty)
pub mod W {}
/// Read-write values (empty)
pub mod RW {}
}
}
/// WWDG hardware configuration register
pub mod WWDG_HWCFGR {
/// PREDIV
pub mod PREDIV {
/// Offset (0 bits)
pub const offset: u32 = 0;
/// Mask (16 bits: 0xffff << 0)
pub const mask: u32 = 0xffff << offset;
/// Read-only values (empty)
pub mod R {}
/// Write-only values (empty)
pub mod W {}
/// Read-write values (empty)
pub mod RW {}
}
}
/// WWDG version register
pub mod WWDG_VERR {
/// MINREV
pub mod MINREV {
/// Offset (0 bits)
pub const offset: u32 = 0;
/// Mask (4 bits: 0b1111 << 0)
pub const mask: u32 = 0b1111 << offset;
/// Read-only values (empty)
pub mod R {}
/// Write-only values (empty)
pub mod W {}
/// Read-write values (empty)
pub mod RW {}
}
/// MAJREV
pub mod MAJREV {
/// Offset (4 bits)
pub const offset: u32 = 4;
/// Mask (4 bits: 0b1111 << 4)
pub const mask: u32 = 0b1111 << offset;
/// Read-only values (empty)
pub mod R {}
/// Write-only values (empty)
pub mod W {}
/// Read-write values (empty)
pub mod RW {}
}
}
/// WWDG ID register
pub mod WWDG_IPIDR {
/// ID
pub mod ID {
/// Offset (0 bits)
pub const offset: u32 = 0;
/// Mask (32 bits: 0xffffffff << 0)
pub const mask: u32 = 0xffffffff << offset;
/// Read-only values (empty)
pub mod R {}
/// Write-only values (empty)
pub mod W {}
/// Read-write values (empty)
pub mod RW {}
}
}
/// WWDG size ID register
pub mod WWDG_SIDR {
/// SID
pub mod SID {
/// Offset (0 bits)
pub const offset: u32 = 0;
/// Mask (32 bits: 0xffffffff << 0)
pub const mask: u32 = 0xffffffff << offset;
/// Read-only values (empty)
pub mod R {}
/// Write-only values (empty)
pub mod W {}
/// Read-write values (empty)
pub mod RW {}
}
}
#[repr(C)]
pub struct RegisterBlock {
/// Control register
pub WWDG_CR: RWRegister<u32>,
/// Configuration register
pub WWDG_CFR: RWRegister<u32>,
/// Status register
pub WWDG_SR: RWRegister<u32>,
_reserved1: [u8; 996],
/// WWDG hardware configuration register
pub WWDG_HWCFGR: RORegister<u32>,
/// WWDG version register
pub WWDG_VERR: RORegister<u32>,
/// WWDG ID register
pub WWDG_IPIDR: RORegister<u32>,
/// WWDG size ID register
pub WWDG_SIDR: RORegister<u32>,
}
pub struct ResetValues {
pub WWDG_CR: u32,
pub WWDG_CFR: u32,
pub WWDG_SR: u32,
pub WWDG_HWCFGR: u32,
pub WWDG_VERR: u32,
pub WWDG_IPIDR: u32,
pub WWDG_SIDR: u32,
}
#[cfg(not(feature = "nosync"))]
pub struct Instance {
pub(crate) addr: u32,
pub(crate) _marker: PhantomData<*const RegisterBlock>,
}
#[cfg(not(feature = "nosync"))]
impl ::core::ops::Deref for Instance {
type Target = RegisterBlock;
#[inline(always)]
fn deref(&self) -> &RegisterBlock {
unsafe { &*(self.addr as *const _) }
}
}
#[cfg(feature = "rtic")]
unsafe impl Send for Instance {}