;; GENERATED BY `isaspec`. DO NOT EDIT!!!
(attr MInst.MovWide (tag isaspec_generated))
(spec
(MInst.MovWide op rd imm size)
(provide
(match
size
((Size64)
(match
op
((MovZ)
(and
(=> (= (:shift imm) #b00) (= rd (zero_ext 64 (extract 15 0 (:bits imm)))))
(=> (= (:shift imm) #b01) (= rd (zero_ext 64 (concat (extract 15 0 (:bits imm)) #x0000))))
(=> (= (:shift imm) #b10) (= rd (zero_ext 64 (concat (extract 15 0 (:bits imm)) #x00000000))))
(=> (= (:shift imm) #b11) (= rd (concat (extract 15 0 (:bits imm)) #x000000000000)))
)
)
((MovN)
(and
(=> (= (:shift imm) #b00) (= rd (bvnot (zero_ext 64 (extract 15 0 (:bits imm))))))
(=> (= (:shift imm) #b01) (= rd (bvnot (zero_ext 64 (concat (extract 15 0 (:bits imm)) #x0000)))))
(=> (= (:shift imm) #b10) (= rd (bvnot (zero_ext 64 (concat (extract 15 0 (:bits imm)) #x00000000)))))
(=> (= (:shift imm) #b11) (= rd (bvnot (concat (extract 15 0 (:bits imm)) #x000000000000))))
)
)
)
)
((Size32)
(match
op
((MovZ)
(and
(=> (= (:shift imm) #b00) (= rd (zero_ext 64 (extract 15 0 (:bits imm)))))
(=> (= (:shift imm) #b01) (= rd (zero_ext 64 (concat (extract 15 0 (:bits imm)) #x0000))))
)
)
((MovN)
(and
(=> (= (:shift imm) #b00) (= rd (zero_ext 64 (bvnot (zero_ext 32 (extract 15 0 (:bits imm)))))))
(=> (= (:shift imm) #b01) (= rd (zero_ext 64 (bvnot (concat (extract 15 0 (:bits imm)) #x0000)))))
)
)
)
)
)
)
(require
(match
size
((Size64)
(match
op
((MovZ) (or (= (:shift imm) #b00) (= (:shift imm) #b01) (= (:shift imm) #b10) (= (:shift imm) #b11)))
((MovN) (or (= (:shift imm) #b00) (= (:shift imm) #b01) (= (:shift imm) #b10) (= (:shift imm) #b11)))
)
)
((Size32)
(match
op
((MovZ) (or (= (:shift imm) #b00) (= (:shift imm) #b01)))
((MovN) (or (= (:shift imm) #b00) (= (:shift imm) #b01)))
)
)
)
)
)