charm 0.0.1

ARM assembler & disassembler generated from the ARM exploration tools.
Documentation
//! # SMADDL
//!
//! This instruction multiplies two 32-bit register values, adds a 64-bit register value, and writes the result to the 64-bit destination register.

#![allow(non_snake_case)]
#![allow(unused)]
use crate::error::Result;
use crate::utils::*;
use super::super::formatter::*;
use super::super::instruction::*;
use super::super::operand::*;
use super::super::consts::*;
use super::super::config::*;
use super::super::decoder::*;

// ---------------------------------------------------------------------------
// Iclass IclassSmaddl64waDp3src
// ---------------------------------------------------------------------------

/// Type that represents the IclassSmaddl64waDp3src instruction class.
pub(crate) struct IclassSmaddl64waDp3src;

impl IclassSmaddl64waDp3src {
    /// Tries to decode the instruction in `data`.
    pub(crate) fn decode(data: u32, decoder: &mut Decoder) -> Result<Instruction> {
        let U = (data >> 23) & 1;
        let U_post = U;
        let Rm = (data >> 16) & 31;
        let Rm_post = Rm;
        let field_27 = (data >> 25) & 7;
        let field_27_post = field_27;
        let field_22 = (data >> 21) & 3;
        let field_22_post = field_22;
        let op54 = (data >> 29) & 3;
        let op54_post = op54;
        let o0 = (data >> 15) & 1;
        let o0_post = o0;
        let Ra = (data >> 10) & 31;
        let Ra_post = Ra;
        let Rn = (data >> 5) & 31;
        let Rn_post = Rn;
        let sf = (data >> 31) & 1;
        let sf_post = sf;
        let Rd = (data >> 0) & 31;
        let Rd_post = Rd;
        let field_28 = (data >> 28) & 1;
        let field_28_post = field_28;
        let field_24 = (data >> 24) & 1;
        let field_24_post = field_24;


        return Smaddl64waDp3src::decode(data as u32, decoder);

        unreachable!()
    }
}

/// 64-bit encoding.
///
/// # Encoding
///
/// <table style="font-family: courier, monospace">
///     <tr>
///         <td style="border: none">31</td>
///         <td style="border: none">30</td>
///         <td style="border: none">29</td>
///         <td style="border: none">28</td>
///         <td style="border: none">27</td>
///         <td style="border: none">26</td>
///         <td style="border: none">25</td>
///         <td style="border: none">24</td>
///         <td style="border: none">23</td>
///         <td style="border: none">22</td>
///         <td style="border: none">21</td>
///         <td style="border: none">20</td>
///         <td style="border: none">19</td>
///         <td style="border: none">18</td>
///         <td style="border: none">17</td>
///         <td style="border: none">16</td>
///         <td style="border: none">15</td>
///         <td style="border: none">14</td>
///         <td style="border: none">13</td>
///         <td style="border: none">12</td>
///         <td style="border: none">11</td>
///         <td style="border: none">10</td>
///         <td style="border: none">9</td>
///         <td style="border: none">8</td>
///         <td style="border: none">7</td>
///         <td style="border: none">6</td>
///         <td style="border: none">5</td>
///         <td style="border: none">4</td>
///         <td style="border: none">3</td>
///         <td style="border: none">2</td>
///         <td style="border: none">1</td>
///         <td style="border: none">0</td>
///     </tr>
///     <tr>
///          <td style="text-align: center; border-right: none" colspan="1">1</td>
///          <td style="text-align: center; border-right: none" colspan="1">0</td>
///          <td style="text-align: center; border-left: none" colspan="1">0</td>
///          <td style="text-align: center; border-right: none" colspan="1">1</td>
///          <td style="text-align: center; border-right: none" colspan="1">1</td>
///          <td style="text-align: center; border-left: none; border-right: none" colspan="1">0</td>
///          <td style="text-align: center; border-left: none" colspan="1">1</td>
///          <td style="text-align: center; border-right: none" colspan="1">1</td>
///          <td style="text-align: center; border-right: none" colspan="1">0</td>
///          <td style="text-align: center; border-right: none" colspan="1">0</td>
///          <td style="text-align: center; border-left: none" colspan="1">1</td>
/// <td style="text-align: center" colspan="5">Rm</td>
///          <td style="text-align: center; border-right: none" colspan="1">0</td>
/// <td style="text-align: center" colspan="5">Ra</td>
/// <td style="text-align: center" colspan="5">Rn</td>
/// <td style="text-align: center" colspan="5">Rd</td>
///     </tr>
///     <tr>
/// <td style="text-align: center; border: none" colspan="1">sf</td>
/// <td style="text-align: center; border: none" colspan="2">op54</td>
/// <td style="text-align: center; border: none" colspan="1"></td>
/// <td style="text-align: center; border: none" colspan="3"></td>
/// <td style="text-align: center; border: none" colspan="1"></td>
/// <td style="text-align: center; border: none" colspan="1">U</td>
/// <td style="text-align: center; border: none" colspan="2"></td>
/// <td style="text-align: center; border: none" colspan="5"></td>
/// <td style="text-align: center; border: none" colspan="1">o0</td>
/// <td style="text-align: center; border: none" colspan="5"></td>
/// <td style="text-align: center; border: none" colspan="5"></td>
/// <td style="text-align: center; border: none" colspan="5"></td>
///     </tr>
/// </table>
pub struct Smaddl64waDp3src;

impl Smaddl64waDp3src {
    /// Returns the instruction mnemonic.
    pub fn mnemonic(_instr: &Instruction) -> Mnemonic {
        Mnemonic::SMADDL
    }

    /// Returns the instruction size.
    pub fn size(_instr: &Instruction) -> usize {
        4
    }

    /// Decodes the instruction in `data`.
    pub fn decode(data: u32, decoder: &mut Decoder) -> Result<Instruction> {
        // Fields are extracted from the input value.
        let Rm = (data >> 16) & 31;
        let Rm_post = Rm;
        let Ra = (data >> 10) & 31;
        let Ra_post = Ra;
        let Rn = (data >> 5) & 31;
        let Rn_post = Rn;
        let Rd = (data >> 0) & 31;
        let Rd_post = Rd;
        
        /// Checks are performed in case an alias should be used instead of the current encoding.
        match decoder.config.instructions.smaddl_64wa_dp_3src.aliases {
            // No alias configuration for this instruction, we default to the global one.
            None => match decoder.config.global.aliases {
                // We skip the alias checks and use the base encoding.
                FormatAliasGlobal::Never => {},
                // We go through each alias and their conditions, returning the first
                // one that matches.
                FormatAliasGlobal::Recommended => {
                    if (Ra_post == 31) {
                        return super::SmullSmaddl64waDp3src::decode(data, decoder);
                    }
                },
                // We always use the alias, regardless of its condition.
                FormatAliasGlobal::Always => {
                    return super::SmullSmaddl64waDp3src::decode(data, decoder);
                }
            }
            Some(pref) => match pref {
                FormatAliasInstruction::Never => {},
                FormatAliasInstruction::Recommended => {
                    if (Ra_post == 31) {
                        return super::SmullSmaddl64waDp3src::decode(data, decoder);
                    }
                },
                FormatAliasInstruction::Preferred(alias) => {
                    match alias {
                        Smaddl64waDp3srcAliases::SmullSmaddl64waDp3src => {
                            if (Ra_post == 31) {
                                return super::SmullSmaddl64waDp3src::decode(data, decoder);
                            }
                        }
                    };
                    if (Ra_post == 31) {
                        return super::SmullSmaddl64waDp3src::decode(data, decoder);
                    }
                },
                FormatAliasInstruction::Always(alias) => {
                    match alias {
                        Smaddl64waDp3srcAliases::SmullSmaddl64waDp3src => return super::SmullSmaddl64waDp3src::decode(data, decoder),
                    }
                },
            }
        }

        // Operand values are computed from the base fields.
        let Rd_post = Rd;
        let op_0 = Register::aarch64(Rd_post, false)?;
        let Rn_post = Rn;
        let op_1 = Register::aarch32(Rn_post, false)?;
        let Rm_post = Rm;
        let op_2 = Register::aarch32(Rm_post, false)?;
        let Ra_post = Ra;
        let op_3 = Register::aarch64(Ra_post, false)?;

        // Instruction creation from the operands.
        let mut instr = Instruction::builder(Code::SMADDL_64WA_dp_3src)
            .operand(0, op_0)?
            .operand(1, op_1)?
            .operand(2, op_2)?
            .operand(3, op_3)?
            .build();
        
        Ok(instr)
    }

    /// Encodes the instruction into `buf`.
    pub fn encode(instr: &Instruction, buf: &mut Vec<u8>) -> Result<usize> {
        // Retrieve all operand values.
        let Rd_pre = instr.op0().as_register()?.encode();
        let Rn_pre = instr.op1().as_register()?.encode();
        let Rm_pre = instr.op2().as_register()?.encode();
        let Ra_pre = instr.op3().as_register()?.encode();

        // Compute all instruction fields from the operand values.
        let Rd = (Rd_pre & 31);
        let Rn = (Rn_pre & 31);
        let Rm = (Rm_pre & 31);
        let Ra = (Ra_pre & 31);

        // Add all fields to the base instruction encoding.
        let mut instr: u32 = 0b10011011001000000000000000000000;
        instr |= (Rd & 31) << 0;
        instr |= (Rn & 31) << 5;
        instr |= (Rm & 31) << 16;
        instr |= (Ra & 31) << 10;

        let bytes = instr.to_le_bytes();
        let len = bytes.len();
        buf.extend(bytes);
        Ok(len)
    }

    /// Encode an instruction part of an instruction block into `buf`.
    pub fn encode_block(instr: &mut Instruction, buf: &mut Vec<u8>, labels: &std::collections::HashMap<u64, u64>) -> Result<usize> {
        Self::encode(instr, buf)
    }
    
    /// Verifies that operand #0 is valid.
    pub fn check_op0(instr: &Instruction, op: &Operand) -> Result<()> {
        if let Operand::Register(r) = op {
            if !r.is_aarch64() {
                todo!()
            }
            
            if *r == Register::SP {
                todo!()
            }
            return Ok(())
        }
        todo!()
    }
    
    /// Verifies that operand #1 is valid.
    pub fn check_op1(instr: &Instruction, op: &Operand) -> Result<()> {
        if let Operand::Register(r) = op {
            if !r.is_aarch32() {
                todo!()
            }
            if *r == Register::WSP {
                todo!()
            }
            return Ok(())
        }
        todo!()
    }
    
    /// Verifies that operand #2 is valid.
    pub fn check_op2(instr: &Instruction, op: &Operand) -> Result<()> {
        if let Operand::Register(r) = op {
            if !r.is_aarch32() {
                todo!()
            }
            if *r == Register::WSP {
                todo!()
            }
            return Ok(())
        }
        todo!()
    }
    
    /// Verifies that operand #3 is valid.
    pub fn check_op3(instr: &Instruction, op: &Operand) -> Result<()> {
        if let Operand::Register(r) = op {
            if !r.is_aarch64() {
                todo!()
            }
            
            if *r == Register::SP {
                todo!()
            }
            return Ok(())
        }
        todo!()
    }
    
    /// Verifies that operand #4 is valid.
    pub fn check_op4(instr: &Instruction, op: &Operand) -> Result<()> {
        todo!()
    }
    
    /// Verifies that operand #5 is valid.
    pub fn check_op5(instr: &Instruction, op: &Operand) -> Result<()> {
        todo!()
    }
    
    /// Verifies that operand #6 is valid.
    pub fn check_op6(instr: &Instruction, op: &Operand) -> Result<()> {
        todo!()
    }

    /// Formats the instruction.
    pub fn format(instr: &Instruction, fmt: &mut impl Formatter, output: &mut impl FormatterOutput, config: &Config) -> Result<()> {
        fmt.format_mnemonic(output, &config.global, &config.instructions.smaddl_64wa_dp_3src, instr)?;
        fmt.format_punctuation(output, &config.global, &config.instructions.smaddl_64wa_dp_3src, instr, FormatterTextKind::Space)?;
        fmt.format_operand(output, &config.global, &config.instructions.smaddl_64wa_dp_3src, instr, 0)?;
        fmt.format_punctuation(output, &config.global, &config.instructions.smaddl_64wa_dp_3src, instr, FormatterTextKind::Comma)?;
        fmt.format_operand(output, &config.global, &config.instructions.smaddl_64wa_dp_3src, instr, 1)?;
        fmt.format_punctuation(output, &config.global, &config.instructions.smaddl_64wa_dp_3src, instr, FormatterTextKind::Comma)?;
        fmt.format_operand(output, &config.global, &config.instructions.smaddl_64wa_dp_3src, instr, 2)?;
        fmt.format_punctuation(output, &config.global, &config.instructions.smaddl_64wa_dp_3src, instr, FormatterTextKind::Comma)?;
        fmt.format_operand(output, &config.global, &config.instructions.smaddl_64wa_dp_3src, instr, 3)?;
        Ok(())
    }
}

/// Type that represents alias identifiers for [`Smaddl64waDp3src`].
#[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd, Debug, Hash)]
pub enum Smaddl64waDp3srcAliases {
    SmullSmaddl64waDp3src,
}