charm 0.0.1

ARM assembler & disassembler generated from the ARM exploration tools.
Documentation
//! # BR
//!
//! This instruction branches unconditionally to an address in a register. This instruction provides a hint that this is not a subroutine call or return.

#![allow(non_snake_case)]
#![allow(unused)]
use crate::error::Result;
use crate::utils::*;
use super::super::formatter::*;
use super::super::instruction::*;
use super::super::operand::*;
use super::super::consts::*;
use super::super::config::*;
use super::super::decoder::*;

// ---------------------------------------------------------------------------
// Iclass IclassBr64BranchReg
// ---------------------------------------------------------------------------

/// Type that represents the IclassBr64BranchReg instruction class.
pub(crate) struct IclassBr64BranchReg;

impl IclassBr64BranchReg {
    /// Tries to decode the instruction in `data`.
    pub(crate) fn decode(data: u32, decoder: &mut Decoder) -> Result<Instruction> {
        let M = (data >> 10) & 1;
        let M_post = M;
        let Rm = (data >> 0) & 31;
        let Rm_post = Rm;
        let op = (data >> 21) & 3;
        let op_post = op;
        let Z = (data >> 24) & 1;
        let Z_post = Z;
        let field_15 = (data >> 12) & 15;
        let field_15_post = field_15;
        let field_28 = (data >> 26) & 7;
        let field_28_post = field_28;
        let field_31 = (data >> 29) & 7;
        let field_31_post = field_31;
        let Rn = (data >> 5) & 31;
        let Rn_post = Rn;
        let field_25 = (data >> 25) & 1;
        let field_25_post = field_25;
        let A = (data >> 11) & 1;
        let A_post = A;
        let field_23 = (data >> 23) & 1;
        let field_23_post = field_23;
        let op2 = (data >> 16) & 31;
        let op2_post = op2;


        return Br64BranchReg::decode(data as u32, decoder);

        unreachable!()
    }
}

/// None-bit encoding.
///
/// # Encoding
///
/// <table style="font-family: courier, monospace">
///     <tr>
///         <td style="border: none">31</td>
///         <td style="border: none">30</td>
///         <td style="border: none">29</td>
///         <td style="border: none">28</td>
///         <td style="border: none">27</td>
///         <td style="border: none">26</td>
///         <td style="border: none">25</td>
///         <td style="border: none">24</td>
///         <td style="border: none">23</td>
///         <td style="border: none">22</td>
///         <td style="border: none">21</td>
///         <td style="border: none">20</td>
///         <td style="border: none">19</td>
///         <td style="border: none">18</td>
///         <td style="border: none">17</td>
///         <td style="border: none">16</td>
///         <td style="border: none">15</td>
///         <td style="border: none">14</td>
///         <td style="border: none">13</td>
///         <td style="border: none">12</td>
///         <td style="border: none">11</td>
///         <td style="border: none">10</td>
///         <td style="border: none">9</td>
///         <td style="border: none">8</td>
///         <td style="border: none">7</td>
///         <td style="border: none">6</td>
///         <td style="border: none">5</td>
///         <td style="border: none">4</td>
///         <td style="border: none">3</td>
///         <td style="border: none">2</td>
///         <td style="border: none">1</td>
///         <td style="border: none">0</td>
///     </tr>
///     <tr>
///          <td style="text-align: center; border-right: none" colspan="1">1</td>
///          <td style="text-align: center; border-left: none; border-right: none" colspan="1">1</td>
///          <td style="text-align: center; border-left: none" colspan="1">0</td>
///          <td style="text-align: center; border-right: none" colspan="1">1</td>
///          <td style="text-align: center; border-left: none; border-right: none" colspan="1">0</td>
///          <td style="text-align: center; border-left: none" colspan="1">1</td>
///          <td style="text-align: center; border-right: none" colspan="1">1</td>
///          <td style="text-align: center; border-right: none" colspan="1">0</td>
///          <td style="text-align: center; border-right: none" colspan="1">0</td>
///          <td style="text-align: center; border-right: none" colspan="1">0</td>
///          <td style="text-align: center; border-left: none" colspan="1">0</td>
///          <td style="text-align: center; border-right: none" colspan="1">1</td>
///          <td style="text-align: center; border-left: none; border-right: none" colspan="1">1</td>
///          <td style="text-align: center; border-left: none; border-right: none" colspan="1">1</td>
///          <td style="text-align: center; border-left: none; border-right: none" colspan="1">1</td>
///          <td style="text-align: center; border-left: none" colspan="1">1</td>
///          <td style="text-align: center; border-right: none" colspan="1">0</td>
///          <td style="text-align: center; border-left: none; border-right: none" colspan="1">0</td>
///          <td style="text-align: center; border-left: none; border-right: none" colspan="1">0</td>
///          <td style="text-align: center; border-left: none" colspan="1">0</td>
///          <td style="text-align: center; border-right: none" colspan="1">0</td>
///          <td style="text-align: center; border-right: none" colspan="1">0</td>
/// <td style="text-align: center" colspan="5">Rn</td>
///          <td style="text-align: center; border-right: none" colspan="1">0</td>
///          <td style="text-align: center; border-left: none; border-right: none" colspan="1">0</td>
///          <td style="text-align: center; border-left: none; border-right: none" colspan="1">0</td>
///          <td style="text-align: center; border-left: none; border-right: none" colspan="1">0</td>
///          <td style="text-align: center; border-left: none" colspan="1">0</td>
///     </tr>
///     <tr>
/// <td style="text-align: center; border: none" colspan="3"></td>
/// <td style="text-align: center; border: none" colspan="3"></td>
/// <td style="text-align: center; border: none" colspan="1"></td>
/// <td style="text-align: center; border: none" colspan="1">Z</td>
/// <td style="text-align: center; border: none" colspan="1"></td>
/// <td style="text-align: center; border: none" colspan="2">op</td>
/// <td style="text-align: center; border: none" colspan="5">op2</td>
/// <td style="text-align: center; border: none" colspan="4"></td>
/// <td style="text-align: center; border: none" colspan="1">A</td>
/// <td style="text-align: center; border: none" colspan="1">M</td>
/// <td style="text-align: center; border: none" colspan="5"></td>
/// <td style="text-align: center; border: none" colspan="5">Rm</td>
///     </tr>
/// </table>
pub struct Br64BranchReg;

impl Br64BranchReg {
    /// Returns the instruction mnemonic.
    pub fn mnemonic(_instr: &Instruction) -> Mnemonic {
        Mnemonic::BR
    }

    /// Returns the instruction size.
    pub fn size(_instr: &Instruction) -> usize {
        4
    }

    /// Decodes the instruction in `data`.
    pub fn decode(data: u32, decoder: &mut Decoder) -> Result<Instruction> {
        // Fields are extracted from the input value.
        let Rn = (data >> 5) & 31;
        let Rn_post = Rn;
        

        // Operand values are computed from the base fields.
        let Rn_post = Rn;
        let op_0 = Register::aarch64(Rn_post, false)?;

        // Instruction creation from the operands.
        let mut instr = Instruction::builder(Code::BR_64_branch_reg)
            .operand(0, op_0)?
            .build();
        
        Ok(instr)
    }

    /// Encodes the instruction into `buf`.
    pub fn encode(instr: &Instruction, buf: &mut Vec<u8>) -> Result<usize> {
        // Retrieve all operand values.
        let Rn_pre = instr.op0().as_register()?.encode();

        // Compute all instruction fields from the operand values.
        let Rn = (Rn_pre & 31);

        // Add all fields to the base instruction encoding.
        let mut instr: u32 = 0b11010110000111110000000000000000;
        instr |= (Rn & 31) << 5;

        let bytes = instr.to_le_bytes();
        let len = bytes.len();
        buf.extend(bytes);
        Ok(len)
    }

    /// Encode an instruction part of an instruction block into `buf`.
    pub fn encode_block(instr: &mut Instruction, buf: &mut Vec<u8>, labels: &std::collections::HashMap<u64, u64>) -> Result<usize> {
        Self::encode(instr, buf)
    }
    
    /// Verifies that operand #0 is valid.
    pub fn check_op0(instr: &Instruction, op: &Operand) -> Result<()> {
        if let Operand::Register(r) = op {
            if !r.is_aarch64() {
                todo!()
            }
            
            if *r == Register::SP {
                todo!()
            }
            return Ok(())
        }
        todo!()
    }
    
    /// Verifies that operand #1 is valid.
    pub fn check_op1(instr: &Instruction, op: &Operand) -> Result<()> {
        todo!()
    }
    
    /// Verifies that operand #2 is valid.
    pub fn check_op2(instr: &Instruction, op: &Operand) -> Result<()> {
        todo!()
    }
    
    /// Verifies that operand #3 is valid.
    pub fn check_op3(instr: &Instruction, op: &Operand) -> Result<()> {
        todo!()
    }
    
    /// Verifies that operand #4 is valid.
    pub fn check_op4(instr: &Instruction, op: &Operand) -> Result<()> {
        todo!()
    }
    
    /// Verifies that operand #5 is valid.
    pub fn check_op5(instr: &Instruction, op: &Operand) -> Result<()> {
        todo!()
    }
    
    /// Verifies that operand #6 is valid.
    pub fn check_op6(instr: &Instruction, op: &Operand) -> Result<()> {
        todo!()
    }

    /// Formats the instruction.
    pub fn format(instr: &Instruction, fmt: &mut impl Formatter, output: &mut impl FormatterOutput, config: &Config) -> Result<()> {
        fmt.format_mnemonic(output, &config.global, &config.instructions.br_64_branch_reg, instr)?;
        fmt.format_punctuation(output, &config.global, &config.instructions.br_64_branch_reg, instr, FormatterTextKind::Space)?;
        fmt.format_operand(output, &config.global, &config.instructions.br_64_branch_reg, instr, 0)?;
        Ok(())
    }
}

/// Type that represents alias identifiers for [`Br64BranchReg`].
#[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd, Debug, Hash)]
pub enum Br64BranchRegAliases {
    None,
}