calyx 0.7.1

Compiler Infrastructure for Hardware Accelerator Generation
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// -p well-formed
import "primitives/core.futil";
import "primitives/memories/comb.futil";
component main() -> () {
  cells {
    r = std_reg(32);
    w1 = std_wire(32);
    w2 = std_wire(32);
  }
  wires {
    r.in = w1.out;
    r.in = w2.out;
  }
  control {}
}