calyx 0.7.1

Compiler Infrastructure for Hardware Accelerator Generation
1
2
3
4
5
6
7
8
9
10
11
import "primitives/core.futil";
import "primitives/memories/comb.futil";
component main() -> () {
  cells {
    le = std_le(32);
  }
  wires { }
  control {
    if le.out { seq {} }
  }
}