calyx 0.7.1

Compiler Infrastructure for Hardware Accelerator Generation
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import "primitives/core.futil";
import "primitives/memories/comb.futil";
component main() -> () {
  cells {
    add = std_add(32);
    x = std_reg(16);
  }
  wires {
    add.left = x.out;
  }
  control {}
}