1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
use crate::x86::assembler::*;
use crate::x86::operands::*;
use super::super::opcodes::*;
use crate::core::emitter::*;
use crate::core::operand::*;
/// A dummy operand that represents no register. Here just for simplicity.
const NOREG: Operand = Operand::new();
/// `PREFETCH`.
///
/// Supported operand variants:
///
/// ```text
/// +---+----------+
/// | # | Operands |
/// +---+----------+
/// | 1 | Mem |
/// +---+----------+
/// ```
pub trait PrefetchEmitter<A> {
fn prefetch(&mut self, op0: A);
}
impl<'a> PrefetchEmitter<Mem> for Assembler<'a> {
fn prefetch(&mut self, op0: Mem) {
self.emit(PREFETCHM, op0.as_operand(), &NOREG, &NOREG, &NOREG);
}
}
impl<'a> Assembler<'a> {
/// `PREFETCH`.
///
/// Supported operand variants:
///
/// ```text
/// +---+----------+
/// | # | Operands |
/// +---+----------+
/// | 1 | Mem |
/// +---+----------+
/// ```
#[inline]
pub fn prefetch<A>(&mut self, op0: A)
where Assembler<'a>: PrefetchEmitter<A> {
<Self as PrefetchEmitter<A>>::prefetch(self, op0);
}
}