pub struct SPI5 { /* private fields */ }
Expand description
Serial peripheral interface
See peripheral structure
Implementations§
Source§impl SPI5
impl SPI5
Sourcepub const PTR: *const RegisterBlock = {0x40015000 as *const stm32f4_staging::stm32f429::spi1::RegisterBlock}
pub const PTR: *const RegisterBlock = {0x40015000 as *const stm32f4_staging::stm32f429::spi1::RegisterBlock}
Pointer to the register block
Sourcepub const fn ptr() -> *const RegisterBlock
pub const fn ptr() -> *const RegisterBlock
Return the pointer to the register block
Sourcepub unsafe fn steal() -> SPI5
pub unsafe fn steal() -> SPI5
Steal an instance of this peripheral
§Safety
Ensure that the new instance of the peripheral cannot be used in a way that may race with any existing instances, for example by only accessing read-only or write-only registers, or by consuming the original peripheral and using critical sections to coordinate access between multiple new instances.
Additionally, other software such as HALs may rely on only one peripheral instance existing to ensure memory safety; ensure no stolen instances are passed to such software.
Methods from Deref<Target = RegisterBlock>§
Trait Implementations§
Source§impl Enable for SPI5
impl Enable for SPI5
Source§fn is_enabled() -> bool
fn is_enabled() -> bool
Source§fn is_disabled() -> bool
fn is_disabled() -> bool
Source§unsafe fn enable_unchecked()
unsafe fn enable_unchecked()
Source§unsafe fn disable_unchecked()
unsafe fn disable_unchecked()
Source§impl LPEnable for SPI5
impl LPEnable for SPI5
Source§fn enable_in_low_power(rcc: &RccRB)
fn enable_in_low_power(rcc: &RccRB)
Source§fn disable_in_low_power(rcc: &RccRB)
fn disable_in_low_power(rcc: &RccRB)
Source§fn is_enabled_in_low_power() -> bool
fn is_enabled_in_low_power() -> bool
Source§fn is_disabled_in_low_power() -> bool
fn is_disabled_in_low_power() -> bool
Source§unsafe fn enable_in_low_power_unchecked()
unsafe fn enable_in_low_power_unchecked()
Source§unsafe fn disable_in_low_power_unchecked()
unsafe fn disable_in_low_power_unchecked()
Source§impl PeriAddress for SPI5
impl PeriAddress for SPI5
impl DMASet<StreamX<DMA2, 3>, 2, PeripheralToMemory> for SPI5
impl DMASet<StreamX<DMA2, 4>, 2, MemoryToPeripheral> for SPI5
impl DMASet<StreamX<DMA2, 5>, 7, PeripheralToMemory> for SPI5
impl DMASet<StreamX<DMA2, 6>, 7, MemoryToPeripheral> for SPI5
impl Instance for SPI5
impl Instance for SPI5
impl Send for SPI5
Auto Trait Implementations§
impl Freeze for SPI5
impl RefUnwindSafe for SPI5
impl !Sync for SPI5
impl Unpin for SPI5
impl UnwindSafe for SPI5
Blanket Implementations§
Source§impl<T> BorrowMut<T> for Twhere
T: ?Sized,
impl<T> BorrowMut<T> for Twhere
T: ?Sized,
Source§fn borrow_mut(&mut self) -> &mut T
fn borrow_mut(&mut self) -> &mut T
Source§impl<T> BusTimerClock for T
impl<T> BusTimerClock for T
Source§impl<SPI> SpiExt for SPIwhere
SPI: Instance,
impl<SPI> SpiExt for SPIwhere
SPI: Instance,
Source§fn spi(
self,
pins: (impl Into<<SPI as SpiCommon>::Sck>, impl Into<<SPI as SpiCommon>::Miso>, impl Into<<SPI as SpiCommon>::Mosi>),
mode: impl Into<Mode>,
freq: Rate<u32, 1, 1>,
clocks: &Clocks,
) -> Spi<SPI>
fn spi( self, pins: (impl Into<<SPI as SpiCommon>::Sck>, impl Into<<SPI as SpiCommon>::Miso>, impl Into<<SPI as SpiCommon>::Mosi>), mode: impl Into<Mode>, freq: Rate<u32, 1, 1>, clocks: &Clocks, ) -> Spi<SPI>
Enables the SPI clock, resets the peripheral, sets Alternate
mode for pins
and initialize the peripheral as SPI Master Normal mode.
§Note
Depending on freq
you may need to set GPIO speed for pins
(the Speed::Low
is default for GPIO) before create Spi
instance.
Otherwise it may lead to the ‘wrong last bit in every received byte’ problem.
Source§fn spi_bidi(
self,
pins: (impl Into<<SPI as SpiCommon>::Sck>, impl Into<<SPI as SpiCommon>::Mosi>),
mode: impl Into<Mode>,
freq: Rate<u32, 1, 1>,
clocks: &Clocks,
) -> Spi<SPI, true>
fn spi_bidi( self, pins: (impl Into<<SPI as SpiCommon>::Sck>, impl Into<<SPI as SpiCommon>::Mosi>), mode: impl Into<Mode>, freq: Rate<u32, 1, 1>, clocks: &Clocks, ) -> Spi<SPI, true>
Enables the SPI clock, resets the peripheral, sets Alternate
mode for pins
and initialize the peripheral as SPI Master BIDI mode.
§Note
Depending on freq
you may need to set GPIO speed for pins
(the Speed::Low
is default for GPIO) before create Spi
instance.
Otherwise it may lead to the ‘wrong last bit in every received byte’ problem.
Source§fn spi_slave(
self,
pins: (impl Into<<SPI as SpiCommon>::Sck>, impl Into<<SPI as SpiCommon>::Miso>, impl Into<<SPI as SpiCommon>::Mosi>, Option<<SPI as SpiCommon>::Nss>),
mode: impl Into<Mode>,
) -> SpiSlave<SPI>
fn spi_slave( self, pins: (impl Into<<SPI as SpiCommon>::Sck>, impl Into<<SPI as SpiCommon>::Miso>, impl Into<<SPI as SpiCommon>::Mosi>, Option<<SPI as SpiCommon>::Nss>), mode: impl Into<Mode>, ) -> SpiSlave<SPI>
Enables the SPI clock, resets the peripheral, sets Alternate
mode for pins
and initialize the peripheral as SPI Slave Normal mode.
§Note
Depending on freq
you may need to set GPIO speed for pins
(the Speed::Low
is default for GPIO) before create Spi
instance.
Otherwise it may lead to the ‘wrong last bit in every received byte’ problem.
Source§fn spi_bidi_slave(
self,
pins: (impl Into<<SPI as SpiCommon>::Sck>, impl Into<<SPI as SpiCommon>::Miso>, Option<<SPI as SpiCommon>::Nss>),
mode: impl Into<Mode>,
) -> SpiSlave<SPI, true>
fn spi_bidi_slave( self, pins: (impl Into<<SPI as SpiCommon>::Sck>, impl Into<<SPI as SpiCommon>::Miso>, Option<<SPI as SpiCommon>::Nss>), mode: impl Into<Mode>, ) -> SpiSlave<SPI, true>
Enables the SPI clock, resets the peripheral, sets Alternate
mode for pins
and initialize the peripheral as SPI Slave BIDI mode.
§Note
Depending on freq
you may need to set GPIO speed for pins
(the Speed::Low
is default for GPIO) before create Spi
instance.
Otherwise it may lead to the ‘wrong last bit in every received byte’ problem.