stm32h7 0.16.0

Device support crates for STM32H7 devices
Documentation 
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///Register `K2RR` writer
pub type W = crate::W<K2RRrs>;
///Field `b64` writer - b64
pub type B64_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `b65` writer - b65
pub type B65_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `b66` writer - b66
pub type B66_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `b67` writer - b67
pub type B67_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `b68` writer - b68
pub type B68_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `b69` writer - b69
pub type B69_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `b70` writer - b70
pub type B70_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `b71` writer - b71
pub type B71_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `b72` writer - b72
pub type B72_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `b73` writer - b73
pub type B73_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `b74` writer - b74
pub type B74_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `b75` writer - b75
pub type B75_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `b76` writer - b76
pub type B76_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `b77` writer - b77
pub type B77_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `b78` writer - b78
pub type B78_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `b79` writer - b79
pub type B79_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `b80` writer - b80
pub type B80_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `b81` writer - b81
pub type B81_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `b82` writer - b82
pub type B82_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `b83` writer - b83
pub type B83_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `b84` writer - b84
pub type B84_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `b85` writer - b85
pub type B85_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `b86` writer - b86
pub type B86_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `b87` writer - b87
pub type B87_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `b88` writer - b88
pub type B88_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `b89` writer - b89
pub type B89_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `b90` writer - b90
pub type B90_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `b91` writer - b91
pub type B91_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `b92` writer - b92
pub type B92_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `b93` writer - b93
pub type B93_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `b94` writer - b94
pub type B94_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `b95` writer - b95
pub type B95_W<'a, REG> = crate::BitWriter<'a, REG>;
impl core::fmt::Debug for crate::generic::Reg<K2RRrs> {
    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
        write!(f, "(not readable)")
    }
}
impl W {
    ///Bit 0 - b64
    #[inline(always)]
    pub fn b64(&mut self) -> B64_W<K2RRrs> {
        B64_W::new(self, 0)
    }
    ///Bit 1 - b65
    #[inline(always)]
    pub fn b65(&mut self) -> B65_W<K2RRrs> {
        B65_W::new(self, 1)
    }
    ///Bit 2 - b66
    #[inline(always)]
    pub fn b66(&mut self) -> B66_W<K2RRrs> {
        B66_W::new(self, 2)
    }
    ///Bit 3 - b67
    #[inline(always)]
    pub fn b67(&mut self) -> B67_W<K2RRrs> {
        B67_W::new(self, 3)
    }
    ///Bit 4 - b68
    #[inline(always)]
    pub fn b68(&mut self) -> B68_W<K2RRrs> {
        B68_W::new(self, 4)
    }
    ///Bit 5 - b69
    #[inline(always)]
    pub fn b69(&mut self) -> B69_W<K2RRrs> {
        B69_W::new(self, 5)
    }
    ///Bit 6 - b70
    #[inline(always)]
    pub fn b70(&mut self) -> B70_W<K2RRrs> {
        B70_W::new(self, 6)
    }
    ///Bit 7 - b71
    #[inline(always)]
    pub fn b71(&mut self) -> B71_W<K2RRrs> {
        B71_W::new(self, 7)
    }
    ///Bit 8 - b72
    #[inline(always)]
    pub fn b72(&mut self) -> B72_W<K2RRrs> {
        B72_W::new(self, 8)
    }
    ///Bit 9 - b73
    #[inline(always)]
    pub fn b73(&mut self) -> B73_W<K2RRrs> {
        B73_W::new(self, 9)
    }
    ///Bit 10 - b74
    #[inline(always)]
    pub fn b74(&mut self) -> B74_W<K2RRrs> {
        B74_W::new(self, 10)
    }
    ///Bit 11 - b75
    #[inline(always)]
    pub fn b75(&mut self) -> B75_W<K2RRrs> {
        B75_W::new(self, 11)
    }
    ///Bit 12 - b76
    #[inline(always)]
    pub fn b76(&mut self) -> B76_W<K2RRrs> {
        B76_W::new(self, 12)
    }
    ///Bit 13 - b77
    #[inline(always)]
    pub fn b77(&mut self) -> B77_W<K2RRrs> {
        B77_W::new(self, 13)
    }
    ///Bit 14 - b78
    #[inline(always)]
    pub fn b78(&mut self) -> B78_W<K2RRrs> {
        B78_W::new(self, 14)
    }
    ///Bit 15 - b79
    #[inline(always)]
    pub fn b79(&mut self) -> B79_W<K2RRrs> {
        B79_W::new(self, 15)
    }
    ///Bit 16 - b80
    #[inline(always)]
    pub fn b80(&mut self) -> B80_W<K2RRrs> {
        B80_W::new(self, 16)
    }
    ///Bit 17 - b81
    #[inline(always)]
    pub fn b81(&mut self) -> B81_W<K2RRrs> {
        B81_W::new(self, 17)
    }
    ///Bit 18 - b82
    #[inline(always)]
    pub fn b82(&mut self) -> B82_W<K2RRrs> {
        B82_W::new(self, 18)
    }
    ///Bit 19 - b83
    #[inline(always)]
    pub fn b83(&mut self) -> B83_W<K2RRrs> {
        B83_W::new(self, 19)
    }
    ///Bit 20 - b84
    #[inline(always)]
    pub fn b84(&mut self) -> B84_W<K2RRrs> {
        B84_W::new(self, 20)
    }
    ///Bit 21 - b85
    #[inline(always)]
    pub fn b85(&mut self) -> B85_W<K2RRrs> {
        B85_W::new(self, 21)
    }
    ///Bit 22 - b86
    #[inline(always)]
    pub fn b86(&mut self) -> B86_W<K2RRrs> {
        B86_W::new(self, 22)
    }
    ///Bit 23 - b87
    #[inline(always)]
    pub fn b87(&mut self) -> B87_W<K2RRrs> {
        B87_W::new(self, 23)
    }
    ///Bit 24 - b88
    #[inline(always)]
    pub fn b88(&mut self) -> B88_W<K2RRrs> {
        B88_W::new(self, 24)
    }
    ///Bit 25 - b89
    #[inline(always)]
    pub fn b89(&mut self) -> B89_W<K2RRrs> {
        B89_W::new(self, 25)
    }
    ///Bit 26 - b90
    #[inline(always)]
    pub fn b90(&mut self) -> B90_W<K2RRrs> {
        B90_W::new(self, 26)
    }
    ///Bit 27 - b91
    #[inline(always)]
    pub fn b91(&mut self) -> B91_W<K2RRrs> {
        B91_W::new(self, 27)
    }
    ///Bit 28 - b92
    #[inline(always)]
    pub fn b92(&mut self) -> B92_W<K2RRrs> {
        B92_W::new(self, 28)
    }
    ///Bit 29 - b93
    #[inline(always)]
    pub fn b93(&mut self) -> B93_W<K2RRrs> {
        B93_W::new(self, 29)
    }
    ///Bit 30 - b94
    #[inline(always)]
    pub fn b94(&mut self) -> B94_W<K2RRrs> {
        B94_W::new(self, 30)
    }
    ///Bit 31 - b95
    #[inline(always)]
    pub fn b95(&mut self) -> B95_W<K2RRrs> {
        B95_W::new(self, 31)
    }
}
/**key registers

You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`k2rr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api).*/
pub struct K2RRrs;
impl crate::RegisterSpec for K2RRrs {
    type Ux = u32;
}
///`write(|w| ..)` method takes [`k2rr::W`](W) writer structure
impl crate::Writable for K2RRrs {
    type Safety = crate::Unsafe;
}
///`reset()` method sets K2RR to value 0
impl crate::Resettable for K2RRrs {}