stm32h7 0.16.0

///Register `IV1RR` reader
pub type R = crate::R<IV1RRrs>;
///Register `IV1RR` writer
pub type W = crate::W<IV1RRrs>;
///Field `IV127` reader - IV127
pub type IV127_R = crate::BitReader;
///Field `IV127` writer - IV127
pub type IV127_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `IV126` reader - IV126
pub type IV126_R = crate::BitReader;
///Field `IV126` writer - IV126
pub type IV126_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `IV125` reader - IV125
pub type IV125_R = crate::BitReader;
///Field `IV125` writer - IV125
pub type IV125_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `IV124` reader - IV124
pub type IV124_R = crate::BitReader;
///Field `IV124` writer - IV124
pub type IV124_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `IV123` reader - IV123
pub type IV123_R = crate::BitReader;
///Field `IV123` writer - IV123
pub type IV123_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `IV122` reader - IV122
pub type IV122_R = crate::BitReader;
///Field `IV122` writer - IV122
pub type IV122_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `IV121` reader - IV121
pub type IV121_R = crate::BitReader;
///Field `IV121` writer - IV121
pub type IV121_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `IV120` reader - IV120
pub type IV120_R = crate::BitReader;
///Field `IV120` writer - IV120
pub type IV120_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `IV119` reader - IV119
pub type IV119_R = crate::BitReader;
///Field `IV119` writer - IV119
pub type IV119_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `IV118` reader - IV118
pub type IV118_R = crate::BitReader;
///Field `IV118` writer - IV118
pub type IV118_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `IV117` reader - IV117
pub type IV117_R = crate::BitReader;
///Field `IV117` writer - IV117
pub type IV117_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `IV116` reader - IV116
pub type IV116_R = crate::BitReader;
///Field `IV116` writer - IV116
pub type IV116_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `IV115` reader - IV115
pub type IV115_R = crate::BitReader;
///Field `IV115` writer - IV115
pub type IV115_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `IV114` reader - IV114
pub type IV114_R = crate::BitReader;
///Field `IV114` writer - IV114
pub type IV114_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `IV113` reader - IV113
pub type IV113_R = crate::BitReader;
///Field `IV113` writer - IV113
pub type IV113_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `IV112` reader - IV112
pub type IV112_R = crate::BitReader;
///Field `IV112` writer - IV112
pub type IV112_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `IV111` reader - IV111
pub type IV111_R = crate::BitReader;
///Field `IV111` writer - IV111
pub type IV111_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `IV110` reader - IV110
pub type IV110_R = crate::BitReader;
///Field `IV110` writer - IV110
pub type IV110_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `IV109` reader - IV109
pub type IV109_R = crate::BitReader;
///Field `IV109` writer - IV109
pub type IV109_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `IV108` reader - IV108
pub type IV108_R = crate::BitReader;
///Field `IV108` writer - IV108
pub type IV108_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `IV107` reader - IV107
pub type IV107_R = crate::BitReader;
///Field `IV107` writer - IV107
pub type IV107_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `IV106` reader - IV106
pub type IV106_R = crate::BitReader;
///Field `IV106` writer - IV106
pub type IV106_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `IV105` reader - IV105
pub type IV105_R = crate::BitReader;
///Field `IV105` writer - IV105
pub type IV105_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `IV104` reader - IV104
pub type IV104_R = crate::BitReader;
///Field `IV104` writer - IV104
pub type IV104_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `IV103` reader - IV103
pub type IV103_R = crate::BitReader;
///Field `IV103` writer - IV103
pub type IV103_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `IV102` reader - IV102
pub type IV102_R = crate::BitReader;
///Field `IV102` writer - IV102
pub type IV102_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `IV101` reader - IV101
pub type IV101_R = crate::BitReader;
///Field `IV101` writer - IV101
pub type IV101_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `IV100` reader - IV100
pub type IV100_R = crate::BitReader;
///Field `IV100` writer - IV100
pub type IV100_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `IV99` reader - IV99
pub type IV99_R = crate::BitReader;
///Field `IV99` writer - IV99
pub type IV99_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `IV98` reader - IV98
pub type IV98_R = crate::BitReader;
///Field `IV98` writer - IV98
pub type IV98_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `IV97` reader - IV97
pub type IV97_R = crate::BitReader;
///Field `IV97` writer - IV97
pub type IV97_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `IV96` reader - IV96
pub type IV96_R = crate::BitReader;
///Field `IV96` writer - IV96
pub type IV96_W<'a, REG> = crate::BitWriter<'a, REG>;
impl R {
    ///Bit 0 - IV127
    #[inline(always)]
    pub fn iv127(&self) -> IV127_R {
        IV127_R::new((self.bits & 1) != 0)
    }
    ///Bit 1 - IV126
    #[inline(always)]
    pub fn iv126(&self) -> IV126_R {
        IV126_R::new(((self.bits >> 1) & 1) != 0)
    }
    ///Bit 2 - IV125
    #[inline(always)]
    pub fn iv125(&self) -> IV125_R {
        IV125_R::new(((self.bits >> 2) & 1) != 0)
    }
    ///Bit 3 - IV124
    #[inline(always)]
    pub fn iv124(&self) -> IV124_R {
        IV124_R::new(((self.bits >> 3) & 1) != 0)
    }
    ///Bit 4 - IV123
    #[inline(always)]
    pub fn iv123(&self) -> IV123_R {
        IV123_R::new(((self.bits >> 4) & 1) != 0)
    }
    ///Bit 5 - IV122
    #[inline(always)]
    pub fn iv122(&self) -> IV122_R {
        IV122_R::new(((self.bits >> 5) & 1) != 0)
    }
    ///Bit 6 - IV121
    #[inline(always)]
    pub fn iv121(&self) -> IV121_R {
        IV121_R::new(((self.bits >> 6) & 1) != 0)
    }
    ///Bit 7 - IV120
    #[inline(always)]
    pub fn iv120(&self) -> IV120_R {
        IV120_R::new(((self.bits >> 7) & 1) != 0)
    }
    ///Bit 8 - IV119
    #[inline(always)]
    pub fn iv119(&self) -> IV119_R {
        IV119_R::new(((self.bits >> 8) & 1) != 0)
    }
    ///Bit 9 - IV118
    #[inline(always)]
    pub fn iv118(&self) -> IV118_R {
        IV118_R::new(((self.bits >> 9) & 1) != 0)
    }
    ///Bit 10 - IV117
    #[inline(always)]
    pub fn iv117(&self) -> IV117_R {
        IV117_R::new(((self.bits >> 10) & 1) != 0)
    }
    ///Bit 11 - IV116
    #[inline(always)]
    pub fn iv116(&self) -> IV116_R {
        IV116_R::new(((self.bits >> 11) & 1) != 0)
    }
    ///Bit 12 - IV115
    #[inline(always)]
    pub fn iv115(&self) -> IV115_R {
        IV115_R::new(((self.bits >> 12) & 1) != 0)
    }
    ///Bit 13 - IV114
    #[inline(always)]
    pub fn iv114(&self) -> IV114_R {
        IV114_R::new(((self.bits >> 13) & 1) != 0)
    }
    ///Bit 14 - IV113
    #[inline(always)]
    pub fn iv113(&self) -> IV113_R {
        IV113_R::new(((self.bits >> 14) & 1) != 0)
    }
    ///Bit 15 - IV112
    #[inline(always)]
    pub fn iv112(&self) -> IV112_R {
        IV112_R::new(((self.bits >> 15) & 1) != 0)
    }
    ///Bit 16 - IV111
    #[inline(always)]
    pub fn iv111(&self) -> IV111_R {
        IV111_R::new(((self.bits >> 16) & 1) != 0)
    }
    ///Bit 17 - IV110
    #[inline(always)]
    pub fn iv110(&self) -> IV110_R {
        IV110_R::new(((self.bits >> 17) & 1) != 0)
    }
    ///Bit 18 - IV109
    #[inline(always)]
    pub fn iv109(&self) -> IV109_R {
        IV109_R::new(((self.bits >> 18) & 1) != 0)
    }
    ///Bit 19 - IV108
    #[inline(always)]
    pub fn iv108(&self) -> IV108_R {
        IV108_R::new(((self.bits >> 19) & 1) != 0)
    }
    ///Bit 20 - IV107
    #[inline(always)]
    pub fn iv107(&self) -> IV107_R {
        IV107_R::new(((self.bits >> 20) & 1) != 0)
    }
    ///Bit 21 - IV106
    #[inline(always)]
    pub fn iv106(&self) -> IV106_R {
        IV106_R::new(((self.bits >> 21) & 1) != 0)
    }
    ///Bit 22 - IV105
    #[inline(always)]
    pub fn iv105(&self) -> IV105_R {
        IV105_R::new(((self.bits >> 22) & 1) != 0)
    }
    ///Bit 23 - IV104
    #[inline(always)]
    pub fn iv104(&self) -> IV104_R {
        IV104_R::new(((self.bits >> 23) & 1) != 0)
    }
    ///Bit 24 - IV103
    #[inline(always)]
    pub fn iv103(&self) -> IV103_R {
        IV103_R::new(((self.bits >> 24) & 1) != 0)
    }
    ///Bit 25 - IV102
    #[inline(always)]
    pub fn iv102(&self) -> IV102_R {
        IV102_R::new(((self.bits >> 25) & 1) != 0)
    }
    ///Bit 26 - IV101
    #[inline(always)]
    pub fn iv101(&self) -> IV101_R {
        IV101_R::new(((self.bits >> 26) & 1) != 0)
    }
    ///Bit 27 - IV100
    #[inline(always)]
    pub fn iv100(&self) -> IV100_R {
        IV100_R::new(((self.bits >> 27) & 1) != 0)
    }
    ///Bit 28 - IV99
    #[inline(always)]
    pub fn iv99(&self) -> IV99_R {
        IV99_R::new(((self.bits >> 28) & 1) != 0)
    }
    ///Bit 29 - IV98
    #[inline(always)]
    pub fn iv98(&self) -> IV98_R {
        IV98_R::new(((self.bits >> 29) & 1) != 0)
    }
    ///Bit 30 - IV97
    #[inline(always)]
    pub fn iv97(&self) -> IV97_R {
        IV97_R::new(((self.bits >> 30) & 1) != 0)
    }
    ///Bit 31 - IV96
    #[inline(always)]
    pub fn iv96(&self) -> IV96_R {
        IV96_R::new(((self.bits >> 31) & 1) != 0)
    }
}
impl core::fmt::Debug for R {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("IV1RR")
            .field("iv127", &self.iv127())
            .field("iv126", &self.iv126())
            .field("iv125", &self.iv125())
            .field("iv124", &self.iv124())
            .field("iv123", &self.iv123())
            .field("iv122", &self.iv122())
            .field("iv121", &self.iv121())
            .field("iv120", &self.iv120())
            .field("iv119", &self.iv119())
            .field("iv118", &self.iv118())
            .field("iv117", &self.iv117())
            .field("iv116", &self.iv116())
            .field("iv115", &self.iv115())
            .field("iv114", &self.iv114())
            .field("iv113", &self.iv113())
            .field("iv112", &self.iv112())
            .field("iv111", &self.iv111())
            .field("iv110", &self.iv110())
            .field("iv109", &self.iv109())
            .field("iv108", &self.iv108())
            .field("iv107", &self.iv107())
            .field("iv106", &self.iv106())
            .field("iv105", &self.iv105())
            .field("iv104", &self.iv104())
            .field("iv103", &self.iv103())
            .field("iv102", &self.iv102())
            .field("iv101", &self.iv101())
            .field("iv100", &self.iv100())
            .field("iv99", &self.iv99())
            .field("iv98", &self.iv98())
            .field("iv97", &self.iv97())
            .field("iv96", &self.iv96())
            .finish()
    }
}
impl W {
    ///Bit 0 - IV127
    #[inline(always)]
    pub fn iv127(&mut self) -> IV127_W<IV1RRrs> {
        IV127_W::new(self, 0)
    }
    ///Bit 1 - IV126
    #[inline(always)]
    pub fn iv126(&mut self) -> IV126_W<IV1RRrs> {
        IV126_W::new(self, 1)
    }
    ///Bit 2 - IV125
    #[inline(always)]
    pub fn iv125(&mut self) -> IV125_W<IV1RRrs> {
        IV125_W::new(self, 2)
    }
    ///Bit 3 - IV124
    #[inline(always)]
    pub fn iv124(&mut self) -> IV124_W<IV1RRrs> {
        IV124_W::new(self, 3)
    }
    ///Bit 4 - IV123
    #[inline(always)]
    pub fn iv123(&mut self) -> IV123_W<IV1RRrs> {
        IV123_W::new(self, 4)
    }
    ///Bit 5 - IV122
    #[inline(always)]
    pub fn iv122(&mut self) -> IV122_W<IV1RRrs> {
        IV122_W::new(self, 5)
    }
    ///Bit 6 - IV121
    #[inline(always)]
    pub fn iv121(&mut self) -> IV121_W<IV1RRrs> {
        IV121_W::new(self, 6)
    }
    ///Bit 7 - IV120
    #[inline(always)]
    pub fn iv120(&mut self) -> IV120_W<IV1RRrs> {
        IV120_W::new(self, 7)
    }
    ///Bit 8 - IV119
    #[inline(always)]
    pub fn iv119(&mut self) -> IV119_W<IV1RRrs> {
        IV119_W::new(self, 8)
    }
    ///Bit 9 - IV118
    #[inline(always)]
    pub fn iv118(&mut self) -> IV118_W<IV1RRrs> {
        IV118_W::new(self, 9)
    }
    ///Bit 10 - IV117
    #[inline(always)]
    pub fn iv117(&mut self) -> IV117_W<IV1RRrs> {
        IV117_W::new(self, 10)
    }
    ///Bit 11 - IV116
    #[inline(always)]
    pub fn iv116(&mut self) -> IV116_W<IV1RRrs> {
        IV116_W::new(self, 11)
    }
    ///Bit 12 - IV115
    #[inline(always)]
    pub fn iv115(&mut self) -> IV115_W<IV1RRrs> {
        IV115_W::new(self, 12)
    }
    ///Bit 13 - IV114
    #[inline(always)]
    pub fn iv114(&mut self) -> IV114_W<IV1RRrs> {
        IV114_W::new(self, 13)
    }
    ///Bit 14 - IV113
    #[inline(always)]
    pub fn iv113(&mut self) -> IV113_W<IV1RRrs> {
        IV113_W::new(self, 14)
    }
    ///Bit 15 - IV112
    #[inline(always)]
    pub fn iv112(&mut self) -> IV112_W<IV1RRrs> {
        IV112_W::new(self, 15)
    }
    ///Bit 16 - IV111
    #[inline(always)]
    pub fn iv111(&mut self) -> IV111_W<IV1RRrs> {
        IV111_W::new(self, 16)
    }
    ///Bit 17 - IV110
    #[inline(always)]
    pub fn iv110(&mut self) -> IV110_W<IV1RRrs> {
        IV110_W::new(self, 17)
    }
    ///Bit 18 - IV109
    #[inline(always)]
    pub fn iv109(&mut self) -> IV109_W<IV1RRrs> {
        IV109_W::new(self, 18)
    }
    ///Bit 19 - IV108
    #[inline(always)]
    pub fn iv108(&mut self) -> IV108_W<IV1RRrs> {
        IV108_W::new(self, 19)
    }
    ///Bit 20 - IV107
    #[inline(always)]
    pub fn iv107(&mut self) -> IV107_W<IV1RRrs> {
        IV107_W::new(self, 20)
    }
    ///Bit 21 - IV106
    #[inline(always)]
    pub fn iv106(&mut self) -> IV106_W<IV1RRrs> {
        IV106_W::new(self, 21)
    }
    ///Bit 22 - IV105
    #[inline(always)]
    pub fn iv105(&mut self) -> IV105_W<IV1RRrs> {
        IV105_W::new(self, 22)
    }
    ///Bit 23 - IV104
    #[inline(always)]
    pub fn iv104(&mut self) -> IV104_W<IV1RRrs> {
        IV104_W::new(self, 23)
    }
    ///Bit 24 - IV103
    #[inline(always)]
    pub fn iv103(&mut self) -> IV103_W<IV1RRrs> {
        IV103_W::new(self, 24)
    }
    ///Bit 25 - IV102
    #[inline(always)]
    pub fn iv102(&mut self) -> IV102_W<IV1RRrs> {
        IV102_W::new(self, 25)
    }
    ///Bit 26 - IV101
    #[inline(always)]
    pub fn iv101(&mut self) -> IV101_W<IV1RRrs> {
        IV101_W::new(self, 26)
    }
    ///Bit 27 - IV100
    #[inline(always)]
    pub fn iv100(&mut self) -> IV100_W<IV1RRrs> {
        IV100_W::new(self, 27)
    }
    ///Bit 28 - IV99
    #[inline(always)]
    pub fn iv99(&mut self) -> IV99_W<IV1RRrs> {
        IV99_W::new(self, 28)
    }
    ///Bit 29 - IV98
    #[inline(always)]
    pub fn iv98(&mut self) -> IV98_W<IV1RRrs> {
        IV98_W::new(self, 29)
    }
    ///Bit 30 - IV97
    #[inline(always)]
    pub fn iv97(&mut self) -> IV97_W<IV1RRrs> {
        IV97_W::new(self, 30)
    }
    ///Bit 31 - IV96
    #[inline(always)]
    pub fn iv96(&mut self) -> IV96_W<IV1RRrs> {
        IV96_W::new(self, 31)
    }
}
/**initialization vector registers

You can [`read`](crate::Reg::read) this register and get [`iv1rr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`iv1rr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).*/
pub struct IV1RRrs;
impl crate::RegisterSpec for IV1RRrs {
    type Ux = u32;
}
///`read()` method returns [`iv1rr::R`](R) reader structure
impl crate::Readable for IV1RRrs {}
///`write(|w| ..)` method takes [`iv1rr::W`](W) writer structure
impl crate::Writable for IV1RRrs {
    type Safety = crate::Unsafe;
}
///`reset()` method sets IV1RR to value 0
impl crate::Resettable for IV1RRrs {}