#[doc = "Register `UCSCTL7` reader"]
pub type R = crate::R<Ucsctl7Spec>;
#[doc = "Register `UCSCTL7` writer"]
pub type W = crate::W<Ucsctl7Spec>;
#[doc = "Field `DCOFFG` reader - DCO Fault Flag"]
pub type DcoffgR = crate::BitReader;
#[doc = "Field `DCOFFG` writer - DCO Fault Flag"]
pub type DcoffgW<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `XT1LFOFFG` reader - XT1 Low Frequency Oscillator Fault Flag"]
pub type Xt1lfoffgR = crate::BitReader;
#[doc = "Field `XT1LFOFFG` writer - XT1 Low Frequency Oscillator Fault Flag"]
pub type Xt1lfoffgW<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `XT1HFOFFG` reader - XT1 High Frequency Oscillator 1 Fault Flag"]
pub type Xt1hfoffgR = crate::BitReader;
#[doc = "Field `XT1HFOFFG` writer - XT1 High Frequency Oscillator 1 Fault Flag"]
pub type Xt1hfoffgW<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `XT2OFFG` reader - High Frequency Oscillator 2 Fault Flag"]
pub type Xt2offgR = crate::BitReader;
#[doc = "Field `XT2OFFG` writer - High Frequency Oscillator 2 Fault Flag"]
pub type Xt2offgW<'a, REG> = crate::BitWriter<'a, REG>;
impl R {
#[doc = "Bit 0 - DCO Fault Flag"]
#[inline(always)]
pub fn dcoffg(&self) -> DcoffgR {
DcoffgR::new((self.bits & 1) != 0)
}
#[doc = "Bit 1 - XT1 Low Frequency Oscillator Fault Flag"]
#[inline(always)]
pub fn xt1lfoffg(&self) -> Xt1lfoffgR {
Xt1lfoffgR::new(((self.bits >> 1) & 1) != 0)
}
#[doc = "Bit 2 - XT1 High Frequency Oscillator 1 Fault Flag"]
#[inline(always)]
pub fn xt1hfoffg(&self) -> Xt1hfoffgR {
Xt1hfoffgR::new(((self.bits >> 2) & 1) != 0)
}
#[doc = "Bit 3 - High Frequency Oscillator 2 Fault Flag"]
#[inline(always)]
pub fn xt2offg(&self) -> Xt2offgR {
Xt2offgR::new(((self.bits >> 3) & 1) != 0)
}
}
impl W {
#[doc = "Bit 0 - DCO Fault Flag"]
#[inline(always)]
pub fn dcoffg(&mut self) -> DcoffgW<'_, Ucsctl7Spec> {
DcoffgW::new(self, 0)
}
#[doc = "Bit 1 - XT1 Low Frequency Oscillator Fault Flag"]
#[inline(always)]
pub fn xt1lfoffg(&mut self) -> Xt1lfoffgW<'_, Ucsctl7Spec> {
Xt1lfoffgW::new(self, 1)
}
#[doc = "Bit 2 - XT1 High Frequency Oscillator 1 Fault Flag"]
#[inline(always)]
pub fn xt1hfoffg(&mut self) -> Xt1hfoffgW<'_, Ucsctl7Spec> {
Xt1hfoffgW::new(self, 2)
}
#[doc = "Bit 3 - High Frequency Oscillator 2 Fault Flag"]
#[inline(always)]
pub fn xt2offg(&mut self) -> Xt2offgW<'_, Ucsctl7Spec> {
Xt2offgW::new(self, 3)
}
}
#[doc = "UCS Control Register 7\n\nYou can [`read`](crate::Reg::read) this register and get [`ucsctl7::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ucsctl7::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
pub struct Ucsctl7Spec;
impl crate::RegisterSpec for Ucsctl7Spec {
type Ux = u16;
}
#[doc = "`read()` method returns [`ucsctl7::R`](R) reader structure"]
impl crate::Readable for Ucsctl7Spec {}
#[doc = "`write(|w| ..)` method takes [`ucsctl7::W`](W) writer structure"]
impl crate::Writable for Ucsctl7Spec {
type Safety = crate::Unsafe;
}
#[doc = "`reset()` method sets UCSCTL7 to value 0"]
impl crate::Resettable for Ucsctl7Spec {}