#[doc = "Register `ADC12IFG` reader"]
pub type R = crate::R<Adc12ifgSpec>;
#[doc = "Register `ADC12IFG` writer"]
pub type W = crate::W<Adc12ifgSpec>;
#[doc = "Field `ADC12IFG0` reader - ADC12 Memory 0 Interrupt Flag"]
pub type Adc12ifg0R = crate::BitReader;
#[doc = "Field `ADC12IFG0` writer - ADC12 Memory 0 Interrupt Flag"]
pub type Adc12ifg0W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `ADC12IFG1` reader - ADC12 Memory 1 Interrupt Flag"]
pub type Adc12ifg1R = crate::BitReader;
#[doc = "Field `ADC12IFG1` writer - ADC12 Memory 1 Interrupt Flag"]
pub type Adc12ifg1W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `ADC12IFG2` reader - ADC12 Memory 2 Interrupt Flag"]
pub type Adc12ifg2R = crate::BitReader;
#[doc = "Field `ADC12IFG2` writer - ADC12 Memory 2 Interrupt Flag"]
pub type Adc12ifg2W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `ADC12IFG3` reader - ADC12 Memory 3 Interrupt Flag"]
pub type Adc12ifg3R = crate::BitReader;
#[doc = "Field `ADC12IFG3` writer - ADC12 Memory 3 Interrupt Flag"]
pub type Adc12ifg3W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `ADC12IFG4` reader - ADC12 Memory 4 Interrupt Flag"]
pub type Adc12ifg4R = crate::BitReader;
#[doc = "Field `ADC12IFG4` writer - ADC12 Memory 4 Interrupt Flag"]
pub type Adc12ifg4W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `ADC12IFG5` reader - ADC12 Memory 5 Interrupt Flag"]
pub type Adc12ifg5R = crate::BitReader;
#[doc = "Field `ADC12IFG5` writer - ADC12 Memory 5 Interrupt Flag"]
pub type Adc12ifg5W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `ADC12IFG6` reader - ADC12 Memory 6 Interrupt Flag"]
pub type Adc12ifg6R = crate::BitReader;
#[doc = "Field `ADC12IFG6` writer - ADC12 Memory 6 Interrupt Flag"]
pub type Adc12ifg6W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `ADC12IFG7` reader - ADC12 Memory 7 Interrupt Flag"]
pub type Adc12ifg7R = crate::BitReader;
#[doc = "Field `ADC12IFG7` writer - ADC12 Memory 7 Interrupt Flag"]
pub type Adc12ifg7W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `ADC12IFG8` reader - ADC12 Memory 8 Interrupt Flag"]
pub type Adc12ifg8R = crate::BitReader;
#[doc = "Field `ADC12IFG8` writer - ADC12 Memory 8 Interrupt Flag"]
pub type Adc12ifg8W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `ADC12IFG9` reader - ADC12 Memory 9 Interrupt Flag"]
pub type Adc12ifg9R = crate::BitReader;
#[doc = "Field `ADC12IFG9` writer - ADC12 Memory 9 Interrupt Flag"]
pub type Adc12ifg9W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `ADC12IFG10` reader - ADC12 Memory 10 Interrupt Flag"]
pub type Adc12ifg10R = crate::BitReader;
#[doc = "Field `ADC12IFG10` writer - ADC12 Memory 10 Interrupt Flag"]
pub type Adc12ifg10W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `ADC12IFG11` reader - ADC12 Memory 11 Interrupt Flag"]
pub type Adc12ifg11R = crate::BitReader;
#[doc = "Field `ADC12IFG11` writer - ADC12 Memory 11 Interrupt Flag"]
pub type Adc12ifg11W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `ADC12IFG12` reader - ADC12 Memory 12 Interrupt Flag"]
pub type Adc12ifg12R = crate::BitReader;
#[doc = "Field `ADC12IFG12` writer - ADC12 Memory 12 Interrupt Flag"]
pub type Adc12ifg12W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `ADC12IFG13` reader - ADC12 Memory 13 Interrupt Flag"]
pub type Adc12ifg13R = crate::BitReader;
#[doc = "Field `ADC12IFG13` writer - ADC12 Memory 13 Interrupt Flag"]
pub type Adc12ifg13W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `ADC12IFG14` reader - ADC12 Memory 14 Interrupt Flag"]
pub type Adc12ifg14R = crate::BitReader;
#[doc = "Field `ADC12IFG14` writer - ADC12 Memory 14 Interrupt Flag"]
pub type Adc12ifg14W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `ADC12IFG15` reader - ADC12 Memory 15 Interrupt Flag"]
pub type Adc12ifg15R = crate::BitReader;
#[doc = "Field `ADC12IFG15` writer - ADC12 Memory 15 Interrupt Flag"]
pub type Adc12ifg15W<'a, REG> = crate::BitWriter<'a, REG>;
impl R {
#[doc = "Bit 0 - ADC12 Memory 0 Interrupt Flag"]
#[inline(always)]
pub fn adc12ifg0(&self) -> Adc12ifg0R {
Adc12ifg0R::new((self.bits & 1) != 0)
}
#[doc = "Bit 1 - ADC12 Memory 1 Interrupt Flag"]
#[inline(always)]
pub fn adc12ifg1(&self) -> Adc12ifg1R {
Adc12ifg1R::new(((self.bits >> 1) & 1) != 0)
}
#[doc = "Bit 2 - ADC12 Memory 2 Interrupt Flag"]
#[inline(always)]
pub fn adc12ifg2(&self) -> Adc12ifg2R {
Adc12ifg2R::new(((self.bits >> 2) & 1) != 0)
}
#[doc = "Bit 3 - ADC12 Memory 3 Interrupt Flag"]
#[inline(always)]
pub fn adc12ifg3(&self) -> Adc12ifg3R {
Adc12ifg3R::new(((self.bits >> 3) & 1) != 0)
}
#[doc = "Bit 4 - ADC12 Memory 4 Interrupt Flag"]
#[inline(always)]
pub fn adc12ifg4(&self) -> Adc12ifg4R {
Adc12ifg4R::new(((self.bits >> 4) & 1) != 0)
}
#[doc = "Bit 5 - ADC12 Memory 5 Interrupt Flag"]
#[inline(always)]
pub fn adc12ifg5(&self) -> Adc12ifg5R {
Adc12ifg5R::new(((self.bits >> 5) & 1) != 0)
}
#[doc = "Bit 6 - ADC12 Memory 6 Interrupt Flag"]
#[inline(always)]
pub fn adc12ifg6(&self) -> Adc12ifg6R {
Adc12ifg6R::new(((self.bits >> 6) & 1) != 0)
}
#[doc = "Bit 7 - ADC12 Memory 7 Interrupt Flag"]
#[inline(always)]
pub fn adc12ifg7(&self) -> Adc12ifg7R {
Adc12ifg7R::new(((self.bits >> 7) & 1) != 0)
}
#[doc = "Bit 8 - ADC12 Memory 8 Interrupt Flag"]
#[inline(always)]
pub fn adc12ifg8(&self) -> Adc12ifg8R {
Adc12ifg8R::new(((self.bits >> 8) & 1) != 0)
}
#[doc = "Bit 9 - ADC12 Memory 9 Interrupt Flag"]
#[inline(always)]
pub fn adc12ifg9(&self) -> Adc12ifg9R {
Adc12ifg9R::new(((self.bits >> 9) & 1) != 0)
}
#[doc = "Bit 10 - ADC12 Memory 10 Interrupt Flag"]
#[inline(always)]
pub fn adc12ifg10(&self) -> Adc12ifg10R {
Adc12ifg10R::new(((self.bits >> 10) & 1) != 0)
}
#[doc = "Bit 11 - ADC12 Memory 11 Interrupt Flag"]
#[inline(always)]
pub fn adc12ifg11(&self) -> Adc12ifg11R {
Adc12ifg11R::new(((self.bits >> 11) & 1) != 0)
}
#[doc = "Bit 12 - ADC12 Memory 12 Interrupt Flag"]
#[inline(always)]
pub fn adc12ifg12(&self) -> Adc12ifg12R {
Adc12ifg12R::new(((self.bits >> 12) & 1) != 0)
}
#[doc = "Bit 13 - ADC12 Memory 13 Interrupt Flag"]
#[inline(always)]
pub fn adc12ifg13(&self) -> Adc12ifg13R {
Adc12ifg13R::new(((self.bits >> 13) & 1) != 0)
}
#[doc = "Bit 14 - ADC12 Memory 14 Interrupt Flag"]
#[inline(always)]
pub fn adc12ifg14(&self) -> Adc12ifg14R {
Adc12ifg14R::new(((self.bits >> 14) & 1) != 0)
}
#[doc = "Bit 15 - ADC12 Memory 15 Interrupt Flag"]
#[inline(always)]
pub fn adc12ifg15(&self) -> Adc12ifg15R {
Adc12ifg15R::new(((self.bits >> 15) & 1) != 0)
}
}
impl W {
#[doc = "Bit 0 - ADC12 Memory 0 Interrupt Flag"]
#[inline(always)]
pub fn adc12ifg0(&mut self) -> Adc12ifg0W<'_, Adc12ifgSpec> {
Adc12ifg0W::new(self, 0)
}
#[doc = "Bit 1 - ADC12 Memory 1 Interrupt Flag"]
#[inline(always)]
pub fn adc12ifg1(&mut self) -> Adc12ifg1W<'_, Adc12ifgSpec> {
Adc12ifg1W::new(self, 1)
}
#[doc = "Bit 2 - ADC12 Memory 2 Interrupt Flag"]
#[inline(always)]
pub fn adc12ifg2(&mut self) -> Adc12ifg2W<'_, Adc12ifgSpec> {
Adc12ifg2W::new(self, 2)
}
#[doc = "Bit 3 - ADC12 Memory 3 Interrupt Flag"]
#[inline(always)]
pub fn adc12ifg3(&mut self) -> Adc12ifg3W<'_, Adc12ifgSpec> {
Adc12ifg3W::new(self, 3)
}
#[doc = "Bit 4 - ADC12 Memory 4 Interrupt Flag"]
#[inline(always)]
pub fn adc12ifg4(&mut self) -> Adc12ifg4W<'_, Adc12ifgSpec> {
Adc12ifg4W::new(self, 4)
}
#[doc = "Bit 5 - ADC12 Memory 5 Interrupt Flag"]
#[inline(always)]
pub fn adc12ifg5(&mut self) -> Adc12ifg5W<'_, Adc12ifgSpec> {
Adc12ifg5W::new(self, 5)
}
#[doc = "Bit 6 - ADC12 Memory 6 Interrupt Flag"]
#[inline(always)]
pub fn adc12ifg6(&mut self) -> Adc12ifg6W<'_, Adc12ifgSpec> {
Adc12ifg6W::new(self, 6)
}
#[doc = "Bit 7 - ADC12 Memory 7 Interrupt Flag"]
#[inline(always)]
pub fn adc12ifg7(&mut self) -> Adc12ifg7W<'_, Adc12ifgSpec> {
Adc12ifg7W::new(self, 7)
}
#[doc = "Bit 8 - ADC12 Memory 8 Interrupt Flag"]
#[inline(always)]
pub fn adc12ifg8(&mut self) -> Adc12ifg8W<'_, Adc12ifgSpec> {
Adc12ifg8W::new(self, 8)
}
#[doc = "Bit 9 - ADC12 Memory 9 Interrupt Flag"]
#[inline(always)]
pub fn adc12ifg9(&mut self) -> Adc12ifg9W<'_, Adc12ifgSpec> {
Adc12ifg9W::new(self, 9)
}
#[doc = "Bit 10 - ADC12 Memory 10 Interrupt Flag"]
#[inline(always)]
pub fn adc12ifg10(&mut self) -> Adc12ifg10W<'_, Adc12ifgSpec> {
Adc12ifg10W::new(self, 10)
}
#[doc = "Bit 11 - ADC12 Memory 11 Interrupt Flag"]
#[inline(always)]
pub fn adc12ifg11(&mut self) -> Adc12ifg11W<'_, Adc12ifgSpec> {
Adc12ifg11W::new(self, 11)
}
#[doc = "Bit 12 - ADC12 Memory 12 Interrupt Flag"]
#[inline(always)]
pub fn adc12ifg12(&mut self) -> Adc12ifg12W<'_, Adc12ifgSpec> {
Adc12ifg12W::new(self, 12)
}
#[doc = "Bit 13 - ADC12 Memory 13 Interrupt Flag"]
#[inline(always)]
pub fn adc12ifg13(&mut self) -> Adc12ifg13W<'_, Adc12ifgSpec> {
Adc12ifg13W::new(self, 13)
}
#[doc = "Bit 14 - ADC12 Memory 14 Interrupt Flag"]
#[inline(always)]
pub fn adc12ifg14(&mut self) -> Adc12ifg14W<'_, Adc12ifgSpec> {
Adc12ifg14W::new(self, 14)
}
#[doc = "Bit 15 - ADC12 Memory 15 Interrupt Flag"]
#[inline(always)]
pub fn adc12ifg15(&mut self) -> Adc12ifg15W<'_, Adc12ifgSpec> {
Adc12ifg15W::new(self, 15)
}
}
#[doc = "ADC12+ Interrupt Flag\n\nYou can [`read`](crate::Reg::read) this register and get [`adc12ifg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`adc12ifg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
pub struct Adc12ifgSpec;
impl crate::RegisterSpec for Adc12ifgSpec {
type Ux = u16;
}
#[doc = "`read()` method returns [`adc12ifg::R`](R) reader structure"]
impl crate::Readable for Adc12ifgSpec {}
#[doc = "`write(|w| ..)` method takes [`adc12ifg::W`](W) writer structure"]
impl crate::Writable for Adc12ifgSpec {
type Safety = crate::Safe;
}
#[doc = "`reset()` method sets ADC12IFG to value 0"]
impl crate::Resettable for Adc12ifgSpec {}