#[doc = "Register `ADC12CTL2` reader"]
pub type R = crate::R<Adc12ctl2Spec>;
#[doc = "Register `ADC12CTL2` writer"]
pub type W = crate::W<Adc12ctl2Spec>;
#[doc = "Field `ADC12REFBURST` reader - ADC12+ Reference Burst"]
pub type Adc12refburstR = crate::BitReader;
#[doc = "Field `ADC12REFBURST` writer - ADC12+ Reference Burst"]
pub type Adc12refburstW<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `ADC12REFOUT` reader - ADC12+ Reference Out"]
pub type Adc12refoutR = crate::BitReader;
#[doc = "Field `ADC12REFOUT` writer - ADC12+ Reference Out"]
pub type Adc12refoutW<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `ADC12SR` reader - ADC12+ Sampling Rate"]
pub type Adc12srR = crate::BitReader;
#[doc = "Field `ADC12SR` writer - ADC12+ Sampling Rate"]
pub type Adc12srW<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `ADC12DF` reader - ADC12+ Data Format"]
pub type Adc12dfR = crate::BitReader;
#[doc = "Field `ADC12DF` writer - ADC12+ Data Format"]
pub type Adc12dfW<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "ADC12+ Resolution Bit: 0\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq, Eq)]
#[repr(u8)]
pub enum Adc12res {
#[doc = "0: ADC12+ Resolution : 8 Bit"]
Adc12res0 = 0,
#[doc = "1: ADC12+ Resolution : 10 Bit"]
Adc12res1 = 1,
#[doc = "2: ADC12+ Resolution : 12 Bit"]
Adc12res2 = 2,
#[doc = "3: ADC12+ Resolution : reserved"]
Adc12res3 = 3,
}
impl From<Adc12res> for u8 {
#[inline(always)]
fn from(variant: Adc12res) -> Self {
variant as _
}
}
impl crate::FieldSpec for Adc12res {
type Ux = u8;
}
impl crate::IsEnum for Adc12res {}
#[doc = "Field `ADC12RES` reader - ADC12+ Resolution Bit: 0"]
pub type Adc12resR = crate::FieldReader<Adc12res>;
impl Adc12resR {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub const fn variant(&self) -> Adc12res {
match self.bits {
0 => Adc12res::Adc12res0,
1 => Adc12res::Adc12res1,
2 => Adc12res::Adc12res2,
3 => Adc12res::Adc12res3,
_ => unreachable!(),
}
}
#[doc = "ADC12+ Resolution : 8 Bit"]
#[inline(always)]
pub fn is_adc12res_0(&self) -> bool {
*self == Adc12res::Adc12res0
}
#[doc = "ADC12+ Resolution : 10 Bit"]
#[inline(always)]
pub fn is_adc12res_1(&self) -> bool {
*self == Adc12res::Adc12res1
}
#[doc = "ADC12+ Resolution : 12 Bit"]
#[inline(always)]
pub fn is_adc12res_2(&self) -> bool {
*self == Adc12res::Adc12res2
}
#[doc = "ADC12+ Resolution : reserved"]
#[inline(always)]
pub fn is_adc12res_3(&self) -> bool {
*self == Adc12res::Adc12res3
}
}
#[doc = "Field `ADC12RES` writer - ADC12+ Resolution Bit: 0"]
pub type Adc12resW<'a, REG> = crate::FieldWriter<'a, REG, 2, Adc12res, crate::Safe>;
impl<'a, REG> Adc12resW<'a, REG>
where
REG: crate::Writable + crate::RegisterSpec,
REG::Ux: From<u8>,
{
#[doc = "ADC12+ Resolution : 8 Bit"]
#[inline(always)]
pub fn adc12res_0(self) -> &'a mut crate::W<REG> {
self.variant(Adc12res::Adc12res0)
}
#[doc = "ADC12+ Resolution : 10 Bit"]
#[inline(always)]
pub fn adc12res_1(self) -> &'a mut crate::W<REG> {
self.variant(Adc12res::Adc12res1)
}
#[doc = "ADC12+ Resolution : 12 Bit"]
#[inline(always)]
pub fn adc12res_2(self) -> &'a mut crate::W<REG> {
self.variant(Adc12res::Adc12res2)
}
#[doc = "ADC12+ Resolution : reserved"]
#[inline(always)]
pub fn adc12res_3(self) -> &'a mut crate::W<REG> {
self.variant(Adc12res::Adc12res3)
}
}
#[doc = "Field `ADC12TCOFF` reader - ADC12+ Temperature Sensor Off"]
pub type Adc12tcoffR = crate::BitReader;
#[doc = "Field `ADC12TCOFF` writer - ADC12+ Temperature Sensor Off"]
pub type Adc12tcoffW<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `ADC12PDIV` reader - ADC12+ predivider 0:/1 1:/4"]
pub type Adc12pdivR = crate::BitReader;
#[doc = "Field `ADC12PDIV` writer - ADC12+ predivider 0:/1 1:/4"]
pub type Adc12pdivW<'a, REG> = crate::BitWriter<'a, REG>;
impl R {
#[doc = "Bit 0 - ADC12+ Reference Burst"]
#[inline(always)]
pub fn adc12refburst(&self) -> Adc12refburstR {
Adc12refburstR::new((self.bits & 1) != 0)
}
#[doc = "Bit 1 - ADC12+ Reference Out"]
#[inline(always)]
pub fn adc12refout(&self) -> Adc12refoutR {
Adc12refoutR::new(((self.bits >> 1) & 1) != 0)
}
#[doc = "Bit 2 - ADC12+ Sampling Rate"]
#[inline(always)]
pub fn adc12sr(&self) -> Adc12srR {
Adc12srR::new(((self.bits >> 2) & 1) != 0)
}
#[doc = "Bit 3 - ADC12+ Data Format"]
#[inline(always)]
pub fn adc12df(&self) -> Adc12dfR {
Adc12dfR::new(((self.bits >> 3) & 1) != 0)
}
#[doc = "Bits 4:5 - ADC12+ Resolution Bit: 0"]
#[inline(always)]
pub fn adc12res(&self) -> Adc12resR {
Adc12resR::new(((self.bits >> 4) & 3) as u8)
}
#[doc = "Bit 7 - ADC12+ Temperature Sensor Off"]
#[inline(always)]
pub fn adc12tcoff(&self) -> Adc12tcoffR {
Adc12tcoffR::new(((self.bits >> 7) & 1) != 0)
}
#[doc = "Bit 8 - ADC12+ predivider 0:/1 1:/4"]
#[inline(always)]
pub fn adc12pdiv(&self) -> Adc12pdivR {
Adc12pdivR::new(((self.bits >> 8) & 1) != 0)
}
}
impl W {
#[doc = "Bit 0 - ADC12+ Reference Burst"]
#[inline(always)]
pub fn adc12refburst(&mut self) -> Adc12refburstW<'_, Adc12ctl2Spec> {
Adc12refburstW::new(self, 0)
}
#[doc = "Bit 1 - ADC12+ Reference Out"]
#[inline(always)]
pub fn adc12refout(&mut self) -> Adc12refoutW<'_, Adc12ctl2Spec> {
Adc12refoutW::new(self, 1)
}
#[doc = "Bit 2 - ADC12+ Sampling Rate"]
#[inline(always)]
pub fn adc12sr(&mut self) -> Adc12srW<'_, Adc12ctl2Spec> {
Adc12srW::new(self, 2)
}
#[doc = "Bit 3 - ADC12+ Data Format"]
#[inline(always)]
pub fn adc12df(&mut self) -> Adc12dfW<'_, Adc12ctl2Spec> {
Adc12dfW::new(self, 3)
}
#[doc = "Bits 4:5 - ADC12+ Resolution Bit: 0"]
#[inline(always)]
pub fn adc12res(&mut self) -> Adc12resW<'_, Adc12ctl2Spec> {
Adc12resW::new(self, 4)
}
#[doc = "Bit 7 - ADC12+ Temperature Sensor Off"]
#[inline(always)]
pub fn adc12tcoff(&mut self) -> Adc12tcoffW<'_, Adc12ctl2Spec> {
Adc12tcoffW::new(self, 7)
}
#[doc = "Bit 8 - ADC12+ predivider 0:/1 1:/4"]
#[inline(always)]
pub fn adc12pdiv(&mut self) -> Adc12pdivW<'_, Adc12ctl2Spec> {
Adc12pdivW::new(self, 8)
}
}
#[doc = "ADC12+ Control 2\n\nYou can [`read`](crate::Reg::read) this register and get [`adc12ctl2::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`adc12ctl2::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
pub struct Adc12ctl2Spec;
impl crate::RegisterSpec for Adc12ctl2Spec {
type Ux = u16;
}
#[doc = "`read()` method returns [`adc12ctl2::R`](R) reader structure"]
impl crate::Readable for Adc12ctl2Spec {}
#[doc = "`write(|w| ..)` method takes [`adc12ctl2::W`](W) writer structure"]
impl crate::Writable for Adc12ctl2Spec {
type Safety = crate::Unsafe;
}
#[doc = "`reset()` method sets ADC12CTL2 to value 0"]
impl crate::Resettable for Adc12ctl2Spec {}