cc430f5137 0.1.0

Peripheral access API for CC430F5137 microcontroller
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#[doc = "Register `ADC12IE` reader"]
pub type R = crate::R<Adc12ieSpec>;
#[doc = "Register `ADC12IE` writer"]
pub type W = crate::W<Adc12ieSpec>;
#[doc = "Field `ADC12IE0` reader - ADC12 Memory 0 Interrupt Enable"]
pub type Adc12ie0R = crate::BitReader;
#[doc = "Field `ADC12IE0` writer - ADC12 Memory 0 Interrupt Enable"]
pub type Adc12ie0W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `ADC12IE1` reader - ADC12 Memory 1 Interrupt Enable"]
pub type Adc12ie1R = crate::BitReader;
#[doc = "Field `ADC12IE1` writer - ADC12 Memory 1 Interrupt Enable"]
pub type Adc12ie1W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `ADC12IE2` reader - ADC12 Memory 2 Interrupt Enable"]
pub type Adc12ie2R = crate::BitReader;
#[doc = "Field `ADC12IE2` writer - ADC12 Memory 2 Interrupt Enable"]
pub type Adc12ie2W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `ADC12IE3` reader - ADC12 Memory 3 Interrupt Enable"]
pub type Adc12ie3R = crate::BitReader;
#[doc = "Field `ADC12IE3` writer - ADC12 Memory 3 Interrupt Enable"]
pub type Adc12ie3W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `ADC12IE4` reader - ADC12 Memory 4 Interrupt Enable"]
pub type Adc12ie4R = crate::BitReader;
#[doc = "Field `ADC12IE4` writer - ADC12 Memory 4 Interrupt Enable"]
pub type Adc12ie4W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `ADC12IE5` reader - ADC12 Memory 5 Interrupt Enable"]
pub type Adc12ie5R = crate::BitReader;
#[doc = "Field `ADC12IE5` writer - ADC12 Memory 5 Interrupt Enable"]
pub type Adc12ie5W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `ADC12IE6` reader - ADC12 Memory 6 Interrupt Enable"]
pub type Adc12ie6R = crate::BitReader;
#[doc = "Field `ADC12IE6` writer - ADC12 Memory 6 Interrupt Enable"]
pub type Adc12ie6W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `ADC12IE7` reader - ADC12 Memory 7 Interrupt Enable"]
pub type Adc12ie7R = crate::BitReader;
#[doc = "Field `ADC12IE7` writer - ADC12 Memory 7 Interrupt Enable"]
pub type Adc12ie7W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `ADC12IE8` reader - ADC12 Memory 8 Interrupt Enable"]
pub type Adc12ie8R = crate::BitReader;
#[doc = "Field `ADC12IE8` writer - ADC12 Memory 8 Interrupt Enable"]
pub type Adc12ie8W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `ADC12IE9` reader - ADC12 Memory 9 Interrupt Enable"]
pub type Adc12ie9R = crate::BitReader;
#[doc = "Field `ADC12IE9` writer - ADC12 Memory 9 Interrupt Enable"]
pub type Adc12ie9W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `ADC12IE10` reader - ADC12 Memory 10 Interrupt Enable"]
pub type Adc12ie10R = crate::BitReader;
#[doc = "Field `ADC12IE10` writer - ADC12 Memory 10 Interrupt Enable"]
pub type Adc12ie10W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `ADC12IE11` reader - ADC12 Memory 11 Interrupt Enable"]
pub type Adc12ie11R = crate::BitReader;
#[doc = "Field `ADC12IE11` writer - ADC12 Memory 11 Interrupt Enable"]
pub type Adc12ie11W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `ADC12IE12` reader - ADC12 Memory 12 Interrupt Enable"]
pub type Adc12ie12R = crate::BitReader;
#[doc = "Field `ADC12IE12` writer - ADC12 Memory 12 Interrupt Enable"]
pub type Adc12ie12W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `ADC12IE13` reader - ADC12 Memory 13 Interrupt Enable"]
pub type Adc12ie13R = crate::BitReader;
#[doc = "Field `ADC12IE13` writer - ADC12 Memory 13 Interrupt Enable"]
pub type Adc12ie13W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `ADC12IE14` reader - ADC12 Memory 14 Interrupt Enable"]
pub type Adc12ie14R = crate::BitReader;
#[doc = "Field `ADC12IE14` writer - ADC12 Memory 14 Interrupt Enable"]
pub type Adc12ie14W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `ADC12IE15` reader - ADC12 Memory 15 Interrupt Enable"]
pub type Adc12ie15R = crate::BitReader;
#[doc = "Field `ADC12IE15` writer - ADC12 Memory 15 Interrupt Enable"]
pub type Adc12ie15W<'a, REG> = crate::BitWriter<'a, REG>;
impl R {
    #[doc = "Bit 0 - ADC12 Memory 0 Interrupt Enable"]
    #[inline(always)]
    pub fn adc12ie0(&self) -> Adc12ie0R {
        Adc12ie0R::new((self.bits & 1) != 0)
    }
    #[doc = "Bit 1 - ADC12 Memory 1 Interrupt Enable"]
    #[inline(always)]
    pub fn adc12ie1(&self) -> Adc12ie1R {
        Adc12ie1R::new(((self.bits >> 1) & 1) != 0)
    }
    #[doc = "Bit 2 - ADC12 Memory 2 Interrupt Enable"]
    #[inline(always)]
    pub fn adc12ie2(&self) -> Adc12ie2R {
        Adc12ie2R::new(((self.bits >> 2) & 1) != 0)
    }
    #[doc = "Bit 3 - ADC12 Memory 3 Interrupt Enable"]
    #[inline(always)]
    pub fn adc12ie3(&self) -> Adc12ie3R {
        Adc12ie3R::new(((self.bits >> 3) & 1) != 0)
    }
    #[doc = "Bit 4 - ADC12 Memory 4 Interrupt Enable"]
    #[inline(always)]
    pub fn adc12ie4(&self) -> Adc12ie4R {
        Adc12ie4R::new(((self.bits >> 4) & 1) != 0)
    }
    #[doc = "Bit 5 - ADC12 Memory 5 Interrupt Enable"]
    #[inline(always)]
    pub fn adc12ie5(&self) -> Adc12ie5R {
        Adc12ie5R::new(((self.bits >> 5) & 1) != 0)
    }
    #[doc = "Bit 6 - ADC12 Memory 6 Interrupt Enable"]
    #[inline(always)]
    pub fn adc12ie6(&self) -> Adc12ie6R {
        Adc12ie6R::new(((self.bits >> 6) & 1) != 0)
    }
    #[doc = "Bit 7 - ADC12 Memory 7 Interrupt Enable"]
    #[inline(always)]
    pub fn adc12ie7(&self) -> Adc12ie7R {
        Adc12ie7R::new(((self.bits >> 7) & 1) != 0)
    }
    #[doc = "Bit 8 - ADC12 Memory 8 Interrupt Enable"]
    #[inline(always)]
    pub fn adc12ie8(&self) -> Adc12ie8R {
        Adc12ie8R::new(((self.bits >> 8) & 1) != 0)
    }
    #[doc = "Bit 9 - ADC12 Memory 9 Interrupt Enable"]
    #[inline(always)]
    pub fn adc12ie9(&self) -> Adc12ie9R {
        Adc12ie9R::new(((self.bits >> 9) & 1) != 0)
    }
    #[doc = "Bit 10 - ADC12 Memory 10 Interrupt Enable"]
    #[inline(always)]
    pub fn adc12ie10(&self) -> Adc12ie10R {
        Adc12ie10R::new(((self.bits >> 10) & 1) != 0)
    }
    #[doc = "Bit 11 - ADC12 Memory 11 Interrupt Enable"]
    #[inline(always)]
    pub fn adc12ie11(&self) -> Adc12ie11R {
        Adc12ie11R::new(((self.bits >> 11) & 1) != 0)
    }
    #[doc = "Bit 12 - ADC12 Memory 12 Interrupt Enable"]
    #[inline(always)]
    pub fn adc12ie12(&self) -> Adc12ie12R {
        Adc12ie12R::new(((self.bits >> 12) & 1) != 0)
    }
    #[doc = "Bit 13 - ADC12 Memory 13 Interrupt Enable"]
    #[inline(always)]
    pub fn adc12ie13(&self) -> Adc12ie13R {
        Adc12ie13R::new(((self.bits >> 13) & 1) != 0)
    }
    #[doc = "Bit 14 - ADC12 Memory 14 Interrupt Enable"]
    #[inline(always)]
    pub fn adc12ie14(&self) -> Adc12ie14R {
        Adc12ie14R::new(((self.bits >> 14) & 1) != 0)
    }
    #[doc = "Bit 15 - ADC12 Memory 15 Interrupt Enable"]
    #[inline(always)]
    pub fn adc12ie15(&self) -> Adc12ie15R {
        Adc12ie15R::new(((self.bits >> 15) & 1) != 0)
    }
}
impl W {
    #[doc = "Bit 0 - ADC12 Memory 0 Interrupt Enable"]
    #[inline(always)]
    pub fn adc12ie0(&mut self) -> Adc12ie0W<'_, Adc12ieSpec> {
        Adc12ie0W::new(self, 0)
    }
    #[doc = "Bit 1 - ADC12 Memory 1 Interrupt Enable"]
    #[inline(always)]
    pub fn adc12ie1(&mut self) -> Adc12ie1W<'_, Adc12ieSpec> {
        Adc12ie1W::new(self, 1)
    }
    #[doc = "Bit 2 - ADC12 Memory 2 Interrupt Enable"]
    #[inline(always)]
    pub fn adc12ie2(&mut self) -> Adc12ie2W<'_, Adc12ieSpec> {
        Adc12ie2W::new(self, 2)
    }
    #[doc = "Bit 3 - ADC12 Memory 3 Interrupt Enable"]
    #[inline(always)]
    pub fn adc12ie3(&mut self) -> Adc12ie3W<'_, Adc12ieSpec> {
        Adc12ie3W::new(self, 3)
    }
    #[doc = "Bit 4 - ADC12 Memory 4 Interrupt Enable"]
    #[inline(always)]
    pub fn adc12ie4(&mut self) -> Adc12ie4W<'_, Adc12ieSpec> {
        Adc12ie4W::new(self, 4)
    }
    #[doc = "Bit 5 - ADC12 Memory 5 Interrupt Enable"]
    #[inline(always)]
    pub fn adc12ie5(&mut self) -> Adc12ie5W<'_, Adc12ieSpec> {
        Adc12ie5W::new(self, 5)
    }
    #[doc = "Bit 6 - ADC12 Memory 6 Interrupt Enable"]
    #[inline(always)]
    pub fn adc12ie6(&mut self) -> Adc12ie6W<'_, Adc12ieSpec> {
        Adc12ie6W::new(self, 6)
    }
    #[doc = "Bit 7 - ADC12 Memory 7 Interrupt Enable"]
    #[inline(always)]
    pub fn adc12ie7(&mut self) -> Adc12ie7W<'_, Adc12ieSpec> {
        Adc12ie7W::new(self, 7)
    }
    #[doc = "Bit 8 - ADC12 Memory 8 Interrupt Enable"]
    #[inline(always)]
    pub fn adc12ie8(&mut self) -> Adc12ie8W<'_, Adc12ieSpec> {
        Adc12ie8W::new(self, 8)
    }
    #[doc = "Bit 9 - ADC12 Memory 9 Interrupt Enable"]
    #[inline(always)]
    pub fn adc12ie9(&mut self) -> Adc12ie9W<'_, Adc12ieSpec> {
        Adc12ie9W::new(self, 9)
    }
    #[doc = "Bit 10 - ADC12 Memory 10 Interrupt Enable"]
    #[inline(always)]
    pub fn adc12ie10(&mut self) -> Adc12ie10W<'_, Adc12ieSpec> {
        Adc12ie10W::new(self, 10)
    }
    #[doc = "Bit 11 - ADC12 Memory 11 Interrupt Enable"]
    #[inline(always)]
    pub fn adc12ie11(&mut self) -> Adc12ie11W<'_, Adc12ieSpec> {
        Adc12ie11W::new(self, 11)
    }
    #[doc = "Bit 12 - ADC12 Memory 12 Interrupt Enable"]
    #[inline(always)]
    pub fn adc12ie12(&mut self) -> Adc12ie12W<'_, Adc12ieSpec> {
        Adc12ie12W::new(self, 12)
    }
    #[doc = "Bit 13 - ADC12 Memory 13 Interrupt Enable"]
    #[inline(always)]
    pub fn adc12ie13(&mut self) -> Adc12ie13W<'_, Adc12ieSpec> {
        Adc12ie13W::new(self, 13)
    }
    #[doc = "Bit 14 - ADC12 Memory 14 Interrupt Enable"]
    #[inline(always)]
    pub fn adc12ie14(&mut self) -> Adc12ie14W<'_, Adc12ieSpec> {
        Adc12ie14W::new(self, 14)
    }
    #[doc = "Bit 15 - ADC12 Memory 15 Interrupt Enable"]
    #[inline(always)]
    pub fn adc12ie15(&mut self) -> Adc12ie15W<'_, Adc12ieSpec> {
        Adc12ie15W::new(self, 15)
    }
}
#[doc = "ADC12+ Interrupt Enable\n\nYou can [`read`](crate::Reg::read) this register and get [`adc12ie::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`adc12ie::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
pub struct Adc12ieSpec;
impl crate::RegisterSpec for Adc12ieSpec {
    type Ux = u16;
}
#[doc = "`read()` method returns [`adc12ie::R`](R) reader structure"]
impl crate::Readable for Adc12ieSpec {}
#[doc = "`write(|w| ..)` method takes [`adc12ie::W`](W) writer structure"]
impl crate::Writable for Adc12ieSpec {
    type Safety = crate::Safe;
}
#[doc = "`reset()` method sets ADC12IE to value 0"]
impl crate::Resettable for Adc12ieSpec {}