�{setnbe4Set byte if not below or equal (CF == 0 and ZF == 0)setnbeSETHI setnbeSETHI # vaesdeclast,Perform Last Round of an AES Decryption Flow
vaesdeclast vaesdeclast K vaesdeclast / vaesdeclast K / vaesdeclast vaesdeclast K vaesdeclast 2 vaesdeclast K 2 vaesdeclast H vaesdeclast H 5 jbJump if below (CF == 1)jbJCS N jbJCS O vfnmsub213phOFused Negative Multiply-Subtract of Packed Half-Precision Floating-Point Values vfnmsub213ph K < vfnmsub213ph K vfnmsub213ph K > vfnmsub213ph K vfnmsub213ph R @ vfnmsub213ph R vfnmsub213ph K < vfnmsub213ph K vfnmsub213ph K > vfnmsub213ph K vfnmsub213ph R @ vfnmsub213ph R vfnmsub213ph R Q vfnmsub213ph R Q vmulpd6Multiply Packed Double-Precision Floating-Point Valuesvmulpd H = vmulpd H vmulpd H ? vmulpd H vmulpd H A vmulpd H vmulpd H = vmulpd vmulpd H vmulpd / vmulpd H ? vmulpd vmulpd H vmulpd 2 vmulpd H A vmulpd H vmulpd H Q vmulpd H Q vaddsubpd Packed Double-FP Add/Subtract vaddsubpd vaddsubpd / vaddsubpd vaddsubpd 2 vpscatterdq=Scatter Packed Quadword Values with Signed Doubleword Indices vpscatterdq HC vpscatterdq HC vpscatterdq HG vscatterdpdTScatter Packed Double-Precision Floating-Point Values with Signed Doubleword Indices vscatterdpd HC vscatterdpd HC vscatterdpd HG stcSet Carry FlagstcSTC cmova#Move if above (CF == 0 and ZF == 0)cmovaw cmovaw $ cmoval cmoval ' vpandq/Bitwise Logical AND of Packed Quadword Integers vpandq H = vpandq H vpandq H ? vpandq H vpandq H A vpandq H vpandq H = vpandq H vpandq H ? vpandq H vpandq H A vpandq H
vcvttss2siIConvert with Truncation Scalar Single-Precision FP Value to Dword Integer
vcvttss2si
vcvttss2si H
vcvttss2si '
vcvttss2si H '
vcvttss2si H R cmovno Move if not overflow (OF == 0)cmovnow cmovnow $ cmovnol cmovnol ' ktestw#Bit Test 16-bit Masks and Set Flagsktestw J minsd;Return Minimum Scalar Double-Precision Floating-Point ValueminsdMINSD minsdMINSD +
aesdeclast,Perform Last Round of an AES Decryption Flow
aesdeclast '
aesdeclast ' / cmppd5Compare Packed Double-Precision Floating-Point ValuescmppdCMPPD cmppdCMPPD / pmovzxwqBMove Packed Word Integers to Quadword Integers with Zero Extensionpmovzxwq pmovzxwq ' vmovshdup(Move Packed Single-FP High and Duplicate vmovshdup H vmovshdup H vmovshdup H vmovshdup H / vmovshdup H 2 vmovshdup H 5 vmovshdup vmovshdup H vmovshdup / vmovshdup H / vmovshdup vmovshdup H vmovshdup 2 vmovshdup H 2 vmovshdup H vmovshdup H 5 vpmovusdwMDown Convert Packed Doubleword Values to Word Values with Unsigned Saturation vpmovusdw H vpmovusdw H, vpmovusdw H vpmovusdw H0 vpmovusdw H vpmovusdw H3 vpmovusdw H vpmovusdw H vpmovusdw H vpmovusdw H+ vpmovusdw H/ vpmovusdw H2 cwdConvert Word to Doublewordcwtd vexpandpdKLoad Sparse Packed Double-Precision Floating-Point Values from Dense Memory vexpandpd K vexpandpd H vexpandpd H vexpandpd K / vexpandpd H 2 vexpandpd H 5 vexpandpd K vexpandpd K / vexpandpd H vexpandpd H 2 vexpandpd H vexpandpd H 5 vpshaw Packed Shift Arithmetic Wordsvpshaw " vpshaw " / vpshaw " / vpminuw(Minimum of Packed Unsigned Word Integersvpminuw I vpminuw I / vpminuw I vpminuw I 2 vpminuw I vpminuw I 5 vpminuw vpminuw I vpminuw / vpminuw I / vpminuw ! vpminuw I vpminuw ! 2 vpminuw I 2 vpminuw I vpminuw I 5 vrcpssOCompute Approximate Reciprocal of Scalar Single-Precision Floating-Point Valuesvrcpss vrcpss ' setne Set byte if not equal (ZF == 0)setneSETNE setneSETNE # vcvtph2pdLConvert Packed Half-Precision FP Values to Packed Double-Precision FP Values vcvtph2pd K * vcvtph2pd K . vcvtph2pd R < vcvtph2pd K vcvtph2pd K vcvtph2pd R vcvtph2pd K * vcvtph2pd K vcvtph2pd K . vcvtph2pd K vcvtph2pd R < vcvtph2pd R vcvtph2pd R R vcvtph2pd R R
prefetcht0'Prefetch Data Into Caches using T0 Hint
prefetcht0
PREFETCHT0
# blsic%Isolate Lowest Set Bit and Complementblsic 6 blsic 6 ' vptestmq:Logical AND of Packed Quadword Integer Values and Set Mask vptestmq H = vptestmq H = vptestmq H vptestmq H vptestmq H ? vptestmq H ? vptestmq H vptestmq H vptestmq H A vptestmq H A vptestmq H vptestmq H vroundss3Round Scalar Single Precision Floating-Point Valuesvroundss vroundss ' roundss3Round Scalar Single Precision Floating-Point Valuesroundss roundss ' cmovnbe0Move if not below or equal (CF == 0 and ZF == 0)cmovnbew cmovnbew $ cmovnbel cmovnbel ' vmovq
Move Quadwordvmovq vmovq H vmovq + vmovq H + vmovq + vmovq H+ vpblendmb*Blend Byte Vectors Using an OpMask Control vpblendmb I vpblendmb I / vpblendmb I vpblendmb I 2 vpblendmb I vpblendmb I 5 vpblendmb I vpblendmb I / vpblendmb I vpblendmb I 2 vpblendmb I vpblendmb I 5 jge#Jump if greater or equal (SF == OF)jgeJGE N jgeJGE O cvtps2dqBConvert Packed Single-Precision FP Values to Packed Dword Integerscvtps2dq cvtps2dq / movntpsKStore Packed Single-Precision Floating-Point Values Using Non-Temporal HintmovntpsMOVNTPS / vfmsubsdHFused Multiply-Subtract of Scalar Double-Precision Floating-Point Valuesvfmsubsd $ vfmsubsd $ + vfmsubsd $ + movdir64b MOVe to DIRect store 64 Bytes movdir64b 1 5 prefetchw4Prefetch Data into Caches in Anticipation of a Write prefetchw B# setnp Set byte if not parity (PF == 0)setnpSETPC setnpSETPC #
vcvtph2psx>Convert Half-Precision FP Values to Single-Precision FP Values
vcvtph2psx K .
vcvtph2psx K <
vcvtph2psx R >
vcvtph2psx K
vcvtph2psx K
vcvtph2psx R
vcvtph2psx K .
vcvtph2psx K
vcvtph2psx K <
vcvtph2psx K
vcvtph2psx R >
vcvtph2psx R
vcvtph2psx R R
vcvtph2psx R R vpmulld?Multiply Packed Signed Doubleword Integers and Store Low Resultvpmulld H 9 vpmulld H vpmulld H : vpmulld H vpmulld H ; vpmulld H vpmulld H 9 vpmulld vpmulld H vpmulld / vpmulld H : vpmulld ! vpmulld H vpmulld ! 2 vpmulld H ; vpmulld H
vrsqrt14ssaCompute Approximate Reciprocal of a Square Root of a Scalar Single-Precision Floating-Point Value
vrsqrt14ss H
vrsqrt14ss H '
vrsqrt14ss H
vrsqrt14ss H ' vsm3msg2=Perform Final Calculation for the Next Four SM3 Message Wordsvsm3msg2 vsm3msg2 / pslld)Shift Packed Doubleword Data Left Logicalpslld pslld pslld + pslld pslld pslld / vrcpshMCompute Approximate Reciprocal of Scalar Half-Precision Floating-Point Valuesvrcpsh R vrcpsh R $ vrcpsh R vrcpsh R $
vcvtsd2usiSConvert Scalar Double-Precision Floating-Point Value to Unsigned Doubleword Integer
vcvtsd2usi H
vcvtsd2usi H +
vcvtsd2usi H Q vcvtneobf162ps9Convert Odd Elements of Packed BF16 Values to FP32 Valuesvcvtneobf162ps Z / vcvtneobf162ps Z 2 vpaddsw6Add Packed Signed Word Integers with Signed Saturationvpaddsw I vpaddsw I / vpaddsw I vpaddsw I 2 vpaddsw I vpaddsw I 5 vpaddsw vpaddsw I vpaddsw / vpaddsw I / vpaddsw ! vpaddsw I vpaddsw ! 2 vpaddsw I 2 vpaddsw I vpaddsw I 5 vblendps4 Blend Packed Single Precision Floating-Point Valuesvblendps vblendps / vblendps vblendps 2 rol Rotate LeftrolbROLB rolbROLB rolbROLB rolwROLW rolwROLW rolwROLW rollROLL rollROLL rollROLL rolbROLB # rolbROLB # rolbROLB # rolwROLW $ rolwROLW $ rolwROLW $ rollROLL ' rollROLL ' rollROLL ' pmovzxwdDMove Packed Word Integers to Doubleword Integers with Zero Extensionpmovzxwd pmovzxwd + vpdpbsudHPacked Dot Product of Signed-by-Unsinged Byte subvectors into Doublewordvpdpbsud X vpdpbsud X / vpdpbsud X vpdpbsud X 2 vgf2p8affineinvqb0Galois Field (2^8) Affine Inverse Transformationvgf2p8affineinvqb K = vgf2p8affineinvqb K vgf2p8affineinvqb K ? vgf2p8affineinvqb K vgf2p8affineinvqb H A vgf2p8affineinvqb H vgf2p8affineinvqb K = vgf2p8affineinvqb vgf2p8affineinvqb K vgf2p8affineinvqb / vgf2p8affineinvqb K ? vgf2p8affineinvqb vgf2p8affineinvqb K vgf2p8affineinvqb 2 vgf2p8affineinvqb H A vgf2p8affineinvqb H cvtpd2psNConvert Packed Double-Precision FP Values to Packed Single-Precision FP Valuescvtpd2psCVTPD2PS cvtpd2psCVTPD2PS / vfmaddsub132pdXFused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Valuesvfmaddsub132pd H = vfmaddsub132pd H vfmaddsub132pd H ? vfmaddsub132pd H vfmaddsub132pd H A vfmaddsub132pd H vfmaddsub132pd H = vfmaddsub132pd # vfmaddsub132pd H vfmaddsub132pd # / vfmaddsub132pd H ? vfmaddsub132pd # vfmaddsub132pd H vfmaddsub132pd # 2 vfmaddsub132pd H A vfmaddsub132pd H vfmaddsub132pd H Q vfmaddsub132pd H Q
vpcmpestrm3Packed Compare Explicit Length Strings, Return Mask vpcmpestrml vpcmpestrml / vreducesdRPerform Reduction Transformation on a Scalar Double-Precision Floating-Point Value vreducesd J vreducesd J + vreducesd J vreducesd J + vshufpd5Shuffle Packed Double-Precision Floating-Point Valuesvshufpd H = vshufpd H vshufpd H ? vshufpd H vshufpd H A vshufpd H vshufpd H = vshufpd vshufpd H vshufpd / vshufpd H ? vshufpd vshufpd H vshufpd 2 vshufpd H A vshufpd H
vpermil2pd:Permute Two-Source Double-Precision Floating-Point Vectors
vpermil2pd "
vpermil2pd " /
vpermil2pd " /
vpermil2pd "
vpermil2pd " 2
vpermil2pd " 2 vmovsd1Move Scalar Double-Precision Floating-Point Value vmovsd H, vmovsd H + vmovsd + vmovsd H + vmovsd + vmovsd H+ vmovsd H vmovsd vmovsd H vfmadd231sdCFused Multiply-Add of Scalar Double-Precision Floating-Point Values vfmadd231sd H vfmadd231sd H + vfmadd231sd # vfmadd231sd H vfmadd231sd # + vfmadd231sd H + vfmadd231sd H Q vfmadd231sd H Q pmovzxbdDMove Packed Byte Integers to Doubleword Integers with Zero Extensionpmovzxbd pmovzxbd ' vfrczss7Extract Fraction Scalar Single-Precision Floating Pointvfrczss " vfrczss " '
vrsqrt28sd�Approximation to the Reciprocal Square Root of a Scalar Double-Precision Floating-Point Value with Less Than 2^-28 Relative Error
vrsqrt28sd M
vrsqrt28sd M +
vrsqrt28sd M
vrsqrt28sd M +
vrsqrt28sd M R
vrsqrt28sd M R vaddsubps Packed Single-FP Add/Subtract vaddsubps vaddsubps / vaddsubps vaddsubps 2 vandpsDBitwise Logical AND of Packed Single-Precision Floating-Point Valuesvandps J 9 vandps J vandps J : vandps J vandps J ; vandps J vandps J 9 vandps vandps J vandps / vandps J : vandps vandps J vandps 2 vandps J ; vandps J vpshldw3Concatenate and Shift Packed Word Data Left Logical vpshldw K vpshldw K / vpshldw K vpshldw K 2 vpshldw U vpshldw U 5 vpshldw K vpshldw K / vpshldw K vpshldw K 2 vpshldw U vpshldw U 5 pabsb&Packed Absolute Value of Byte Integerspabsb pabsb + pabsb pabsb / vblendpd3Blend Packed Double Precision Floating-Point Valuesvblendpd vblendpd / vblendpd vblendpd 2 vpmuldqDMultiply Packed Signed Doubleword Integers and Store Quadword Resultvpmuldq H = vpmuldq H vpmuldq H ? vpmuldq H vpmuldq H A vpmuldq H vpmuldq H = vpmuldq vpmuldq H vpmuldq / vpmuldq H ? vpmuldq ! vpmuldq H vpmuldq ! 2 vpmuldq H A vpmuldq H vsm4rnds4&Performs Four Rounds of SM4 Encryption vsm4rnds4 vsm4rnds4 / vsm4rnds4 vsm4rnds4 2 vpmacsdqlCPacked Multiply Accumulate Signed Low Doubleword to Signed Quadword vpmacsdql " vpmacsdql " / bsfBit Scan ForwardbsfwBSFW bsfwBSFW $ bsflBSFL bsflBSFL ' vprotwPacked Rotate Wordsvprotw " vprotw " vprotw " / vprotw " / vprotw " / vfnmadd231psLFused Negative Multiply-Add of Packed Single-Precision Floating-Point Values vfnmadd231ps H 9 vfnmadd231ps H vfnmadd231ps H : vfnmadd231ps H vfnmadd231ps H ; vfnmadd231ps H vfnmadd231ps H 9 vfnmadd231ps # vfnmadd231ps H vfnmadd231ps # / vfnmadd231ps H : vfnmadd231ps # vfnmadd231ps H vfnmadd231ps # 2 vfnmadd231ps H ; vfnmadd231ps H vfnmadd231ps H Q vfnmadd231ps H Q xaddExchange and AddxaddbXADDB xaddwXADDW xaddlXADDL xaddbXADDB # xaddwXADDW $ xaddlXADDL ' xorps>Bitwise Logical XOR for Single-Precision Floating-Point ValuesxorpsXORPS xorpsXORPS / setnl Set byte if not less (SF == OF)setnlSETGE setnlSETGE # kandnq$Bitwise Logical AND NOT 64-bit Maskskandnq I cmovbMove if below (CF == 1)cmovbw cmovbw $ cmovbl cmovbl ' vinsertf64x4@Insert 256 Bits of Packed Double-Precision Floating-Point Values vinsertf64x4 H vinsertf64x4 H 2 vinsertf64x4 H vinsertf64x4 H 2 ud2Undefined Instructionud2 jpo Jump if parity odd (PF == 0)jpoJPC N jpoJPC O clcClear Carry FlagclcCLC pshufhwShuffle Packed High WordspshufhwPSHUFHW pshufhwPSHUFHW / kortestw OR 16-bit Masks and Set Flagskortestw H shrLogical Shift RightshrbSHRB shrbSHRB shrbSHRB shrwSHRW shrwSHRW shrwSHRW shrlSHRL shrlSHRL shrlSHRL shrbSHRB # shrbSHRB # shrbSHRB # shrwSHRW $ shrwSHRW $ shrwSHRW $ shrlSHRL ' shrlSHRL ' shrlSHRL ' vpermi2ps\Full Permute of Single-Precision Floating-Point Values From Two Tables Overwriting the Index vpermi2ps H 9 vpermi2ps H vpermi2ps H : vpermi2ps H vpermi2ps H ; vpermi2ps H vpermi2ps H 9 vpermi2ps H vpermi2ps H : vpermi2ps H vpermi2ps H ; vpermi2ps H vporPacked Bitwise Logical ORvpor vpor / vpor ! vpor ! 2 vpermilpd.Permute Double-Precision Floating-Point Values vpermilpd H = vpermilpd H ? vpermilpd H A vpermilpd H = vpermilpd H vpermilpd H vpermilpd H ? vpermilpd H vpermilpd H vpermilpd H A vpermilpd H vpermilpd H vpermilpd H = vpermilpd H = vpermilpd vpermilpd H vpermilpd vpermilpd H vpermilpd / vpermilpd / vpermilpd H ? vpermilpd H ? vpermilpd vpermilpd H vpermilpd vpermilpd H vpermilpd 2 vpermilpd 2 vpermilpd H A vpermilpd H A vpermilpd H vpermilpd H vphadddq:Packed Horizontal Add Signed Doubleword to Signed Quadwordvphadddq " vphadddq " / vfnmsub231pdQFused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values vfnmsub231pd H = vfnmsub231pd H vfnmsub231pd H ? vfnmsub231pd H vfnmsub231pd H A vfnmsub231pd H vfnmsub231pd H = vfnmsub231pd # vfnmsub231pd H vfnmsub231pd # / vfnmsub231pd H ? vfnmsub231pd # vfnmsub231pd H vfnmsub231pd # 2 vfnmsub231pd H A vfnmsub231pd H vfnmsub231pd H Q vfnmsub231pd H Q vmovlhps>Move Packed Single-Precision Floating-Point Values Low to Highvmovlhps vmovlhps H
sha256msg2HPerform a Final Calculation for the Next Four SHA256 Message Doublewords
sha256msg2 (
sha256msg2 ( / setns Set byte if not sign (SF == 0)setnsSETPL setnsSETPL # vucomisdNUnordered Compare Scalar Double-Precision Floating-Point Values and Set EFLAGSvucomisd vucomisd H vucomisd + vucomisd H + vucomisd H R xorpd>Bitwise Logical XOR for Double-Precision Floating-Point ValuesxorpdXORPD xorpdXORPD / vpcmpeqw%Compare Packed Word Data for Equalityvpcmpeqw I vpcmpeqw I vpcmpeqw I / vpcmpeqw I / vpcmpeqw I vpcmpeqw I vpcmpeqw I 2 vpcmpeqw I 2 vpcmpeqw I vpcmpeqw I vpcmpeqw I 5 vpcmpeqw I 5 vpcmpeqw vpcmpeqw / vpcmpeqw ! vpcmpeqw ! 2 vfmadd213sdCFused Multiply-Add of Scalar Double-Precision Floating-Point Values vfmadd213sd H vfmadd213sd H + vfmadd213sd # vfmadd213sd H vfmadd213sd # + vfmadd213sd H + vfmadd213sd H Q vfmadd213sd H Q jg&Jump if greater (ZF == 0 and SF == OF)jgJGT N jgJGT O insertps3Insert Packed Single Precision Floating-Point Valueinsertps insertps ' vfmsub231psHFused Multiply-Subtract of Packed Single-Precision Floating-Point Values vfmsub231ps H 9 vfmsub231ps H vfmsub231ps H : vfmsub231ps H vfmsub231ps H ; vfmsub231ps H vfmsub231ps H 9 vfmsub231ps # vfmsub231ps H vfmsub231ps # / vfmsub231ps H : vfmsub231ps # vfmsub231ps H vfmsub231ps # 2 vfmsub231ps H ; vfmsub231ps H vfmsub231ps H Q vfmsub231ps H Q vfmadd132sdCFused Multiply-Add of Scalar Double-Precision Floating-Point Values vfmadd132sd H vfmadd132sd H + vfmadd132sd # vfmadd132sd H vfmadd132sd # + vfmadd132sd H + vfmadd132sd H Q vfmadd132sd H Q setbe/Set byte if below or equal (CF == 1 or ZF == 1)setbeSETLS setbeSETLS #
vpclmulqdq"Carry-Less Quadword Multiplication
vpclmulqdq
vpclmulqdq K
vpclmulqdq /
vpclmulqdq K /
vpclmulqdq
vpclmulqdq K
vpclmulqdq 2
vpclmulqdq K 2
vpclmulqdq H
vpclmulqdq H 5 vpcmpeqd+Compare Packed Doubleword Data for Equalityvpcmpeqd H 9 vpcmpeqd H 9 vpcmpeqd H vpcmpeqd H vpcmpeqd H : vpcmpeqd H : vpcmpeqd H vpcmpeqd H vpcmpeqd H ; vpcmpeqd H ; vpcmpeqd H vpcmpeqd H vpcmpeqd vpcmpeqd / vpcmpeqd ! vpcmpeqd ! 2 cmovnsMove if not sign (SF == 0)cmovnsw cmovnsw $ cmovnsl cmovnsl ' vmovdqu8Move Unaligned Byte Valuesvmovdqu8 I0 vmovdqu8 I vmovdqu8 I3 vmovdqu8 I vmovdqu8 I6 vmovdqu8 I vmovdqu8 I / vmovdqu8 I 2 vmovdqu8 I 5 vmovdqu8 I vmovdqu8 I / vmovdqu8 I vmovdqu8 I 2 vmovdqu8 I vmovdqu8 I 5 vmovdqu8 I/ vmovdqu8 I2 vmovdqu8 I5 vpshab Packed Shift Arithmetic Bytesvpshab " vpshab " / vpshab " / vsqrtssCCompute Square Root of Scalar Single-Precision Floating-Point Valuevsqrtss H vsqrtss H ' vsqrtss vsqrtss H vsqrtss ' vsqrtss H ' vsqrtss H Q vsqrtss H Q vpermbPermute Byte Integers vpermb T vpermb T / vpermb T vpermb T 2 vpermb T vpermb T 5 vpermb T vpermb T / vpermb T vpermb T 2 vpermb T vpermb T 5 vcmpss5Compare Scalar Single-Precision Floating-Point Valuesvcmpss H vcmpss H vcmpss H ' vcmpss H ' vcmpss vcmpss ' vcmpss H R vcmpss H R vprotdPacked Rotate Doublewordsvprotd " vprotd " vprotd " / vprotd " / vprotd " /
vcvtusi2shFConvert Unsigned Integer to Scalar Half-Precision Floating-Point Value vcvtusi2shl R vcvtusi2shl R ' vcvtusi2shl R Q paddsb6Add Packed Signed Byte Integers with Signed Saturationpaddsb paddsb + paddsb paddsb / vpmuludq,Multiply Packed Unsigned Doubleword Integersvpmuludq H = vpmuludq H vpmuludq H ? vpmuludq H vpmuludq H A vpmuludq H vpmuludq H = vpmuludq vpmuludq H vpmuludq / vpmuludq H ? vpmuludq ! vpmuludq H vpmuludq ! 2 vpmuludq H A vpmuludq H vinserti64x41Insert 256 Bits of Packed Quadword Integer Values vinserti64x4 H vinserti64x4 H 2 vinserti64x4 H vinserti64x4 H 2 vrndscalesh[Round Scalar Half-Precision Floating-Point Value To Include A Given Number Of Fraction Bits vrndscalesh R vrndscalesh R $ vrndscalesh R vrndscalesh R $ vrndscalesh R R vrndscalesh R R
vpmacssdqlSPacked Multiply Accumulate with Saturation Signed Low Doubleword to Signed Quadword
vpmacssdql "
vpmacssdql " / vpmadd52luqdPacked Multiply of Unsigned 52-bit Integers and Add the Low 52-bit Products to Quadword Accumulators vpmadd52luq K = vpmadd52luq K vpmadd52luq K ? vpmadd52luq K vpmadd52luq O A vpmadd52luq O vpmadd52luq K = vpmadd52luq K vpmadd52luq [ vpmadd52luq [ / vpmadd52luq K ? vpmadd52luq K vpmadd52luq [ vpmadd52luq [ 2 vpmadd52luq O A vpmadd52luq O movss2Move Scalar Single-Precision Floating-Point ValuesmovssMOVSS movssMOVSS ' movssMOVSS ' vfmaddcshIFused Multiply-Add of Complex Scalar Half-Precision Floating-Point Values vfmaddcsh R vfmaddcsh R ' vfmaddcsh R vfmaddcsh R ' vfmaddcsh R Q vfmaddcsh R Q vpshldvq@Concatenate and Variable Shift Packed Quadword Data Left Logical vpshldvq K = vpshldvq K vpshldvq K ? vpshldvq K vpshldvq U A vpshldvq U vpshldvq K = vpshldvq K vpshldvq K ? vpshldvq K vpshldvq U A vpshldvq U vpermpd0Permute Double-Precision Floating-Point Elementsvpermpd H ? vpermpd H A vpermpd H ? vpermpd H vpermpd H vpermpd H A vpermpd H vpermpd H vpermpd H ? vpermpd H ? vpermpd ! vpermpd H vpermpd H vpermpd ! 2 vpermpd H A vpermpd H A vpermpd H vpermpd H vbroadcastss1Broadcast Single-Precision Floating-Point Element vbroadcastss H vbroadcastss H vbroadcastss H ' vbroadcastss H ' vbroadcastss ! vbroadcastss ' vbroadcastss ! vbroadcastss H vbroadcastss ' vbroadcastss H ' vbroadcastss H vbroadcastss H ' setno"Set byte if not overflow (OF == 0)setnoSETOC setnoSETOC # blcmskMask From Lowest Clear Bitblcmsk 6 blcmsk 6 ' pfacc Packed Floating-Point Accumulatepfacc pfacc + pmaxub(Maximum of Packed Unsigned Byte IntegerspmaxubPMAXUB
pmaxubPMAXUB
+ pmaxubPMAXUB pmaxubPMAXUB / vdppd<Dot Product of Packed Double Precision Floating-Point Valuesvdppd vdppd / das#Decimal Adjust AL after SubtractiondasDAS cvtdq2pdBConvert Packed Dword Integers to Packed Double-Precision FP Valuescvtdq2pd cvtdq2pd + shlx*Logical Shift Left Without Affecting Flagsshlxl 5 shlxl 5 ' vexp2pdyApproximation to the Exponential 2^x of Packed Double-Precision Floating-Point Values with Less Than 2^-23 Relative Errorvexp2pd M A vexp2pd M vexp2pd M A vexp2pd M vexp2pd M R vexp2pd M R punpckhwd7Unpack and Interleave High-Order Words into Doublewords punpckhwd punpckhwd + punpckhwd punpckhwd / vfixupimmss;Fix Up Special Scalar Single-Precision Floating-Point Value vfixupimmss H vfixupimmss H ' vfixupimmss H vfixupimmss H ' vfixupimmss H R vfixupimmss H R vfmsub132pdHFused Multiply-Subtract of Packed Double-Precision Floating-Point Values vfmsub132pd H = vfmsub132pd H vfmsub132pd H ? vfmsub132pd H vfmsub132pd H A vfmsub132pd H vfmsub132pd H = vfmsub132pd # vfmsub132pd H vfmsub132pd # / vfmsub132pd H ? vfmsub132pd # vfmsub132pd H vfmsub132pd # 2 vfmsub132pd H A vfmsub132pd H vfmsub132pd H Q vfmsub132pd H Q vfnmadd132sdLFused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values vfnmadd132sd H vfnmadd132sd H + vfnmadd132sd # vfnmadd132sd H vfnmadd132sd # + vfnmadd132sd H + vfnmadd132sd H Q vfnmadd132sd H Q vfrczpd7Extract Fraction Packed Double-Precision Floating-Pointvfrczpd " vfrczpd " / vfrczpd " vfrczpd " 2 vpaddq Add Packed Quadword Integersvpaddq H = vpaddq H vpaddq H ? vpaddq H vpaddq H A vpaddq H vpaddq H = vpaddq vpaddq H vpaddq / vpaddq H ? vpaddq ! vpaddq H vpaddq ! 2 vpaddq H A vpaddq H psignw Packed Sign of Word Integerspsignw psignw + psignw psignw / vpbroadcastwBroadcast Word Integer vpbroadcastw I vpbroadcastw I vpbroadcastw I vpbroadcastw I vpbroadcastw I vpbroadcastw I vpbroadcastw I $ vpbroadcastw I $ vpbroadcastw I $ vpbroadcastw I vpbroadcastw ! vpbroadcastw I vpbroadcastw ! $ vpbroadcastw I $ vpbroadcastw I vpbroadcastw ! vpbroadcastw I vpbroadcastw ! $ vpbroadcastw I $ vpbroadcastw I vpbroadcastw I vpbroadcastw I $ vfnmadd231ssLFused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values vfnmadd231ss H vfnmadd231ss H ' vfnmadd231ss # vfnmadd231ss H vfnmadd231ss # ' vfnmadd231ss H ' vfnmadd231ss H Q vfnmadd231ss H Q paddwAdd Packed Word Integerspaddw paddw + paddw paddw / vpbroadcastmw2d?Broadcast Low Word of Mask Register to Packed Doubleword Valuesvpbroadcastmw2d N vpbroadcastmw2d N vpbroadcastmw2d N vpermt2b9Full Permute of Bytes From Two Tables Overwriting a Table vpermt2b T vpermt2b T / vpermt2b T vpermt2b T 2 vpermt2b T vpermt2b T 5 vpermt2b T vpermt2b T / vpermt2b T vpermt2b T 2 vpermt2b T vpermt2b T 5 vpmovusdbMDown Convert Packed Doubleword Values to Byte Values with Unsigned Saturation vpmovusdb H vpmovusdb H( vpmovusdb H vpmovusdb H, vpmovusdb H vpmovusdb H0 vpmovusdb H vpmovusdb H vpmovusdb H vpmovusdb H' vpmovusdb H+ vpmovusdb H/ vmovntpsKStore Packed Single-Precision Floating-Point Values Using Non-Temporal Hintvmovntps / vmovntps H/ vmovntps 2 vmovntps H2 vmovntps H5
vpternlogd6Bitwise Ternary Logical Operation on Doubleword Values
vpternlogd H 9
vpternlogd H
vpternlogd H :
vpternlogd H
vpternlogd H ;
vpternlogd H
vpternlogd H 9
vpternlogd H
vpternlogd H :
vpternlogd H
vpternlogd H ;
vpternlogd H cvtps2piBConvert Packed Single-Precision FP Values to Packed Dword Integerscvtps2piCVTPS2PL cvtps2piCVTPS2PL + vptestnmw7Logical NAND of Packed Word Integer Values and Set Mask vptestnmw I vptestnmw I vptestnmw I / vptestnmw I / vptestnmw I vptestnmw I vptestnmw I 2 vptestnmw I 2 vptestnmw I vptestnmw I vptestnmw I 5 vptestnmw I 5 vpscatterdd?Scatter Packed Doubleword Values with Signed Doubleword Indices vpscatterdd HC vpscatterdd HG vpscatterdd HK btBit TestbtwBTW btwBTW btlBTL btlBTL btwBTW $ btwBTW $ btlBTL ' btlBTL ' rdpmc#Read Performance-Monitoring Counterrdpmc - kunpckwd"Unpack and Interleave 16-bit Maskskunpckwd I popPop a Value from the StackpopwPOPW poplPOPL popwPOPW $ poplPOPL ' vphaddbq4Packed Horizontal Add Signed Byte to Signed Quadwordvphaddbq " vphaddbq " / vbroadcastsd1Broadcast Double-Precision Floating-Point Element
vbroadcastsd H vbroadcastsd H vbroadcastsd H + vbroadcastsd H + vbroadcastsd ! vbroadcastsd H vbroadcastsd + vbroadcastsd H + vbroadcastsd H vbroadcastsd H + kortestq OR 64-bit Masks and Set Flagskortestq I vfnmsub231psQFused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values vfnmsub231ps H 9 vfnmsub231ps H vfnmsub231ps H : vfnmsub231ps H vfnmsub231ps H ; vfnmsub231ps H vfnmsub231ps H 9 vfnmsub231ps # vfnmsub231ps H vfnmsub231ps # / vfnmsub231ps H : vfnmsub231ps # vfnmsub231ps H vfnmsub231ps # 2 vfnmsub231ps H ; vfnmsub231ps H vfnmsub231ps H Q vfnmsub231ps H Q pinsrb Insert Bytepinsrb pinsrb # vmovmskpd8Extract Packed Double-Precision Floating-Point Sign Mask vmovmskpd vmovmskpd
vrsqrt28ss�Approximation to the Reciprocal Square Root of a Scalar Single-Precision Floating-Point Value with Less Than 2^-28 Relative Error
vrsqrt28ss M
vrsqrt28ss M '
vrsqrt28ss M
vrsqrt28ss M '
vrsqrt28ss M R
vrsqrt28ss M R vstmxcsrStore MXCSR Register Statevstmxcsr ' adcAdd with CarryadcbADCB adcbADCB adcbADCB adcbADCB # adcwADCW adcwADCW adcwADCW adcwADCW adcwADCW $ adclADCL adclADCL adclADCL adclADCL adclADCL ' adcbADCB # adcbADCB # adcwADCW $ adcwADCW $ adcwADCW $ adclADCL ' adclADCL ' adclADCL '
vcvtudq2ps\Convert Packed Unsigned Doubleword Integers to Packed Single-Precision Floating-Point Values
vcvtudq2ps H 9
vcvtudq2ps H :
vcvtudq2ps H ;
vcvtudq2ps H
vcvtudq2ps H
vcvtudq2ps H
vcvtudq2ps H 9
vcvtudq2ps H
vcvtudq2ps H :
vcvtudq2ps H
vcvtudq2ps H ;
vcvtudq2ps H
vcvtudq2ps H Q
vcvtudq2ps H Q vdivpd4Divide Packed Double-Precision Floating-Point Valuesvdivpd H = vdivpd H vdivpd H ? vdivpd H vdivpd H A vdivpd H vdivpd H = vdivpd vdivpd H vdivpd / vdivpd H ? vdivpd vdivpd H vdivpd 2 vdivpd H A vdivpd H vdivpd H Q vdivpd H Q vprorvq%Variable Rotate Packed Quadword Right vprorvq H = vprorvq H vprorvq H ? vprorvq H vprorvq H A vprorvq H vprorvq H = vprorvq H vprorvq H ? vprorvq H vprorvq H A vprorvq H cldClear Direction FlagcldCLD mulpd6Multiply Packed Double-Precision Floating-Point ValuesmulpdMULPD mulpdMULPD / pfrcp.Packed Floating-Point Reciprocal Approximationpfrcp pfrcp + prefetchPrefetch Data into Cachesprefetch @# psubq!Subtract Packed Quadword IntegerspsubqPSUBQ psubqPSUBQ + psubqPSUBQ psubqPSUBQ / vdpps<Dot Product of Packed Single Precision Floating-Point Valuesvdpps vdpps / vdpps vdpps 2 vfmsub132sdHFused Multiply-Subtract of Scalar Double-Precision Floating-Point Values vfmsub132sd H vfmsub132sd H + vfmsub132sd # vfmsub132sd H vfmsub132sd # + vfmsub132sd H + vfmsub132sd H Q vfmsub132sd H Q vmovsh0Move Scalar Half-Precision Floating-Point Valuesvmovsh R% vmovsh R $ vmovsh R $ vmovsh R$ vmovsh R vmovsh R vpdpwsudsXPacked Dot Product of Signed-by-Unsigned Word subvectors into Doubleword with Saturation vpdpwsuds Y vpdpwsuds Y / vpdpwsuds Y vpdpwsuds Y 2 vpmacsdqhDPacked Multiply Accumulate Signed High Doubleword to Signed Quadword vpmacsdqh " vpmacsdqh " / vpshrdvqAConcatenate and Variable Shift Packed Quadword Data Right Logical vpshrdvq K = vpshrdvq K vpshrdvq K ? vpshrdvq K vpshrdvq U A vpshrdvq U vpshrdvq K = vpshrdvq K vpshrdvq K ? vpshrdvq K vpshrdvq U A vpshrdvq U
vgetmantpdOExtract Normalized Mantissas from Packed Double-Precision Floating-Point Values
vgetmantpd H =
vgetmantpd H ?
vgetmantpd H A
vgetmantpd H
vgetmantpd H
vgetmantpd H
vgetmantpd H =
vgetmantpd H
vgetmantpd H ?
vgetmantpd H
vgetmantpd H A
vgetmantpd H
vgetmantpd H R
vgetmantpd H R vmulph4Multiply Packed Half-Precision Floating-Point Valuesvmulph K < vmulph K vmulph K > vmulph K vmulph R @ vmulph R vmulph K < vmulph K vmulph K > vmulph K vmulph R @ vmulph R vmulph R Q vmulph R Q vpbroadcastd Broadcast Doubleword Integer vpbroadcastd H vpbroadcastd H vpbroadcastd H vpbroadcastd H vpbroadcastd H vpbroadcastd H vpbroadcastd H ' vpbroadcastd H ' vpbroadcastd H ' vpbroadcastd H vpbroadcastd ! vpbroadcastd H vpbroadcastd ! ' vpbroadcastd H ' vpbroadcastd H vpbroadcastd ! vpbroadcastd H vpbroadcastd ! ' vpbroadcastd H ' vpbroadcastd H vpbroadcastd H vpbroadcastd H '
vshufi32x40Shuffle 128-Bit Packed Doubleword Integer Values
vshufi32x4 H :
vshufi32x4 H
vshufi32x4 H ;
vshufi32x4 H
vshufi32x4 H :
vshufi32x4 H
vshufi32x4 H ;
vshufi32x4 H blsrReset Lowest Set Bitblsrl 4 blsrl 4 ' blsfillFill From Lowest Set Bitblsfill 6 blsfill 6 ' vphsubd.Packed Horizontal Subtract Doubleword Integersvphsubd vphsubd / vphsubd ! vphsubd ! 2 vmulsh:Fused Multiply Scalar Half-Precision Floating-Point Valuesvmulsh R vmulsh R $ vmulsh R vmulsh R $ vmulsh R Q vmulsh R Q femmsFast Exit Multimedia Statefemms vpsadbw#Compute Sum of Absolute Differences
vpsadbw vpsadbw I vpsadbw / vpsadbw I / vpsadbw ! vpsadbw I vpsadbw ! 2 vpsadbw I 2 vpsadbw I vpsadbw I 5 vpblendmw*Blend Word Vectors Using an OpMask Control vpblendmw I vpblendmw I / vpblendmw I vpblendmw I 2 vpblendmw I vpblendmw I 5 vpblendmw I vpblendmw I / vpblendmw I vpblendmw I 2 vpblendmw I vpblendmw I 5 maxsd;Return Maximum Scalar Double-Precision Floating-Point ValuemaxsdMAXSD maxsdMAXSD + vmovntdq-Store Double Quadword Using Non-Temporal Hintvmovntdq / vmovntdq H/ vmovntdq 2 vmovntdq H2 vmovntdq H5 psllw#Shift Packed Word Data Left Logicalpsllw psllw psllw + psllw psllw psllw /
vgatherqpdRGather Packed Double-Precision Floating-Point Values Using Signed Quadword Indices
vgatherqpd H D
vgatherqpd H H
vgatherqpd H L
vgatherqpd ! D
vgatherqpd ! H vpinsrb Insert Bytevpinsrb vpinsrb I vpinsrb # vpinsrb I # jnae$Jump if not above or equal (CF == 1)jnaeJCS N jnaeJCS O vminsd;Return Minimum Scalar Double-Precision Floating-Point Valuevminsd H vminsd H + vminsd vminsd H vminsd + vminsd H + vminsd H R vminsd H R vshufps5Shuffle Packed Single-Precision Floating-Point Valuesvshufps H 9 vshufps H vshufps H : vshufps H vshufps H ; vshufps H vshufps H 9 vshufps vshufps H vshufps / vshufps H : vshufps vshufps H vshufps 2 vshufps H ; vshufps H maxpd<Return Maximum Packed Double-Precision Floating-Point ValuesmaxpdMAXPD maxpdMAXPD / pmovzxbw>Move Packed Byte Integers to Word Integers with Zero Extensionpmovzxbw pmovzxbw + vroundsd3Round Scalar Double Precision Floating-Point Valuesvroundsd vroundsd + pcmpgtq$Compare Packed Data for Greater Thanpcmpgtq pcmpgtq / kxnord!Bitwise Logical XNOR 32-bit Maskskxnord I
vgatherpf1dpsoSparse Prefetch Packed Single-Precision Floating-Point Data Values with Signed Doubleword Indices Using T1 Hint
vgatherpf1dps LK vpcompresswBStore Sparse Packed Word Integer Values into Dense Memory/Register vpcompressw K0 vpcompressw K vpcompressw K3 vpcompressw K vpcompressw U6 vpcompressw U vpcompressw K vpcompressw K vpcompressw U vpcompressw K/ vpcompressw K2 vpcompressw U5 vpmovsxwqBMove Packed Word Integers to Quadword Integers with Sign Extension vpmovsxwq H vpmovsxwq H vpmovsxwq H vpmovsxwq H ' vpmovsxwq H + vpmovsxwq H / vpmovsxwq vpmovsxwq H vpmovsxwq ' vpmovsxwq H ' vpmovsxwq ! vpmovsxwq H vpmovsxwq ! + vpmovsxwq H + vpmovsxwq H vpmovsxwq H / vpmacsww5Packed Multiply Accumulate Signed Word to Signed Wordvpmacsww " vpmacsww " / vphaddubq/Packed Horizontal Add Unsigned Byte to Quadword vphaddubq " vphaddubq " / vsubph4Subtract Packed Half-Precision Floating-Point Valuesvsubph K < vsubph K vsubph K > vsubph K vsubph R @ vsubph R vsubph K < vsubph K vsubph K > vsubph K vsubph R @ vsubph R vsubph R Q vsubph R Q xgetbv&Get Value of Extended Control Registerxgetbv psrlq(Shift Packed Quadword Data Right Logicalpsrlq psrlq psrlq + psrlq psrlq psrlq / vfixupimmsd;Fix Up Special Scalar Double-Precision Floating-Point Value vfixupimmsd H vfixupimmsd H + vfixupimmsd H vfixupimmsd H + vfixupimmsd H R vfixupimmsd H R pminsd,Minimum of Packed Signed Doubleword Integerspminsd pminsd / kandw Bitwise Logical AND 16-bit Maskskandw H kshiftldShift Left 32-bit Maskskshiftld I tzcnt&Count the Number of Trailing Zero Bitstzcntw 4 tzcntw 4 $ tzcntl 4 tzcntl 4 ' vrangesdYRange Restriction Calculation For a pair of Scalar Double-Precision Floating-Point Valuesvrangesd J vrangesd J + vrangesd J vrangesd J + vrangesd J R vrangesd J R vpermdPermute Doubleword Integers
vpermd H : vpermd H vpermd H ; vpermd H vpermd H : vpermd ! vpermd H vpermd ! 2 vpermd H ; vpermd H vsubpd6Subtract Packed Double-Precision Floating-Point Valuesvsubpd H = vsubpd H vsubpd H ? vsubpd H vsubpd H A vsubpd H vsubpd H = vsubpd vsubpd H vsubpd / vsubpd H ? vsubpd vsubpd H vsubpd 2 vsubpd H A vsubpd H vsubpd H Q vsubpd H Q vpshrdvw=Concatenate and Variable Shift Packed Word Data Right Logical vpshrdvw K vpshrdvw K / vpshrdvw K vpshrdvw K 2 vpshrdvw U vpshrdvw U 5 vpshrdvw K vpshrdvw K / vpshrdvw K vpshrdvw K 2 vpshrdvw U vpshrdvw U 5 jnlJump if not less (SF == OF)jnlJGE N jnlJGE O movdiri MOVe to DIRect store Integermovdiri 0' vcvtph2uwZConvert Packed Half-Precision Floating-Point Values to Packed Unsigned Word Integer Values vcvtph2uw K < vcvtph2uw K > vcvtph2uw R @ vcvtph2uw K vcvtph2uw K vcvtph2uw R vcvtph2uw K < vcvtph2uw K vcvtph2uw K > vcvtph2uw K vcvtph2uw R @ vcvtph2uw R vcvtph2uw R Q vcvtph2uw R Q cmovneMove if not equal (ZF == 0)cmovnew cmovnew $ cmovnel cmovnel ' extrq
Extract Fieldextrq extrq vfmsub231sdHFused Multiply-Subtract of Scalar Double-Precision Floating-Point Values vfmsub231sd H vfmsub231sd H + vfmsub231sd # vfmsub231sd H vfmsub231sd # + vfmsub231sd H + vfmsub231sd H Q vfmsub231sd H Q vpdpbuudsZPacked Dot Product of Unsigned-by-Unsinged Byte subvectors into Doubleword with Saturation vpdpbuuds X vpdpbuuds X / vpdpbuuds X vpdpbuuds X 2 vpexpandbALoad Sparse Packed Byte Integer Values from Dense Memory/Register vpexpandb K vpexpandb K vpexpandb U vpexpandb K / vpexpandb K 2 vpexpandb U 5 vpexpandb K vpexpandb K / vpexpandb K vpexpandb K 2 vpexpandb U vpexpandb U 5 pmaddubsw9Multiply and Add Packed Signed and Unsigned Byte Integers pmaddubsw pmaddubsw + pmaddubsw pmaddubsw / vfmadd231pdCFused Multiply-Add of Packed Double-Precision Floating-Point Values vfmadd231pd H = vfmadd231pd H vfmadd231pd H ? vfmadd231pd H vfmadd231pd H A vfmadd231pd H vfmadd231pd H = vfmadd231pd # vfmadd231pd H vfmadd231pd # / vfmadd231pd H ? vfmadd231pd # vfmadd231pd H vfmadd231pd # 2 vfmadd231pd H A vfmadd231pd H vfmadd231pd H Q vfmadd231pd H Q vphsubw(Packed Horizontal Subtract Word Integersvphsubw vphsubw / vphsubw ! vphsubw ! 2 vscatterpf0qps�Sparse Prefetch Packed Single-Precision Floating-Point Data Values with Signed Quadword Indices Using T0 Hint with Intent to Writevscatterpf0qps LM vaesenclast,Perform Last Round of an AES Encryption Flow
vaesenclast vaesenclast K vaesenclast / vaesenclast K / vaesenclast vaesenclast K vaesenclast 2 vaesenclast K 2 vaesenclast H vaesenclast H 5 subSubtractsubbSUBB subbSUBB subbSUBB subbSUBB # subwSUBW subwSUBW subwSUBW subwSUBW subwSUBW $ sublSUBL sublSUBL sublSUBL sublSUBL sublSUBL ' subbSUBB # subbSUBB # subwSUBW $ subwSUBW $ subwSUBW $ sublSUBL ' sublSUBL ' sublSUBL ' movhps7Move High Packed Single-Precision Floating-Point ValuesmovhpsMOVHPS + movhpsMOVHPS + vbcstnebf162ps;Load BF16 Element and Convert to FP32 Element With Broadcasvbcstnebf162ps Z $ vbcstnebf162ps Z $ rorx,Rotate Right Logical Without Affecting Flagsrorxl 5 rorxl 5 ' vcvtps2qq^Convert Packed Single Precision Floating-Point Values to Packed Singed Quadword Integer Values vcvtps2qq J 8 vcvtps2qq J 9 vcvtps2qq J : vcvtps2qq J vcvtps2qq J vcvtps2qq J vcvtps2qq J 8 vcvtps2qq J vcvtps2qq J 9 vcvtps2qq J vcvtps2qq J : vcvtps2qq J vcvtps2qq J Q vcvtps2qq J Q vfmsub132shFFused Multiply-Subtract of Scalar Half-Precision Floating-Point Values vfmsub132sh R vfmsub132sh R $ vfmsub132sh R vfmsub132sh R $ vfmsub132sh R Q vfmsub132sh R Q vpabsw&Packed Absolute Value of Word Integersvpabsw I vpabsw I vpabsw I vpabsw I / vpabsw I 2 vpabsw I 5 vpabsw vpabsw I vpabsw / vpabsw I / vpabsw ! vpabsw I vpabsw ! 2 vpabsw I 2 vpabsw I vpabsw I 5 vpmulhw:Multiply Packed Signed Word Integers and Store High Resultvpmulhw I vpmulhw I / vpmulhw I vpmulhw I 2 vpmulhw I vpmulhw I 5 vpmulhw vpmulhw I vpmulhw / vpmulhw I / vpmulhw ! vpmulhw I vpmulhw ! 2 vpmulhw I 2 vpmulhw I vpmulhw I 5 vpopcntb)Packed Population Count for Byte Integers vpopcntb K vpopcntb K vpopcntb S vpopcntb K / vpopcntb K 2 vpopcntb S 5 vpopcntb K vpopcntb K / vpopcntb K vpopcntb K 2 vpopcntb S vpopcntb S 5 pmaddwd,Multiply and Add Packed Signed Word Integerspmaddwd pmaddwd + pmaddwd pmaddwd / vpscatterqq;Scatter Packed Quadword Values with Signed Quadword Indices vpscatterqq HE vpscatterqq HI vpscatterqq HM vinserti64x21Insert 128 Bits of Packed Quadword Integer Values vinserti64x2 J vinserti64x2 J / vinserti64x2 J vinserti64x2 J / vinserti64x2 J vinserti64x2 J / vinserti64x2 J vinserti64x2 J / orps<Bitwise Logical OR of Single-Precision Floating-Point ValuesorpsORPS orpsORPS / vmaskmovdqu'Store Selected Bytes of Double Quadword vmaskmovdqu vcvtneebf162ps:Convert Even Elements of Packed BF16 Values to FP32 Valuesvcvtneebf162ps Z / vcvtneebf162ps Z 2 movnti(Store Doubleword Using Non-Temporal Hintmovntil ' psrad-Shift Packed Doubleword Data Right Arithmeticpsrad psrad psrad + psrad psrad psrad / vblendmpdLBlend Packed Double-Precision Floating-Point Vectors Using an OpMask Control vblendmpd H = vblendmpd H vblendmpd H ? vblendmpd H vblendmpd H A vblendmpd H vblendmpd H = vblendmpd H vblendmpd H ? vblendmpd H vblendmpd H A vblendmpd H vbroadcastf32x26Broadcast Two Single-Precision Floating-Point Elementsvbroadcastf32x2 J vbroadcastf32x2 J vbroadcastf32x2 J + vbroadcastf32x2 J + vbroadcastf32x2 J vbroadcastf32x2 J + vbroadcastf32x2 J vbroadcastf32x2 J +
vpunpcklwd6Unpack and Interleave Low-Order Words into Doublewords
vpunpcklwd I
vpunpcklwd I /
vpunpcklwd I
vpunpcklwd I 2
vpunpcklwd I
vpunpcklwd I 5
vpunpcklwd
vpunpcklwd I
vpunpcklwd /
vpunpcklwd I /
vpunpcklwd !
vpunpcklwd I
vpunpcklwd ! 2
vpunpcklwd I 2
vpunpcklwd I
vpunpcklwd I 5 vpermwPermute Word Integers vpermw I vpermw I / vpermw I vpermw I 2 vpermw I vpermw I 5 vpermw I vpermw I / vpermw I vpermw I 2 vpermw I vpermw I 5 incIncrement by 1incbINCB incwINCW inclINCL incbINCB # incwINCW $ inclINCL ' vmovdqu16Move Unaligned Word Values vmovdqu16 I0 vmovdqu16 I vmovdqu16 I3 vmovdqu16 I vmovdqu16 I6 vmovdqu16 I vmovdqu16 I / vmovdqu16 I 2 vmovdqu16 I 5 vmovdqu16 I vmovdqu16 I / vmovdqu16 I vmovdqu16 I 2 vmovdqu16 I vmovdqu16 I 5 vmovdqu16 I/ vmovdqu16 I2 vmovdqu16 I5 vbroadcastf64x47Broadcast Four Double-Precision Floating-Point Elementsvbroadcastf64x4 H 2 vbroadcastf64x4 H 2 vpdpwuudsZPacked Dot Product of Unsigned-by-Unsigned Word subvectors into Doubleword with Saturation vpdpwuuds Y vpdpwuuds Y / vpdpwuuds Y vpdpwuuds Y 2
vgf2p8mulbGalois Field Multiply Bytes
vgf2p8mulb
vgf2p8mulb /
vgf2p8mulb
vgf2p8mulb 2
vgf2p8mulb
vgf2p8mulb 5
vgf2p8mulb
vgf2p8mulb
vgf2p8mulb /
vgf2p8mulb /
vgf2p8mulb
vgf2p8mulb
vgf2p8mulb 2
vgf2p8mulb 2
vgf2p8mulb
vgf2p8mulb 5 vgetexppslExtract Exponents of Packed Single-Precision Floating-Point Values as Single-Precision Floating-Point Values vgetexpps H 9 vgetexpps H : vgetexpps H ; vgetexpps H vgetexpps H vgetexpps H vgetexpps H 9 vgetexpps H vgetexpps H : vgetexpps H vgetexpps H ; vgetexpps H vgetexpps H R vgetexpps H R vcvtqq2pdQConvert Packed Quadword Integers to Packed Double-Precision Floating-Point Values vcvtqq2pd J = vcvtqq2pd J ? vcvtqq2pd J A vcvtqq2pd J vcvtqq2pd J vcvtqq2pd J vcvtqq2pd J = vcvtqq2pd J vcvtqq2pd J ? vcvtqq2pd J vcvtqq2pd J A vcvtqq2pd J vcvtqq2pd J Q vcvtqq2pd J Q vpermi2q?Full Permute of Quadwords From Two Tables Overwriting the Index vpermi2q H = vpermi2q H vpermi2q H ? vpermi2q H vpermi2q H A vpermi2q H vpermi2q H = vpermi2q H vpermi2q H ? vpermi2q H vpermi2q H A vpermi2q H paddusb:Add Packed Unsigned Byte Integers with Unsigned Saturationpaddusb paddusb + paddusb paddusb / vcvtsi2sh7Convert Dword Integer to Scalar Half-Precision FP Value
vcvtsi2shl R
vcvtsi2shl R '
vcvtsi2shl R Q
vgetmantssMExtract Normalized Mantissa from Scalar Single-Precision Floating-Point Value
vgetmantss H
vgetmantss H '
vgetmantss H
vgetmantss H '
vgetmantss H R
vgetmantss H R vmulsd6Multiply Scalar Double-Precision Floating-Point Valuesvmulsd H vmulsd H + vmulsd vmulsd H vmulsd + vmulsd H + vmulsd H Q vmulsd H Q phaddd(Packed Horizontal Add Doubleword Integerphaddd phaddd + phaddd phaddd /
phminposuw3Packed Horizontal Minimum of Unsigned Word Integers
phminposuw
phminposuw / vpsubsw;Subtract Packed Signed Word Integers with Signed Saturationvpsubsw I vpsubsw I / vpsubsw I vpsubsw I 2 vpsubsw I vpsubsw I 5 vpsubsw vpsubsw I vpsubsw / vpsubsw I / vpsubsw ! vpsubsw I vpsubsw ! 2 vpsubsw I 2 vpsubsw I vpsubsw I 5 haddps Packed Single-FP Horizontal Addhaddps haddps / minss;Return Minimum Scalar Single-Precision Floating-Point ValueminssMINSS minssMINSS ' vpexpandwALoad Sparse Packed Word Integer Values from Dense Memory/Register vpexpandw K vpexpandw K vpexpandw U vpexpandw K / vpexpandw K 2 vpexpandw U 5 vpexpandw K vpexpandw K / vpexpandw K vpexpandw K 2 vpexpandw U vpexpandw U 5 vprotbPacked Rotate Bytesvprotb " vprotb " vprotb " / vprotb " / vprotb " / pmovzxbqBMove Packed Byte Integers to Quadword Integers with Zero Extensionpmovzxbq pmovzxbq $ vprord Rotate Packed Doubleword Right vprord H 9 vprord H : vprord H ; vprord H vprord H vprord H vprord H 9 vprord H vprord H : vprord H vprord H ; vprord H vfrczps7Extract Fraction Packed Single-Precision Floating-Pointvfrczps " vfrczps " / vfrczps " vfrczps " 2 cmpsd5Compare Scalar Double-Precision Floating-Point ValuescmpsdCMPSD cmpsdCMPSD + pfmax Packed Floating-Point Maximumpfmax pfmax + vplzcntq@Count the Number of Leading Zero Bits for Packed Quadword Values vplzcntq N = vplzcntq N ? vplzcntq N A vplzcntq N vplzcntq N vplzcntq N vplzcntq N = vplzcntq N vplzcntq N ? vplzcntq N vplzcntq N A vplzcntq N vcvtsh2ssJConvert Scalar Half-Precision FP Value to Scalar Double-Precision FP Value vcvtsh2ss R vcvtsh2ss R $ vcvtsh2ss R vcvtsh2ss R $ vcvtsh2ss R R vcvtsh2ss R R vfnmadd132psLFused Negative Multiply-Add of Packed Single-Precision Floating-Point Values vfnmadd132ps H 9 vfnmadd132ps H vfnmadd132ps H : vfnmadd132ps H vfnmadd132ps H ; vfnmadd132ps H vfnmadd132ps H 9 vfnmadd132ps # vfnmadd132ps H vfnmadd132ps # / vfnmadd132ps H : vfnmadd132ps # vfnmadd132ps H vfnmadd132ps # 2 vfnmadd132ps H ; vfnmadd132ps H vfnmadd132ps H Q vfnmadd132ps H Q vreducessRPerform Reduction Transformation on a Scalar Single-Precision Floating-Point Value vreducess J vreducess J ' vreducess J vreducess J ' vpshrdw4Concatenate and Shift Packed Word Data Right Logical vpshrdw K vpshrdw K / vpshrdw K vpshrdw K 2 vpshrdw U vpshrdw U 5 vpshrdw K vpshrdw K / vpshrdw K vpshrdw K 2 vpshrdw U vpshrdw U 5 vpmovq2m7Move Signs of Packed Quadword Integers to Mask Registervpmovq2m J vpmovq2m J vpmovq2m J vfmsub213pdHFused Multiply-Subtract of Packed Double-Precision Floating-Point Values vfmsub213pd H = vfmsub213pd H vfmsub213pd H ? vfmsub213pd H vfmsub213pd H A vfmsub213pd H vfmsub213pd H = vfmsub213pd # vfmsub213pd H vfmsub213pd # / vfmsub213pd H ? vfmsub213pd # vfmsub213pd H vfmsub213pd # 2 vfmsub213pd H A vfmsub213pd H vfmsub213pd H Q vfmsub213pd H Q sqrtssCCompute Square Root of Scalar Single-Precision Floating-Point ValuesqrtssSQRTSS sqrtssSQRTSS ' vpermt2d?Full Permute of Doublewords From Two Tables Overwriting a Table vpermt2d H 9 vpermt2d H vpermt2d H : vpermt2d H vpermt2d H ; vpermt2d H vpermt2d H 9 vpermt2d H vpermt2d H : vpermt2d H vpermt2d H ; vpermt2d H vpdpbuudJPacked Dot Product of Unsigned-by-Unsinged Byte subvectors into Doublewordvpdpbuud X vpdpbuud X / vpdpbuud X vpdpbuud X 2 punpcklbw0Unpack and Interleave Low-Order Bytes into Words punpcklbw punpcklbw ' punpcklbw punpcklbw / vphaddswAPacked Horizontal Add Signed Word Integers with Signed Saturationvphaddsw vphaddsw / vphaddsw ! vphaddsw ! 2 vpinsrdInsert Doublewordvpinsrd vpinsrd J vpinsrd ' vpinsrd J ' vxorpd>Bitwise Logical XOR for Double-Precision Floating-Point Valuesvxorpd J = vxorpd J vxorpd J ? vxorpd J vxorpd J A vxorpd J vxorpd J = vxorpd vxorpd J vxorpd / vxorpd J ? vxorpd vxorpd J vxorpd 2 vxorpd J A vxorpd J vpslld)Shift Packed Doubleword Data Left Logical vpslld H 9 vpslld H : vpslld H ; vpslld H vpslld H vpslld H / vpslld H vpslld H vpslld H / vpslld H vpslld H vpslld H / vpslld H 9 vpslld vpslld H vpslld vpslld H vpslld / vpslld H / vpslld H : vpslld ! vpslld H vpslld ! vpslld H vpslld ! / vpslld H / vpslld H ; vpslld H vpslld H vpslld H / addpd1Add Packed Double-Precision Floating-Point ValuesaddpdADDPD addpdADDPD / vprolvq$Variable Rotate Packed Quadword Left vprolvq H = vprolvq H vprolvq H ? vprolvq H vprolvq H A vprolvq H vprolvq H = vprolvq H vprolvq H ? vprolvq H vprolvq H A vprolvq H kmovbMove 8-bit Maskkmovb J kmovb J kmovb J # kmovb J kmovb J# movddup Move One Double-FP and Duplicatemovddup movddup + vpmovswbEDown Convert Packed Word Values to Byte Values with Signed Saturation vpmovswb I vpmovswb I, vpmovswb I vpmovswb I0 vpmovswb I vpmovswb I3 vpmovswb I vpmovswb I vpmovswb I vpmovswb I+ vpmovswb I/ vpmovswb I2 vpsignb Packed Sign of Byte Integersvpsignb vpsignb / vpsignb ! vpsignb ! 2 movsldup'Move Packed Single-FP Low and Duplicatemovsldup movsldup /
vcvttph2uwjConvert with Truncation Packed Half-Precision Floating-Point Values to Packed Unsigned Word Integer Values
vcvttph2uw K <
vcvttph2uw K >
vcvttph2uw R @
vcvttph2uw K
vcvttph2uw K
vcvttph2uw R
vcvttph2uw K <
vcvttph2uw K
vcvttph2uw K >
vcvttph2uw K
vcvttph2uw R @
vcvttph2uw R
vcvttph2uw R R
vcvttph2uw R R shld#Integer Double Precision Shift Leftshldw shldw shldl shldl shldw $ shldw $ shldl ' shldl ' vorps<Bitwise Logical OR of Single-Precision Floating-Point Valuesvorps J 9 vorps J vorps J : vorps J vorps J ; vorps J vorps J 9 vorps vorps J vorps / vorps J : vorps vorps J vorps 2 vorps J ; vorps J vfnmadd132pdLFused Negative Multiply-Add of Packed Double-Precision Floating-Point Values vfnmadd132pd H = vfnmadd132pd H vfnmadd132pd H ? vfnmadd132pd H vfnmadd132pd H A vfnmadd132pd H vfnmadd132pd H = vfnmadd132pd # vfnmadd132pd H vfnmadd132pd # / vfnmadd132pd H ? vfnmadd132pd # vfnmadd132pd H vfnmadd132pd # 2 vfnmadd132pd H A vfnmadd132pd H vfnmadd132pd H Q vfnmadd132pd H Q ror Rotate RightrorbRORB rorbRORB rorbRORB rorwRORW rorwRORW rorwRORW rorlRORL rorlRORL rorlRORL rorbRORB # rorbRORB # rorbRORB # rorwRORW $ rorwRORW $ rorwRORW $ rorlRORL ' rorlRORL ' rorlRORL ' movdqu Move Unaligned Double QuadwordmovdquMOVOU movdquMOVOU / movdquMOVOU / pblendwBlend Packed Wordspblendw pblendw / kmovdMove 32-bit Maskkmovd I kmovd I kmovd I ' kmovd I kmovd I' jnbe0Jump if not below or equal (CF == 0 and ZF == 0)jnbeJHI N jnbeJHI O kshiftrbShift Right 8-bit Maskskshiftrb J vsm4key4(Perform Four Rounds of SM4 Key Expansionvsm4key4 vsm4key4 / vsm4key4 vsm4key4 2 vpcomub%Compare Packed Unsigned Byte Integersvpcomub " vpcomub " / vfmaddsub213psXFused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Valuesvfmaddsub213ps H 9 vfmaddsub213ps H vfmaddsub213ps H : vfmaddsub213ps H vfmaddsub213ps H ; vfmaddsub213ps H vfmaddsub213ps H 9 vfmaddsub213ps # vfmaddsub213ps H vfmaddsub213ps # / vfmaddsub213ps H : vfmaddsub213ps # vfmaddsub213ps H vfmaddsub213ps # 2 vfmaddsub213ps H ; vfmaddsub213ps H vfmaddsub213ps H Q vfmaddsub213ps H Q vpminsw&Minimum of Packed Signed Word Integersvpminsw I vpminsw I / vpminsw I vpminsw I 2 vpminsw I vpminsw I 5 vpminsw vpminsw I vpminsw / vpminsw I / vpminsw ! vpminsw I vpminsw ! 2 vpminsw I 2 vpminsw I vpminsw I 5 mwait Monitor Waitmwait D psubusw?Subtract Packed Unsigned Word Integers with Unsigned SaturationpsubuswPSUBUSW psubuswPSUBUSW + psubuswPSUBUSW psubuswPSUBUSW /
vgatherpf0dpdoSparse Prefetch Packed Double-Precision Floating-Point Data Values with Signed Doubleword Indices Using T0 Hint
vgatherpf0dpd LG ptestPacked Logical Compareptest ptest / vpmaxsd,Maximum of Packed Signed Doubleword Integersvpmaxsd H 9 vpmaxsd H vpmaxsd H : vpmaxsd H vpmaxsd H ; vpmaxsd H vpmaxsd H 9 vpmaxsd vpmaxsd H vpmaxsd / vpmaxsd H : vpmaxsd ! vpmaxsd H vpmaxsd ! 2 vpmaxsd H ; vpmaxsd H vpbroadcastbBroadcast Byte Integer vpbroadcastb I vpbroadcastb I vpbroadcastb I vpbroadcastb I vpbroadcastb I vpbroadcastb I vpbroadcastb I # vpbroadcastb I # vpbroadcastb I # vpbroadcastb I vpbroadcastb ! vpbroadcastb I vpbroadcastb ! # vpbroadcastb I # vpbroadcastb I vpbroadcastb ! vpbroadcastb I vpbroadcastb ! # vpbroadcastb I # vpbroadcastb I vpbroadcastb I vpbroadcastb I # kxord Bitwise Logical XOR 32-bit Maskskxord I pauseSpin Loop HintpausePAUSE subpd6Subtract Packed Double-Precision Floating-Point ValuessubpdSUBPD subpdSUBPD / vfnmsubsdQFused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values vfnmsubsd $ vfnmsubsd $ + vfnmsubsd $ + vmaxsd;Return Maximum Scalar Double-Precision Floating-Point Valuevmaxsd H vmaxsd H + vmaxsd vmaxsd H vmaxsd + vmaxsd H + vmaxsd H R vmaxsd H R vpmovsdwKDown Convert Packed Doubleword Values to Word Values with Signed Saturation vpmovsdw H vpmovsdw H, vpmovsdw H vpmovsdw H0 vpmovsdw H vpmovsdw H3 vpmovsdw H vpmovsdw H vpmovsdw H vpmovsdw H+ vpmovsdw H/ vpmovsdw H2 vfnmadd213ssLFused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values vfnmadd213ss H vfnmadd213ss H ' vfnmadd213ss # vfnmadd213ss H vfnmadd213ss # ' vfnmadd213ss H ' vfnmadd213ss H Q vfnmadd213ss H Q vcmppd5Compare Packed Double-Precision Floating-Point Valuesvcmppd H = vcmppd H = vcmppd H vcmppd H vcmppd H ? vcmppd H ? vcmppd H vcmppd H vcmppd H A vcmppd H A vcmppd H vcmppd H vcmppd vcmppd / vcmppd vcmppd 2 vcmppd H R vcmppd H R vscalefph[Scale Packed Half-Precision Floating-Point Values With Half-Precision Floating-Point Values vscalefph K < vscalefph K vscalefph K > vscalefph K vscalefph R @ vscalefph R vscalefph K < vscalefph K vscalefph K > vscalefph K vscalefph R @ vscalefph R vscalefph R Q vscalefph R Q
vshufi64x2.Shuffle 128-Bit Packed Quadword Integer Values
vshufi64x2 H ?
vshufi64x2 H
vshufi64x2 H A
vshufi64x2 H
vshufi64x2 H ?
vshufi64x2 H
vshufi64x2 H A
vshufi64x2 H roundsd3Round Scalar Double Precision Floating-Point Valuesroundsd roundsd + vpbroadcastqBroadcast Quadword Integer vpbroadcastq H vpbroadcastq H vpbroadcastq H vpbroadcastq H + vpbroadcastq H + vpbroadcastq H + vpbroadcastq ! vpbroadcastq H vpbroadcastq ! + vpbroadcastq H + vpbroadcastq ! vpbroadcastq H vpbroadcastq ! + vpbroadcastq H + vpbroadcastq H vpbroadcastq H + vfnmsubpdQFused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values vfnmsubpd $ vfnmsubpd $ / vfnmsubpd $ / vfnmsubpd $ vfnmsubpd $ 2 vfnmsubpd $ 2 vphadduwd1Packed Horizontal Add Unsigned Word to Doubleword vphadduwd " vphadduwd " / psubsb;Subtract Packed Signed Byte Integers with Signed SaturationpsubsbPSUBSB psubsbPSUBSB + psubsbPSUBSB psubsbPSUBSB / cvtpi2pdBConvert Packed Dword Integers to Packed Double-Precision FP Valuescvtpi2pdCVTPL2PD cvtpi2pdCVTPL2PD + pmovsxwqBMove Packed Word Integers to Quadword Integers with Sign Extensionpmovsxwq pmovsxwq ' punpckldq:Unpack and Interleave Low-Order Doublewords into Quadwords punpckldq punpckldq ' punpckldq punpckldq / adcx9Unsigned Integer Addition of Two Operands with Carry Flagadcxl 7 adcxl 7 ' pmulld?Multiply Packed Signed Doubleword Integers and Store Low Resultpmulld pmulld / vinsertf128#Insert Packed Floating-Point Values vinsertf128 vinsertf128 / vpackssdw2Pack Doublewords into Words with Signed Saturation vpackssdw I 9 vpackssdw I vpackssdw I : vpackssdw I vpackssdw I ; vpackssdw I vpackssdw I 9 vpackssdw vpackssdw I vpackssdw / vpackssdw I : vpackssdw ! vpackssdw I vpackssdw ! 2 vpackssdw I ; vpackssdw I vpermt2q=Full Permute of Quadwords From Two Tables Overwriting a Table vpermt2q H = vpermt2q H vpermt2q H ? vpermt2q H vpermt2q H A vpermt2q H vpermt2q H = vpermt2q H vpermt2q H ? vpermt2q H vpermt2q H A vpermt2q H btrBit Test and ResetbtrwBTRW btrwBTRW btrlBTRL btrlBTRL btrwBTRW $ btrwBTRW $ btrlBTRL ' btrlBTRL ' vrcp28pstApproximation to the Reciprocal of Packed Single-Precision Floating-Point Values with Less Than 2^-28 Relative Errorvrcp28ps M ; vrcp28ps M vrcp28ps M ; vrcp28ps M vrcp28ps M R vrcp28ps M R pcmpistri4Packed Compare Implicit Length Strings, Return Index pcmpistri pcmpistri /
vcvtudq2phZConvert Packed Unsigned Doubleword Integers to Packed Half-Precision Floating-Point Values vcvtudq2phx K 9 vcvtudq2phy K :
vcvtudq2ph R ; vcvtudq2phx K vcvtudq2phy K
vcvtudq2ph R vcvtudq2phx K 9 vcvtudq2phy K : vcvtudq2phx K vcvtudq2phy K
vcvtudq2ph R ;
vcvtudq2ph R
vcvtudq2ph R Q
vcvtudq2ph R Q vpmovm2w4Expand Bits of Mask Register to Packed Word Integersvpmovm2w I vpmovm2w I vpmovm2w I packusdw4Pack Doublewords into Words with Unsigned Saturationpackusdw packusdw / aam ASCII Adjust AX After MultiplyaamAAM aamAAM vphaddd(Packed Horizontal Add Doubleword Integervphaddd vphaddd / vphaddd ! vphaddd ! 2 movntssKStore Scalar Single-Precision Floating-Point Values Using Non-Temporal Hintmovntss ' vpmacssddQPacked Multiply Accumulate with Saturation Signed Doubleword to Signed Doubleword vpmacssdd " vpmacssdd " / pcmpestri4Packed Compare Explicit Length Strings, Return Index
pcmpestril
pcmpestril / vunpckhpdHUnpack and Interleave High Packed Double-Precision Floating-Point Values vunpckhpd H = vunpckhpd H vunpckhpd H ? vunpckhpd H vunpckhpd H A vunpckhpd H vunpckhpd H = vunpckhpd vunpckhpd H vunpckhpd / vunpckhpd H ? vunpckhpd vunpckhpd H vunpckhpd 2 vunpckhpd H A vunpckhpd H pmullw9Multiply Packed Signed Word Integers and Store Low Resultpmullw pmullw + pmullw pmullw / rdpru$Read Processor Register in User moderdpru . vfnmadd231phJFused Negative Multiply-Add of Packed Half-Precision Floating-Point Values vfnmadd231ph K < vfnmadd231ph K vfnmadd231ph K > vfnmadd231ph K vfnmadd231ph R @ vfnmadd231ph R vfnmadd231ph K < vfnmadd231ph K vfnmadd231ph K > vfnmadd231ph K vfnmadd231ph R @ vfnmadd231ph R vfnmadd231ph R Q vfnmadd231ph R Q vpblendmq.Blend Quadword Vectors Using an OpMask Control vpblendmq H = vpblendmq H vpblendmq H ? vpblendmq H vpblendmq H A vpblendmq H vpblendmq H = vpblendmq H vpblendmq H ? vpblendmq H vpblendmq H A vpblendmq H vpdpwssdsVPacked Dot Product of Signed-by-Signed Word subvectors into Doubleword with Saturation vpdpwssds K 9 vpdpwssds K vpdpwssds K : vpdpwssds K vpdpwssds V ; vpdpwssds V vpdpwssds K 9 vpdpwssds W vpdpwssds K vpdpwssds W / vpdpwssds K : vpdpwssds W vpdpwssds K vpdpwssds W 2 vpdpwssds V ; vpdpwssds V
vpunpckldq:Unpack and Interleave Low-Order Doublewords into Quadwords
vpunpckldq H 9
vpunpckldq H
vpunpckldq H :
vpunpckldq H
vpunpckldq H ;
vpunpckldq H
vpunpckldq H 9
vpunpckldq
vpunpckldq H
vpunpckldq /
vpunpckldq H :
vpunpckldq !
vpunpckldq H
vpunpckldq ! 2
vpunpckldq H ;
vpunpckldq H vscalefsd_Scale Scalar Double-Precision Floating-Point Value With a Double-Precision Floating-Point Value vscalefsd H vscalefsd H + vscalefsd H vscalefsd H + vscalefsd H Q vscalefsd H Q
vmaskmovps>Conditional Move Packed Single-Precision Floating-Point Values
vmaskmovps /
vmaskmovps 2
vmaskmovps /
vmaskmovps 2 vpmultishiftqb3Select Packed Unaligned Bytes from Quadword Sources vpmultishiftqb K = vpmultishiftqb K vpmultishiftqb K ? vpmultishiftqb K vpmultishiftqb T A vpmultishiftqb T vpmultishiftqb K = vpmultishiftqb K vpmultishiftqb K ? vpmultishiftqb K vpmultishiftqb T A vpmultishiftqb T vfnmadd231pdLFused Negative Multiply-Add of Packed Double-Precision Floating-Point Values vfnmadd231pd H = vfnmadd231pd H vfnmadd231pd H ? vfnmadd231pd H vfnmadd231pd H A vfnmadd231pd H vfnmadd231pd H = vfnmadd231pd # vfnmadd231pd H vfnmadd231pd # / vfnmadd231pd H ? vfnmadd231pd # vfnmadd231pd H vfnmadd231pd # 2 vfnmadd231pd H A vfnmadd231pd H vfnmadd231pd H Q vfnmadd231pd H Q setpo Set byte if parity odd (PF == 0)setpoSETPC setpoSETPC # vpextrdExtract Doublewordvpextrd vpextrd J vpextrd ' vpextrd J' vpermqPermute Quadword Integersvpermq H ? vpermq H A vpermq H ? vpermq H vpermq H vpermq H A vpermq H vpermq H vpermq H ? vpermq H ? vpermq ! vpermq H vpermq H vpermq ! 2 vpermq H A vpermq H A vpermq H vpermq H vdivph2Divide Packed Half-Precision Floating-Point Valuesvdivph K < vdivph K vdivph K > vdivph K vdivph R @ vdivph R vdivph K < vdivph K vdivph K > vdivph K vdivph R @ vdivph R vdivph R Q vdivph R Q vfnmsub231ssQFused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values vfnmsub231ss H vfnmsub231ss H ' vfnmsub231ss # vfnmsub231ss H vfnmsub231ss # ' vfnmsub231ss H ' vfnmsub231ss H Q vfnmsub231ss H Q vpextrw Extract Wordvpextrw vpextrw I vpextrw $ vpextrw I$ vfmsub213ssHFused Multiply-Subtract of Scalar Single-Precision Floating-Point Values vfmsub213ss H vfmsub213ss H ' vfmsub213ss # vfmsub213ss H vfmsub213ss # ' vfmsub213ss H ' vfmsub213ss H Q vfmsub213ss H Q
vpgatherqd=Gather Packed Doubleword Values Using Signed Quadword Indices
vpgatherqd H D
vpgatherqd H H
vpgatherqd H L
vpgatherqd ! D
vpgatherqd ! H vfmulcphKFused Fused Multiply of Complex Packed Half-Precision Floating-Point Valuesvfmulcph K 9 vfmulcph K vfmulcph K : vfmulcph K vfmulcph R ; vfmulcph R vfmulcph K 9 vfmulcph K vfmulcph K : vfmulcph K vfmulcph R ; vfmulcph R vfmulcph R Q vfmulcph R Q pandn Packed Bitwise Logical AND NOTpandn pandn + pandn pandn / vldmxcsrLoad MXCSR Registervldmxcsr ' movntq)Store of Quadword Using Non-Temporal Hintmovntq
+ kandq Bitwise Logical AND 64-bit Maskskandq I pmovzxdqHMove Packed Doubleword Integers to Quadword Integers with Zero Extensionpmovzxdq pmovzxdq + vpinsrw Insert Wordvpinsrw vpinsrw I vpinsrw $ vpinsrw I $ vpmacswd;Packed Multiply Accumulate Signed Word to Signed Doublewordvpmacswd " vpmacswd " / ktestb"Bit Test 8-bit Masks and Set Flagsktestb J btsBit Test and SetbtswBTSW btswBTSW btslBTSL btslBTSL btswBTSW $ btswBTSW $ btslBTSL ' btslBTSL ' vpermi2b;Full Permute of Bytes From Two Tables Overwriting the Index vpermi2b T vpermi2b T / vpermi2b T vpermi2b T 2 vpermi2b T vpermi2b T 5 vpermi2b T vpermi2b T / vpermi2b T vpermi2b T 2 vpermi2b T vpermi2b T 5 vscalefss_Scale Scalar Single-Precision Floating-Point Value With a Single-Precision Floating-Point Value vscalefss H vscalefss H ' vscalefss H vscalefss H ' vscalefss H Q vscalefss H Q vdivps4Divide Packed Single-Precision Floating-Point Valuesvdivps H 9 vdivps H vdivps H : vdivps H vdivps H ; vdivps H vdivps H 9 vdivps vdivps H vdivps / vdivps H : vdivps vdivps H vdivps 2 vdivps H ; vdivps H vdivps H Q vdivps H Q pshuflwShuffle Packed Low WordspshuflwPSHUFLW pshuflwPSHUFLW / movdqa Move Aligned Double QuadwordmovdqaMOVO movdqaMOVO / movdqaMOVO /
vpcmpestri4Packed Compare Explicit Length Strings, Return Index vpcmpestril vpcmpestril / addAddaddbADDB addbADDB addbADDB addbADDB # addwADDW addwADDW addwADDW addwADDW addwADDW $ addlADDL addlADDL addlADDL addlADDL addlADDL ' addbADDB # addbADDB # addwADDW $ addwADDW $ addwADDW $ addlADDL ' addlADDL ' addlADDL ' vfnmsub213ssQFused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values vfnmsub213ss H vfnmsub213ss H ' vfnmsub213ss # vfnmsub213ss H vfnmsub213ss # ' vfnmsub213ss H ' vfnmsub213ss H Q vfnmsub213ss H Q vfnmsub132psQFused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values vfnmsub132ps H 9 vfnmsub132ps H vfnmsub132ps H : vfnmsub132ps H vfnmsub132ps H ; vfnmsub132ps H vfnmsub132ps H 9 vfnmsub132ps # vfnmsub132ps H vfnmsub132ps # / vfnmsub132ps H : vfnmsub132ps # vfnmsub132ps H vfnmsub132ps # 2 vfnmsub132ps H ; vfnmsub132ps H vfnmsub132ps H Q vfnmsub132ps H Q knotwNOT 16-bit Mask Registerknotw H vlddqu Load Unaligned Integer 128 Bitsvlddqu / vlddqu 2 vmovsldup'Move Packed Single-FP Low and Duplicate vmovsldup H vmovsldup H vmovsldup H vmovsldup H / vmovsldup H 2 vmovsldup H 5 vmovsldup vmovsldup H vmovsldup / vmovsldup H / vmovsldup vmovsldup H vmovsldup 2 vmovsldup H 2 vmovsldup H vmovsldup H 5 movhpd6Move High Packed Double-Precision Floating-Point ValuemovhpdMOVHPD + movhpdMOVHPD + vaddph/Add Packed Half-Precision Floating-Point Valuesvaddph K < vaddph K vaddph K > vaddph K vaddph R @ vaddph R vaddph K < vaddph K vaddph K > vaddph K vaddph R @ vaddph R vaddph R Q vaddph R Q cmovnbMove if not below (CF == 0)cmovnbw cmovnbw $ cmovnbl cmovnbl ' kord Bitwise Logical OR 32-bit Maskskord I sha1rnds4%Perform Four Rounds of SHA1 Operation sha1rnds4 ( sha1rnds4 ( / vfnmsub132sdQFused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values vfnmsub132sd H vfnmsub132sd H + vfnmsub132sd # vfnmsub132sd H vfnmsub132sd # + vfnmsub132sd H + vfnmsub132sd H Q vfnmsub132sd H Q aaddAtomically ADDaadd ' vdbpsadbw>Double Block Packed Sum-Absolute-Differences on Unsigned Bytes vdbpsadbw I vdbpsadbw I / vdbpsadbw I vdbpsadbw I 2 vdbpsadbw I vdbpsadbw I 5 vdbpsadbw I vdbpsadbw I / vdbpsadbw I vdbpsadbw I 2 vdbpsadbw I vdbpsadbw I 5 sha1msg1NPerform an Intermediate Calculation for the Next Four SHA1 Message Doublewordssha1msg1 ( sha1msg1 ( / vsubps6Subtract Packed Single-Precision Floating-Point Valuesvsubps H 9 vsubps H vsubps H : vsubps H vsubps H ; vsubps H vsubps H 9 vsubps vsubps H vsubps / vsubps H : vsubps vsubps H vsubps 2 vsubps H ; vsubps H vsubps H Q vsubps H Q andnpdHBitwise Logical AND NOT of Packed Double-Precision Floating-Point ValuesandnpdANDNPD andnpdANDNPD / pinsrdInsert DoublewordpinsrdPINSRD pinsrdPINSRD ' vfmaddpsCFused Multiply-Add of Packed Single-Precision Floating-Point Valuesvfmaddps $ vfmaddps $ / vfmaddps $ / vfmaddps $ vfmaddps $ 2 vfmaddps $ 2 vcvtph2wQConvert Packed Half-Precision Floating-Point Values to Packed Word Integer Valuesvcvtph2w K < vcvtph2w K > vcvtph2w R @ vcvtph2w K vcvtph2w K vcvtph2w R vcvtph2w K < vcvtph2w K vcvtph2w K > vcvtph2w K vcvtph2w R @ vcvtph2w R vcvtph2w R Q vcvtph2w R Q
vfpclasssd:Test Class of Scalar Double-Precision Floating-Point Value
vfpclasssd J
vfpclasssd J
vfpclasssd J +
vfpclasssd J +
vgatherpf1qpsmSparse Prefetch Packed Single-Precision Floating-Point Data Values with Signed Quadword Indices Using T1 Hint
vgatherpf1qps LM sha1msg2FPerform a Final Calculation for the Next Four SHA1 Message Doublewordssha1msg2 ( sha1msg2 ( / and Logical ANDandbANDB andbANDB andbANDB andbANDB # andwANDW andwANDW andwANDW andwANDW andwANDW $ andlANDL andlANDL andlANDL andlANDL andlANDL ' andbANDB # andbANDB # andwANDW $ andwANDW $ andwANDW $ andlANDL ' andlANDL ' andlANDL ' jncJump if not carry (CF == 0)jncJCC N jncJCC O pxor#Packed Bitwise Logical Exclusive ORpxorPXOR pxorPXOR + pxorPXOR pxorPXOR / unpcklpdGUnpack and Interleave Low Packed Double-Precision Floating-Point ValuesunpcklpdUNPCKLPD unpcklpdUNPCKLPD / paddsw6Add Packed Signed Word Integers with Signed Saturationpaddsw paddsw + paddsw paddsw / mcommit
Memory COMMITmcommit > aandAtomically ANDaand ' vfnmsub213sdQFused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values vfnmsub213sd H vfnmsub213sd H + vfnmsub213sd # vfnmsub213sd H vfnmsub213sd # + vfnmsub213sd H + vfnmsub213sd H Q vfnmsub213sd H Q pfrsqrt:Packed Floating-Point Reciprocal Square Root Approximationpfrsqrt pfrsqrt + vmaxpd<Return Maximum Packed Double-Precision Floating-Point Valuesvmaxpd H = vmaxpd H vmaxpd H ? vmaxpd H vmaxpd H A vmaxpd H vmaxpd H = vmaxpd vmaxpd H vmaxpd / vmaxpd H ? vmaxpd vmaxpd H vmaxpd 2 vmaxpd H A vmaxpd H vmaxpd H R vmaxpd H R cvtpd2piBConvert Packed Double-Precision FP Values to Packed Dword Integerscvtpd2piCVTPD2PL cvtpd2piCVTPD2PL / vfmadd231phAFused Multiply-Add of Packed Half-Precision Floating-Point Values vfmadd231ph K < vfmadd231ph K vfmadd231ph K > vfmadd231ph K vfmadd231ph R @ vfmadd231ph R vfmadd231ph K < vfmadd231ph K vfmadd231ph K > vfmadd231ph K vfmadd231ph R @ vfmadd231ph R vfmadd231ph R Q vfmadd231ph R Q vsm3rnds2#Perform Two Rounds of SM3 Operation vsm3rnds2 vsm3rnds2 / cmovnp Move if not parity (PF == 0)cmovnpw cmovnpw $ cmovnpl cmovnpl ' vpsravq4Variable Shift Packed Quadword Data Right Arithmetic vpsravq H = vpsravq H vpsravq H ? vpsravq H vpsravq H A vpsravq H vpsravq H = vpsravq H vpsravq H ? vpsravq H vpsravq H A vpsravq H
vcvttps2dqRConvert with Truncation Packed Single-Precision FP Values to Packed Dword Integers
vcvttps2dq H 9
vcvttps2dq H :
vcvttps2dq H ;
vcvttps2dq H
vcvttps2dq H
vcvttps2dq H
vcvttps2dq H 9
vcvttps2dq
vcvttps2dq H
vcvttps2dq /
vcvttps2dq H :
vcvttps2dq
vcvttps2dq H
vcvttps2dq 2
vcvttps2dq H ;
vcvttps2dq H
vcvttps2dq H R
vcvttps2dq H R
vcvtuqq2phXConvert Packed Unsigned Quadword Integers to Packed Half-Precision Floating-Point Values vcvtuqq2phx K = vcvtuqq2phy K ? vcvtuqq2phz R A vcvtuqq2phx K vcvtuqq2phy K vcvtuqq2phz R vcvtuqq2phx K = vcvtuqq2phy K ? vcvtuqq2phz R A vcvtuqq2phx K vcvtuqq2phy K vcvtuqq2phz R vcvtuqq2phz R Q vcvtuqq2phz R Q vmovupd<Move Unaligned Packed Double-Precision Floating-Point Valuesvmovupd H0 vmovupd H vmovupd H3 vmovupd H vmovupd H6 vmovupd H vmovupd H / vmovupd H 2 vmovupd H 5 vmovupd vmovupd H vmovupd / vmovupd H / vmovupd vmovupd H vmovupd 2 vmovupd H 2 vmovupd H vmovupd H 5 vmovupd / vmovupd H/ vmovupd 2 vmovupd H2 vmovupd H5 vcvtps2pdNConvert Packed Single-Precision FP Values to Packed Double-Precision FP Values vcvtps2pd H 8 vcvtps2pd K 9 vcvtps2pd H : vcvtps2pd H vcvtps2pd K vcvtps2pd H vcvtps2pd H 8 vcvtps2pd vcvtps2pd H vcvtps2pd + vcvtps2pd K 9 vcvtps2pd vcvtps2pd K vcvtps2pd / vcvtps2pd H : vcvtps2pd H vcvtps2pd H R vcvtps2pd H R setng-Set byte if not greater (ZF == 1 or SF != OF)setngSETLE setngSETLE # setnc Set byte if not carry (CF == 0)setncSETCC setncSETCC # vfmadd231psCFused Multiply-Add of Packed Single-Precision Floating-Point Values vfmadd231ps H 9 vfmadd231ps H vfmadd231ps H : vfmadd231ps H vfmadd231ps H ; vfmadd231ps H vfmadd231ps H 9 vfmadd231ps # vfmadd231ps H vfmadd231ps # / vfmadd231ps H : vfmadd231ps # vfmadd231ps H vfmadd231ps # 2 vfmadd231ps H ; vfmadd231ps H vfmadd231ps H Q vfmadd231ps H Q pextrb Extract Bytepextrb pextrb # vmovaps:Move Aligned Packed Single-Precision Floating-Point Valuesvmovaps H0 vmovaps H vmovaps H3 vmovaps H vmovaps H6 vmovaps H vmovaps H / vmovaps H 2 vmovaps H 5 vmovaps vmovaps H vmovaps / vmovaps H / vmovaps vmovaps H vmovaps 2 vmovaps H 2 vmovaps H vmovaps H 5 vmovaps / vmovaps H/ vmovaps 2 vmovaps H2 vmovaps H5 vrangepsXRange Restriction Calculation For Packed Pairs of Single-Precision Floating-Point Valuesvrangeps J 9 vrangeps J vrangeps J : vrangeps J vrangeps J ; vrangeps J vrangeps J 9 vrangeps J vrangeps J : vrangeps J vrangeps J ; vrangeps J vrangeps J R vrangeps J R vblendmpsLBlend Packed Single-Precision Floating-Point Vectors Using an OpMask Control vblendmps H 9 vblendmps H vblendmps H : vblendmps H vblendmps H ; vblendmps H vblendmps H 9 vblendmps H vblendmps H : vblendmps H vblendmps H ; vblendmps H vpshrdq8Concatenate and Shift Packed Quadword Data Right Logical vpshrdq K = vpshrdq K vpshrdq K ? vpshrdq K vpshrdq U A vpshrdq U vpshrdq K = vpshrdq K vpshrdq K ? vpshrdq K vpshrdq U A vpshrdq U vprolvd&Variable Rotate Packed Doubleword Left vprolvd H 9 vprolvd H vprolvd H : vprolvd H vprolvd H ; vprolvd H vprolvd H 9 vprolvd H vprolvd H : vprolvd H vprolvd H ; vprolvd H vminss;Return Minimum Scalar Single-Precision Floating-Point Valuevminss H vminss H ' vminss vminss H vminss ' vminss H ' vminss H R vminss H R vcmpps5Compare Packed Single-Precision Floating-Point Valuesvcmpps H 9 vcmpps H 9 vcmpps H vcmpps H vcmpps H : vcmpps H : vcmpps H vcmpps H vcmpps H ; vcmpps H ; vcmpps H vcmpps H vcmpps vcmpps / vcmpps vcmpps 2 vcmpps H R vcmpps H R
vpternlogq4Bitwise Ternary Logical Operation on Quadword Values
vpternlogq H =
vpternlogq H
vpternlogq H ?
vpternlogq H
vpternlogq H A
vpternlogq H
vpternlogq H =
vpternlogq H
vpternlogq H ?
vpternlogq H
vpternlogq H A
vpternlogq H pminsb&Minimum of Packed Signed Byte Integerspminsb pminsb / setcSet byte if carry (CF == 1)setcSETCS setcSETCS # vcvtpd2psNConvert Packed Double-Precision FP Values to Packed Single-Precision FP Values
vcvtpd2psx H =
vcvtpd2psy H ? vcvtpd2ps H A
vcvtpd2psx H
vcvtpd2psy H vcvtpd2ps H
vcvtpd2psx H =
vcvtpd2psy H ?
vcvtpd2psx
vcvtpd2psx H
vcvtpd2psy
vcvtpd2psy H
vcvtpd2psx /
vcvtpd2psy 2 vcvtpd2ps H A vcvtpd2ps H vcvtpd2ps H Q vcvtpd2ps H Q axorAtomically XORaxor ' insertq Insert Fieldinsertq insertq phsubswFPacked Horizontal Subtract Signed Word Integers with Signed Saturationphsubsw phsubsw + phsubsw phsubsw /
maskmovdqu'Store Selected Bytes of Double Quadword
maskmovdqu setbSet byte if below (CF == 1)setbSETCS setbSETCS # vaddpd1Add Packed Double-Precision Floating-Point Valuesvaddpd H = vaddpd H vaddpd H ? vaddpd H vaddpd H A vaddpd H vaddpd H = vaddpd vaddpd H vaddpd / vaddpd H ? vaddpd vaddpd H vaddpd 2 vaddpd H A vaddpd H vaddpd H Q vaddpd H Q vcvtpd2qqQConvert Packed Double-Precision Floating-Point Values to Packed Quadword Integers vcvtpd2qq J = vcvtpd2qq J ? vcvtpd2qq J A vcvtpd2qq J vcvtpd2qq J vcvtpd2qq J vcvtpd2qq J = vcvtpd2qq J vcvtpd2qq J ? vcvtpd2qq J vcvtpd2qq J A vcvtpd2qq J vcvtpd2qq J Q vcvtpd2qq J Q
vcvtph2udq`Convert Packed Half-Precision Floating-Point Values to Packed Unsigned Doubleword Integer Values
vcvtph2udq K .
vcvtph2udq K <
vcvtph2udq R >
vcvtph2udq K
vcvtph2udq K
vcvtph2udq R
vcvtph2udq K .
vcvtph2udq K
vcvtph2udq K <
vcvtph2udq K
vcvtph2udq R >
vcvtph2udq R
vcvtph2udq R Q
vcvtph2udq R Q
vfpclassps;Test Class of Packed Single-Precision Floating-Point Values vfpclasspsx J 9 vfpclasspsx J 9 vfpclasspsy J : vfpclasspsy J : vfpclasspsz J ; vfpclasspsz J ; vfpclasspsx J vfpclasspsx J vfpclasspsy J vfpclasspsy J vfpclasspsz J vfpclasspsz J
vgatherpf1qpdmSparse Prefetch Packed Double-Precision Floating-Point Data Values with Signed Quadword Indices Using T1 Hint
vgatherpf1qpd LM pmulhuw<Multiply Packed Unsigned Word Integers and Store High Resultpmulhuw
pmulhuw
+ pmulhuw pmulhuw / setsSet byte if sign (SF == 1)setsSETMI setsSETMI #
vfpclassph9Test Class of Packed Half-Precision Floating-Point Values vfpclassphx K < vfpclassphx K < vfpclassphy K > vfpclassphy K > vfpclassphz R @ vfpclassphz R @ vfpclassphx K vfpclassphx K vfpclassphy K vfpclassphy K vfpclassphz R vfpclassphz R
vcvttps2qqnConvert with Truncation Packed Single Precision Floating-Point Values to Packed Singed Quadword Integer Values
vcvttps2qq J 8
vcvttps2qq J 9
vcvttps2qq J :
vcvttps2qq J
vcvttps2qq J
vcvttps2qq J
vcvttps2qq J 8
vcvttps2qq J
vcvttps2qq J 9
vcvttps2qq J
vcvttps2qq J :
vcvttps2qq J
vcvttps2qq J R
vcvttps2qq J R vpconflictqUDetect Conflicts Within a Vector of Packed Quadword Values into Dense Memory/Register vpconflictq N = vpconflictq N ? vpconflictq N A vpconflictq N vpconflictq N vpconflictq N vpconflictq N = vpconflictq N vpconflictq N ? vpconflictq N vpconflictq N A vpconflictq N leaLoad Effective AddressleawLEAW " lealLEAL " monitor Monitor a Linear Address Rangemonitor D psraw'Shift Packed Word Data Right Arithmeticpsraw psraw psraw + psraw psraw psraw / vcvtdq2pdBConvert Packed Dword Integers to Packed Double-Precision FP Values vcvtdq2pd H 8 vcvtdq2pd H 9 vcvtdq2pd H : vcvtdq2pd H vcvtdq2pd H vcvtdq2pd H vcvtdq2pd H 8 vcvtdq2pd vcvtdq2pd H vcvtdq2pd + vcvtdq2pd H 9 vcvtdq2pd vcvtdq2pd H vcvtdq2pd / vcvtdq2pd H : vcvtdq2pd H vcvtph2dq@Convert Packed Half-Precision FP Values to Packed Dword Integers vcvtph2dq K . vcvtph2dq K < vcvtph2dq R > vcvtph2dq K vcvtph2dq K vcvtph2dq R vcvtph2dq K . vcvtph2dq K vcvtph2dq K < vcvtph2dq K vcvtph2dq R > vcvtph2dq R vcvtph2dq R Q vcvtph2dq R Q vpermi2w;Full Permute of Words From Two Tables Overwriting the Index vpermi2w I vpermi2w I / vpermi2w I vpermi2w I 2 vpermi2w I vpermi2w I 5 vpermi2w I vpermi2w I / vpermi2w I vpermi2w I 2 vpermi2w I vpermi2w I 5 cmpCompare Two OperandscmpbCMPB cmpbCMPB cmpbCMPB cmpbCMPB # cmpwCMPW cmpwCMPW cmpwCMPW cmpwCMPW cmpwCMPW $ cmplCMPL cmplCMPL cmplCMPL cmplCMPL cmplCMPL ' cmpbCMPB # cmpbCMPB # cmpwCMPW $ cmpwCMPW $ cmpwCMPW $ cmplCMPL ' cmplCMPL ' cmplCMPL ' vpminud.Minimum of Packed Unsigned Doubleword Integersvpminud H 9 vpminud H vpminud H : vpminud H vpminud H ; vpminud H vpminud H 9 vpminud vpminud H vpminud / vpminud H : vpminud ! vpminud H vpminud ! 2 vpminud H ; vpminud H psubusb?Subtract Packed Unsigned Byte Integers with Unsigned SaturationpsubusbPSUBUSB psubusbPSUBUSB + psubusbPSUBUSB psubusbPSUBUSB / cmovcMove if carry (CF == 1)cmovcw cmovcw $ cmovcl cmovcl ' lzcnt%Count the Number of Leading Zero Bitslzcntw 3 lzcntw 3 $ lzcntl 3 lzcntl 3 ' vhsubps$Packed Single-FP Horizontal Subtractvhsubps vhsubps / vhsubps vhsubps 2 vpdpwsudHPacked Dot Product of Signed-by-Unsigned Word subvectors into Doublewordvpdpwsud Y vpdpwsud Y / vpdpwsud Y vpdpwsud Y 2 movmskps8Extract Packed Single-Precision Floating-Point Sign MaskmovmskpsMOVMSKPS vphaddwd6Packed Horizontal Add Signed Word to Signed Doublewordvphaddwd " vphaddwd " / vpmovm2d:Expand Bits of Mask Register to Packed Doubleword Integersvpmovm2d J vpmovm2d J vpmovm2d J
vcvtps2uqq`Convert Packed Single Precision Floating-Point Values to Packed Unsigned Quadword Integer Values
vcvtps2uqq J 8
vcvtps2uqq J 9
vcvtps2uqq J :
vcvtps2uqq J
vcvtps2uqq J
vcvtps2uqq J
vcvtps2uqq J 8
vcvtps2uqq J
vcvtps2uqq J 9
vcvtps2uqq J
vcvtps2uqq J :
vcvtps2uqq J
vcvtps2uqq J Q
vcvtps2uqq J Q
vshuff64x2=Shuffle 128-Bit Packed Double-Precision Floating-Point Values
vshuff64x2 H ?
vshuff64x2 H
vshuff64x2 H A
vshuff64x2 H
vshuff64x2 H ?
vshuff64x2 H
vshuff64x2 H A
vshuff64x2 H cldemoteCache Line Demotecldemote 8# vbroadcasti128"Broadcast 128 Bits of Integer Datavbroadcasti128 ! /
vpcmpistri4Packed Compare Implicit Length Strings, Return Index
vpcmpistri
vpcmpistri / vmovups<Move Unaligned Packed Single-Precision Floating-Point Valuesvmovups H0 vmovups H vmovups H3 vmovups H vmovups H6 vmovups H vmovups H / vmovups H 2 vmovups H 5 vmovups vmovups H vmovups / vmovups H / vmovups vmovups H vmovups 2 vmovups H 2 vmovups H vmovups H 5 vmovups / vmovups H/ vmovups 2 vmovups H2 vmovups H5 vfnmsub213psQFused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values vfnmsub213ps H 9 vfnmsub213ps H vfnmsub213ps H : vfnmsub213ps H vfnmsub213ps H ; vfnmsub213ps H vfnmsub213ps H 9 vfnmsub213ps # vfnmsub213ps H vfnmsub213ps # / vfnmsub213ps H : vfnmsub213ps # vfnmsub213ps H vfnmsub213ps # 2 vfnmsub213ps H ; vfnmsub213ps H vfnmsub213ps H Q vfnmsub213ps H Q vpcomq'Compare Packed Signed Quadword Integersvpcomq " vpcomq " / vpextrb Extract Bytevpextrb vpextrb I vpextrb # vpextrb I# pavgusb Average Packed Byte Integerspavgusb pavgusb + vcvtps2dqBConvert Packed Single-Precision FP Values to Packed Dword Integers vcvtps2dq H 9 vcvtps2dq H : vcvtps2dq H ; vcvtps2dq H vcvtps2dq H vcvtps2dq H vcvtps2dq H 9 vcvtps2dq vcvtps2dq H vcvtps2dq / vcvtps2dq H : vcvtps2dq vcvtps2dq H vcvtps2dq 2 vcvtps2dq H ; vcvtps2dq H vcvtps2dq H Q vcvtps2dq H Q vpmovdwDDown Convert Packed Doubleword Values to Word Values with Truncation vpmovdw H vpmovdw H, vpmovdw H vpmovdw H0 vpmovdw H vpmovdw H3 vpmovdw H vpmovdw H vpmovdw H vpmovdw H+ vpmovdw H/ vpmovdw H2 vpaddsb6Add Packed Signed Byte Integers with Signed Saturationvpaddsb I vpaddsb I / vpaddsb I vpaddsb I 2 vpaddsb I vpaddsb I 5 vpaddsb vpaddsb I vpaddsb / vpaddsb I / vpaddsb ! vpaddsb I vpaddsb ! 2 vpaddsb I 2 vpaddsb I vpaddsb I 5 cmovbe+Move if below or equal (CF == 1 or ZF == 1)cmovbew cmovbew $ cmovbel cmovbel '
vextractf64x4AExtract 256 Bits of Packed Double-Precision Floating-Point Values
vextractf64x4 H
vextractf64x4 H3
vextractf64x4 H
vextractf64x4 H2 vxorps>Bitwise Logical XOR for Single-Precision Floating-Point Valuesvxorps J 9 vxorps J vxorps J : vxorps J vxorps J ; vxorps J vxorps J 9 vxorps vxorps J vxorps / vxorps J : vxorps vxorps J vxorps 2 vxorps J ; vxorps J pmuludq,Multiply Packed Unsigned Doubleword Integerspmuludq pmuludq + pmuludq pmuludq / vcvttph2uqqnConvert with Truncation Packed Half Precision Floating-Point Values to Packed Unsigned Quadword Integer Values vcvttph2uqq K * vcvttph2uqq K . vcvttph2uqq R < vcvttph2uqq K vcvttph2uqq K vcvttph2uqq R vcvttph2uqq K * vcvttph2uqq K vcvttph2uqq K . vcvttph2uqq K vcvttph2uqq R < vcvttph2uqq R vcvttph2uqq R R vcvttph2uqq R R vpsrlw$Shift Packed Word Data Right Logical vpsrlw I vpsrlw I vpsrlw I / vpsrlw I vpsrlw I vpsrlw I / vpsrlw I vpsrlw I vpsrlw I / vpsrlw I / vpsrlw I 2 vpsrlw I 5 vpsrlw vpsrlw I vpsrlw vpsrlw I vpsrlw / vpsrlw I / vpsrlw I / vpsrlw ! vpsrlw I vpsrlw ! vpsrlw I vpsrlw ! / vpsrlw I / vpsrlw I 2 vpsrlw I vpsrlw I vpsrlw I / vpsrlw I 5 vpdpbusdsXPacked Dot Product of Unsigned-by-Singed Byte subvectors into Doubleword with Saturation vpdpbusds K 9 vpdpbusds K vpdpbusds K : vpdpbusds K vpdpbusds V ; vpdpbusds V vpdpbusds K 9 vpdpbusds W vpdpbusds K vpdpbusds W / vpdpbusds K : vpdpbusds W vpdpbusds K vpdpbusds W 2 vpdpbusds V ; vpdpbusds V endbr32%END (terminate) BRanch in 32-bit modeendbr32 addps1Add Packed Single-Precision Floating-Point ValuesaddpsADDPS addpsADDPS / vtestpd/Packed Double-Precision Floating-Point Bit Testvtestpd vtestpd / vtestpd vtestpd 2 kshiftrwShift Right 16-bit Maskskshiftrw H vpsrlq(Shift Packed Quadword Data Right Logical vpsrlq H = vpsrlq H ? vpsrlq H A vpsrlq H vpsrlq H vpsrlq H / vpsrlq H vpsrlq H vpsrlq H / vpsrlq H vpsrlq H vpsrlq H / vpsrlq H = vpsrlq vpsrlq H vpsrlq vpsrlq H vpsrlq / vpsrlq H / vpsrlq H ? vpsrlq ! vpsrlq H vpsrlq ! vpsrlq H vpsrlq ! / vpsrlq H / vpsrlq H A vpsrlq H vpsrlq H vpsrlq H / pcmpgtb4Compare Packed Signed Byte Integers for Greater Thanpcmpgtb pcmpgtb + pcmpgtb pcmpgtb / vfmadd132psCFused Multiply-Add of Packed Single-Precision Floating-Point Values vfmadd132ps H 9 vfmadd132ps H vfmadd132ps H : vfmadd132ps H vfmadd132ps H ; vfmadd132ps H vfmadd132ps H 9 vfmadd132ps # vfmadd132ps H vfmadd132ps # / vfmadd132ps H : vfmadd132ps # vfmadd132ps H vfmadd132ps # 2 vfmadd132ps H ; vfmadd132ps H vfmadd132ps H Q vfmadd132ps H Q vpandPacked Bitwise Logical ANDvpand vpand / vpand ! vpand ! 2
vcvtuqq2psZConvert Packed Unsigned Quadword Integers to Packed Single-Precision Floating-Point Values vcvtuqq2psx J = vcvtuqq2psy J ?
vcvtuqq2ps J A vcvtuqq2psx J vcvtuqq2psy J
vcvtuqq2ps J vcvtuqq2psx J = vcvtuqq2psy J ? vcvtuqq2psx J vcvtuqq2psy J
vcvtuqq2ps J A
vcvtuqq2ps J
vcvtuqq2ps J Q
vcvtuqq2ps J Q vsha512msg1NPerform an Intermediate Calculation for the Next Four SHA512 Message Quadwords vsha512msg1 ) unpcklpsGUnpack and Interleave Low Packed Single-Precision Floating-Point ValuesunpcklpsUNPCKLPS unpcklpsUNPCKLPS / vfnmsub231shOFused Negative Multiply-Subtract of Scalar Half-Precision Floating-Point Values vfnmsub231sh R vfnmsub231sh R $ vfnmsub231sh R vfnmsub231sh R $ vfnmsub231sh R Q vfnmsub231sh R Q vpmacsswwEPacked Multiply Accumulate with Saturation Signed Word to Signed Word vpmacssww " vpmacssww " / vextracti128 Extract Packed Integer Values vextracti128 ! vextracti128 !/ rcl Rotate Left through Carry FlagrclbRCLB rclbRCLB rclbRCLB rclwRCLW rclwRCLW rclwRCLW rcllRCLL rcllRCLL rcllRCLL rclbRCLB # rclbRCLB # rclbRCLB # rclwRCLW $ rclwRCLW $ rclwRCLW $ rcllRCLL ' rcllRCLL ' rcllRCLL ' blcfillFill From Lowest Clear Bitblcfill 6 blcfill 6 ' vmovhps7Move High Packed Single-Precision Floating-Point Valuesvmovhps + vmovhps H+ vmovhps + vmovhps H + kandnb#Bitwise Logical AND NOT 8-bit Maskskandnb J cmovnae$Move if not above or equal (CF == 1)cmovnaew cmovnaew $ cmovnael cmovnael ' kmovqMove 64-bit Maskkmovq I kmovq I + kmovq I+ cmpxchg8b Compare and Exchange 8 Bytes cmpxchg8b CMPXCHG8B + decDecrement by 1decbDECB decwDECW declDECL decbDECB # decwDECW $ declDECL ' int3Interrupt 3 (debug trap)int3 punpckhdq;Unpack and Interleave High-Order Doublewords into Quadwords punpckhdq punpckhdq + punpckhdq punpckhdq / pmovsxbdDMove Packed Byte Integers to Doubleword Integers with Sign Extensionpmovsxbd pmovsxbd ' vmovdqa64 Move Aligned Quadword Values vmovdqa64 H0 vmovdqa64 H vmovdqa64 H3 vmovdqa64 H vmovdqa64 H6 vmovdqa64 H vmovdqa64 H / vmovdqa64 H 2 vmovdqa64 H 5 vmovdqa64 H vmovdqa64 H / vmovdqa64 H vmovdqa64 H 2 vmovdqa64 H vmovdqa64 H 5 vmovdqa64 H/ vmovdqa64 H2 vmovdqa64 H5 vpandd1Bitwise Logical AND of Packed Doubleword Integers vpandd H 9 vpandd H vpandd H : vpandd H vpandd H ; vpandd H vpandd H 9 vpandd H vpandd H : vpandd H vpandd H ; vpandd H vphadduwq/Packed Horizontal Add Unsigned Word to Quadword vphadduwq " vphadduwq " / vpmovzxbqBMove Packed Byte Integers to Quadword Integers with Zero Extension vpmovzxbq H vpmovzxbq H vpmovzxbq H vpmovzxbq H $ vpmovzxbq H ' vpmovzxbq H + vpmovzxbq vpmovzxbq H vpmovzxbq $ vpmovzxbq H $ vpmovzxbq ! vpmovzxbq H vpmovzxbq ! ' vpmovzxbq H ' vpmovzxbq H vpmovzxbq H + blendps4 Blend Packed Single Precision Floating-Point Valuesblendps blendps / vpshufbPacked Shuffle Bytesvpshufb I vpshufb I / vpshufb I vpshufb I 2 vpshufb I vpshufb I 5 vpshufb vpshufb I vpshufb / vpshufb I / vpshufb ! vpshufb I vpshufb ! 2 vpshufb I 2 vpshufb I vpshufb I 5 vcvttss2usiXConvert with Truncation Scalar Single-Precision Floating-Point Value to Unsigned Integer vcvttss2usi H vcvttss2usi H ' vcvttss2usi H R vgetexpphhExtract Exponents of Packed Half-Precision Floating-Point Values as Half-Precision Floating-Point Values vgetexpph K < vgetexpph K > vgetexpph R @ vgetexpph K vgetexpph K vgetexpph R vgetexpph K < vgetexpph K vgetexpph K > vgetexpph K vgetexpph R @ vgetexpph R vgetexpph R R vgetexpph R R vinserti32x83Insert 256 Bits of Packed Doubleword Integer Values vinserti32x8 J vinserti32x8 J 2 vinserti32x8 J vinserti32x8 J 2 vphsubwd;Packed Horizontal Subtract Signed Word to Signed Doublewordvphsubwd " vphsubwd " / vpord0Bitwise Logical OR of Packed Doubleword Integers vpord H 9 vpord H vpord H : vpord H vpord H ; vpord H vpord H 9 vpord H vpord H : vpord H vpord H ; vpord H cvttss2siIConvert with Truncation Scalar Single-Precision FP Value to Dword Integer cvttss2si CVTTSS2SL cvttss2si CVTTSS2SL ' vpmovzxwdDMove Packed Word Integers to Doubleword Integers with Zero Extension vpmovzxwd H vpmovzxwd H vpmovzxwd H vpmovzxwd H + vpmovzxwd H / vpmovzxwd H 2 vpmovzxwd vpmovzxwd H vpmovzxwd + vpmovzxwd H + vpmovzxwd ! vpmovzxwd H vpmovzxwd ! / vpmovzxwd H / vpmovzxwd H vpmovzxwd H 2 cmovae Move if above or equal (CF == 0)cmovaew cmovaew $ cmovael cmovael ' adox<Unsigned Integer Addition of Two Operands with Overflow Flagadoxl 7 adoxl 7 ' pcmpgtd:Compare Packed Signed Doubleword Integers for Greater Thanpcmpgtd pcmpgtd + pcmpgtd pcmpgtd / pfsubr&Packed Floating-Point Subtract Reversepfsubr pfsubr + vfmsubadd213pdXFused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Valuesvfmsubadd213pd H = vfmsubadd213pd H vfmsubadd213pd H ? vfmsubadd213pd H vfmsubadd213pd H A vfmsubadd213pd H vfmsubadd213pd H = vfmsubadd213pd # vfmsubadd213pd H vfmsubadd213pd # / vfmsubadd213pd H ? vfmsubadd213pd # vfmsubadd213pd H vfmsubadd213pd # 2 vfmsubadd213pd H A vfmsubadd213pd H vfmsubadd213pd H Q vfmsubadd213pd H Q vpcomb#Compare Packed Signed Byte Integersvpcomb " vpcomb " / pmaxsw&Maximum of Packed Signed Word IntegerspmaxswPMAXSW
pmaxswPMAXSW
+ pmaxswPMAXSW pmaxswPMAXSW / vfmaddcphIFused Multiply-Add of Complex Packed Half-Precision Floating-Point Values vfmaddcph K 9 vfmaddcph K vfmaddcph K : vfmaddcph K vfmaddcph R ; vfmaddcph R vfmaddcph K 9 vfmaddcph K vfmaddcph K : vfmaddcph K vfmaddcph R ; vfmaddcph R vfmaddcph R Q vfmaddcph R Q jna&Jump if not above (CF == 1 or ZF == 1)jnaJLS N jnaJLS O setge'Set byte if greater or equal (SF == OF)setgeSETGE setgeSETGE # vfnmaddssLFused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values vfnmaddss $ vfnmaddss $ ' vfnmaddss $ ' vmovmskps8Extract Packed Single-Precision Floating-Point Sign Mask vmovmskps vmovmskps vpaddbAdd Packed Byte Integersvpaddb I vpaddb I / vpaddb I vpaddb I 2 vpaddb I vpaddb I 5 vpaddb vpaddb I vpaddb / vpaddb I / vpaddb ! vpaddb I vpaddb ! 2 vpaddb I 2 vpaddb I vpaddb I 5 vpmovsqbIDown Convert Packed Quadword Values to Byte Values with Signed Saturation vpmovsqb H vpmovsqb H% vpmovsqb H vpmovsqb H( vpmovsqb H vpmovsqb H, vpmovsqb H vpmovsqb H vpmovsqb H vpmovsqb H$ vpmovsqb H' vpmovsqb H+ vpsubusb?Subtract Packed Unsigned Byte Integers with Unsigned Saturationvpsubusb I vpsubusb I / vpsubusb I vpsubusb I 2 vpsubusb I vpsubusb I 5 vpsubusb vpsubusb I vpsubusb / vpsubusb I / vpsubusb ! vpsubusb I vpsubusb ! 2 vpsubusb I 2 vpsubusb I vpsubusb I 5 movdMove Doublewordmovd movd movd movd ' movd movd ' movd ' movd ' blciIsolate Lowest Clear Bitblci 6 blci 6 ' vpdpbssdsVPacked Dot Product of Signed-by-Singed Byte subvectors into Doubleword with Saturation vpdpbssds X vpdpbssds X / vpdpbssds X vpdpbssds X 2 movdq2q1Move Quadword from XMM to MMX Technology Registermovdq2q vcvtss2si9Convert Scalar Single-Precision FP Value to Dword Integer vcvtss2si vcvtss2si H vcvtss2si ' vcvtss2si H ' vcvtss2si H Q dpps<Dot Product of Packed Single Precision Floating-Point Valuesdpps dpps / vpmovb2m3Move Signs of Packed Byte Integers to Mask Registervpmovb2m I vpmovb2m I vpmovb2m I comisdLCompare Scalar Ordered Double-Precision Floating-Point Values and Set EFLAGScomisdCOMISD comisdCOMISD + vphaddwq4Packed Horizontal Add Signed Word to Signed Quadwordvphaddwq " vphaddwq " / vunpcklpsGUnpack and Interleave Low Packed Single-Precision Floating-Point Values vunpcklps H 9 vunpcklps H vunpcklps H : vunpcklps H vunpcklps H ; vunpcklps H vunpcklps H 9 vunpcklps vunpcklps H vunpcklps / vunpcklps H : vunpcklps vunpcklps H vunpcklps 2 vunpcklps H ; vunpcklps H vextractf128$Extract Packed Floating-Point Values vextractf128 vextractf128 / hsubpd$Packed Double-FP Horizontal Subtracthsubpd hsubpd / movmskpd8Extract Packed Double-Precision Floating-Point Sign MaskmovmskpdMOVMSKPD vcomisdLCompare Scalar Ordered Double-Precision Floating-Point Values and Set EFLAGSvcomisd vcomisd H vcomisd + vcomisd H + vcomisd H R vbroadcastf32x47Broadcast Four Single-Precision Floating-Point Elementsvbroadcastf32x4 H / vbroadcastf32x4 H / vbroadcastf32x4 H / vbroadcastf32x4 H / xchg&Exchange Register/Memory with Register
xchgbXCHGB xchgbXCHGB # xchgwXCHGW xchgwXCHGW xchgwXCHGW xchgwXCHGW $ xchglXCHGL xchglXCHGL xchglXCHGL xchglXCHGL ' xchgbXCHGB # xchgwXCHGW $ xchglXCHGL ' kandnw$Bitwise Logical AND NOT 16-bit Maskskandnw H vbroadcastf128(Broadcast 128 Bit of Floating-Point Datavbroadcastf128 / cmovna&Move if not above (CF == 1 or ZF == 1)cmovnaw cmovnaw $ cmovnal cmovnal '
vpunpcklbw0Unpack and Interleave Low-Order Bytes into Words
vpunpcklbw I
vpunpcklbw I /
vpunpcklbw I
vpunpcklbw I 2
vpunpcklbw I
vpunpcklbw I 5
vpunpcklbw
vpunpcklbw I
vpunpcklbw /
vpunpcklbw I /
vpunpcklbw !
vpunpcklbw I
vpunpcklbw ! 2
vpunpcklbw I 2
vpunpcklbw I
vpunpcklbw I 5 vfnmadd132ssLFused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values vfnmadd132ss H vfnmadd132ss H ' vfnmadd132ss # vfnmadd132ss H vfnmadd132ss # ' vfnmadd132ss H ' vfnmadd132ss H Q vfnmadd132ss H Q vblendvps= Variable Blend Packed Single Precision Floating-Point Values vblendvps vblendvps / vblendvps vblendvps 2 pfmin Packed Floating-Point Minimumpfmin pfmin +
gf2p8affineqb(Galois Field (2^8) Affine Transformation
gf2p8affineqb
gf2p8affineqb / rsqrtpsTCompute Reciprocals of Square Roots of Packed Single-Precision Floating-Point ValuesrsqrtpsRSQRTPS rsqrtpsRSQRTPS / vpmaxuw(Maximum of Packed Unsigned Word Integersvpmaxuw I vpmaxuw I / vpmaxuw I vpmaxuw I 2 vpmaxuw I vpmaxuw I 5 vpmaxuw vpmaxuw I vpmaxuw / vpmaxuw I / vpmaxuw ! vpmaxuw I vpmaxuw ! 2 vpmaxuw I 2 vpmaxuw I vpmaxuw I 5 vpsllq'Shift Packed Quadword Data Left Logical vpsllq H = vpsllq H ? vpsllq H A vpsllq H vpsllq H vpsllq H / vpsllq H vpsllq H vpsllq H / vpsllq H vpsllq H vpsllq H / vpsllq H = vpsllq vpsllq H vpsllq vpsllq H vpsllq / vpsllq H / vpsllq H ? vpsllq ! vpsllq H vpsllq ! vpsllq H vpsllq ! / vpsllq H / vpsllq H A vpsllq H vpsllq H vpsllq H / vpsubusw?Subtract Packed Unsigned Word Integers with Unsigned Saturationvpsubusw I vpsubusw I / vpsubusw I vpsubusw I 2 vpsubusw I vpsubusw I 5 vpsubusw vpsubusw I vpsubusw / vpsubusw I / vpsubusw ! vpsubusw I vpsubusw ! 2 vpsubusw I 2 vpsubusw I vpsubusw I 5 vpshlq Packed Shift Logical Quadwordsvpshlq " vpshlq " / vpshlq " / pmovsxdqHMove Packed Doubleword Integers to Quadword Integers with Sign Extensionpmovsxdq pmovsxdq + setlSet byte if less (SF != OF)setlSETLT setlSETLT # vcvtph2qq\Convert Packed Half Precision Floating-Point Values to Packed Singed Quadword Integer Values vcvtph2qq K * vcvtph2qq K . vcvtph2qq R < vcvtph2qq K vcvtph2qq K vcvtph2qq R vcvtph2qq K * vcvtph2qq K vcvtph2qq K . vcvtph2qq K vcvtph2qq R < vcvtph2qq R vcvtph2qq R Q vcvtph2qq R Q cvttpd2piRConvert with Truncation Packed Double-Precision FP Values to Packed Dword Integers cvttpd2pi CVTTPD2PL cvttpd2pi CVTTPD2PL / movntpdKStore Packed Double-Precision Floating-Point Values Using Non-Temporal HintmovntpdMOVNTPD / divpd4Divide Packed Double-Precision Floating-Point ValuesdivpdDIVPD divpdDIVPD / vcomissLCompare Scalar Ordered Single-Precision Floating-Point Values and Set EFLAGSvcomiss vcomiss H vcomiss ' vcomiss H ' vcomiss H R pdepParallel Bits Depositpdepl 5 pdepl 5 ' vscatterpf0dpd�Sparse Prefetch Packed Double-Precision Floating-Point Data Values with Signed Doubleword Indices Using T0 Hint with Intent to Writevscatterpf0dpd LG vfmsub132phFFused Multiply-Subtract of Packed Half-Precision Floating-Point Values vfmsub132ph K < vfmsub132ph K vfmsub132ph K > vfmsub132ph K vfmsub132ph R @ vfmsub132ph R vfmsub132ph K < vfmsub132ph K vfmsub132ph K > vfmsub132ph K vfmsub132ph R @ vfmsub132ph R vfmsub132ph R Q vfmsub132ph R Q t1mskc Inverse Mask From Trailing Onest1mskc 6 t1mskc 6 ' vsha512rnds2&Perform Two Rounds of SHA512 Operation vsha512rnds2 ) daa Decimal Adjust AL after AdditiondaaDAA pi2fd6Packed Integer to Floating-Point Doubleword Conversionpi2fd pi2fd + ucomissNUnordered Compare Scalar Single-Precision Floating-Point Values and Set EFLAGSucomissUCOMISS ucomissUCOMISS ' vphsubbw5Packed Horizontal Subtract Signed Byte to Signed Wordvphsubbw " vphsubbw " / vpshuflwShuffle Packed Low Wordsvpshuflw I vpshuflw I vpshuflw I vpshuflw I / vpshuflw I 2 vpshuflw I 5 vpshuflw vpshuflw I vpshuflw / vpshuflw I / vpshuflw ! vpshuflw I vpshuflw ! 2 vpshuflw I 2 vpshuflw I vpshuflw I 5 vscatterpf0qpd�Sparse Prefetch Packed Double-Precision Floating-Point Data Values with Signed Quadword Indices Using T0 Hint with Intent to Writevscatterpf0qpd LM vfmadd132phAFused Multiply-Add of Packed Half-Precision Floating-Point Values vfmadd132ph K < vfmadd132ph K vfmadd132ph K > vfmadd132ph K vfmadd132ph R @ vfmadd132ph R vfmadd132ph K < vfmadd132ph K vfmadd132ph K > vfmadd132ph K vfmadd132ph R @ vfmadd132ph R vfmadd132ph R Q vfmadd132ph R Q setnae(Set byte if not above or equal (CF == 1)setnaeSETCS setnaeSETCS # vpslldq)Shift Packed Double Quadword Left Logicalvpslldq vpslldq I vpslldq I / vpslldq ! vpslldq I vpslldq I 2 vpslldq I vpslldq I 5 vpcomud+Compare Packed Unsigned Doubleword Integersvpcomud " vpcomud " / sha256rnds2&Perform Two Rounds of SHA256 Operation sha256rnds2 ( sha256rnds2 ( / vptestnmq;Logical NAND of Packed Quadword Integer Values and Set Mask vptestnmq H = vptestnmq H = vptestnmq H vptestnmq H vptestnmq H ? vptestnmq H ? vptestnmq H vptestnmq H vptestnmq H A vptestnmq H A vptestnmq H vptestnmq H pextParallel Bits Extractpextl 5 pextl 5 ' vfmaddsdCFused Multiply-Add of Scalar Double-Precision Floating-Point Valuesvfmaddsd $ vfmaddsd $ + vfmaddsd $ + vpshufdShuffle Packed Doublewordsvpshufd H 9 vpshufd H : vpshufd H ; vpshufd H vpshufd H vpshufd H vpshufd H 9 vpshufd vpshufd H vpshufd / vpshufd H : vpshufd ! vpshufd H vpshufd ! 2 vpshufd H ; vpshufd H vcvtneeph2ps:Convert Even Elements of Packed FP16 Values to FP32 Values vcvtneeph2ps Z / vcvtneeph2ps Z 2 pminsw&Minimum of Packed Signed Word IntegerspminswPMINSW
pminswPMINSW
+ pminswPMINSW pminswPMINSW / vcvtps2ph<Convert Single-Precision FP value to Half-Precision FP value vcvtps2ph H vcvtps2ph H, vcvtps2ph H vcvtps2ph H0 vcvtps2ph H vcvtps2ph H3 vcvtps2ph % vcvtps2ph H vcvtps2ph % vcvtps2ph H vcvtps2ph H vcvtps2ph %+ vcvtps2ph H+ vcvtps2ph %/ vcvtps2ph H/ vcvtps2ph H2 vcvtps2ph H R vcvtps2ph H R
vpgatherdd?Gather Packed Doubleword Values Using Signed Doubleword Indices
vpgatherdd H B
vpgatherdd H F
vpgatherdd H J
vpgatherdd ! B
vpgatherdd ! F vfmsubaddpdXFused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values vfmsubaddpd $ vfmsubaddpd $ / vfmsubaddpd $ / vfmsubaddpd $ vfmsubaddpd $ 2 vfmsubaddpd $ 2 kxorq Bitwise Logical XOR 64-bit Maskskxorq I vpcmpgtq$Compare Packed Data for Greater Thanvpcmpgtq H = vpcmpgtq H = vpcmpgtq H vpcmpgtq H vpcmpgtq H ? vpcmpgtq H ? vpcmpgtq H vpcmpgtq H vpcmpgtq H A vpcmpgtq H A vpcmpgtq H vpcmpgtq H vpcmpgtq vpcmpgtq / vpcmpgtq ! vpcmpgtq ! 2 pminub(Minimum of Packed Unsigned Byte IntegerspminubPMINUB
pminubPMINUB
+ pminubPMINUB pminubPMINUB / vmulss6Multiply Scalar Single-Precision Floating-Point Valuesvmulss H vmulss H ' vmulss vmulss H vmulss ' vmulss H ' vmulss H Q vmulss H Q vinserti128 Insert Packed Integer Values vinserti128 ! vinserti128 ! / vfmulcshEFused Multiply of Complex Scalar Half-Precision Floating-Point Valuesvfmulcsh R vfmulcsh R ' vfmulcsh R vfmulcsh R ' vfmulcsh R Q vfmulcsh R Q aesimc+Perform the AES InvMixColumn Transformationaesimc ' aesimc ' / mwaitxMonitor Wait with Timeoutmwaitx E vpopcntw)Packed Population Count for Word Integers vpopcntw K vpopcntw K vpopcntw S vpopcntw K / vpopcntw K 2 vpopcntw S 5 vpopcntw K vpopcntw K / vpopcntw K vpopcntw K 2 vpopcntw S vpopcntw S 5 btcBit Test and ComplementbtcwBTCW btcwBTCW btclBTCL btclBTCL btcwBTCW $ btcwBTCW $ btclBTCL ' btclBTCL ' vprold Rotate Packed Doubleword Left vprold H 9 vprold H : vprold H ; vprold H vprold H vprold H vprold H 9 vprold H vprold H : vprold H vprold H ; vprold H jneJump if not equal (ZF == 0)jneJNE N jneJNE O
clflushoptFlush Cache Line Optimized
clflushopt :# haddpd Packed Double-FP Horizontal Addhaddpd haddpd / vpsubb Subtract Packed Byte Integersvpsubb I vpsubb I / vpsubb I vpsubb I 2 vpsubb I vpsubb I 5 vpsubb vpsubb I vpsubb / vpsubb I / vpsubb ! vpsubb I vpsubb ! 2 vpsubb I 2 vpsubb I vpsubb I 5 vmovdqu32 Move Unaligned Doubleword Values vmovdqu32 H0 vmovdqu32 H vmovdqu32 H3 vmovdqu32 H vmovdqu32 H6 vmovdqu32 H vmovdqu32 H / vmovdqu32 H 2 vmovdqu32 H 5 vmovdqu32 H vmovdqu32 H / vmovdqu32 H vmovdqu32 H 2 vmovdqu32 H vmovdqu32 H 5 vmovdqu32 H/ vmovdqu32 H2 vmovdqu32 H5 kunpckbw!Unpack and Interleave 8-bit Maskskunpckbw H cvttpd2dqRConvert with Truncation Packed Double-Precision FP Values to Packed Dword Integers cvttpd2dq cvttpd2dq / kshiftlwShift Left 16-bit Maskskshiftlw H nop No OperationnopNOP shrd$Integer Double Precision Shift Rightshrdw shrdw shrdl shrdl shrdw $ shrdw $ shrdl ' shrdl ' vcvtsi2sd9Convert Dword Integer to Scalar Double-Precision FP Value
vcvtsi2sdl
vcvtsi2sdl H
vcvtsi2sdl '
vcvtsi2sdl H '
vpgatherdq=Gather Packed Quadword Values Using Signed Doubleword Indices
vpgatherdq H B
vpgatherdq H B
vpgatherdq H F
vpgatherdq ! B
vpgatherdq ! B vppermPacked Permute Bytesvpperm " vpperm " / vpperm " / vpmaxud.Maximum of Packed Unsigned Doubleword Integersvpmaxud H 9 vpmaxud H vpmaxud H : vpmaxud H vpmaxud H ; vpmaxud H vpmaxud H 9 vpmaxud vpmaxud H vpmaxud / vpmaxud H : vpmaxud ! vpmaxud H vpmaxud ! 2 vpmaxud H ; vpmaxud H vrndscaleph\Round Packed Half-Precision Floating-Point Values To Include A Given Number Of Fraction Bits vrndscaleph K < vrndscaleph K > vrndscaleph R @ vrndscaleph K vrndscaleph K vrndscaleph R vrndscaleph K < vrndscaleph K vrndscaleph K > vrndscaleph K vrndscaleph R @ vrndscaleph R vrndscaleph R R vrndscaleph R R vgetexpssiExtract Exponent of Scalar Single-Precision Floating-Point Value as Single-Precision Floating-Point Value vgetexpss H vgetexpss H ' vgetexpss H vgetexpss H ' vgetexpss H R vgetexpss H R vpunpckhqdq@Unpack and Interleave High-Order Quadwords into Double Quadwords vpunpckhqdq H = vpunpckhqdq H vpunpckhqdq H ? vpunpckhqdq H vpunpckhqdq H A vpunpckhqdq H vpunpckhqdq H = vpunpckhqdq vpunpckhqdq H vpunpckhqdq / vpunpckhqdq H ? vpunpckhqdq ! vpunpckhqdq H vpunpckhqdq ! 2 vpunpckhqdq H A vpunpckhqdq H jpJump if parity (PF == 1)jpJPS N jpJPS O blendpd3Blend Packed Double Precision Floating-Point Valuesblendpd blendpd / pfcmpgt.Packed Floating-Point Compare for Greater Thanpfcmpgt pfcmpgt + sarArithmetic Shift RightsarbSARB sarbSARB sarbSARB sarwSARW sarwSARW sarwSARW sarlSARL sarlSARL sarlSARL sarbSARB # sarbSARB # sarbSARB # sarwSARW $ sarwSARW $ sarwSARW $ sarlSARL ' sarlSARL ' sarlSARL ' vscatterpf1dps�Sparse Prefetch Packed Single-Precision Floating-Point Data Values with Signed Doubleword Indices Using T1 Hint with Intent to Writevscatterpf1dps LK pclmulqdq"Carry-Less Quadword Multiplication pclmulqdq & pclmulqdq & / vpmovsxwdDMove Packed Word Integers to Doubleword Integers with Sign Extension vpmovsxwd H vpmovsxwd H vpmovsxwd H vpmovsxwd H + vpmovsxwd H / vpmovsxwd H 2 vpmovsxwd vpmovsxwd H vpmovsxwd + vpmovsxwd H + vpmovsxwd ! vpmovsxwd H vpmovsxwd ! / vpmovsxwd H / vpmovsxwd H vpmovsxwd H 2 vpshad#Packed Shift Arithmetic Doublewordsvpshad " vpshad " / vpshad " / pavgw Average Packed Word Integerspavgw
pavgw
+ pavgw pavgw / vporq.Bitwise Logical OR of Packed Quadword Integers vporq H = vporq H vporq H ? vporq H vporq H A vporq H vporq H = vporq H vporq H ? vporq H vporq H A vporq H vsha512msg2FPerform a Final Calculation for the Next Four SHA512 Message Quadwords vsha512msg2 ) mulsd6Multiply Scalar Double-Precision Floating-Point ValuesmulsdMULSD mulsdMULSD + vpsllvq0Variable Shift Packed Quadword Data Left Logicalvpsllvq H = vpsllvq H vpsllvq H ? vpsllvq H vpsllvq H A vpsllvq H vpsllvq H = vpsllvq ! vpsllvq H vpsllvq ! / vpsllvq H ? vpsllvq ! vpsllvq H vpsllvq ! 2 vpsllvq H A vpsllvq H vpshldd9Concatenate and Shift Packed Doubleword Data Left Logical vpshldd K 9 vpshldd K vpshldd K : vpshldd K vpshldd U ; vpshldd U vpshldd K 9 vpshldd K vpshldd K : vpshldd K vpshldd U ; vpshldd U cmovpMove if parity (PF == 1)cmovpw cmovpw $ cmovpl cmovpl ' joJump if overflow (OF == 1)joJOS N joJOS O pfrsqit18Packed Floating-Point Reciprocal Square Root Iteration 1pfrsqit1 pfrsqit1 + vfixupimmps<Fix Up Special Packed Single-Precision Floating-Point Values vfixupimmps K 9 vfixupimmps K vfixupimmps H : vfixupimmps H vfixupimmps H ; vfixupimmps H vfixupimmps K 9 vfixupimmps K vfixupimmps H : vfixupimmps H vfixupimmps H ; vfixupimmps H vfixupimmps H R vfixupimmps H R pmovsxbqBMove Packed Byte Integers to Quadword Integers with Sign Extensionpmovsxbq pmovsxbq $ crc32Accumulate CRC32 Valuecrc32b crc32w crc32l crc32b # crc32w $ crc32l ' minps<Return Minimum Packed Single-Precision Floating-Point ValuesminpsMINPS minpsMINPS /
vperm2i128 Permute 128-Bit Integer Values
vperm2i128 !
vperm2i128 ! 2 vpmadd52huqjPacked Multiply of Unsigned 52-bit Unsigned Integers and Add High 52-bit Products to Quadword Accumulators vpmadd52huq K = vpmadd52huq K vpmadd52huq K ? vpmadd52huq K vpmadd52huq O A vpmadd52huq O vpmadd52huq K = vpmadd52huq K vpmadd52huq [ vpmadd52huq [ / vpmadd52huq K ? vpmadd52huq K vpmadd52huq [ vpmadd52huq [ 2 vpmadd52huq O A vpmadd52huq O vfnmaddsdLFused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values vfnmaddsd $ vfnmaddsd $ + vfnmaddsd $ + pfrcpit2,Packed Floating-Point Reciprocal Iteration 2pfrcpit2 pfrcpit2 + vpmovqbBDown Convert Packed Quadword Values to Byte Values with Truncation vpmovqb H vpmovqb H% vpmovqb H vpmovqb H( vpmovqb H vpmovqb H, vpmovqb H vpmovqb H vpmovqb H vpmovqb H$ vpmovqb H' vpmovqb H+ notOne's Complement NegationnotbNOTB notwNOTW notlNOTL notbNOTB # notwNOTW $ notlNOTL ' vfmaddsubpsXFused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values vfmaddsubps $ vfmaddsubps $ / vfmaddsubps $ / vfmaddsubps $ vfmaddsubps $ 2 vfmaddsubps $ 2 vpermt2pdZFull Permute of Double-Precision Floating-Point Values From Two Tables Overwriting a Table vpermt2pd H = vpermt2pd H vpermt2pd H ? vpermt2pd H vpermt2pd H A vpermt2pd H vpermt2pd H = vpermt2pd H vpermt2pd H ? vpermt2pd H vpermt2pd H A vpermt2pd H salArithmetic Shift LeftsalbSALB salbSALB salbSALB salwSALW salwSALW salwSALW sallSALL sallSALL sallSALL salbSALB # salbSALB # salbSALB # salwSALW $ salwSALW $ salwSALW $ sallSALL ' sallSALL ' sallSALL ' vfnmsub231phOFused Negative Multiply-Subtract of Packed Half-Precision Floating-Point Values vfnmsub231ph K < vfnmsub231ph K vfnmsub231ph K > vfnmsub231ph K vfnmsub231ph R @ vfnmsub231ph R vfnmsub231ph K < vfnmsub231ph K vfnmsub231ph K > vfnmsub231ph K vfnmsub231ph R @ vfnmsub231ph R vfnmsub231ph R Q vfnmsub231ph R Q jnle0Jump if not less or equal (ZF == 0 and SF == OF)jnleJGT N jnleJGT O vpcmpgtw4Compare Packed Signed Word Integers for Greater Thanvpcmpgtw I vpcmpgtw I vpcmpgtw I / vpcmpgtw I / vpcmpgtw I vpcmpgtw I vpcmpgtw I 2 vpcmpgtw I 2 vpcmpgtw I vpcmpgtw I vpcmpgtw I 5 vpcmpgtw I 5 vpcmpgtw vpcmpgtw / vpcmpgtw ! vpcmpgtw ! 2 vcvtpd2dqBConvert Packed Double-Precision FP Values to Packed Dword Integers
vcvtpd2dqx H =
vcvtpd2dqy H ? vcvtpd2dq H A
vcvtpd2dqx H
vcvtpd2dqy H vcvtpd2dq H
vcvtpd2dqx H =
vcvtpd2dqy H ?
vcvtpd2dqx
vcvtpd2dqx H
vcvtpd2dqy
vcvtpd2dqy H
vcvtpd2dqx /
vcvtpd2dqy 2 vcvtpd2dq H A vcvtpd2dq H vcvtpd2dq H Q vcvtpd2dq H Q vscatterdpsTScatter Packed Single-Precision Floating-Point Values with Signed Doubleword Indices vscatterdps HC vscatterdps HG vscatterdps HK vpshldq7Concatenate and Shift Packed Quadword Data Left Logical vpshldq K = vpshldq K vpshldq K ? vpshldq K vpshldq U A vpshldq U vpshldq K = vpshldq K vpshldq K ? vpshldq K vpshldq U A vpshldq U cvtsi2sd9Convert Dword Integer to Scalar Double-Precision FP Value cvtsi2sdlCVTSL2SD cvtsi2sdlCVTSL2SD ' movupd<Move Unaligned Packed Double-Precision Floating-Point ValuesmovupdMOVUPD movupdMOVUPD / movupdMOVUPD /
vcvtss2usiSConvert Scalar Single-Precision Floating-Point Value to Unsigned Doubleword Integer
vcvtss2usi H
vcvtss2usi H '
vcvtss2usi H Q vfmaddsub132psXFused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Valuesvfmaddsub132ps H 9 vfmaddsub132ps H vfmaddsub132ps H : vfmaddsub132ps H vfmaddsub132ps H ; vfmaddsub132ps H vfmaddsub132ps H 9 vfmaddsub132ps # vfmaddsub132ps H vfmaddsub132ps # / vfmaddsub132ps H : vfmaddsub132ps # vfmaddsub132ps H vfmaddsub132ps # 2 vfmaddsub132ps H ; vfmaddsub132ps H vfmaddsub132ps H Q vfmaddsub132ps H Q retReturn from ProcedureretlRET retl cmovg&Move if greater (ZF == 0 and SF == OF)cmovgw cmovgw $ cmovgl cmovgl '
vshuff32x4=Shuffle 128-Bit Packed Single-Precision Floating-Point Values
vshuff32x4 H :
vshuff32x4 H
vshuff32x4 H ;
vshuff32x4 H
vshuff32x4 H :
vshuff32x4 H
vshuff32x4 H ;
vshuff32x4 H vcvtss2shJConvert Scalar Single-Precision FP Value to Scalar Half-Precision FP Value vcvtss2sh R vcvtss2sh R ' vcvtss2sh R vcvtss2sh R ' vcvtss2sh R Q vcvtss2sh R Q cmovle+Move if less or equal (ZF == 1 or SF != OF)cmovlew cmovlew $ cmovlel cmovlel ' kandnd$Bitwise Logical AND NOT 32-bit Maskskandnd I pavgb Average Packed Byte Integerspavgb
pavgb
+ pavgb pavgb / jnge'Jump if not greater or equal (SF != OF)jngeJLT N jngeJLT O
vcvtusi2sdHConvert Unsigned Integer to Scalar Double-Precision Floating-Point Value vcvtusi2sdl H vcvtusi2sdl H ' vpdpbusdHPacked Dot Product of Unsigned-by-Singed Byte subvectors into Doublewordvpdpbusd K 9 vpdpbusd K vpdpbusd K : vpdpbusd K vpdpbusd V ; vpdpbusd V vpdpbusd K 9 vpdpbusd W vpdpbusd K vpdpbusd W / vpdpbusd K : vpdpbusd W vpdpbusd K vpdpbusd W 2 vpdpbusd V ; vpdpbusd V movlpd5Move Low Packed Double-Precision Floating-Point ValuemovlpdMOVLPD + movlpdMOVLPD + vpmadcswd?Packed Multiply Add Accumulate Signed Word to Signed Doubleword vpmadcswd " vpmadcswd " / vpshld Packed Shift Logical Doublewordsvpshld " vpshld " / vpshld " /
aesenclast,Perform Last Round of an AES Encryption Flow
aesenclast '
aesenclast ' / vpblendvbVariable Blend Packed Bytes vpblendvb vpblendvb / vpblendvb ! vpblendvb ! 2 vpmaxsb&Maximum of Packed Signed Byte Integersvpmaxsb I vpmaxsb I / vpmaxsb I vpmaxsb I 2 vpmaxsb I vpmaxsb I 5 vpmaxsb vpmaxsb I vpmaxsb / vpmaxsb I / vpmaxsb ! vpmaxsb I vpmaxsb ! 2 vpmaxsb I 2 vpmaxsb I vpmaxsb I 5
vcvtpd2udq\Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers vcvtpd2udqx H = vcvtpd2udqy H ?
vcvtpd2udq H A vcvtpd2udqx H vcvtpd2udqy H
vcvtpd2udq H vcvtpd2udqx H = vcvtpd2udqy H ? vcvtpd2udqx H vcvtpd2udqy H
vcvtpd2udq H A
vcvtpd2udq H
vcvtpd2udq H Q
vcvtpd2udq H Q blcic%Isolate Lowest Set Bit and Complementblcic 6 blcic 6 ' vrcp28pdtApproximation to the Reciprocal of Packed Double-Precision Floating-Point Values with Less Than 2^-28 Relative Errorvrcp28pd M A vrcp28pd M vrcp28pd M A vrcp28pd M vrcp28pd M R vrcp28pd M R maxss;Return Maximum Scalar Single-Precision Floating-Point ValuemaxssMAXSS maxssMAXSS ' kxnorq!Bitwise Logical XNOR 64-bit Maskskxnorq I cbwConvert Byte to Wordcbtw vpsraw'Shift Packed Word Data Right Arithmetic vpsraw I vpsraw I vpsraw I / vpsraw I vpsraw I vpsraw I / vpsraw I vpsraw I vpsraw I / vpsraw I / vpsraw I 2 vpsraw I 5 vpsraw vpsraw I vpsraw vpsraw I vpsraw / vpsraw I / vpsraw I / vpsraw ! vpsraw I vpsraw ! vpsraw I vpsraw ! / vpsraw I / vpsraw I 2 vpsraw I vpsraw I vpsraw I / vpsraw I 5 vbroadcasti32x8#Broadcast Eight Doubleword Elementsvbroadcasti32x8 J 2 vbroadcasti32x8 J 2 vfmaddsub132phVFused Multiply-Alternating Add/Subtract of Packed Half-Precision Floating-Point Valuesvfmaddsub132ph K < vfmaddsub132ph K vfmaddsub132ph K > vfmaddsub132ph K vfmaddsub132ph R @ vfmaddsub132ph R vfmaddsub132ph K < vfmaddsub132ph K vfmaddsub132ph K > vfmaddsub132ph K vfmaddsub132ph R @ vfmaddsub132ph R vfmaddsub132ph R Q vfmaddsub132ph R Q kadddADD Two 32-bit Maskskaddd I vpcompressbBStore Sparse Packed Byte Integer Values into Dense Memory/Register vpcompressb K0 vpcompressb K vpcompressb K3 vpcompressb K vpcompressb U6 vpcompressb U vpcompressb K vpcompressb K vpcompressb U vpcompressb K/ vpcompressb K2 vpcompressb U5 vcmpph3Compare Packed Half-Precision Floating-Point Valuesvcmpph K < vcmpph K < vcmpph K vcmpph K vcmpph K > vcmpph K > vcmpph K vcmpph K vcmpph R @ vcmpph R @ vcmpph R vcmpph R vcmpph R R vcmpph R R vrcppsPCompute Approximate Reciprocals of Packed Single-Precision Floating-Point Valuesvrcpps vrcpps / vrcpps vrcpps 2 vfmaddsub231psXFused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Valuesvfmaddsub231ps H 9 vfmaddsub231ps H vfmaddsub231ps H : vfmaddsub231ps H vfmaddsub231ps H ; vfmaddsub231ps H vfmaddsub231ps H 9 vfmaddsub231ps # vfmaddsub231ps H vfmaddsub231ps # / vfmaddsub231ps H : vfmaddsub231ps # vfmaddsub231ps H vfmaddsub231ps # 2 vfmaddsub231ps H ; vfmaddsub231ps H vfmaddsub231ps H Q vfmaddsub231ps H Q vrcp28ssuApproximation to the Reciprocal of a Scalar Single-Precision Floating-Point Value with Less Than 2^-28 Relative Errorvrcp28ss M vrcp28ss M ' vrcp28ss M vrcp28ss M ' vrcp28ss M R vrcp28ss M R vfmsub231pdHFused Multiply-Subtract of Packed Double-Precision Floating-Point Values vfmsub231pd H = vfmsub231pd H vfmsub231pd H ? vfmsub231pd H vfmsub231pd H A vfmsub231pd H vfmsub231pd H = vfmsub231pd # vfmsub231pd H vfmsub231pd # / vfmsub231pd H ? vfmsub231pd # vfmsub231pd H vfmsub231pd # 2 vfmsub231pd H A vfmsub231pd H vfmsub231pd H Q vfmsub231pd H Q
vcvtps2phx<Convert Single-Precision FP value to Half-Precision FP value vcvtps2phxx K 9 vcvtps2phxy K :
vcvtps2phx R ; vcvtps2phxx K vcvtps2phxy K
vcvtps2phx R vcvtps2phxx K 9 vcvtps2phxy K : vcvtps2phxx K vcvtps2phxy K
vcvtps2phx R ;
vcvtps2phx R
vcvtps2phx R Q
vcvtps2phx R Q vpmovmskbMove Byte Mask vpmovmskb vpmovmskb ! pcmpestrm3Packed Compare Explicit Length Strings, Return Mask
pcmpestrml
pcmpestrml / vexpandpsKLoad Sparse Packed Single-Precision Floating-Point Values from Dense Memory vexpandps H vexpandps H vexpandps H vexpandps H / vexpandps H 2 vexpandps H 5 vexpandps H vexpandps H / vexpandps H vexpandps H 2 vexpandps H vexpandps H 5
vperm2f128 Permute Floating-Point Values
vperm2f128
vperm2f128 2 vpermi2dAFull Permute of Doublewords From Two Tables Overwriting the Index vpermi2d H 9 vpermi2d H vpermi2d H : vpermi2d H vpermi2d H ; vpermi2d H vpermi2d H 9 vpermi2d H vpermi2d H : vpermi2d H vpermi2d H ; vpermi2d H vpermt2psZFull Permute of Single-Precision Floating-Point Values From Two Tables Overwriting a Table vpermt2ps H 9 vpermt2ps H vpermt2ps H : vpermt2ps H vpermt2ps H ; vpermt2ps H vpermt2ps H 9 vpermt2ps H vpermt2ps H : vpermt2ps H vpermt2ps H ; vpermt2ps H vfmsubpsHFused Multiply-Subtract of Packed Single-Precision Floating-Point Valuesvfmsubps $ vfmsubps $ / vfmsubps $ / vfmsubps $ vfmsubps $ 2 vfmsubps $ 2 vphaddw#Packed Horizontal Add Word Integersvphaddw vphaddw / vphaddw ! vphaddw ! 2 setnle4Set byte if not less or equal (ZF == 0 and SF == OF)setnleSETGT setnleSETGT # pcmpeqb%Compare Packed Byte Data for EqualitypcmpeqbPCMPEQB pcmpeqbPCMPEQB + pcmpeqbPCMPEQB pcmpeqbPCMPEQB / cmovpo Move if parity odd (PF == 0)cmovpow cmovpow $ cmovpol cmovpol ' setle/Set byte if less or equal (ZF == 1 or SF != OF)setleSETLE setleSETLE # kxorb Bitwise Logical XOR 8-bit Maskskxorb J cmovnlMove if not less (SF == OF)cmovnlw cmovnlw $ cmovnll cmovnll ' psubb Subtract Packed Byte IntegerspsubbPSUBB psubbPSUBB + psubbPSUBB psubbPSUBB / vbroadcasti32x2!Broadcast Two Doubleword Elements vbroadcasti32x2 J vbroadcasti32x2 J vbroadcasti32x2 J vbroadcasti32x2 J + vbroadcasti32x2 J + vbroadcasti32x2 J + vbroadcasti32x2 J vbroadcasti32x2 J + vbroadcasti32x2 J vbroadcasti32x2 J + vbroadcasti32x2 J vbroadcasti32x2 J + vmovdqu64 Move Unaligned Quadword Values vmovdqu64 H0 vmovdqu64 H vmovdqu64 H3 vmovdqu64 H vmovdqu64 H6 vmovdqu64 H vmovdqu64 H / vmovdqu64 H 2 vmovdqu64 H 5 vmovdqu64 H vmovdqu64 H / vmovdqu64 H vmovdqu64 H 2 vmovdqu64 H vmovdqu64 H 5 vmovdqu64 H/ vmovdqu64 H2 vmovdqu64 H5 cvtpi2psBConvert Packed Dword Integers to Packed Single-Precision FP Valuescvtpi2psCVTPL2PS cvtpi2psCVTPL2PS + packssdw2Pack Doublewords into Words with Signed Saturationpackssdw packssdw + packssdw packssdw / vmovw Move Wordvmovw R vmovw R vmovw R $ vmovw R$ cmovlMove if less (SF != OF)cmovlw cmovlw $ cmovll cmovll ' vpabsb&Packed Absolute Value of Byte Integersvpabsb I vpabsb I vpabsb I vpabsb I / vpabsb I 2 vpabsb I 5 vpabsb vpabsb I vpabsb / vpabsb I / vpabsb ! vpabsb I vpabsb ! 2 vpabsb I 2 vpabsb I vpabsb I 5 vpblendmd0Blend Doubleword Vectors Using an OpMask Control vpblendmd H 9 vpblendmd H vpblendmd H : vpblendmd H vpblendmd H ; vpblendmd H vpblendmd H 9 vpblendmd H vpblendmd H : vpblendmd H vpblendmd H ; vpblendmd H vpabsd,Packed Absolute Value of Doubleword Integersvpabsd H 9 vpabsd H : vpabsd H ; vpabsd H vpabsd H vpabsd H vpabsd H 9 vpabsd vpabsd H vpabsd / vpabsd H : vpabsd ! vpabsd H vpabsd ! 2 vpabsd H ; vpabsd H vpsubsb;Subtract Packed Signed Byte Integers with Signed Saturationvpsubsb I vpsubsb I / vpsubsb I vpsubsb I 2 vpsubsb I vpsubsb I 5 vpsubsb vpsubsb I vpsubsb / vpsubsb I / vpsubsb ! vpsubsb I vpsubsb ! 2 vpsubsb I 2 vpsubsb I vpsubsb I 5 vpmullw9Multiply Packed Signed Word Integers and Store Low Resultvpmullw I vpmullw I / vpmullw I vpmullw I 2 vpmullw I vpmullw I 5 vpmullw vpmullw I vpmullw / vpmullw I / vpmullw ! vpmullw I vpmullw ! 2 vpmullw I 2 vpmullw I vpmullw I 5 setnz Set byte if not zero (ZF == 0)setnzSETNE setnzSETNE # gf2p8mulbGalois Field Multiply Bytes gf2p8mulb gf2p8mulb / vandpdDBitwise Logical AND of Packed Double-Precision Floating-Point Valuesvandpd J = vandpd J vandpd J ? vandpd J vandpd J A vandpd J vandpd J = vandpd vandpd J vandpd / vandpd J ? vandpd vandpd J vandpd 2 vandpd J A vandpd J vfmadd231ssCFused Multiply-Add of Scalar Single-Precision Floating-Point Values vfmadd231ss H vfmadd231ss H ' vfmadd231ss # vfmadd231ss H vfmadd231ss # ' vfmadd231ss H ' vfmadd231ss H Q vfmadd231ss H Q mpsadbw3Compute Multiple Packed Sums of Absolute Differencempsadbw mpsadbw / vmovddup Move One Double-FP and Duplicatevmovddup H vmovddup H vmovddup H vmovddup H + vmovddup H 2 vmovddup H 5 vmovddup vmovddup H vmovddup + vmovddup H + vmovddup vmovddup H vmovddup 2 vmovddup H 2 vmovddup H vmovddup H 5 vpbroadcastmb2q=Broadcast Low Byte of Mask Register to Packed Quadword Valuesvpbroadcastmb2q N vpbroadcastmb2q N vpbroadcastmb2q N vfmaddsub231phVFused Multiply-Alternating Add/Subtract of Packed Half-Precision Floating-Point Valuesvfmaddsub231ph K < vfmaddsub231ph K vfmaddsub231ph K > vfmaddsub231ph K vfmaddsub231ph R @ vfmaddsub231ph R vfmaddsub231ph K < vfmaddsub231ph K vfmaddsub231ph K > vfmaddsub231ph K vfmaddsub231ph R @ vfmaddsub231ph R vfmaddsub231ph R Q vfmaddsub231ph R Q vfmadd132pdCFused Multiply-Add of Packed Double-Precision Floating-Point Values vfmadd132pd H = vfmadd132pd H vfmadd132pd H ? vfmadd132pd H vfmadd132pd H A vfmadd132pd H vfmadd132pd H = vfmadd132pd # vfmadd132pd H vfmadd132pd # / vfmadd132pd H ? vfmadd132pd # vfmadd132pd H vfmadd132pd # 2 vfmadd132pd H A vfmadd132pd H vfmadd132pd H Q vfmadd132pd H Q
vrsqrt28pd�Approximation to the Reciprocal Square Root of Packed Double-Precision Floating-Point Values with Less Than 2^-28 Relative Error
vrsqrt28pd M A
vrsqrt28pd M
vrsqrt28pd M A
vrsqrt28pd M
vrsqrt28pd M R
vrsqrt28pd M R clflushFlush Cache Lineclflush 9# cvttsd2siJConvert with Truncation Scalar Double-Precision FP Value to Signed Integer cvttsd2si CVTTSD2SL cvttsd2si CVTTSD2SL + vpcmpub#Compare Packed Unsigned Byte Values vpcmpub I vpcmpub I vpcmpub I / vpcmpub I / vpcmpub I vpcmpub I vpcmpub I 2 vpcmpub I 2 vpcmpub I vpcmpub I vpcmpub I 5 vpcmpub I 5
vfpclasspd;Test Class of Packed Double-Precision Floating-Point Values vfpclasspdx J = vfpclasspdx J = vfpclasspdy J ? vfpclasspdy J ? vfpclasspdz J A vfpclasspdz J A vfpclasspdx J vfpclasspdx J vfpclasspdy J vfpclasspdy J vfpclasspdz J vfpclasspdz J setpe!Set byte if parity even (PF == 1)setpeSETPS setpeSETPS # palignrPacked Align Rightpalignr palignr + palignr palignr / vfmsub231shFFused Multiply-Subtract of Scalar Half-Precision Floating-Point Values vfmsub231sh R vfmsub231sh R $ vfmsub231sh R vfmsub231sh R $ vfmsub231sh R Q vfmsub231sh R Q vpshldvw<Concatenate and Variable Shift Packed Word Data Left Logical vpshldvw K vpshldvw K / vpshldvw K vpshldvw K 2 vpshldvw U vpshldvw U 5 vpshldvw K vpshldvw K / vpshldvw K vpshldvw K 2 vpshldvw U vpshldvw U 5 vpmovsxdqHMove Packed Doubleword Integers to Quadword Integers with Sign Extension vpmovsxdq H vpmovsxdq H vpmovsxdq H vpmovsxdq H + vpmovsxdq H / vpmovsxdq H 2 vpmovsxdq vpmovsxdq H vpmovsxdq + vpmovsxdq H + vpmovsxdq ! vpmovsxdq H vpmovsxdq ! / vpmovsxdq H / vpmovsxdq H vpmovsxdq H 2 vptestmd<Logical AND of Packed Doubleword Integer Values and Set Mask vptestmd H 9 vptestmd H 9 vptestmd H vptestmd H vptestmd H : vptestmd H : vptestmd H vptestmd H vptestmd H ; vptestmd H ; vptestmd H vptestmd H
vpmaskmovd+Conditional Move Packed Doubleword Integers
vpmaskmovd ! /
vpmaskmovd ! 2
vpmaskmovd !/
vpmaskmovd !2 kxorw Bitwise Logical XOR 16-bit Maskskxorw H
vgatherpf1dpdoSparse Prefetch Packed Double-Precision Floating-Point Data Values with Signed Doubleword Indices Using T1 Hint
vgatherpf1dpd LG vrangessYRange Restriction Calculation For a pair of Scalar Single-Precision Floating-Point Valuesvrangess J vrangess J ' vrangess J vrangess J ' vrangess J R vrangess J R cvtdq2psBConvert Packed Dword Integers to Packed Single-Precision FP Valuescvtdq2ps cvtdq2ps / jecxzJump if ECX register is 0jecxzJCXZL N movbe Move Data After Swapping Bytesmovbew / $ movbel / ' movbew /$ movbel /' xorLogical Exclusive ORxorbXORB xorbXORB xorbXORB xorbXORB # xorwXORW xorwXORW xorwXORW xorwXORW xorwXORW $ xorlXORL xorlXORL xorlXORL xorlXORL xorlXORL ' xorbXORB # xorbXORB # xorwXORW $ xorwXORW $ xorwXORW $ xorlXORL ' xorlXORL ' xorlXORL ' vrndscaleps^Round Packed Single-Precision Floating-Point Values To Include A Given Number Of Fraction Bits vrndscaleps H 9 vrndscaleps H : vrndscaleps H ; vrndscaleps H vrndscaleps H vrndscaleps H vrndscaleps H 9 vrndscaleps H vrndscaleps H : vrndscaleps H vrndscaleps H ; vrndscaleps H vrndscaleps H R vrndscaleps H R cmovnge'Move if not greater or equal (SF != OF)cmovngew cmovngew $ cmovngel cmovngel ' into#Interrupt 4 If Overflow Flag is SetintoINTO vaesdec+Perform One Round of an AES Decryption Flow
vaesdec vaesdec K vaesdec / vaesdec K / vaesdec vaesdec K vaesdec 2 vaesdec K 2 vaesdec H vaesdec H 5 jzJump if zero (ZF == 1)jzJEQ N jzJEQ O vfnmsub231sdQFused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values vfnmsub231sd H vfnmsub231sd H + vfnmsub231sd # vfnmsub231sd H vfnmsub231sd # + vfnmsub231sd H + vfnmsub231sd H Q vfnmsub231sd H Q vfnmsub213shOFused Negative Multiply-Subtract of Scalar Half-Precision Floating-Point Values vfnmsub213sh R vfnmsub213sh R $ vfnmsub213sh R vfnmsub213sh R $ vfnmsub213sh R Q vfnmsub213sh R Q vmovdqa Move Aligned Double Quadwordvmovdqa vmovdqa / vmovdqa vmovdqa 2 vmovdqa / vmovdqa 2 vpcmpuw#Compare Packed Unsigned Word Values vpcmpuw I vpcmpuw I vpcmpuw I / vpcmpuw I / vpcmpuw I vpcmpuw I vpcmpuw I 2 vpcmpuw I 2 vpcmpuw I vpcmpuw I vpcmpuw I 5 vpcmpuw I 5 vpmovzxwqBMove Packed Word Integers to Quadword Integers with Zero Extension vpmovzxwq H vpmovzxwq H vpmovzxwq H vpmovzxwq H ' vpmovzxwq H + vpmovzxwq H / vpmovzxwq vpmovzxwq H vpmovzxwq ' vpmovzxwq H ' vpmovzxwq ! vpmovzxwq H vpmovzxwq ! + vpmovzxwq H + vpmovzxwq H vpmovzxwq H / vpconflictdWDetect Conflicts Within a Vector of Packed Doubleword Values into Dense Memory/Register vpconflictd N 9 vpconflictd N : vpconflictd N ; vpconflictd N vpconflictd N vpconflictd N vpconflictd N 9 vpconflictd N vpconflictd N : vpconflictd N vpconflictd N ; vpconflictd N jcJump if carry (CF == 1)jcJCS N jcJCS O vhaddps Packed Single-FP Horizontal Addvhaddps vhaddps / vhaddps vhaddps 2 setnge+Set byte if not greater or equal (SF != OF)setngeSETLT setngeSETLT # cmpss5Compare Scalar Single-Precision Floating-Point ValuescmpssCMPSS cmpssCMPSS '
vcvtph2uqq^Convert Packed Half Precision Floating-Point Values to Packed Unsigned Quadword Integer Values
vcvtph2uqq K *
vcvtph2uqq K .
vcvtph2uqq R <
vcvtph2uqq K
vcvtph2uqq K
vcvtph2uqq R
vcvtph2uqq K *
vcvtph2uqq K
vcvtph2uqq K .
vcvtph2uqq K
vcvtph2uqq R <
vcvtph2uqq R
vcvtph2uqq R Q
vcvtph2uqq R Q vfmsubadd213phVFused Multiply-Alternating Subtract/Add of Packed Half-Precision Floating-Point Valuesvfmsubadd213ph K < vfmsubadd213ph K vfmsubadd213ph K > vfmsubadd213ph K vfmsubadd213ph R @ vfmsubadd213ph R vfmsubadd213ph K < vfmsubadd213ph K vfmsubadd213ph K > vfmsubadd213ph K vfmsubadd213ph R @ vfmsubadd213ph R vfmsubadd213ph R Q vfmsubadd213ph R Q vinserti32x43Insert 128 Bits of Packed Doubleword Integer Values vinserti32x4 H vinserti32x4 H / vinserti32x4 H vinserti32x4 H / vinserti32x4 H vinserti32x4 H / vinserti32x4 H vinserti32x4 H / vphaddubd1Packed Horizontal Add Unsigned Byte to Doubleword vphaddubd " vphaddubd " / setp Set byte if parity (PF == 1)setpSETPS setpSETPS # vpmovm2b4Expand Bits of Mask Register to Packed Byte Integersvpmovm2b I vpmovm2b I vpmovm2b I vcvtuw2phTConvert Packed Unsigned Word Integers to Packed Half-Precision Floating-Point Values vcvtuw2ph K < vcvtuw2ph K > vcvtuw2ph R @ vcvtuw2ph K vcvtuw2ph K vcvtuw2ph R vcvtuw2ph K < vcvtuw2ph K vcvtuw2ph K > vcvtuw2ph K vcvtuw2ph R @ vcvtuw2ph R vcvtuw2ph R Q vcvtuw2ph R Q kandb Bitwise Logical AND 8-bit Maskskandb J
vextracti32x84Extract 256 Bits of Packed Doubleword Integer Values
vextracti32x8 J
vextracti32x8 J3
vextracti32x8 J
vextracti32x8 J2 vpminsd,Minimum of Packed Signed Doubleword Integersvpminsd H 9 vpminsd H vpminsd H : vpminsd H vpminsd H ; vpminsd H vpminsd H 9 vpminsd vpminsd H vpminsd / vpminsd H : vpminsd ! vpminsd H vpminsd ! 2 vpminsd H ; vpminsd H seto Set byte if overflow (OF == 1)setoSETOS setoSETOS # tzmskMask From Trailing Zerostzmsk 6 tzmsk 6 ' blsiIsolate Lowest Set Bitblsil 4 blsil 4 ' knotdNOT 32-bit Mask Registerknotd I rdtscRead Time-Stamp CounterrdtscRDTSC vfmsub132ssHFused Multiply-Subtract of Scalar Single-Precision Floating-Point Values vfmsub132ss H vfmsub132ss H ' vfmsub132ss # vfmsub132ss H vfmsub132ss # ' vfmsub132ss H ' vfmsub132ss H Q vfmsub132ss H Q vpacksswb,Pack Words into Bytes with Signed Saturation vpacksswb I vpacksswb I / vpacksswb I vpacksswb I 2 vpacksswb I vpacksswb I 5 vpacksswb vpacksswb I vpacksswb / vpacksswb I / vpacksswb ! vpacksswb I vpacksswb ! 2 vpacksswb I 2 vpacksswb I vpacksswb I 5 vfmaddpdCFused Multiply-Add of Packed Double-Precision Floating-Point Valuesvfmaddpd $ vfmaddpd $ / vfmaddpd $ / vfmaddpd $ vfmaddpd $ 2 vfmaddpd $ 2 vgetexppdlExtract Exponents of Packed Double-Precision Floating-Point Values as Double-Precision Floating-Point Values vgetexppd H = vgetexppd H ? vgetexppd H A vgetexppd H vgetexppd H vgetexppd H vgetexppd H = vgetexppd H vgetexppd H ? vgetexppd H vgetexppd H A vgetexppd H vgetexppd H R vgetexppd H R vpxor#Packed Bitwise Logical Exclusive ORvpxor vpxor / vpxor ! vpxor ! 2 serialize Serialize Instruction Execution serialize F vmovdqa32 Move Aligned Doubleword Values vmovdqa32 H0 vmovdqa32 H vmovdqa32 H3 vmovdqa32 H vmovdqa32 H6 vmovdqa32 H vmovdqa32 H / vmovdqa32 H 2 vmovdqa32 H 5 vmovdqa32 H vmovdqa32 H / vmovdqa32 H vmovdqa32 H 2 vmovdqa32 H vmovdqa32 H 5 vmovdqa32 H/ vmovdqa32 H2 vmovdqa32 H5
vgetmantphMExtract Normalized Mantissas from Packed Half-Precision Floating-Point Values
vgetmantph K <
vgetmantph K >
vgetmantph R @
vgetmantph K
vgetmantph K
vgetmantph R
vgetmantph K <
vgetmantph K
vgetmantph K >
vgetmantph K
vgetmantph R @
vgetmantph R
vgetmantph R R
vgetmantph R R kandd Bitwise Logical AND 32-bit Maskskandd I vunpcklpdGUnpack and Interleave Low Packed Double-Precision Floating-Point Values vunpcklpd H = vunpcklpd H vunpcklpd H ? vunpcklpd H vunpcklpd H A vunpcklpd H vunpcklpd H = vunpcklpd vunpcklpd H vunpcklpd / vunpcklpd H ? vunpcklpd vunpcklpd H vunpcklpd 2 vunpcklpd H A vunpcklpd H pmulhw:Multiply Packed Signed Word Integers and Store High Resultpmulhw pmulhw + pmulhw pmulhw /
vgetmantshKExtract Normalized Mantissa from Scalar Half-Precision Floating-Point Value
vgetmantsh R
vgetmantsh R $
vgetmantsh R
vgetmantsh R $
vgetmantsh R R
vgetmantsh R R pushPush Value Onto the Stackpushq pushq pushwPUSHW pushlPUSHL pushwPUSHW $ pushlPUSHL ' vrndscalepd^Round Packed Double-Precision Floating-Point Values To Include A Given Number Of Fraction Bits vrndscalepd H = vrndscalepd H ? vrndscalepd H A vrndscalepd H vrndscalepd H vrndscalepd H vrndscalepd H = vrndscalepd H vrndscalepd H ? vrndscalepd H vrndscalepd H A vrndscalepd H vrndscalepd H R vrndscalepd H R mulss6Multiply Scalar Single-Precision Floating-Point ValuesmulssMULSS mulssMULSS ' korq Bitwise Logical OR 64-bit Maskskorq I roundps3Round Packed Single Precision Floating-Point Valuesroundps roundps / vfmadd213phAFused Multiply-Add of Packed Half-Precision Floating-Point Values vfmadd213ph K < vfmadd213ph K vfmadd213ph K > vfmadd213ph K vfmadd213ph R @ vfmadd213ph R vfmadd213ph K < vfmadd213ph K vfmadd213ph K > vfmadd213ph K vfmadd213ph R @ vfmadd213ph R vfmadd213ph R Q vfmadd213ph R Q vptestmw6Logical AND of Packed Word Integer Values and Set Mask vptestmw I vptestmw I vptestmw I / vptestmw I / vptestmw I vptestmw I vptestmw I 2 vptestmw I 2 vptestmw I vptestmw I vptestmw I 5 vptestmw I 5 setg*Set byte if greater (ZF == 0 and SF == OF)setgSETGT setgSETGT # vmovapd:Move Aligned Packed Double-Precision Floating-Point Valuesvmovapd H0 vmovapd H vmovapd H3 vmovapd H vmovapd H6 vmovapd H vmovapd H / vmovapd H 2 vmovapd H 5 vmovapd vmovapd H vmovapd / vmovapd H / vmovapd vmovapd H vmovapd 2 vmovapd H 2 vmovapd H vmovapd H 5 vmovapd / vmovapd H/ vmovapd 2 vmovapd H2 vmovapd H5 vpmaxsq*Maximum of Packed Signed Quadword Integers vpmaxsq H = vpmaxsq H vpmaxsq H ? vpmaxsq H vpmaxsq H A vpmaxsq H vpmaxsq H = vpmaxsq H vpmaxsq H ? vpmaxsq H vpmaxsq H A vpmaxsq H vinsertps3Insert Packed Single Precision Floating-Point Value vinsertps vinsertps H vinsertps ' vinsertps H ' vpsignd"Packed Sign of Doubleword Integersvpsignd vpsignd / vpsignd ! vpsignd ! 2 vminpd<Return Minimum Packed Double-Precision Floating-Point Valuesvminpd H = vminpd H vminpd H ? vminpd H vminpd H A vminpd H vminpd H = vminpd vminpd H vminpd / vminpd H ? vminpd vminpd H vminpd 2 vminpd H A vminpd H vminpd H R vminpd H R
vrsqrt28ps�Approximation to the Reciprocal Square Root of Packed Single-Precision Floating-Point Values with Less Than 2^-28 Relative Error
vrsqrt28ps M ;
vrsqrt28ps M
vrsqrt28ps M ;
vrsqrt28ps M
vrsqrt28ps M R
vrsqrt28ps M R vdivss4Divide Scalar Single-Precision Floating-Point Valuesvdivss H vdivss H ' vdivss vdivss H vdivss ' vdivss H ' vdivss H Q vdivss H Q andpdDBitwise Logical AND of Packed Double-Precision Floating-Point ValuesandpdANDPD andpdANDPD / ktestd#Bit Test 32-bit Masks and Set Flagsktestd I movsd1Move Scalar Double-Precision Floating-Point ValuemovsdMOVSD movsdMOVSD + movsdMOVSD + vfmsubssHFused Multiply-Subtract of Scalar Single-Precision Floating-Point Valuesvfmsubss $ vfmsubss $ ' vfmsubss $ ' vmpsadbw3Compute Multiple Packed Sums of Absolute Differencevmpsadbw vmpsadbw / vmpsadbw ! vmpsadbw ! 2 movlhps>Move Packed Single-Precision Floating-Point Values Low to HighmovlhpsMOVLHPS vpmaddwd,Multiply and Add Packed Signed Word Integersvpmaddwd I vpmaddwd I / vpmaddwd I vpmaddwd I 2 vpmaddwd I vpmaddwd I 5 vpmaddwd vpmaddwd I vpmaddwd / vpmaddwd I / vpmaddwd ! vpmaddwd I vpmaddwd ! 2 vpmaddwd I 2 vpmaddwd I vpmaddwd I 5 kortestd OR 32-bit Masks and Set Flagskortestd I vfnmsub132ssQFused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values vfnmsub132ss H vfnmsub132ss H ' vfnmsub132ss # vfnmsub132ss H vfnmsub132ss # ' vfnmsub132ss H ' vfnmsub132ss H Q vfnmsub132ss H Q addsubps Packed Single-FP Add/Subtractaddsubps addsubps / vrcp14sdPCompute Approximate Reciprocal of a Scalar Double-Precision Floating-Point Valuevrcp14sd H vrcp14sd H + vrcp14sd H vrcp14sd H + movntdq-Store Double Quadword Using Non-Temporal HintmovntdqMOVNTO / vfmsub213sdHFused Multiply-Subtract of Scalar Double-Precision Floating-Point Values vfmsub213sd H vfmsub213sd H + vfmsub213sd # vfmsub213sd H vfmsub213sd # + vfmsub213sd H + vfmsub213sd H Q vfmsub213sd H Q vandnpdHBitwise Logical AND NOT of Packed Double-Precision Floating-Point Valuesvandnpd J = vandnpd J vandnpd J ? vandnpd J vandnpd J A vandnpd J vandnpd J = vandnpd vandnpd J vandnpd / vandnpd J ? vandnpd vandnpd J vandnpd 2 vandnpd J A vandnpd J vbroadcastf64x26Broadcast Two Double-Precision Floating-Point Elementsvbroadcastf64x2 J / vbroadcastf64x2 J / vbroadcastf64x2 J / vbroadcastf64x2 J / gf2p8affineinvqb0Galois Field (2^8) Affine Inverse Transformationgf2p8affineinvqb gf2p8affineinvqb / clwbCache Line Write Backclwb ;# valigndAlign Doubleword Vectors valignd H 9 valignd H valignd H : valignd H valignd H ; valignd H valignd H 9 valignd H valignd H : valignd H valignd H ; valignd H
vcvtusi2ssHConvert Unsigned Integer to Scalar Single-Precision Floating-Point Value vcvtusi2ssl H vcvtusi2ssl H ' vcvtusi2ssl H Q vpcmpd'Compare Packed Signed Doubleword Values vpcmpd H 9 vpcmpd H 9 vpcmpd H vpcmpd H vpcmpd H : vpcmpd H : vpcmpd H vpcmpd H vpcmpd H ; vpcmpd H ; vpcmpd H vpcmpd H vpsrlvw-Variable Shift Packed Word Data Right Logical vpsrlvw I vpsrlvw I / vpsrlvw I vpsrlvw I 2 vpsrlvw I vpsrlvw I 5 vpsrlvw I vpsrlvw I / vpsrlvw I vpsrlvw I 2 vpsrlvw I vpsrlvw I 5 jbe+Jump if below or equal (CF == 1 or ZF == 1)jbeJLS N jbeJLS O jng)Jump if not greater (ZF == 1 or SF != OF)jngJLE N jngJLE O jnsJump if not sign (SF == 0)jnsJPL N jnsJPL O
vgetmantpsOExtract Normalized Mantissas from Packed Single-Precision Floating-Point Values
vgetmantps H 9
vgetmantps H :
vgetmantps H ;
vgetmantps H
vgetmantps H
vgetmantps H
vgetmantps H 9
vgetmantps H
vgetmantps H :
vgetmantps H
vgetmantps H ;
vgetmantps H
vgetmantps H R
vgetmantps H R vaddps1Add Packed Single-Precision Floating-Point Valuesvaddps H 9 vaddps H vaddps H : vaddps H vaddps H ; vaddps H vaddps H 9 vaddps vaddps H vaddps / vaddps H : vaddps vaddps H vaddps 2 vaddps H ; vaddps H vaddps H Q vaddps H Q vbroadcasti32x4"Broadcast Four Doubleword Elementsvbroadcasti32x4 H / vbroadcasti32x4 H / vbroadcasti32x4 H / vbroadcasti32x4 H / vpcmpb!Compare Packed Signed Byte Values vpcmpb I vpcmpb I vpcmpb I / vpcmpb I / vpcmpb I vpcmpb I vpcmpb I 2 vpcmpb I 2 vpcmpb I vpcmpb I vpcmpb I 5 vpcmpb I 5 pshufwShuffle Packed Wordspshufw
pshufw
+
vextracti32x44Extract 128 Bits of Packed Doubleword Integer Values
vextracti32x4 H
vextracti32x4 H0
vextracti32x4 H
vextracti32x4 H0
vextracti32x4 H
vextracti32x4 H
vextracti32x4 H/
vextracti32x4 H/ vfnmsub132pdQFused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values vfnmsub132pd H = vfnmsub132pd H vfnmsub132pd H ? vfnmsub132pd H vfnmsub132pd H A vfnmsub132pd H vfnmsub132pd H = vfnmsub132pd # vfnmsub132pd H vfnmsub132pd # / vfnmsub132pd H ? vfnmsub132pd # vfnmsub132pd H vfnmsub132pd # 2 vfnmsub132pd H A vfnmsub132pd H vfnmsub132pd H Q vfnmsub132pd H Q vpminub(Minimum of Packed Unsigned Byte Integersvpminub I vpminub I / vpminub I vpminub I 2 vpminub I vpminub I 5 vpminub vpminub I vpminub / vpminub I / vpminub ! vpminub I vpminub ! 2 vpminub I 2 vpminub I vpminub I 5 vcompresspsUStore Sparse Packed Single-Precision Floating-Point Values into Dense Memory/Register vcompressps H vcompressps H0 vcompressps H vcompressps H3 vcompressps H vcompressps H6 vcompressps H vcompressps H vcompressps H vcompressps H/ vcompressps H2 vcompressps H5 vpmovsxbw>Move Packed Byte Integers to Word Integers with Sign Extension vpmovsxbw I vpmovsxbw I vpmovsxbw I vpmovsxbw I + vpmovsxbw I / vpmovsxbw I 2 vpmovsxbw vpmovsxbw I vpmovsxbw + vpmovsxbw I + vpmovsxbw ! vpmovsxbw I vpmovsxbw ! / vpmovsxbw I / vpmovsxbw I vpmovsxbw I 2 movMovemovbMOVB movbMOVB movbMOVB # movwMOVW movwMOVW movwMOVW $ movabsl movlMOVL movlMOVL movlMOVL ' movbMOVB # movbMOVB # movwMOVW $ movwMOVW $ movlMOVL ' movlMOVL ' movabsl movshdup(Move Packed Single-FP High and Duplicatemovshdup movshdup / psrlw$Shift Packed Word Data Right Logicalpsrlw psrlw psrlw + psrlw psrlw psrlw / orLogical Inclusive ORorbORB orbORB orbORB orbORB # orwORW orwORW orwORW orwORW orwORW $ orlORL orlORL orlORL orlORL orlORL ' orbORB # orbORB # orwORW $ orwORW $ orwORW $ orlORL ' orlORL ' orlORL ' stmxcsrStore MXCSR Register Statestmxcsr ' psubw Subtract Packed Word IntegerspsubwPSUBW psubwPSUBW + psubwPSUBW psubwPSUBW / vpsrad-Shift Packed Doubleword Data Right Arithmetic vpsrad H 9 vpsrad H : vpsrad H ; vpsrad H vpsrad H vpsrad H / vpsrad H vpsrad H vpsrad H / vpsrad H vpsrad H vpsrad H / vpsrad H 9 vpsrad vpsrad H vpsrad vpsrad H vpsrad / vpsrad H / vpsrad H : vpsrad ! vpsrad H vpsrad ! vpsrad H vpsrad ! / vpsrad H / vpsrad H ; vpsrad H vpsrad H vpsrad H / jeJump if equal (ZF == 1)jeJEQ N jeJEQ O rdtscp(Read Time-Stamp Counter and Processor IDrdtscp vminph:Return Minimum Packed Half-Precision Floating-Point Valuesvminph K < vminph K vminph K > vminph K vminph R @ vminph R vminph K < vminph K vminph K > vminph K vminph R @ vminph R vminph R R vminph R R rcppsPCompute Approximate Reciprocals of Packed Single-Precision Floating-Point ValuesrcppsRCPPS rcppsRCPPS / vphsubswFPacked Horizontal Subtract Signed Word Integers with Signed Saturationvphsubsw vphsubsw / vphsubsw ! vphsubsw ! 2 vpcmovPacked Conditional Movevpcmov " vpcmov " / vpcmov " / vpcmov " vpcmov " 2 vpcmov " 2
vgatherqpsRGather Packed Single-Precision Floating-Point Values Using Signed Quadword Indices
vgatherqps H D
vgatherqps H H
vgatherqps H L
vgatherqps ! D
vgatherqps ! H vpcompressdHStore Sparse Packed Doubleword Integer Values into Dense Memory/Register vpcompressd H vpcompressd H0 vpcompressd H vpcompressd H3 vpcompressd H vpcompressd H6 vpcompressd H vpcompressd H vpcompressd H vpcompressd H/ vpcompressd H2 vpcompressd H5
vextracti64x22Extract 128 Bits of Packed Quadword Integer Values
vextracti64x2 J
vextracti64x2 J0
vextracti64x2 J
vextracti64x2 J0
vextracti64x2 J
vextracti64x2 J
vextracti64x2 J/
vextracti64x2 J/ vpmovdbDDown Convert Packed Doubleword Values to Byte Values with Truncation vpmovdb H vpmovdb H( vpmovdb H vpmovdb H, vpmovdb H vpmovdb H0 vpmovdb H vpmovdb H vpmovdb H vpmovdb H' vpmovdb H+ vpmovdb H/ packuswb.Pack Words into Bytes with Unsigned Saturationpackuswb packuswb + packuswb packuswb / pshufbPacked Shuffle BytespshufbPSHUFB pshufbPSHUFB + pshufbPSHUFB pshufbPSHUFB / rdrandRead Random Numberrdrand * rdrand *
vpunpckhwd7Unpack and Interleave High-Order Words into Doublewords
vpunpckhwd I
vpunpckhwd I /
vpunpckhwd I
vpunpckhwd I 2
vpunpckhwd I
vpunpckhwd I 5
vpunpckhwd
vpunpckhwd I
vpunpckhwd /
vpunpckhwd I /
vpunpckhwd !
vpunpckhwd I
vpunpckhwd ! 2
vpunpckhwd I 2
vpunpckhwd I
vpunpckhwd I 5 vsubsd6Subtract Scalar Double-Precision Floating-Point Valuesvsubsd H vsubsd H + vsubsd vsubsd H vsubsd + vsubsd H + vsubsd H Q vsubsd H Q bextrBit Field Extractbextrl 6 bextrl 4 bextrl 6 ' bextrl 4 ' phsubw(Packed Horizontal Subtract Word Integersphsubw phsubw + phsubw phsubw / pfpnacc2Packed Floating-Point Positive-Negative Accumulatepfpnacc pfpnacc + popcnt Count of Number of Bits Set to 1popcntw 2 popcntw 2 $ popcntl 2 popcntl 2 ' pfrcpit1,Packed Floating-Point Reciprocal Iteration 1pfrcpit1 pfrcpit1 + vbcstnesh2ps<Load FP16 Element and Convert to FP32 Element with Broadcast vbcstnesh2ps Z $ vbcstnesh2ps Z $ sbbSubtract with BorrowsbbbSBBB sbbbSBBB sbbbSBBB sbbbSBBB # sbbwSBBW sbbwSBBW sbbwSBBW sbbwSBBW sbbwSBBW $ sbblSBBL sbblSBBL sbblSBBL sbblSBBL sbblSBBL ' sbbbSBBB # sbbbSBBB # sbbwSBBW $ sbbwSBBW $ sbbwSBBW $ sbblSBBL ' sbblSBBL ' sbblSBBL ' vprolqRotate Packed Quadword Left vprolq H = vprolq H ? vprolq H A vprolq H vprolq H vprolq H vprolq H = vprolq H vprolq H ? vprolq H vprolq H A vprolq H pfaddPacked Floating-Point Addpfadd pfadd + divss4Divide Scalar Single-Precision Floating-Point ValuesdivssDIVSS divssDIVSS ' vpermilps.Permute Single-Precision Floating-Point Values vpermilps H 9 vpermilps H : vpermilps H ; vpermilps H 9 vpermilps H vpermilps H vpermilps H : vpermilps H vpermilps H vpermilps H ; vpermilps H vpermilps H vpermilps H 9 vpermilps H 9 vpermilps vpermilps H vpermilps vpermilps H vpermilps / vpermilps / vpermilps H : vpermilps H : vpermilps vpermilps H vpermilps vpermilps H vpermilps 2 vpermilps 2 vpermilps H ; vpermilps H ; vpermilps H vpermilps H blsmskMask From Lowest Set Bitblsmskl 4 blsmskl 4 ' vpavgb Average Packed Byte Integersvpavgb I vpavgb I / vpavgb I vpavgb I 2 vpavgb I vpavgb I 5 vpavgb vpavgb I vpavgb / vpavgb I / vpavgb ! vpavgb I vpavgb ! 2 vpavgb I 2 vpavgb I vpavgb I 5 pfnacc)Packed Floating-Point Negative Accumulatepfnacc pfnacc + phaddswAPacked Horizontal Add Signed Word Integers with Signed Saturationphaddsw phaddsw + phaddsw phaddsw / vpermt2w9Full Permute of Words From Two Tables Overwriting a Table vpermt2w I vpermt2w I / vpermt2w I vpermt2w I 2 vpermt2w I vpermt2w I 5 vpermt2w I vpermt2w I / vpermt2w I vpermt2w I 2 vpermt2w I vpermt2w I 5 prefetchwt1APrefetch Vector Data Into Caches with Intent to Write and T1 Hint prefetchwt1 C# movapd:Move Aligned Packed Double-Precision Floating-Point ValuesmovapdMOVAPD movapdMOVAPD / movapdMOVAPD / vgetexpsdiExtract Exponent of Scalar Double-Precision Floating-Point Value as Double-Precision Floating-Point Value vgetexpsd H vgetexpsd H + vgetexpsd H vgetexpsd H + vgetexpsd H R vgetexpsd H R vcvttpd2udqlConvert with Truncation Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers vcvttpd2udqx H = vcvttpd2udqy H ? vcvttpd2udq H A vcvttpd2udqx H vcvttpd2udqy H vcvttpd2udq H vcvttpd2udqx H = vcvttpd2udqy H ? vcvttpd2udqx H vcvttpd2udqy H vcvttpd2udq H A vcvttpd2udq H vcvttpd2udq H R vcvttpd2udq H R intCall to Interrupt ProcedureintINT vcvtqq2phOConvert Packed Quadword Integers to Packed Half-Precision Floating-Point Values
vcvtqq2phx K =
vcvtqq2phy K ?
vcvtqq2phz R A
vcvtqq2phx K
vcvtqq2phy K
vcvtqq2phz R
vcvtqq2phx K =
vcvtqq2phy K ?
vcvtqq2phz R A
vcvtqq2phx K
vcvtqq2phy K
vcvtqq2phz R
vcvtqq2phz R Q
vcvtqq2phz R Q mfence Memory FencemfenceMFENCE vbroadcasti64x4 Broadcast Four Quadword Elementsvbroadcasti64x4 H 2 vbroadcasti64x4 H 2 vmovhlps>Move Packed Single-Precision Floating-Point Values High to Lowvmovhlps vmovhlps H bswap Byte Swapbswap vpmaxub(Maximum of Packed Unsigned Byte Integersvpmaxub I vpmaxub I / vpmaxub I vpmaxub I 2 vpmaxub I vpmaxub I 5 vpmaxub vpmaxub I vpmaxub / vpmaxub I / vpmaxub ! vpmaxub I vpmaxub ! 2 vpmaxub I 2 vpmaxub I vpmaxub I 5 vpmaxuq,Maximum of Packed Unsigned Quadword Integers vpmaxuq H = vpmaxuq H vpmaxuq H ? vpmaxuq H vpmaxuq H A vpmaxuq H vpmaxuq H = vpmaxuq H vpmaxuq H ? vpmaxuq H vpmaxuq H A vpmaxuq H addsd1Add Scalar Double-Precision Floating-Point ValuesaddsdADDSD addsdADDSD + vprorq Rotate Packed Quadword Right vprorq H = vprorq H ? vprorq H A vprorq H vprorq H vprorq H vprorq H = vprorq H vprorq H ? vprorq H vprorq H A vprorq H vpunpcklqdq?Unpack and Interleave Low-Order Quadwords into Double Quadwords vpunpcklqdq H = vpunpcklqdq H vpunpcklqdq H ? vpunpcklqdq H vpunpcklqdq H A vpunpcklqdq H vpunpcklqdq H = vpunpcklqdq vpunpcklqdq H vpunpcklqdq / vpunpcklqdq H ? vpunpcklqdq ! vpunpcklqdq H vpunpcklqdq ! 2 vpunpcklqdq H A vpunpcklqdq H
vpcmpistrm3Packed Compare Implicit Length Strings, Return Mask
vpcmpistrm
vpcmpistrm /
vpmaskmovq)Conditional Move Packed Quadword Integers
vpmaskmovq ! /
vpmaskmovq ! 2
vpmaskmovq !/
vpmaskmovq !2
vcvtps2udqbConvert Packed Single-Precision Floating-Point Values to Packed Unsigned Doubleword Integer Values
vcvtps2udq H 9
vcvtps2udq H :
vcvtps2udq H ;
vcvtps2udq H
vcvtps2udq H
vcvtps2udq H
vcvtps2udq H 9
vcvtps2udq H
vcvtps2udq H :
vcvtps2udq H
vcvtps2udq H ;
vcvtps2udq H
vcvtps2udq H Q
vcvtps2udq H Q vpopcntq-Packed Population Count for Quadword Integers vpopcntq K = vpopcntq K ? vpopcntq P A vpopcntq K vpopcntq K vpopcntq P vpopcntq K = vpopcntq K vpopcntq K ? vpopcntq K vpopcntq P A vpopcntq P addss1Add Scalar Single-Precision Floating-Point ValuesaddssADDSS addssADDSS ' cmovng)Move if not greater (ZF == 1 or SF != OF)cmovngw cmovngw $ cmovngl cmovngl ' vcomishJCompare Scalar Ordered Half-Precision Floating-Point Values and Set EFLAGSvcomish R vcomish R $ vcomish R R vscatterqpsRScatter Packed Single-Precision Floating-Point Values with Signed Quadword Indices vscatterqps HE vscatterqps HI vscatterqps HM cdq Convert Doubleword to Quadwordcltd vcvtne2ps2bf16XConvert with Nearest-Even rounding 2 Single-Precision FP vectors into BFloat16 FP vector vcvtne2ps2bf16 K 9 vcvtne2ps2bf16 K vcvtne2ps2bf16 K : vcvtne2ps2bf16 K vcvtne2ps2bf16 Q ; vcvtne2ps2bf16 Q vcvtne2ps2bf16 K 9 vcvtne2ps2bf16 K vcvtne2ps2bf16 K : vcvtne2ps2bf16 K vcvtne2ps2bf16 Q ; vcvtne2ps2bf16 Q
vmaskmovpd>Conditional Move Packed Double-Precision Floating-Point Values
vmaskmovpd /
vmaskmovpd 2
vmaskmovpd /
vmaskmovpd 2
vzeroupper Zero Upper Bits of YMM Registers
vzeroupper vhsubpd$Packed Double-FP Horizontal Subtractvhsubpd vhsubpd / vhsubpd vhsubpd 2 roundpd3Round Packed Double Precision Floating-Point Valuesroundpd roundpd / vcompresspdUStore Sparse Packed Double-Precision Floating-Point Values into Dense Memory/Register vcompresspd H vcompresspd H0 vcompresspd H vcompresspd H3 vcompresspd H vcompresspd H6 vcompresspd H vcompresspd H vcompresspd H vcompresspd H/ vcompresspd H2 vcompresspd H5 punpckhbw1Unpack and Interleave High-Order Bytes into Words punpckhbw punpckhbw + punpckhbw punpckhbw / vfmaddssCFused Multiply-Add of Scalar Single-Precision Floating-Point Valuesvfmaddss $ vfmaddss $ ' vfmaddss $ ' aeskeygenassist AES Round Key Generation Assistaeskeygenassist ' aeskeygenassist ' / vscalefsh[Scale Scalar Half-Precision Floating-Point Value With a Half-Precision Floating-Point Value vscalefsh R vscalefsh R $ vscalefsh R vscalefsh R $ vscalefsh R Q vscalefsh R Q pmaxuw(Maximum of Packed Unsigned Word Integerspmaxuw pmaxuw / psubd#Subtract Packed Doubleword IntegerspsubdPSUBL psubdPSUBL + psubdPSUBL psubdPSUBL / stdSet Direction FlagstdSTD rsqrtssQCompute Reciprocal of Square Root of Scalar Single-Precision Floating-Point ValuersqrtssRSQRTSS rsqrtssRSQRTSS ' vdivsh2Divide Scalar Half-Precision Floating-Point Valuesvdivsh R vdivsh R $ vdivsh R vdivsh R $ vdivsh R Q vdivsh R Q vsm3msg1?Perform Initial Calculation for the Next Four SM3 Message Wordsvsm3msg1 vsm3msg1 / vphsubdq?Packed Horizontal Subtract Signed Doubleword to Signed Quadwordvphsubdq " vphsubdq " / vsqrtphCCompute Square Roots of Packed Half-Precision Floating-Point Valuesvsqrtph K < vsqrtph K > vsqrtph R @ vsqrtph K vsqrtph K vsqrtph R vsqrtph K < vsqrtph K vsqrtph K > vsqrtph K vsqrtph R @ vsqrtph R vsqrtph R Q vsqrtph R Q vcvtqq2psQConvert Packed Quadword Integers to Packed Single-Precision Floating-Point Values
vcvtqq2psx J =
vcvtqq2psy J ? vcvtqq2ps J A
vcvtqq2psx J
vcvtqq2psy J vcvtqq2ps J
vcvtqq2psx J =
vcvtqq2psy J ?
vcvtqq2psx J
vcvtqq2psy J vcvtqq2ps J A vcvtqq2ps J vcvtqq2ps J Q vcvtqq2ps J Q psllq'Shift Packed Quadword Data Left Logicalpsllq psllq psllq + psllq psllq psllq / vfcmulcshOFused Conjugate Multiply of Complex Scalar Half-Precision Floating-Point Values vfcmulcsh R vfcmulcsh R ' vfcmulcsh R vfcmulcsh R ' vfcmulcsh R Q vfcmulcsh R Q vexp2psyApproximation to the Exponential 2^x of Packed Single-Precision Floating-Point Values with Less Than 2^-23 Relative Errorvexp2ps M ; vexp2ps M vexp2ps M ; vexp2ps M vexp2ps M R vexp2ps M R vfmaddsubpdXFused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values vfmaddsubpd $ vfmaddsubpd $ / vfmaddsubpd $ / vfmaddsubpd $ vfmaddsubpd $ 2 vfmaddsubpd $ 2 ldmxcsrLoad MXCSR Registerldmxcsr ' vpaddusw:Add Packed Unsigned Word Integers with Unsigned Saturationvpaddusw I vpaddusw I / vpaddusw I vpaddusw I 2 vpaddusw I vpaddusw I 5 vpaddusw vpaddusw I vpaddusw / vpaddusw I / vpaddusw ! vpaddusw I vpaddusw ! 2 vpaddusw I 2 vpaddusw I vpaddusw I 5
vpmaddubsw9Multiply and Add Packed Signed and Unsigned Byte Integers
vpmaddubsw I
vpmaddubsw I /
vpmaddubsw I
vpmaddubsw I 2
vpmaddubsw I
vpmaddubsw I 5
vpmaddubsw
vpmaddubsw I
vpmaddubsw /
vpmaddubsw I /
vpmaddubsw !
vpmaddubsw I
vpmaddubsw ! 2
vpmaddubsw I 2
vpmaddubsw I
vpmaddubsw I 5 vmovss2Move Scalar Single-Precision Floating-Point Values vmovss H( vmovss H ' vmovss ' vmovss H ' vmovss ' vmovss H' vmovss H vmovss vmovss H vpmulhuw<Multiply Packed Unsigned Word Integers and Store High Resultvpmulhuw I vpmulhuw I / vpmulhuw I vpmulhuw I 2 vpmulhuw I vpmulhuw I 5 vpmulhuw vpmulhuw I vpmulhuw / vpmulhuw I / vpmulhuw ! vpmulhuw I vpmulhuw ! 2 vpmulhuw I 2 vpmulhuw I vpmulhuw I 5 mulps6Multiply Packed Single-Precision Floating-Point ValuesmulpsMULPS mulpsMULPS / vsqrtpsECompute Square Roots of Packed Single-Precision Floating-Point Valuesvsqrtps H 9 vsqrtps H : vsqrtps H ; vsqrtps H vsqrtps H vsqrtps H vsqrtps H 9 vsqrtps vsqrtps H vsqrtps / vsqrtps H : vsqrtps vsqrtps H vsqrtps 2 vsqrtps H ; vsqrtps H vsqrtps H Q vsqrtps H Q vpmovzxbw>Move Packed Byte Integers to Word Integers with Zero Extension vpmovzxbw I vpmovzxbw I vpmovzxbw I vpmovzxbw I + vpmovzxbw I / vpmovzxbw I 2 vpmovzxbw vpmovzxbw I vpmovzxbw + vpmovzxbw I + vpmovzxbw ! vpmovzxbw I vpmovzxbw ! / vpmovzxbw I / vpmovzxbw I vpmovzxbw I 2 vfmadd132ssCFused Multiply-Add of Scalar Single-Precision Floating-Point Values vfmadd132ss H vfmadd132ss H ' vfmadd132ss # vfmadd132ss H vfmadd132ss # ' vfmadd132ss H ' vfmadd132ss H Q vfmadd132ss H Q
punpcklqdq?Unpack and Interleave Low-Order Quadwords into Double Quadwords
punpcklqdq
PUNPCKLQDQ
punpcklqdq
PUNPCKLQDQ / sqrtsdCCompute Square Root of Scalar Double-Precision Floating-Point ValuesqrtsdSQRTSD sqrtsdSQRTSD + vandnpsHBitwise Logical AND NOT of Packed Single-Precision Floating-Point Valuesvandnps J 9 vandnps J vandnps J : vandnps J vandnps J ; vandnps J vandnps J 9 vandnps vandnps J vandnps / vandnps J : vandnps vandnps J vandnps 2 vandnps J ; vandnps J vfnmadd213phJFused Negative Multiply-Add of Packed Half-Precision Floating-Point Values vfnmadd213ph K < vfnmadd213ph K vfnmadd213ph K > vfnmadd213ph K vfnmadd213ph R @ vfnmadd213ph R vfnmadd213ph K < vfnmadd213ph K vfnmadd213ph K > vfnmadd213ph K vfnmadd213ph R @ vfnmadd213ph R vfnmadd213ph R Q vfnmadd213ph R Q vpmovsqdODown Convert Packed Quadword Values to Doubleword Values with Signed Saturation vpmovsqd H vpmovsqd H, vpmovsqd H vpmovsqd H0 vpmovsqd H vpmovsqd H3 vpmovsqd H vpmovsqd H vpmovsqd H vpmovsqd H+ vpmovsqd H/ vpmovsqd H2 vpsrlvd3Variable Shift Packed Doubleword Data Right Logicalvpsrlvd H 9 vpsrlvd H vpsrlvd H : vpsrlvd H vpsrlvd H ; vpsrlvd H vpsrlvd H 9 vpsrlvd ! vpsrlvd H vpsrlvd ! / vpsrlvd H : vpsrlvd ! vpsrlvd H vpsrlvd ! 2 vpsrlvd H ; vpsrlvd H vbroadcastf32x88Broadcast Eight Single-Precision Floating-Point Elementsvbroadcastf32x8 J 2 vbroadcastf32x8 J 2
vgatherpf0dpsoSparse Prefetch Packed Single-Precision Floating-Point Data Values with Signed Doubleword Indices Using T0 Hint
vgatherpf0dps LK
vpunpckhbw1Unpack and Interleave High-Order Bytes into Words
vpunpckhbw I
vpunpckhbw I /
vpunpckhbw I
vpunpckhbw I 2
vpunpckhbw I
vpunpckhbw I 5
vpunpckhbw
vpunpckhbw I
vpunpckhbw /
vpunpckhbw I /
vpunpckhbw !
vpunpckhbw I
vpunpckhbw ! 2
vpunpckhbw I 2
vpunpckhbw I
vpunpckhbw I 5 vptestnmd=Logical NAND of Packed Doubleword Integer Values and Set Mask vptestnmd H 9 vptestnmd H 9 vptestnmd H vptestnmd H vptestnmd H : vptestnmd H : vptestnmd H vptestnmd H vptestnmd H ; vptestnmd H ; vptestnmd H vptestnmd H vpsubq!Subtract Packed Quadword Integersvpsubq H = vpsubq H vpsubq H ? vpsubq H vpsubq H A vpsubq H vpsubq H = vpsubq vpsubq H vpsubq / vpsubq H ? vpsubq ! vpsubq H vpsubq ! 2 vpsubq H A vpsubq H vroundps3Round Packed Single Precision Floating-Point Valuesvroundps vroundps / vroundps vroundps 2 vrsqrtshOCompute Reciprocal of Square Root of Scalar Half-Precision Floating-Point Valuevrsqrtsh R vrsqrtsh R $ vrsqrtsh R vrsqrtsh R $ sahfStore AH into FlagssahfSAHF vmaxps<Return Maximum Packed Single-Precision Floating-Point Valuesvmaxps H 9 vmaxps H vmaxps H : vmaxps H vmaxps H ; vmaxps H vmaxps H 9 vmaxps vmaxps H vmaxps / vmaxps H : vmaxps vmaxps H vmaxps 2 vmaxps H ; vmaxps H vmaxps H R vmaxps H R
vcvttpd2qqaConvert with Truncation Packed Double-Precision Floating-Point Values to Packed Quadword Integers
vcvttpd2qq J =
vcvttpd2qq J ?
vcvttpd2qq J A
vcvttpd2qq J
vcvttpd2qq J
vcvttpd2qq J
vcvttpd2qq J =
vcvttpd2qq J
vcvttpd2qq J ?
vcvttpd2qq J
vcvttpd2qq J A
vcvttpd2qq J
vcvttpd2qq J R
vcvttpd2qq J R vucomishLUnordered Compare Scalar Half-Precision Floating-Point Values and Set EFLAGSvucomish R vucomish R $ vucomish R R vblendvpd= Variable Blend Packed Double Precision Floating-Point Values vblendvpd vblendvpd / vblendvpd vblendvpd 2
vextractps4Extract Packed Single Precision Floating-Point Value
vextractps
vextractps H
vextractps '
vextractps H' vcvtsd2ssLConvert Scalar Double-Precision FP Value to Scalar Single-Precision FP Value vcvtsd2ss H vcvtsd2ss H + vcvtsd2ss vcvtsd2ss H vcvtsd2ss + vcvtsd2ss H + vcvtsd2ss H Q vcvtsd2ss H Q movhlps>Move Packed Single-Precision Floating-Point Values High to LowmovhlpsMOVHLPS vpblendwBlend Packed Wordsvpblendw vpblendw / vpblendw ! vpblendw ! 2 vfmsub132psHFused Multiply-Subtract of Packed Single-Precision Floating-Point Values vfmsub132ps H 9 vfmsub132ps H vfmsub132ps H : vfmsub132ps H vfmsub132ps H ; vfmsub132ps H vfmsub132ps H 9 vfmsub132ps # vfmsub132ps H vfmsub132ps # / vfmsub132ps H : vfmsub132ps # vfmsub132ps H vfmsub132ps # 2 vfmsub132ps H ; vfmsub132ps H vfmsub132ps H Q vfmsub132ps H Q vprorvd'Variable Rotate Packed Doubleword Right vprorvd H 9 vprorvd H vprorvd H : vprorvd H vprorvd H ; vprorvd H vprorvd H 9 vprorvd H vprorvd H : vprorvd H vprorvd H ; vprorvd H jlJump if less (SF != OF)jlJLT N jlJLT O vreducepsQPerform Reduction Transformation on Packed Single-Precision Floating-Point Values vreduceps J 9 vreduceps J : vreduceps J ; vreduceps J vreduceps J vreduceps J vreduceps J 9 vreduceps J vreduceps J : vreduceps J vreduceps J ; vreduceps J cmcComplement Carry FlagcmcCMC vucomissNUnordered Compare Scalar Single-Precision Floating-Point Values and Set EFLAGSvucomiss vucomiss H vucomiss ' vucomiss H ' vucomiss H R
vextractf32x8AExtract 256 Bits of Packed Single-Precision Floating-Point Values
vextractf32x8 J
vextractf32x8 J3
vextractf32x8 J
vextractf32x8 J2 vpcmpgtd:Compare Packed Signed Doubleword Integers for Greater Thanvpcmpgtd H 9 vpcmpgtd H 9 vpcmpgtd H vpcmpgtd H vpcmpgtd H : vpcmpgtd H : vpcmpgtd H vpcmpgtd H vpcmpgtd H ; vpcmpgtd H ; vpcmpgtd H vpcmpgtd H vpcmpgtd vpcmpgtd / vpcmpgtd ! vpcmpgtd ! 2 vcmpsd5Compare Scalar Double-Precision Floating-Point Valuesvcmpsd H vcmpsd H vcmpsd H + vcmpsd H + vcmpsd vcmpsd + vcmpsd H R vcmpsd H R vcvtdq2ph@Convert Packed Dword Integers to Packed Half-Precision FP Values
vcvtdq2phx K 9
vcvtdq2phy K : vcvtdq2ph R ;
vcvtdq2phx K
vcvtdq2phy K vcvtdq2ph R
vcvtdq2phx K 9
vcvtdq2phy K :
vcvtdq2phx K
vcvtdq2phy K vcvtdq2ph R ; vcvtdq2ph R vcvtdq2ph R Q vcvtdq2ph R Q
vpmadcsswdOPacked Multiply Add Accumulate with Saturation Signed Word to Signed Doubleword
vpmadcsswd "
vpmadcsswd " / vfmsubadd231pdXFused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Valuesvfmsubadd231pd H = vfmsubadd231pd H vfmsubadd231pd H ? vfmsubadd231pd H vfmsubadd231pd H A vfmsubadd231pd H vfmsubadd231pd H = vfmsubadd231pd # vfmsubadd231pd H vfmsubadd231pd # / vfmsubadd231pd H ? vfmsubadd231pd # vfmsubadd231pd H vfmsubadd231pd # 2 vfmsubadd231pd H A vfmsubadd231pd H vfmsubadd231pd H Q vfmsubadd231pd H Q psrld*Shift Packed Doubleword Data Right Logicalpsrld psrld psrld + psrld psrld psrld / vmovntpdKStore Packed Double-Precision Floating-Point Values Using Non-Temporal Hintvmovntpd / vmovntpd H/ vmovntpd 2 vmovntpd H2 vmovntpd H5 vpsraq+Shift Packed Quadword Data Right Arithmeticvpsraq H = vpsraq H ? vpsraq H A vpsraq H vpsraq H vpsraq H / vpsraq H vpsraq H vpsraq H / vpsraq H vpsraq H vpsraq H / vpsraq H = vpsraq H vpsraq H vpsraq H / vpsraq H ? vpsraq H vpsraq H vpsraq H / vpsraq H A vpsraq H vpsraq H vpsraq H / vaddsh/Add Scalar Half-Precision Floating-Point Valuesvaddsh R vaddsh R $ vaddsh R vaddsh R $ vaddsh R Q vaddsh R Q
vcvttph2dqPConvert with Truncation Packed Half-Precision FP Values to Packed Dword Integers
vcvttph2dq K .
vcvttph2dq K <
vcvttph2dq R >
vcvttph2dq K
vcvttph2dq K
vcvttph2dq R
vcvttph2dq K .
vcvttph2dq K
vcvttph2dq K <
vcvttph2dq K
vcvttph2dq R >
vcvttph2dq R
vcvttph2dq R R
vcvttph2dq R R pcmpgtw4Compare Packed Signed Word Integers for Greater Thanpcmpgtw pcmpgtw + pcmpgtw pcmpgtw / vscalefpd_Scale Packed Double-Precision Floating-Point Values With Double-Precision Floating-Point Values vscalefpd H = vscalefpd H vscalefpd H ? vscalefpd H vscalefpd H A vscalefpd H vscalefpd H = vscalefpd H vscalefpd H ? vscalefpd H vscalefpd H A vscalefpd H vscalefpd H Q vscalefpd H Q divps4Divide Packed Single-Precision Floating-Point ValuesdivpsDIVPS divpsDIVPS / ktestq#Bit Test 64-bit Masks and Set Flagsktestq I vcvtpd2phLConvert Packed Double-Precision FP Values to Packed Half-Precision FP Values
vcvtpd2phx K =
vcvtpd2phy K ?
vcvtpd2phz R A
vcvtpd2phx K
vcvtpd2phy K
vcvtpd2phz R
vcvtpd2phx K =
vcvtpd2phy K ?
vcvtpd2phz R A
vcvtpd2phx K
vcvtpd2phy K
vcvtpd2phz R
vcvtpd2phz R Q
vcvtpd2phz R Q
vcvttph2qqlConvert with Truncation Packed Half Precision Floating-Point Values to Packed Singed Quadword Integer Values
vcvttph2qq K *
vcvttph2qq K .
vcvttph2qq R <
vcvttph2qq K
vcvttph2qq K
vcvttph2qq R
vcvttph2qq K *
vcvttph2qq K
vcvttph2qq K .
vcvttph2qq K
vcvttph2qq R <
vcvttph2qq R
vcvttph2qq R R
vcvttph2qq R R vfnmadd213sdLFused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values vfnmadd213sd H vfnmadd213sd H + vfnmadd213sd # vfnmadd213sd H vfnmadd213sd # + vfnmadd213sd H + vfnmadd213sd H Q vfnmadd213sd H Q
vgatherdpsTGather Packed Single-Precision Floating-Point Values Using Signed Doubleword Indices
vgatherdps H B
vgatherdps H F
vgatherdps H J
vgatherdps ! B
vgatherdps ! F punpcklwd6Unpack and Interleave Low-Order Words into Doublewords punpcklwd punpcklwd ' punpcklwd punpcklwd / vfnmadd213pdLFused Negative Multiply-Add of Packed Double-Precision Floating-Point Values vfnmadd213pd H = vfnmadd213pd H vfnmadd213pd H ? vfnmadd213pd H vfnmadd213pd H A vfnmadd213pd H vfnmadd213pd H = vfnmadd213pd # vfnmadd213pd H vfnmadd213pd # / vfnmadd213pd H ? vfnmadd213pd # vfnmadd213pd H vfnmadd213pd # 2 vfnmadd213pd H A vfnmadd213pd H vfnmadd213pd H Q vfnmadd213pd H Q vcvttpd2uqqjConvert with Truncation Packed Double-Precision Floating-Point Values to Packed Unsigned Quadword Integers vcvttpd2uqq J = vcvttpd2uqq J ? vcvttpd2uqq J A vcvttpd2uqq J vcvttpd2uqq J vcvttpd2uqq J vcvttpd2uqq J = vcvttpd2uqq J vcvttpd2uqq J ? vcvttpd2uqq J vcvttpd2uqq J A vcvttpd2uqq J vcvttpd2uqq J R vcvttpd2uqq J R vcvtw2phKConvert Packed Word Integers to Packed Half-Precision Floating-Point Valuesvcvtw2ph K < vcvtw2ph K > vcvtw2ph R @ vcvtw2ph K vcvtw2ph K vcvtw2ph R vcvtw2ph K < vcvtw2ph K vcvtw2ph K > vcvtw2ph K vcvtw2ph R @ vcvtw2ph R vcvtw2ph R Q vcvtw2ph R Q pcmpeqd+Compare Packed Doubleword Data for Equalitypcmpeqd pcmpeqd + pcmpeqd pcmpeqd / lddqu Load Unaligned Integer 128 Bitslddqu / pabsd,Packed Absolute Value of Doubleword Integerspabsd pabsd + pabsd pabsd / vreduceshPPerform Reduction Transformation on a Scalar Half-Precision Floating-Point Value vreducesh R vreducesh R $ vreducesh R vreducesh R $ vreducesh R R vreducesh R R vpcmpuq'Compare Packed Unsigned Quadword Values vpcmpuq H = vpcmpuq H = vpcmpuq H vpcmpuq H vpcmpuq H ? vpcmpuq H ? vpcmpuq H vpcmpuq H vpcmpuq H A vpcmpuq H A vpcmpuq H vpcmpuq H vmulps6Multiply Packed Single-Precision Floating-Point Valuesvmulps H 9 vmulps H vmulps H : vmulps H vmulps H ; vmulps H vmulps H 9 vmulps vmulps H vmulps / vmulps H : vmulps vmulps H vmulps 2 vmulps H ; vmulps H vmulps H Q vmulps H Q vpmaxsw&Maximum of Packed Signed Word Integersvpmaxsw I vpmaxsw I / vpmaxsw I vpmaxsw I 2 vpmaxsw I vpmaxsw I 5 vpmaxsw vpmaxsw I vpmaxsw / vpmaxsw I / vpmaxsw ! vpmaxsw I vpmaxsw ! 2 vpmaxsw I 2 vpmaxsw I vpmaxsw I 5 psignd"Packed Sign of Doubleword Integerspsignd psignd + psignd psignd /
vcvtuqq2pdZConvert Packed Unsigned Quadword Integers to Packed Double-Precision Floating-Point Values
vcvtuqq2pd J =
vcvtuqq2pd J ?
vcvtuqq2pd J A
vcvtuqq2pd J
vcvtuqq2pd J
vcvtuqq2pd J
vcvtuqq2pd J =
vcvtuqq2pd J
vcvtuqq2pd J ?
vcvtuqq2pd J
vcvtuqq2pd J A
vcvtuqq2pd J
vcvtuqq2pd J Q
vcvtuqq2pd J Q knotqNOT 64-bit Mask Registerknotq I kshiftrqShift Right 64-bit Maskskshiftrq I cmovoMove if overflow (OF == 1)cmovow cmovow $ cmovol cmovol ' vaesimc+Perform the AES InvMixColumn Transformationvaesimc vaesimc / cvtsd2si3Convert Scalar Double-Precision FP Value to Integercvtsd2siCVTSD2SL cvtsd2siCVTSD2SL + cvtsd2ssLConvert Scalar Double-Precision FP Value to Scalar Single-Precision FP Valuecvtsd2ssCVTSD2SS cvtsd2ssCVTSD2SS + vfmsubadd132phVFused Multiply-Alternating Subtract/Add of Packed Half-Precision Floating-Point Valuesvfmsubadd132ph K < vfmsubadd132ph K vfmsubadd132ph K > vfmsubadd132ph K vfmsubadd132ph R @ vfmsubadd132ph R vfmsubadd132ph K < vfmsubadd132ph K vfmsubadd132ph K > vfmsubadd132ph K vfmsubadd132ph R @ vfmsubadd132ph R vfmsubadd132ph R Q vfmsubadd132ph R Q pfrsqrtvAPacked Floating-Point Reciprocal Square Root Approximation Vectorpfrsqrtv pfrsqrtv +
vcvttpd2dqRConvert with Truncation Packed Double-Precision FP Values to Packed Dword Integers vcvttpd2dqx H = vcvttpd2dqy H ?
vcvttpd2dq H A vcvttpd2dqx H vcvttpd2dqy H
vcvttpd2dq H vcvttpd2dqx H = vcvttpd2dqy H ? vcvttpd2dqx vcvttpd2dqx H vcvttpd2dqy vcvttpd2dqy H vcvttpd2dqx / vcvttpd2dqy 2
vcvttpd2dq H A
vcvttpd2dq H
vcvttpd2dq H R
vcvttpd2dq H R vroundpd3Round Packed Double Precision Floating-Point Valuesvroundpd vroundpd / vroundpd vroundpd 2 vhaddpd Packed Double-FP Horizontal Addvhaddpd vhaddpd / vhaddpd vhaddpd 2 vpsravd6Variable Shift Packed Doubleword Data Right Arithmeticvpsravd H 9 vpsravd H vpsravd H : vpsravd H vpsravd H ; vpsravd H vpsravd H 9 vpsravd ! vpsravd H vpsravd ! / vpsravd H : vpsravd ! vpsravd H vpsravd ! 2 vpsravd H ; vpsravd H aad ASCII Adjust AX Before DivisionaadAAD aadAAD vinsertf64x2@Insert 128 Bits of Packed Double-Precision Floating-Point Values vinsertf64x2 J vinsertf64x2 J / vinsertf64x2 J vinsertf64x2 J / vinsertf64x2 J vinsertf64x2 J / vinsertf64x2 J vinsertf64x2 J / vfmsub231ssHFused Multiply-Subtract of Scalar Single-Precision Floating-Point Values vfmsub231ss H vfmsub231ss H ' vfmsub231ss # vfmsub231ss H vfmsub231ss # ' vfmsub231ss H ' vfmsub231ss H Q vfmsub231ss H Q vpexpanddGLoad Sparse Packed Doubleword Integer Values from Dense Memory/Register vpexpandd H vpexpandd H vpexpandd H vpexpandd H / vpexpandd H 2 vpexpandd H 5 vpexpandd H vpexpandd H / vpexpandd H vpexpandd H 2 vpexpandd H vpexpandd H 5 vfnmsub132shOFused Negative Multiply-Subtract of Scalar Half-Precision Floating-Point Values vfnmsub132sh R vfnmsub132sh R $ vfnmsub132sh R vfnmsub132sh R $ vfnmsub132sh R Q vfnmsub132sh R Q vfmsubaddpsXFused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values vfmsubaddps $ vfmsubaddps $ / vfmsubaddps $ / vfmsubaddps $ vfmsubaddps $ 2 vfmsubaddps $ 2 sarx.Arithmetic Shift Right Without Affecting Flagssarxl 5 sarxl 5 ' seta'Set byte if above (CF == 0 and ZF == 0)setaSETHI setaSETHI # vaeskeygenassist AES Round Key Generation Assistvaeskeygenassist vaeskeygenassist / pmaxsd,Maximum of Packed Signed Doubleword Integerspmaxsd pmaxsd / vcvttsd2usiXConvert with Truncation Scalar Double-Precision Floating-Point Value to Unsigned Integer vcvttsd2usi H vcvttsd2usi H + vcvttsd2usi H R blendvps= Variable Blend Packed Single Precision Floating-Point Valuesblendvps blendvps / cvttps2dqRConvert with Truncation Packed Single-Precision FP Values to Packed Dword Integers cvttps2dq cvttps2dq / kunpckdq"Unpack and Interleave 32-bit Maskskunpckdq I
vextracti64x42Extract 256 Bits of Packed Quadword Integer Values
vextracti64x4 H
vextracti64x4 H3
vextracti64x4 H
vextracti64x4 H2 vpmovd2m9Move Signs of Packed Doubleword Integers to Mask Registervpmovd2m J vpmovd2m J vpmovd2m J vreducepdQPerform Reduction Transformation on Packed Double-Precision Floating-Point Values vreducepd J = vreducepd J ? vreducepd J A vreducepd J vreducepd J vreducepd J vreducepd J = vreducepd J vreducepd J ? vreducepd J vreducepd J A vreducepd J korw Bitwise Logical OR 16-bit Maskskorw H vpabsq*Packed Absolute Value of Quadword Integers vpabsq H = vpabsq H ? vpabsq H A vpabsq H vpabsq H vpabsq H vpabsq H = vpabsq H vpabsq H ? vpabsq H vpabsq H A vpabsq H setna*Set byte if not above (CF == 1 or ZF == 1)setnaSETLS setnaSETLS # vfnmadd132phJFused Negative Multiply-Add of Packed Half-Precision Floating-Point Values vfnmadd132ph K < vfnmadd132ph K vfnmadd132ph K > vfnmadd132ph K vfnmadd132ph R @ vfnmadd132ph R vfnmadd132ph K < vfnmadd132ph K vfnmadd132ph K > vfnmadd132ph K vfnmadd132ph R @ vfnmadd132ph R vfnmadd132ph R Q vfnmadd132ph R Q pcmpeqq)Compare Packed Quadword Data for Equalitypcmpeqq pcmpeqq / vdpbf16psLPacked Dot Product of BFloat16 FP subvectors into Single-Precision FP values vdpbf16ps K 9 vdpbf16ps K vdpbf16ps K : vdpbf16ps K vdpbf16ps Q ; vdpbf16ps Q vdpbf16ps K 9 vdpbf16ps K vdpbf16ps K : vdpbf16ps K vdpbf16ps Q ; vdpbf16ps Q rcr Rotate Right through Carry FlagrcrbRCRB rcrbRCRB rcrbRCRB rcrwRCRW rcrwRCRW rcrwRCRW rcrlRCRL rcrlRCRL rcrlRCRL rcrbRCRB # rcrbRCRB # rcrbRCRB # rcrwRCRW $ rcrwRCRW $ rcrwRCRW $ rcrlRCRL ' rcrlRCRL ' rcrlRCRL ' cvtpd2dqBConvert Packed Double-Precision FP Values to Packed Dword Integerscvtpd2dq cvtpd2dq / psrldq*Shift Packed Double Quadword Right Logicalpsrldq
vcvttsd2siJConvert with Truncation Scalar Double-Precision FP Value to Signed Integer
vcvttsd2si
vcvttsd2si H
vcvttsd2si +
vcvttsd2si H +
vcvttsd2si H R vpaddusb:Add Packed Unsigned Byte Integers with Unsigned Saturationvpaddusb I vpaddusb I / vpaddusb I vpaddusb I 2 vpaddusb I vpaddusb I 5 vpaddusb vpaddusb I vpaddusb / vpaddusb I / vpaddusb ! vpaddusb I vpaddusb ! 2 vpaddusb I 2 vpaddusb I vpaddusb I 5 clzeroZero-out 64-bit Cache Lineclzero ? pminuw(Minimum of Packed Unsigned Word Integerspminuw pminuw / vfmsubadd231phVFused Multiply-Alternating Subtract/Add of Packed Half-Precision Floating-Point Valuesvfmsubadd231ph K < vfmsubadd231ph K vfmsubadd231ph K > vfmsubadd231ph K vfmsubadd231ph R @ vfmsubadd231ph R vfmsubadd231ph K < vfmsubadd231ph K vfmsubadd231ph K > vfmsubadd231ph K vfmsubadd231ph R @ vfmsubadd231ph R vfmsubadd231ph R Q vfmsubadd231ph R Q
vgatherpf0qpdmSparse Prefetch Packed Double-Precision Floating-Point Data Values with Signed Quadword Indices Using T0 Hint
vgatherpf0qpd LM vpopcntd/Packed Population Count for Doubleword Integers vpopcntd K 9 vpopcntd K : vpopcntd P ; vpopcntd K vpopcntd K vpopcntd P vpopcntd K 9 vpopcntd K vpopcntd K : vpopcntd K vpopcntd P ; vpopcntd P seteSet byte if equal (ZF == 1)seteSETEQ seteSETEQ # vpshldvdBConcatenate and Variable Shift Packed Doubleword Data Left Logical vpshldvd K 9 vpshldvd K vpshldvd K : vpshldvd K vpshldvd U ; vpshldvd U vpshldvd K 9 vpshldvd K vpshldvd K : vpshldvd K vpshldvd U ; vpshldvd U vfmaddsub231pdXFused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Valuesvfmaddsub231pd H = vfmaddsub231pd H vfmaddsub231pd H ? vfmaddsub231pd H vfmaddsub231pd H A vfmaddsub231pd H vfmaddsub231pd H = vfmaddsub231pd # vfmaddsub231pd H vfmaddsub231pd # / vfmaddsub231pd H ? vfmaddsub231pd # vfmaddsub231pd H vfmaddsub231pd # 2 vfmaddsub231pd H A vfmaddsub231pd H vfmaddsub231pd H Q vfmaddsub231pd H Q vorpd<Bitwise Logical OR of Double-Precision Floating-Point Valuesvorpd J = vorpd J vorpd J ? vorpd J vorpd J A vorpd J vorpd J = vorpd vorpd J vorpd / vorpd J ? vorpd vorpd J vorpd 2 vorpd J A vorpd J vscatterpf1qpd�Sparse Prefetch Packed Double-Precision Floating-Point Data Values with Signed Quadword Indices Using T1 Hint with Intent to Writevscatterpf1qpd LM
prefetcht2'Prefetch Data Into Caches using T2 Hint
prefetcht2
PREFETCHT2
# vpackuswb.Pack Words into Bytes with Unsigned Saturation vpackuswb I vpackuswb I / vpackuswb I vpackuswb I 2 vpackuswb I vpackuswb I 5 vpackuswb vpackuswb I vpackuswb / vpackuswb I / vpackuswb ! vpackuswb I vpackuswb ! 2 vpackuswb I 2 vpackuswb I vpackuswb I 5 psadbw#Compute Sum of Absolute DifferencespsadbwPSADBW
psadbwPSADBW
+ psadbwPSADBW psadbwPSADBW / vpminsq*Minimum of Packed Signed Quadword Integers vpminsq H = vpminsq H vpminsq H ? vpminsq H vpminsq H A vpminsq H vpminsq H = vpminsq H vpminsq H ? vpminsq H vpminsq H A vpminsq H kxnorb Bitwise Logical XNOR 8-bit Maskskxnorb J cmovnzMove if not zero (ZF == 0)cmovnzw cmovnzw $ cmovnzl cmovnzl ' pextrw Extract Wordpextrw
pextrw pextrw $ bzhi3Zero High Bits Starting with Specified Bit Positionbzhil 5 bzhil 5 ' jmpJump UnconditionallyjmpJMP N jmpJMP O jmplJMP jmplJMP ' setnb Set byte if not below (CF == 0)setnbSETCC setnbSETCC # jsJump if sign (SF == 1)jsJMI N jsJMI O umwaitUser mode Monitor Waitumwait G vaddss1Add Scalar Single-Precision Floating-Point Valuesvaddss H vaddss H ' vaddss vaddss H vaddss ' vaddss H ' vaddss H Q vaddss H Q vpcmpgtb4Compare Packed Signed Byte Integers for Greater Thanvpcmpgtb I vpcmpgtb I vpcmpgtb I / vpcmpgtb I / vpcmpgtb I vpcmpgtb I vpcmpgtb I 2 vpcmpgtb I 2 vpcmpgtb I vpcmpgtb I vpcmpgtb I 5 vpcmpgtb I 5 vpcmpgtb vpcmpgtb / vpcmpgtb ! vpcmpgtb ! 2 sqrtpsECompute Square Roots of Packed Single-Precision Floating-Point ValuessqrtpsSQRTPS sqrtpsSQRTPS / vpcmpw!Compare Packed Signed Word Values vpcmpw I vpcmpw I vpcmpw I / vpcmpw I / vpcmpw I vpcmpw I vpcmpw I 2 vpcmpw I 2 vpcmpw I vpcmpw I vpcmpw I 5 vpcmpw I 5 vsqrtpdECompute Square Roots of Packed Double-Precision Floating-Point Valuesvsqrtpd H 9 vsqrtpd H : vsqrtpd H A vsqrtpd H vsqrtpd H vsqrtpd H vsqrtpd H 9 vsqrtpd vsqrtpd H vsqrtpd / vsqrtpd H : vsqrtpd vsqrtpd H vsqrtpd 2 vsqrtpd H A vsqrtpd H vsqrtpd H Q vsqrtpd H Q vplzcntdBCount the Number of Leading Zero Bits for Packed Doubleword Values vplzcntd N 9 vplzcntd N : vplzcntd N ; vplzcntd N vplzcntd N vplzcntd N vplzcntd N 9 vplzcntd N vplzcntd N : vplzcntd N vplzcntd N ; vplzcntd N shufpd5Shuffle Packed Double-Precision Floating-Point Valuesshufpd shufpd / vpermps0Permute Single-Precision Floating-Point Elements
vpermps H : vpermps H vpermps H ; vpermps H vpermps H : vpermps ! vpermps H vpermps ! 2 vpermps H ; vpermps H vpxorq8Bitwise Logical Exclusive OR of Packed Quadword Integers vpxorq H = vpxorq H vpxorq H ? vpxorq H vpxorq H A vpxorq H vpxorq H = vpxorq H vpxorq H ? vpxorq H vpxorq H A vpxorq H vpshlwPacked Shift Logical Wordsvpshlw " vpshlw " / vpshlw " / vpcomuw%Compare Packed Unsigned Word Integersvpcomuw " vpcomuw " / vfmsubadd132psXFused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Valuesvfmsubadd132ps H 9 vfmsubadd132ps H vfmsubadd132ps H : vfmsubadd132ps H vfmsubadd132ps H ; vfmsubadd132ps H vfmsubadd132ps H 9 vfmsubadd132ps # vfmsubadd132ps H vfmsubadd132ps # / vfmsubadd132ps H : vfmsubadd132ps # vfmsubadd132ps H vfmsubadd132ps # 2 vfmsubadd132ps H ; vfmsubadd132ps H vfmsubadd132ps H Q vfmsubadd132ps H Q vpdpwusdHPacked Dot Product of Unsigned-by-Signed Word subvectors into Doublewordvpdpwusd Y vpdpwusd Y / vpdpwusd Y vpdpwusd Y 2 paddbAdd Packed Byte Integerspaddb paddb + paddb paddb / aesenc+Perform One Round of an AES Encryption FlowaesencAESENC ' aesencAESENC ' / cvtss2si9Convert Scalar Single-Precision FP Value to Dword Integercvtss2siCVTSS2SL cvtss2siCVTSS2SL ' vcvtsd2si3Convert Scalar Double-Precision FP Value to Integer vcvtsd2si vcvtsd2si H vcvtsd2si + vcvtsd2si H + vcvtsd2si H Q vfmsubadd213psXFused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Valuesvfmsubadd213ps H 9 vfmsubadd213ps H vfmsubadd213ps H : vfmsubadd213ps H vfmsubadd213ps H ; vfmsubadd213ps H vfmsubadd213ps H 9 vfmsubadd213ps # vfmsubadd213ps H vfmsubadd213ps # / vfmsubadd213ps H : vfmsubadd213ps # vfmsubadd213ps H vfmsubadd213ps # 2 vfmsubadd213ps H ; vfmsubadd213ps H vfmsubadd213ps H Q vfmsubadd213ps H Q paddq Add Packed Quadword IntegerspaddqPADDQ paddqPADDQ + paddqPADDQ paddqPADDQ / vfnmsubssQFused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values vfnmsubss $ vfnmsubss $ ' vfnmsubss $ ' pmovsxbw>Move Packed Byte Integers to Word Integers with Sign Extensionpmovsxbw pmovsxbw + cvtsi2ss9Convert Dword Integer to Scalar Single-Precision FP Value cvtsi2sslCVTSL2SS cvtsi2sslCVTSL2SS ' vfixupimmpd<Fix Up Special Packed Double-Precision Floating-Point Values vfixupimmpd H = vfixupimmpd H vfixupimmpd H ? vfixupimmpd H vfixupimmpd H A vfixupimmpd H vfixupimmpd H = vfixupimmpd H vfixupimmpd H ? vfixupimmpd H vfixupimmpd H A vfixupimmpd H vfixupimmpd H R vfixupimmpd H R vpandnd5Bitwise Logical AND NOT of Packed Doubleword Integers vpandnd H 9 vpandnd H vpandnd H : vpandnd H vpandnd H ; vpandnd H vpandnd H 9 vpandnd H vpandnd H : vpandnd H vpandnd H ; vpandnd H vpshlbPacked Shift Logical Bytesvpshlb " vpshlb " / vpshlb " / vpsllvd2Variable Shift Packed Doubleword Data Left Logicalvpsllvd H 9 vpsllvd H vpsllvd H : vpsllvd H vpsllvd H ; vpsllvd H vpsllvd H 9 vpsllvd ! vpsllvd H vpsllvd ! / vpsllvd H : vpsllvd ! vpsllvd H vpsllvd ! 2 vpsllvd H ; vpsllvd H vpcmpeqq)Compare Packed Quadword Data for Equalityvpcmpeqq H = vpcmpeqq H = vpcmpeqq H vpcmpeqq H vpcmpeqq H ? vpcmpeqq H ? vpcmpeqq H vpcmpeqq H vpcmpeqq H A vpcmpeqq H A vpcmpeqq H vpcmpeqq H vpcmpeqq vpcmpeqq / vpcmpeqq ! vpcmpeqq ! 2 vpmovzxbdDMove Packed Byte Integers to Doubleword Integers with Zero Extension vpmovzxbd H vpmovzxbd H vpmovzxbd H vpmovzxbd H ' vpmovzxbd H + vpmovzxbd H / vpmovzxbd vpmovzxbd H vpmovzxbd ' vpmovzxbd H ' vpmovzxbd ! vpmovzxbd H vpmovzxbd ! + vpmovzxbd H + vpmovzxbd H vpmovzxbd H / cmovsMove if sign (SF == 1)cmovsw cmovsw $ cmovsl cmovsl ' pinsrw Insert Wordpinsrw
pinsrw
$ pinsrw pinsrw $ vfnmadd213psLFused Negative Multiply-Add of Packed Single-Precision Floating-Point Values vfnmadd213ps H 9 vfnmadd213ps H vfnmadd213ps H : vfnmadd213ps H vfnmadd213ps H ; vfnmadd213ps H vfnmadd213ps H 9 vfnmadd213ps # vfnmadd213ps H vfnmadd213ps # / vfnmadd213ps H : vfnmadd213ps # vfnmadd213ps H vfnmadd213ps # 2 vfnmadd213ps H ; vfnmadd213ps H vfnmadd213ps H Q vfnmadd213ps H Q vgetexpsheExtract Exponent of Scalar Half-Precision Floating-Point Value as Half-Precision Floating-Point Value vgetexpsh R vgetexpsh R $ vgetexpsh R vgetexpsh R $ vgetexpsh R R vgetexpsh R R negTwo's Complement NegationnegbNEGB negwNEGW neglNEGL negbNEGB # negwNEGW $ neglNEGL ' pmulhrw!Packed Multiply High Rounded Wordpmulhrw pmulhrw +
vextractf32x4AExtract 128 Bits of Packed Single-Precision Floating-Point Values
vextractf32x4 H
vextractf32x4 H0
vextractf32x4 H
vextractf32x4 H0
vextractf32x4 H
vextractf32x4 H
vextractf32x4 H/
vextractf32x4 H/ imulSigned MultiplyimulbIMULB imulwIMULW imullIMULL imulbIMULB # imulwIMULW $ imullIMULL ' imulwIMULW imulwIMULW $ imullIMULL imullIMULL ' imulw imulw imulw $ imulw $ imull imull imull ' imull ' kaddwADD Two 16-bit Maskskaddw J
vpermil2ps:Permute Two-Source Single-Precision Floating-Point Vectors
vpermil2ps "
vpermil2ps " /
vpermil2ps " /
vpermil2ps "
vpermil2ps " 2
vpermil2ps " 2 blendvpd= Variable Blend Packed Double Precision Floating-Point Valuesblendvpd blendvpd / vpmovqdHDown Convert Packed Quadword Values to Doubleword Values with Truncation vpmovqd H vpmovqd H, vpmovqd H vpmovqd H0 vpmovqd H vpmovqd H3 vpmovqd H vpmovqd H vpmovqd H vpmovqd H+ vpmovqd H/ vpmovqd H2 vpsubw Subtract Packed Word Integersvpsubw I vpsubw I / vpsubw I vpsubw I 2 vpsubw I vpsubw I 5 vpsubw vpsubw I vpsubw / vpsubw I / vpsubw ! vpsubw I vpsubw ! 2 vpsubw I 2 vpsubw I vpsubw I 5 vrndscaless]Round Scalar Single-Precision Floating-Point Value To Include A Given Number Of Fraction Bits vrndscaless H vrndscaless H ' vrndscaless H vrndscaless H ' vrndscaless H R vrndscaless H R vpdpbsudsXPacked Dot Product of Signed-by-Unsinged Byte subvectors into Doubleword with Saturation vpdpbsuds X vpdpbsuds X / vpdpbsuds X vpdpbsuds X 2
vrsqrt14ps`Compute Approximate Reciprocals of Square Roots of Packed Single-Precision Floating-Point Values
vrsqrt14ps H 9
vrsqrt14ps H :
vrsqrt14ps H ;
vrsqrt14ps H
vrsqrt14ps H
vrsqrt14ps H
vrsqrt14ps H 9
vrsqrt14ps H
vrsqrt14ps H :
vrsqrt14ps H
vrsqrt14ps H ;
vrsqrt14ps H vptestnmb7Logical NAND of Packed Byte Integer Values and Set Mask vptestnmb I vptestnmb I vptestnmb I / vptestnmb I / vptestnmb I vptestnmb I vptestnmb I 2 vptestnmb I 2 vptestnmb I vptestnmb I vptestnmb I 5 vptestnmb I 5
punpckhqdq@Unpack and Interleave High-Order Quadwords into Double Quadwords
punpckhqdq
PUNPCKHQDQ
punpckhqdq
PUNPCKHQDQ / vfmsubadd231psXFused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Valuesvfmsubadd231ps H 9 vfmsubadd231ps H vfmsubadd231ps H : vfmsubadd231ps H vfmsubadd231ps H ; vfmsubadd231ps H vfmsubadd231ps H 9 vfmsubadd231ps # vfmsubadd231ps H vfmsubadd231ps # / vfmsubadd231ps H : vfmsubadd231ps # vfmsubadd231ps H vfmsubadd231ps # 2 vfmsubadd231ps H ; vfmsubadd231ps H vfmsubadd231ps H Q vfmsubadd231ps H Q vpminuq,Minimum of Packed Unsigned Quadword Integers vpminuq H = vpminuq H vpminuq H ? vpminuq H vpminuq H A vpminuq H vpminuq H = vpminuq H vpminuq H ? vpminuq H vpminuq H A vpminuq H aesdec+Perform One Round of an AES Decryption Flowaesdec ' aesdec ' / vpandn Packed Bitwise Logical AND NOTvpandn vpandn / vpandn ! vpandn ! 2 vunpckhpsHUnpack and Interleave High Packed Single-Precision Floating-Point Values vunpckhps H 9 vunpckhps H vunpckhps H : vunpckhps H vunpckhps H ; vunpckhps H vunpckhps H 9 vunpckhps vunpckhps H vunpckhps / vunpckhps H : vunpckhps vunpckhps H vunpckhps 2 vunpckhps H ; vunpckhps H vpmovwb>Down Convert Packed Word Values to Byte Values with Truncation vpmovwb I vpmovwb I, vpmovwb I vpmovwb I0 vpmovwb I vpmovwb I3 vpmovwb I vpmovwb I vpmovwb I vpmovwb I+ vpmovwb I/ vpmovwb I2 lfence
Load FencelfenceLFENCE vcvtph2ps>Convert Half-Precision FP Values to Single-Precision FP Values vcvtph2ps H vcvtph2ps H vcvtph2ps H vcvtph2ps H + vcvtph2ps H / vcvtph2ps H 2 vcvtph2ps % vcvtph2ps H vcvtph2ps % + vcvtph2ps H + vcvtph2ps % vcvtph2ps H vcvtph2ps % / vcvtph2ps H / vcvtph2ps H vcvtph2ps H 2 vcvtph2ps H R vcvtph2ps H R pmovsxwdDMove Packed Word Integers to Doubleword Integers with Sign Extensionpmovsxwd pmovsxwd + vpcompressqFStore Sparse Packed Quadword Integer Values into Dense Memory/Register vpcompressq H vpcompressq H0 vpcompressq H vpcompressq H3 vpcompressq H vpcompressq H6 vpcompressq H vpcompressq H vpcompressq H vpcompressq H/ vpcompressq H2 vpcompressq H5 vpmovusqbKDown Convert Packed Quadword Values to Byte Values with Unsigned Saturation vpmovusqb H vpmovusqb H% vpmovusqb H vpmovusqb H( vpmovusqb H vpmovusqb H, vpmovusqb H vpmovusqb H vpmovusqb H vpmovusqb H$ vpmovusqb H' vpmovusqb H+ rdseedRead Random SEEDrdseed + rdseed + unpckhpdHUnpack and Interleave High Packed Double-Precision Floating-Point ValuesunpckhpdUNPCKHPD unpckhpdUNPCKHPD / pi2fw0Packed Integer to Floating-Point Word Conversionpi2fw pi2fw + movq
Move QuadwordmovqMOVQ movqMOVQ + movqMOVQ movqMOVQ + movqMOVQ + movqMOVQ + prefetchnta(Prefetch Data Into Caches using NTA Hint prefetchnta PREFETCHNTA
# vfmaddsub213phVFused Multiply-Alternating Add/Subtract of Packed Half-Precision Floating-Point Valuesvfmaddsub213ph K < vfmaddsub213ph K vfmaddsub213ph K > vfmaddsub213ph K vfmaddsub213ph R @ vfmaddsub213ph R vfmaddsub213ph K < vfmaddsub213ph K vfmaddsub213ph K > vfmaddsub213ph K vfmaddsub213ph R @ vfmaddsub213ph R vfmaddsub213ph R Q vfmaddsub213ph R Q vminsh9Return Minimum Scalar Half-Precision Floating-Point Valuevminsh R vminsh R $ vminsh R vminsh R $ vminsh R R vminsh R R vrcpphNCompute Approximate Reciprocals of Packed Half-Precision Floating-Point Values vrcpph K < vrcpph K > vrcpph R @ vrcpph K vrcpph K vrcpph R vrcpph K < vrcpph K vrcpph K > vrcpph K vrcpph R @ vrcpph R
vfpclasssh8Test Class of Scalar Half-Precision Floating-Point Value
vfpclasssh R
vfpclasssh R
vfpclasssh R $
vfpclasssh R $ vphaddubw+Packed Horizontal Add Unsigned Byte to Word vphaddubw " vphaddubw " / vpmovuswbGDown Convert Packed Word Values to Byte Values with Unsigned Saturation vpmovuswb I vpmovuswb I, vpmovuswb I vpmovuswb I0 vpmovuswb I vpmovuswb I3 vpmovuswb I vpmovuswb I vpmovuswb I vpmovuswb I+ vpmovuswb I/ vpmovuswb I2 pswapdPacked Swap Doublewordpswapd pswapd + movntdqa.Load Double Quadword Non-Temporal Aligned Hintmovntdqa / vaesenc+Perform One Round of an AES Encryption Flow
vaesenc vaesenc K vaesenc / vaesenc K / vaesenc vaesenc K vaesenc 2 vaesenc K 2 vaesenc H vaesenc H 5 vfmadd213psCFused Multiply-Add of Packed Single-Precision Floating-Point Values vfmadd213ps H 9 vfmadd213ps H vfmadd213ps H : vfmadd213ps H vfmadd213ps H ; vfmadd213ps H vfmadd213ps H 9 vfmadd213ps # vfmadd213ps H vfmadd213ps # / vfmadd213ps H : vfmadd213ps # vfmadd213ps H vfmadd213ps # 2 vfmadd213ps H ; vfmadd213ps H vfmadd213ps H Q vfmadd213ps H Q vpmovsxbqBMove Packed Byte Integers to Quadword Integers with Sign Extension vpmovsxbq H vpmovsxbq H vpmovsxbq H vpmovsxbq H $ vpmovsxbq H ' vpmovsxbq H + vpmovsxbq vpmovsxbq H vpmovsxbq $ vpmovsxbq H $ vpmovsxbq ! vpmovsxbq H vpmovsxbq ! ' vpmovsxbq H ' vpmovsxbq H vpmovsxbq H + vtestps/Packed Single-Precision Floating-Point Bit Testvtestps vtestps / vtestps vtestps 2 pshufdShuffle Packed DoublewordspshufdPSHUFL pshufdPSHUFL / jno Jump if not overflow (OF == 0)jnoJOC N jnoJOC O vrsqrtssQCompute Reciprocal of Square Root of Scalar Single-Precision Floating-Point Valuevrsqrtss vrsqrtss ' shrx+Logical Shift Right Without Affecting Flagsshrxl 5 shrxl 5 ' vpmovzxdqHMove Packed Doubleword Integers to Quadword Integers with Zero Extension vpmovzxdq H vpmovzxdq H vpmovzxdq H vpmovzxdq H + vpmovzxdq H / vpmovzxdq H 2 vpmovzxdq vpmovzxdq H vpmovzxdq + vpmovzxdq H + vpmovzxdq ! vpmovzxdq H vpmovzxdq ! / vpmovzxdq H / vpmovzxdq H vpmovzxdq H 2 vcvtneoph2ps9Convert Odd Elements of Packed FP16 Values to FP32 Values vcvtneoph2ps Z / vcvtneoph2ps Z 2 vpcmpud)Compare Packed Unsigned Doubleword Values vpcmpud H 9 vpcmpud H 9 vpcmpud H vpcmpud H vpcmpud H : vpcmpud H : vpcmpud H vpcmpud H vpcmpud H ; vpcmpud H ; vpcmpud H vpcmpud H vpmovqwBDown Convert Packed Quadword Values to Word Values with Truncation vpmovqw H vpmovqw H( vpmovqw H vpmovqw H, vpmovqw H vpmovqw H0 vpmovqw H vpmovqw H vpmovqw H vpmovqw H' vpmovqw H+ vpmovqw H/ vrcp28sduApproximation to the Reciprocal of a Scalar Double-Precision Floating-Point Value with Less Than 2^-28 Relative Errorvrcp28sd M vrcp28sd M + vrcp28sd M vrcp28sd M + vrcp28sd M R vrcp28sd M R vminps<Return Minimum Packed Single-Precision Floating-Point Valuesvminps H 9 vminps H vminps H : vminps H vminps H ; vminps H vminps H 9 vminps vminps H vminps / vminps H : vminps vminps H vminps 2 vminps H ; vminps H vminps H R vminps H R vrcp14pdPCompute Approximate Reciprocals of Packed Double-Precision Floating-Point Values vrcp14pd H = vrcp14pd H ? vrcp14pd H A vrcp14pd H vrcp14pd H vrcp14pd H vrcp14pd H = vrcp14pd H vrcp14pd H ? vrcp14pd H vrcp14pd H A vrcp14pd H dppd<Dot Product of Packed Double Precision Floating-Point Valuesdppd dppd / kshiftlbShift Left 8-bit Maskskshiftlb J cwdeConvert Word to Doublewordcwtl pslldq)Shift Packed Double Quadword Left Logicalpslldq movq2dq1Move Quadword from MMX Technology to XMM Registermovq2dq vcvtdq2psBConvert Packed Dword Integers to Packed Single-Precision FP Values vcvtdq2ps H 9 vcvtdq2ps H : vcvtdq2ps H ; vcvtdq2ps H vcvtdq2ps H vcvtdq2ps H vcvtdq2ps H 9 vcvtdq2ps vcvtdq2ps H vcvtdq2ps / vcvtdq2ps H : vcvtdq2ps vcvtdq2ps H vcvtdq2ps 2 vcvtdq2ps H ; vcvtdq2ps H vcvtdq2ps H Q vcvtdq2ps H Q pf2iw0Packed Floating-Point to Integer Word Conversionpf2iw pf2iw + vfmsub213shFFused Multiply-Subtract of Scalar Half-Precision Floating-Point Values vfmsub213sh R vfmsub213sh R $ vfmsub213sh R vfmsub213sh R $ vfmsub213sh R Q vfmsub213sh R Q cvttps2piRConvert with Truncation Packed Single-Precision FP Values to Packed Dword Integers cvttps2pi CVTTPS2PL cvttps2pi CVTTPS2PL + vpaddwAdd Packed Word Integersvpaddw I vpaddw I / vpaddw I vpaddw I 2 vpaddw I vpaddw I 5 vpaddw vpaddw I vpaddw / vpaddw I / vpaddw ! vpaddw I vpaddw ! 2 vpaddw I 2 vpaddw I vpaddw I 5 vpdpwusdsXPacked Dot Product of Unsigned-by-Signed Word subvectors into Doubleword with Saturation vpdpwusds Y vpdpwusds Y / vpdpwusds Y vpdpwusds Y 2 vreducephOPerform Reduction Transformation on Packed Half-Precision Floating-Point Values vreduceph K < vreduceph K > vreduceph R @ vreduceph K vreduceph K vreduceph R vreduceph K < vreduceph K vreduceph K > vreduceph K vreduceph R @ vreduceph R vreduceph R R vreduceph R R vrsqrtpsTCompute Reciprocals of Square Roots of Packed Single-Precision Floating-Point Valuesvrsqrtps vrsqrtps / vrsqrtps vrsqrtps 2 vscatterqpdRScatter Packed Double-Precision Floating-Point Values with Signed Quadword Indices vscatterqpd HE vscatterqpd HI vscatterqpd HM vfcmulcphOFused Conjugate Multiply of Complex Packed Half-Precision Floating-Point Values vfcmulcph K 9 vfcmulcph K vfcmulcph K : vfcmulcph K vfcmulcph R ; vfcmulcph R vfcmulcph K 9 vfcmulcph K vfcmulcph K : vfcmulcph K vfcmulcph R ; vfcmulcph R vfcmulcph R Q vfcmulcph R Q jnbJump if not below (CF == 0)jnbJCC N jnbJCC O jpe Jump if parity even (PF == 1)jpeJPS N jpeJPS O aor
Atomically ORaor ' maxps<Return Maximum Packed Single-Precision Floating-Point ValuesmaxpsMAXPS maxpsMAXPS / movaps:Move Aligned Packed Single-Precision Floating-Point ValuesmovapsMOVAPS movapsMOVAPS / movapsMOVAPS / vfmsub213phFFused Multiply-Subtract of Packed Half-Precision Floating-Point Values vfmsub213ph K < vfmsub213ph K vfmsub213ph K > vfmsub213ph K vfmsub213ph R @ vfmsub213ph R vfmsub213ph K < vfmsub213ph K vfmsub213ph K > vfmsub213ph K vfmsub213ph R @ vfmsub213ph R vfmsub213ph R Q vfmsub213ph R Q cmovge#Move if greater or equal (SF == OF)cmovgew cmovgew $ cmovgel cmovgel ' addsubpd Packed Double-FP Add/Subtractaddsubpd addsubpd /
vcvttsh2siGConvert with Truncation Scalar Half-Precision FP Value to Dword Integer
vcvttsh2si R
vcvttsh2si R $
vcvttsh2si R R vfrczsd7Extract Fraction Scalar Double-Precision Floating-Pointvfrczsd " vfrczsd " + vpalignrPacked Align Rightvpalignr I vpalignr I / vpalignr I vpalignr I 2 vpalignr I vpalignr I 5 vpalignr vpalignr I vpalignr / vpalignr I / vpalignr ! vpalignr I vpalignr ! 2 vpalignr I 2 vpalignr I vpalignr I 5 jnp Jump if not parity (PF == 0)jnpJPC N jnpJPC O
vgetmantsdMExtract Normalized Mantissa from Scalar Double-Precision Floating-Point Value
vgetmantsd H
vgetmantsd H +
vgetmantsd H
vgetmantsd H +
vgetmantsd H R
vgetmantsd H R vpmovusqwKDown Convert Packed Quadword Values to Word Values with Unsigned Saturation vpmovusqw H vpmovusqw H( vpmovusqw H vpmovusqw H, vpmovusqw H vpmovusqw H0 vpmovusqw H vpmovusqw H vpmovusqw H vpmovusqw H' vpmovusqw H+ vpmovusqw H/ divsd4Divide Scalar Double-Precision Floating-Point ValuesdivsdDIVSD divsdDIVSD + vgf2p8affineqb(Galois Field (2^8) Affine Transformationvgf2p8affineqb = vgf2p8affineqb vgf2p8affineqb ? vgf2p8affineqb vgf2p8affineqb A vgf2p8affineqb vgf2p8affineqb = vgf2p8affineqb vgf2p8affineqb vgf2p8affineqb / vgf2p8affineqb ? vgf2p8affineqb vgf2p8affineqb vgf2p8affineqb 2 vgf2p8affineqb A vgf2p8affineqb vptestmb6Logical AND of Packed Byte Integer Values and Set Mask vptestmb I vptestmb I vptestmb I / vptestmb I / vptestmb I vptestmb I vptestmb I 2 vptestmb I 2 vptestmb I vptestmb I vptestmb I 5 vptestmb I 5
vpgatherqq;Gather Packed Quadword Values Using Signed Quadword Indices
vpgatherqq H D
vpgatherqq H H
vpgatherqq H L
vpgatherqq ! D
vpgatherqq ! H vfmsubadd132pdXFused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Valuesvfmsubadd132pd H = vfmsubadd132pd H vfmsubadd132pd H ? vfmsubadd132pd H vfmsubadd132pd H A vfmsubadd132pd H vfmsubadd132pd H = vfmsubadd132pd # vfmsubadd132pd H vfmsubadd132pd # / vfmsubadd132pd H ? vfmsubadd132pd # vfmsubadd132pd H vfmsubadd132pd # 2 vfmsubadd132pd H A vfmsubadd132pd H vfmsubadd132pd H Q vfmsubadd132pd H Q vbroadcasti64x2 Broadcast Two Quadword Elementsvbroadcasti64x2 J / vbroadcasti64x2 J / vbroadcasti64x2 J / vbroadcasti64x2 J / vpdpwssdFPacked Dot Product of Signed-by-Signed Word subvectors into Doublewordvpdpwssd K 9 vpdpwssd K vpdpwssd K : vpdpwssd K vpdpwssd V ; vpdpwssd V vpdpwssd K 9 vpdpwssd W vpdpwssd K vpdpwssd W / vpdpwssd K : vpdpwssd W vpdpwssd K vpdpwssd W 2 vpdpwssd V ; vpdpwssd V vpcomw#Compare Packed Signed Word Integersvpcomw " vpcomw " / vpmulhrswOPacked Multiply Signed Word Integers and Store High Result with Round and Scale vpmulhrsw I vpmulhrsw I / vpmulhrsw I vpmulhrsw I 2 vpmulhrsw I vpmulhrsw I 5 vpmulhrsw vpmulhrsw I vpmulhrsw / vpmulhrsw I / vpmulhrsw ! vpmulhrsw I vpmulhrsw ! 2 vpmulhrsw I 2 vpmulhrsw I vpmulhrsw I 5 vpsllw#Shift Packed Word Data Left Logical vpsllw I vpsllw I vpsllw I / vpsllw I vpsllw I vpsllw I / vpsllw I vpsllw I vpsllw I / vpsllw I / vpsllw I 2 vpsllw I 5 vpsllw vpsllw I vpsllw vpsllw I vpsllw / vpsllw I / vpsllw I / vpsllw ! vpsllw I vpsllw ! vpsllw I vpsllw ! / vpsllw I / vpsllw I 2 vpsllw I vpsllw I vpsllw I / vpsllw I 5 movlps6Move Low Packed Single-Precision Floating-Point ValuesmovlpsMOVLPS + movlpsMOVLPS + aas!ASCII Adjust AL After SubtractionaasAAS maskmovq Store Selected Bytes of Quadwordmaskmovq
cmovncMove if not carry (CF == 0)cmovncw cmovncw $ cmovncl cmovncl ' vfnmaddpsLFused Negative Multiply-Add of Packed Single-Precision Floating-Point Values vfnmaddps $ vfnmaddps $ / vfnmaddps $ / vfnmaddps $ vfnmaddps $ 2 vfnmaddps $ 2
vfcmaddcshSFused Conjugate Multiply-Add of Complex Scalar Half-Precision Floating-Point Values
vfcmaddcsh R
vfcmaddcsh R '
vfcmaddcsh R
vfcmaddcsh R '
vfcmaddcsh R Q
vfcmaddcsh R Q kshiftrdShift Right 32-bit Maskskshiftrd I vsqrtsdCCompute Square Root of Scalar Double-Precision Floating-Point Valuevsqrtsd H vsqrtsd H + vsqrtsd vsqrtsd H vsqrtsd + vsqrtsd H + vsqrtsd H Q vsqrtsd H Q cpuidCPU IdentificationcpuidCPUID vfmadd213pdCFused Multiply-Add of Packed Double-Precision Floating-Point Values vfmadd213pd H = vfmadd213pd H vfmadd213pd H ? vfmadd213pd H vfmadd213pd H A vfmadd213pd H vfmadd213pd H = vfmadd213pd # vfmadd213pd H vfmadd213pd # / vfmadd213pd H ? vfmadd213pd # vfmadd213pd H vfmadd213pd # 2 vfmadd213pd H A vfmadd213pd H vfmadd213pd H Q vfmadd213pd H Q vfmaddsub213pdXFused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Valuesvfmaddsub213pd H = vfmaddsub213pd H vfmaddsub213pd H ? vfmaddsub213pd H vfmaddsub213pd H A vfmaddsub213pd H vfmaddsub213pd H = vfmaddsub213pd # vfmaddsub213pd H vfmaddsub213pd # / vfmaddsub213pd H ? vfmaddsub213pd # vfmaddsub213pd H vfmaddsub213pd # 2 vfmaddsub213pd H A vfmaddsub213pd H vfmaddsub213pd H Q vfmaddsub213pd H Q vfnmsub213pdQFused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values vfnmsub213pd H = vfnmsub213pd H vfnmsub213pd H ? vfnmsub213pd H vfnmsub213pd H A vfnmsub213pd H vfnmsub213pd H = vfnmsub213pd # vfnmsub213pd H vfnmsub213pd # / vfnmsub213pd H ? vfnmsub213pd # vfnmsub213pd H vfnmsub213pd # 2 vfnmsub213pd H A vfnmsub213pd H vfnmsub213pd H Q vfnmsub213pd H Q vpshufhwShuffle Packed High Wordsvpshufhw I vpshufhw I vpshufhw I vpshufhw I / vpshufhw I 2 vpshufhw I 5 vpshufhw vpshufhw I vpshufhw / vpshufhw I / vpshufhw ! vpshufhw I vpshufhw ! 2 vpshufhw I 2 vpshufhw I vpshufhw I 5 vpavgw Average Packed Word Integersvpavgw I vpavgw I / vpavgw I vpavgw I 2 vpavgw I vpavgw I 5 vpavgw vpavgw I vpavgw / vpavgw I / vpavgw ! vpavgw I vpavgw ! 2 vpavgw I 2 vpavgw I vpavgw I 5 sfence Store FencesfenceSFENCE
testLogical ComparetestbTESTB testbTESTB testbTESTB testwTESTW testwTESTW testwTESTW testlTESTL testlTESTL testlTESTL testbTESTB # testbTESTB # testwTESTW $ testwTESTW $ testlTESTL ' testlTESTL ' vpmacsddAPacked Multiply Accumulate Signed Doubleword to Signed Doublewordvpmacsdd " vpmacsdd " / vpmovw2m3Move Signs of Packed Word Integers to Mask Registervpmovw2m I vpmovw2m I vpmovw2m I pfcmpge2Packed Floating-Point Compare for Greater or Equalpfcmpge pfcmpge + pcmpistrm3Packed Compare Implicit Length Strings, Return Mask pcmpistrm pcmpistrm / cmpxchgCompare and ExchangecmpxchgbCMPXCHGB cmpxchgwCMPXCHGW cmpxchglCMPXCHGL cmpxchgbCMPXCHGB # cmpxchgwCMPXCHGW $ cmpxchglCMPXCHGL ' pabsw&Packed Absolute Value of Word Integerspabsw pabsw + pabsw pabsw / pmuldqDMultiply Packed Signed Doubleword Integers and Store Quadword Resultpmuldq pmuldq / psubsw;Subtract Packed Signed Word Integers with Signed SaturationpsubswPSUBSW psubswPSUBSW + psubswPSUBSW psubswPSUBSW / vfmsubpdHFused Multiply-Subtract of Packed Double-Precision Floating-Point Valuesvfmsubpd $ vfmsubpd $ / vfmsubpd $ / vfmsubpd $ vfmsubpd $ 2 vfmsubpd $ 2 vsubsh4Subtract Scalar Half-Precision Floating-Point Valuesvsubsh R vsubsh R $ vsubsh R vsubsh R $ vsubsh R Q vsubsh R Q vfmadd213ssCFused Multiply-Add of Scalar Single-Precision Floating-Point Values vfmadd213ss H vfmadd213ss H ' vfmadd213ss # vfmadd213ss H vfmadd213ss # ' vfmadd213ss H ' vfmadd213ss H Q vfmadd213ss H Q pfsub Packed Floating-Point Subtractpfsub pfsub + rcpssOCompute Approximate Reciprocal of Scalar Single-Precision Floating-Point ValuesrcpssRCPSS rcpssRCPSS ' vphaddbd6Packed Horizontal Add Signed Byte to Signed Doublewordvphaddbd " vphaddbd " / vphminposuw3Packed Horizontal Minimum of Unsigned Word Integers vphminposuw vphminposuw / vpminsb&Minimum of Packed Signed Byte Integersvpminsb I vpminsb I / vpminsb I vpminsb I 2 vpminsb I vpminsb I 5 vpminsb vpminsb I vpminsb / vpminsb I / vpminsb ! vpminsb I vpminsb ! 2 vpminsb I 2 vpminsb I vpminsb I 5 andnpsHBitwise Logical AND NOT of Packed Single-Precision Floating-Point ValuesandnpsANDNPS andnpsANDNPS / shlLogical Shift LeftshlbSHLB shlbSHLB shlbSHLB shlwSHLW shlwSHLW shlwSHLW shllSHLL shllSHLL shllSHLL shlbSHLB # shlbSHLB # shlbSHLB # shlwSHLW $ shlwSHLW $ shlwSHLW $ shllSHLL ' shllSHLL ' shllSHLL ' pblendvbVariable Blend Packed Bytespblendvb pblendvb / vscatterpf1qps�Sparse Prefetch Packed Single-Precision Floating-Point Data Values with Signed Quadword Indices Using T1 Hint with Intent to Writevscatterpf1qps LM vfmsub231phFFused Multiply-Subtract of Packed Half-Precision Floating-Point Values vfmsub231ph K < vfmsub231ph K vfmsub231ph K > vfmsub231ph K vfmsub231ph R @ vfmsub231ph R vfmsub231ph K < vfmsub231ph K vfmsub231ph K > vfmsub231ph K vfmsub231ph R @ vfmsub231ph R vfmsub231ph R Q vfmsub231ph R Q vdivsd4Divide Scalar Double-Precision Floating-Point Valuesvdivsd H vdivsd H + vdivsd vdivsd H vdivsd + vdivsd H + vdivsd H Q vdivsd H Q cvtps2pdNConvert Packed Single-Precision FP Values to Packed Double-Precision FP Valuescvtps2pdCVTPS2PD cvtps2pdCVTPS2PD + ja#Jump if above (CF == 0 and ZF == 0)jaJHI N jaJHI O vinsertf32x8@Insert 256 Bits of Packed Single-Precision Floating-Point Values vinsertf32x8 J vinsertf32x8 J 2 vinsertf32x8 J vinsertf32x8 J 2 vpshufbitqmb@Shuffle Bits From Quadword Elements Using Byte Indexes Into Mask vpshufbitqmb K vpshufbitqmb K vpshufbitqmb K / vpshufbitqmb K / vpshufbitqmb K vpshufbitqmb K vpshufbitqmb K 2 vpshufbitqmb K 2 vpshufbitqmb S vpshufbitqmb S vpshufbitqmb S 5 vpshufbitqmb S 5 movntsdKStore Scalar Double-Precision Floating-Point Values Using Non-Temporal Hintmovntsd + shufps5Shuffle Packed Single-Precision Floating-Point Valuesshufps shufps / vpshrdd:Concatenate and Shift Packed Doubleword Data Right Logical vpshrdd K 9 vpshrdd K vpshrdd K : vpshrdd K vpshrdd U ; vpshrdd U vpshrdd K 9 vpshrdd K vpshrdd K : vpshrdd K vpshrdd U ; vpshrdd U vpmacsswdKPacked Multiply Accumulate with Saturation Signed Word to Signed Doubleword vpmacsswd " vpmacsswd " / movzxMove with Zero-ExtendmovzbwMOVBWZX movzbwMOVBWZX # movzblMOVBLZX movzwlMOVWLZX movzblMOVBLZX # movzwlMOVWLZX $ jae Jump if above or equal (CF == 0)jaeJCC N jaeJCC O psignb Packed Sign of Byte Integerspsignb psignb + psignb psignb /
vpmacssdqhTPacked Multiply Accumulate with Saturation Signed High Doubleword to Signed Quadword
vpmacssdqh "
vpmacssdqh " / extractps4Extract Packed Single Precision Floating-Point Value extractps extractps ' phaddw#Packed Horizontal Add Word Integersphaddw phaddw + phaddw phaddw / vpshrdvdCConcatenate and Variable Shift Packed Doubleword Data Right Logical vpshrdvd K 9 vpshrdvd K vpshrdvd K : vpshrdvd K vpshrdvd U ; vpshrdvd U vpshrdvd K 9 vpshrdvd K vpshrdvd K : vpshrdvd K vpshrdvd U ; vpshrdvd U vscatterpf0dps�Sparse Prefetch Packed Single-Precision Floating-Point Data Values with Signed Doubleword Indices Using T0 Hint with Intent to Writevscatterpf0dps LK aaaASCII Adjust After AdditionaaaAAA paddusw:Add Packed Unsigned Word Integers with Unsigned Saturationpaddusw paddusw + paddusw paddusw / vpdpbssdFPacked Dot Product of Signed-by-Singed Byte subvectors into Doublewordvpdpbssd X vpdpbssd X / vpdpbssd X vpdpbssd X 2 vfnmadd231sdLFused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values vfnmadd231sd H vfnmadd231sd H + vfnmadd231sd # vfnmadd231sd H vfnmadd231sd # + vfnmadd231sd H + vfnmadd231sd H Q vfnmadd231sd H Q vfnmsubpsQFused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values vfnmsubps $ vfnmsubps $ / vfnmsubps $ / vfnmsubps $ vfnmsubps $ 2 vfnmsubps $ 2 vpsravw0Variable Shift Packed Word Data Right Arithmetic vpsravw I vpsravw I / vpsravw I vpsravw I 2 vpsravw I vpsravw I 5 vpsravw I vpsravw I / vpsravw I vpsravw I 2 vpsravw I vpsravw I 5 pfcmpeq'Packed Floating-Point Compare for Equalpfcmpeq pfcmpeq + vpshaq!Packed Shift Arithmetic Quadwordsvpshaq " vpshaq " / vpshaq " /
vcvtudq2pd\Convert Packed Unsigned Doubleword Integers to Packed Double-Precision Floating-Point Values
vcvtudq2pd H 8
vcvtudq2pd H 9
vcvtudq2pd H :
vcvtudq2pd H
vcvtudq2pd H
vcvtudq2pd H
vcvtudq2pd H 8
vcvtudq2pd H
vcvtudq2pd H 9
vcvtudq2pd H
vcvtudq2pd H :
vcvtudq2pd H vcvttps2udqrConvert with Truncation Packed Single-Precision Floating-Point Values to Packed Unsigned Doubleword Integer Values vcvttps2udq H 9 vcvttps2udq H : vcvttps2udq H ; vcvttps2udq H vcvttps2udq H vcvttps2udq H vcvttps2udq H 9 vcvttps2udq H vcvttps2udq H : vcvttps2udq H vcvttps2udq H ; vcvttps2udq H vcvttps2udq H R vcvttps2udq H R vfnmaddpdLFused Negative Multiply-Add of Packed Double-Precision Floating-Point Values vfnmaddpd $ vfnmaddpd $ / vfnmaddpd $ / vfnmaddpd $ vfnmaddpd $ 2 vfnmaddpd $ 2 vpandnq3Bitwise Logical AND NOT of Packed Quadword Integers vpandnq H = vpandnq H vpandnq H ? vpandnq H vpandnq H A vpandnq H vpandnq H = vpandnq H vpandnq H ? vpandnq H vpandnq H A vpandnq H vpxord:Bitwise Logical Exclusive OR of Packed Doubleword Integers vpxord H 9 vpxord H vpxord H : vpxord H vpxord H ; vpxord H vpxord H 9 vpxord H vpxord H : vpxord H vpxord H ; vpxord H mulx)Unsigned Multiply Without Affecting Flagsmulxl 5 mulxl 5 ' packsswb,Pack Words into Bytes with Signed Saturationpacksswb packsswb + packsswb packsswb / vpcomuq)Compare Packed Unsigned Quadword Integersvpcomuq " vpcomuq " / vmovntdqa.Load Double Quadword Non-Temporal Aligned Hint vmovntdqa / vmovntdqa H / vmovntdqa ! 2 vmovntdqa H 2 vmovntdqa H 5 vcvtsi2ss9Convert Dword Integer to Scalar Single-Precision FP Value
vcvtsi2ssl
vcvtsi2ssl H
vcvtsi2ssl '
vcvtsi2ssl H '
vcvtsi2ssl H Q blcsSet Lowest Clear Bitblcs 6 blcs 6 ' vpmullq=Multiply Packed Signed Quadword Integers and Store Low Result vpmullq J = vpmullq J vpmullq J ? vpmullq J vpmullq J A vpmullq J vpmullq J = vpmullq J vpmullq J ? vpmullq J vpmullq J A vpmullq J
prefetcht1'Prefetch Data Into Caches using T1 Hint
prefetcht1
PREFETCHT1
# pextrdExtract Doublewordpextrd pextrd ' korb Bitwise Logical OR 8-bit Maskskorb J movups<Move Unaligned Packed Single-Precision Floating-Point ValuesmovupsMOVUPS movupsMOVUPS / movupsMOVUPS /
sha256msg1PPerform an Intermediate Calculation for the Next Four SHA256 Message Doublewords
sha256msg1 (
sha256msg1 ( / vmovlpd5Move Low Packed Double-Precision Floating-Point Valuevmovlpd + vmovlpd H+ vmovlpd + vmovlpd H + vmaxsh9Return Maximum Scalar Half-Precision Floating-Point Valuevmaxsh R vmaxsh R $ vmaxsh R vmaxsh R $ vmaxsh R R vmaxsh R R emmsExit MMX StateemmsEMMS vcvttsh2usiVConvert with Truncation Scalar Half-Precision Floating-Point Value to Unsigned Integer vcvttsh2usi R vcvttsh2usi R $ vcvttsh2usi R R vmovdMove Doublewordvmovd vmovd H vmovd vmovd H vmovd ' vmovd H ' vmovd ' vmovd H'
vcvtsh2usiQConvert Scalar Half-Precision Floating-Point Value to Unsigned Doubleword Integer
vcvtsh2usi R
vcvtsh2usi R $
vcvtsh2usi R Q vpsrlvq1Variable Shift Packed Quadword Data Right Logicalvpsrlvq H = vpsrlvq H vpsrlvq H ? vpsrlvq H vpsrlvq H A vpsrlvq H vpsrlvq H = vpsrlvq ! vpsrlvq H vpsrlvq ! / vpsrlvq H ? vpsrlvq ! vpsrlvq H vpsrlvq ! 2 vpsrlvq H A vpsrlvq H kxnorw!Bitwise Logical XNOR 16-bit Maskskxnorw H pfmul Packed Floating-Point Multiplypfmul pfmul + vpmovsxbdDMove Packed Byte Integers to Doubleword Integers with Sign Extension vpmovsxbd H vpmovsxbd H vpmovsxbd H vpmovsxbd H ' vpmovsxbd H + vpmovsxbd H / vpmovsxbd vpmovsxbd H vpmovsxbd ' vpmovsxbd H ' vpmovsxbd ! vpmovsxbd H vpmovsxbd ! + vpmovsxbd H + vpmovsxbd H vpmovsxbd H / callCall ProcedurecallCALL O calll calll ' kaddbADD Two 8-bit Maskskaddb J pminud.Minimum of Packed Unsigned Doubleword Integerspminud pminud / vscatterpf1dpd�Sparse Prefetch Packed Double-Precision Floating-Point Data Values with Signed Doubleword Indices Using T1 Hint with Intent to Writevscatterpf1dpd LG movsxMove with Sign-ExtensionmovsbwMOVBWSX movsbwMOVBWSX # movsblMOVBLSX movswlMOVWLSX movsblMOVBLSX # movswlMOVWLSX $ pmaxud.Maximum of Packed Unsigned Doubleword Integerspmaxud pmaxud /
vextractf64x2AExtract 128 Bits of Packed Double-Precision Floating-Point Values
vextractf64x2 J
vextractf64x2 J0
vextractf64x2 J
vextractf64x2 J0
vextractf64x2 J
vextractf64x2 J
vextractf64x2 J/
vextractf64x2 J/ ucomisdNUnordered Compare Scalar Double-Precision Floating-Point Values and Set EFLAGSucomisdUCOMISD ucomisdUCOMISD + phsubd.Packed Horizontal Subtract Doubleword Integersphsubd phsubd + phsubd phsubd / vcvtss2sdLConvert Scalar Single-Precision FP Value to Scalar Double-Precision FP Value vcvtss2sd H vcvtss2sd H ' vcvtss2sd vcvtss2sd H vcvtss2sd ' vcvtss2sd H ' vcvtss2sd H R vcvtss2sd H R
vfcmaddcphSFused Conjugate Multiply-Add of Complex Packed Half-Precision Floating-Point Values
vfcmaddcph K 9
vfcmaddcph K
vfcmaddcph K :
vfcmaddcph K
vfcmaddcph R ;
vfcmaddcph R
vfcmaddcph K 9
vfcmaddcph K
vfcmaddcph K :
vfcmaddcph K
vfcmaddcph R ;
vfcmaddcph R
vfcmaddcph R Q
vfcmaddcph R Q vcvtsh2si7Convert Scalar Half-Precision FP Value to Dword Integer vcvtsh2si R vcvtsh2si R $ vcvtsh2si R Q vmaxph:Return Maximum Packed Half-Precision Floating-Point Valuesvmaxph K < vmaxph K vmaxph K > vmaxph K vmaxph R @ vmaxph R vmaxph K < vmaxph K vmaxph K > vmaxph K vmaxph R @ vmaxph R vmaxph R R vmaxph R R vpcomd)Compare Packed Signed Doubleword Integersvpcomd " vpcomd " / vpexpandqELoad Sparse Packed Quadword Integer Values from Dense Memory/Register vpexpandq H vpexpandq H vpexpandq H vpexpandq H / vpexpandq H 2 vpexpandq H 5 vpexpandq H vpexpandq H / vpexpandq H vpexpandq H 2 vpexpandq H vpexpandq H 5 vrangepdXRange Restriction Calculation For Packed Pairs of Double-Precision Floating-Point Valuesvrangepd J = vrangepd J vrangepd J ? vrangepd J vrangepd J A vrangepd J vrangepd J = vrangepd J vrangepd J ? vrangepd J vrangepd J A vrangepd J vrangepd J R vrangepd J R vmovlps6Move Low Packed Single-Precision Floating-Point Valuesvmovlps + vmovlps H+ vmovlps + vmovlps H + monitorx+Monitor a Linear Address Range with Timeoutmonitorx E vscalefps_Scale Packed Single-Precision Floating-Point Values With Single-Precision Floating-Point Values vscalefps H 9 vscalefps H vscalefps H : vscalefps H vscalefps H ; vscalefps H vscalefps H 9 vscalefps H vscalefps H : vscalefps H vscalefps H ; vscalefps H vscalefps H Q vscalefps H Q cmovnle0Move if not less or equal (ZF == 0 and SF == OF)cmovnlew cmovnlew $ cmovnlel cmovnlel ' vcvttph2waConvert with Truncation Packed Half-Precision Floating-Point Values to Packed Word Integer Values vcvttph2w K < vcvttph2w K > vcvttph2w R @ vcvttph2w K vcvttph2w K vcvttph2w R vcvttph2w K < vcvttph2w K vcvttph2w K > vcvttph2w K vcvttph2w R @ vcvttph2w R vcvttph2w R R vcvttph2w R R lahfLoad AH from FlagslahfLAHF vinsertf32x4@Insert 128 Bits of Packed Single-Precision Floating-Point Values vinsertf32x4 H vinsertf32x4 H / vinsertf32x4 H vinsertf32x4 H / vinsertf32x4 H vinsertf32x4 H / vinsertf32x4 H vinsertf32x4 H / sqrtpdECompute Square Roots of Packed Double-Precision Floating-Point ValuessqrtpdSQRTPD sqrtpdSQRTPD / cmovpe Move if parity even (PF == 1)cmovpew cmovpew $ cmovpel cmovpel ' divUnsigned DividedivbDIVB divwDIVW divlDIVL divbDIVB # divwDIVW $ divlDIVL ' tpause Timed PAUSEtpause G
vfpclassss:Test Class of Scalar Single-Precision Floating-Point Value
vfpclassss J
vfpclassss J
vfpclassss J '
vfpclassss J ' vpcmpq%Compare Packed Signed Quadword Values vpcmpq H = vpcmpq H = vpcmpq H vpcmpq H vpcmpq H ? vpcmpq H ? vpcmpq H vpcmpq H vpcmpq H A vpcmpq H A vpcmpq H vpcmpq H vpsrldq*Shift Packed Double Quadword Right Logicalvpsrldq vpsrldq I vpsrldq I / vpsrldq ! vpsrldq I vpsrldq I 2 vpsrldq I vpsrldq I 5 cmoveMove if equal (ZF == 1)cmovew cmovew $ cmovel cmovel ' setzSet byte if zero (ZF == 1)setzSETEQ setzSETEQ # vcvttps2uqqpConvert with Truncation Packed Single Precision Floating-Point Values to Packed Unsigned Quadword Integer Values vcvttps2uqq J 8 vcvttps2uqq J 9 vcvttps2uqq J : vcvttps2uqq J vcvttps2uqq J vcvttps2uqq J vcvttps2uqq J 8 vcvttps2uqq J vcvttps2uqq J 9 vcvttps2uqq J vcvttps2uqq J : vcvttps2uqq J vcvttps2uqq J R vcvttps2uqq J R
vpunpckhdq;Unpack and Interleave High-Order Doublewords into Quadwords
vpunpckhdq H 9
vpunpckhdq H
vpunpckhdq H :
vpunpckhdq H
vpunpckhdq H ;
vpunpckhdq H
vpunpckhdq H 9
vpunpckhdq
vpunpckhdq H
vpunpckhdq /
vpunpckhdq H :
vpunpckhdq !
vpunpckhdq H
vpunpckhdq ! 2
vpunpckhdq H ;
vpunpckhdq H vrcp14psPCompute Approximate Reciprocals of Packed Single-Precision Floating-Point Values vrcp14ps H 9 vrcp14ps H : vrcp14ps H ; vrcp14ps H vrcp14ps H vrcp14ps H vrcp14ps H 9 vrcp14ps H vrcp14ps H : vrcp14ps H vrcp14ps H ; vrcp14ps H vrndscalesd]Round Scalar Double-Precision Floating-Point Value To Include A Given Number Of Fraction Bits vrndscalesd H vrndscalesd H + vrndscalesd H vrndscalesd H + vrndscalesd H R vrndscalesd H R vpcmpeqb%Compare Packed Byte Data for Equalityvpcmpeqb I vpcmpeqb I vpcmpeqb I / vpcmpeqb I / vpcmpeqb I vpcmpeqb I vpcmpeqb I 2 vpcmpeqb I 2 vpcmpeqb I vpcmpeqb I vpcmpeqb I 5 vpcmpeqb I 5 vpcmpeqb vpcmpeqb / vpcmpeqb ! vpcmpeqb ! 2
vrsqrt14pd`Compute Approximate Reciprocals of Square Roots of Packed Double-Precision Floating-Point Values
vrsqrt14pd H =
vrsqrt14pd H ?
vrsqrt14pd H A
vrsqrt14pd H
vrsqrt14pd H
vrsqrt14pd H
vrsqrt14pd H =
vrsqrt14pd H
vrsqrt14pd H ?
vrsqrt14pd H
vrsqrt14pd H A
vrsqrt14pd H xlatbTable Look-up TranslationxlatXLAT vmovdqu Move Unaligned Double Quadwordvmovdqu vmovdqu / vmovdqu vmovdqu 2 vmovdqu / vmovdqu 2 vpermi2pd\Full Permute of Double-Precision Floating-Point Values From Two Tables Overwriting the Index vpermi2pd H = vpermi2pd H vpermi2pd H ? vpermi2pd H vpermi2pd H A vpermi2pd H vpermi2pd H = vpermi2pd H vpermi2pd H ? vpermi2pd H vpermi2pd H A vpermi2pd H vpsllvw,Variable Shift Packed Word Data Left Logical vpsllvw I vpsllvw I / vpsllvw I vpsllvw I 2 vpsllvw I vpsllvw I 5 vpsllvw I vpsllvw I / vpsllvw I vpsllvw I 2 vpsllvw I vpsllvw I 5 vpaddd Add Packed Doubleword Integersvpaddd H 9 vpaddd H vpaddd H : vpaddd H vpaddd H ; vpaddd H vpaddd H 9 vpaddd vpaddd H vpaddd / vpaddd H : vpaddd ! vpaddd H vpaddd ! 2 vpaddd H ; vpaddd H
vgatherdpdTGather Packed Double-Precision Floating-Point Values Using Signed Doubleword Indices
vgatherdpd H B
vgatherdpd H B
vgatherdpd H F
vgatherdpd ! B
vgatherdpd ! B cmovzMove if zero (ZF == 1)cmovzw cmovzw $ cmovzl cmovzl ' vpmovsqwIDown Convert Packed Quadword Values to Word Values with Signed Saturation vpmovsqw H vpmovsqw H( vpmovsqw H vpmovsqw H, vpmovsqw H vpmovsqw H0 vpmovsqw H vpmovsqw H vpmovsqw H vpmovsqw H' vpmovsqw H+ vpmovsqw H/ vfnmsub132phOFused Negative Multiply-Subtract of Packed Half-Precision Floating-Point Values vfnmsub132ph K < vfnmsub132ph K vfnmsub132ph K > vfnmsub132ph K vfnmsub132ph R @ vfnmsub132ph R vfnmsub132ph K < vfnmsub132ph K vfnmsub132ph K > vfnmsub132ph K vfnmsub132ph R @ vfnmsub132ph R vfnmsub132ph R Q vfnmsub132ph R Q andpsDBitwise Logical AND of Packed Single-Precision Floating-Point ValuesandpsANDPS andpsANDPS / cmpps5Compare Packed Single-Precision Floating-Point ValuescmppsCMPPS cmppsCMPPS / setae$Set byte if above or equal (CF == 0)setaeSETCC setaeSETCC # subps6Subtract Packed Single-Precision Floating-Point ValuessubpsSUBPS subpsSUBPS / vpdpwuudJPacked Dot Product of Unsigned-by-Unsigned Word subvectors into Doublewordvpdpwuud Y vpdpwuud Y / vpdpwuud Y vpdpwuud Y 2 vsqrtshACompute Square Root of Scalar Half-Precision Floating-Point Valuevsqrtsh R vsqrtsh R $ vsqrtsh R vsqrtsh R $ vsqrtsh R Q vsqrtsh R Q pmaxsb&Maximum of Packed Signed Byte Integerspmaxsb pmaxsb / pmulhrswOPacked Multiply Signed Word Integers and Store High Result with Round and Scalepmulhrsw pmulhrsw + pmulhrsw pmulhrsw /
vgatherpf0qpsmSparse Prefetch Packed Single-Precision Floating-Point Data Values with Signed Quadword Indices Using T0 Hint
vgatherpf0qps LM vpsignw Packed Sign of Word Integersvpsignw vpsignw / vpsignw ! vpsignw ! 2 cvtss2sdLConvert Scalar Single-Precision FP Value to Scalar Double-Precision FP Valuecvtss2sdCVTSS2SD cvtss2sdCVTSS2SD ' pmovmskbMove Byte MaskpmovmskbPMOVMSKB
pmovmskbPMOVMSKB minpd<Return Minimum Packed Double-Precision Floating-Point ValuesminpdMINPD minpdMINPD / vfmsub213psHFused Multiply-Subtract of Packed Single-Precision Floating-Point Values vfmsub213ps H 9 vfmsub213ps H vfmsub213ps H : vfmsub213ps H vfmsub213ps H ; vfmsub213ps H vfmsub213ps H 9 vfmsub213ps # vfmsub213ps H vfmsub213ps # / vfmsub213ps H : vfmsub213ps # vfmsub213ps H vfmsub213ps # 2 vfmsub213ps H ; vfmsub213ps H vfmsub213ps H Q vfmsub213ps H Q
vcvtneps2bf16YConvert with Nearest-Even rounding a Single-Precision FP vector into a BFloat16 FP vectorvcvtneps2bf16x K 9 vcvtneps2bf16y K :
vcvtneps2bf16 Q ; vcvtneps2bf16x K vcvtneps2bf16y K
vcvtneps2bf16 Q vcvtneps2bf16x K 9 vcvtneps2bf16y K : vcvtneps2bf16x K vcvtneps2bf16x Z vcvtneps2bf16y K vcvtneps2bf16y Z vcvtneps2bf16x Z / vcvtneps2bf16y Z 2
vcvtneps2bf16 Q ;
vcvtneps2bf16 Q vmaxss;Return Maximum Scalar Single-Precision Floating-Point Valuevmaxss H vmaxss H ' vmaxss vmaxss H vmaxss ' vmaxss H ' vmaxss H R vmaxss H R vcmpsh3Compare Scalar Half-Precision Floating-Point Valuesvcmpsh R vcmpsh R vcmpsh R $ vcmpsh R $ vcmpsh R R vcmpsh R R vpackusdw4Pack Doublewords into Words with Unsigned Saturation vpackusdw I 9 vpackusdw I vpackusdw I : vpackusdw I vpackusdw I ; vpackusdw I vpackusdw I 9 vpackusdw vpackusdw I vpackusdw / vpackusdw I : vpackusdw ! vpackusdw I vpackusdw ! 2 vpackusdw I ; vpackusdw I vphaddbw0Packed Horizontal Add Signed Byte to Signed Wordvphaddbw " vphaddbw " / kortestb OR 8-bit Masks and Set Flagskortestb J vaddsd1Add Scalar Double-Precision Floating-Point Valuesvaddsd H vaddsd H + vaddsd vaddsd H vaddsd + vaddsd H + vaddsd H Q vaddsd H Q vphaddudq5Packed Horizontal Add Unsigned Doubleword to Quadword vphaddudq " vphaddudq " / pf2id5Packed Floating-Point to Integer Doubleword Conversonpf2id pf2id + paddd Add Packed Doubleword Integerspaddd paddd + paddd paddd / vpmovusqdQDown Convert Packed Quadword Values to Doubleword Values with Unsigned Saturation vpmovusqd H vpmovusqd H, vpmovusqd H vpmovusqd H0 vpmovusqd H vpmovusqd H3 vpmovusqd H vpmovusqd H vpmovusqd H vpmovusqd H+ vpmovusqd H/ vpmovusqd H2 vrcp14ssPCompute Approximate Reciprocal of a Scalar Single-Precision Floating-Point Valuevrcp14ss H vrcp14ss H ' vrcp14ss H vrcp14ss H ' vsubss6Subtract Scalar Single-Precision Floating-Point Valuesvsubss H vsubss H ' vsubss vsubss H vsubss ' vsubss H ' vsubss H Q vsubss H Q unpckhpsHUnpack and Interleave High Packed Single-Precision Floating-Point ValuesunpckhpsUNPCKHPS unpckhpsUNPCKHPS / mulUnsigned MultiplymulbMULB mulwMULW mullMULL mulbMULB # mulwMULW $ mullMULL ' vpsrld*Shift Packed Doubleword Data Right Logical vpsrld H 9 vpsrld H : vpsrld H ; vpsrld H vpsrld H vpsrld H / vpsrld H vpsrld H vpsrld H / vpsrld H vpsrld H vpsrld H / vpsrld H 9 vpsrld vpsrld H vpsrld vpsrld H vpsrld / vpsrld H / vpsrld H : vpsrld ! vpsrld H vpsrld ! vpsrld H vpsrld ! / vpsrld H / vpsrld H ; vpsrld H vpsrld H vpsrld H /
vrsqrt14sdaCompute Approximate Reciprocal of a Square Root of a Scalar Double-Precision Floating-Point Value
vrsqrt14sd H
vrsqrt14sd H +
vrsqrt14sd H
vrsqrt14sd H + pcmpeqw%Compare Packed Word Data for Equalitypcmpeqw pcmpeqw + pcmpeqw pcmpeqw / knotbNOT 8-bit Mask Registerknotb J porPacked Bitwise Logical ORpor por + por por / vpblenddBlend Packed Doublewordsvpblendd ! vpblendd ! / vpblendd ! vpblendd ! 2 vprotqPacked Rotate Quadwordsvprotq " vprotq " vprotq " / vprotq " / vprotq " / vcvtsd2shJConvert Scalar Double-Precision FP Value to Scalar Half-Precision FP Value vcvtsd2sh R vcvtsd2sh R + vcvtsd2sh R vcvtsd2sh R + vcvtsd2sh R Q vcvtsd2sh R Q vpscatterqd=Scatter Packed Doubleword Values with Signed Quadword Indices vpscatterqd HE vpscatterqd HI vpscatterqd HM vrsqrtphRCompute Reciprocals of Square Roots of Packed Half-Precision Floating-Point Values vrsqrtph K < vrsqrtph K > vrsqrtph R @ vrsqrtph K vrsqrtph K vrsqrtph R vrsqrtph K < vrsqrtph K vrsqrtph K > vrsqrtph K vrsqrtph R @ vrsqrtph R vpmovsdbKDown Convert Packed Doubleword Values to Byte Values with Signed Saturation vpmovsdb H vpmovsdb H( vpmovsdb H vpmovsdb H, vpmovsdb H vpmovsdb H0 vpmovsdb H vpmovsdb H vpmovsdb H vpmovsdb H' vpmovsdb H+ vpmovsdb H/ kaddqADD Two 64-bit Maskskaddq I kshiftlqShift Left 64-bit Maskskshiftlq I comissLCompare Scalar Ordered Single-Precision Floating-Point Values and Set EFLAGScomissCOMISS comissCOMISS ' pfrcpv5Packed Floating-Point Reciprocal Approximation Vectorpfrcpv pfrcpv + bsrBit Scan ReversebsrwBSRW bsrwBSRW $ bsrlBSRL bsrlBSRL ' rdpidRead Processor IDrdpid , subss6Subtract Scalar Single-Precision Floating-Point ValuessubssSUBSS subssSUBSS ' umonitor(User mode Monitor a Linear Address Rangeumonitor G valignqAlign Quadword Vectors valignq H = valignq H valignq H ? valignq H valignq H A valignq H valignq H = valignq H valignq H ? valignq H valignq H A valignq H vcvtsh2sdJConvert Scalar Half-Precision FP Value to Scalar Double-Precision FP Value vcvtsh2sd R vcvtsh2sd R $ vcvtsh2sd R vcvtsh2sd R $ vcvtsh2sd R R vcvtsh2sd R R vcvttph2udqpConvert with Truncation Packed Half-Precision Floating-Point Values to Packed Unsigned Doubleword Integer Values vcvttph2udq K . vcvttph2udq K < vcvttph2udq R > vcvttph2udq K vcvttph2udq K vcvttph2udq R vcvttph2udq K . vcvttph2udq K vcvttph2udq K < vcvttph2udq K vcvttph2udq R > vcvttph2udq R vcvttph2udq R R vcvttph2udq R R kmovwMove 16-bit Maskkmovw H kmovw H kmovw H $ kmovw H kmovw H$ vpsubd#Subtract Packed Doubleword Integersvpsubd H 9 vpsubd H vpsubd H : vpsubd H vpsubd H ; vpsubd H vpsubd H 9 vpsubd vpsubd H vpsubd / vpsubd H : vpsubd ! vpsubd H vpsubd ! 2 vpsubd H ; vpsubd H vzeroallZero All YMM Registersvzeroall
vcvtpd2uqqZConvert Packed Double-Precision Floating-Point Values to Packed Unsigned Quadword Integers
vcvtpd2uqq J =
vcvtpd2uqq J ?
vcvtpd2uqq J A
vcvtpd2uqq J
vcvtpd2uqq J
vcvtpd2uqq J
vcvtpd2uqq J =
vcvtpd2uqq J
vcvtpd2uqq J ?
vcvtpd2uqq J
vcvtpd2uqq J A
vcvtpd2uqq J
vcvtpd2uqq J Q
vcvtpd2uqq J Q pandPacked Bitwise Logical ANDpandPAND pandPAND + pandPAND pandPAND / jnzJump if not zero (ZF == 0)jnzJNE N jnzJNE O hsubps$Packed Single-FP Horizontal Subtracthsubps hsubps / vmovhpd6Move High Packed Double-Precision Floating-Point Valuevmovhpd + vmovhpd H+ vmovhpd + vmovhpd H + idiv
Signed DivideidivbIDIVB idivwIDIVW idivlIDIVL idivbIDIVB # idivwIDIVW $ idivlIDIVL ' orpd<Bitwise Logical OR of Double-Precision Floating-Point ValuesorpdORPD orpdORPD / subsd6Subtract Scalar Double-Precision Floating-Point ValuessubsdSUBSD subsdSUBSD + vpmovm2q8Expand Bits of Mask Register to Packed Quadword Integersvpmovm2q J vpmovm2q J vpmovm2q J andnLogical AND NOTandnl 4 andnl 4 ' vptestPacked Logical Comparevptest vptest / vptest vptest 2 jle+Jump if less or equal (ZF == 1 or SF != OF)jleJLE N jleJLE O sha1nexte1Calculate SHA1 State Variable E after Four Rounds sha1nexte ( sha1nexte ( /