[−][src]Struct wip_s32k144::pdb1::RegisterBlock

#[repr(C)]pub struct RegisterBlock {
    pub sc: SC,
    pub mod_: MOD,
    pub cnt: CNT,
    pub idly: IDLY,
    pub ch0c1: CHC1,
    pub ch0s: CHS,
    pub ch0dly0: CHDLY0,
    pub ch0dly1: CHDLY1,
    pub ch0dly2: CHDLY2,
    pub ch0dly3: CHDLY3,
    pub ch0dly4: CHDLY4,
    pub ch0dly5: CHDLY5,
    pub ch0dly6: CHDLY6,
    pub ch0dly7: CHDLY7,
    pub ch1c1: CHC1,
    pub ch1s: CHS,
    pub ch1dly0: CHDLY0,
    pub ch1dly1: CHDLY1,
    pub ch1dly2: CHDLY2,
    pub ch1dly3: CHDLY3,
    pub ch1dly4: CHDLY4,
    pub ch1dly5: CHDLY5,
    pub ch1dly6: CHDLY6,
    pub ch1dly7: CHDLY7,
    pub poen: POEN,
    // some fields omitted
}

Register block

Fields

sc: SC

0x00 - Status and Control register

mod_: MOD

0x04 - Modulus register

cnt: CNT

0x08 - Counter register

idly: IDLY

0x0c - Interrupt Delay register

ch0c1: CHC1

0x10 - Channel n Control register 1

ch0s: CHS

0x14 - Channel n Status register

ch0dly0: CHDLY0

0x18 - Channel n Delay 0 register

ch0dly1: CHDLY1

0x1c - Channel n Delay 1 register

ch0dly2: CHDLY2

0x20 - Channel n Delay 2 register

ch0dly3: CHDLY3

0x24 - Channel n Delay 3 register

ch0dly4: CHDLY4

0x28 - Channel n Delay 4 register

ch0dly5: CHDLY5

0x2c - Channel n Delay 5 register

ch0dly6: CHDLY6

0x30 - Channel n Delay 6 register

ch0dly7: CHDLY7

0x34 - Channel n Delay 7 register

ch1c1: CHC1

0x38 - Channel n Control register 1

ch1s: CHS

0x3c - Channel n Status register

ch1dly0: CHDLY0

0x40 - Channel n Delay 0 register

ch1dly1: CHDLY1

0x44 - Channel n Delay 1 register

ch1dly2: CHDLY2

0x48 - Channel n Delay 2 register

ch1dly3: CHDLY3

0x4c - Channel n Delay 3 register

ch1dly4: CHDLY4

0x50 - Channel n Delay 4 register

ch1dly5: CHDLY5

0x54 - Channel n Delay 5 register

ch1dly6: CHDLY6

0x58 - Channel n Delay 6 register

ch1dly7: CHDLY7

0x5c - Channel n Delay 7 register

poen: POEN

0x190 - Pulse-Out n Enable register

Methods

impl RegisterBlock[src]

pub fn dly2(&self) -> &DLY2[src]

0x194 - PDB1_DLY2 register.

pub fn dly2_mut(&self) -> &mut DLY2[src]

0x194 - PDB1_DLY2 register.

pub fn podly(&self) -> &PODLY[src]

0x194 - Pulse-Out n Delay register

pub fn podly_mut(&self) -> &mut PODLY[src]

0x194 - Pulse-Out n Delay register

pub fn dly1(&self) -> &DLY1[src]

0x196 - PDB1_DLY1 register.

pub fn dly1_mut(&self) -> &mut DLY1[src]

0x196 - PDB1_DLY1 register.

Auto Trait Implementations

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impl<T> Any for T where
    T: 'static + ?Sized, [src]

impl<T> Borrow<T> for T where
    T: ?Sized, [src]

impl<T> BorrowMut<T> for T where
    T: ?Sized, [src]

impl<T> From<T> for T[src]

impl<T, U> Into<U> for T where
    U: From<T>, [src]

impl<T> Same<T> for T

type Output = T

Should always be Self

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    U: Into<T>, [src]

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The type returned in the event of a conversion error.

impl<T, U> TryInto<U> for T where
    U: TryFrom<T>, [src]

type Error = <U as TryFrom<T>>::Error

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