[][src]Type Definition wip_s32k144::pdb1::CHDLY0

type CHDLY0 = Reg<u32, _CHDLY0>;

Channel n Delay 0 register

This register you can read, reset, write, write_with_zero, modify. See API.

For information about available fields see chdly0 module

Trait Implementations

impl Readable for CHDLY0[src]

read() method returns chdly0::R reader structure

impl ResetValue for CHDLY0[src]

Register CH%sDLY0 reset()'s with value 0

type Type = u32

Register size

impl Writable for CHDLY0[src]

write(|w| ..) method takes chdly0::W writer structure