[][src]Type Definition wip_s32k144::pdb1::CHDLY5

type CHDLY5 = Reg<u32, _CHDLY5>;

Channel n Delay 5 register

This register you can read, reset, write, write_with_zero, modify. See API.

For information about available fields see chdly5 module

Trait Implementations

impl Readable for CHDLY5[src]

read() method returns chdly5::R reader structure

impl ResetValue for CHDLY5[src]

Register CH%sDLY5 reset()'s with value 0

type Type = u32

Register size

impl Writable for CHDLY5[src]

write(|w| ..) method takes chdly5::W writer structure